[llvm] [AMDGPU] Fix setreg handling in the VGPR MSB lowering (PR #186491)

[Shilei Tian via llvm-commits]

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@@ -545,13 +536,7 @@ bool AMDGPULowerVGPREncoding::handleSetregMode(MachineInstr &MI) {
                     << " SetregModeValue=0x"
                     << Twine::utohexstr(SetregModeValue) << '\n');
   if (ImmBits12To19 == SetregModeValue) {
-    // Already correct, but we must invalidate MostRecentModeSet because this
-    // instruction will overwrite mode[12:19]. We can't update this instruction
-    // via piggybacking (bits[12:19] are meaningful), so if CurrentMode changes,
-    // a new s_set_vgpr_msb will be inserted after this instruction.
-    MostRecentModeSet = nullptr;
-    LLVM_DEBUG(dbgs() << "    -> bits[12:19] already correct, "
-                         "invalidated MostRecentModeSet\n");
+    LLVM_DEBUG(dbgs() << "    -> bits[12:19] already correct\n");
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shiltian wrote:

I'm thinking about the scenario where `S_SETREG_IMM32_B32` is in the list, and later when we piggyback the update of `S_SET_VGPR_MSB`, the new value may not match the mode value of that `S_SETREG_IMM32_B32` instruction. In that case, the update could actually corrupt the original value of that instruction.

https://github.com/llvm/llvm-project/pull/186491