[llvm] [WebAssembly][GlobalISel] Add legalization & selection of most integer ops (PR #190234)

[Demetrius Kanios via llvm-commits]

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@@ -83,14 +84,65 @@ WebAssemblyInstructionSelector::WebAssemblyInstructionSelector(
 {
 }
 
+static const TargetRegisterClass &getRegClassForBank(const RegisterBank &RB) {
+  switch (RB.getID()) {
+  case WebAssembly::I32RegBankID:
+    return WebAssembly::I32RegClass;
+  case WebAssembly::I64RegBankID:
+    return WebAssembly::I64RegClass;
+  case WebAssembly::F32RegBankID:
+    return WebAssembly::F32RegClass;
+  case WebAssembly::F64RegBankID:
+    return WebAssembly::F64RegClass;
+  case WebAssembly::EXNREFRegBankID:
+    return WebAssembly::EXNREFRegClass;
+  case WebAssembly::EXTERNREFRegBankID:
+    return WebAssembly::EXTERNREFRegClass;
+  case WebAssembly::FUNCREFRegBankID:
+    return WebAssembly::FUNCREFRegClass;
+  case WebAssembly::V128RegBankID:
+    return WebAssembly::V128RegClass;
+  default:
+    reportFatalInternalError(
+        "Found unexpected RegisterBank in `getRegClassForBank`");
+  }
+}
+
 bool WebAssemblyInstructionSelector::select(MachineInstr &I) {
+  MachineBasicBlock &MBB = *I.getParent();
+  MachineFunction &MF = *MBB.getParent();
+  MachineRegisterInfo &MRI = MF.getRegInfo();
+
   if (!I.isPreISelOpcode()) {
     return true;
   }
 
   if (selectImpl(I, *CoverageInfo))
     return true;
 
+  using namespace TargetOpcode;
+
+  switch (I.getOpcode()) {
+  case G_IMPLICIT_DEF: {
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QuantumSegfault wrote:

How do you mean "generically"?

https://github.com/llvm/llvm-project/pull/190234