[llvm] 03b9c72 - [SPIR-V] Emit builtin variable OpVariable into entry block (#189958)

via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 3 04:18:53 PDT 2026


Author: Arseniy Obolenskiy
Date: 2026-04-03T13:18:48+02:00
New Revision: 03b9c7278ec632817b69c1f72de7ba04f13577cb

URL: https://github.com/llvm/llvm-project/commit/03b9c7278ec632817b69c1f72de7ba04f13577cb
DIFF: https://github.com/llvm/llvm-project/commit/03b9c7278ec632817b69c1f72de7ba04f13577cb.diff

LOG: [SPIR-V] Emit builtin variable OpVariable into entry block (#189958)

Added: 
    llvm/test/CodeGen/SPIRV/hlsl-intrinsics/builtin-var-dominance.ll
    llvm/test/CodeGen/SPIRV/transcoding/builtin-var-dominance.ll

Modified: 
    llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
    llvm/test/CodeGen/SPIRV/transcoding/OpGroupAsyncCopy.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
index fa5279c6869c8..50f672768f141 100644
--- a/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
+++ b/llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
@@ -834,7 +834,14 @@ Register SPIRVGlobalRegistry::buildGlobalVariable(
     return ResVReg;
   }
 
-  auto MIB = MIRBuilder.buildInstr(SPIRV::OpVariable)
+  // Emit the OpVariable into the entry block to ensure the def dominates
+  // all uses across all MBBs.
+  MachineBasicBlock &EntryBB = MIRBuilder.getMF().front();
+  MachineIRBuilder GVBuilder(MIRBuilder.getState());
+  if (&GVBuilder.getMBB() != &EntryBB)
+    GVBuilder.setInsertPt(EntryBB, EntryBB.getFirstTerminator());
+
+  auto MIB = GVBuilder.buildInstr(SPIRV::OpVariable)
                  .addDef(ResVReg)
                  .addUse(getSPIRVTypeID(BaseType))
                  .addImm(static_cast<uint32_t>(Storage));

diff  --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/builtin-var-dominance.ll b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/builtin-var-dominance.ll
new file mode 100644
index 0000000000000..019a808d13269
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/builtin-var-dominance.ll
@@ -0,0 +1,48 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-vulkan-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-unknown %s -o - -filetype=obj | spirv-val %}
+
+;; Verify correct translation when the same builtin is called from multiple
+;; non-entry blocks. The fix is validated by -verify-machineinstrs that fails
+;; if the OpVariable's VReg definition does not dominate all its uses in MIR.
+
+; CHECK-DAG: OpDecorate %[[#VarID:]] BuiltIn LocalInvocationId
+; CHECK-DAG: %[[#VarID]] = OpVariable %[[#]] Input
+
+define internal spir_func void @main_inner(<3 x i32> noundef %ID) {
+entry:
+  ret void
+}
+
+define void @main.1() #0 {
+entry:
+  %cmp = icmp sgt i32 1, 0
+  br i1 %cmp, label %then, label %else
+
+then:
+  %0 = call i32 @llvm.spv.thread.id.in.group.i32(i32 0)
+  %1 = insertelement <3 x i32> poison, i32 %0, i64 0
+  %2 = call i32 @llvm.spv.thread.id.in.group.i32(i32 1)
+  %3 = insertelement <3 x i32> %1, i32 %2, i64 1
+  %4 = call i32 @llvm.spv.thread.id.in.group.i32(i32 2)
+  %5 = insertelement <3 x i32> %3, i32 %4, i64 2
+  call void @main_inner(<3 x i32> %5)
+  br label %exit
+
+else:
+  %6 = call i32 @llvm.spv.thread.id.in.group.i32(i32 0)
+  %7 = insertelement <3 x i32> poison, i32 %6, i64 0
+  %8 = call i32 @llvm.spv.thread.id.in.group.i32(i32 1)
+  %9 = insertelement <3 x i32> %7, i32 %8, i64 1
+  %10 = call i32 @llvm.spv.thread.id.in.group.i32(i32 2)
+  %11 = insertelement <3 x i32> %9, i32 %10, i64 2
+  call void @main_inner(<3 x i32> %11)
+  br label %exit
+
+exit:
+  ret void
+}
+
+declare i32 @llvm.spv.thread.id.in.group.i32(i32) #1
+
+attributes #0 = { norecurse "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" }
+attributes #1 = { nounwind willreturn memory(none) }

diff  --git a/llvm/test/CodeGen/SPIRV/transcoding/OpGroupAsyncCopy.ll b/llvm/test/CodeGen/SPIRV/transcoding/OpGroupAsyncCopy.ll
index 3e68161105cc1..facab89b1ad1e 100644
--- a/llvm/test/CodeGen/SPIRV/transcoding/OpGroupAsyncCopy.ll
+++ b/llvm/test/CodeGen/SPIRV/transcoding/OpGroupAsyncCopy.ll
@@ -1,7 +1,6 @@
-; RUN: llc -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
-
-; TODO: This test currently fails with LLVM_ENABLE_EXPENSIVE_CHECKS enabled
-; XFAIL: expensive_checks
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; TODO: enable spirv-val: OpGroupAsyncCopy event arg needs OpTypeEvent, not OpTypePointer
+; RUNx: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
 
 ; CHECK-SPIRV-DAG: %[[#]] = OpGroupAsyncCopy %[[#]] %[[#Scope:]]
 ; CHECK-SPIRV-DAG: %[[#Scope]] = OpConstant %[[#]]

diff  --git a/llvm/test/CodeGen/SPIRV/transcoding/builtin-var-dominance.ll b/llvm/test/CodeGen/SPIRV/transcoding/builtin-var-dominance.ll
new file mode 100644
index 0000000000000..c1f60c1d73733
--- /dev/null
+++ b/llvm/test/CodeGen/SPIRV/transcoding/builtin-var-dominance.ll
@@ -0,0 +1,33 @@
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
+; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
+
+;; Verify correct translation when the same builtin is called from multiple
+;; non-entry blocks. The fix is validated by -verify-machineinstrs that fails
+;; if the OpVariable's VReg definition does not dominate all its uses in MIR.
+
+; CHECK-DAG: OpDecorate %[[#VarID:]] BuiltIn LocalInvocationId
+; CHECK-DAG: %[[#VarID]] = OpVariable %[[#]] Input
+
+define spir_kernel void @test(ptr addrspace(1) %out, i32 %n) {
+entry:
+  %cmp = icmp sgt i32 %n, 0
+  br i1 %cmp, label %then, label %else
+
+then:
+  %id0 = call spir_func i32 @_Z12get_local_idj(i32 0)
+  store i32 %id0, ptr addrspace(1) %out, align 4
+  br label %exit
+
+else:
+  %id1 = call spir_func i32 @_Z12get_local_idj(i32 0)
+  %neg = sub i32 0, %id1
+  store i32 %neg, ptr addrspace(1) %out, align 4
+  br label %exit
+
+exit:
+  ret void
+}
+
+declare spir_func i32 @_Z12get_local_idj(i32)


        


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