[llvm] [SLP][AMDGPU] Vectorize operands of non-trivially-vectorizable intrinsic calls (PR #189784)

[Syadus Sefat via llvm-commits]

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@@ -243,6 +243,39 @@ static const int MinScheduleRegionSize = 16;
 /// Maximum allowed number of operands in the PHI nodes.
 static const unsigned MaxPHINumOperands = 128;
 
+/// For instructions that are not trivially vectorizable, try to vectorize their
+/// operands.
+/// FIXME: Extend for all non-vectorized functions.
+static Value *getNonTriviallyVectorizableIntrinsicCallOperand(Value *V) {
+  auto *CI = dyn_cast<CallInst>(V);
+  if (!CI)
+    return nullptr;
+  Intrinsic::ID ID = CI->getIntrinsicID();
+  // Only consider intrinsic calls.
+  // FIXME: We may want to relax this condition in future.
+  if (ID == Intrinsic::not_intrinsic)
+    return nullptr;
+  // Skip trivially vectorizable intrinsics.
+  if (isTriviallyVectorizable(ID))
+    return nullptr;
+  // Only consider unary intrinsic calls.
+  if (CI->arg_size() != 1)
+    return nullptr;
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mssefat wrote:

Fixed, please check.

https://github.com/llvm/llvm-project/pull/189784