[llvm] [RISCV] Add scheduler definitions for XiangShan-KunMingHu (PR #148581)

[Craig Topper via llvm-commits]

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@@ -67,6 +67,7 @@ include "RISCVSchedSyntacoreSCR345.td"
 include "RISCVSchedSyntacoreSCR7.td"
 include "RISCVSchedTTAscalonX.td"
 include "RISCVSchedXiangShanNanHu.td"
+include "RISCVSchedXiangShanKunMingHu.td"
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topperc wrote:

Put this above RISCVSchedXiangShanNanHu.td to maintain alphabetical order

https://github.com/llvm/llvm-project/pull/148581