[clang] [llvm] RFC: Implementing new mechanism for hard register operands to inline asm as a constraint. (PR #85846)

[Tony Tao via llvm-commits]

tltao wrote:

I've updated the code to only allow multiple hard registers constraints (e.g. `{r1}{r2}`) but disallow mixing hard register constraints with other constraints (e.g. `{r1}r`), since there appears to be a few LIT tests such as the AMDGCN tests which checks for an error msg in such cases.

https://github.com/llvm/llvm-project/pull/85846