[llvm] [AMDGPU] Allow merging unordered and monotonic atomic loads in SILoadStoreOptimizer (PR #189932)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> Merging two 32 bit load atomic into a load atomic 64 bit at the IR level would require every backend to support a lock free 64 bit atomic load. 

No it wouldn't, it just requires target knowledge of the legal atomic sizes 


https://github.com/llvm/llvm-project/pull/189932