[llvm] [NFC][SelectionDAG] Refactor out common default `DemandedElts` calculation (PR #190031)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 1 12:54:19 PDT 2026
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-selectiondag
Author: zGoldthorpe
<details>
<summary>Changes</summary>
Deduplicating the repeated pattern
```cpp
APInt DemandedElts = VT.isFixedLengthVector()
? APInt::getAllOnes(VT.getVectorNumElements())
: APInt(1, 1);
```
in SelectionDAG.
---
Full diff: https://github.com/llvm/llvm-project/pull/190031.diff
1 Files Affected:
- (modified) llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (+26-85)
``````````diff
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index d269c54340538..351eb54357a52 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -1035,6 +1035,17 @@ static bool doNotCSE(SDNode *N) {
return false;
}
+/// Construct a DemandedElts mask which demands all elements of \p V.
+/// If \p V is not a fixed-length vector, then this will return a single bit.
+static APInt getDemandAllEltsMask(SDValue V) {
+ EVT VT = V.getValueType();
+ // Since the number of lanes in a scalable vector is unknown at compile time,
+ // we track one bit which is implicitly broadcast to all lanes. This means
+ // that all lanes in a scalable vector are considered demanded.
+ return VT.isFixedLengthVector() ? APInt::getAllOnes(VT.getVectorNumElements())
+ : APInt(1, 1);
+}
+
/// RemoveDeadNodes - This method deletes all unreachable nodes in the
/// SelectionDAG.
void SelectionDAG::RemoveDeadNodes() {
@@ -3275,10 +3286,7 @@ SelectionDAG::getValidShiftAmount(SDValue V, const APInt &DemandedElts,
std::optional<unsigned>
SelectionDAG::getValidShiftAmount(SDValue V, unsigned Depth) const {
- EVT VT = V.getValueType();
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorNumElements())
- : APInt(1, 1);
+ APInt DemandedElts = getDemandAllEltsMask(V);
return getValidShiftAmount(V, DemandedElts, Depth);
}
@@ -3296,10 +3304,7 @@ SelectionDAG::getValidMinimumShiftAmount(SDValue V, const APInt &DemandedElts,
std::optional<unsigned>
SelectionDAG::getValidMinimumShiftAmount(SDValue V, unsigned Depth) const {
- EVT VT = V.getValueType();
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorNumElements())
- : APInt(1, 1);
+ APInt DemandedElts = getDemandAllEltsMask(V);
return getValidMinimumShiftAmount(V, DemandedElts, Depth);
}
@@ -3317,10 +3322,7 @@ SelectionDAG::getValidMaximumShiftAmount(SDValue V, const APInt &DemandedElts,
std::optional<unsigned>
SelectionDAG::getValidMaximumShiftAmount(SDValue V, unsigned Depth) const {
- EVT VT = V.getValueType();
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorNumElements())
- : APInt(1, 1);
+ APInt DemandedElts = getDemandAllEltsMask(V);
return getValidMaximumShiftAmount(V, DemandedElts, Depth);
}
@@ -3328,14 +3330,7 @@ SelectionDAG::getValidMaximumShiftAmount(SDValue V, unsigned Depth) const {
/// them in Known. For vectors, the known bits are those that are shared by
/// every vector element.
KnownBits SelectionDAG::computeKnownBits(SDValue Op, unsigned Depth) const {
- EVT VT = Op.getValueType();
-
- // Since the number of lanes in a scalable vector is unknown at compile time,
- // we track one bit which is implicitly broadcast to all lanes. This means
- // that all lanes in a scalable vector are considered demanded.
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorNumElements())
- : APInt(1, 1);
+ APInt DemandedElts = getDemandAllEltsMask(Op);
return computeKnownBits(Op, DemandedElts, Depth);
}
@@ -4655,10 +4650,7 @@ SelectionDAG::computeOverflowForSignedMul(SDValue N0, SDValue N1) const {
ConstantRange SelectionDAG::computeConstantRange(SDValue Op, bool ForSigned,
unsigned Depth) const {
- EVT VT = Op.getValueType();
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorNumElements())
- : APInt(1, 1);
+ APInt DemandedElts = getDemandAllEltsMask(Op);
return computeConstantRange(Op, DemandedElts, ForSigned, Depth);
}
@@ -4692,12 +4684,7 @@ ConstantRange SelectionDAG::computeConstantRange(SDValue Op,
ConstantRange
SelectionDAG::computeConstantRangeIncludingKnownBits(SDValue Op, bool ForSigned,
unsigned Depth) const {
- EVT VT = Op.getValueType();
-
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorNumElements())
- : APInt(1, 1);
-
+ APInt DemandedElts = getDemandAllEltsMask(Op);
return computeConstantRangeIncludingKnownBits(Op, DemandedElts, ForSigned,
Depth);
}
@@ -4715,15 +4702,7 @@ ConstantRange SelectionDAG::computeConstantRangeIncludingKnownBits(
bool SelectionDAG::isKnownToBeAPowerOfTwo(SDValue Val, bool OrZero,
unsigned Depth) const {
- EVT VT = Val.getValueType();
-
- // Since the number of lanes in a scalable vector is unknown at compile time,
- // we track one bit which is implicitly broadcast to all lanes. This means
- // that all lanes in a scalable vector are considered demanded.
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorNumElements())
- : APInt(1, 1);
-
+ APInt DemandedElts = getDemandAllEltsMask(Val);
return isKnownToBeAPowerOfTwo(Val, DemandedElts, OrZero, Depth);
}
@@ -4904,14 +4883,7 @@ bool SelectionDAG::isKnownToBeAPowerOfTwoFP(SDValue Val, unsigned Depth) const {
}
unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const {
- EVT VT = Op.getValueType();
-
- // Since the number of lanes in a scalable vector is unknown at compile time,
- // we track one bit which is implicitly broadcast to all lanes. This means
- // that all lanes in a scalable vector are considered demanded.
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorNumElements())
- : APInt(1, 1);
+ APInt DemandedElts = getDemandAllEltsMask(Op);
return ComputeNumSignBits(Op, DemandedElts, Depth);
}
@@ -5629,10 +5601,7 @@ bool SelectionDAG::isGuaranteedNotToBeUndefOrPoison(SDValue Op, bool PoisonOnly,
if (Op.getOpcode() == ISD::FREEZE)
return true;
- EVT VT = Op.getValueType();
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorNumElements())
- : APInt(1, 1);
+ APInt DemandedElts = getDemandAllEltsMask(Op);
return isGuaranteedNotToBeUndefOrPoison(Op, DemandedElts, PoisonOnly, Depth);
}
@@ -5852,10 +5821,7 @@ bool SelectionDAG::isGuaranteedNotToBeUndefOrPoison(SDValue Op,
bool SelectionDAG::canCreateUndefOrPoison(SDValue Op, bool PoisonOnly,
bool ConsiderFlags,
unsigned Depth) const {
- EVT VT = Op.getValueType();
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorNumElements())
- : APInt(1, 1);
+ APInt DemandedElts = getDemandAllEltsMask(Op);
return canCreateUndefOrPoison(Op, DemandedElts, PoisonOnly, ConsiderFlags,
Depth);
}
@@ -6054,10 +6020,7 @@ bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
KnownFPClass SelectionDAG::computeKnownFPClass(SDValue Op,
FPClassTest InterestedClasses,
unsigned Depth) const {
- EVT VT = Op.getValueType();
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorNumElements())
- : APInt(1, 1);
+ APInt DemandedElts = getDemandAllEltsMask(Op);
return computeKnownFPClass(Op, DemandedElts, InterestedClasses, Depth);
}
@@ -6127,15 +6090,7 @@ KnownFPClass SelectionDAG::computeKnownFPClass(SDValue Op,
bool SelectionDAG::isKnownNeverNaN(SDValue Op, bool SNaN,
unsigned Depth) const {
- EVT VT = Op.getValueType();
-
- // Since the number of lanes in a scalable vector is unknown at compile time,
- // we track one bit which is implicitly broadcast to all lanes. This means
- // that all lanes in a scalable vector are considered demanded.
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorNumElements())
- : APInt(1, 1);
-
+ APInt DemandedElts = getDemandAllEltsMask(Op);
return isKnownNeverNaN(Op, DemandedElts, SNaN, Depth);
}
@@ -6342,15 +6297,7 @@ bool SelectionDAG::isKnownNeverZeroFloat(SDValue Op) const {
}
bool SelectionDAG::isKnownNeverZero(SDValue Op, unsigned Depth) const {
- EVT VT = Op.getValueType();
-
- // Since the number of lanes in a scalable vector is unknown at compile time,
- // we track one bit which is implicitly broadcast to all lanes. This means
- // that all lanes in a scalable vector are considered demanded.
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorNumElements())
- : APInt(1, 1);
-
+ APInt DemandedElts = getDemandAllEltsMask(Op);
return isKnownNeverZero(Op, DemandedElts, Depth);
}
@@ -13557,10 +13504,7 @@ bool llvm::isBitwiseNot(SDValue V, bool AllowUndefs) {
ConstantSDNode *llvm::isConstOrConstSplat(SDValue N, bool AllowUndefs,
bool AllowTruncation) {
- EVT VT = N.getValueType();
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorMinNumElements())
- : APInt(1, 1);
+ APInt DemandedElts = getDemandAllEltsMask(N);
return isConstOrConstSplat(N, DemandedElts, AllowUndefs, AllowTruncation);
}
@@ -13602,10 +13546,7 @@ ConstantSDNode *llvm::isConstOrConstSplat(SDValue N, const APInt &DemandedElts,
}
ConstantFPSDNode *llvm::isConstOrConstSplatFP(SDValue N, bool AllowUndefs) {
- EVT VT = N.getValueType();
- APInt DemandedElts = VT.isFixedLengthVector()
- ? APInt::getAllOnes(VT.getVectorMinNumElements())
- : APInt(1, 1);
+ APInt DemandedElts = getDemandAllEltsMask(N);
return isConstOrConstSplatFP(N, DemandedElts, AllowUndefs);
}
``````````
</details>
https://github.com/llvm/llvm-project/pull/190031
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