[llvm] [AMDGPU] Add stalls for DS FIFO buffer to coexec sched (PR #185726)

[Lucas Ramirez via llvm-commits]

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@@ -191,14 +201,32 @@ class HardwareUnitInfo {
 
   void setProducesCoexecWindow(bool Val) { ProducesCoexecWindow = Val; }
 
-  bool contains(SUnit *SU) const { return AllSUs.contains(SU); }
+  bool contains(SUnit *SU) { return AllSUs.contains(SU); }
+
+  void setBufferSize(unsigned Size) { BufferSize = Size; }
+
+  unsigned getBufferSize() { return BufferSize; }
+
+  /// \returns the next cycle where there is space in the buffer.
+  unsigned getBufferAvailableCycle(unsigned CurrCycle) {
+    // There is no buffer.
+    if (BufferSize <= 1)
+      return CurrCycle;
+
+    // Buffer is available now.
+    if (ScheduledSUs.size() < BufferSize)
+      return CurrCycle;
+
+    return BufferCycles +
+           ScheduledSUs[ScheduledSUs.size() - BufferSize]->TopReadyCycle;
+  }
 
   /// \returns true if there is a difference in priority between \p SU and \p
   /// Other. If so, \returns the SUnit with higher priority. This
   /// method looks through the PrioritySUs to determine if one SU is more
   /// prioritized than the other. If neither are in the PrioritySUs list, then
   /// neither have priority over each other.
-  SUnit *getHigherPriority(SUnit *SU, SUnit *Other) const {
+  SUnit *getHigherPriority(SUnit *SU, SUnit *Other) {
     for (auto *SUOrder : PrioritySUs) {
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lucas-rami wrote:

no auto

https://github.com/llvm/llvm-project/pull/185726