[llvm] [AVX-512] make vpternlogq more aggressive for longer chains of bitmanipulations (PR #189971)

via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 1 07:52:28 PDT 2026


github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/X86/X86FixupInstTuning.cpp llvm/lib/Target/X86/X86ISelDAGToDAG.cpp --diff_from_common_commit
``````````

:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index 8aa39032b..17c7d7dfe 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -4959,8 +4959,8 @@ bool X86DAGToDAGISel::tryVPTERNLOG(SDNode *N) {
   };
 
   auto ComputeTernlog = [&](SDValue Root, SDNode *OpaqueSubtree,
-                            SmallVectorImpl<LeafInfo> &Leaves,
-                            uint8_t &ImmOut, bool &TooManyLeaves) {
+                            SmallVectorImpl<LeafInfo> &Leaves, uint8_t &ImmOut,
+                            bool &TooManyLeaves) {
     TooManyLeaves = false;
 
     auto lookupLeaf = [&](SDValue Leaf) -> std::optional<uint8_t> {

``````````

</details>


https://github.com/llvm/llvm-project/pull/189971


More information about the llvm-commits mailing list