[llvm] [CHERIoT] Define a RISCV target feature for XCheriot. (PR #189968)

via llvm-commits llvm-commits at lists.llvm.org
Wed Apr 1 07:21:36 PDT 2026


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-risc-v

Author: Owen Anderson (resistor)

<details>
<summary>Changes</summary>

The specification for this extension is publically available here: https://github.com/CHERIoT-Platform/cheriot-sail/releases/download/v1.0/cheriot-architecture-v1.0.pdf

This change only adds the target feature, without adding any functionality gated by it yet. This change is intended to enable DataLayout-related changes in TargetParser, which depend on RISCVISAInfo being able at least to recognize the name of this extension.


---
Full diff: https://github.com/llvm/llvm-project/pull/189968.diff


1 Files Affected:

- (modified) llvm/lib/Target/RISCV/RISCVFeatures.td (+7) 


``````````diff
diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td
index 59525fb0a469e..a166524ad15ff 100644
--- a/llvm/lib/Target/RISCV/RISCVFeatures.td
+++ b/llvm/lib/Target/RISCV/RISCVFeatures.td
@@ -1750,6 +1750,13 @@ def HasXAIFET : Predicate<"Subtarget->hasXAIFET()">,
                           AssemblerPredicate<(all_of FeatureVendorXAIFET),
                           "'XAIFET' (AI Foundry ET Extension)">;
 
+def FeatureVendorXCheriot
+    : RISCVExtension<1, 0, "CHERIoT extension",
+    [FeatureStdExtC, FeatureStdExtE, FeatureStdExtM]>;
+def HasCheriot
+    : Predicate<"Subtarget->hasVendorXCheriot()">,
+      AssemblerPredicate<(all_of FeatureVendorXCheriot), "'XCheriot' (CHERIoT Extension)">;
+
 //===----------------------------------------------------------------------===//
 // LLVM specific features and extensions
 //===----------------------------------------------------------------------===//

``````````

</details>


https://github.com/llvm/llvm-project/pull/189968


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