[llvm] ab4b689 - [AMDGPU][SIFoldOperands] Fix OR -1 fold (#189655)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 1 05:37:42 PDT 2026
Author: Manuel Carrasco
Date: 2026-04-01T13:37:37+01:00
New Revision: ab4b689258c21c5e47d1a865b8b980e01395aac7
URL: https://github.com/llvm/llvm-project/commit/ab4b689258c21c5e47d1a865b8b980e01395aac7
DIFF: https://github.com/llvm/llvm-project/commit/ab4b689258c21c5e47d1a865b8b980e01395aac7.diff
LOG: [AMDGPU][SIFoldOperands] Fix OR -1 fold (#189655)
In SIFoldOperands, folding `or x, -1` to `v_mov_b32 -1` removed
`Src1Idx`, which is incorrect because `-1` is in `Src0Idx` (after
canonicalization).
Closes https://github.com/llvm/llvm-project/issues/189677.
Added:
Modified:
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
index a2fe31bd849c3..ac200cfd639e3 100644
--- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -1640,7 +1640,7 @@ bool SIFoldOperandsImpl::tryConstantFoldOp(MachineInstr *MI) const {
TII->mutateAndCleanupImplicit(*MI, TII->get(AMDGPU::COPY));
} else if (Src1Val == -1) {
// y = or x, -1 => y = v_mov_b32 -1
- MI->removeOperand(Src1Idx);
+ MI->removeOperand(Src0Idx);
TII->mutateAndCleanupImplicit(
*MI, TII->get(getMovOpc(Opc == AMDGPU::S_OR_B32)));
} else
diff --git a/llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir b/llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
index e7177a5e7160e..e843de15b90ec 100644
--- a/llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
+++ b/llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -verify-machineinstrs -run-pass si-fold-operands,dead-mi-elimination -o - %s | FileCheck -enable-var-scope -check-prefix=GCN %s
...
@@ -43,22 +44,11 @@ body: |
...
---
-# GCN-LABEL: name: v_fold_and_imm_regimm_32{{$}}
-# GCN: [[VAL0:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL0]],
-# GCN: [[VAL1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL1]],
-# GCN: [[VAL2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL2]],
-# GCN: [[VAL3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1234567, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL3]],
-# GCN: [[VAL4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL4]],
name: v_fold_and_imm_regimm_32
tracksRegLiveness: true
@@ -69,6 +59,30 @@ body: |
bb.0:
liveins: $sgpr0_sgpr1, $vgpr0
+ ; GCN-LABEL: name: v_fold_and_imm_regimm_32
+ ; GCN: liveins: $sgpr0_sgpr1, $vgpr0
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY1]], 36, 0
+ ; GCN-NEXT: [[V_ASHRREV_I32_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I32_e64 31, [[COPY]], implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.hi16, [[V_ASHRREV_I32_e64_]], %subreg.lo16
+ ; GCN-NEXT: [[V_LSHLREV_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHLREV_B64_e64 2, killed [[REG_SEQUENCE]], implicit $exec
+ ; GCN-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_LOAD_DWORDX2_IMM]].sub0, [[V_LSHLREV_B64_e64_]].sub0, implicit-def $vcc, implicit $exec
+ ; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+ ; GCN-NEXT: [[V_ADDC_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADDC_U32_e32 [[V_LSHLREV_B64_e64_]].sub1, [[COPY2]], implicit-def $vcc, implicit $vcc, implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e32_]], %subreg.hi16, killed [[V_ADDC_U32_e32_]], %subreg.lo16
+ ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_1]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 646, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_2]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1234567, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_3]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_4]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: S_ENDPGM 0
%3:vgpr_32 = COPY $vgpr0
%0:sgpr_64 = COPY $sgpr0_sgpr1
%4:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
@@ -104,9 +118,6 @@ body: |
...
---
-# GCN-LABEL: name: s_fold_shl_imm_regimm_32{{$}}
-# GCN: [[VAL:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
-# GCN: BUFFER_STORE_DWORD_OFFSET killed [[VAL]],
name: s_fold_shl_imm_regimm_32
tracksRegLiveness: true
@@ -116,6 +127,19 @@ body: |
bb.0:
liveins: $sgpr0_sgpr1
+ ; GCN-LABEL: name: s_fold_shl_imm_regimm_32
+ ; GCN: liveins: $sgpr0_sgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]], 36, 0
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+ ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub0
+ ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 61440
+ ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 -1
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[COPY2]], %subreg.hi16, killed [[COPY1]], %subreg.lo16, killed [[S_MOV_B32_1]], %subreg.sub0, killed [[S_MOV_B32_]], %subreg.sub0_sub1
+ ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
+ ; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed [[V_MOV_B32_e32_]], killed [[REG_SEQUENCE]], 0, 0, 0, 0, implicit $exec
+ ; GCN-NEXT: S_ENDPGM 0
%0:sgpr_64 = COPY $sgpr0_sgpr1
%4:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
%5:sreg_32_xm0_xexec = S_MOV_B32 1
@@ -132,9 +156,6 @@ body: |
...
---
-# GCN-LABEL: name: s_fold_ashr_imm_regimm_32{{$}}
-# GCN: [[VAL:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 243, implicit $exec
-# GCN: BUFFER_STORE_DWORD_OFFSET killed [[VAL]], killed %7,
name: s_fold_ashr_imm_regimm_32
tracksRegLiveness: true
liveins:
@@ -143,6 +164,19 @@ body: |
bb.0:
liveins: $sgpr0_sgpr1
+ ; GCN-LABEL: name: s_fold_ashr_imm_regimm_32
+ ; GCN: liveins: $sgpr0_sgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]], 36, 0
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+ ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub0
+ ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 61440
+ ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 -1
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[COPY2]], %subreg.hi16, killed [[COPY1]], %subreg.lo16, killed [[S_MOV_B32_1]], %subreg.sub0, killed [[S_MOV_B32_]], %subreg.sub0_sub1
+ ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 243, implicit $exec
+ ; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed [[V_MOV_B32_e32_]], killed [[REG_SEQUENCE]], 0, 0, 0, 0, implicit $exec
+ ; GCN-NEXT: S_ENDPGM 0
%0:sgpr_64 = COPY $sgpr0_sgpr1
%2:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
%3:sreg_32_xm0_xexec = S_MOV_B32 999123
@@ -256,9 +290,6 @@ body: |
...
---
-# GCN-LABEL: name: s_fold_lshr_imm_regimm_32{{$}}
-# GCN: [[VAL:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1048332, implicit $exec
-# GCN: BUFFER_STORE_DWORD_OFFSET killed [[VAL]], killed %7,
name: s_fold_lshr_imm_regimm_32
tracksRegLiveness: true
liveins:
@@ -267,6 +298,19 @@ body: |
bb.0:
liveins: $sgpr0_sgpr1
+ ; GCN-LABEL: name: s_fold_lshr_imm_regimm_32
+ ; GCN: liveins: $sgpr0_sgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]], 36, 0
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+ ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub0
+ ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 61440
+ ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 -1
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[COPY2]], %subreg.hi16, killed [[COPY1]], %subreg.lo16, killed [[S_MOV_B32_1]], %subreg.sub0, killed [[S_MOV_B32_]], %subreg.sub0_sub1
+ ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1048332, implicit $exec
+ ; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed [[V_MOV_B32_e32_]], killed [[REG_SEQUENCE]], 0, 0, 0, 0, implicit $exec
+ ; GCN-NEXT: S_ENDPGM 0
%0:sgpr_64 = COPY $sgpr0_sgpr1
%2:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
%3:sreg_32_xm0_xexec = S_MOV_B32 -999123
@@ -283,36 +327,15 @@ body: |
...
---
-# GCN-LABEL: name: v_fold_lshr_imm_regimm_32{{$}}
-# GCN: [[VAL0:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3903258, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL0]],
-# GCN: [[VAL1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 62452139, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL1]],
-# GCN: [[VAL2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1678031, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL2]],
-# GCN: [[VAL3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL3]],
-# GCN: [[VAL4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL4]],
-# GCN: [[VAL5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 62500, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL5]],
-# GCN: [[VAL6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 500000, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL6]],
-# GCN: [[VAL7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1920, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL7]],
-# GCN: [[VAL8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 487907, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL8]],
-# GCN: [[VAL9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741823, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, [[VAL9]],
name: v_fold_lshr_imm_regimm_32
tracksRegLiveness: true
@@ -323,6 +346,40 @@ body: |
bb.0:
liveins: $sgpr0_sgpr1, $vgpr0
+ ; GCN-LABEL: name: v_fold_lshr_imm_regimm_32
+ ; GCN: liveins: $sgpr0_sgpr1, $vgpr0
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY1]], 36, 0
+ ; GCN-NEXT: [[V_ASHRREV_I32_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I32_e64 31, [[COPY]], implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.hi16, [[V_ASHRREV_I32_e64_]], %subreg.lo16
+ ; GCN-NEXT: [[V_LSHLREV_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHLREV_B64_e64 2, killed [[REG_SEQUENCE]], implicit $exec
+ ; GCN-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_LOAD_DWORDX2_IMM]].sub0, [[V_LSHLREV_B64_e64_]].sub0, implicit-def $vcc, implicit $exec
+ ; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+ ; GCN-NEXT: [[V_ADDC_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADDC_U32_e32 [[V_LSHLREV_B64_e64_]].sub1, [[COPY2]], implicit-def $vcc, implicit $vcc, implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e32_]], %subreg.hi16, killed [[V_ADDC_U32_e32_]], %subreg.lo16
+ ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3903258, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 62452139, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_1]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1678031, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_2]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 3, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_3]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_4]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 62500, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_5]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 500000, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_6]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1920, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_7]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 487907, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_8]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1073741823, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_9]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: S_ENDPGM 0
%2:vgpr_32 = COPY $vgpr0
%0:sgpr_64 = COPY $sgpr0_sgpr1
%3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
@@ -381,14 +438,13 @@ body: |
# There is only an undef use operand for %1, so there is no
# corresponding defining instruction
-# GCN-LABEL: name: undefined_vreg_operand{{$}}
-# GCN: bb.0
-# GCN-NEXT: FLAT_STORE_DWORD undef %3:vreg_64, undef %2:vgpr_32,
-# GCN-NEXT: S_ENDPGM 0
name: undefined_vreg_operand
tracksRegLiveness: true
body: |
bb.0:
+ ; GCN-LABEL: name: undefined_vreg_operand
+ ; GCN: FLAT_STORE_DWORD undef %3:vreg_64, undef %2:vgpr_32, 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: S_ENDPGM 0
%0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
%2:vgpr_32 = V_XOR_B32_e64 killed %0, undef %1:vgpr_32, implicit $exec
FLAT_STORE_DWORD undef %3:vreg_64, %2, 0, 0, implicit $exec, implicit $flat_scr
@@ -397,12 +453,30 @@ body: |
...
---
# Make sure there is no crash if one of the operands is a physical register
-# GCN-LABEL: name: constant_fold_physreg_op{{$}}
-# GCN: %3:sreg_64 = S_AND_B64 $exec, 0, implicit-def dead $scc
name: constant_fold_physreg_op
tracksRegLiveness: true
body: |
+ ; GCN-LABEL: name: constant_fold_physreg_op
+ ; GCN: bb.0:
+ ; GCN-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; GCN-NEXT: liveins: $vgpr0, $sgpr4_sgpr5
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[DEF:%[0-9]+]]:sreg_64 = IMPLICIT_DEF
+ ; GCN-NEXT: [[SI_IF:%[0-9]+]]:sreg_64 = SI_IF killed [[DEF]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; GCN-NEXT: S_BRANCH %bb.1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: bb.1:
+ ; GCN-NEXT: successors: %bb.2(0x80000000)
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[S_AND_B64_:%[0-9]+]]:sreg_64 = S_AND_B64 $exec, 0, implicit-def dead $scc
+ ; GCN-NEXT: $vcc = COPY [[S_AND_B64_]]
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: bb.2:
+ ; GCN-NEXT: liveins: $vcc
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: SI_END_CF [[SI_IF]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
+ ; GCN-NEXT: S_ENDPGM 0, implicit $vcc
bb.0:
successors: %bb.1, %bb.3
liveins: $vgpr0, $sgpr4_sgpr5
@@ -423,9 +497,6 @@ body: |
...
---
-# GCN-LABEL: name: s_fold_andn2_imm_regimm_32{{$}}
-# GCN: [[VAL:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1233024, implicit $exec
-# GCN: BUFFER_STORE_DWORD_OFFSET killed [[VAL]],
name: s_fold_andn2_imm_regimm_32
tracksRegLiveness: true
liveins:
@@ -434,6 +505,19 @@ body: |
bb.0:
liveins: $sgpr0_sgpr1
+ ; GCN-LABEL: name: s_fold_andn2_imm_regimm_32
+ ; GCN: liveins: $sgpr0_sgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]], 36, 0
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+ ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub0
+ ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 61440
+ ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 -1
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[COPY1]], %subreg.sub0, killed [[COPY2]], %subreg.sub1, killed [[S_MOV_B32_]], %subreg.sub2, killed [[S_MOV_B32_1]], %subreg.sub3
+ ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1233024, implicit $exec
+ ; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed [[V_MOV_B32_e32_]], killed [[REG_SEQUENCE]], 0, 0, 0, 0, implicit $exec
+ ; GCN-NEXT: S_ENDPGM 0
%0:sgpr_64 = COPY $sgpr0_sgpr1
%1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
%2:sreg_32_xm0 = COPY %1.sub1
@@ -451,9 +535,6 @@ body: |
...
---
-# GCN-LABEL: name: s_fold_or_imm_regimm_32{{$}}
-# GCN: %10:vgpr_32 = V_MOV_B32_e32 1243023, implicit $exec
-# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
name: s_fold_or_imm_regimm_32
alignment: 0
exposesReturnsTwice: false
@@ -467,6 +548,19 @@ body: |
bb.0:
liveins: $sgpr0_sgpr1
+ ; GCN-LABEL: name: s_fold_or_imm_regimm_32
+ ; GCN: liveins: $sgpr0_sgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]], 36, 0
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+ ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub0
+ ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 61440
+ ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 -1
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[COPY1]], %subreg.sub0, killed [[COPY2]], %subreg.sub1, killed [[S_MOV_B32_]], %subreg.sub2, killed [[S_MOV_B32_1]], %subreg.sub3
+ ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1243023, implicit $exec
+ ; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed [[V_MOV_B32_e32_]], killed [[REG_SEQUENCE]], 0, 0, 0, 0, implicit $exec
+ ; GCN-NEXT: S_ENDPGM 0
%0:sgpr_64 = COPY $sgpr0_sgpr1
%1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
%2:sreg_32_xm0 = COPY %1.sub1
@@ -484,22 +578,11 @@ body: |
...
---
-# GCN-LABEL: name: v_fold_or_imm_regimm_32{{$}}
-# GCN: %14:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %14,
-# GCN: %15:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %15
-# GCN: %16:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %16,
-# GCN: %17:vgpr_32 = V_MOV_B32_e32 1234567, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %17,
-# GCN: %18:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %18,
name: v_fold_or_imm_regimm_32
alignment: 0
@@ -515,6 +598,30 @@ body: |
bb.0:
liveins: $sgpr0_sgpr1, $vgpr0
+ ; GCN-LABEL: name: v_fold_or_imm_regimm_32
+ ; GCN: liveins: $sgpr0_sgpr1, $vgpr0
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY1]], 36, 0
+ ; GCN-NEXT: [[V_ASHRREV_I32_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I32_e64 31, [[COPY]], implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[V_ASHRREV_I32_e64_]], %subreg.sub1
+ ; GCN-NEXT: [[V_LSHLREV_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHLREV_B64_e64 2, killed [[REG_SEQUENCE]], implicit $exec
+ ; GCN-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_LOAD_DWORDX2_IMM]].sub0, [[V_LSHLREV_B64_e64_]].sub0, implicit-def $vcc, implicit $exec
+ ; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+ ; GCN-NEXT: [[V_ADDC_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADDC_U32_e32 [[V_LSHLREV_B64_e64_]].sub1, [[COPY2]], implicit-def $vcc, implicit $vcc, implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e32_]], %subreg.sub0, killed [[V_ADDC_U32_e32_]], %subreg.sub1
+ ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_1]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1234903, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_2]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1234567, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_3]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 63, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_4]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: S_ENDPGM 0
%3:vgpr_32 = COPY $vgpr0
%0:sgpr_64 = COPY $sgpr0_sgpr1
%4:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
@@ -544,9 +651,6 @@ body: |
...
---
-# GCN-LABEL: name: s_fold_orn2_imm_regimm_32{{$}}
-# GCN: %10:vgpr_32 = V_MOV_B32_e32 -8457, implicit $exec
-# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
name: s_fold_orn2_imm_regimm_32
alignment: 0
exposesReturnsTwice: false
@@ -560,6 +664,19 @@ body: |
bb.0:
liveins: $sgpr0_sgpr1
+ ; GCN-LABEL: name: s_fold_orn2_imm_regimm_32
+ ; GCN: liveins: $sgpr0_sgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]], 36, 0
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+ ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub0
+ ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 61440
+ ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 -1
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[COPY1]], %subreg.sub0, killed [[COPY2]], %subreg.sub1, killed [[S_MOV_B32_]], %subreg.sub2, killed [[S_MOV_B32_1]], %subreg.sub3
+ ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -8457, implicit $exec
+ ; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed [[V_MOV_B32_e32_]], killed [[REG_SEQUENCE]], 0, 0, 0, 0, implicit $exec
+ ; GCN-NEXT: S_ENDPGM 0
%0:sgpr_64 = COPY $sgpr0_sgpr1
%1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
%2:sreg_32_xm0 = COPY %1.sub1
@@ -577,9 +694,6 @@ body: |
...
---
-# GCN-LABEL: name: s_fold_nand_imm_regimm_32{{$}}
-# GCN: %10:vgpr_32 = V_MOV_B32_e32 -1544, implicit $exec
-# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
name: s_fold_nand_imm_regimm_32
alignment: 0
exposesReturnsTwice: false
@@ -593,6 +707,19 @@ body: |
bb.0:
liveins: $sgpr0_sgpr1
+ ; GCN-LABEL: name: s_fold_nand_imm_regimm_32
+ ; GCN: liveins: $sgpr0_sgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]], 36, 0
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+ ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub0
+ ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 61440
+ ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 -1
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[COPY1]], %subreg.sub0, killed [[COPY2]], %subreg.sub1, killed [[S_MOV_B32_]], %subreg.sub2, killed [[S_MOV_B32_1]], %subreg.sub3
+ ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1544, implicit $exec
+ ; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed [[V_MOV_B32_e32_]], killed [[REG_SEQUENCE]], 0, 0, 0, 0, implicit $exec
+ ; GCN-NEXT: S_ENDPGM 0
%0:sgpr_64 = COPY $sgpr0_sgpr1
%1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
%2:sreg_32_xm0 = COPY %1.sub1
@@ -610,9 +737,6 @@ body: |
...
---
-# GCN-LABEL: name: s_fold_nor_imm_regimm_32{{$}}
-# GCN: %10:vgpr_32 = V_MOV_B32_e32 -1243024, implicit $exec
-# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
name: s_fold_nor_imm_regimm_32
alignment: 0
exposesReturnsTwice: false
@@ -626,6 +750,19 @@ body: |
bb.0:
liveins: $sgpr0_sgpr1
+ ; GCN-LABEL: name: s_fold_nor_imm_regimm_32
+ ; GCN: liveins: $sgpr0_sgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]], 36, 0
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+ ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub0
+ ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 61440
+ ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 -1
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[COPY1]], %subreg.sub0, killed [[COPY2]], %subreg.sub1, killed [[S_MOV_B32_]], %subreg.sub2, killed [[S_MOV_B32_1]], %subreg.sub3
+ ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1243024, implicit $exec
+ ; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed [[V_MOV_B32_e32_]], killed [[REG_SEQUENCE]], 0, 0, 0, 0, implicit $exec
+ ; GCN-NEXT: S_ENDPGM 0
%0:sgpr_64 = COPY $sgpr0_sgpr1
%1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
%2:sreg_32_xm0 = COPY %1.sub1
@@ -643,9 +780,6 @@ body: |
...
---
-# GCN-LABEL: name: s_fold_xnor_imm_regimm_32{{$}}
-# GCN: %10:vgpr_32 = V_MOV_B32_e32 -1241481, implicit $exec
-# GCN: BUFFER_STORE_DWORD_OFFSET killed %10,
name: s_fold_xnor_imm_regimm_32
alignment: 0
exposesReturnsTwice: false
@@ -659,6 +793,19 @@ body: |
bb.0:
liveins: $sgpr0_sgpr1
+ ; GCN-LABEL: name: s_fold_xnor_imm_regimm_32
+ ; GCN: liveins: $sgpr0_sgpr1
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY]], 36, 0
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+ ; GCN-NEXT: [[COPY2:%[0-9]+]]:sreg_32_xm0 = COPY [[S_LOAD_DWORDX2_IMM]].sub0
+ ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 61440
+ ; GCN-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 -1
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sgpr_128 = REG_SEQUENCE killed [[COPY1]], %subreg.sub0, killed [[COPY2]], %subreg.sub1, killed [[S_MOV_B32_]], %subreg.sub2, killed [[S_MOV_B32_1]], %subreg.sub3
+ ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1241481, implicit $exec
+ ; GCN-NEXT: BUFFER_STORE_DWORD_OFFSET killed [[V_MOV_B32_e32_]], killed [[REG_SEQUENCE]], 0, 0, 0, 0, implicit $exec
+ ; GCN-NEXT: S_ENDPGM 0
%0:sgpr_64 = COPY $sgpr0_sgpr1
%1:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0
%2:sreg_32_xm0 = COPY %1.sub1
@@ -676,37 +823,16 @@ body: |
...
---
-# GCN-LABEL: name: v_fold_shl_imm_regimm_32{{$}}
-# GCN: %16:vgpr_32 = V_MOV_B32_e32 40955904, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %16,
-# GCN: %17:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %17,
-# GCN: %18:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %18,
-# GCN: %19:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %19,
-# GCN: %20:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %20,
-# GCN: %21:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %21,
-# GCN: %22:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %22,
-# GCN: %23:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %23,
-# GCN: %24:vgpr_32 = V_MOV_B32_e32 7927808, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %24,
-# GCN: %25:vgpr_32 = V_MOV_B32_e32 -8, implicit $exec
-# GCN: FLAT_STORE_DWORD %10, %25,
name: v_fold_shl_imm_regimm_32
alignment: 0
@@ -722,6 +848,40 @@ body: |
bb.0:
liveins: $sgpr0_sgpr1, $vgpr0
+ ; GCN-LABEL: name: v_fold_shl_imm_regimm_32
+ ; GCN: liveins: $sgpr0_sgpr1, $vgpr0
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: [[COPY1:%[0-9]+]]:sgpr_64 = COPY $sgpr0_sgpr1
+ ; GCN-NEXT: [[S_LOAD_DWORDX2_IMM:%[0-9]+]]:sreg_64_xexec = S_LOAD_DWORDX2_IMM [[COPY1]], 36, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`, addrspace 4)
+ ; GCN-NEXT: [[V_ASHRREV_I32_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I32_e64 31, [[COPY]], implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[V_ASHRREV_I32_e64_]], %subreg.sub1
+ ; GCN-NEXT: [[V_LSHLREV_B64_e64_:%[0-9]+]]:vreg_64 = V_LSHLREV_B64_e64 2, killed [[REG_SEQUENCE]], implicit $exec
+ ; GCN-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_LOAD_DWORDX2_IMM]].sub0, [[V_LSHLREV_B64_e64_]].sub0, implicit-def $vcc, implicit $exec
+ ; GCN-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[S_LOAD_DWORDX2_IMM]].sub1
+ ; GCN-NEXT: [[V_ADDC_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADDC_U32_e32 [[V_LSHLREV_B64_e64_]].sub1, [[COPY2]], implicit-def $vcc, implicit $vcc, implicit $exec
+ ; GCN-NEXT: [[REG_SEQUENCE1:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ADD_CO_U32_e32_]], %subreg.sub0, killed [[V_ADDC_U32_e32_]], %subreg.sub1
+ ; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 40955904, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_1:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_1]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_2:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_2]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_3]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_4]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_5:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 4096, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_5]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_6:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_6]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_7:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 2, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_7]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_8:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 7927808, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_8]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: [[V_MOV_B32_e32_9:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -8, implicit $exec
+ ; GCN-NEXT: FLAT_STORE_DWORD [[REG_SEQUENCE1]], [[V_MOV_B32_e32_9]], 0, 0, implicit $exec, implicit $flat_scr
+ ; GCN-NEXT: S_ENDPGM 0
%2:vgpr_32 = COPY $vgpr0
%0:sgpr_64 = COPY $sgpr0_sgpr1
%3:sreg_64_xexec = S_LOAD_DWORDX2_IMM %0, 36, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) poison`, addrspace 4)
@@ -767,10 +927,6 @@ body: |
# materialized immediate.
---
-# GCN-LABEL: name: no_fold_sdwa_mov_imm
-# GCN: %2:vgpr_32 = V_MOV_B32_sdwa 0, %0, 0, 5, 2, 4, implicit $exec, implicit %0(tied-def 0)
-# GCN-NEXT: [[SHIFT:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 16, %2, implicit $exec
-# GCN-NEXT: S_ENDPGM 0, implicit [[SHIFT]]
name: no_fold_sdwa_mov_imm
alignment: 0
@@ -783,6 +939,13 @@ tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0
+ ; GCN-LABEL: name: no_fold_sdwa_mov_imm
+ ; GCN: liveins: $vgpr0
+ ; GCN-NEXT: {{ $}}
+ ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
+ ; GCN-NEXT: [[V_MOV_B32_sdwa:%[0-9]+]]:vgpr_32 = V_MOV_B32_sdwa 0, [[COPY]], 0, 5, 2, 4, implicit $exec, implicit [[COPY]](tied-def 0)
+ ; GCN-NEXT: [[V_LSHRREV_B32_e64_:%[0-9]+]]:vgpr_32 = V_LSHRREV_B32_e64 16, [[V_MOV_B32_sdwa]], implicit $exec
+ ; GCN-NEXT: S_ENDPGM 0, implicit [[V_LSHRREV_B32_e64_]]
%0:vgpr_32 = COPY $vgpr0
%1:vgpr_32 = V_MOV_B32_e32 16, implicit $exec
%2:vgpr_32 = V_MOV_B32_sdwa 0, %0:vgpr_32, 0, 5, 2, 4, implicit $exec, implicit %0:vgpr_32(tied-def 0)
@@ -983,3 +1146,16 @@ body: |
S_ENDPGM 0, implicit %4
...
+
+---
+name: fold_v_or_minus_one
+body: |
+ bb.0:
+ ; GCN-LABEL: name: fold_v_or_minus_one
+ ; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
+ ; GCN-NEXT: S_ENDPGM 0, implicit [[V_MOV_B32_e32_]]
+ %0:vgpr_32 = V_MOV_B32_e32 -1, implicit $exec
+ %1:vgpr_32 = IMPLICIT_DEF
+ %2:vgpr_32 = V_OR_B32_e64 %0, %1, implicit $exec
+ S_ENDPGM 0, implicit %2
+...
diff --git a/llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll b/llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
index 150f667ca4ebd..0691ae53d3bc5 100644
--- a/llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
+++ b/llvm/test/CodeGen/AMDGPU/constant-fold-mi-operands.ll
@@ -108,7 +108,7 @@ define amdgpu_kernel void @fold_mi_v_not_0(ptr addrspace(1) %out) {
; GCN: v_bcnt_u32_b32{{(_e32)*(_e64)*}} v[[RESULT_LO:[0-9]+]], v{{[0-9]+}}, v[[RESULT_LO]]{{$}}
; GCN-DAG: v_not_b32_e32 v[[RESULT_LO]], v[[RESULT_LO]]
; GCN-DAG: v_or_b32_e32 v[[RESULT_LO]], v[[VREG1_LO]], v[[RESULT_LO]]
-; GCN-DAG: v_mov_b32_e32 v[[RESULT_HI:[0-9]+]], v[[VREG1_HI]]
+; GCN-DAG: v_mov_b32_e32 v[[RESULT_HI:[0-9]+]], -1
; GCN: buffer_store_dwordx2 v[[[RESULT_LO]]:[[RESULT_HI]]]
define amdgpu_kernel void @fold_mi_or_neg1(ptr addrspace(1) %out) {
%vreg0 = load volatile i64, ptr addrspace(1) poison
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