[llvm] [X86][test] Add -combiner-topological-sorting to X86 CodeGen tests (NFC) (PR #189947)
Paweł Bylica via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 1 05:18:01 PDT 2026
https://github.com/chfast created https://github.com/llvm/llvm-project/pull/189947
Add -combiner-topological-sorting flag to llc invocations in 4299 X86 CodeGen tests that produce identical output with and without the flag.
681 tests with different output are excluded and tracked separately.
>From 3e239e56014cddfefc6710016f64550ec62d665a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Pawe=C5=82=20Bylica?= <pawel at hepcolgum.band>
Date: Wed, 1 Apr 2026 00:05:36 +0200
Subject: [PATCH] [X86][test] Add -combiner-topological-sorting to X86 CodeGen
tests (NFC)
Add -combiner-topological-sorting flag to llc invocations in 4299
X86 CodeGen tests that produce identical output with and without the
flag. This increases test coverage for the DAG combiner topological
sorting mode.
681 tests with different output are excluded and tracked separately.
---
.../X86/2003-08-03-CallArgLiveRanges.ll | 2 +-
.../CodeGen/X86/2003-08-23-DeadBlockTest.ll | 2 +-
.../test/CodeGen/X86/2003-11-03-GlobalBool.ll | 2 +-
.../X86/2004-02-13-FrameReturnAddress.ll | 2 +-
.../X86/2004-02-14-InefficientStackPointer.ll | 2 +-
llvm/test/CodeGen/X86/2004-02-22-Casts.ll | 2 +-
.../test/CodeGen/X86/2004-03-30-Select-Max.ll | 2 +-
.../CodeGen/X86/2004-04-13-FPCMOV-Crash.ll | 2 +-
.../CodeGen/X86/2004-06-10-StackifierCrash.ll | 2 +-
.../CodeGen/X86/2004-10-08-SelectSetCCFold.ll | 2 +-
.../test/CodeGen/X86/2005-01-17-CycleInDAG.ll | 2 +-
.../X86/2005-02-14-IllegalAssembler.ll | 2 +-
.../CodeGen/X86/2005-05-08-FPStackifierPHI.ll | 2 +-
.../CodeGen/X86/2006-01-19-ISelFoldingBug.ll | 2 +-
.../CodeGen/X86/2006-03-01-InstrSchedBug.ll | 2 +-
.../CodeGen/X86/2006-03-02-InstrSchedBug.ll | 2 +-
.../CodeGen/X86/2006-04-04-CrossBlockCrash.ll | 2 +-
.../CodeGen/X86/2006-04-27-ISelFoldingBug.ll | 2 +-
.../X86/2006-05-01-SchedCausingSpills.ll | 2 +-
.../CodeGen/X86/2006-05-02-InstrSched1.ll | 2 +-
.../CodeGen/X86/2006-05-02-InstrSched2.ll | 2 +-
.../X86/2006-05-08-CoalesceSubRegClass.ll | 2 +-
.../test/CodeGen/X86/2006-05-08-InstrSched.ll | 2 +-
.../test/CodeGen/X86/2006-05-11-InstrSched.ll | 2 +-
llvm/test/CodeGen/X86/2006-05-17-VectorArg.ll | 2 +-
llvm/test/CodeGen/X86/2006-05-22-FPSetEQ.ll | 2 +-
.../test/CodeGen/X86/2006-05-25-CycleInDAG.ll | 2 +-
.../X86/2006-07-10-InlineAsmAConstraint.ll | 2 +-
.../X86/2006-07-12-InlineAsmQConstraint.ll | 2 +-
llvm/test/CodeGen/X86/2006-07-20-InlineAsm.ll | 2 +-
.../2006-07-28-AsmPrint-Long-As-Pointer.ll | 2 +-
.../CodeGen/X86/2006-07-31-SingleRegClass.ll | 2 +-
.../test/CodeGen/X86/2006-08-07-CycleInDAG.ll | 2 +-
.../test/CodeGen/X86/2006-08-16-CycleInDAG.ll | 2 +-
.../CodeGen/X86/2006-08-21-ExtraMovInst.ll | 2 +-
.../test/CodeGen/X86/2006-09-01-CycleInDAG.ll | 2 +-
.../CodeGen/X86/2006-10-02-BoolRetCrash.ll | 2 +-
.../test/CodeGen/X86/2006-10-09-CycleInDAG.ll | 2 +-
.../X86/2006-10-10-FindModifiedNodeSlotBug.ll | 2 +-
.../test/CodeGen/X86/2006-10-12-CycleInDAG.ll | 2 +-
.../test/CodeGen/X86/2006-10-13-CycleInDAG.ll | 2 +-
.../2006-10-19-SwitchUnnecessaryBranching.ll | 2 +-
llvm/test/CodeGen/X86/2006-11-12-CSRetCC.ll | 2 +-
.../CodeGen/X86/2006-11-17-IllegalMove.ll | 2 +-
.../CodeGen/X86/2006-11-27-SelectLegalize.ll | 2 +-
.../CodeGen/X86/2006-12-16-InlineAsmCrash.ll | 2 +-
.../CodeGen/X86/2006-12-19-IntelSyntax.ll | 2 +-
.../test/CodeGen/X86/2007-01-08-InstrSched.ll | 2 +-
.../CodeGen/X86/2007-01-08-X86-64-Pointer.ll | 4 +-
.../CodeGen/X86/2007-01-13-StackPtrIndex.ll | 2 +-
.../CodeGen/X86/2007-01-29-InlineAsm-ir.ll | 2 +-
.../test/CodeGen/X86/2007-02-04-OrAddrMode.ll | 2 +-
.../test/CodeGen/X86/2007-02-16-BranchFold.ll | 2 +-
.../X86/2007-02-19-LiveIntervalAssert.ll | 2 +-
.../X86/2007-02-23-DAGCombine-Miscompile.ll | 2 +-
.../CodeGen/X86/2007-02-25-FastCCStack.ll | 2 +-
.../CodeGen/X86/2007-03-01-SpillerCrash.ll | 2 +-
.../CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll | 2 +-
llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll | 2 +-
.../X86/2007-03-18-LiveIntervalAssert.ll | 2 +-
.../2007-03-24-InlineAsmMultiRegConstraint.ll | 2 +-
.../X86/2007-03-24-InlineAsmPModifier.ll | 2 +-
.../X86/2007-03-24-InlineAsmVectorOp.ll | 2 +-
.../X86/2007-03-24-InlineAsmXConstraint.ll | 2 +-
.../CodeGen/X86/2007-03-26-CoalescerBug.ll | 2 +-
.../CodeGen/X86/2007-04-08-InlineAsmCrash.ll | 2 +-
.../X86/2007-04-11-InlineAsmVectorResult.ll | 2 +-
.../X86/2007-04-17-LiveIntervalAssert.ll | 2 +-
.../test/CodeGen/X86/2007-04-24-Huge-Stack.ll | 2 +-
.../CodeGen/X86/2007-04-24-VectorCrash.ll | 2 +-
.../X86/2007-04-27-InlineAsm-IntMemInput.ll | 2 +-
.../CodeGen/X86/2007-05-05-Personality.ll | 8 +-
.../CodeGen/X86/2007-05-05-VecCastExpand.ll | 2 +-
.../X86/2007-05-14-LiveIntervalAssert.ll | 2 +-
.../CodeGen/X86/2007-05-17-ShuffleISelBug.ll | 2 +-
.../X86/2007-06-04-X86-64-CtorAsmBugs.ll | 4 +-
.../CodeGen/X86/2007-06-28-X86-64-isel.ll | 2 +-
.../CodeGen/X86/2007-06-29-DAGCombinerBug.ll | 2 +-
.../X86/2007-06-29-VecFPConstantCSEBug.ll | 2 +-
.../test/CodeGen/X86/2007-07-03-GR64ToVR64.ll | 2 +-
.../CodeGen/X86/2007-07-10-StackerAssert.ll | 2 +-
.../CodeGen/X86/2007-07-18-Vector-Extract.ll | 4 +-
.../X86/2007-08-01-LiveVariablesBug.ll | 2 +-
.../X86/2007-08-09-IllegalX86-64Asm.ll | 2 +-
.../CodeGen/X86/2007-08-10-SignExtSubreg.ll | 2 +-
.../test/CodeGen/X86/2007-09-05-InvalidAsm.ll | 2 +-
.../CodeGen/X86/2007-09-06-ExtWeakAliasee.ll | 2 +-
.../CodeGen/X86/2007-09-27-LDIntrinsics.ll | 2 +-
.../CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll | 2 +-
.../X86/2007-10-12-CoalesceExtSubReg.ll | 2 +-
.../CodeGen/X86/2007-10-12-SpillerUnfold1.ll | 2 +-
.../CodeGen/X86/2007-10-12-SpillerUnfold2.ll | 2 +-
.../CodeGen/X86/2007-10-14-CoalescerCrash.ll | 2 +-
.../CodeGen/X86/2007-10-15-CoalescerCrash.ll | 2 +-
.../CodeGen/X86/2007-10-16-CoalescerCrash.ll | 2 +-
.../CodeGen/X86/2007-10-19-SpillerUnfold.ll | 2 +-
.../CodeGen/X86/2007-10-29-ExtendSetCC.ll | 2 +-
llvm/test/CodeGen/X86/2007-10-30-LSRCrash.ll | 2 +-
.../X86/2007-10-31-extractelement-i64.ll | 2 +-
llvm/test/CodeGen/X86/2007-11-01-ISelCrash.ll | 2 +-
.../X86/2007-11-03-x86-64-q-constraint.ll | 2 +-
.../X86/2007-11-04-LiveIntervalCrash.ll | 2 +-
.../X86/2007-11-04-LiveVariablesBug.ll | 2 +-
.../X86/2007-11-04-rip-immediate-constant.ll | 2 +-
.../test/CodeGen/X86/2007-11-06-InstrSched.ll | 2 +-
llvm/test/CodeGen/X86/2007-11-07-MulBy4.ll | 2 +-
.../CodeGen/X86/2007-11-30-LoadFolding-Bug.ll | 2 +-
.../CodeGen/X86/2007-12-16-BURRSchedCrash.ll | 2 +-
.../test/CodeGen/X86/2007-12-18-LoadCSEBug.ll | 2 +-
.../test/CodeGen/X86/2008-01-08-IllegalCMP.ll | 2 +-
.../CodeGen/X86/2008-01-08-SchedulerCrash.ll | 2 +-
.../CodeGen/X86/2008-01-09-LongDoubleSin.ll | 2 +-
.../X86/2008-01-16-FPStackifierAssert.ll | 2 +-
.../X86/2008-01-16-InvalidDAGCombineXform.ll | 2 +-
llvm/test/CodeGen/X86/2008-02-05-ISelCrash.ll | 2 +-
.../CodeGen/X86/2008-02-06-LoadFoldingBug.ll | 2 +-
.../CodeGen/X86/2008-02-14-BitMiscompile.ll | 2 +-
.../CodeGen/X86/2008-02-18-TailMergingBug.ll | 2 +-
.../X86/2008-02-20-InlineAsmClobber.ll | 2 +-
.../X86/2008-02-22-LocalRegAllocBug.ll | 2 +-
.../CodeGen/X86/2008-02-25-InlineAsmBug.ll | 2 +-
.../X86/2008-02-25-X86-64-CoalescerBug.ll | 2 +-
.../CodeGen/X86/2008-02-26-AsmDirectMemOp.ll | 2 +-
.../CodeGen/X86/2008-02-27-DeadSlotElimBug.ll | 2 +-
llvm/test/CodeGen/X86/2008-02-27-PEICrash.ll | 2 +-
.../CodeGen/X86/2008-03-06-frem-fpstack.ll | 2 +-
llvm/test/CodeGen/X86/2008-03-07-APIntBug.ll | 2 +-
.../CodeGen/X86/2008-03-10-RegAllocInfLoop.ll | 2 +-
.../X86/2008-03-12-ThreadLocalAlias.ll | 2 +-
.../X86/2008-03-13-TwoAddrPassCrash.ll | 2 +-
.../CodeGen/X86/2008-03-14-SpillerCrash.ll | 2 +-
.../CodeGen/X86/2008-03-19-DAGCombinerBug.ll | 2 +-
.../X86/2008-03-23-DarwinAsmComments.ll | 2 +-
.../CodeGen/X86/2008-03-25-TwoAddrPassBug.ll | 2 +-
.../X86/2008-03-31-SpillerFoldingBug.ll | 2 +-
llvm/test/CodeGen/X86/2008-04-02-unnamedEH.ll | 2 +-
.../CodeGen/X86/2008-04-08-CoalescerCrash.ll | 2 +-
.../CodeGen/X86/2008-04-09-BranchFolding.ll | 2 +-
.../CodeGen/X86/2008-04-15-LiveVariableBug.ll | 4 +-
.../CodeGen/X86/2008-04-16-CoalescerBug.ll | 2 +-
llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll | 2 +-
.../CodeGen/X86/2008-04-17-CoalescerBug.ll | 2 +-
llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll | 2 +-
.../X86/2008-04-24-pblendw-fold-crash.ll | 2 +-
.../X86/2008-04-26-Asm-Optimize-Imm.ll | 2 +-
.../CodeGen/X86/2008-04-28-CoalescerBug.ll | 2 +-
.../CodeGen/X86/2008-04-28-CyclicSchedUnit.ll | 2 +-
.../X86/2008-05-01-InvalidOrdCompare.ll | 2 +-
.../test/CodeGen/X86/2008-05-09-PHIElimBug.ll | 2 +-
.../X86/2008-05-09-ShuffleLoweringBug.ll | 2 +-
.../CodeGen/X86/2008-05-21-CoalescerBug.ll | 2 +-
.../X86/2008-05-22-FoldUnalignedLoad.ll | 2 +-
.../CodeGen/X86/2008-05-28-CoalescerBug.ll | 2 +-
.../X86/2008-05-28-LocalRegAllocBug.ll | 2 +-
.../X86/2008-06-13-NotVolatileLoadStore.ll | 4 +-
.../test/CodeGen/X86/2008-06-16-SubregsBug.ll | 2 +-
.../test/CodeGen/X86/2008-06-25-VecISelBug.ll | 2 +-
.../X86/2008-07-07-DanglingDeadInsts.ll | 2 +-
.../X86/2008-07-09-ELFSectionAttributes.ll | 2 +-
llvm/test/CodeGen/X86/2008-07-11-SHLBy1.ll | 2 +-
.../CodeGen/X86/2008-07-16-CoalescerCrash.ll | 2 +-
.../CodeGen/X86/2008-07-19-movups-spills.ll | 2 +-
.../CodeGen/X86/2008-07-22-CombinerCrash.ll | 2 +-
llvm/test/CodeGen/X86/2008-07-23-VSetCC.ll | 2 +-
llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll | 2 +-
.../CodeGen/X86/2008-08-06-RewriterBug.ll | 2 +-
.../CodeGen/X86/2008-08-17-UComiCodeGenBug.ll | 2 +-
.../CodeGen/X86/2008-08-23-64Bit-maskmovq.ll | 2 +-
.../CodeGen/X86/2008-08-31-EH_RETURN32.ll | 2 +-
.../CodeGen/X86/2008-08-31-EH_RETURN64.ll | 2 +-
.../CodeGen/X86/2008-09-05-sinttofp-2xi32.ll | 2 +-
.../CodeGen/X86/2008-09-09-LinearScanBug.ll | 2 +-
.../CodeGen/X86/2008-09-11-CoalescerBug.ll | 2 +-
.../CodeGen/X86/2008-09-11-CoalescerBug2.ll | 4 +-
.../CodeGen/X86/2008-09-17-inline-asm-1.ll | 4 +-
.../CodeGen/X86/2008-09-18-inline-asm-2.ll | 6 +-
.../CodeGen/X86/2008-09-19-RegAllocBug.ll | 2 +-
.../CodeGen/X86/2008-09-25-sseregparm-1.ll | 2 +-
.../CodeGen/X86/2008-09-26-FrameAddrBug.ll | 2 +-
llvm/test/CodeGen/X86/2008-09-29-ReMatBug.ll | 2 +-
.../CodeGen/X86/2008-09-29-VolatileBug.ll | 2 +-
.../CodeGen/X86/2008-10-06-x87ld-nan-1.ll | 2 +-
.../CodeGen/X86/2008-10-06-x87ld-nan-2.ll | 2 +-
.../test/CodeGen/X86/2008-10-07-SSEISelBug.ll | 2 +-
llvm/test/CodeGen/X86/2008-10-11-CallCrash.ll | 2 +-
.../CodeGen/X86/2008-10-13-CoalescerBug.ll | 2 +-
.../test/CodeGen/X86/2008-10-16-VecUnaryOp.ll | 2 +-
.../X86/2008-10-17-Asm64bitRConstraint.ll | 4 +-
.../CodeGen/X86/2008-10-20-AsmDoubleInI32.ll | 4 +-
.../CodeGen/X86/2008-10-24-FlippedCompare.ll | 2 +-
.../CodeGen/X86/2008-10-27-CoalescerBug.ll | 2 +-
.../CodeGen/X86/2008-10-29-ExpandVAARG.ll | 2 +-
llvm/test/CodeGen/X86/2008-11-03-F80VAARG.ll | 2 +-
llvm/test/CodeGen/X86/2008-11-06-testb.ll | 2 +-
.../CodeGen/X86/2008-11-13-inlineasm-3.ll | 2 +-
llvm/test/CodeGen/X86/2008-11-29-ULT-Sign.ll | 2 +-
.../CodeGen/X86/2008-12-01-SpillerAssert.ll | 2 +-
.../2008-12-01-loop-iv-used-outside-loop.ll | 2 +-
.../X86/2008-12-02-IllegalResultType.ll | 2 +-
.../CodeGen/X86/2008-12-02-dagcombine-2.ll | 2 +-
.../CodeGen/X86/2008-12-02-dagcombine-3.ll | 2 +-
.../CodeGen/X86/2008-12-16-dagcombine-4.ll | 2 +-
.../CodeGen/X86/2008-12-19-EarlyClobberBug.ll | 2 +-
.../CodeGen/X86/2008-12-22-dagcombine-5.ll | 2 +-
.../CodeGen/X86/2008-12-23-crazy-address.ll | 2 +-
.../CodeGen/X86/2008-12-23-dagcombine-6.ll | 2 +-
.../CodeGen/X86/2009-01-13-DoubleUpdate.ll | 2 +-
.../CodeGen/X86/2009-01-16-SchedulerBug.ll | 2 +-
llvm/test/CodeGen/X86/2009-01-16-UIntToFP.ll | 2 +-
.../X86/2009-01-18-ConstantExprCrash.ll | 2 +-
llvm/test/CodeGen/X86/2009-01-25-NoSSE.ll | 2 +-
.../test/CodeGen/X86/2009-01-26-WrongCheck.ll | 2 +-
.../CodeGen/X86/2009-01-27-NullStrings.ll | 2 +-
llvm/test/CodeGen/X86/2009-01-31-BigShift.ll | 2 +-
llvm/test/CodeGen/X86/2009-01-31-BigShift2.ll | 2 +-
llvm/test/CodeGen/X86/2009-01-31-BigShift3.ll | 2 +-
llvm/test/CodeGen/X86/2009-02-01-LargeMask.ll | 2 +-
.../CodeGen/X86/2009-02-03-AnalyzedTwice.ll | 2 +-
.../CodeGen/X86/2009-02-04-sext-i64-gep.ll | 2 +-
.../CodeGen/X86/2009-02-08-CoalescerBug.ll | 2 +-
.../X86/2009-02-09-ivs-different-sizes.ll | 2 +-
.../X86/2009-02-11-codegenprepare-reuse.ll | 2 +-
.../CodeGen/X86/2009-02-12-DebugInfoVLA.ll | 4 +-
.../2009-02-12-InlineAsm-nieZ-constraints.ll | 2 +-
.../test/CodeGen/X86/2009-02-12-SpillerBug.ll | 2 +-
.../X86/2009-02-21-ExtWeakInitializer.ll | 2 +-
.../test/CodeGen/X86/2009-02-25-CommuteBug.ll | 2 +-
.../CodeGen/X86/2009-02-26-MachineLICMBug.ll | 4 +-
llvm/test/CodeGen/X86/2009-03-03-BTHang.ll | 2 +-
.../X86/2009-03-03-BitcastLongDouble.ll | 2 +-
.../CodeGen/X86/2009-03-05-burr-list-crash.ll | 2 +-
.../test/CodeGen/X86/2009-03-09-APIntCrash.ll | 2 +-
.../test/CodeGen/X86/2009-03-09-SpillerBug.ll | 2 +-
.../CodeGen/X86/2009-03-10-CoalescerBug.ll | 2 +-
.../test/CodeGen/X86/2009-03-12-CPAlignBug.ll | 2 +-
.../test/CodeGen/X86/2009-03-13-PHIElimBug.ll | 2 +-
.../CodeGen/X86/2009-03-16-PHIElimInLPad.ll | 2 +-
.../CodeGen/X86/2009-03-23-LinearScanBug.ll | 2 +-
.../CodeGen/X86/2009-03-23-MultiUseSched.ll | 2 +-
llvm/test/CodeGen/X86/2009-03-25-TestBug.ll | 2 +-
.../CodeGen/X86/2009-03-26-NoImplicitFPBug.ll | 2 +-
.../X86/2009-04-12-FastIselOverflowCrash.ll | 4 +-
llvm/test/CodeGen/X86/2009-04-12-picrel.ll | 2 +-
.../CodeGen/X86/2009-04-13-2AddrAssert-2.ll | 2 +-
.../CodeGen/X86/2009-04-13-2AddrAssert.ll | 2 +-
.../CodeGen/X86/2009-04-14-IllegalRegs.ll | 2 +-
.../CodeGen/X86/2009-04-16-SpillerUnfold.ll | 2 +-
llvm/test/CodeGen/X86/2009-04-24.ll | 2 +-
.../CodeGen/X86/2009-04-25-CoalescerBug.ll | 2 +-
.../CodeGen/X86/2009-04-27-CoalescerAssert.ll | 2 +-
.../X86/2009-04-27-LiveIntervalsAssert.ll | 2 +-
.../X86/2009-04-27-LiveIntervalsAssert2.ll | 2 +-
.../CodeGen/X86/2009-04-29-LinearScanBug.ll | 2 +-
.../CodeGen/X86/2009-04-29-RegAllocAssert.ll | 2 +-
llvm/test/CodeGen/X86/2009-04-scale.ll | 2 +-
.../X86/2009-05-08-InlineAsmIOffset.ll | 2 +-
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.../X86/2009-05-23-available_externally.ll | 2 +-
.../X86/2009-05-23-dagcombine-shifts.ll | 2 +-
.../CodeGen/X86/2009-05-28-DAGCombineCrash.ll | 2 +-
llvm/test/CodeGen/X86/2009-05-30-ISelBug.ll | 2 +-
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.../X86/2009-06-03-Win64DisableRedZone.ll | 4 +-
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.../CodeGen/X86/2009-06-04-VirtualLiveIn.ll | 2 +-
.../CodeGen/X86/2009-06-05-VZextByteShort.ll | 2 +-
.../X86/2009-06-05-VariableIndexInsert.ll | 4 +-
.../CodeGen/X86/2009-06-05-sitofpCrash.ll | 2 +-
.../CodeGen/X86/2009-06-06-ConcatVectors.ll | 2 +-
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.../CodeGen/X86/2009-06-15-not-a-tail-call.ll | 2 +-
.../X86/2009-06-18-movlp-shuffle-register.ll | 2 +-
.../CodeGen/X86/2009-07-06-TwoAddrAssert.ll | 2 +-
llvm/test/CodeGen/X86/2009-07-07-SplitICmp.ll | 2 +-
.../X86/2009-07-09-ExtractBoolFromVector.ll | 2 +-
.../CodeGen/X86/2009-07-15-CoalescerBug.ll | 2 +-
.../CodeGen/X86/2009-07-16-CoalescerBug.ll | 2 +-
.../X86/2009-07-19-AsmExtraOperands.ll | 2 +-
.../CodeGen/X86/2009-07-20-CoalescerBug.ll | 2 +-
.../CodeGen/X86/2009-07-20-DAGCombineBug.ll | 2 +-
.../X86/2009-08-06-branchfolder-crash.ll | 2 +-
llvm/test/CodeGen/X86/2009-08-08-CastError.ll | 2 +-
llvm/test/CodeGen/X86/2009-08-12-badswitch.ll | 2 +-
.../X86/2009-08-14-Win64MemoryIndirectArg.ll | 2 +-
.../X86/2009-08-19-LoadNarrowingMiscompile.ll | 2 +-
.../CodeGen/X86/2009-08-23-SubRegReuseUndo.ll | 2 +-
.../CodeGen/X86/2009-09-10-LoadFoldingBug.ll | 2 +-
.../CodeGen/X86/2009-09-10-SpillComments.ll | 2 +-
.../CodeGen/X86/2009-09-16-CoalescerBug.ll | 2 +-
.../CodeGen/X86/2009-09-19-earlyclobber.ll | 2 +-
.../X86/2009-09-21-NoSpillLoopCount.ll | 2 +-
.../CodeGen/X86/2009-09-22-CoalescerBug.ll | 2 +-
.../X86/2009-09-23-LiveVariablesBug.ll | 2 +-
.../X86/2009-10-14-LiveVariablesBug.ll | 2 +-
llvm/test/CodeGen/X86/2009-10-16-Scope.ll | 2 +-
.../CodeGen/X86/2009-10-19-EmergencySpill.ll | 2 +-
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llvm/test/CodeGen/X86/avx512-vselect.ll | 4 +-
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llvm/test/CodeGen/X86/avx512bw-vec-cmp.ll | 2 +-
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llvm/test/CodeGen/X86/clear-highbits.ll | 20 +-
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llvm/test/CodeGen/X86/cmov-fp.ll | 8 +-
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llvm/test/CodeGen/X86/cmp-fast-isel.ll | 2 +-
llvm/test/CodeGen/X86/cmp-merge.ll | 4 +-
llvm/test/CodeGen/X86/cmp-xor.ll | 4 +-
llvm/test/CodeGen/X86/cmp16.ll | 32 +--
llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll | 4 +-
llvm/test/CodeGen/X86/cmpf-avx.ll | 4 +-
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llvm/test/CodeGen/X86/cmpxchg-i1.ll | 2 +-
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llvm/test/CodeGen/X86/cmpxchg8b.ll | 10 +-
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llvm/test/CodeGen/X86/coal-sections.ll | 2 +-
llvm/test/CodeGen/X86/coalesce-esp.ll | 2 +-
llvm/test/CodeGen/X86/coalesce-implicitdef.ll | 2 +-
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llvm/test/CodeGen/X86/coalescer-commute1.ll | 2 +-
llvm/test/CodeGen/X86/coalescer-commute2.ll | 2 +-
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llvm/test/CodeGen/X86/coalescer-commute4.ll | 2 +-
llvm/test/CodeGen/X86/coalescer-commute5.ll | 2 +-
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llvm/test/CodeGen/X86/coalescer-dce.ll | 2 +-
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llvm/test/CodeGen/X86/coalescer-identity.ll | 2 +-
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llvm/test/CodeGen/X86/coalescer-win64.ll | 2 +-
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llvm/test/CodeGen/X86/code-model-elf.ll | 32 +--
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llvm/test/CodeGen/X86/coff-alias-type.ll | 2 +-
llvm/test/CodeGen/X86/coff-comdat.ll | 2 +-
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llvm/test/CodeGen/X86/combine-fnearbyint.ll | 8 +-
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llvm/test/CodeGen/X86/cpus-amd.ll | 58 ++---
llvm/test/CodeGen/X86/cpus-intel-no-x86_64.ll | 32 +--
llvm/test/CodeGen/X86/cpus-intel.ll | 216 +++++++++---------
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llvm/test/CodeGen/X86/dollar-name.ll | 6 +-
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llvm/test/CodeGen/X86/dwarf-headers.ll | 8 +-
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llvm/test/CodeGen/X86/emutls-pic.ll | 24 +-
llvm/test/CodeGen/X86/emutls-pie.ll | 18 +-
llvm/test/CodeGen/X86/emutls.ll | 18 +-
llvm/test/CodeGen/X86/emutls_generic.ll | 18 +-
llvm/test/CodeGen/X86/enqcmd-intrinsics.ll | 8 +-
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llvm/test/CodeGen/X86/equiv_with_fndef.ll | 2 +-
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llvm/test/CodeGen/X86/exp10-libcall-names.ll | 26 +--
llvm/test/CodeGen/X86/exp10-libcall.ll | 4 +-
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llvm/test/CodeGen/X86/extract-store.ll | 16 +-
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llvm/test/CodeGen/X86/scalar-fp-to-i32.ll | 48 ++--
llvm/test/CodeGen/X86/scalar-fp-to-i64.ll | 44 ++--
llvm/test/CodeGen/X86/scalar-int-to-fp.ll | 20 +-
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llvm/test/CodeGen/X86/segmented-stacks.ll | 46 ++--
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llvm/test/CodeGen/X86/slow-pmullq.ll | 8 +-
llvm/test/CodeGen/X86/slow-unaligned-mem.ll | 92 ++++----
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llvm/test/CodeGen/X86/sse-insertelt.ll | 8 +-
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llvm/test/CodeGen/X86/sse-intrinsics-x86.ll | 12 +-
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llvm/test/CodeGen/X86/trunc-ext-ld-st.ll | 4 +-
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llvm/test/CodeGen/X86/trunc-subvector.ll | 8 +-
llvm/test/CodeGen/X86/trunc-to-bool.ll | 2 +-
llvm/test/CodeGen/X86/tsxldtrk-intrinsic.ll | 6 +-
.../X86/tuning-shuffle-permilpd-avx512.ll | 14 +-
.../CodeGen/X86/tuning-shuffle-permilpd.ll | 16 +-
.../X86/tuning-shuffle-permilps-avx512.ll | 14 +-
.../CodeGen/X86/tuning-shuffle-permilps.ll | 16 +-
.../X86/tuning-shuffle-unpckpd-avx512.ll | 16 +-
.../CodeGen/X86/tuning-shuffle-unpckpd.ll | 12 +-
.../X86/tuning-shuffle-unpckps-avx512.ll | 16 +-
.../CodeGen/X86/tuning-shuffle-unpckps.ll | 12 +-
llvm/test/CodeGen/X86/twoaddr-coalesce-2.ll | 2 +-
llvm/test/CodeGen/X86/twoaddr-coalesce-3.ll | 2 +-
llvm/test/CodeGen/X86/twoaddr-coalesce.ll | 2 +-
llvm/test/CodeGen/X86/twoaddr-lea.ll | 2 +-
.../CodeGen/X86/twoaddr-sink-terminator.ll | 2 +-
llvm/test/CodeGen/X86/typeid-alias.ll | 2 +-
llvm/test/CodeGen/X86/uadd_sat.ll | 4 +-
llvm/test/CodeGen/X86/uadd_sat_plus.ll | 4 +-
llvm/test/CodeGen/X86/uadd_sat_vec.ll | 18 +-
llvm/test/CodeGen/X86/ubsan-trap-merge.ll | 2 +-
llvm/test/CodeGen/X86/ubsan-trap-nomerge.ll | 2 +-
llvm/test/CodeGen/X86/ubsantrap.ll | 6 +-
.../CodeGen/X86/udiv-const-optimization.ll | 6 +-
llvm/test/CodeGen/X86/udiv-exact.ll | 4 +-
llvm/test/CodeGen/X86/udivmodei5.ll | 4 +-
llvm/test/CodeGen/X86/uefi-fastcc.ll | 4 +-
llvm/test/CodeGen/X86/uint64-to-float.ll | 8 +-
llvm/test/CodeGen/X86/uint_to_fp-2.ll | 2 +-
llvm/test/CodeGen/X86/uint_to_fp-3.ll | 8 +-
llvm/test/CodeGen/X86/uint_to_fp.ll | 4 +-
llvm/test/CodeGen/X86/uint_to_half.ll | 6 +-
llvm/test/CodeGen/X86/uintr-intrinsics.ll | 4 +-
.../X86/umin-sub-to-usubo-select-combine.ll | 2 +-
llvm/test/CodeGen/X86/umin.ll | 8 +-
llvm/test/CodeGen/X86/umul-with-carry.ll | 2 +-
llvm/test/CodeGen/X86/umul_fix_sat.ll | 4 +-
.../X86/umulo-128-legalisation-lowering.ll | 4 +-
.../X86/umulo-64-legalisation-lowering.ll | 2 +-
.../CodeGen/X86/unaligned-32-byte-memops.ll | 6 +-
llvm/test/CodeGen/X86/unaligned-load.ll | 6 +-
.../CodeGen/X86/unaligned-spill-folding.ll | 6 +-
...igned_extract_from_vector_through_stack.ll | 2 +-
llvm/test/CodeGen/X86/undef-globals-bss.ll | 2 +-
llvm/test/CodeGen/X86/undef-label.ll | 2 +-
llvm/test/CodeGen/X86/undef-ops.ll | 2 +-
llvm/test/CodeGen/X86/unknown-location.ll | 2 +-
llvm/test/CodeGen/X86/unpredictable-brcond.ll | 2 +-
.../CodeGen/X86/unreachable-loop-sinking.ll | 2 +-
llvm/test/CodeGen/X86/unreachable-trap.ll | 26 +--
.../test/CodeGen/X86/unreachable-ubsantrap.ll | 12 +-
llvm/test/CodeGen/X86/unused_stackslots.ll | 2 +-
llvm/test/CodeGen/X86/unwind-init.ll | 4 +-
.../CodeGen/X86/unwind-inline-asm-codegen.ll | 2 +-
llvm/test/CodeGen/X86/unwindraise.ll | 2 +-
.../CodeGen/X86/update-terminator-debugloc.ll | 2 +-
llvm/test/CodeGen/X86/urem-i8-constant.ll | 2 +-
llvm/test/CodeGen/X86/urem-lkk.ll | 2 +-
llvm/test/CodeGen/X86/urem-power-of-two.ll | 4 +-
llvm/test/CodeGen/X86/urem-vector-lkk.ll | 10 +-
llvm/test/CodeGen/X86/use-add-flags.ll | 4 +-
.../X86/use-cr-result-of-dom-icmp-st.ll | 4 +-
llvm/test/CodeGen/X86/usermsr-intrinsics.ll | 4 +-
llvm/test/CodeGen/X86/usub_sat.ll | 4 +-
llvm/test/CodeGen/X86/usub_sat_plus.ll | 4 +-
llvm/test/CodeGen/X86/utf16-cfstrings.ll | 2 +-
llvm/test/CodeGen/X86/utf8.ll | 2 +-
llvm/test/CodeGen/X86/uwtables.ll | 2 +-
llvm/test/CodeGen/X86/v2f32.ll | 4 +-
llvm/test/CodeGen/X86/v4f32-immediate.ll | 4 +-
llvm/test/CodeGen/X86/v4i32load-crash.ll | 4 +-
llvm/test/CodeGen/X86/vaargs-prolog-insert.ll | 2 +-
llvm/test/CodeGen/X86/vaargs-win32.ll | 4 +-
llvm/test/CodeGen/X86/vaargs.ll | 2 +-
.../CodeGen/X86/vaes-intrinsics-avx-x86.ll | 2 +-
.../CodeGen/X86/vaes-intrinsics-avx512-x86.ll | 2 +-
.../X86/vaes-intrinsics-avx512vl-x86.ll | 2 +-
llvm/test/CodeGen/X86/var-permute-256.ll | 22 +-
.../test/CodeGen/X86/vararg-callee-cleanup.ll | 2 +-
llvm/test/CodeGen/X86/vararg_no_start.ll | 4 +-
llvm/test/CodeGen/X86/vararg_tailcall.ll | 4 +-
llvm/test/CodeGen/X86/varargs-softfloat.ll | 2 +-
.../X86/variable-sized-darwin-bzero.ll | 2 +-
llvm/test/CodeGen/X86/variadic-node-pic.ll | 2 +-
llvm/test/CodeGen/X86/vbinop-simplify-bug.ll | 2 +-
llvm/test/CodeGen/X86/vec-2bit-int.ll | 2 +-
llvm/test/CodeGen/X86/vec-copysign-avx512.ll | 4 +-
llvm/test/CodeGen/X86/vec-copysign.ll | 4 +-
llvm/test/CodeGen/X86/vec-libcalls.ll | 2 +-
.../CodeGen/X86/vec-loadsingles-alignment.ll | 2 +-
llvm/test/CodeGen/X86/vec-strict-128-fp16.ll | 4 +-
llvm/test/CodeGen/X86/vec-strict-128.ll | 12 +-
llvm/test/CodeGen/X86/vec-strict-256-fp16.ll | 4 +-
llvm/test/CodeGen/X86/vec-strict-256.ll | 8 +-
llvm/test/CodeGen/X86/vec-strict-512-fp16.ll | 4 +-
llvm/test/CodeGen/X86/vec-strict-512.ll | 4 +-
.../CodeGen/X86/vec-strict-cmp-128-fp16.ll | 4 +-
llvm/test/CodeGen/X86/vec-strict-cmp-128.ll | 16 +-
.../CodeGen/X86/vec-strict-cmp-256-fp16.ll | 4 +-
llvm/test/CodeGen/X86/vec-strict-cmp-256.ll | 12 +-
.../CodeGen/X86/vec-strict-cmp-512-fp16.ll | 4 +-
.../CodeGen/X86/vec-strict-cmp-512-skx.ll | 2 +-
llvm/test/CodeGen/X86/vec-strict-cmp-512.ll | 4 +-
.../test/CodeGen/X86/vec-strict-cmp-sub128.ll | 16 +-
.../X86/vec-strict-fptoint-128-fp16.ll | 6 +-
.../CodeGen/X86/vec-strict-fptoint-128.ll | 24 +-
.../X86/vec-strict-fptoint-256-fp16.ll | 6 +-
.../CodeGen/X86/vec-strict-fptoint-256.ll | 20 +-
.../X86/vec-strict-fptoint-512-fp16.ll | 4 +-
.../CodeGen/X86/vec-strict-fptoint-512.ll | 8 +-
.../X86/vec-strict-inttofp-128-fp16.ll | 4 +-
.../CodeGen/X86/vec-strict-inttofp-128.ll | 28 +--
.../X86/vec-strict-inttofp-256-fp16.ll | 4 +-
.../X86/vec-strict-inttofp-512-fp16.ll | 4 +-
.../CodeGen/X86/vec-strict-inttofp-512.ll | 8 +-
llvm/test/CodeGen/X86/vec-strict-round-128.ll | 12 +-
llvm/test/CodeGen/X86/vec-trunc-store.ll | 2 +-
llvm/test/CodeGen/X86/vec3-setcc-crash.ll | 4 +-
llvm/test/CodeGen/X86/vec3.ll | 2 +-
llvm/test/CodeGen/X86/vec_align.ll | 2 +-
llvm/test/CodeGen/X86/vec_align_i256.ll | 2 +-
llvm/test/CodeGen/X86/vec_anyext.ll | 4 +-
llvm/test/CodeGen/X86/vec_call.ll | 2 +-
llvm/test/CodeGen/X86/vec_cast.ll | 4 +-
llvm/test/CodeGen/X86/vec_cast2.ll | 2 +-
llvm/test/CodeGen/X86/vec_cast3.ll | 2 +-
llvm/test/CodeGen/X86/vec_cmp_sint-128.ll | 18 +-
llvm/test/CodeGen/X86/vec_cmp_uint-128.ll | 18 +-
llvm/test/CodeGen/X86/vec_compare-sse4.ll | 6 +-
llvm/test/CodeGen/X86/vec_compare.ll | 2 +-
llvm/test/CodeGen/X86/vec_ctbits.ll | 2 +-
llvm/test/CodeGen/X86/vec_ext_inreg.ll | 6 +-
llvm/test/CodeGen/X86/vec_extract-avx.ll | 4 +-
llvm/test/CodeGen/X86/vec_extract-mmx.ll | 4 +-
llvm/test/CodeGen/X86/vec_extract-sse4.ll | 4 +-
llvm/test/CodeGen/X86/vec_fabs.ll | 24 +-
llvm/test/CodeGen/X86/vec_fcopysign.ll | 24 +-
llvm/test/CodeGen/X86/vec_floor.ll | 8 +-
llvm/test/CodeGen/X86/vec_fneg.ll | 24 +-
llvm/test/CodeGen/X86/vec_fp_to_int.ll | 20 +-
llvm/test/CodeGen/X86/vec_fptrunc.ll | 8 +-
llvm/test/CodeGen/X86/vec_i64.ll | 4 +-
llvm/test/CodeGen/X86/vec_ins_extract-1.ll | 4 +-
llvm/test/CodeGen/X86/vec_ins_extract.ll | 2 +-
llvm/test/CodeGen/X86/vec_insert-2.ll | 4 +-
llvm/test/CodeGen/X86/vec_insert-3.ll | 4 +-
llvm/test/CodeGen/X86/vec_insert-4.ll | 4 +-
llvm/test/CodeGen/X86/vec_insert-5.ll | 6 +-
llvm/test/CodeGen/X86/vec_insert-7.ll | 4 +-
llvm/test/CodeGen/X86/vec_insert-8.ll | 4 +-
llvm/test/CodeGen/X86/vec_insert-9.ll | 4 +-
llvm/test/CodeGen/X86/vec_insert-mmx.ll | 4 +-
llvm/test/CodeGen/X86/vec_loadsingles.ll | 4 +-
llvm/test/CodeGen/X86/vec_logical.ll | 4 +-
llvm/test/CodeGen/X86/vec_minmax_match.ll | 2 +-
llvm/test/CodeGen/X86/vec_minmax_sint.ll | 14 +-
llvm/test/CodeGen/X86/vec_minmax_uint.ll | 14 +-
llvm/test/CodeGen/X86/vec_no-common-bits.ll | 2 +-
llvm/test/CodeGen/X86/vec_partial.ll | 4 +-
llvm/test/CodeGen/X86/vec_reassociate.ll | 4 +-
llvm/test/CodeGen/X86/vec_return.ll | 2 +-
llvm/test/CodeGen/X86/vec_sdiv_to_shift.ll | 6 +-
llvm/test/CodeGen/X86/vec_set-2.ll | 4 +-
llvm/test/CodeGen/X86/vec_set-3.ll | 4 +-
llvm/test/CodeGen/X86/vec_set-4.ll | 4 +-
llvm/test/CodeGen/X86/vec_set-6.ll | 4 +-
llvm/test/CodeGen/X86/vec_set-7.ll | 4 +-
llvm/test/CodeGen/X86/vec_set-8.ll | 4 +-
llvm/test/CodeGen/X86/vec_set-A.ll | 4 +-
llvm/test/CodeGen/X86/vec_set-B.ll | 4 +-
llvm/test/CodeGen/X86/vec_set-C.ll | 4 +-
llvm/test/CodeGen/X86/vec_set-D.ll | 2 +-
llvm/test/CodeGen/X86/vec_set-F.ll | 2 +-
llvm/test/CodeGen/X86/vec_set-H.ll | 2 +-
llvm/test/CodeGen/X86/vec_set.ll | 4 +-
llvm/test/CodeGen/X86/vec_setcc-2.ll | 4 +-
llvm/test/CodeGen/X86/vec_shift.ll | 4 +-
llvm/test/CodeGen/X86/vec_shift2.ll | 4 +-
llvm/test/CodeGen/X86/vec_shift3.ll | 4 +-
llvm/test/CodeGen/X86/vec_shift4.ll | 4 +-
llvm/test/CodeGen/X86/vec_shift6.ll | 8 +-
llvm/test/CodeGen/X86/vec_shift7.ll | 4 +-
llvm/test/CodeGen/X86/vec_shuf-insert.ll | 2 +-
llvm/test/CodeGen/X86/vec_split.ll | 6 +-
llvm/test/CodeGen/X86/vec_ss_load_fold.ll | 12 +-
llvm/test/CodeGen/X86/vec_trunc_sext.ll | 4 +-
.../CodeGen/X86/vec_uint_to_fp-fastmath.ll | 12 +-
llvm/test/CodeGen/X86/vec_uint_to_fp.ll | 8 +-
llvm/test/CodeGen/X86/vec_unsafe-fp-math.ll | 2 +-
llvm/test/CodeGen/X86/vec_zero-2.ll | 2 +-
llvm/test/CodeGen/X86/vec_zero.ll | 4 +-
llvm/test/CodeGen/X86/vec_zero_cse.ll | 4 +-
llvm/test/CodeGen/X86/veclib-llvm.sincos.ll | 16 +-
llvm/test/CodeGen/X86/vector-bitreverse.ll | 32 +--
llvm/test/CodeGen/X86/vector-blend.ll | 10 +-
.../CodeGen/X86/vector-bo-select-avx512.ll | 4 +-
.../CodeGen/X86/vector-compare-combines.ll | 4 +-
.../CodeGen/X86/vector-compare-results.ll | 14 +-
.../CodeGen/X86/vector-compare-simplify.ll | 2 +-
.../CodeGen/X86/vector-compress-freeze.ll | 2 +-
.../vector-constrained-fp-intrinsics-flags.ll | 2 +-
.../vector-constrained-fp-intrinsics-fma.ll | 2 +-
llvm/test/CodeGen/X86/vector-extend-inreg.ll | 8 +-
.../CodeGen/X86/vector-fshl-rot-sub128.ll | 26 +--
llvm/test/CodeGen/X86/vector-fshl-sub128.ll | 26 +--
.../CodeGen/X86/vector-fshr-rot-sub128.ll | 26 +--
llvm/test/CodeGen/X86/vector-fshr-sub128.ll | 26 +--
llvm/test/CodeGen/X86/vector-gep.ll | 2 +-
llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll | 10 +-
llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll | 6 +-
llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll | 4 +-
llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll | 6 +-
llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll | 4 +-
llvm/test/CodeGen/X86/vector-idiv-v2i32.ll | 4 +-
llvm/test/CodeGen/X86/vector-idiv.ll | 8 +-
llvm/test/CodeGen/X86/vector-llrint.ll | 12 +-
llvm/test/CodeGen/X86/vector-lrint-f16.ll | 16 +-
llvm/test/CodeGen/X86/vector-lrint.ll | 28 +--
llvm/test/CodeGen/X86/vector-lzcnt-128.ll | 22 +-
llvm/test/CodeGen/X86/vector-lzcnt-256.ll | 14 +-
llvm/test/CodeGen/X86/vector-lzcnt-512.ll | 8 +-
llvm/test/CodeGen/X86/vector-lzcnt-sub128.ll | 2 +-
.../X86/vector-merge-store-fp-constants.ll | 4 +-
.../CodeGen/X86/vector-mul-i8-decompose.ll | 6 +-
.../CodeGen/X86/vector-mulfix-legalize.ll | 2 +-
llvm/test/CodeGen/X86/vector-pack-128.ll | 12 +-
llvm/test/CodeGen/X86/vector-pack-256.ll | 8 +-
llvm/test/CodeGen/X86/vector-pack-512.ll | 4 +-
llvm/test/CodeGen/X86/vector-partial-undef.ll | 4 +-
.../CodeGen/X86/vector-popcnt-128-ult-ugt.ll | 20 +-
llvm/test/CodeGen/X86/vector-popcnt-128.ll | 22 +-
.../CodeGen/X86/vector-popcnt-256-ult-ugt.ll | 12 +-
llvm/test/CodeGen/X86/vector-popcnt-256.ll | 14 +-
.../CodeGen/X86/vector-popcnt-512-ult-ugt.ll | 10 +-
llvm/test/CodeGen/X86/vector-popcnt-512.ll | 10 +-
.../CodeGen/X86/vector-reduce-and-scalar.ll | 14 +-
llvm/test/CodeGen/X86/vector-reduce-fadd.ll | 14 +-
.../CodeGen/X86/vector-reduce-fmax-nnan.ll | 14 +-
llvm/test/CodeGen/X86/vector-reduce-fmax.ll | 12 +-
.../CodeGen/X86/vector-reduce-fmaximum.ll | 12 +-
.../CodeGen/X86/vector-reduce-fmin-nnan.ll | 14 +-
llvm/test/CodeGen/X86/vector-reduce-fmin.ll | 12 +-
llvm/test/CodeGen/X86/vector-reduce-fmul.ll | 12 +-
.../CodeGen/X86/vector-reduce-xor-bool.ll | 16 +-
llvm/test/CodeGen/X86/vector-rem.ll | 2 +-
.../test/CodeGen/X86/vector-shift-ashr-512.ll | 4 +-
.../CodeGen/X86/vector-shift-ashr-sub128.ll | 22 +-
.../X86/vector-shift-by-select-loop.ll | 8 +-
.../test/CodeGen/X86/vector-shift-lshr-512.ll | 4 +-
.../CodeGen/X86/vector-shift-lshr-sub128.ll | 22 +-
llvm/test/CodeGen/X86/vector-shift-shl-512.ll | 4 +-
.../CodeGen/X86/vector-shift-shl-sub128.ll | 22 +-
.../CodeGen/X86/vector-shuffle-128-unpck.ll | 14 +-
.../test/CodeGen/X86/vector-shuffle-512-v8.ll | 4 +-
.../X86/vector-shuffle-combining-avx512f.ll | 8 +-
.../X86/vector-shuffle-combining-sse4a.ll | 8 +-
.../X86/vector-shuffle-combining-xop.ll | 8 +-
.../X86/vector-shuffle-fast-per-lane.ll | 24 +-
.../test/CodeGen/X86/vector-shuffle-masked.ll | 2 +-
llvm/test/CodeGen/X86/vector-shuffle-mmx.ll | 4 +-
llvm/test/CodeGen/X86/vector-shuffle-sse1.ll | 2 +-
llvm/test/CodeGen/X86/vector-shuffle-sse41.ll | 4 +-
llvm/test/CodeGen/X86/vector-shuffle-sse4a.ll | 6 +-
llvm/test/CodeGen/X86/vector-shuffle-v1.ll | 10 +-
.../X86/vector-shuffle-variable-256.ll | 4 +-
llvm/test/CodeGen/X86/vector-smax-range.ll | 12 +-
llvm/test/CodeGen/X86/vector-smin-range.ll | 12 +-
llvm/test/CodeGen/X86/vector-sqrt.ll | 2 +-
.../X86/vector-target-demanded-elts.ll | 2 +-
llvm/test/CodeGen/X86/vector-trunc-nowrap.ll | 28 +--
.../CodeGen/X86/vector-truncate-combine.ll | 2 +-
llvm/test/CodeGen/X86/vector-tzcnt-128.ll | 26 +--
llvm/test/CodeGen/X86/vector-umax-range.ll | 12 +-
llvm/test/CodeGen/X86/vector-umin-range.ll | 12 +-
llvm/test/CodeGen/X86/vector-variable-idx.ll | 2 +-
llvm/test/CodeGen/X86/vector-variable-idx2.ll | 2 +-
.../CodeGen/X86/vector-width-store-merge.ll | 6 +-
llvm/test/CodeGen/X86/vector-zmov.ll | 10 +-
llvm/test/CodeGen/X86/vector.ll | 4 +-
...vector_splat-const-shift-of-constmasked.ll | 12 +-
llvm/test/CodeGen/X86/vectorcall.ll | 4 +-
.../X86/vectorization-remarks-loopid-dbg.ll | 2 +-
llvm/test/CodeGen/X86/version_directive.ll | 6 +-
llvm/test/CodeGen/X86/vfcmp.ll | 2 +-
...rs-cleared-in-machine-functions-liveins.ll | 4 +-
llvm/test/CodeGen/X86/visibility.ll | 2 +-
llvm/test/CodeGen/X86/visibility2.ll | 2 +-
llvm/test/CodeGen/X86/vmaskmov-offset.ll | 2 +-
llvm/test/CodeGen/X86/vmovq.ll | 4 +-
...ile-memstores-nooverlapping-load-stores.ll | 2 +-
llvm/test/CodeGen/X86/volatile.ll | 4 +-
llvm/test/CodeGen/X86/vortex-bug.ll | 2 +-
.../X86/vp2intersect_multiple_pairs.ll | 4 +-
.../X86/vpshufbitqbm-intrinsics-upgrade.ll | 2 +-
.../CodeGen/X86/vpshufbitqbm-intrinsics.ll | 2 +-
llvm/test/CodeGen/X86/vpternlog.ll | 2 +-
llvm/test/CodeGen/X86/vsel-cmp-load.ll | 6 +-
llvm/test/CodeGen/X86/vselect-2.ll | 8 +-
llvm/test/CodeGen/X86/vselect-avx512.ll | 4 +-
llvm/test/CodeGen/X86/vselect-constants.ll | 4 +-
llvm/test/CodeGen/X86/vselect-minmax.ll | 12 +-
llvm/test/CodeGen/X86/vselect-packss.ll | 16 +-
llvm/test/CodeGen/X86/vselect-post-combine.ll | 2 +-
llvm/test/CodeGen/X86/vselect-zero.ll | 12 +-
llvm/test/CodeGen/X86/vshift-1.ll | 4 +-
llvm/test/CodeGen/X86/vshift-2.ll | 4 +-
llvm/test/CodeGen/X86/vshift-3.ll | 4 +-
llvm/test/CodeGen/X86/vshift-4.ll | 4 +-
llvm/test/CodeGen/X86/vshift-5.ll | 4 +-
llvm/test/CodeGen/X86/vshift-6.ll | 4 +-
llvm/test/CodeGen/X86/vshift_scalar.ll | 2 +-
llvm/test/CodeGen/X86/vshift_split.ll | 2 +-
llvm/test/CodeGen/X86/vshift_split2.ll | 2 +-
.../X86/vshli-simplify-demanded-bits.ll | 2 +-
llvm/test/CodeGen/X86/vsplit-and.ll | 2 +-
llvm/test/CodeGen/X86/vzero-excess.ll | 2 +-
llvm/test/CodeGen/X86/waitpkg-intrinsics.ll | 4 +-
llvm/test/CodeGen/X86/warn-stack.ll | 2 +-
llvm/test/CodeGen/X86/wbinvd-intrinsic.ll | 4 +-
llvm/test/CodeGen/X86/wbnoinvd-intrinsic.ll | 4 +-
llvm/test/CodeGen/X86/weak-undef.ll | 4 +-
llvm/test/CodeGen/X86/weak.ll | 2 +-
.../CodeGen/X86/weak_def_can_be_hidden.ll | 10 +-
llvm/test/CodeGen/X86/wide-fma-contraction.ll | 4 +-
llvm/test/CodeGen/X86/wide-integer-cmp.ll | 2 +-
llvm/test/CodeGen/X86/wide-integer-fold.ll | 2 +-
llvm/test/CodeGen/X86/widen_arith-1.ll | 2 +-
llvm/test/CodeGen/X86/widen_arith-2.ll | 2 +-
llvm/test/CodeGen/X86/widen_arith-3.ll | 2 +-
llvm/test/CodeGen/X86/widen_arith-4.ll | 4 +-
llvm/test/CodeGen/X86/widen_arith-5.ll | 2 +-
llvm/test/CodeGen/X86/widen_arith-6.ll | 2 +-
llvm/test/CodeGen/X86/widen_bitcnt.ll | 8 +-
llvm/test/CodeGen/X86/widen_bitops-0.ll | 4 +-
llvm/test/CodeGen/X86/widen_cast-1.ll | 4 +-
llvm/test/CodeGen/X86/widen_cast-3.ll | 4 +-
llvm/test/CodeGen/X86/widen_cast-4.ll | 2 +-
llvm/test/CodeGen/X86/widen_cast-5.ll | 4 +-
llvm/test/CodeGen/X86/widen_cast-6.ll | 4 +-
llvm/test/CodeGen/X86/widen_compare-1.ll | 4 +-
llvm/test/CodeGen/X86/widen_conv-1.ll | 4 +-
llvm/test/CodeGen/X86/widen_conv-2.ll | 4 +-
llvm/test/CodeGen/X86/widen_conv-3.ll | 8 +-
llvm/test/CodeGen/X86/widen_conv-4.ll | 8 +-
llvm/test/CodeGen/X86/widen_conversions.ll | 4 +-
llvm/test/CodeGen/X86/widen_extract-1.ll | 4 +-
llvm/test/CodeGen/X86/widen_load-0.ll | 4 +-
llvm/test/CodeGen/X86/widen_load-1.ll | 4 +-
llvm/test/CodeGen/X86/widen_load-3.ll | 12 +-
llvm/test/CodeGen/X86/widen_mul.ll | 10 +-
llvm/test/CodeGen/X86/widen_shuffle-1.ll | 4 +-
llvm/test/CodeGen/X86/widened-broadcast.ll | 10 +-
llvm/test/CodeGen/X86/win-alloca-expander.ll | 4 +-
llvm/test/CodeGen/X86/win-catchpad-csrs.ll | 4 +-
.../CodeGen/X86/win-catchpad-nested-cxx.ll | 4 +-
llvm/test/CodeGen/X86/win-catchpad-nested.ll | 2 +-
llvm/test/CodeGen/X86/win-catchpad-varargs.ll | 4 +-
llvm/test/CodeGen/X86/win-catchpad.ll | 4 +-
llvm/test/CodeGen/X86/win-cleanuppad.ll | 4 +-
llvm/test/CodeGen/X86/win-funclet-cfi.ll | 2 +-
.../win-import-call-optimization-cfguard.ll | 2 +-
.../win-import-call-optimization-jumptable.ll | 2 +-
.../win-import-call-optimization-nocalls.ll | 2 +-
.../X86/win-import-call-optimization.ll | 6 +-
.../X86/win-loader-replaceable-function.ll | 2 +-
.../CodeGen/X86/win-mixed-ehpersonality.ll | 2 +-
llvm/test/CodeGen/X86/win-smallparams.ll | 8 +-
llvm/test/CodeGen/X86/win32-bool.ll | 4 +-
.../X86/win32-eh-available-externally.ll | 2 +-
llvm/test/CodeGen/X86/win32-eh-states.ll | 4 +-
llvm/test/CodeGen/X86/win32-eh.ll | 4 +-
.../CodeGen/X86/win32-int-runtime-libcalls.ll | 4 +-
llvm/test/CodeGen/X86/win32-pic-jumptable.ll | 2 +-
llvm/test/CodeGen/X86/win32-preemption.ll | 18 +-
.../CodeGen/X86/win32-seh-catchpad-realign.ll | 2 +-
llvm/test/CodeGen/X86/win32-seh-catchpad.ll | 2 +-
.../CodeGen/X86/win32-seh-nested-finally.ll | 2 +-
llvm/test/CodeGen/X86/win32-spill-xmm.ll | 2 +-
llvm/test/CodeGen/X86/win32-ssp.ll | 12 +-
llvm/test/CodeGen/X86/win32_sret.ll | 16 +-
llvm/test/CodeGen/X86/win64-bool.ll | 4 +-
llvm/test/CodeGen/X86/win64-eh-empty-block.ll | 2 +-
.../X86/win64-eh-trailing-statepoint.ll | 2 +-
llvm/test/CodeGen/X86/win64-eh-unwindv2.ll | 4 +-
.../X86/win64-funclet-preisel-intrinsics.ll | 2 +-
.../test/CodeGen/X86/win64-funclet-savexmm.ll | 2 +-
llvm/test/CodeGen/X86/win64-jumptable.ll | 6 +-
llvm/test/CodeGen/X86/win64-long-double.ll | 2 +-
llvm/test/CodeGen/X86/win64-nosse-csrs.ll | 2 +-
.../X86/win64-seh-epilogue-statepoint.ll | 2 +-
.../CodeGen/X86/win64-stackprobe-overflow.ll | 2 +-
.../test/CodeGen/X86/win64-tailcall-memory.ll | 2 +-
.../CodeGen/X86/win64_alloca_dynalloca.ll | 8 +-
llvm/test/CodeGen/X86/win64_call_epi.ll | 2 +-
llvm/test/CodeGen/X86/win64_eh.ll | 8 +-
llvm/test/CodeGen/X86/win64_eh_leaf.ll | 4 +-
llvm/test/CodeGen/X86/win64_eh_leaf2.ll | 2 +-
llvm/test/CodeGen/X86/win64_nonvol.ll | 4 +-
llvm/test/CodeGen/X86/win64_params.ll | 4 +-
llvm/test/CodeGen/X86/win64_regcall.ll | 2 +-
llvm/test/CodeGen/X86/win64_sibcall.ll | 4 +-
llvm/test/CodeGen/X86/win64_vararg.ll | 2 +-
llvm/test/CodeGen/X86/win_chkstk.ll | 18 +-
llvm/test/CodeGen/X86/win_coreclr_chkstk.ll | 4 +-
llvm/test/CodeGen/X86/win_cst_pool.ll | 10 +-
.../CodeGen/X86/windows-itanium-alloca.ll | 2 +-
.../X86/windows-seh-EHa-CppCatchDotDotDot.ll | 2 +-
.../X86/windows-seh-EHa-CppCondiTemps.ll | 2 +-
.../CodeGen/X86/windows-seh-EHa-CppDtors01.ll | 2 +-
.../X86/windows-seh-EHa-PreserveCFG.ll | 2 +-
.../X86/windows-seh-EHa-RegisterLiveness.ll | 2 +-
.../X86/windows-seh-EHa-TryInFinally.ll | 2 +-
llvm/test/CodeGen/X86/wineh-coreclr.ll | 2 +-
.../CodeGen/X86/wineh-exceptionpointer.ll | 2 +-
llvm/test/CodeGen/X86/wineh-no-ehpads.ll | 2 +-
llvm/test/CodeGen/X86/x32-cet-intrinsics.ll | 2 +-
.../CodeGen/X86/x32-function_pointer-1.ll | 4 +-
.../CodeGen/X86/x32-function_pointer-2.ll | 4 +-
.../CodeGen/X86/x32-function_pointer-3.ll | 4 +-
llvm/test/CodeGen/X86/x32-indirectbr.ll | 4 +-
llvm/test/CodeGen/X86/x32-landingpad.ll | 4 +-
llvm/test/CodeGen/X86/x32-lea-1.ll | 4 +-
llvm/test/CodeGen/X86/x32-movtopush64.ll | 2 +-
llvm/test/CodeGen/X86/x64-cet-intrinsics.ll | 4 +-
llvm/test/CodeGen/X86/x86-16.ll | 2 +-
llvm/test/CodeGen/X86/x86-32-intrcc.ll | 4 +-
.../CodeGen/X86/x86-32-vector-calling-conv.ll | 4 +-
llvm/test/CodeGen/X86/x86-64-and-mask.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-arg.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-asm.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-bittest-logic.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-call.ll | 6 +-
llvm/test/CodeGen/X86/x86-64-disp.ll | 2 +-
.../X86/x86-64-double-precision-shift-left.ll | 2 +-
.../x86-64-double-precision-shift-right.ll | 2 +-
.../X86/x86-64-double-shifts-Oz-Os-O2.ll | 2 +-
.../CodeGen/X86/x86-64-double-shifts-var.ll | 40 ++--
llvm/test/CodeGen/X86/x86-64-extend-shift.ll | 2 +-
.../CodeGen/X86/x86-64-flags-intrinsics.ll | 4 +-
llvm/test/CodeGen/X86/x86-64-gv-offset.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-intrcc-nosse.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-intrcc-uintr.ll | 8 +-
llvm/test/CodeGen/X86/x86-64-intrcc.ll | 4 +-
llvm/test/CodeGen/X86/x86-64-jumps.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-mem.ll | 4 +-
llvm/test/CodeGen/X86/x86-64-ms_abi-vararg.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-pic-1.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-pic-10.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-pic-11.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-pic-12.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-pic-2.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-pic-3.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-pic-4.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-pic-5.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-pic-6.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-pic-7.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-pic-8.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-pic-9.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-pic.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-psub.ll | 2 +-
.../test/CodeGen/X86/x86-64-ptr-arg-simple.ll | 4 +-
llvm/test/CodeGen/X86/x86-64-ret0.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-shortint.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-sret-return-2.ll | 4 +-
llvm/test/CodeGen/X86/x86-64-sret-return.ll | 6 +-
.../CodeGen/X86/x86-64-stack-and-frame-ptr.ll | 4 +-
.../CodeGen/X86/x86-64-static-relo-movl.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-tls-1.ll | 2 +-
llvm/test/CodeGen/X86/x86-64-veccallcc.ll | 2 +-
.../CodeGen/X86/x86-64-xmm-spill-unaligned.ll | 2 +-
llvm/test/CodeGen/X86/x86-access-to-global.ll | 2 +-
llvm/test/CodeGen/X86/x86-big-ret.ll | 2 +-
llvm/test/CodeGen/X86/x86-cmov-converter.ll | 4 +-
llvm/test/CodeGen/X86/x86-flags-intrinsics.ll | 2 +-
llvm/test/CodeGen/X86/x86-fold-pshufb.ll | 4 +-
llvm/test/CodeGen/X86/x86-fp80-ret-no-x87.ll | 2 +-
.../CodeGen/X86/x86-framelowering-trap.ll | 2 +-
.../CodeGen/X86/x86-inline-asm-validation.ll | 2 +-
.../test/CodeGen/X86/x86-interleaved-check.ll | 6 +-
llvm/test/CodeGen/X86/x86-interrupt_cc.ll | 8 +-
llvm/test/CodeGen/X86/x86-interrupt_cld.ll | 2 +-
.../CodeGen/X86/x86-interrupt_vzeroupper.ll | 2 +-
.../X86/x86-mixed-alignment-dagcombine.ll | 2 +-
.../X86/x86-no_callee_saved_registers.ll | 4 +-
.../x86-no_caller_saved_registers-preserve.ll | 2 +-
.../X86/x86-no_caller_saved_registers.ll | 8 +-
llvm/test/CodeGen/X86/x86-regcall-got.ll | 2 +-
.../CodeGen/X86/x86-repmov-copy-eflags.ll | 2 +-
.../X86/x86-sanitizer-shrink-wrapping.ll | 2 +-
.../X86/x86-setcc-int-to-fp-combine.ll | 2 +-
llvm/test/CodeGen/X86/x86-shifts.ll | 4 +-
.../CodeGen/X86/x86-shrink-wrap-unwind.ll | 4 +-
llvm/test/CodeGen/X86/x86-store-gv-addr.ll | 4 +-
.../CodeGen/X86/x86-upgrade-avx-vbroadcast.ll | 2 +-
.../CodeGen/X86/x86-win64-shrink-wrapping.ll | 4 +-
llvm/test/CodeGen/X86/x86_64-mul-by-const.ll | 2 +-
llvm/test/CodeGen/X86/x87.ll | 12 +-
llvm/test/CodeGen/X86/xaluo.ll | 6 +-
llvm/test/CodeGen/X86/xaluo128.ll | 4 +-
llvm/test/CodeGen/X86/xchg-nofold.ll | 2 +-
llvm/test/CodeGen/X86/xmm-r64.ll | 2 +-
llvm/test/CodeGen/X86/xmm-vararg-noopt.ll | 2 +-
llvm/test/CodeGen/X86/xmulo.ll | 10 +-
llvm/test/CodeGen/X86/xop-ifma.ll | 4 +-
.../CodeGen/X86/xop-intrinsics-fast-isel.ll | 4 +-
.../X86/xop-intrinsics-x86_64-upgrade.ll | 2 +-
.../test/CodeGen/X86/xop-intrinsics-x86_64.ll | 2 +-
llvm/test/CodeGen/X86/xop-mask-comments.ll | 4 +-
llvm/test/CodeGen/X86/xop-pcmov.ll | 4 +-
llvm/test/CodeGen/X86/xor-combine-debugloc.ll | 2 +-
llvm/test/CodeGen/X86/xor-icmp.ll | 4 +-
llvm/test/CodeGen/X86/xor-lea.ll | 6 +-
llvm/test/CodeGen/X86/xor-not-combine.ll | 2 +-
llvm/test/CodeGen/X86/xor-with-overflow.ll | 4 +-
.../X86/xray-attribute-instrumentation.ll | 6 +-
llvm/test/CodeGen/X86/xray-custom-log.ll | 4 +-
.../CodeGen/X86/xray-ignore-loop-detection.ll | 4 +-
llvm/test/CodeGen/X86/xray-log-args.ll | 4 +-
llvm/test/CodeGen/X86/xray-loop-detection.ll | 4 +-
...xray-partial-instrumentation-skip-entry.ll | 6 +-
.../xray-partial-instrumentation-skip-exit.ll | 6 +-
llvm/test/CodeGen/X86/xray-section-group.ll | 4 +-
.../xray-selective-instrumentation-miss.ll | 2 +-
.../X86/xray-selective-instrumentation.ll | 2 +-
llvm/test/CodeGen/X86/xray-tail-call-sled.ll | 4 +-
llvm/test/CodeGen/X86/xtest.ll | 2 +-
llvm/test/CodeGen/X86/ymm-ordering.ll | 2 +-
.../CodeGen/X86/zero-call-used-regs-fmod.ll | 2 +-
.../CodeGen/X86/zero-call-used-regs-i386.ll | 2 +-
.../CodeGen/X86/zero-call-used-regs-simd.ll | 10 +-
llvm/test/CodeGen/X86/zero-call-used-regs.ll | 4 +-
.../CodeGen/X86/zero-initialized-in-bss.ll | 4 +-
llvm/test/CodeGen/X86/zero-remat.ll | 6 +-
llvm/test/CodeGen/X86/zext-extract_subreg.ll | 2 +-
llvm/test/CodeGen/X86/zext-fold.ll | 2 +-
llvm/test/CodeGen/X86/zext-inreg-0.ll | 4 +-
llvm/test/CodeGen/X86/zext-inreg-1.ll | 2 +-
llvm/test/CodeGen/X86/zext-lshr.ll | 4 +-
llvm/test/CodeGen/X86/zext-sext.ll | 2 +-
llvm/test/CodeGen/X86/zext-shl.ll | 4 +-
llvm/test/CodeGen/X86/zext-trunc.ll | 4 +-
llvm/test/CodeGen/X86/zlib-longest-match.ll | 2 +-
llvm/test/CodeGen/X86/znver3-gather.ll | 2 +-
4299 files changed, 9162 insertions(+), 9162 deletions(-)
diff --git a/llvm/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll b/llvm/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll
index 8a0710865058f..3dfbf3af7d101 100644
--- a/llvm/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll
+++ b/llvm/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll
@@ -4,7 +4,7 @@
; it makes a ton of annoying overlapping live ranges. This code should not
; cause spills!
;
-; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -stats 2>&1 | FileCheck %s
; CHECK-NOT: spilled
diff --git a/llvm/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll b/llvm/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll
index db2ad18d0efb4..4e02c4b56baa9 100644
--- a/llvm/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll
+++ b/llvm/test/CodeGen/X86/2003-08-23-DeadBlockTest.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define i32 @test() {
entry:
diff --git a/llvm/test/CodeGen/X86/2003-11-03-GlobalBool.ll b/llvm/test/CodeGen/X86/2003-11-03-GlobalBool.ll
index 16bbbce5eb7d1..d148db21500cf 100644
--- a/llvm/test/CodeGen/X86/2003-11-03-GlobalBool.ll
+++ b/llvm/test/CodeGen/X86/2003-11-03-GlobalBool.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
@X = global i1 true
; CHECK-NOT: .byte true
diff --git a/llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll b/llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll
index 79bd0fc5126e7..96e0ed040f09b 100644
--- a/llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll
+++ b/llvm/test/CodeGen/X86/2004-02-13-FrameReturnAddress.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
declare ptr @llvm.returnaddress(i32)
diff --git a/llvm/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll b/llvm/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll
index aa68ade1dfe2a..c01c1178fecd3 100644
--- a/llvm/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll
+++ b/llvm/test/CodeGen/X86/2004-02-14-InefficientStackPointer.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target triple = "i686-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/2004-02-22-Casts.ll b/llvm/test/CodeGen/X86/2004-02-22-Casts.ll
index dafc1d597625c..05757252fc309 100644
--- a/llvm/test/CodeGen/X86/2004-02-22-Casts.ll
+++ b/llvm/test/CodeGen/X86/2004-02-22-Casts.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define i1 @test1(double %X) {
%V = fcmp one double %X, 0.000000e+00 ; <i1> [#uses=1]
ret i1 %V
diff --git a/llvm/test/CodeGen/X86/2004-03-30-Select-Max.ll b/llvm/test/CodeGen/X86/2004-03-30-Select-Max.ll
index aa5bf631b5220..81f4fe2fd1530 100644
--- a/llvm/test/CodeGen/X86/2004-03-30-Select-Max.ll
+++ b/llvm/test/CodeGen/X86/2004-03-30-Select-Max.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
; CHECK-NOT: {{j[lgbe]}}
define i32 @max(i32 %A, i32 %B) nounwind {
diff --git a/llvm/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll b/llvm/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll
index 915dc4e416093..54c7c3f0d6aea 100644
--- a/llvm/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll
+++ b/llvm/test/CodeGen/X86/2004-04-13-FPCMOV-Crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define double @test(double %d) {
%X = select i1 false, double %d, double %d ; <double> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2004-06-10-StackifierCrash.ll b/llvm/test/CodeGen/X86/2004-06-10-StackifierCrash.ll
index 88acc6ad9af82..052c897f55810 100644
--- a/llvm/test/CodeGen/X86/2004-06-10-StackifierCrash.ll
+++ b/llvm/test/CodeGen/X86/2004-06-10-StackifierCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define i1 @T(double %X) {
%V = fcmp oeq double %X, %X ; <i1> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll b/llvm/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll
index 2bd755d979d1a..fbc2b77b348ec 100644
--- a/llvm/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll
+++ b/llvm/test/CodeGen/X86/2004-10-08-SelectSetCCFold.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define i1 @test(i1 %C, i1 %D, i32 %X, i32 %Y) {
%E = icmp slt i32 %X, %Y ; <i1> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll b/llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll
index ea89d1437cf23..f895e29f5f66c 100644
--- a/llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll
+++ b/llvm/test/CodeGen/X86/2005-01-17-CycleInDAG.ll
@@ -3,7 +3,7 @@
; is invalid code (there is no correct way to order the instruction). Check
; that we do not fold the load into the sub.
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
@GLOBAL = external dso_local global i32
diff --git a/llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll b/llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll
index b913fc34a526d..683fb2c034138 100644
--- a/llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll
+++ b/llvm/test/CodeGen/X86/2005-02-14-IllegalAssembler.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
@A = external global i32 ; <ptr> [#uses=1]
@Y = global ptr getelementptr (i32, ptr @A, i32 -1) ; <ptr> [#uses=0]
diff --git a/llvm/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll b/llvm/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll
index 47cd0da7a4d3c..9fedd6a7c6fd7 100644
--- a/llvm/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll
+++ b/llvm/test/CodeGen/X86/2005-05-08-FPStackifierPHI.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=generic
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=generic
; Make sure LLC doesn't crash in the stackifier due to FP PHI nodes.
define void @radfg_() {
diff --git a/llvm/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll b/llvm/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll
index 6c4254314009f..9704e8aea8b93 100644
--- a/llvm/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll
+++ b/llvm/test/CodeGen/X86/2006-01-19-ISelFoldingBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
;
; Check that the isel does not fold the shld, which already folds a load
; and has two uses, into a store.
diff --git a/llvm/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll b/llvm/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll
index 0805f7a3704a3..51bb93cc741c0 100644
--- a/llvm/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll
+++ b/llvm/test/CodeGen/X86/2006-03-01-InstrSchedBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s
define i32 @f(i32 %a, i32 %b) {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll b/llvm/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
index ece16192566dd..f116652268477 100644
--- a/llvm/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
+++ b/llvm/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -stats 2>&1 | FileCheck %s
; CHECK: 7 asm-printer
define i32 @g(i32 %a, i32 %b) nounwind {
diff --git a/llvm/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll b/llvm/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll
index 4e99508cfe16f..49d36d586ef82 100644
--- a/llvm/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll
+++ b/llvm/test/CodeGen/X86/2006-04-04-CrossBlockCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=yonah
+; RUN: llc -combiner-topological-sorting < %s -mcpu=yonah
; END.
target datalayout = "e-p:32:32"
diff --git a/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll b/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll
index e6f28c2057f77..ff0c705a4bfd0 100644
--- a/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll
+++ b/llvm/test/CodeGen/X86/2006-04-27-ISelFoldingBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin8 -relocation-model=static | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin8 -relocation-model=static | FileCheck %s
@block = external global ptr ; <ptr> [#uses=1]
@last = external global i32 ; <ptr> [#uses=3]
diff --git a/llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll b/llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
index 5bc884d290297..948a9f1ef934f 100644
--- a/llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
+++ b/llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=i686-- -mcpu=yonah -stats 2>&1 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=yonah -stats 2>&1 | \
; RUN: not grep "Number of register spills"
; END.
diff --git a/llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll b/llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll
index 8165395c7e655..9a05c50d8b9c1 100644
--- a/llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll
+++ b/llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=i686-unknown-linux -relocation-model=static -stats 2>&1 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux -relocation-model=static -stats 2>&1 | \
; RUN: grep asm-printer | grep 14
;
; It's possible to schedule this in 14 instructions by avoiding
diff --git a/llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll b/llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll
index e311161239388..ff11c1c97db15 100644
--- a/llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll
+++ b/llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -stats 2>&1 | \
; RUN: grep asm-printer | grep 13
define void @_ZN9__gnu_cxx9hashtableISt4pairIKPKciES3_NS_4hashIS3_EESt10_Select1stIS5_E5eqstrSaIiEE14find_or_insertERKS5__cond_true456.i(ptr %tmp435.i, ptr %tmp449.i.out) nounwind {
diff --git a/llvm/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll b/llvm/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll
index 88e745491d879..f398a0565e844 100644
--- a/llvm/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll
+++ b/llvm/test/CodeGen/X86/2006-05-08-CoalesceSubRegClass.ll
@@ -2,7 +2,7 @@
; Coalescing from R32 to a subset R32_. Once another register coalescer bug is
; fixed, the movb should go away as well.
-; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -relocation-model=static | FileCheck %s
@B = external dso_local global i32 ; <ptr> [#uses=2]
@C = external dso_local global ptr ; <ptr> [#uses=2]
diff --git a/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll b/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll
index 16ef67724f883..4530b9c2b8ee0 100644
--- a/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll
+++ b/llvm/test/CodeGen/X86/2006-05-08-InstrSched.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -relocation-model=static | FileCheck %s
@A = external dso_local global ptr ; <ptr> [#uses=1]
@B = external dso_local global i32 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll b/llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll
index a8fecba27bf3c..b5f65a2fed721 100644
--- a/llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll
+++ b/llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=i386-linux-gnu -mcpu=penryn -mattr=+sse2 -stats 2>&1 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -mcpu=penryn -mattr=+sse2 -stats 2>&1 | \
; RUN: grep "asm-printer" | grep 33
target datalayout = "e-p:32:32"
diff --git a/llvm/test/CodeGen/X86/2006-05-17-VectorArg.ll b/llvm/test/CodeGen/X86/2006-05-17-VectorArg.ll
index 7f022b6a607b7..e6c94f67d9779 100644
--- a/llvm/test/CodeGen/X86/2006-05-17-VectorArg.ll
+++ b/llvm/test/CodeGen/X86/2006-05-17-VectorArg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2
define <4 x float> @opRSQ(<4 x float> %a) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/2006-05-22-FPSetEQ.ll b/llvm/test/CodeGen/X86/2006-05-22-FPSetEQ.ll
index 9f072c6334c07..172a276816315 100644
--- a/llvm/test/CodeGen/X86/2006-05-22-FPSetEQ.ll
+++ b/llvm/test/CodeGen/X86/2006-05-22-FPSetEQ.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=-sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-sse | FileCheck %s
define i32 @test(float %f) {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/2006-05-25-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-05-25-CycleInDAG.ll
index 069d77ed689e2..744137efd37b0 100644
--- a/llvm/test/CodeGen/X86/2006-05-25-CycleInDAG.ll
+++ b/llvm/test/CodeGen/X86/2006-05-25-CycleInDAG.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define i32 @test() {
br i1 false, label %cond_next33, label %cond_true12
diff --git a/llvm/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll b/llvm/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
index 1c5b9d07eeb8f..4cfebed3bcb18 100644
--- a/llvm/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
+++ b/llvm/test/CodeGen/X86/2006-07-10-InlineAsmAConstraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR825
define i64 @test() {
diff --git a/llvm/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll b/llvm/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll
index ff7ffd33b7a39..b9aefb96872f1 100644
--- a/llvm/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll
+++ b/llvm/test/CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR828
target datalayout = "e-p:32:32"
diff --git a/llvm/test/CodeGen/X86/2006-07-20-InlineAsm.ll b/llvm/test/CodeGen/X86/2006-07-20-InlineAsm.ll
index 3eb56ba8dc1b2..4bb273532bc6f 100644
--- a/llvm/test/CodeGen/X86/2006-07-20-InlineAsm.ll
+++ b/llvm/test/CodeGen/X86/2006-07-20-InlineAsm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -no-integrated-as
; PR833
@G = weak global i32 0 ; <ptr> [#uses=3]
diff --git a/llvm/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll b/llvm/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll
index 772e8a04685b8..66f5cf8b7a334 100644
--- a/llvm/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll
+++ b/llvm/test/CodeGen/X86/2006-07-28-AsmPrint-Long-As-Pointer.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; PR853
; CHECK: 4294967240
diff --git a/llvm/test/CodeGen/X86/2006-07-31-SingleRegClass.ll b/llvm/test/CodeGen/X86/2006-07-31-SingleRegClass.ll
index baf4dfa2e43db..daf312fbeae7c 100644
--- a/llvm/test/CodeGen/X86/2006-07-31-SingleRegClass.ll
+++ b/llvm/test/CodeGen/X86/2006-07-31-SingleRegClass.ll
@@ -1,5 +1,5 @@
; PR850
-; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=att -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -x86-asm-syntax=att -no-integrated-as | FileCheck %s
; CHECK: {{movl 4[(]%eax[)],%ebp}}
; CHECK: {{movl 0[(]%eax[)], %ebx}}
diff --git a/llvm/test/CodeGen/X86/2006-08-07-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-08-07-CycleInDAG.ll
index 01a20bf71ea1a..d9553a3fcdbaf 100644
--- a/llvm/test/CodeGen/X86/2006-08-07-CycleInDAG.ll
+++ b/llvm/test/CodeGen/X86/2006-08-07-CycleInDAG.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2
%struct.foo = type opaque
define fastcc i32 @test(ptr %v, ptr %vi) {
diff --git a/llvm/test/CodeGen/X86/2006-08-16-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-08-16-CycleInDAG.ll
index fbd162117eae2..ad9d1e6670ea5 100644
--- a/llvm/test/CodeGen/X86/2006-08-16-CycleInDAG.ll
+++ b/llvm/test/CodeGen/X86/2006-08-16-CycleInDAG.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
%struct.expr = type { ptr, i32, ptr, ptr, ptr, ptr }
%struct.hash_table = type { ptr, i32, i32, i32 }
%struct.occr = type { ptr, ptr, i8, i8 }
diff --git a/llvm/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll b/llvm/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll
index f3bdf561a9456..ad283a4f4e23a 100644
--- a/llvm/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll
+++ b/llvm/test/CodeGen/X86/2006-08-21-ExtraMovInst.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=i386 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=i386 | FileCheck %s
define i32 @foo(i32 %t, i32 %C) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/2006-09-01-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-09-01-CycleInDAG.ll
index d9b82812c1a3b..b631fa949c5c5 100644
--- a/llvm/test/CodeGen/X86/2006-09-01-CycleInDAG.ll
+++ b/llvm/test/CodeGen/X86/2006-09-01-CycleInDAG.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin8"
%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll b/llvm/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll
index 7f938029dd83a..e81e9a4aaff86 100644
--- a/llvm/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll
+++ b/llvm/test/CodeGen/X86/2006-10-02-BoolRetCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686 < %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686 < %s
; PR933
define fastcc i1 @test() {
diff --git a/llvm/test/CodeGen/X86/2006-10-09-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-10-09-CycleInDAG.ll
index 4eb7c19a82ed3..59a8ed31e08bd 100644
--- a/llvm/test/CodeGen/X86/2006-10-09-CycleInDAG.ll
+++ b/llvm/test/CodeGen/X86/2006-10-09-CycleInDAG.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define void @_ZN13QFSFileEngine4readEPcx() {
%tmp201 = load i32, ptr null ; <i32> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll b/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll
index d2b905ef56c55..c48b42ceffbef 100644
--- a/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll
+++ b/llvm/test/CodeGen/X86/2006-10-10-FindModifiedNodeSlotBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; Bug in FindModifiedNodeSlot cause tmp14 load to become a zextload and shr 31
; is then optimized away.
@tree_code_type = external dso_local global [0 x i32] ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2006-10-12-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-10-12-CycleInDAG.ll
index 4c5827ced829f..a9d58a3d8e788 100644
--- a/llvm/test/CodeGen/X86/2006-10-12-CycleInDAG.ll
+++ b/llvm/test/CodeGen/X86/2006-10-12-CycleInDAG.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
%struct.function = type opaque
%struct.lang_decl = type opaque
%struct.location_t = type { ptr, i32 }
diff --git a/llvm/test/CodeGen/X86/2006-10-13-CycleInDAG.ll b/llvm/test/CodeGen/X86/2006-10-13-CycleInDAG.ll
index 19f1f9ddd7317..de0e1a4fce3b0 100644
--- a/llvm/test/CodeGen/X86/2006-10-13-CycleInDAG.ll
+++ b/llvm/test/CodeGen/X86/2006-10-13-CycleInDAG.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
@str = external dso_local global [18 x i8] ; <ptr> [#uses=1]
define void @test() {
diff --git a/llvm/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll b/llvm/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll
index c345ca502d64f..f60d2f8884a11 100644
--- a/llvm/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll
+++ b/llvm/test/CodeGen/X86/2006-10-19-SwitchUnnecessaryBranching.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -asm-verbose | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -asm-verbose | FileCheck %s
@str = internal constant [14 x i8] c"Hello world!\0A\00" ; <ptr> [#uses=1]
@str.upgrd.1 = internal constant [13 x i8] c"Blah world!\0A\00" ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2006-11-12-CSRetCC.ll b/llvm/test/CodeGen/X86/2006-11-12-CSRetCC.ll
index c3d85a735dd48..b1ce9d8fcaf79 100644
--- a/llvm/test/CodeGen/X86/2006-11-12-CSRetCC.ll
+++ b/llvm/test/CodeGen/X86/2006-11-12-CSRetCC.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target triple = "i686-pc-linux-gnu"
@str = internal constant [9 x i8] c"%f+%f*i\0A\00" ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll b/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll
index 313fbbac05fd0..1b5b224f35399 100644
--- a/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll
+++ b/llvm/test/CodeGen/X86/2006-11-17-IllegalMove.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define void @handle_vector_size_attribute() nounwind {
; CHECK-LABEL: handle_vector_size_attribute:
diff --git a/llvm/test/CodeGen/X86/2006-11-27-SelectLegalize.ll b/llvm/test/CodeGen/X86/2006-11-27-SelectLegalize.ll
index 87aba33fb7c46..9d5005d887ed8 100644
--- a/llvm/test/CodeGen/X86/2006-11-27-SelectLegalize.ll
+++ b/llvm/test/CodeGen/X86/2006-11-27-SelectLegalize.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; PR1016
; CHECK: {{test.*1}}
diff --git a/llvm/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll b/llvm/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll
index e21ed0a7e3f9f..49550a4b480f2 100644
--- a/llvm/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll
+++ b/llvm/test/CodeGen/X86/2006-12-16-InlineAsmCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR1049
target datalayout = "e-p:32:32"
target triple = "i686-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2006-12-19-IntelSyntax.ll b/llvm/test/CodeGen/X86/2006-12-19-IntelSyntax.ll
index de56a5280d19c..f656eeeeb3a9b 100644
--- a/llvm/test/CodeGen/X86/2006-12-19-IntelSyntax.ll
+++ b/llvm/test/CodeGen/X86/2006-12-19-IntelSyntax.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -x86-asm-syntax=intel
+; RUN: llc -combiner-topological-sorting < %s -x86-asm-syntax=intel
; PR1061
target datalayout = "e-p:32:32"
target triple = "i686-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2007-01-08-InstrSched.ll b/llvm/test/CodeGen/X86/2007-01-08-InstrSched.ll
index 24aa5b98d0bb8..900bd288b7818 100644
--- a/llvm/test/CodeGen/X86/2007-01-08-InstrSched.ll
+++ b/llvm/test/CodeGen/X86/2007-01-08-InstrSched.ll
@@ -1,5 +1,5 @@
; PR1075
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-apple-darwin -O3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-apple-darwin -O3 | FileCheck %s
define float @foo(float %x) nounwind {
%tmp1 = fmul float %x, 3.000000e+00
diff --git a/llvm/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll b/llvm/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll
index afb22aa7382fd..f8f12b93b5351 100644
--- a/llvm/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll
+++ b/llvm/test/CodeGen/X86/2007-01-08-X86-64-Pointer.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s
; CHECK-NOT: {{addq.*8}}
; CHECK: ({{%rdi|%rcx}},%rax,8)
; CHECK-NOT: {{addq.*8}}
diff --git a/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll b/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll
index 1e5ee2f71d9b4..9493afb9f3105 100644
--- a/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll
+++ b/llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; PR1103
target datalayout = "e-p:64:64"
diff --git a/llvm/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll b/llvm/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll
index f16a8783d7de2..a566ba10a2edc 100644
--- a/llvm/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll
+++ b/llvm/test/CodeGen/X86/2007-01-29-InlineAsm-ir.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; Test 'ri' constraint.
define void @run_init_process() {
diff --git a/llvm/test/CodeGen/X86/2007-02-04-OrAddrMode.ll b/llvm/test/CodeGen/X86/2007-02-04-OrAddrMode.ll
index 0e61b6df755f8..ce195e9a21d25 100644
--- a/llvm/test/CodeGen/X86/2007-02-04-OrAddrMode.ll
+++ b/llvm/test/CodeGen/X86/2007-02-04-OrAddrMode.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
;; This example can't fold the or into an LEA.
define i32 @test(ptr %tmp2, i32 %tmp12) nounwind {
diff --git a/llvm/test/CodeGen/X86/2007-02-16-BranchFold.ll b/llvm/test/CodeGen/X86/2007-02-16-BranchFold.ll
index 206574eeae2ae..09b4b18b46e47 100644
--- a/llvm/test/CodeGen/X86/2007-02-16-BranchFold.ll
+++ b/llvm/test/CodeGen/X86/2007-02-16-BranchFold.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -enable-tail-merge=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -enable-tail-merge=0 | FileCheck %s
; PR 1200
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32"
diff --git a/llvm/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll b/llvm/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll
index 15c8f5e593015..c264bc9b460b2 100644
--- a/llvm/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll
+++ b/llvm/test/CodeGen/X86/2007-02-19-LiveIntervalAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic
; PR1027
%struct._IO_FILE = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i16, i8, [1 x i8], ptr, i64, ptr, ptr, ptr, ptr, i32, i32, [40 x i8] }
diff --git a/llvm/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll b/llvm/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll
index be4e16917446b..b8fa3cda2eb55 100644
--- a/llvm/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll
+++ b/llvm/test/CodeGen/X86/2007-02-23-DAGCombine-Miscompile.ll
@@ -1,5 +1,5 @@
; PR1219
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define i32 @test(i1 %X) {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/2007-02-25-FastCCStack.ll b/llvm/test/CodeGen/X86/2007-02-25-FastCCStack.ll
index e22f0b4540db8..a1e360aaf3d2d 100644
--- a/llvm/test/CodeGen/X86/2007-02-25-FastCCStack.ll
+++ b/llvm/test/CodeGen/X86/2007-02-25-FastCCStack.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=pentium3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=pentium3
define internal fastcc double @ggc_rlimit_bound(double %limit) {
ret double %limit
diff --git a/llvm/test/CodeGen/X86/2007-03-01-SpillerCrash.ll b/llvm/test/CodeGen/X86/2007-03-01-SpillerCrash.ll
index 4f990451f0807..614ba61f0cf79 100644
--- a/llvm/test/CodeGen/X86/2007-03-01-SpillerCrash.ll
+++ b/llvm/test/CodeGen/X86/2007-03-01-SpillerCrash.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin8 -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin8 -mattr=+sse2 | FileCheck %s
define void @test() nounwind {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll b/llvm/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll
index 49e2bf207e52a..37112b76ff7bc 100644
--- a/llvm/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll
+++ b/llvm/test/CodeGen/X86/2007-03-15-GEP-Idx-Sink.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=i686-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-darwin | FileCheck %s
define void @foo(ptr %buf, i32 %size, i32 %col, ptr %p) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll b/llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll
index cb7e206b4d45c..f448747fe012b 100644
--- a/llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll
+++ b/llvm/test/CodeGen/X86/2007-03-16-InlineAsm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; ModuleID = 'a.bc'
diff --git a/llvm/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll b/llvm/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll
index 4f5e0914612b3..fcb608b1f13fb 100644
--- a/llvm/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll
+++ b/llvm/test/CodeGen/X86/2007-03-18-LiveIntervalAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR1259
define void @test() {
diff --git a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll
index c7914037a00b5..909adbbf79236 100644
--- a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll
+++ b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define i32 @test(i16 %tmp40414244) {
%tmp48 = call i32 asm sideeffect "inl ${1:w}, $0", "={ax},N{dx},~{dirflag},~{fpsr},~{flags}"( i16 %tmp40414244 )
diff --git a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
index 9cc324ab1e5fc..f09b23e1f57a0 100644
--- a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
+++ b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmPModifier.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -no-integrated-as | FileCheck %s
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin9"
diff --git a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
index 5713804aa0329..a7b5dedbc3270 100644
--- a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
+++ b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=yonah -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=yonah -no-integrated-as | FileCheck %s
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin9"
diff --git a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll
index 9b9d819c1efb5..5b93722a77c34 100644
--- a/llvm/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll
+++ b/llvm/test/CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin9"
diff --git a/llvm/test/CodeGen/X86/2007-03-26-CoalescerBug.ll b/llvm/test/CodeGen/X86/2007-03-26-CoalescerBug.ll
index c39e06639089e..b9d1813b2a98f 100644
--- a/llvm/test/CodeGen/X86/2007-03-26-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2007-03-26-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
@data = external global [339 x i64]
diff --git a/llvm/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll b/llvm/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll
index d6af25a41ed36..a3e8ad4de1c43 100644
--- a/llvm/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll
+++ b/llvm/test/CodeGen/X86/2007-04-08-InlineAsmCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR1314
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
diff --git a/llvm/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll b/llvm/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll
index eaa5a729192b5..75985560a2caa 100644
--- a/llvm/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll
+++ b/llvm/test/CodeGen/X86/2007-04-11-InlineAsmVectorResult.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=yonah
+; RUN: llc -combiner-topological-sorting < %s -mcpu=yonah
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll b/llvm/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll
index ab99a7228b2a9..0bf8ca10c6d37 100644
--- a/llvm/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll
+++ b/llvm/test/CodeGen/X86/2007-04-17-LiveIntervalAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=pic --frame-pointer=all
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -relocation-model=pic --frame-pointer=all
%struct.FILE = type { ptr, i32, i32, i16, i16, %struct.__sbuf, i32, ptr, ptr, ptr, ptr, ptr, %struct.__sbuf, ptr, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
%struct.__sFILEX = type opaque
diff --git a/llvm/test/CodeGen/X86/2007-04-24-Huge-Stack.ll b/llvm/test/CodeGen/X86/2007-04-24-Huge-Stack.ll
index 61a92b767b635..69eebe69507ef 100644
--- a/llvm/test/CodeGen/X86/2007-04-24-Huge-Stack.ll
+++ b/llvm/test/CodeGen/X86/2007-04-24-Huge-Stack.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; PR1348
; CHECK-NOT: 4294967112
diff --git a/llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll b/llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll
index f8d8bac91d8bc..3d7ee47bf5558 100644
--- a/llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll
+++ b/llvm/test/CodeGen/X86/2007-04-24-VectorCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=yonah
+; RUN: llc -combiner-topological-sorting < %s -mcpu=yonah
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll b/llvm/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll
index b134db36858cc..8686a1fc3905b 100644
--- a/llvm/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll
+++ b/llvm/test/CodeGen/X86/2007-04-27-InlineAsm-IntMemInput.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; PR1356
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
diff --git a/llvm/test/CodeGen/X86/2007-05-05-Personality.ll b/llvm/test/CodeGen/X86/2007-05-05-Personality.ll
index d19c5e5f0f481..9b17257f71ba7 100644
--- a/llvm/test/CodeGen/X86/2007-05-05-Personality.ll
+++ b/llvm/test/CodeGen/X86/2007-05-05-Personality.ll
@@ -1,7 +1,7 @@
-; RUN: llc -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=i686-pc-linux-gnu -o - | FileCheck %s --check-prefix=LIN
-; RUN: llc -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=i386-pc-mingw32 -o - | FileCheck %s --check-prefix=WIN
-; RUN: llc -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=i686-pc-windows-gnu -o - | FileCheck %s --check-prefix=WIN
-; RUN: llc -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=x86_64-pc-windows-gnu -o - | FileCheck %s --check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=i686-pc-linux-gnu -o - | FileCheck %s --check-prefix=LIN
+; RUN: llc -combiner-topological-sorting -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=i386-pc-mingw32 -o - | FileCheck %s --check-prefix=WIN
+; RUN: llc -combiner-topological-sorting -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=i686-pc-windows-gnu -o - | FileCheck %s --check-prefix=WIN
+; RUN: llc -combiner-topological-sorting -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=x86_64-pc-windows-gnu -o - | FileCheck %s --check-prefix=WIN64
; LIN: .cfi_personality 0, __gnat_eh_personality
; LIN: .cfi_lsda 0, .Lexception0
diff --git a/llvm/test/CodeGen/X86/2007-05-05-VecCastExpand.ll b/llvm/test/CodeGen/X86/2007-05-05-VecCastExpand.ll
index d217660e85c07..cb11950c5cb1b 100644
--- a/llvm/test/CodeGen/X86/2007-05-05-VecCastExpand.ll
+++ b/llvm/test/CodeGen/X86/2007-05-05-VecCastExpand.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=i386 -mattr=+sse
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=i386 -mattr=+sse
; PR1371
@str = external dso_local global [18 x i8] ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll b/llvm/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll
index 15e93ef257c15..c642bfc8272cb 100644
--- a/llvm/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll
+++ b/llvm/test/CodeGen/X86/2007-05-14-LiveIntervalAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
%struct.XDesc = type <{ i32, ptr }>
%struct.OpaqueXDataStorageType = type opaque
diff --git a/llvm/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll b/llvm/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll
index d173ef226f9c1..febba53f4733d 100644
--- a/llvm/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll
+++ b/llvm/test/CodeGen/X86/2007-05-17-ShuffleISelBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
; CHECK-NOT: punpckhwd
diff --git a/llvm/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll b/llvm/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll
index 818c5a0284820..7a2271a4a8dfb 100644
--- a/llvm/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll
+++ b/llvm/test/CodeGen/X86/2007-06-04-X86-64-CtorAsmBugs.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep GOTPCREL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep ".align.*3"
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | not grep GOTPCREL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | grep ".align.*3"
%struct.A = type { [1024 x i8] }
@_ZN1A1aE = global %struct.A zeroinitializer, align 32 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2007-06-28-X86-64-isel.ll b/llvm/test/CodeGen/X86/2007-06-28-X86-64-isel.ll
index fa62d0f5b4490..a25d6d718f9e0 100644
--- a/llvm/test/CodeGen/X86/2007-06-28-X86-64-isel.ll
+++ b/llvm/test/CodeGen/X86/2007-06-28-X86-64-isel.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s
define void @test() {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll b/llvm/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll
index dc74352988f40..47005af5b0bce 100644
--- a/llvm/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll
+++ b/llvm/test/CodeGen/X86/2007-06-29-DAGCombinerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2
define void @test() {
entry:
diff --git a/llvm/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll b/llvm/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll
index 8d1c89ab90d93..1b219ec0bea4d 100644
--- a/llvm/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll
+++ b/llvm/test/CodeGen/X86/2007-06-29-VecFPConstantCSEBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2
define void @test(ptr %arg) {
%tmp89 = getelementptr <4 x float>, ptr %arg, i64 3
diff --git a/llvm/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll b/llvm/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll
index 6c586782420e1..79f7d07b3af7b 100644
--- a/llvm/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll
+++ b/llvm/test/CodeGen/X86/2007-07-03-GR64ToVR64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+mmx | FileCheck %s
@R = external global <1 x i64> ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2007-07-10-StackerAssert.ll b/llvm/test/CodeGen/X86/2007-07-10-StackerAssert.ll
index b36d2bcef9fb1..682235fa18fd1 100644
--- a/llvm/test/CodeGen/X86/2007-07-10-StackerAssert.ll
+++ b/llvm/test/CodeGen/X86/2007-07-10-StackerAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=athlon -relocation-model=pic
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -mcpu=athlon -relocation-model=pic
; PR1545
@.str97 = external constant [56 x i8] ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2007-07-18-Vector-Extract.ll b/llvm/test/CodeGen/X86/2007-07-18-Vector-Extract.ll
index a465ae7e056c7..84f9c66bb4449 100644
--- a/llvm/test/CodeGen/X86/2007-07-18-Vector-Extract.ll
+++ b/llvm/test/CodeGen/X86/2007-07-18-Vector-Extract.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mattr=+sse | FileCheck %s
; CHECK: movq ([[A0:%rdi|%rcx]]), %rax
; CHECK: movq 8([[A0]]), %rax
define i64 @foo_0(ptr %val) {
diff --git a/llvm/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll b/llvm/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll
index ac3dd78160ca1..aef9ce26c34dd 100644
--- a/llvm/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll
+++ b/llvm/test/CodeGen/X86/2007-08-01-LiveVariablesBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; CHECK-NOT: movl
diff --git a/llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll b/llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll
index 7bdc4e19a1cf6..c59fb5999d216 100644
--- a/llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll
+++ b/llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
%struct.FILE = type { ptr, i32, i32, i16, i16, %struct.__sbuf, i32, ptr, ptr, ptr, ptr, ptr, %struct.__sbuf, ptr, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, [4 x i8], i64 }
%struct.PyBoolScalarObject = type { i64, ptr, i8 }
diff --git a/llvm/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll b/llvm/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll
index 9f1b5f7358b9c..2c8731f11cf68 100644
--- a/llvm/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll
+++ b/llvm/test/CodeGen/X86/2007-08-10-SignExtSubreg.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
@X = global i32 0 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2007-09-05-InvalidAsm.ll b/llvm/test/CodeGen/X86/2007-09-05-InvalidAsm.ll
index 9b6b90da9f6c2..f8db76c9160d8 100644
--- a/llvm/test/CodeGen/X86/2007-09-05-InvalidAsm.ll
+++ b/llvm/test/CodeGen/X86/2007-09-05-InvalidAsm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -x86-asm-syntax=intel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -x86-asm-syntax=intel | FileCheck %s
; CHECK-NOT: lea R
%struct.AGenericCall = type { ptr, ptr, ptr }
diff --git a/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll b/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll
index cc80f87fda311..ff2f90b3aa6fa 100644
--- a/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll
+++ b/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu | FileCheck %s
@__gthrw_pthread_once = weak alias i32 (ptr, ptr), ptr @pthread_once ; <ptr> [#uses=0]
diff --git a/llvm/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll b/llvm/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll
index 3ad6492978438..b933dfeecf943 100644
--- a/llvm/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll
+++ b/llvm/test/CodeGen/X86/2007-09-27-LDIntrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll b/llvm/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll
index eb94a3958ab65..b1f4bca3fa1bd 100644
--- a/llvm/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll
+++ b/llvm/test/CodeGen/X86/2007-10-04-AvoidEFLAGSCopy.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
%struct.gl_texture_image = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr }
%struct.gl_texture_object = type { i32, i32, i32, float, [4 x i32], i32, i32, i32, i32, i32, float, [11 x ptr], [1024 x i8], i32, i32, i32, i8, ptr, i8, ptr, ptr }
diff --git a/llvm/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll b/llvm/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll
index cfb3e508576dd..5c0a55f876af1 100644
--- a/llvm/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll
+++ b/llvm/test/CodeGen/X86/2007-10-12-CoalesceExtSubReg.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define signext i16 @f(ptr %bp, ptr %ss) {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll b/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll
index d77d4352f8336..384095d5195e7 100644
--- a/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll
+++ b/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
define fastcc void @fht(ptr %fz, i16 signext %n) {
; CHECK-LABEL: fht:
diff --git a/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll b/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll
index 6ebb97d63e7c6..9d4b961783d95 100644
--- a/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll
+++ b/llvm/test/CodeGen/X86/2007-10-12-SpillerUnfold2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s
define signext i16 @t(ptr %qmatrix, ptr %dct, ptr %acBaseTable, ptr %acExtTable, i16 signext %acBaseRes, i16 signext %acMaskRes, i16 signext %acExtRes, ptr %bitptr, ptr %source, i32 %markerPrefix, ptr %byteptr, i32 %scale, i32 %round, i32 %bits) {
; CHECK-LABEL: t:
diff --git a/llvm/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll b/llvm/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll
index 0bbfae38357bd..3ec2c748222c9 100644
--- a/llvm/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll
+++ b/llvm/test/CodeGen/X86/2007-10-14-CoalescerCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin
%struct._Unwind_Context = type { }
diff --git a/llvm/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll b/llvm/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll
index 511b8abe1ef99..bc46cfa2d796b 100644
--- a/llvm/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll
+++ b/llvm/test/CodeGen/X86/2007-10-15-CoalescerCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu
; PR1729
%struct.CUMULATIVE_ARGS = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/2007-10-16-CoalescerCrash.ll b/llvm/test/CodeGen/X86/2007-10-16-CoalescerCrash.ll
index fbcac50875c27..f7d145425d9c4 100644
--- a/llvm/test/CodeGen/X86/2007-10-16-CoalescerCrash.ll
+++ b/llvm/test/CodeGen/X86/2007-10-16-CoalescerCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin
define i64 @__ashldi3(i64 %u, i64 %b) {
entry:
diff --git a/llvm/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll b/llvm/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll
index 827c9af7efc37..a14ae0f8435f0 100644
--- a/llvm/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll
+++ b/llvm/test/CodeGen/X86/2007-10-19-SpillerUnfold.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s
; CHECK: inc
; CHECK-NOT: PTR
diff --git a/llvm/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll b/llvm/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll
index 212dc0bfb12e9..35d0526155159 100644
--- a/llvm/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll
+++ b/llvm/test/CodeGen/X86/2007-10-29-ExtendSetCC.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define signext i16 @t() {
; CHECK-LABEL: t:
diff --git a/llvm/test/CodeGen/X86/2007-10-30-LSRCrash.ll b/llvm/test/CodeGen/X86/2007-10-30-LSRCrash.ll
index f49ce39bf245a..48f03b8c2b9e4 100644
--- a/llvm/test/CodeGen/X86/2007-10-30-LSRCrash.ll
+++ b/llvm/test/CodeGen/X86/2007-10-30-LSRCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define i32 @unique(ptr %full, i32 %p, i32 %len, i32 %mode, i32 %verbos, i32 %flags) {
entry:
diff --git a/llvm/test/CodeGen/X86/2007-10-31-extractelement-i64.ll b/llvm/test/CodeGen/X86/2007-10-31-extractelement-i64.ll
index 137fe8ce99ab8..225d1a210b91b 100644
--- a/llvm/test/CodeGen/X86/2007-10-31-extractelement-i64.ll
+++ b/llvm/test/CodeGen/X86/2007-10-31-extractelement-i64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mattr=sse2
+; RUN: llc -combiner-topological-sorting < %s -mattr=sse2
; ModuleID = 'yyy.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/2007-11-01-ISelCrash.ll b/llvm/test/CodeGen/X86/2007-11-01-ISelCrash.ll
index 269231d66a4e8..2047cd5842ae7 100644
--- a/llvm/test/CodeGen/X86/2007-11-01-ISelCrash.ll
+++ b/llvm/test/CodeGen/X86/2007-11-01-ISelCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
%"struct.K::JL" = type <{ i8 }>
%struct.jv = type { i64 }
diff --git a/llvm/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll b/llvm/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll
index 8c5023c5cb098..b731b021a4219 100644
--- a/llvm/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll
+++ b/llvm/test/CodeGen/X86/2007-11-03-x86-64-q-constraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR1763
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll b/llvm/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll
index 9e32efce48de2..8bbc067efc598 100644
--- a/llvm/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll
+++ b/llvm/test/CodeGen/X86/2007-11-04-LiveIntervalCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu
; PR1766
%struct.dentry = type { ptr }
diff --git a/llvm/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll b/llvm/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll
index 1c9e2787447d7..c96f020941dfa 100644
--- a/llvm/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll
+++ b/llvm/test/CodeGen/X86/2007-11-04-LiveVariablesBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc -combiner-topological-sorting -no-integrated-as < %s -mtriple=x86_64-unknown-linux-gnu
; PR1767
define void @xor_sse_2(i64 %bytes, ptr %p1, ptr %p2) {
diff --git a/llvm/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll b/llvm/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll
index ed2000e89946a..881113b6debe5 100644
--- a/llvm/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll
+++ b/llvm/test/CodeGen/X86/2007-11-04-rip-immediate-constant.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=static -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=static -no-integrated-as | FileCheck %s
; PR1761
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-pc-linux"
diff --git a/llvm/test/CodeGen/X86/2007-11-06-InstrSched.ll b/llvm/test/CodeGen/X86/2007-11-06-InstrSched.ll
index bbce246a5d394..07063b0e63672 100644
--- a/llvm/test/CodeGen/X86/2007-11-06-InstrSched.ll
+++ b/llvm/test/CodeGen/X86/2007-11-06-InstrSched.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
define float @foo(ptr %x, ptr %y, i32 %c) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/2007-11-07-MulBy4.ll b/llvm/test/CodeGen/X86/2007-11-07-MulBy4.ll
index de8aea85896ce..d2b64762920bc 100644
--- a/llvm/test/CodeGen/X86/2007-11-07-MulBy4.ll
+++ b/llvm/test/CodeGen/X86/2007-11-07-MulBy4.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
%struct.eebb = type { ptr, ptr }
%struct.hf = type { ptr, ptr, ptr, i32, i32, ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, %struct.ri, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, [30 x i32], %struct.eebb, i32, ptr }
diff --git a/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll b/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
index 6541693776099..cd27847f293c1 100644
--- a/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
+++ b/llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
; Increment in loop bb.i28.i adjusted to 2, to prevent loop reversal from
; kicking in.
diff --git a/llvm/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll b/llvm/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll
index 566665d4b600a..4302b4a3cfdac 100644
--- a/llvm/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll
+++ b/llvm/test/CodeGen/X86/2007-12-16-BURRSchedCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu
; PR1799
%struct.c34007g__designated___XUB = type { i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll b/llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll
index d9d4424267d73..2fac4be12876b 100644
--- a/llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll
+++ b/llvm/test/CodeGen/X86/2007-12-18-LoadCSEBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=generic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=generic | FileCheck %s
; PR1872
%struct.c34007g__designated___XUB = type { i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/2008-01-08-IllegalCMP.ll b/llvm/test/CodeGen/X86/2008-01-08-IllegalCMP.ll
index 7aec613e2abbc..4d2585dcfa39b 100644
--- a/llvm/test/CodeGen/X86/2008-01-08-IllegalCMP.ll
+++ b/llvm/test/CodeGen/X86/2008-01-08-IllegalCMP.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i686-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll b/llvm/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll
index c90219676a63f..db76052e75598 100644
--- a/llvm/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll
+++ b/llvm/test/CodeGen/X86/2008-01-08-SchedulerCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+cmov -x86-cmov-converter=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+cmov -x86-cmov-converter=false | FileCheck %s
;
; Test scheduling a multi-use compare. We should neither spill flags
; nor clone the compare.
diff --git a/llvm/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll b/llvm/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll
index e8c957b1ff647..eae9c6e3b8f40 100644
--- a/llvm/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll
+++ b/llvm/test/CodeGen/X86/2008-01-09-LongDoubleSin.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -o - | FileCheck %s
; CHECK: sinl
diff --git a/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll b/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
index de07b353e41d9..1a7289485f158 100644
--- a/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
+++ b/llvm/test/CodeGen/X86/2008-01-16-FPStackifierAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -regalloc=fast -optimize-regalloc=0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 -regalloc=fast -optimize-regalloc=0
define void @SolveCubic(double %a, double %b, double %c, double %d, ptr %solutions, ptr %x) {
entry:
diff --git a/llvm/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll b/llvm/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll
index bd1dba617ccf1..2b1c819b7272a 100644
--- a/llvm/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll
+++ b/llvm/test/CodeGen/X86/2008-01-16-InvalidDAGCombineXform.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | not grep IMPLICIT_DEF
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | not grep IMPLICIT_DEF
%struct.node_t = type { ptr, ptr, ptr, ptr, ptr, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/2008-02-05-ISelCrash.ll b/llvm/test/CodeGen/X86/2008-02-05-ISelCrash.ll
index 8863b9a0bf45e..1ea6361a99156 100644
--- a/llvm/test/CodeGen/X86/2008-02-05-ISelCrash.ll
+++ b/llvm/test/CodeGen/X86/2008-02-05-ISelCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR1975
@nodes = external dso_local global i64 ; <ptr> [#uses=2]
diff --git a/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll b/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
index 2033ee01b6b8b..a3a6384eb291d 100644
--- a/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
+++ b/llvm/test/CodeGen/X86/2008-02-06-LoadFoldingBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
; CHECK: xorps {{.*}}{{LCPI0_0|__xmm@}}
define void @casin(ptr sret({ double, double }) %agg.result, double %z.0, double %z.1) nounwind {
diff --git a/llvm/test/CodeGen/X86/2008-02-14-BitMiscompile.ll b/llvm/test/CodeGen/X86/2008-02-14-BitMiscompile.ll
index d3fa16a074769..c3797d7cd9d45 100644
--- a/llvm/test/CodeGen/X86/2008-02-14-BitMiscompile.ll
+++ b/llvm/test/CodeGen/X86/2008-02-14-BitMiscompile.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown | FileCheck %s
define i32 @test(i1 %A) {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll b/llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll
index 6ffafc5587479..118c2059fb1e4 100644
--- a/llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll
+++ b/llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=i686-- -mcpu=yonah -stats 2>&1 | grep "Number of block tails merged" | grep 16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=yonah -stats 2>&1 | grep "Number of block tails merged" | grep 16
; PR1909
@.str = internal constant [48 x i8] c"transformed bounds: (%.2f, %.2f), (%.2f, %.2f)\0A\00" ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll b/llvm/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
index 268bfcc4a9ac4..697a02d42d14f 100644
--- a/llvm/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
+++ b/llvm/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -no-integrated-as < %s | FileCheck %s
; PR2078
; The clobber list says that "ax" is clobbered. Make sure that eax isn't
; allocated to the input/output register.
diff --git a/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll b/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll
index 788d2da789bfe..fa24928e92282 100644
--- a/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll
+++ b/llvm/test/CodeGen/X86/2008-02-22-LocalRegAllocBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -mtriple=i686-- -mattr=+mmx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -regalloc=fast -optimize-regalloc=0 -mtriple=i686-- -mattr=+mmx | FileCheck %s
; PR2082
; Local register allocator was refusing to use ESI, EDI, and EBP so it ran out of
; registers.
diff --git a/llvm/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll b/llvm/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll
index b28de3f523d11..5739a9f1b177d 100644
--- a/llvm/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll
+++ b/llvm/test/CodeGen/X86/2008-02-25-InlineAsmBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -mattr=+sse2
; PR2076
define void @h264_h_loop_filter_luma_mmx2(ptr %pix, i32 %stride, i32 %alpha, i32 %beta, ptr %tc0) nounwind {
diff --git a/llvm/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll
index 6d187b1aaaed6..d7aada02c3dba 100644
--- a/llvm/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2008-02-25-X86-64-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
%struct.XX = type <{ i8 }>
%struct.YY = type { i64 }
diff --git a/llvm/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll b/llvm/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll
index 767f9dbbb2ae7..7576a764c6fce 100644
--- a/llvm/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll
+++ b/llvm/test/CodeGen/X86/2008-02-26-AsmDirectMemOp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -no-integrated-as
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i386-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll b/llvm/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll
index 914f19e5f365a..e3ec5ed283500 100644
--- a/llvm/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll
+++ b/llvm/test/CodeGen/X86/2008-02-27-DeadSlotElimBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
%struct.CompAtom = type <{ %struct.Position, float, i32 }>
%struct.Lattice = type { %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, %struct.Position, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/2008-02-27-PEICrash.ll b/llvm/test/CodeGen/X86/2008-02-27-PEICrash.ll
index a257bf072277d..a1e69a189e47e 100644
--- a/llvm/test/CodeGen/X86/2008-02-27-PEICrash.ll
+++ b/llvm/test/CodeGen/X86/2008-02-27-PEICrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2
define i64 @__divsc3(float %a, float %b, float %c, float %d) nounwind readnone {
entry:
diff --git a/llvm/test/CodeGen/X86/2008-03-06-frem-fpstack.ll b/llvm/test/CodeGen/X86/2008-03-06-frem-fpstack.ll
index 498d6baa8581c..206a80e8cc8eb 100644
--- a/llvm/test/CodeGen/X86/2008-03-06-frem-fpstack.ll
+++ b/llvm/test/CodeGen/X86/2008-03-06-frem-fpstack.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=i386
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=i386
; PR2122
define float @func(float %a, float %b) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/2008-03-07-APIntBug.ll b/llvm/test/CodeGen/X86/2008-03-07-APIntBug.ll
index a7257daa4bea4..3b8910fdffffd 100644
--- a/llvm/test/CodeGen/X86/2008-03-07-APIntBug.ll
+++ b/llvm/test/CodeGen/X86/2008-03-07-APIntBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=i386 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=i386 | FileCheck %s
%struct.CONSTRAINT = type { i32, i32, i32, i32 }
%struct.FIRST_UNION = type { %struct.anon }
diff --git a/llvm/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll b/llvm/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll
index 558c2156e8bb2..9f4af0bda56bd 100644
--- a/llvm/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll
+++ b/llvm/test/CodeGen/X86/2008-03-10-RegAllocInfLoop.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-pc-linux-gnu -relocation-model=pic -frame-pointer=all
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux-gnu -relocation-model=pic -frame-pointer=all
; PR2134
declare fastcc ptr @w_addchar(ptr, ptr, ptr, i8 signext ) nounwind
diff --git a/llvm/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll b/llvm/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll
index 13d8c0df042ab..90c5244accc18 100644
--- a/llvm/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll
+++ b/llvm/test/CodeGen/X86/2008-03-12-ThreadLocalAlias.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic | FileCheck %s
; PR2137
; ModuleID = '1.c'
diff --git a/llvm/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll b/llvm/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll
index 4c14024223f81..0e9fbd065919f 100644
--- a/llvm/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll
+++ b/llvm/test/CodeGen/X86/2008-03-13-TwoAddrPassCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define signext i16 @t(i32 %depth) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/2008-03-14-SpillerCrash.ll b/llvm/test/CodeGen/X86/2008-03-14-SpillerCrash.ll
index c4bb72d7bde2d..31acaeb5a444c 100644
--- a/llvm/test/CodeGen/X86/2008-03-14-SpillerCrash.ll
+++ b/llvm/test/CodeGen/X86/2008-03-14-SpillerCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-pc-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux-gnu
; PR2138
%struct.__locale_struct = type { [13 x ptr], ptr, ptr, ptr, [13 x ptr] }
diff --git a/llvm/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll b/llvm/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll
index 163b250c6929f..b1b240ecee315 100644
--- a/llvm/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll
+++ b/llvm/test/CodeGen/X86/2008-03-19-DAGCombinerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define i32 @t() nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll b/llvm/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll
index 16b2755720598..137ac05178467 100644
--- a/llvm/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll
+++ b/llvm/test/CodeGen/X86/2008-03-23-DarwinAsmComments.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -asm-verbose | grep "#" | not grep -v "##"
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -asm-verbose | grep "#" | not grep -v "##"
%struct.AGenericCall = type { ptr, ptr, ptr }
%struct.AGenericManager = type <{ i8 }>
diff --git a/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll b/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll
index 66d6efdc35fa0..3a66ad80258d5 100644
--- a/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll
+++ b/llvm/test/CodeGen/X86/2008-03-25-TwoAddrPassBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2
define void @t() {
entry:
diff --git a/llvm/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll b/llvm/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll
index 180d6719837b2..5ab7bd99e3cc5 100644
--- a/llvm/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll
+++ b/llvm/test/CodeGen/X86/2008-03-31-SpillerFoldingBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -frame-pointer=all | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -relocation-model=pic -frame-pointer=all | FileCheck %s
; Don't fold re-materialized load into a two address instruction
%"struct.Smarts::Runnable" = type { ptr, i32 }
diff --git a/llvm/test/CodeGen/X86/2008-04-02-unnamedEH.ll b/llvm/test/CodeGen/X86/2008-04-02-unnamedEH.ll
index 70812eaf70ff5..ae945888e976a 100644
--- a/llvm/test/CodeGen/X86/2008-04-02-unnamedEH.ll
+++ b/llvm/test/CodeGen/X86/2008-04-02-unnamedEH.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll b/llvm/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll
index 0c792644fc5c8..a00287d6685e6 100644
--- a/llvm/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll
+++ b/llvm/test/CodeGen/X86/2008-04-08-CoalescerCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux -mattr=+mmx
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux -mattr=+mmx
define i32 @t2() nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/2008-04-09-BranchFolding.ll b/llvm/test/CodeGen/X86/2008-04-09-BranchFolding.ll
index 45b5ce562d805..5809581c0561d 100644
--- a/llvm/test/CodeGen/X86/2008-04-09-BranchFolding.ll
+++ b/llvm/test/CodeGen/X86/2008-04-09-BranchFolding.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
%struct..0anon = type { i32 }
%struct.binding_level = type { ptr, ptr, ptr, ptr, ptr, ptr, i8, i8, i8, i8, i8, i32, ptr }
diff --git a/llvm/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll b/llvm/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll
index d2490f5613ecb..187c0e4c517ec 100644
--- a/llvm/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll
+++ b/llvm/test/CodeGen/X86/2008-04-15-LiveVariableBug.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -frame-pointer=all -O0 -regalloc=fast
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -frame-pointer=all -O0 -regalloc=fast
; PR5534
%struct.CGPoint = type { double, double }
diff --git a/llvm/test/CodeGen/X86/2008-04-16-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-04-16-CoalescerBug.ll
index 685cd3c87e7a3..4b6a899f056c9 100644
--- a/llvm/test/CodeGen/X86/2008-04-16-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2008-04-16-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define void @Hubba(ptr %saveunder, i32 %firstBlob, i32 %select) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll b/llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll
index b32afdc2214e0..232b426a915f0 100644
--- a/llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll
+++ b/llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -disable-cgp-branch-opts | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -disable-cgp-branch-opts | FileCheck %s
%struct.DBC_t = type { i32, ptr, i16, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, ptr, ptr, ptr, ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i16, i16, ptr, i8, i16, ptr, i16 }
%struct.DRVOPT = type { i16, i32, i8, ptr }
diff --git a/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
index 3913e93b83a66..21e3eec7b4034 100644
--- a/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2008-04-17-CoalescerBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin | FileCheck %s
; Make sure xorl operands are 32-bit registers.
%struct.tm = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr }
diff --git a/llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll b/llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll
index 50e2aac794a85..bee19c47871af 100644
--- a/llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll
+++ b/llvm/test/CodeGen/X86/2008-04-24-MemCpyBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; Don't accidentally add the offset twice for trailing bytes.
%struct.S63 = type { [63 x i8] }
diff --git a/llvm/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll b/llvm/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll
index 7e781b8a1fb87..f4c2c8e71c481 100644
--- a/llvm/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll
+++ b/llvm/test/CodeGen/X86/2008-04-24-pblendw-fold-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mattr=+sse4.1
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sse4.1
; rdar://5886601
; gcc testsuite: gcc.target/i386/sse4_1-pblendw.c
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll b/llvm/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll
index 6d45f1f00301a..e84893820cefd 100644
--- a/llvm/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll
+++ b/llvm/test/CodeGen/X86/2008-04-26-Asm-Optimize-Imm.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -no-integrated-as < %s | FileCheck %s
; rdar://5720231
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/2008-04-28-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-04-28-CoalescerBug.ll
index c95fc00b3ee6d..ff02bd331fa82 100644
--- a/llvm/test/CodeGen/X86/2008-04-28-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2008-04-28-CoalescerBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
%struct.BITMAP = type { i16, i16, i32, i32, i32, i32, i32, i32, ptr, ptr }
%struct.BltData = type { float, float, float, float }
diff --git a/llvm/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll b/llvm/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll
index f819a4cd13964..50cb9e5645ee4 100644
--- a/llvm/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll
+++ b/llvm/test/CodeGen/X86/2008-04-28-CyclicSchedUnit.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define i64 @t(i64 %maxIdleDuration) nounwind {
call void asm sideeffect "wrmsr", "{cx},A,~{dirflag},~{fpsr},~{flags}"( i32 416, i64 0 ) nounwind
diff --git a/llvm/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll b/llvm/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll
index ff7a99ada7e50..2b0bd72c2a9b3 100644
--- a/llvm/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll
+++ b/llvm/test/CodeGen/X86/2008-05-01-InvalidOrdCompare.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; rdar://5902801
declare void @test2()
diff --git a/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll b/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll
index 5478b1c180ce8..d3c526ceb770d 100644
--- a/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll
+++ b/llvm/test/CodeGen/X86/2008-05-09-PHIElimBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
%struct.V = type { <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x i32>, ptr, ptr, ptr, ptr, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, float, i32, i32, i32, i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll b/llvm/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll
index a20aeac7a3a89..4a0ef92bd2c60 100644
--- a/llvm/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll
+++ b/llvm/test/CodeGen/X86/2008-05-09-ShuffleLoweringBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2
define fastcc void @glgVectorFloatConversion() nounwind {
%tmp12745 = load <4 x float>, ptr null, align 16 ; <<4 x float>> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll
index 58d626f5866e7..11d8d01ef446d 100644
--- a/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2008-05-21-CoalescerBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -O0 -fast-isel=false -optimize-regalloc -regalloc=basic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -O0 -fast-isel=false -optimize-regalloc -regalloc=basic | FileCheck %s
; PR2343
%llvm.dbg.anchor.type = type { i32, i32 }
diff --git a/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll b/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll
index 5383268ef532d..2c1e4787f0208 100644
--- a/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll
+++ b/llvm/test/CodeGen/X86/2008-05-22-FoldUnalignedLoad.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=penryn | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=penryn | FileCheck %s
define void @a(ptr %x) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/2008-05-28-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-05-28-CoalescerBug.ll
index 32bf8d494165a..cf6d692166f93 100644
--- a/llvm/test/CodeGen/X86/2008-05-28-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2008-05-28-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu
; PR2289
define void @_ada_ca11001() {
diff --git a/llvm/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll b/llvm/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll
index dcce33b0bf307..0722eb246a886 100644
--- a/llvm/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll
+++ b/llvm/test/CodeGen/X86/2008-05-28-LocalRegAllocBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -regalloc=fast -optimize-regalloc=0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -regalloc=fast -optimize-regalloc=0
@_ZTVN10Evaluation10GridOutputILi3EEE = external constant [5 x ptr] ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll b/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll
index de3da956cd5a2..715e4df4748b0 100644
--- a/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll
+++ b/llvm/test/CodeGen/X86/2008-06-13-NotVolatileLoadStore.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-- -fixup-byte-word-insts=0 | FileCheck %s -check-prefix=CHECK -check-prefix=BWOFF
-; RUN: llc < %s -mtriple=i686-- -fixup-byte-word-insts=1 | FileCheck %s -check-prefix=CHECK -check-prefix=BWON
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -fixup-byte-word-insts=0 | FileCheck %s -check-prefix=CHECK -check-prefix=BWOFF
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -fixup-byte-word-insts=1 | FileCheck %s -check-prefix=CHECK -check-prefix=BWON
; These transforms are turned off for load volatiles and stores.
; Check that they weren't turned off for all loads and stores!
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/2008-06-16-SubregsBug.ll b/llvm/test/CodeGen/X86/2008-06-16-SubregsBug.ll
index 00ffea903079e..60f28e5e79674 100644
--- a/llvm/test/CodeGen/X86/2008-06-16-SubregsBug.ll
+++ b/llvm/test/CodeGen/X86/2008-06-16-SubregsBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin | FileCheck %s
define i16 @test(ptr %tmp179) nounwind {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/2008-06-25-VecISelBug.ll b/llvm/test/CodeGen/X86/2008-06-25-VecISelBug.ll
index d56f526cd156a..10997d983a4f1 100644
--- a/llvm/test/CodeGen/X86/2008-06-25-VecISelBug.ll
+++ b/llvm/test/CodeGen/X86/2008-06-25-VecISelBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
define void @t() nounwind {
; CHECK-LABEL: t:
diff --git a/llvm/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll b/llvm/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll
index 440452bdfc061..93918cd975efd 100644
--- a/llvm/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll
+++ b/llvm/test/CodeGen/X86/2008-07-07-DanglingDeadInsts.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9
%struct.ogg_stream_state = type { ptr, i32, i32, i32, ptr, ptr, i32, i32, i32, i32, [282 x i8], i32, i32, i32, i32, i32, i64, i64 }
%struct.res_state = type { i32, i32, i32, i32, ptr, ptr, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll b/llvm/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll
index c818d14d5039d..48ac239ef312c 100644
--- a/llvm/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll
+++ b/llvm/test/CodeGen/X86/2008-07-09-ELFSectionAttributes.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; PR2024
; CHECK: .init.text,"ax"
diff --git a/llvm/test/CodeGen/X86/2008-07-11-SHLBy1.ll b/llvm/test/CodeGen/X86/2008-07-11-SHLBy1.ll
index 7779d2eb32ab8..35100463b75b0 100644
--- a/llvm/test/CodeGen/X86/2008-07-11-SHLBy1.ll
+++ b/llvm/test/CodeGen/X86/2008-07-11-SHLBy1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define i128 @sl(i128 %x) {
; CHECK-LABEL: sl:
diff --git a/llvm/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll b/llvm/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll
index 91b9c1c816eaf..9075bcc916019 100644
--- a/llvm/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll
+++ b/llvm/test/CodeGen/X86/2008-07-16-CoalescerCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin
%struct.SV = type { ptr, i64, i64 }
@"\01LC25" = external constant [8 x i8] ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2008-07-19-movups-spills.ll b/llvm/test/CodeGen/X86/2008-07-19-movups-spills.ll
index 01ebca1f4bf1d..4f77e3cf99741 100644
--- a/llvm/test/CodeGen/X86/2008-07-19-movups-spills.ll
+++ b/llvm/test/CodeGen/X86/2008-07-19-movups-spills.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux -mattr=sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux -mattr=sse2 | FileCheck %s
; PR2539
; PR8969 - make 32-bit linux have a 16-byte aligned stack
; Verify that movups is still generated with an aligned stack for the globals
diff --git a/llvm/test/CodeGen/X86/2008-07-22-CombinerCrash.ll b/llvm/test/CodeGen/X86/2008-07-22-CombinerCrash.ll
index 71beace3d4d3f..29afe84dd204c 100644
--- a/llvm/test/CodeGen/X86/2008-07-22-CombinerCrash.ll
+++ b/llvm/test/CodeGen/X86/2008-07-22-CombinerCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2
; PR2566
@0 = external dso_local global i16 ; <ptr>:0 [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2008-07-23-VSetCC.ll b/llvm/test/CodeGen/X86/2008-07-23-VSetCC.ll
index e0b7c004fc2aa..223c9cec4df3b 100644
--- a/llvm/test/CodeGen/X86/2008-07-23-VSetCC.ll
+++ b/llvm/test/CodeGen/X86/2008-07-23-VSetCC.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=pentium
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=pentium
; PR2575
define void @entry(i32 %m_task_id, i32 %start_x, i32 %end_x) nounwind {
diff --git a/llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll b/llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll
index 5086ed40a43a2..92e59999cdc95 100644
--- a/llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll
+++ b/llvm/test/CodeGen/X86/2008-08-06-CmpStride.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- < %s | FileCheck %s
@.str = internal constant [4 x i8] c"%d\0A\00"
diff --git a/llvm/test/CodeGen/X86/2008-08-06-RewriterBug.ll b/llvm/test/CodeGen/X86/2008-08-06-RewriterBug.ll
index 2c39dc6b4d844..feaa49968f319 100644
--- a/llvm/test/CodeGen/X86/2008-08-06-RewriterBug.ll
+++ b/llvm/test/CodeGen/X86/2008-08-06-RewriterBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR2596
@data = external global [400 x i64] ; <ptr> [#uses=5]
diff --git a/llvm/test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll b/llvm/test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll
index eace85b254456..afea744ca0b66 100644
--- a/llvm/test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll
+++ b/llvm/test/CodeGen/X86/2008-08-17-UComiCodeGenBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
define i32 @foo(<4 x float> %a, <4 x float> %b) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll b/llvm/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll
index 4a4477823a61d..66898cd333246 100644
--- a/llvm/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll
+++ b/llvm/test/CodeGen/X86/2008-08-23-64Bit-maskmovq.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
%struct.DrawHelper = type { ptr, ptr, ptr, ptr, ptr }
%struct.QBasicAtomic = type { i32 }
diff --git a/llvm/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll b/llvm/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll
index 6be9281dc9234..408dc807ee76f 100644
--- a/llvm/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll
+++ b/llvm/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mcpu=corei7 < %s -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 < %s -verify-machineinstrs | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i386-pc-linux"
diff --git a/llvm/test/CodeGen/X86/2008-08-31-EH_RETURN64.ll b/llvm/test/CodeGen/X86/2008-08-31-EH_RETURN64.ll
index 51dbaab681e87..410f3f764a86e 100644
--- a/llvm/test/CodeGen/X86/2008-08-31-EH_RETURN64.ll
+++ b/llvm/test/CodeGen/X86/2008-08-31-EH_RETURN64.ll
@@ -1,5 +1,5 @@
; Check that eh_return & unwind_init were properly lowered
-; RUN: llc < %s -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll b/llvm/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll
index 20673a177ac31..d7af9a12b46d2 100644
--- a/llvm/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll
+++ b/llvm/test/CodeGen/X86/2008-09-05-sinttofp-2xi32.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2,+mmx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2,+mmx | FileCheck %s
; Originally from PR2687, but things don't work that way any more.
; there are no MMX instructions here; we use XMM.
diff --git a/llvm/test/CodeGen/X86/2008-09-09-LinearScanBug.ll b/llvm/test/CodeGen/X86/2008-09-09-LinearScanBug.ll
index b51810ea08186..d2de6d22e2933 100644
--- a/llvm/test/CodeGen/X86/2008-09-09-LinearScanBug.ll
+++ b/llvm/test/CodeGen/X86/2008-09-09-LinearScanBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin
; PR2757
@g_3 = external global i32 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug.ll
index 90dd573f6ac6d..9727e9bc4a9b7 100644
--- a/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR2783
@g_15 = external dso_local global i16 ; <ptr> [#uses=2]
diff --git a/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll b/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
index 53175413980f1..1669868e9b4f8 100644
--- a/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
+++ b/llvm/test/CodeGen/X86/2008-09-11-CoalescerBug2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686--
-; RUN: llc -pre-RA-sched=source < %s -mtriple=i686-unknown-linux -mcpu=corei7 | FileCheck %s --check-prefix=SOURCE-SCHED
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting -pre-RA-sched=source < %s -mtriple=i686-unknown-linux -mcpu=corei7 | FileCheck %s --check-prefix=SOURCE-SCHED
; PR2748
@g_73 = external dso_local global i32
diff --git a/llvm/test/CodeGen/X86/2008-09-17-inline-asm-1.ll b/llvm/test/CodeGen/X86/2008-09-17-inline-asm-1.ll
index abd9becc70f30..192e0a8e851df 100644
--- a/llvm/test/CodeGen/X86/2008-09-17-inline-asm-1.ll
+++ b/llvm/test/CodeGen/X86/2008-09-17-inline-asm-1.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s | FileCheck %s
-; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -regalloc=fast -optimize-regalloc=0 | FileCheck %s
; %0 must not be put in EAX or EDX.
; In the first asm, $0 and $2 must not be put in EAX.
diff --git a/llvm/test/CodeGen/X86/2008-09-18-inline-asm-2.ll b/llvm/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
index 7e392e5481087..8d9f48c734f87 100644
--- a/llvm/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
+++ b/llvm/test/CodeGen/X86/2008-09-18-inline-asm-2.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -no-integrated-as | FileCheck %s
-; RUN: llc < %s -regalloc=basic -no-integrated-as | FileCheck %s
-; RUN: llc < %s -regalloc=greedy -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -regalloc=fast -optimize-regalloc=0 -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -regalloc=basic -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -regalloc=greedy -no-integrated-as | FileCheck %s
; The 1st, 2nd, 3rd and 5th registers must all be different. The registers
; referenced in the 4th and 6th operands must not be the same as the 1st or 5th
diff --git a/llvm/test/CodeGen/X86/2008-09-19-RegAllocBug.ll b/llvm/test/CodeGen/X86/2008-09-19-RegAllocBug.ll
index ab1c9b8e23603..785ad3bb11526 100644
--- a/llvm/test/CodeGen/X86/2008-09-19-RegAllocBug.ll
+++ b/llvm/test/CodeGen/X86/2008-09-19-RegAllocBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin
; PR2808
@g_3 = external global i32 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2008-09-25-sseregparm-1.ll b/llvm/test/CodeGen/X86/2008-09-25-sseregparm-1.ll
index 6288f7e1d039c..3e5cb680d1c93 100644
--- a/llvm/test/CodeGen/X86/2008-09-25-sseregparm-1.ll
+++ b/llvm/test/CodeGen/X86/2008-09-25-sseregparm-1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
; check 'inreg' attribute for sse_regparm
define inreg double @foo1() nounwind {
diff --git a/llvm/test/CodeGen/X86/2008-09-26-FrameAddrBug.ll b/llvm/test/CodeGen/X86/2008-09-26-FrameAddrBug.ll
index 064f3a607357a..c8d570863a08c 100644
--- a/llvm/test/CodeGen/X86/2008-09-26-FrameAddrBug.ll
+++ b/llvm/test/CodeGen/X86/2008-09-26-FrameAddrBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9
%struct._Unwind_Context = type { [18 x ptr], ptr, ptr, ptr, %struct.dwarf_eh_bases, i32, i32, i32, [18 x i8] }
%struct._Unwind_Exception = type { i64, ptr, i32, i32, [3 x i32] }
diff --git a/llvm/test/CodeGen/X86/2008-09-29-ReMatBug.ll b/llvm/test/CodeGen/X86/2008-09-29-ReMatBug.ll
index 04c53c3365d57..92d8c892fa46a 100644
--- a/llvm/test/CodeGen/X86/2008-09-29-ReMatBug.ll
+++ b/llvm/test/CodeGen/X86/2008-09-29-ReMatBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -frame-pointer=all
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -relocation-model=pic -frame-pointer=all
%struct..0objc_selector = type opaque
%struct.NSString = type opaque
diff --git a/llvm/test/CodeGen/X86/2008-09-29-VolatileBug.ll b/llvm/test/CodeGen/X86/2008-09-29-VolatileBug.ll
index 59545e277e87f..b02183fb2ba40 100644
--- a/llvm/test/CodeGen/X86/2008-09-29-VolatileBug.ll
+++ b/llvm/test/CodeGen/X86/2008-09-29-VolatileBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; PR2835
@g_407 = internal global i32 0 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll b/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll
index 59afc7bd9c9d7..da9824a0a21aa 100644
--- a/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll
+++ b/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=-sse2,-sse3,-sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=-sse2,-sse3,-sse | FileCheck %s
; ModuleID = 'nan.bc'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-f80:32:32-v64:64:64-v128:128:128-a0:0:64"
diff --git a/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll b/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll
index aa54767fdedee..9180ae5e0f8a2 100644
--- a/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll
+++ b/llvm/test/CodeGen/X86/2008-10-06-x87ld-nan-2.ll
@@ -2,7 +2,7 @@
; ModuleID = 'nan.bc'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-f80:32:32-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-apple-darwin8"
-; RUN: llc < %s -mattr=-sse2,-sse3,-sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=-sse2,-sse3,-sse | FileCheck %s
; it is not safe to shorten any of these NaNs.
declare x86_stdcallcc void @_D3nan5printFeZv(x86_fp80 %f)
diff --git a/llvm/test/CodeGen/X86/2008-10-07-SSEISelBug.ll b/llvm/test/CodeGen/X86/2008-10-07-SSEISelBug.ll
index 7e1c89ac688ce..18ad29beaa3e6 100644
--- a/llvm/test/CodeGen/X86/2008-10-07-SSEISelBug.ll
+++ b/llvm/test/CodeGen/X86/2008-10-07-SSEISelBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse,-sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse,-sse2
define <4 x float> @f(float %w) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/2008-10-11-CallCrash.ll b/llvm/test/CodeGen/X86/2008-10-11-CallCrash.ll
index 2e754897d4921..66827e98682b2 100644
--- a/llvm/test/CodeGen/X86/2008-10-11-CallCrash.ll
+++ b/llvm/test/CodeGen/X86/2008-10-11-CallCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR2735
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin7"
diff --git a/llvm/test/CodeGen/X86/2008-10-13-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-10-13-CoalescerBug.ll
index b8f2c1f47b0b6..48f82aa9795b1 100644
--- a/llvm/test/CodeGen/X86/2008-10-13-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2008-10-13-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR2775
define i32 @func_77(i8 zeroext %p_79) nounwind {
diff --git a/llvm/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll b/llvm/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll
index 8eb3864617027..3107311d9f5b1 100644
--- a/llvm/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll
+++ b/llvm/test/CodeGen/X86/2008-10-16-VecUnaryOp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2
; PR2762
define void @foo(ptr %p, ptr %q) {
%n = load <4 x i32>, ptr %p
diff --git a/llvm/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll b/llvm/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll
index 29ed15fbd179d..de113d9078aec 100644
--- a/llvm/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll
+++ b/llvm/test/CodeGen/X86/2008-10-17-Asm64bitRConstraint.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-- -no-integrated-as
-; RUN: llc < %s -mtriple=x86_64-- -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -no-integrated-as
define void @test(i64 %x) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll b/llvm/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll
index 45d702ec368a6..0567bfde53432 100644
--- a/llvm/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll
+++ b/llvm/test/CodeGen/X86/2008-10-20-AsmDoubleInI32.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-- -no-integrated-as
-; RUN: llc < %s -mtriple=x86_64-- -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -no-integrated-as
; from gcc.c-torture/compile/920520-1.c
diff --git a/llvm/test/CodeGen/X86/2008-10-24-FlippedCompare.ll b/llvm/test/CodeGen/X86/2008-10-24-FlippedCompare.ll
index 7db7dc9aa313d..1fb85fe569ec0 100644
--- a/llvm/test/CodeGen/X86/2008-10-24-FlippedCompare.ll
+++ b/llvm/test/CodeGen/X86/2008-10-24-FlippedCompare.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
define void @f(float %wt) {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/2008-10-27-CoalescerBug.ll b/llvm/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
index 55807ff24320e..88e26ecf5e9bc 100644
--- a/llvm/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats 2>&1 | FileCheck %s
; Now this test spills one register. But a reload in the loop is cheaper than
; the divsd so it's a win.
diff --git a/llvm/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll b/llvm/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll
index c16a34256e59b..82c2bec51306a 100644
--- a/llvm/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll
+++ b/llvm/test/CodeGen/X86/2008-10-29-ExpandVAARG.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR2977
define ptr @ap_php_conv_p2(){
entry:
diff --git a/llvm/test/CodeGen/X86/2008-11-03-F80VAARG.ll b/llvm/test/CodeGen/X86/2008-11-03-F80VAARG.ll
index d919a755148fe..e39c1de0db94e 100644
--- a/llvm/test/CodeGen/X86/2008-11-03-F80VAARG.ll
+++ b/llvm/test/CodeGen/X86/2008-11-03-F80VAARG.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -o - | FileCheck %s
declare void @llvm.va_start(ptr) nounwind
diff --git a/llvm/test/CodeGen/X86/2008-11-06-testb.ll b/llvm/test/CodeGen/X86/2008-11-06-testb.ll
index 125b5b3ac7b79..9688250bbda37 100644
--- a/llvm/test/CodeGen/X86/2008-11-06-testb.ll
+++ b/llvm/test/CodeGen/X86/2008-11-06-testb.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin | FileCheck %s
; CHECK: testb
diff --git a/llvm/test/CodeGen/X86/2008-11-13-inlineasm-3.ll b/llvm/test/CodeGen/X86/2008-11-13-inlineasm-3.ll
index 80ecd1075430b..f90f7e8b2a7ab 100644
--- a/llvm/test/CodeGen/X86/2008-11-13-inlineasm-3.ll
+++ b/llvm/test/CodeGen/X86/2008-11-13-inlineasm-3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu
; PR 1779
; Using 'A' constraint and a tied constraint together used to crash.
; ModuleID = '<stdin>'
diff --git a/llvm/test/CodeGen/X86/2008-11-29-ULT-Sign.ll b/llvm/test/CodeGen/X86/2008-11-29-ULT-Sign.ll
index 1a4bb99663c54..83939f6fcb02c 100644
--- a/llvm/test/CodeGen/X86/2008-11-29-ULT-Sign.ll
+++ b/llvm/test/CodeGen/X86/2008-11-29-ULT-Sign.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i686-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2008-12-01-SpillerAssert.ll b/llvm/test/CodeGen/X86/2008-12-01-SpillerAssert.ll
index 4299767e3e802..bab6d769e1609 100644
--- a/llvm/test/CodeGen/X86/2008-12-01-SpillerAssert.ll
+++ b/llvm/test/CodeGen/X86/2008-12-01-SpillerAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu
; PR3124
%struct.cpuinfo_x86 = type { i8, i8, i8, i8, i32, i8, i8, i8, i32, i32, [9 x i32], [16 x i8], [64 x i8], i32, i32, i32, i64, %struct.cpumask_t, i16, i16, i16, i16, i16, i16, i16, i16, i32 }
diff --git a/llvm/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll b/llvm/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll
index c2a7d6be8baa0..a1453d4723b10 100644
--- a/llvm/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll
+++ b/llvm/test/CodeGen/X86/2008-12-01-loop-iv-used-outside-loop.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin | FileCheck %s
; The inner loop should use [reg] addressing, not [reg+reg] addressing.
; rdar://6403965
diff --git a/llvm/test/CodeGen/X86/2008-12-02-IllegalResultType.ll b/llvm/test/CodeGen/X86/2008-12-02-IllegalResultType.ll
index f59dc72db2c43..f88434a78791f 100644
--- a/llvm/test/CodeGen/X86/2008-12-02-IllegalResultType.ll
+++ b/llvm/test/CodeGen/X86/2008-12-02-IllegalResultType.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR3117
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i386-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2008-12-02-dagcombine-2.ll b/llvm/test/CodeGen/X86/2008-12-02-dagcombine-2.ll
index f34fbb209bee3..bc92760f6d377 100644
--- a/llvm/test/CodeGen/X86/2008-12-02-dagcombine-2.ll
+++ b/llvm/test/CodeGen/X86/2008-12-02-dagcombine-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; a - a should be found and removed, leaving refs to only L and P
diff --git a/llvm/test/CodeGen/X86/2008-12-02-dagcombine-3.ll b/llvm/test/CodeGen/X86/2008-12-02-dagcombine-3.ll
index 79ac6c9b0919c..63e0b2594c58f 100644
--- a/llvm/test/CodeGen/X86/2008-12-02-dagcombine-3.ll
+++ b/llvm/test/CodeGen/X86/2008-12-02-dagcombine-3.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
diff --git a/llvm/test/CodeGen/X86/2008-12-16-dagcombine-4.ll b/llvm/test/CodeGen/X86/2008-12-16-dagcombine-4.ll
index 28b064d33ef6e..f985f8c740965 100644
--- a/llvm/test/CodeGen/X86/2008-12-16-dagcombine-4.ll
+++ b/llvm/test/CodeGen/X86/2008-12-16-dagcombine-4.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; a - a should be found and removed, leaving refs to only L and P
diff --git a/llvm/test/CodeGen/X86/2008-12-19-EarlyClobberBug.ll b/llvm/test/CodeGen/X86/2008-12-19-EarlyClobberBug.ll
index 4c6e04f71c781..8652ef215b435 100644
--- a/llvm/test/CodeGen/X86/2008-12-19-EarlyClobberBug.ll
+++ b/llvm/test/CodeGen/X86/2008-12-19-EarlyClobberBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin -asm-verbose=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i386-apple-darwin -asm-verbose=0 | FileCheck %s
; PR3149
; Make sure the copy after inline asm is not coalesced away.
diff --git a/llvm/test/CodeGen/X86/2008-12-22-dagcombine-5.ll b/llvm/test/CodeGen/X86/2008-12-22-dagcombine-5.ll
index ef0cd25cc7423..8d222593bdad1 100644
--- a/llvm/test/CodeGen/X86/2008-12-22-dagcombine-5.ll
+++ b/llvm/test/CodeGen/X86/2008-12-22-dagcombine-5.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; -(-a) - a should be found and removed, leaving refs to only L and P
diff --git a/llvm/test/CodeGen/X86/2008-12-23-crazy-address.ll b/llvm/test/CodeGen/X86/2008-12-23-crazy-address.ll
index 54f85b8f73817..c53dee85e9d97 100644
--- a/llvm/test/CodeGen/X86/2008-12-23-crazy-address.ll
+++ b/llvm/test/CodeGen/X86/2008-12-23-crazy-address.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -relocation-model=static | FileCheck %s
@X = external dso_local global [0 x i32]
diff --git a/llvm/test/CodeGen/X86/2008-12-23-dagcombine-6.ll b/llvm/test/CodeGen/X86/2008-12-23-dagcombine-6.ll
index 250415522c619..a6061eb7420d8 100644
--- a/llvm/test/CodeGen/X86/2008-12-23-dagcombine-6.ll
+++ b/llvm/test/CodeGen/X86/2008-12-23-dagcombine-6.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.5"
; a - a should be found and removed, leaving refs to only L and P
diff --git a/llvm/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll b/llvm/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll
index d509a6c63f796..cffb3f032346d 100644
--- a/llvm/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll
+++ b/llvm/test/CodeGen/X86/2009-01-13-DoubleUpdate.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -enable-legalize-types-checking
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 -enable-legalize-types-checking
declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/2009-01-16-SchedulerBug.ll b/llvm/test/CodeGen/X86/2009-01-16-SchedulerBug.ll
index 99203e8926205..76ac550da5187 100644
--- a/llvm/test/CodeGen/X86/2009-01-16-SchedulerBug.ll
+++ b/llvm/test/CodeGen/X86/2009-01-16-SchedulerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin
; rdar://6501631
%CF = type { %Register }
diff --git a/llvm/test/CodeGen/X86/2009-01-16-UIntToFP.ll b/llvm/test/CodeGen/X86/2009-01-16-UIntToFP.ll
index bc7df2a603231..2d81aa6c132a4 100644
--- a/llvm/test/CodeGen/X86/2009-01-16-UIntToFP.ll
+++ b/llvm/test/CodeGen/X86/2009-01-16-UIntToFP.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/2009-01-18-ConstantExprCrash.ll b/llvm/test/CodeGen/X86/2009-01-18-ConstantExprCrash.ll
index c5541d65c6c3a..f84b6bd7bd097 100644
--- a/llvm/test/CodeGen/X86/2009-01-18-ConstantExprCrash.ll
+++ b/llvm/test/CodeGen/X86/2009-01-18-ConstantExprCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; rdar://6505632
; reduced from 483.xalancbmk
diff --git a/llvm/test/CodeGen/X86/2009-01-25-NoSSE.ll b/llvm/test/CodeGen/X86/2009-01-25-NoSSE.ll
index e3f4052d692c0..504e0c0421dfb 100644
--- a/llvm/test/CodeGen/X86/2009-01-25-NoSSE.ll
+++ b/llvm/test/CodeGen/X86/2009-01-25-NoSSE.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mattr=-sse,-sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=-sse,-sse2 | FileCheck %s
; PR3402
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/2009-01-26-WrongCheck.ll b/llvm/test/CodeGen/X86/2009-01-26-WrongCheck.ll
index c89e807c68f4a..d2743ec31f389 100644
--- a/llvm/test/CodeGen/X86/2009-01-26-WrongCheck.ll
+++ b/llvm/test/CodeGen/X86/2009-01-26-WrongCheck.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -enable-legalize-types-checking
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -enable-legalize-types-checking
; PR3393
define void @foo(i32 inreg %x) {
diff --git a/llvm/test/CodeGen/X86/2009-01-27-NullStrings.ll b/llvm/test/CodeGen/X86/2009-01-27-NullStrings.ll
index b55e25e0e25bf..ee9b7bec94217 100644
--- a/llvm/test/CodeGen/X86/2009-01-27-NullStrings.ll
+++ b/llvm/test/CodeGen/X86/2009-01-27-NullStrings.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin | FileCheck %s
; CHECK: .section __TEXT,__cstring,cstring_literals
@x = internal unnamed_addr constant [1 x i8] zeroinitializer ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2009-01-31-BigShift.ll b/llvm/test/CodeGen/X86/2009-01-31-BigShift.ll
index 3a151e898048a..a4b5513be7325 100644
--- a/llvm/test/CodeGen/X86/2009-01-31-BigShift.ll
+++ b/llvm/test/CodeGen/X86/2009-01-31-BigShift.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; PR3401
define void @x(i288 %i) nounwind {
diff --git a/llvm/test/CodeGen/X86/2009-01-31-BigShift2.ll b/llvm/test/CodeGen/X86/2009-01-31-BigShift2.ll
index 38240e8c1e2bd..935f3c06724cc 100644
--- a/llvm/test/CodeGen/X86/2009-01-31-BigShift2.ll
+++ b/llvm/test/CodeGen/X86/2009-01-31-BigShift2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; PR3449
define void @test(ptr %P, ptr %Q) nounwind {
diff --git a/llvm/test/CodeGen/X86/2009-01-31-BigShift3.ll b/llvm/test/CodeGen/X86/2009-01-31-BigShift3.ll
index f4d24ae16470c..4563cbb10fa23 100644
--- a/llvm/test/CodeGen/X86/2009-01-31-BigShift3.ll
+++ b/llvm/test/CodeGen/X86/2009-01-31-BigShift3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR3450
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/2009-02-01-LargeMask.ll b/llvm/test/CodeGen/X86/2009-02-01-LargeMask.ll
index 6a45a766dbacc..8d2187e913a7d 100644
--- a/llvm/test/CodeGen/X86/2009-02-01-LargeMask.ll
+++ b/llvm/test/CodeGen/X86/2009-02-01-LargeMask.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR3453
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
diff --git a/llvm/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll b/llvm/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll
index 648caf0788802..fd5f781f6e94c 100644
--- a/llvm/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll
+++ b/llvm/test/CodeGen/X86/2009-02-03-AnalyzedTwice.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR3411
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
diff --git a/llvm/test/CodeGen/X86/2009-02-04-sext-i64-gep.ll b/llvm/test/CodeGen/X86/2009-02-04-sext-i64-gep.ll
index 0329b8419aba5..b380add51d953 100644
--- a/llvm/test/CodeGen/X86/2009-02-04-sext-i64-gep.ll
+++ b/llvm/test/CodeGen/X86/2009-02-04-sext-i64-gep.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | grep p-92
+; RUN: llc -combiner-topological-sorting < %s | grep p-92
; PR3481
; The offset should print as -92, not +17179869092
diff --git a/llvm/test/CodeGen/X86/2009-02-08-CoalescerBug.ll b/llvm/test/CodeGen/X86/2009-02-08-CoalescerBug.ll
index c1a7823ad45de..37f2d6b3c0a3e 100644
--- a/llvm/test/CodeGen/X86/2009-02-08-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2009-02-08-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR3486
define i32 @foo(i8 signext %p_26) nounwind {
diff --git a/llvm/test/CodeGen/X86/2009-02-09-ivs-different-sizes.ll b/llvm/test/CodeGen/X86/2009-02-09-ivs-different-sizes.ll
index 318d9d1b723a6..90a068ad2fc2c 100644
--- a/llvm/test/CodeGen/X86/2009-02-09-ivs-different-sizes.ll
+++ b/llvm/test/CodeGen/X86/2009-02-09-ivs-different-sizes.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; This used to crash.
; ModuleID = 'bugpoint-reduced-simplified.bc'
target datalayout ="e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/2009-02-11-codegenprepare-reuse.ll b/llvm/test/CodeGen/X86/2009-02-11-codegenprepare-reuse.ll
index bf62f3f841ee3..ab05fd1f87121 100644
--- a/llvm/test/CodeGen/X86/2009-02-11-codegenprepare-reuse.ll
+++ b/llvm/test/CodeGen/X86/2009-02-11-codegenprepare-reuse.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR3537
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin9.6"
diff --git a/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll b/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll
index 79d4aca99b534..6232d4c6ccdb3 100644
--- a/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll
+++ b/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9
-; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -stack-symbol-ordering=0 -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin9 -stack-symbol-ordering=0 -verify-machineinstrs | FileCheck %s
; PR3538
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
define signext i8 @foo(ptr %s1) nounwind ssp {
diff --git a/llvm/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll b/llvm/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll
index 5aef1f69f1ad9..110c3aa18d934 100644
--- a/llvm/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll
+++ b/llvm/test/CodeGen/X86/2009-02-12-InlineAsm-nieZ-constraints.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -no-integrated-as | FileCheck %s
; ModuleID = 'shant.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/2009-02-12-SpillerBug.ll b/llvm/test/CodeGen/X86/2009-02-12-SpillerBug.ll
index 275c5430f7c61..e70a43f40ec5f 100644
--- a/llvm/test/CodeGen/X86/2009-02-12-SpillerBug.ll
+++ b/llvm/test/CodeGen/X86/2009-02-12-SpillerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin8
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin8
; PR3561
define hidden void @__mulxc3(ptr noalias nocapture sret({ x86_fp80, x86_fp80 }) %agg.result, x86_fp80 %a, x86_fp80 %b, x86_fp80 %c, x86_fp80 %d) nounwind {
diff --git a/llvm/test/CodeGen/X86/2009-02-21-ExtWeakInitializer.ll b/llvm/test/CodeGen/X86/2009-02-21-ExtWeakInitializer.ll
index 1a757e050a99a..90b112c30fe47 100644
--- a/llvm/test/CodeGen/X86/2009-02-21-ExtWeakInitializer.ll
+++ b/llvm/test/CodeGen/X86/2009-02-21-ExtWeakInitializer.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; PR3629
; CHECK: weak
diff --git a/llvm/test/CodeGen/X86/2009-02-25-CommuteBug.ll b/llvm/test/CodeGen/X86/2009-02-25-CommuteBug.ll
index d555f127375a4..c04c7cbc46f7f 100644
--- a/llvm/test/CodeGen/X86/2009-02-25-CommuteBug.ll
+++ b/llvm/test/CodeGen/X86/2009-02-25-CommuteBug.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -stats 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 -stats 2>&1 | FileCheck %s
; rdar://6608609
; CHECK-NOT: commuted
diff --git a/llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll b/llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
index c421541001c5d..336287eb32c22 100644
--- a/llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
+++ b/llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; REQUIRES: asserts
-; RUN: llc < %s -mattr=+sse3,+sse4.1 -mcpu=penryn -stats 2>&1 | grep "6 machinelicm"
-; RUN: llc < %s -mattr=+sse3,+sse4.1 -mcpu=penryn | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sse3,+sse4.1 -mcpu=penryn -stats 2>&1 | grep "6 machinelicm"
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sse3,+sse4.1 -mcpu=penryn | FileCheck %s
; rdar://6627786
; rdar://7792037
diff --git a/llvm/test/CodeGen/X86/2009-03-03-BTHang.ll b/llvm/test/CodeGen/X86/2009-03-03-BTHang.ll
index a0f338c5d2740..be7894e5b5ec6 100644
--- a/llvm/test/CodeGen/X86/2009-03-03-BTHang.ll
+++ b/llvm/test/CodeGen/X86/2009-03-03-BTHang.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; rdar://6642541
%struct.HandleBlock = type { [30 x i32], [990 x ptr], %struct.HandleBlockTrailer }
diff --git a/llvm/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll b/llvm/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll
index 3dff4f7bfc9f6..824348945c15d 100644
--- a/llvm/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll
+++ b/llvm/test/CodeGen/X86/2009-03-03-BitcastLongDouble.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR3686
; rdar://6661799
diff --git a/llvm/test/CodeGen/X86/2009-03-05-burr-list-crash.ll b/llvm/test/CodeGen/X86/2009-03-05-burr-list-crash.ll
index 4dd5e402a0924..5706c76f6375c 100644
--- a/llvm/test/CodeGen/X86/2009-03-05-burr-list-crash.ll
+++ b/llvm/test/CodeGen/X86/2009-03-05-burr-list-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2009-03-09-APIntCrash.ll b/llvm/test/CodeGen/X86/2009-03-09-APIntCrash.ll
index 1c7a8a5b10eb4..1e8a92c19396a 100644
--- a/llvm/test/CodeGen/X86/2009-03-09-APIntCrash.ll
+++ b/llvm/test/CodeGen/X86/2009-03-09-APIntCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
; PR3763
%struct.__block_descriptor = type { i64, i64 }
diff --git a/llvm/test/CodeGen/X86/2009-03-09-SpillerBug.ll b/llvm/test/CodeGen/X86/2009-03-09-SpillerBug.ll
index 1b94ecdc48e1f..d1ff9e24e2936 100644
--- a/llvm/test/CodeGen/X86/2009-03-09-SpillerBug.ll
+++ b/llvm/test/CodeGen/X86/2009-03-09-SpillerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-pc-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux-gnu
; PR3706
define void @__mulxc3(x86_fp80 %b) nounwind {
diff --git a/llvm/test/CodeGen/X86/2009-03-10-CoalescerBug.ll b/llvm/test/CodeGen/X86/2009-03-10-CoalescerBug.ll
index 087febf025e4a..eca49d04537d1 100644
--- a/llvm/test/CodeGen/X86/2009-03-10-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2009-03-10-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin
; rdar://r6661945
%struct.WINDOW = type { i16, i16, i16, i16, i16, i16, i16, i32, i32, i8, i8, i8, i8, i8, i8, i8, i8, i8, i32, ptr, i16, i16, i32, i32, ptr, %struct.pdat, i16, %struct.cchar_t }
diff --git a/llvm/test/CodeGen/X86/2009-03-12-CPAlignBug.ll b/llvm/test/CodeGen/X86/2009-03-12-CPAlignBug.ll
index 9952d864bb989..f5ffc43b1be5a 100644
--- a/llvm/test/CodeGen/X86/2009-03-12-CPAlignBug.ll
+++ b/llvm/test/CodeGen/X86/2009-03-12-CPAlignBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 | not grep ".space"
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+sse2 | not grep ".space"
; rdar://6668548
declare double @llvm.sqrt.f64(double) nounwind readonly
diff --git a/llvm/test/CodeGen/X86/2009-03-13-PHIElimBug.ll b/llvm/test/CodeGen/X86/2009-03-13-PHIElimBug.ll
index 7db4adf248a4f..e3b236f2980bc 100644
--- a/llvm/test/CodeGen/X86/2009-03-13-PHIElimBug.ll
+++ b/llvm/test/CodeGen/X86/2009-03-13-PHIElimBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux | FileCheck %s
; Check the register copy comes after the call to f and before the call to g
; PR3784
diff --git a/llvm/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll b/llvm/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll
index ec366c3cdcd8e..597de422ea25c 100644
--- a/llvm/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll
+++ b/llvm/test/CodeGen/X86/2009-03-16-PHIElimInLPad.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-linux -asm-verbose | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -asm-verbose | FileCheck %s
; Check that register copies in the landing pad come after the EH_LABEL
declare i32 @f()
diff --git a/llvm/test/CodeGen/X86/2009-03-23-LinearScanBug.ll b/llvm/test/CodeGen/X86/2009-03-23-LinearScanBug.ll
index e2fbf5875f082..1591eb3fa6b2b 100644
--- a/llvm/test/CodeGen/X86/2009-03-23-LinearScanBug.ll
+++ b/llvm/test/CodeGen/X86/2009-03-23-LinearScanBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -O0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -O0
define fastcc void @optimize_bit_field() nounwind {
bb4:
diff --git a/llvm/test/CodeGen/X86/2009-03-23-MultiUseSched.ll b/llvm/test/CodeGen/X86/2009-03-23-MultiUseSched.ll
index 5c78092e9f2c4..4e4e2acda09fb 100644
--- a/llvm/test/CodeGen/X86/2009-03-23-MultiUseSched.ll
+++ b/llvm/test/CodeGen/X86/2009-03-23-MultiUseSched.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7 -relocation-model=static | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=corei7 -relocation-model=static | FileCheck %s
; The register-pressure scheduler should be able to schedule this in a
; way that does not require spills.
diff --git a/llvm/test/CodeGen/X86/2009-03-25-TestBug.ll b/llvm/test/CodeGen/X86/2009-03-25-TestBug.ll
index eae56973800b3..8949d568df7b5 100644
--- a/llvm/test/CodeGen/X86/2009-03-25-TestBug.ll
+++ b/llvm/test/CodeGen/X86/2009-03-25-TestBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; rdar://6661955
; CHECK-NOT: and
diff --git a/llvm/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll b/llvm/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll
index eb37665a41e00..1ba3332a48f9a 100644
--- a/llvm/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll
+++ b/llvm/test/CodeGen/X86/2009-03-26-NoImplicitFPBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2
define double @t(double %x) nounwind ssp noimplicitfloat {
entry:
diff --git a/llvm/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll b/llvm/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll
index 94e1db3840b1c..0b8b54418c643 100644
--- a/llvm/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll
+++ b/llvm/test/CodeGen/X86/2009-04-12-FastIselOverflowCrash.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; radr://6772169
-; RUN: llc < %s -fast-isel | FileCheck %s --check-prefix=FASTISEL
+; RUN: llc -combiner-topological-sorting < %s -fast-isel | FileCheck %s --check-prefix=FASTISEL
; PR30981
-; RUN: llc < %s -O0 -mcpu=x86-64 -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -O0 -mcpu=x86-64 -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin10"
diff --git a/llvm/test/CodeGen/X86/2009-04-12-picrel.ll b/llvm/test/CodeGen/X86/2009-04-12-picrel.ll
index 28ec145db42cd..f903e5ef1fa20 100644
--- a/llvm/test/CodeGen/X86/2009-04-12-picrel.ll
+++ b/llvm/test/CodeGen/X86/2009-04-12-picrel.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -code-model=small | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -code-model=small | FileCheck %s
@dst = external dso_local global [131072 x i32]
@ptr = external dso_local global ptr
diff --git a/llvm/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll b/llvm/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll
index 56e59da6f489a..d05976f90ba52 100644
--- a/llvm/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll
+++ b/llvm/test/CodeGen/X86/2009-04-13-2AddrAssert-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -no-integrated-as
; rdar://6781755
; PR3934
diff --git a/llvm/test/CodeGen/X86/2009-04-13-2AddrAssert.ll b/llvm/test/CodeGen/X86/2009-04-13-2AddrAssert.ll
index 7d6f8ddcc2c00..e968a3a886b2f 100644
--- a/llvm/test/CodeGen/X86/2009-04-13-2AddrAssert.ll
+++ b/llvm/test/CodeGen/X86/2009-04-13-2AddrAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; rdar://6781755
; PR3934
diff --git a/llvm/test/CodeGen/X86/2009-04-14-IllegalRegs.ll b/llvm/test/CodeGen/X86/2009-04-14-IllegalRegs.ll
index 822f6a4c4616e..18a56ce8c0f66 100644
--- a/llvm/test/CodeGen/X86/2009-04-14-IllegalRegs.ll
+++ b/llvm/test/CodeGen/X86/2009-04-14-IllegalRegs.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -O0 -regalloc=fast | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -O0 -regalloc=fast | FileCheck %s
; rdar://6787136
%struct.X = type { i8, [32 x i8] }
diff --git a/llvm/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll b/llvm/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll
index ca99ed5481a72..d51dc3627db56 100644
--- a/llvm/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll
+++ b/llvm/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -frame-pointer=all -stats 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -frame-pointer=all -stats 2>&1 | FileCheck %s
; XFAIL: *
; 69408 removed the opportunity for this optimization to work
diff --git a/llvm/test/CodeGen/X86/2009-04-24.ll b/llvm/test/CodeGen/X86/2009-04-24.ll
index a7769878cd82d..8de772693c228 100644
--- a/llvm/test/CodeGen/X86/2009-04-24.ll
+++ b/llvm/test/CodeGen/X86/2009-04-24.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -regalloc=fast -optimize-regalloc=0 -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -regalloc=fast -optimize-regalloc=0 -relocation-model=pic | FileCheck %s
; PR4004
; CHECK: {{leaq.*TLSGD}}
diff --git a/llvm/test/CodeGen/X86/2009-04-25-CoalescerBug.ll b/llvm/test/CodeGen/X86/2009-04-25-CoalescerBug.ll
index 1dd30e8263099..73edf9078e4b4 100644
--- a/llvm/test/CodeGen/X86/2009-04-25-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2009-04-25-CoalescerBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; rdar://6806252
define i64 @test(ptr %tmp13) nounwind {
diff --git a/llvm/test/CodeGen/X86/2009-04-27-CoalescerAssert.ll b/llvm/test/CodeGen/X86/2009-04-27-CoalescerAssert.ll
index 992bed0cad65a..ef1f8fcb5f35a 100644
--- a/llvm/test/CodeGen/X86/2009-04-27-CoalescerAssert.ll
+++ b/llvm/test/CodeGen/X86/2009-04-27-CoalescerAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu
; PR4034
%struct.BiContextType = type { i16, i8 }
diff --git a/llvm/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll b/llvm/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll
index d77e528fa7c11..4acc2dd4471d7 100644
--- a/llvm/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll
+++ b/llvm/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9
; PR4056
define void @int163(i32 %p_4, i32 %p_5) nounwind {
diff --git a/llvm/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert2.ll b/llvm/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert2.ll
index f02565403e879..ecd6bd5c53fa4 100644
--- a/llvm/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert2.ll
+++ b/llvm/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9
; PR4051
define void @int163(i32 %p_4, i32 %p_5) nounwind {
diff --git a/llvm/test/CodeGen/X86/2009-04-29-LinearScanBug.ll b/llvm/test/CodeGen/X86/2009-04-29-LinearScanBug.ll
index 99a22ec8a3e07..b196a7ef33b90 100644
--- a/llvm/test/CodeGen/X86/2009-04-29-LinearScanBug.ll
+++ b/llvm/test/CodeGen/X86/2009-04-29-LinearScanBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin10
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10
; rdar://6837009
%0 = type { ptr, ptr, ptr, i32 }
diff --git a/llvm/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll b/llvm/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll
index ba151e277af5a..1caf14d6bab8f 100644
--- a/llvm/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll
+++ b/llvm/test/CodeGen/X86/2009-04-29-RegAllocAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -frame-pointer=all -relocation-model=pic
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -frame-pointer=all -relocation-model=pic
; PR4099
%0 = type { [62 x ptr] } ; type %0
diff --git a/llvm/test/CodeGen/X86/2009-04-scale.ll b/llvm/test/CodeGen/X86/2009-04-scale.ll
index 115ddbf556e3c..c0d1ce1960f9f 100644
--- a/llvm/test/CodeGen/X86/2009-04-scale.ll
+++ b/llvm/test/CodeGen/X86/2009-04-scale.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu
; PR3995
%struct.vtable = type { ptr }
diff --git a/llvm/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll b/llvm/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll
index a9add145910dd..0dc97df1939f3 100644
--- a/llvm/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll
+++ b/llvm/test/CodeGen/X86/2009-05-08-InlineAsmIOffset.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=static -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=static -no-integrated-as | FileCheck %s
; PR4152
; CHECK: {{1: ._pv_cpu_ops[+]8}}
diff --git a/llvm/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll b/llvm/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll
index d5e3e11a0718a..59a9da7b94edb 100644
--- a/llvm/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll
+++ b/llvm/test/CodeGen/X86/2009-05-11-tailmerge-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR4188
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll b/llvm/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll
index 1492fdaaa36bb..844247c64d9b9 100644
--- a/llvm/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll
+++ b/llvm/test/CodeGen/X86/2009-05-19-SingleElementExtractElement.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
; PR3886
define i32 @main(i32 %argc, ptr nocapture %argv) nounwind {
diff --git a/llvm/test/CodeGen/X86/2009-05-23-available_externally.ll b/llvm/test/CodeGen/X86/2009-05-23-available_externally.ll
index 8715d00be1e2f..e8bcb74617dd1 100644
--- a/llvm/test/CodeGen/X86/2009-05-23-available_externally.ll
+++ b/llvm/test/CodeGen/X86/2009-05-23-available_externally.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic | FileCheck %s
; PR4253
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll b/llvm/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll
index 50e736ac68d29..fc42ffa6cf512 100644
--- a/llvm/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll
+++ b/llvm/test/CodeGen/X86/2009-05-23-dagcombine-shifts.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Check that the shr(shl X, 56), 48) is not mistakenly turned into
; a shr (X, -8) that gets subsequently "optimized away" as undef
diff --git a/llvm/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll b/llvm/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll
index 7177b03158ac4..2824d2971ab7a 100644
--- a/llvm/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll
+++ b/llvm/test/CodeGen/X86/2009-05-28-DAGCombineCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
define fastcc void @S_next_symbol(ptr %P) nounwind ssp {
entry:
diff --git a/llvm/test/CodeGen/X86/2009-05-30-ISelBug.ll b/llvm/test/CodeGen/X86/2009-05-30-ISelBug.ll
index 26d8905b48d04..316a9ea98eba5 100644
--- a/llvm/test/CodeGen/X86/2009-05-30-ISelBug.ll
+++ b/llvm/test/CodeGen/X86/2009-05-30-ISelBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define void @BZ2_bzDecompress_bb5_2E_outer_bb35_2E_i_bb54_2E_i(ptr, i32 %c_nblock_used.2.i, i32 %.reload51, ptr %.out, ptr %.out1, ptr %.out2, ptr %.out3) nounwind {
; CHECK-LABEL: BZ2_bzDecompress_bb5_2E_outer_bb35_2E_i_bb54_2E_i:
diff --git a/llvm/test/CodeGen/X86/2009-06-02-RewriterBug.ll b/llvm/test/CodeGen/X86/2009-06-02-RewriterBug.ll
index f64f9e3b822e0..35dab450123ea 100644
--- a/llvm/test/CodeGen/X86/2009-06-02-RewriterBug.ll
+++ b/llvm/test/CodeGen/X86/2009-06-02-RewriterBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-undermydesk-freebsd8.0 -relocation-model=pic -frame-pointer=all
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-undermydesk-freebsd8.0 -relocation-model=pic -frame-pointer=all
; PR4225
define void @sha256_block1(ptr nocapture %arr, ptr nocapture %in, i64 %num) nounwind {
diff --git a/llvm/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll b/llvm/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll
index 37f01845db799..99f1d65eaf4b0 100644
--- a/llvm/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll
+++ b/llvm/test/CodeGen/X86/2009-06-03-Win64DisableRedZone.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-mingw32 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-mingw32 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
; CHECK-NOT: -{{[1-9][0-9]*}}(%rsp)
define win64cc x86_fp80 @a(i64 %x) nounwind readnone {
diff --git a/llvm/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll b/llvm/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll
index dfb98bb1ab39f..37d5fe27367bc 100644
--- a/llvm/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll
+++ b/llvm/test/CodeGen/X86/2009-06-03-Win64SpillXMM.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=generic -mtriple=x86_64-mingw32 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=generic -mtriple=x86_64-mingw32 < %s | FileCheck %s
; CHECK: subq $40, %rsp
; CHECK: movaps %xmm8, 16(%rsp)
; CHECK: movaps %xmm7, (%rsp)
diff --git a/llvm/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll b/llvm/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll
index ff9fdf3248c0f..a7f1ff6fcdaeb 100644
--- a/llvm/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll
+++ b/llvm/test/CodeGen/X86/2009-06-04-VirtualLiveIn.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
%0 = type { %struct.GAP } ; type %0
%1 = type { i16, i8, i8 } ; type %1
diff --git a/llvm/test/CodeGen/X86/2009-06-05-VZextByteShort.ll b/llvm/test/CodeGen/X86/2009-06-05-VZextByteShort.ll
index 988dc2eb56902..03a69dc465b2a 100644
--- a/llvm/test/CodeGen/X86/2009-06-05-VZextByteShort.ll
+++ b/llvm/test/CodeGen/X86/2009-06-05-VZextByteShort.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=core2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=core2 | FileCheck %s
define <4 x i16> @a(ptr %x1) nounwind {
; CHECK-LABEL: a:
diff --git a/llvm/test/CodeGen/X86/2009-06-05-VariableIndexInsert.ll b/llvm/test/CodeGen/X86/2009-06-05-VariableIndexInsert.ll
index 695a2d0cd806e..c785c1532f73f 100644
--- a/llvm/test/CodeGen/X86/2009-06-05-VariableIndexInsert.ll
+++ b/llvm/test/CodeGen/X86/2009-06-05-VariableIndexInsert.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s -check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s -check-prefix=X64
define <2 x i64> @_mm_insert_epi16(<2 x i64> %a, i32 %b, i32 %imm) nounwind readnone {
; X86-LABEL: _mm_insert_epi16:
diff --git a/llvm/test/CodeGen/X86/2009-06-05-sitofpCrash.ll b/llvm/test/CodeGen/X86/2009-06-05-sitofpCrash.ll
index bc19edd23da87..026052777d0a4 100644
--- a/llvm/test/CodeGen/X86/2009-06-05-sitofpCrash.ll
+++ b/llvm/test/CodeGen/X86/2009-06-05-sitofpCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse
; PR2598
define <2 x float> @a(<2 x i32> %i) nounwind {
diff --git a/llvm/test/CodeGen/X86/2009-06-06-ConcatVectors.ll b/llvm/test/CodeGen/X86/2009-06-06-ConcatVectors.ll
index e26a8608a4960..8eec4912f410c 100644
--- a/llvm/test/CodeGen/X86/2009-06-06-ConcatVectors.ll
+++ b/llvm/test/CodeGen/X86/2009-06-06-ConcatVectors.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; REQUIRES: default_triple
define <2 x i64> @_mm_movpi64_pi64(<1 x i64> %a, <1 x i64> %b) nounwind readnone {
diff --git a/llvm/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll b/llvm/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
index b5577c09c4320..95d2eb13a463c 100644
--- a/llvm/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
+++ b/llvm/test/CodeGen/X86/2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -tailcallopt -mattr=+sse2 -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -tailcallopt -mattr=+sse2 -mtriple=x86_64-apple-darwin | FileCheck %s
; Check that x86-64 tail calls support x86_fp80 and v2f32 types. (Tail call
; calling convention out of sync with standard c calling convention on x86_64)
diff --git a/llvm/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll b/llvm/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll
index 118ffb28c24c1..62f4d8115d237 100644
--- a/llvm/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll
+++ b/llvm/test/CodeGen/X86/2009-06-15-not-a-tail-call.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -tailcallopt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -tailcallopt | FileCheck %s
; Bug 4396. This tail call can NOT be optimized.
diff --git a/llvm/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll b/llvm/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll
index 7cb1b1e95de4e..0ccf3194ea072 100644
--- a/llvm/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll
+++ b/llvm/test/CodeGen/X86/2009-06-18-movlp-shuffle-register.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse,-sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse,-sse2 | FileCheck %s
; PR2484
define <4 x float> @f4523(<4 x float> %a,<4 x float> %b) nounwind {
diff --git a/llvm/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll b/llvm/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll
index 7e23da096ffd1..1d0435a590291 100644
--- a/llvm/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll
+++ b/llvm/test/CodeGen/X86/2009-07-06-TwoAddrAssert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-freebsd7.2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-freebsd7.2
; PR4478
%struct.sockaddr = type <{ i8, i8, [14 x i8] }>
diff --git a/llvm/test/CodeGen/X86/2009-07-07-SplitICmp.ll b/llvm/test/CodeGen/X86/2009-07-07-SplitICmp.ll
index b3e2bcda6c63f..3458d65ebfa43 100644
--- a/llvm/test/CodeGen/X86/2009-07-07-SplitICmp.ll
+++ b/llvm/test/CodeGen/X86/2009-07-07-SplitICmp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define void @test2(<2 x i32> %A, <2 x i32> %B, ptr %C) nounwind {
%D = icmp sgt <2 x i32> %A, %B
diff --git a/llvm/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll b/llvm/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll
index 47d7aa629abaa..20051118bdf10 100644
--- a/llvm/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll
+++ b/llvm/test/CodeGen/X86/2009-07-09-ExtractBoolFromVector.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR3037
define void @entry(ptr %dest) {
diff --git a/llvm/test/CodeGen/X86/2009-07-15-CoalescerBug.ll b/llvm/test/CodeGen/X86/2009-07-15-CoalescerBug.ll
index 66cde0c4641a9..e257163bdc40f 100644
--- a/llvm/test/CodeGen/X86/2009-07-15-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2009-07-15-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10
%struct.ANY = type { ptr }
%struct.AV = type { ptr, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/2009-07-16-CoalescerBug.ll b/llvm/test/CodeGen/X86/2009-07-16-CoalescerBug.ll
index ee147338f849e..342c4cfe9292a 100644
--- a/llvm/test/CodeGen/X86/2009-07-16-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2009-07-16-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10
; rdar://7059496
%struct.brinfo = type <{ ptr, ptr, ptr, i32, i32, i32, i8, i8, i8, i8 }>
diff --git a/llvm/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll b/llvm/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll
index 76b1cfaffd116..2dd8a5602fff2 100644
--- a/llvm/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll
+++ b/llvm/test/CodeGen/X86/2009-07-19-AsmExtraOperands.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
; PR4583
define i32 @atomic_cmpset_long(ptr %dst, i64 %exp, i64 %src) nounwind ssp noredzone noimplicitfloat {
diff --git a/llvm/test/CodeGen/X86/2009-07-20-CoalescerBug.ll b/llvm/test/CodeGen/X86/2009-07-20-CoalescerBug.ll
index 13cc99270fb7c..de22787185812 100644
--- a/llvm/test/CodeGen/X86/2009-07-20-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2009-07-20-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10
; PR4587
; rdar://7072590
diff --git a/llvm/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll b/llvm/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll
index c87eca9380de9..104f150dd0da4 100644
--- a/llvm/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll
+++ b/llvm/test/CodeGen/X86/2009-07-20-DAGCombineBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
@bsBuff = internal global i32 0 ; <ptr> [#uses=1]
@llvm.used = appending global [1 x ptr] [ptr @bsGetUInt32], section "llvm.metadata" ; <ptr> [#uses=0]
diff --git a/llvm/test/CodeGen/X86/2009-08-06-branchfolder-crash.ll b/llvm/test/CodeGen/X86/2009-08-06-branchfolder-crash.ll
index 3132b657af158..bbe2e9bb5601e 100644
--- a/llvm/test/CodeGen/X86/2009-08-06-branchfolder-crash.ll
+++ b/llvm/test/CodeGen/X86/2009-08-06-branchfolder-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O3
+; RUN: llc -combiner-topological-sorting < %s -O3
; PR4626
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
diff --git a/llvm/test/CodeGen/X86/2009-08-08-CastError.ll b/llvm/test/CodeGen/X86/2009-08-08-CastError.ll
index 1497cb3c72a8d..f298167cefe2c 100644
--- a/llvm/test/CodeGen/X86/2009-08-08-CastError.ll
+++ b/llvm/test/CodeGen/X86/2009-08-08-CastError.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-mingw64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-mingw64 | FileCheck %s
; CHECK: movabsq
diff --git a/llvm/test/CodeGen/X86/2009-08-12-badswitch.ll b/llvm/test/CodeGen/X86/2009-08-12-badswitch.ll
index 527684f5a27db..ef12f0e3e508f 100644
--- a/llvm/test/CodeGen/X86/2009-08-12-badswitch.ll
+++ b/llvm/test/CodeGen/X86/2009-08-12-badswitch.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin10"
diff --git a/llvm/test/CodeGen/X86/2009-08-14-Win64MemoryIndirectArg.ll b/llvm/test/CodeGen/X86/2009-08-14-Win64MemoryIndirectArg.ll
index d718353345aa3..87d2bd7312f90 100644
--- a/llvm/test/CodeGen/X86/2009-08-14-Win64MemoryIndirectArg.ll
+++ b/llvm/test/CodeGen/X86/2009-08-14-Win64MemoryIndirectArg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
target triple = "x86_64-mingw"
; ModuleID = 'mm.bc'
diff --git a/llvm/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll b/llvm/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll
index a0e22e57608c1..1a43f38ce1a44 100644
--- a/llvm/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll
+++ b/llvm/test/CodeGen/X86/2009-08-19-LoadNarrowingMiscompile.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux | FileCheck %s
@a = external dso_local global i96, align 4
@b = external dso_local global i64, align 8
diff --git a/llvm/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll b/llvm/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll
index f5390234db7ef..f40eb32685837 100644
--- a/llvm/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll
+++ b/llvm/test/CodeGen/X86/2009-08-23-SubRegReuseUndo.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR4753
; This function has a sub-register reuse undone.
diff --git a/llvm/test/CodeGen/X86/2009-09-10-LoadFoldingBug.ll b/llvm/test/CodeGen/X86/2009-09-10-LoadFoldingBug.ll
index 3893508747c74..6c97ab6cbf630 100644
--- a/llvm/test/CodeGen/X86/2009-09-10-LoadFoldingBug.ll
+++ b/llvm/test/CodeGen/X86/2009-09-10-LoadFoldingBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -frame-pointer=all | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10.0 -relocation-model=pic -frame-pointer=all | FileCheck %s
; It's not legal to fold a load from 32-bit stack slot into a 64-bit
; instruction. If done, the instruction does a 64-bit load and that's not
diff --git a/llvm/test/CodeGen/X86/2009-09-10-SpillComments.ll b/llvm/test/CodeGen/X86/2009-09-10-SpillComments.ll
index 546d7d71e1561..7eadf2dd78e06 100644
--- a/llvm/test/CodeGen/X86/2009-09-10-SpillComments.ll
+++ b/llvm/test/CodeGen/X86/2009-09-10-SpillComments.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux | FileCheck %s
; This test shouldn't require spills.
diff --git a/llvm/test/CodeGen/X86/2009-09-16-CoalescerBug.ll b/llvm/test/CodeGen/X86/2009-09-16-CoalescerBug.ll
index c7b5f1c476410..9d1283295b20a 100644
--- a/llvm/test/CodeGen/X86/2009-09-16-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2009-09-16-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin10
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10
; PR4910
%0 = type { i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/2009-09-19-earlyclobber.ll b/llvm/test/CodeGen/X86/2009-09-19-earlyclobber.ll
index 7df62fd8c37ae..4f0e9eeb45837 100644
--- a/llvm/test/CodeGen/X86/2009-09-19-earlyclobber.ll
+++ b/llvm/test/CodeGen/X86/2009-09-19-earlyclobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-integrated-as < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -no-integrated-as < %s | FileCheck %s
; ModuleID = '4964.c'
; PR 4964
; Registers other than RAX, RCX are OK, but they must be different.
diff --git a/llvm/test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll b/llvm/test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll
index 266ef113f6c6f..0ee3e9772e378 100644
--- a/llvm/test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll
+++ b/llvm/test/CodeGen/X86/2009-09-21-NoSpillLoopCount.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin10.0 -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10.0 -relocation-model=pic | FileCheck %s
define void @dot(ptr nocapture %A, i32 %As, ptr nocapture %B, i32 %Bs, ptr nocapture %C, i32 %N) nounwind ssp {
; CHECK-LABEL: dot:
diff --git a/llvm/test/CodeGen/X86/2009-09-22-CoalescerBug.ll b/llvm/test/CodeGen/X86/2009-09-22-CoalescerBug.ll
index 4fb94dbd80464..48731aeb4697d 100644
--- a/llvm/test/CodeGen/X86/2009-09-22-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2009-09-22-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10
define i32 @main(i32 %argc, ptr nocapture %argv) nounwind ssp {
entry:
diff --git a/llvm/test/CodeGen/X86/2009-09-23-LiveVariablesBug.ll b/llvm/test/CodeGen/X86/2009-09-23-LiveVariablesBug.ll
index 0bcce6d2ff9ec..80ee80db944b5 100644
--- a/llvm/test/CodeGen/X86/2009-09-23-LiveVariablesBug.ll
+++ b/llvm/test/CodeGen/X86/2009-09-23-LiveVariablesBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10
; rdar://7247745
diff --git a/llvm/test/CodeGen/X86/2009-10-14-LiveVariablesBug.ll b/llvm/test/CodeGen/X86/2009-10-14-LiveVariablesBug.ll
index 956e6d3579e97..70063361ca879 100644
--- a/llvm/test/CodeGen/X86/2009-10-14-LiveVariablesBug.ll
+++ b/llvm/test/CodeGen/X86/2009-10-14-LiveVariablesBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin
; rdar://7299435
@i = internal global i32 0 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2009-10-16-Scope.ll b/llvm/test/CodeGen/X86/2009-10-16-Scope.ll
index bb568713d5c6a..90ea3ec918ac5 100644
--- a/llvm/test/CodeGen/X86/2009-10-16-Scope.ll
+++ b/llvm/test/CodeGen/X86/2009-10-16-Scope.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -O0 -o /dev/null -mtriple=x86_64-apple-darwin
+; RUN: llc -combiner-topological-sorting %s -O0 -o /dev/null -mtriple=x86_64-apple-darwin
; PR 5197
; There is not any llvm instruction assocated with !5. The code generator
; should be able to handle this.
diff --git a/llvm/test/CodeGen/X86/2009-10-19-EmergencySpill.ll b/llvm/test/CodeGen/X86/2009-10-19-EmergencySpill.ll
index f410656a2a30a..146667275f604 100644
--- a/llvm/test/CodeGen/X86/2009-10-19-EmergencySpill.ll
+++ b/llvm/test/CodeGen/X86/2009-10-19-EmergencySpill.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -frame-pointer=all
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -frame-pointer=all
; rdar://7291624
%union.RtreeCoord = type { float }
diff --git a/llvm/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll b/llvm/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll
index dd6472462b3c1..a977d09b4963c 100644
--- a/llvm/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll
+++ b/llvm/test/CodeGen/X86/2009-10-19-atomic-cmp-eflags.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc | FileCheck %s
+; RUN: llvm-as < %s | llc -combiner-topological-sorting | FileCheck %s
; PR 5247
; check that cmp/test is not scheduled before the add
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/2009-10-25-RewriterBug.ll b/llvm/test/CodeGen/X86/2009-10-25-RewriterBug.ll
index 1105590391dbb..70d88fa9f3e1f 100644
--- a/llvm/test/CodeGen/X86/2009-10-25-RewriterBug.ll
+++ b/llvm/test/CodeGen/X86/2009-10-25-RewriterBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -frame-pointer=all
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -frame-pointer=all
%struct.DecRefPicMarking_t = type { i32, i32, i32, i32, i32, ptr }
%struct.FrameStore = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, ptr }
diff --git a/llvm/test/CodeGen/X86/2009-11-04-SubregCoalescingBug.ll b/llvm/test/CodeGen/X86/2009-11-04-SubregCoalescingBug.ll
index b5be65fb002bc..b713a9929f89d 100644
--- a/llvm/test/CodeGen/X86/2009-11-04-SubregCoalescingBug.ll
+++ b/llvm/test/CodeGen/X86/2009-11-04-SubregCoalescingBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin11 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin11 | FileCheck %s
; rdar://7362871
define void @bar(i32 %b, i32 %a) nounwind optsize ssp {
diff --git a/llvm/test/CodeGen/X86/2009-11-13-VirtRegRewriterBug.ll b/llvm/test/CodeGen/X86/2009-11-13-VirtRegRewriterBug.ll
index 081e267a5dc23..d77dd93b30e28 100644
--- a/llvm/test/CodeGen/X86/2009-11-13-VirtRegRewriterBug.ll
+++ b/llvm/test/CodeGen/X86/2009-11-13-VirtRegRewriterBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -frame-pointer=all
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -relocation-model=pic -frame-pointer=all
; rdar://7394770
%struct.JVTLib_100487 = type <{ i8 }>
diff --git a/llvm/test/CodeGen/X86/2009-11-16-MachineLICM.ll b/llvm/test/CodeGen/X86/2009-11-16-MachineLICM.ll
index 9c42e295b9ff7..e6af2cd7151ed 100644
--- a/llvm/test/CodeGen/X86/2009-11-16-MachineLICM.ll
+++ b/llvm/test/CodeGen/X86/2009-11-16-MachineLICM.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; rdar://7395200
@g = common global [4 x float] zeroinitializer, align 16 ; <ptr> [#uses=4]
diff --git a/llvm/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll b/llvm/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll
index 99a50295727c4..75b2e0a03bb7f 100644
--- a/llvm/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll
+++ b/llvm/test/CodeGen/X86/2009-11-16-UnfoldMemOpBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
; rdar://7396984
@str = private unnamed_addr constant [28 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxx\00", align 1
diff --git a/llvm/test/CodeGen/X86/2009-11-17-UpdateTerminator.ll b/llvm/test/CodeGen/X86/2009-11-17-UpdateTerminator.ll
index 4027625e430c1..cacc04e8d9008 100644
--- a/llvm/test/CodeGen/X86/2009-11-17-UpdateTerminator.ll
+++ b/llvm/test/CodeGen/X86/2009-11-17-UpdateTerminator.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O3 < %s
+; RUN: llc -combiner-topological-sorting -O3 < %s
; This test fails with:
; Assertion failed: (!B && "UpdateTerminators requires analyzable predecessors!"), function updateTerminator, MachineBasicBlock.cpp, line 255.
diff --git a/llvm/test/CodeGen/X86/2009-11-18-TwoAddrKill.ll b/llvm/test/CodeGen/X86/2009-11-18-TwoAddrKill.ll
index 875d33fdc5d58..c46a3a9f2ac5b 100644
--- a/llvm/test/CodeGen/X86/2009-11-18-TwoAddrKill.ll
+++ b/llvm/test/CodeGen/X86/2009-11-18-TwoAddrKill.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR 5300
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i386-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2009-11-25-ImpDefBug.ll b/llvm/test/CodeGen/X86/2009-11-25-ImpDefBug.ll
index 72fa8600c1f98..0041c9832370c 100644
--- a/llvm/test/CodeGen/X86/2009-11-25-ImpDefBug.ll
+++ b/llvm/test/CodeGen/X86/2009-11-25-ImpDefBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu
; pr5600
%struct..0__pthread_mutex_s = type { i32, i32, i32, i32, i32, i32, %struct.__pthread_list_t }
diff --git a/llvm/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll b/llvm/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll
index 2f28d0fb9bab5..e22e291a9e56c 100644
--- a/llvm/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll
+++ b/llvm/test/CodeGen/X86/2009-12-01-EarlyClobberBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
; pr5391
define void @t() nounwind ssp {
diff --git a/llvm/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll b/llvm/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll
index 67a842405df91..98179d0dcd4e9 100644
--- a/llvm/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll
+++ b/llvm/test/CodeGen/X86/2009-12-11-TLSNoRedZone.ll
@@ -1,4 +1,4 @@
-; RUN: llc -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -relocation-model=pic < %s | FileCheck %s
; PR5723
target datalayout = "e-p:64:64"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/20090313-signext.ll b/llvm/test/CodeGen/X86/20090313-signext.ll
index 513d03c3dbb5b..19002b76f86f4 100644
--- a/llvm/test/CodeGen/X86/20090313-signext.ll
+++ b/llvm/test/CodeGen/X86/20090313-signext.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -relocation-model=pic | FileCheck %s
@x = common global i16 0
diff --git a/llvm/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll b/llvm/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll
index 73b9179919a92..99c683749652a 100644
--- a/llvm/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll
+++ b/llvm/test/CodeGen/X86/2010-01-05-ZExt-Shl.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; <rdar://problem/7499313>
target triple = "x86_64-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/2010-01-07-ISelBug.ll b/llvm/test/CodeGen/X86/2010-01-07-ISelBug.ll
index 398fa01796acc..beee2dbb17200 100644
--- a/llvm/test/CodeGen/X86/2010-01-07-ISelBug.ll
+++ b/llvm/test/CodeGen/X86/2010-01-07-ISelBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10
; rdar://r7519827
define i32 @t() nounwind ssp {
diff --git a/llvm/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll b/llvm/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll
index b553b7649d0b1..4a23d72697cb1 100644
--- a/llvm/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll
+++ b/llvm/test/CodeGen/X86/2010-01-08-Atomic64Bug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mcpu=corei7 | FileCheck %s
; rdar://r7512579
; PHI defs in the atomic loop should be used by the add / adc
diff --git a/llvm/test/CodeGen/X86/2010-01-11-ExtraPHIArg.ll b/llvm/test/CodeGen/X86/2010-01-11-ExtraPHIArg.ll
index 3219e7feeff80..e7e9bbf9f171d 100644
--- a/llvm/test/CodeGen/X86/2010-01-11-ExtraPHIArg.ll
+++ b/llvm/test/CodeGen/X86/2010-01-11-ExtraPHIArg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s
;
; The lowering of a switch combined with constant folding would leave spurious extra arguments on a PHI instruction.
;
diff --git a/llvm/test/CodeGen/X86/2010-01-13-OptExtBug.ll b/llvm/test/CodeGen/X86/2010-01-13-OptExtBug.ll
index 4104b6465343c..a1c65945103a2 100644
--- a/llvm/test/CodeGen/X86/2010-01-13-OptExtBug.ll
+++ b/llvm/test/CodeGen/X86/2010-01-13-OptExtBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-pc-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux-gnu
; PR6027
%class.OlsonTimeZone = type { i16, ptr, ptr, i16 }
diff --git a/llvm/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll b/llvm/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll
index 0c6987cb6f78d..7ce9e04eb67ad 100644
--- a/llvm/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll
+++ b/llvm/test/CodeGen/X86/2010-01-15-SelectionDAGCycle.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; ModuleID = 'bugpoint-reduced-simplified.bc'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll b/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll
index 0b2bc73066298..6e2b556181834 100644
--- a/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll
+++ b/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-- -O0 < %s -filetype=obj | llvm-dwarfdump -v - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -O0 < %s -filetype=obj | llvm-dwarfdump -v - | FileCheck %s
; CHECK-LABEL: .debug_info contents:
diff --git a/llvm/test/CodeGen/X86/2010-01-19-OptExtBug.ll b/llvm/test/CodeGen/X86/2010-01-19-OptExtBug.ll
index c6fb0d7997c4c..bfdd90fad73d8 100644
--- a/llvm/test/CodeGen/X86/2010-01-19-OptExtBug.ll
+++ b/llvm/test/CodeGen/X86/2010-01-19-OptExtBug.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -relocation-model=pic -frame-pointer=all -stats 2>&1 | not grep ext-opt
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin11 -relocation-model=pic -frame-pointer=all -stats 2>&1 | not grep ext-opt
define fastcc ptr @S_scan_str(ptr %start, i32 %keep_quoted, i32 %keep_delims) nounwind ssp {
entry:
diff --git a/llvm/test/CodeGen/X86/2010-02-01-DbgValueCrash.ll b/llvm/test/CodeGen/X86/2010-02-01-DbgValueCrash.ll
index 3d4ac2dc09d5f..f06490c3c8714 100644
--- a/llvm/test/CodeGen/X86/2010-02-01-DbgValueCrash.ll
+++ b/llvm/test/CodeGen/X86/2010-02-01-DbgValueCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64 -O1 < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -O1 < %s
; ModuleID = 'pr6157.bc'
; formerly crashed in SelectionDAGBuilder
diff --git a/llvm/test/CodeGen/X86/2010-02-01-TaillCallCrash.ll b/llvm/test/CodeGen/X86/2010-02-01-TaillCallCrash.ll
index f5a83171adb9a..6aeb8049c0ae4 100644
--- a/llvm/test/CodeGen/X86/2010-02-01-TaillCallCrash.ll
+++ b/llvm/test/CodeGen/X86/2010-02-01-TaillCallCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu
; PR6196
%"char[]" = type [1 x i8]
diff --git a/llvm/test/CodeGen/X86/2010-02-03-DualUndef.ll b/llvm/test/CodeGen/X86/2010-02-03-DualUndef.ll
index d8616f06c61d7..488f752c687a3 100644
--- a/llvm/test/CodeGen/X86/2010-02-03-DualUndef.ll
+++ b/llvm/test/CodeGen/X86/2010-02-03-DualUndef.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
; PR6086
define fastcc void @prepOutput() nounwind {
bb: ; preds = %output.exit
diff --git a/llvm/test/CodeGen/X86/2010-02-04-SchedulerBug.ll b/llvm/test/CodeGen/X86/2010-02-04-SchedulerBug.ll
index 96266eebb0a24..44ffba2efc432 100644
--- a/llvm/test/CodeGen/X86/2010-02-04-SchedulerBug.ll
+++ b/llvm/test/CodeGen/X86/2010-02-04-SchedulerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin11
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin11
; rdar://7604000
%struct.a_t = type { ptr, ptr, ptr, i32, i32, ptr, ptr, ptr }
diff --git a/llvm/test/CodeGen/X86/2010-02-11-NonTemporal.ll b/llvm/test/CodeGen/X86/2010-02-11-NonTemporal.ll
index 805fbd8cdcdf0..37512df0ba793 100644
--- a/llvm/test/CodeGen/X86/2010-02-11-NonTemporal.ll
+++ b/llvm/test/CodeGen/X86/2010-02-11-NonTemporal.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; CHECK: movnt
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2010-02-12-CoalescerBug-Impdef.ll b/llvm/test/CodeGen/X86/2010-02-12-CoalescerBug-Impdef.ll
index a1e65a4369c35..d173f22ddb259 100644
--- a/llvm/test/CodeGen/X86/2010-02-12-CoalescerBug-Impdef.ll
+++ b/llvm/test/CodeGen/X86/2010-02-12-CoalescerBug-Impdef.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s > %t
+; RUN: llc -combiner-topological-sorting < %s > %t
; PR6283
; Tricky coalescer bug:
diff --git a/llvm/test/CodeGen/X86/2010-02-15-ImplicitDefBug.ll b/llvm/test/CodeGen/X86/2010-02-15-ImplicitDefBug.ll
index 2190dc97c8cc4..b3e5466749b42 100644
--- a/llvm/test/CodeGen/X86/2010-02-15-ImplicitDefBug.ll
+++ b/llvm/test/CodeGen/X86/2010-02-15-ImplicitDefBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s > %t
+; RUN: llc -combiner-topological-sorting < %s > %t
; PR6300
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i386-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll b/llvm/test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll
index d4632f19ff218..0db2e4745ed1d 100644
--- a/llvm/test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll
+++ b/llvm/test/CodeGen/X86/2010-02-19-TailCallRetAddrBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=generic -mtriple=i386-apple-darwin -tailcallopt -enable-misched=false < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=generic -mtriple=i386-apple-darwin -tailcallopt -enable-misched=false < %s | FileCheck %s
; Check that lowered arguments do not overwrite the return address before it is moved.
; Bug 6225
;
diff --git a/llvm/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll b/llvm/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll
index 2fde534560b25..8575720a00574 100644
--- a/llvm/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll
+++ b/llvm/test/CodeGen/X86/2010-02-23-DAGCombineBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define ptr @t(i32 %a0) nounwind optsize ssp {
; CHECK-LABEL: t:
diff --git a/llvm/test/CodeGen/X86/2010-02-23-DIV8rDefinesAX.ll b/llvm/test/CodeGen/X86/2010-02-23-DIV8rDefinesAX.ll
index 2a24405384447..9d8b448ab5972 100644
--- a/llvm/test/CodeGen/X86/2010-02-23-DIV8rDefinesAX.ll
+++ b/llvm/test/CodeGen/X86/2010-02-23-DIV8rDefinesAX.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR6374
;
; This test produces a DIV8r instruction and uses %AX instead of %AH and %AL.
diff --git a/llvm/test/CodeGen/X86/2010-02-23-RematImplicitSubreg.ll b/llvm/test/CodeGen/X86/2010-02-23-RematImplicitSubreg.ll
index f1b85c378748f..e8e333ff1ef7d 100644
--- a/llvm/test/CodeGen/X86/2010-02-23-RematImplicitSubreg.ll
+++ b/llvm/test/CodeGen/X86/2010-02-23-RematImplicitSubreg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR6372
;
; This test produces a move instruction with an implicitly defined super-register:
diff --git a/llvm/test/CodeGen/X86/2010-02-23-SingleDefPhiJoin.ll b/llvm/test/CodeGen/X86/2010-02-23-SingleDefPhiJoin.ll
index 1284d1b96f1da..64abea61a2931 100644
--- a/llvm/test/CodeGen/X86/2010-02-23-SingleDefPhiJoin.ll
+++ b/llvm/test/CodeGen/X86/2010-02-23-SingleDefPhiJoin.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR6363
;
; This test case creates a phi join register with a single definition. The other
diff --git a/llvm/test/CodeGen/X86/2010-03-04-Mul8Bug.ll b/llvm/test/CodeGen/X86/2010-03-04-Mul8Bug.ll
index f4c86badf912a..9a92f6d351dbc 100644
--- a/llvm/test/CodeGen/X86/2010-03-04-Mul8Bug.ll
+++ b/llvm/test/CodeGen/X86/2010-03-04-Mul8Bug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR6489
;
; This test case produces a MUL8 instruction and then tries to read the result
diff --git a/llvm/test/CodeGen/X86/2010-03-05-ConstantFoldCFG.ll b/llvm/test/CodeGen/X86/2010-03-05-ConstantFoldCFG.ll
index 14b553a1b232e..2650af4ff95fd 100644
--- a/llvm/test/CodeGen/X86/2010-03-05-ConstantFoldCFG.ll
+++ b/llvm/test/CodeGen/X86/2010-03-05-ConstantFoldCFG.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-machineinstrs
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs
;
; When BRCOND is constant-folded to BR, make sure that PHI nodes don't get
; spurious operands when the CFG is trimmed.
diff --git a/llvm/test/CodeGen/X86/2010-03-05-EFLAGS-Redef.ll b/llvm/test/CodeGen/X86/2010-03-05-EFLAGS-Redef.ll
index 09860f307dfe7..ff469c44796a1 100644
--- a/llvm/test/CodeGen/X86/2010-03-05-EFLAGS-Redef.ll
+++ b/llvm/test/CodeGen/X86/2010-03-05-EFLAGS-Redef.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-machineinstrs
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs
;
; This test case is transformed into a single basic block by the machine
; branch folding pass. That makes a complete mess of the %eflags liveness, but
diff --git a/llvm/test/CodeGen/X86/2010-03-17-ISelBug.ll b/llvm/test/CodeGen/X86/2010-03-17-ISelBug.ll
index 6415545d4c8cf..d3ad9c380bf5d 100644
--- a/llvm/test/CodeGen/X86/2010-03-17-ISelBug.ll
+++ b/llvm/test/CodeGen/X86/2010-03-17-ISelBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin5
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin5
; rdar://7761790
diff --git a/llvm/test/CodeGen/X86/2010-04-06-SSEDomainFixCrash.ll b/llvm/test/CodeGen/X86/2010-04-06-SSEDomainFixCrash.ll
index 2dece8d18cb7e..3726b53e9ef80 100644
--- a/llvm/test/CodeGen/X86/2010-04-06-SSEDomainFixCrash.ll
+++ b/llvm/test/CodeGen/X86/2010-04-06-SSEDomainFixCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O3 -relocation-model=pic -frame-pointer=all -mcpu=nocona
+; RUN: llc -combiner-topological-sorting < %s -O3 -relocation-model=pic -frame-pointer=all -mcpu=nocona
;
; This test case is reduced from Bullet. It crashes SSEDomainFix.
;
diff --git a/llvm/test/CodeGen/X86/2010-04-08-CoalescerBug.ll b/llvm/test/CodeGen/X86/2010-04-08-CoalescerBug.ll
index 85f0f35d7ed90..90f8c26342ce2 100644
--- a/llvm/test/CodeGen/X86/2010-04-08-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2010-04-08-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s
; rdar://7842028
; Do not delete partially dead copy instructions.
diff --git a/llvm/test/CodeGen/X86/2010-04-13-AnalyzeBranchCrash.ll b/llvm/test/CodeGen/X86/2010-04-13-AnalyzeBranchCrash.ll
index 69eb58d889cb7..179e09905c1c4 100644
--- a/llvm/test/CodeGen/X86/2010-04-13-AnalyzeBranchCrash.ll
+++ b/llvm/test/CodeGen/X86/2010-04-13-AnalyzeBranchCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=core2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mcpu=core2
; rdar://7857830
%0 = type opaque
diff --git a/llvm/test/CodeGen/X86/2010-04-21-CoalescerBug.ll b/llvm/test/CodeGen/X86/2010-04-21-CoalescerBug.ll
index c9ffd188dd767..2a64fab5bdb77 100644
--- a/llvm/test/CodeGen/X86/2010-04-21-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2010-04-21-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin
; rdar://7886733
%struct.CMTime = type <{ i64, i32, i32, i64 }>
diff --git a/llvm/test/CodeGen/X86/2010-04-29-CoalescerCrash.ll b/llvm/test/CodeGen/X86/2010-04-29-CoalescerCrash.ll
index 84615d775168e..ac58752760499 100644
--- a/llvm/test/CodeGen/X86/2010-04-29-CoalescerCrash.ll
+++ b/llvm/test/CodeGen/X86/2010-04-29-CoalescerCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=pic -frame-pointer=all -verify-machineinstrs
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -frame-pointer=all -verify-machineinstrs
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2010-04-30-LocalAlloc-LandingPad.ll b/llvm/test/CodeGen/X86/2010-04-30-LocalAlloc-LandingPad.ll
index 2a9c11f4b88ab..08c6f1f4b5cf8 100644
--- a/llvm/test/CodeGen/X86/2010-04-30-LocalAlloc-LandingPad.ll
+++ b/llvm/test/CodeGen/X86/2010-04-30-LocalAlloc-LandingPad.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -regalloc=fast -relocation-model=pic -frame-pointer=all | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -regalloc=fast -relocation-model=pic -frame-pointer=all | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
target triple = "i386-apple-darwin10.0.0"
diff --git a/llvm/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll b/llvm/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll
index e0c2c6c9ca7f9..88e3ac6bacc13 100644
--- a/llvm/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll
+++ b/llvm/test/CodeGen/X86/2010-05-03-CoalescerSubRegClobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic | FileCheck %s
; PR6941
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
diff --git a/llvm/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll b/llvm/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll
index fd96e15692338..ea9a060de66a9 100644
--- a/llvm/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll
+++ b/llvm/test/CodeGen/X86/2010-05-05-LocalAllocEarlyClobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -regalloc=fast -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -regalloc=fast -no-integrated-as | FileCheck %s
; PR6520
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
diff --git a/llvm/test/CodeGen/X86/2010-05-06-LocalInlineAsmClobber.ll b/llvm/test/CodeGen/X86/2010-05-06-LocalInlineAsmClobber.ll
index c9aa3b8ca9fcb..f25b1ac60a421 100644
--- a/llvm/test/CodeGen/X86/2010-05-06-LocalInlineAsmClobber.ll
+++ b/llvm/test/CodeGen/X86/2010-05-06-LocalInlineAsmClobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc -regalloc=fast -optimize-regalloc=0 %s -o %t
+; RUN: llc -combiner-topological-sorting -regalloc=fast -optimize-regalloc=0 %s -o %t
; PR7066
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
diff --git a/llvm/test/CodeGen/X86/2010-05-07-ldconvert.ll b/llvm/test/CodeGen/X86/2010-05-07-ldconvert.ll
index 81e37d57c41a8..14981c8d3b8f1 100644
--- a/llvm/test/CodeGen/X86/2010-05-07-ldconvert.ll
+++ b/llvm/test/CodeGen/X86/2010-05-07-ldconvert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin11
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin11
; PR 7087 - used to crash
define i32 @main() ssp {
diff --git a/llvm/test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll b/llvm/test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll
index cb8b4c9632c0f..f6bf16e85ef02 100644
--- a/llvm/test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll
+++ b/llvm/test/CodeGen/X86/2010-05-10-DAGCombinerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin10
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10
; PR7018
; rdar://7939869
diff --git a/llvm/test/CodeGen/X86/2010-05-12-FastAllocKills.ll b/llvm/test/CodeGen/X86/2010-05-12-FastAllocKills.ll
index 1a1f6617d930f..f128386473547 100644
--- a/llvm/test/CodeGen/X86/2010-05-12-FastAllocKills.ll
+++ b/llvm/test/CodeGen/X86/2010-05-12-FastAllocKills.ll
@@ -1,4 +1,4 @@
-; RUN: llc -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs < %s
+; RUN: llc -combiner-topological-sorting -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs < %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin"
diff --git a/llvm/test/CodeGen/X86/2010-05-16-nosseconversion.ll b/llvm/test/CodeGen/X86/2010-05-16-nosseconversion.ll
index 966cffdb02d40..f7c4cae8a7c3a 100644
--- a/llvm/test/CodeGen/X86/2010-05-16-nosseconversion.ll
+++ b/llvm/test/CodeGen/X86/2010-05-16-nosseconversion.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin -mattr=-sse < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mattr=-sse < %s
; PR 7135
@x = common global i64 0 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll b/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
index 1cb3f1da945cb..2e96735cfb273 100644
--- a/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
+++ b/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-pc-linux -O2 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-pc-linux -O2 -regalloc=basic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -O2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -O2 -regalloc=basic < %s | FileCheck %s
; Test to check .debug_loc support. This test case emits many debug_loc entries.
; CHECK: .short 1 # Loc expr size
diff --git a/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll b/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
index 17df3e10fd3d9..56c39b8b790e1 100644
--- a/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
+++ b/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll
@@ -1,5 +1,5 @@
-; RUN: llc -O2 < %s -experimental-debug-variable-locations=true | FileCheck %s
-; RUN: llc -O2 -regalloc=basic < %s -experimental-debug-variable-locations=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O2 < %s -experimental-debug-variable-locations=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O2 -regalloc=basic < %s -experimental-debug-variable-locations=true | FileCheck %s
source_filename = "test/CodeGen/X86/2010-05-26-DotDebugLoc.ll"
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10"
diff --git a/llvm/test/CodeGen/X86/2010-05-26-FP_TO_INT-crash.ll b/llvm/test/CodeGen/X86/2010-05-26-FP_TO_INT-crash.ll
index cb76c322aebd1..2e25464a71134 100644
--- a/llvm/test/CodeGen/X86/2010-05-26-FP_TO_INT-crash.ll
+++ b/llvm/test/CodeGen/X86/2010-05-26-FP_TO_INT-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mcpu=i386 -mattr=-sse,-mmx < %s
+; RUN: llc -combiner-topological-sorting -O0 -mcpu=i386 -mattr=-sse,-mmx < %s
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i386-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2010-05-28-Crash.ll b/llvm/test/CodeGen/X86/2010-05-28-Crash.ll
index 53a340c78c493..c3a4c2284bf4a 100644
--- a/llvm/test/CodeGen/X86/2010-05-28-Crash.ll
+++ b/llvm/test/CodeGen/X86/2010-05-28-Crash.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-apple-darwin -regalloc=basic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -regalloc=basic < %s | FileCheck %s
; Test to check separate label for inlined function argument.
define i32 @foo(i32 %y) nounwind optsize ssp !dbg !1 {
diff --git a/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll b/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
index 768f49ae4f12b..7f49b038f4a70 100644
--- a/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
+++ b/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll
@@ -1,5 +1,5 @@
-; RUN: llc -O2 < %s | FileCheck %s
-; RUN: llc -O2 -regalloc=basic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O2 -regalloc=basic < %s | FileCheck %s
; Test to check that unused argument 'this' is not undefined in debug info.
target triple = "x86_64-apple-darwin10.2"
diff --git a/llvm/test/CodeGen/X86/2010-06-09-FastAllocRegisters.ll b/llvm/test/CodeGen/X86/2010-06-09-FastAllocRegisters.ll
index 0347f930f048d..3ff36124279a7 100644
--- a/llvm/test/CodeGen/X86/2010-06-09-FastAllocRegisters.ll
+++ b/llvm/test/CodeGen/X86/2010-06-09-FastAllocRegisters.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -frame-pointer=all -relocation-model=pic
+; RUN: llc -combiner-topological-sorting < %s -O0 -frame-pointer=all -relocation-model=pic
; PR7313
;
; The inline asm in this function clobbers almost all allocatable registers.
diff --git a/llvm/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll b/llvm/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll
index 0264792775cc8..23030a2191483 100644
--- a/llvm/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll
+++ b/llvm/test/CodeGen/X86/2010-06-14-fast-isel-fs-load.ll
@@ -1,4 +1,4 @@
-; RUN: llc -fast-isel -mtriple=i686-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -fast-isel -mtriple=i686-- < %s | FileCheck %s
; CHECK: %fs:
define i32 @test1(ptr addrspace(257) %arg) nounwind {
diff --git a/llvm/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll b/llvm/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll
index 0e8c786f4b764..afff1ab8a998d 100644
--- a/llvm/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll
+++ b/llvm/test/CodeGen/X86/2010-06-15-FastAllocEarlyCLobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc -regalloc=fast -optimize-regalloc=0 -no-integrated-as < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -regalloc=fast -optimize-regalloc=0 -no-integrated-as < %s | FileCheck %s
; PR7382
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2010-06-24-g-constraint-crash.ll b/llvm/test/CodeGen/X86/2010-06-24-g-constraint-crash.ll
index 4788535463bf5..b19aa213e5325 100644
--- a/llvm/test/CodeGen/X86/2010-06-24-g-constraint-crash.ll
+++ b/llvm/test/CodeGen/X86/2010-06-24-g-constraint-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -mtriple=x86_64-apple-darwin10 -frame-pointer=all -o /dev/null
+; RUN: llc -combiner-topological-sorting %s -mtriple=x86_64-apple-darwin10 -frame-pointer=all -o /dev/null
; Formerly crashed, rdar://8015842
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
diff --git a/llvm/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll b/llvm/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll
index cd759d85700d9..2c030b0de6545 100644
--- a/llvm/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll
+++ b/llvm/test/CodeGen/X86/2010-06-25-CoalescerSubRegDefDead.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O1 -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 -relocation-model=pic -frame-pointer=all < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O1 -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 -relocation-model=pic -frame-pointer=all < %s | FileCheck %s
; <rdar://problem/8124405>
%struct.type = type { ptr, i32, i8, i32, i8, i32, i32, i32, i32, i32, i8, i32, i32, i32, i32, i32, [256 x i32], i32, [257 x i32], [257 x i32], ptr, ptr, ptr, i32, i32, i32, i32, i32, [256 x i8], [16 x i8], [256 x i8], [4096 x i8], [16 x i32], [18002 x i8], [18002 x i8], [6 x [258 x i8]], [6 x [258 x i32]], [6 x [258 x i32]], [6 x [258 x i32]], [6 x i32], i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, ptr }
diff --git a/llvm/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll b/llvm/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll
index f9e7d163d774b..36b28bdea5b6e 100644
--- a/llvm/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll
+++ b/llvm/test/CodeGen/X86/2010-06-25-asm-RA-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -frame-pointer=all -mtriple=i686-pc-mingw32 -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -frame-pointer=all -mtriple=i686-pc-mingw32 -no-integrated-as
%struct.__SEH2Frame = type {}
diff --git a/llvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll b/llvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
index 314f41f7e653a..4cae2bbbfba00 100644
--- a/llvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
+++ b/llvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -no-integrated-as -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -no-integrated-as -verify-machineinstrs | FileCheck %s
; PR7509
target triple = "i386-apple-darwin10"
%asmtype = type { i32, ptr, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll b/llvm/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll
index c0c4893666df6..a488fee22bda8 100644
--- a/llvm/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll
+++ b/llvm/test/CodeGen/X86/2010-06-28-matched-g-constraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin11 -no-integrated-as | FileCheck %s
; Any register is OK for %0, but it must be a register, not memory.
define i32 @foo() nounwind ssp {
diff --git a/llvm/test/CodeGen/X86/2010-07-02-UnfoldBug.ll b/llvm/test/CodeGen/X86/2010-07-02-UnfoldBug.ll
index 1f0803347609a..7545335f44235 100644
--- a/llvm/test/CodeGen/X86/2010-07-02-UnfoldBug.ll
+++ b/llvm/test/CodeGen/X86/2010-07-02-UnfoldBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin
; rdar://8154265
declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/2010-07-02-asm-alignstack.ll b/llvm/test/CodeGen/X86/2010-07-02-asm-alignstack.ll
index 4302adda5151d..eb52667733fec 100644
--- a/llvm/test/CodeGen/X86/2010-07-02-asm-alignstack.ll
+++ b/llvm/test/CodeGen/X86/2010-07-02-asm-alignstack.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -no-integrated-as | FileCheck %s
define void @foo() nounwind ssp {
entry:
diff --git a/llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll b/llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll
index e7bdbca0e9427..5cd744fdfc311 100644
--- a/llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll
+++ b/llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-- -O0 -relocation-model pic < %s -o /dev/null
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O0 -relocation-model pic < %s -o /dev/null
; PR7545
@.str = private constant [4 x i8] c"one\00", align 1 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2010-07-11-FPStackLoneUse.ll b/llvm/test/CodeGen/X86/2010-07-11-FPStackLoneUse.ll
index 210dc1cf13722..9b3e6bc872b21 100644
--- a/llvm/test/CodeGen/X86/2010-07-11-FPStackLoneUse.ll
+++ b/llvm/test/CodeGen/X86/2010-07-11-FPStackLoneUse.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=core2
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core2
; PR7375
;
; This function contains a block (while.cond) with a lonely RFP use that is
diff --git a/llvm/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll b/llvm/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll
index 670b6d68f17a7..c9f757bbeb309 100644
--- a/llvm/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll
+++ b/llvm/test/CodeGen/X86/2010-07-13-indirectXconstraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
; PR 7528
; formerly crashed
diff --git a/llvm/test/CodeGen/X86/2010-07-15-Crash.ll b/llvm/test/CodeGen/X86/2010-07-15-Crash.ll
index b52aacbf5e51e..7328b8e292278 100644
--- a/llvm/test/CodeGen/X86/2010-07-15-Crash.ll
+++ b/llvm/test/CodeGen/X86/2010-07-15-Crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s -o /dev/null
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s -o /dev/null
; PR7653
@__FUNCTION__.1623 = external dso_local constant [4 x i8] ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/2010-07-29-SetccSimplify.ll b/llvm/test/CodeGen/X86/2010-07-29-SetccSimplify.ll
index 47e511f920988..3f0a14df8a758 100644
--- a/llvm/test/CodeGen/X86/2010-07-29-SetccSimplify.ll
+++ b/llvm/test/CodeGen/X86/2010-07-29-SetccSimplify.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
define i32 @extend2bit_v2(i32 %val) {
entry:
diff --git a/llvm/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll b/llvm/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
index 0e57e9d135a4d..c88d3b0bd2ac7 100644
--- a/llvm/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
+++ b/llvm/test/CodeGen/X86/2010-08-04-MaskedSignedCompare.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; PR7814
@g_16 = dso_local global i64 -3738643449681751625, align 8
diff --git a/llvm/test/CodeGen/X86/2010-08-04-MingWCrash.ll b/llvm/test/CodeGen/X86/2010-08-04-MingWCrash.ll
index 73a25e27c747e..3da65603a7581 100644
--- a/llvm/test/CodeGen/X86/2010-08-04-MingWCrash.ll
+++ b/llvm/test/CodeGen/X86/2010-08-04-MingWCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=i386-pc-mingw32
+; RUN: llc -combiner-topological-sorting -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=i386-pc-mingw32
define void @func() nounwind personality ptr @__gxx_personality_v0 {
invoke.cont:
diff --git a/llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll b/llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll
index 198c0d4806c52..3829cd44a93fd 100644
--- a/llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll
+++ b/llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mtriple=x86_64-apple-darwin < %s | grep DW_OP_breg7
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-apple-darwin < %s | grep DW_OP_breg7
; Use DW_OP_breg7 in variable's location expression if the variable is in a stack slot.
%struct.SVal = type { ptr, i32 }
diff --git a/llvm/test/CodeGen/X86/2010-09-01-RemoveCopyByCommutingDef.ll b/llvm/test/CodeGen/X86/2010-09-01-RemoveCopyByCommutingDef.ll
index b68aaf5db615a..2929d5ca27831 100644
--- a/llvm/test/CodeGen/X86/2010-09-01-RemoveCopyByCommutingDef.ll
+++ b/llvm/test/CodeGen/X86/2010-09-01-RemoveCopyByCommutingDef.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
diff --git a/llvm/test/CodeGen/X86/2010-09-16-EmptyFilename.ll b/llvm/test/CodeGen/X86/2010-09-16-EmptyFilename.ll
index 0291ce0da4688..3f6b9d26cb13a 100644
--- a/llvm/test/CodeGen/X86/2010-09-16-EmptyFilename.ll
+++ b/llvm/test/CodeGen/X86/2010-09-16-EmptyFilename.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mtriple=x86_64-apple-darwin10 < %s - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-apple-darwin10 < %s - | FileCheck %s
; Radar 8286101
; CHECK: .file {{[0-9]+}} "<stdin>"
diff --git a/llvm/test/CodeGen/X86/2010-09-16-asmcrash.ll b/llvm/test/CodeGen/X86/2010-09-16-asmcrash.ll
index 02f0c9081af0d..c2260e6a540d1 100644
--- a/llvm/test/CodeGen/X86/2010-09-16-asmcrash.ll
+++ b/llvm/test/CodeGen/X86/2010-09-16-asmcrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-freebsd8.1 -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-freebsd8.1 -o /dev/null
; This formerly crashed, PR 8154.
module asm ".weak sem_close"
diff --git a/llvm/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll b/llvm/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll
index 40e80a40723cb..1830354121995 100644
--- a/llvm/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll
+++ b/llvm/test/CodeGen/X86/2010-09-30-CMOV-JumpTable-PHI.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -mcpu=i386 < %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=i386 < %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i386-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll b/llvm/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll
index 981908eacb615..cc7f8583f1610 100644
--- a/llvm/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll
+++ b/llvm/test/CodeGen/X86/2010-10-08-cmpxchg8b.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin | FileCheck %s
; PR8297
;
; On i386, i64 cmpxchg is lowered during legalize types to extract the
diff --git a/llvm/test/CodeGen/X86/2010-11-02-DbgParameter.ll b/llvm/test/CodeGen/X86/2010-11-02-DbgParameter.ll
index 59666f7fb396d..062b09964eb90 100644
--- a/llvm/test/CodeGen/X86/2010-11-02-DbgParameter.ll
+++ b/llvm/test/CodeGen/X86/2010-11-02-DbgParameter.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O2 -asm-verbose < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O2 -asm-verbose < %s | FileCheck %s
; Radar 8616981
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
diff --git a/llvm/test/CodeGen/X86/2010-11-09-MOVLPS.ll b/llvm/test/CodeGen/X86/2010-11-09-MOVLPS.ll
index 90f73648a83ca..438b1210e29bf 100644
--- a/llvm/test/CodeGen/X86/2010-11-09-MOVLPS.ll
+++ b/llvm/test/CodeGen/X86/2010-11-09-MOVLPS.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0
+; RUN: llc -combiner-topological-sorting < %s -O0
; PR8211
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll b/llvm/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll
index 7ee92d1967bc9..372ed73ffab48 100644
--- a/llvm/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll
+++ b/llvm/test/CodeGen/X86/2010-11-18-SelectOfExtload.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+cmov | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+cmov | FileCheck %s
; Both values were being zero extended.
@u = external dso_local global i8
@s = external dso_local global i8
diff --git a/llvm/test/CodeGen/X86/2011-01-07-LegalizeTypesCrash.ll b/llvm/test/CodeGen/X86/2011-01-07-LegalizeTypesCrash.ll
index 961e6cdf5f175..ae9398d2a1f6d 100644
--- a/llvm/test/CodeGen/X86/2011-01-07-LegalizeTypesCrash.ll
+++ b/llvm/test/CodeGen/X86/2011-01-07-LegalizeTypesCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -enable-legalize-types-checking
+; RUN: llc -combiner-topological-sorting < %s -enable-legalize-types-checking
; PR8582
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i686-pc-win32"
diff --git a/llvm/test/CodeGen/X86/2011-01-10-DagCombineHang.ll b/llvm/test/CodeGen/X86/2011-01-10-DagCombineHang.ll
index bf438b82edf8c..e860c5d186c00 100644
--- a/llvm/test/CodeGen/X86/2011-01-10-DagCombineHang.ll
+++ b/llvm/test/CodeGen/X86/2011-01-10-DagCombineHang.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10
; This formerly got DagCombine into a loop, PR 8916.
define i32 @foo(i64 %x, i64 %y, i64 %z, i32 %a, i32 %b) {
diff --git a/llvm/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll b/llvm/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll
index 8642785b53cec..c69ad9a6a457b 100644
--- a/llvm/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll
+++ b/llvm/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -filetype=obj | llvm-dwarfdump -v -debug-info - | FileCheck %s
-; RUN: llc < %s -filetype=obj -regalloc=basic | llvm-dwarfdump -v -debug-info - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -filetype=obj | llvm-dwarfdump -v -debug-info - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -filetype=obj -regalloc=basic | llvm-dwarfdump -v -debug-info - | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
diff --git a/llvm/test/CodeGen/X86/2011-02-04-FastRegallocNoFP.ll b/llvm/test/CodeGen/X86/2011-02-04-FastRegallocNoFP.ll
index cedd6a2a1b8e8..0a245c84f5cf4 100644
--- a/llvm/test/CodeGen/X86/2011-02-04-FastRegallocNoFP.ll
+++ b/llvm/test/CodeGen/X86/2011-02-04-FastRegallocNoFP.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2011-02-12-shuffle.ll b/llvm/test/CodeGen/X86/2011-02-12-shuffle.ll
index 10e3b60dbecc7..09adf9607095f 100644
--- a/llvm/test/CodeGen/X86/2011-02-12-shuffle.ll
+++ b/llvm/test/CodeGen/X86/2011-02-12-shuffle.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR9165
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
diff --git a/llvm/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll b/llvm/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll
index c8e8a29f1ad62..5ab1a853627da 100644
--- a/llvm/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll
+++ b/llvm/test/CodeGen/X86/2011-02-21-VirtRegRewriter-KillSubReg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O2 -mtriple=i386-pc-linux-gnu -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=i386-pc-linux-gnu -relocation-model=pic | FileCheck %s
; PR9237: Assertion in VirtRegRewriter.cpp, ResurrectConfirmedKill
; `KillOps[*SR] == KillOp && "invalid subreg kill flags"'
diff --git a/llvm/test/CodeGen/X86/2011-02-23-UnfoldBug.ll b/llvm/test/CodeGen/X86/2011-02-23-UnfoldBug.ll
index f0da3b188b8ca..349e55a539a78 100644
--- a/llvm/test/CodeGen/X86/2011-02-23-UnfoldBug.ll
+++ b/llvm/test/CodeGen/X86/2011-02-23-UnfoldBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10
; rdar://9045024
; PR9305
diff --git a/llvm/test/CodeGen/X86/2011-02-27-Fpextend.ll b/llvm/test/CodeGen/X86/2011-02-27-Fpextend.ll
index c12b9563b3050..a1b191a5a8faf 100644
--- a/llvm/test/CodeGen/X86/2011-02-27-Fpextend.ll
+++ b/llvm/test/CodeGen/X86/2011-02-27-Fpextend.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux < %s
; PR9309
define <4 x double> @f_fu(<4 x float>) nounwind {
diff --git a/llvm/test/CodeGen/X86/2011-03-02-DAGCombiner.ll b/llvm/test/CodeGen/X86/2011-03-02-DAGCombiner.ll
index e916705a41f82..63f08ef6370d1 100644
--- a/llvm/test/CodeGen/X86/2011-03-02-DAGCombiner.ll
+++ b/llvm/test/CodeGen/X86/2011-03-02-DAGCombiner.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin11.0.0"
diff --git a/llvm/test/CodeGen/X86/2011-03-08-Sched-crash.ll b/llvm/test/CodeGen/X86/2011-03-08-Sched-crash.ll
index 47ec7c75c4720..64cf03d4b78ab 100644
--- a/llvm/test/CodeGen/X86/2011-03-08-Sched-crash.ll
+++ b/llvm/test/CodeGen/X86/2011-03-08-Sched-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
target triple = "i386-apple-darwin9.0.0"
diff --git a/llvm/test/CodeGen/X86/2011-03-09-Physreg-Coalescing.ll b/llvm/test/CodeGen/X86/2011-03-09-Physreg-Coalescing.ll
index 75610f57d0de0..e9a13e859d102 100644
--- a/llvm/test/CodeGen/X86/2011-03-09-Physreg-Coalescing.ll
+++ b/llvm/test/CodeGen/X86/2011-03-09-Physreg-Coalescing.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=yonah < %s
+; RUN: llc -combiner-topological-sorting -mcpu=yonah < %s
; PR9438
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i386-unknown-freebsd9.0"
diff --git a/llvm/test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll b/llvm/test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll
index 78e2f1557ea21..63cec9338923f 100644
--- a/llvm/test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll
+++ b/llvm/test/CodeGen/X86/2011-03-30-CreateFixedObjCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; rdar://7983260
diff --git a/llvm/test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll b/llvm/test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll
index a016940d01a5f..2b6e089f05d39 100644
--- a/llvm/test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll
+++ b/llvm/test/CodeGen/X86/2011-04-13-SchedCmpJmp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s
; Reduced from JavaScriptCore
%"class.JSC::CodeLocationCall" = type { [8 x i8] }
diff --git a/llvm/test/CodeGen/X86/2011-04-19-sclr-bb.ll b/llvm/test/CodeGen/X86/2011-04-19-sclr-bb.ll
index b77cc40acf3c8..7a189851d8443 100644
--- a/llvm/test/CodeGen/X86/2011-04-19-sclr-bb.ll
+++ b/llvm/test/CodeGen/X86/2011-04-19-sclr-bb.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
; Make sure that values of illegal types are not scalarized between basic blocks.
;CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/2011-05-09-loaduse.ll b/llvm/test/CodeGen/X86/2011-05-09-loaduse.ll
index 2504a6aa8193a..c9b182bb18cab 100644
--- a/llvm/test/CodeGen/X86/2011-05-09-loaduse.ll
+++ b/llvm/test/CodeGen/X86/2011-05-09-loaduse.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s --check-prefix=X64
define float @test(ptr %A) nounwind {
; X86-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/2011-05-26-UnreachableBlockElim.ll b/llvm/test/CodeGen/X86/2011-05-26-UnreachableBlockElim.ll
index eb662301e8fe3..6b1ed76aec3a2 100644
--- a/llvm/test/CodeGen/X86/2011-05-26-UnreachableBlockElim.ll
+++ b/llvm/test/CodeGen/X86/2011-05-26-UnreachableBlockElim.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-coalescing
+; RUN: llc -combiner-topological-sorting < %s -verify-coalescing
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-macosx10.6.0"
diff --git a/llvm/test/CodeGen/X86/2011-05-27-CrossClassCoalescing.ll b/llvm/test/CodeGen/X86/2011-05-27-CrossClassCoalescing.ll
index ec5078566d204..8f76ad1b6e779 100644
--- a/llvm/test/CodeGen/X86/2011-05-27-CrossClassCoalescing.ll
+++ b/llvm/test/CodeGen/X86/2011-05-27-CrossClassCoalescing.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-coalescing
+; RUN: llc -combiner-topological-sorting < %s -verify-coalescing
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-macosx10.6.0"
diff --git a/llvm/test/CodeGen/X86/2011-06-01-fildll.ll b/llvm/test/CodeGen/X86/2011-06-01-fildll.ll
index cbc95b20263a7..6515f377d5113 100644
--- a/llvm/test/CodeGen/X86/2011-06-01-fildll.ll
+++ b/llvm/test/CodeGen/X86/2011-06-01-fildll.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; ModuleID = '<stdin>'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
target triple = "i386-apple-macosx10.6.6"
diff --git a/llvm/test/CodeGen/X86/2011-06-03-x87chain.ll b/llvm/test/CodeGen/X86/2011-06-03-x87chain.ll
index ed3dcad227bcd..b3a55977f06d7 100644
--- a/llvm/test/CodeGen/X86/2011-06-03-x87chain.ll
+++ b/llvm/test/CodeGen/X86/2011-06-03-x87chain.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -mtriple=i686-- -mattr=+sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-- -mattr=+sse | FileCheck %s
define float @chainfail1(ptr nocapture %a, ptr nocapture %b, i32 %x, i32 %y, ptr nocapture %f) nounwind uwtable noinline ssp {
entry:
diff --git a/llvm/test/CodeGen/X86/2011-06-06-fgetsign80bit.ll b/llvm/test/CodeGen/X86/2011-06-06-fgetsign80bit.ll
index 2899b8b51ef74..9e140b9a30bb7 100644
--- a/llvm/test/CodeGen/X86/2011-06-06-fgetsign80bit.ll
+++ b/llvm/test/CodeGen/X86/2011-06-06-fgetsign80bit.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-- < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s
define i32 @signbitl(x86_fp80 %x) nounwind uwtable readnone {
entry:
%tmp4 = bitcast x86_fp80 %x to i80
diff --git a/llvm/test/CodeGen/X86/2011-06-12-FastAllocSpill.ll b/llvm/test/CodeGen/X86/2011-06-12-FastAllocSpill.ll
index 650cc0a77c7ae..d0c66e83e0bc4 100644
--- a/llvm/test/CodeGen/X86/2011-06-12-FastAllocSpill.ll
+++ b/llvm/test/CodeGen/X86/2011-06-12-FastAllocSpill.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -O0 -frame-pointer=all -relocation-model=pic -stats 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -frame-pointer=all -relocation-model=pic -stats 2>&1 | FileCheck %s
;
; This test should not cause any spilling with RAFast.
;
diff --git a/llvm/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll b/llvm/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll
index 3ac21048dce67..92fced7b82eba 100644
--- a/llvm/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll
+++ b/llvm/test/CodeGen/X86/2011-06-14-PreschedRegalias.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -stress-sched | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -stress-sched | FileCheck %s
; REQUIRES: asserts
; Test interference between physreg aliases during preRAsched.
; mul wants an operand in AL, but call clobbers it.
diff --git a/llvm/test/CodeGen/X86/2011-06-14-mmx-inlineasm.ll b/llvm/test/CodeGen/X86/2011-06-14-mmx-inlineasm.ll
index 582ebb9bdcfd1..020b4cae1a82b 100644
--- a/llvm/test/CodeGen/X86/2011-06-14-mmx-inlineasm.ll
+++ b/llvm/test/CodeGen/X86/2011-06-14-mmx-inlineasm.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=i686 -mattr=+mmx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=i686 -mattr=+mmx < %s | FileCheck %s
; ModuleID = 'tq.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
target triple = "i386-apple-macosx10.6.6"
diff --git a/llvm/test/CodeGen/X86/2011-06-19-QuicksortCoalescerBug.ll b/llvm/test/CodeGen/X86/2011-06-19-QuicksortCoalescerBug.ll
index e200491606814..a65a4b1a26104 100644
--- a/llvm/test/CodeGen/X86/2011-06-19-QuicksortCoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2011-06-19-QuicksortCoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-coalescing
+; RUN: llc -combiner-topological-sorting < %s -verify-coalescing
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-macosx10.7.0"
diff --git a/llvm/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll b/llvm/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll
index 653ea2424d9f5..fc389b465bae8 100644
--- a/llvm/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll
+++ b/llvm/test/CodeGen/X86/2011-07-13-BadFrameIndexDisplacement.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-- < %s -frame-pointer=all | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s -frame-pointer=all | FileCheck %s
; This test is checking that we don't crash and we don't incorrectly fold
; a large displacement and a frame index into a single lea.
diff --git a/llvm/test/CodeGen/X86/2011-08-23-PerformSubCombine128.ll b/llvm/test/CodeGen/X86/2011-08-23-PerformSubCombine128.ll
index 3740c05ecb014..5bea3ec41e69f 100644
--- a/llvm/test/CodeGen/X86/2011-08-23-PerformSubCombine128.ll
+++ b/llvm/test/CodeGen/X86/2011-08-23-PerformSubCombine128.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-- -O2 < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O2 < %s
define void @test(i64 %add127.tr.i2686) {
entry:
diff --git a/llvm/test/CodeGen/X86/2011-08-23-Trampoline.ll b/llvm/test/CodeGen/X86/2011-08-23-Trampoline.ll
index b314e5f8452d8..94e5df3c174cd 100644
--- a/llvm/test/CodeGen/X86/2011-08-23-Trampoline.ll
+++ b/llvm/test/CodeGen/X86/2011-08-23-Trampoline.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686--
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
%struct.FRAME.gnat__perfect_hash_generators__select_char_position__build_identical_keys_sets = type { i32, i32, ptr, ptr }
diff --git a/llvm/test/CodeGen/X86/2011-08-29-BlockConstant.ll b/llvm/test/CodeGen/X86/2011-08-29-BlockConstant.ll
index ff8bca2c77402..47323289ce714 100644
--- a/llvm/test/CodeGen/X86/2011-08-29-BlockConstant.ll
+++ b/llvm/test/CodeGen/X86/2011-08-29-BlockConstant.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2011-08-29-InitOrder.ll b/llvm/test/CodeGen/X86/2011-08-29-InitOrder.ll
index 62302d19a5273..39fa87d2eaff5 100644
--- a/llvm/test/CodeGen/X86/2011-08-29-InitOrder.ll
+++ b/llvm/test/CodeGen/X86/2011-08-29-InitOrder.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-linux-gnu -use-ctors | FileCheck %s --check-prefix=CHECK-DEFAULT
-; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s --check-prefix=CHECK-DARWIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -use-ctors | FileCheck %s --check-prefix=CHECK-DEFAULT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin | FileCheck %s --check-prefix=CHECK-DARWIN
; PR5329
@llvm.global_ctors = appending global [3 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 2000, ptr @construct_2, ptr null }, { i32, ptr, ptr } { i32 3000, ptr @construct_3, ptr null }, { i32, ptr, ptr } { i32 1000, ptr @construct_1, ptr null }]
diff --git a/llvm/test/CodeGen/X86/2011-09-14-valcoalesce.ll b/llvm/test/CodeGen/X86/2011-09-14-valcoalesce.ll
index a9c9047257149..141e9a3ecbe46 100644
--- a/llvm/test/CodeGen/X86/2011-09-14-valcoalesce.ll
+++ b/llvm/test/CodeGen/X86/2011-09-14-valcoalesce.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -disable-block-placement | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -disable-block-placement | FileCheck %s
;
; Test RegistersDefinedFromSameValue. We have multiple copies of the same vreg:
; while.body85.i:
diff --git a/llvm/test/CodeGen/X86/2011-09-21-setcc-bug.ll b/llvm/test/CodeGen/X86/2011-09-21-setcc-bug.ll
index 9bfdefbab615f..f5d1545700c77 100644
--- a/llvm/test/CodeGen/X86/2011-09-21-setcc-bug.ll
+++ b/llvm/test/CodeGen/X86/2011-09-21-setcc-bug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -mattr=+sse4.1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7 -mattr=+sse4.1
; Make sure we are not crashing on this code.
diff --git a/llvm/test/CodeGen/X86/2011-10-11-SpillDead.ll b/llvm/test/CodeGen/X86/2011-10-11-SpillDead.ll
index 19c3d6ca727e9..5a86c9aba5285 100644
--- a/llvm/test/CodeGen/X86/2011-10-11-SpillDead.ll
+++ b/llvm/test/CodeGen/X86/2011-10-11-SpillDead.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-regalloc -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -verify-regalloc -no-integrated-as
; PR11125
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.7"
diff --git a/llvm/test/CodeGen/X86/2011-10-11-srl.ll b/llvm/test/CodeGen/X86/2011-10-11-srl.ll
index 219927a5f0163..d8bc53c94d343 100644
--- a/llvm/test/CodeGen/X86/2011-10-11-srl.ll
+++ b/llvm/test/CodeGen/X86/2011-10-11-srl.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=-sse4.1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=-sse4.1
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2011-10-12-MachineCSE.ll b/llvm/test/CodeGen/X86/2011-10-12-MachineCSE.ll
index 8d9b6433858ff..b974cd4f968e0 100644
--- a/llvm/test/CodeGen/X86/2011-10-12-MachineCSE.ll
+++ b/llvm/test/CodeGen/X86/2011-10-12-MachineCSE.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s
; <rdar://problem/10270968>
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.7.2"
diff --git a/llvm/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll b/llvm/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll
index b68f739cc736d..3a36bb701ca5b 100644
--- a/llvm/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll
+++ b/llvm/test/CodeGen/X86/2011-10-18-FastISel-VectorParams.ll
@@ -1,4 +1,4 @@
-; RUN: llc -fast-isel -mattr=+sse < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -fast-isel -mattr=+sse < %s | FileCheck %s
; <rdar://problem/10215997>
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"
target triple = "i386-apple-macosx10.7"
diff --git a/llvm/test/CodeGen/X86/2011-10-19-widen_vselect.ll b/llvm/test/CodeGen/X86/2011-10-19-widen_vselect.ll
index 5a4cbac57eeeb..7baadc59ee898 100644
--- a/llvm/test/CodeGen/X86/2011-10-19-widen_vselect.ll
+++ b/llvm/test/CodeGen/X86/2011-10-19-widen_vselect.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefix=X64
; Make sure that we don't crash when legalizing vselect and vsetcc and that
; we are able to generate vector blend instructions.
diff --git a/llvm/test/CodeGen/X86/2011-10-21-widen-cmp.ll b/llvm/test/CodeGen/X86/2011-10-21-widen-cmp.ll
index f3f541af4bd13..717a85a3a12a8 100644
--- a/llvm/test/CodeGen/X86/2011-10-21-widen-cmp.ll
+++ b/llvm/test/CodeGen/X86/2011-10-21-widen-cmp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
; Check that a <4 x float> compare is generated and that we are
; not stuck in an endless loop.
diff --git a/llvm/test/CodeGen/X86/2011-10-27-tstore.ll b/llvm/test/CodeGen/X86/2011-10-27-tstore.ll
index a3b79c291aefa..ea6d3467b0bf9 100644
--- a/llvm/test/CodeGen/X86/2011-10-27-tstore.ll
+++ b/llvm/test/CodeGen/X86/2011-10-27-tstore.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=corei7 | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2011-10-30-padd.ll b/llvm/test/CodeGen/X86/2011-10-30-padd.ll
index 655b6f3c20747..e2187a3bf0573 100644
--- a/llvm/test/CodeGen/X86/2011-10-30-padd.ll
+++ b/llvm/test/CodeGen/X86/2011-10-30-padd.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s
;CHECK-LABEL: addXX_test:
;CHECK: padd
diff --git a/llvm/test/CodeGen/X86/2011-11-07-LegalizeBuildVector.ll b/llvm/test/CodeGen/X86/2011-11-07-LegalizeBuildVector.ll
index da819084a2344..8e20a241a6a67 100644
--- a/llvm/test/CodeGen/X86/2011-11-07-LegalizeBuildVector.ll
+++ b/llvm/test/CodeGen/X86/2011-11-07-LegalizeBuildVector.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+avx | FileCheck %s
; We don't really care what this outputs; just make sure it's somewhat sane.
; CHECK: legalize_test
diff --git a/llvm/test/CodeGen/X86/2011-11-22-AVX2-Domains.ll b/llvm/test/CodeGen/X86/2011-11-22-AVX2-Domains.ll
index d150ae5582905..013142ceb0825 100644
--- a/llvm/test/CodeGen/X86/2011-11-22-AVX2-Domains.ll
+++ b/llvm/test/CodeGen/X86/2011-11-22-AVX2-Domains.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=corei7-avx -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=corei7-avx -mattr=+avx | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-darwin11"
diff --git a/llvm/test/CodeGen/X86/2011-11-30-or.ll b/llvm/test/CodeGen/X86/2011-11-30-or.ll
index 416ff581fb425..45d702fb85dc5 100644
--- a/llvm/test/CodeGen/X86/2011-11-30-or.ll
+++ b/llvm/test/CodeGen/X86/2011-11-30-or.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=corei7 | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
target triple = "x86_64-apple-macosx10.6.6"
diff --git a/llvm/test/CodeGen/X86/2011-12-06-AVXVectorExtractCombine.ll b/llvm/test/CodeGen/X86/2011-12-06-AVXVectorExtractCombine.ll
index 13da254bd1243..cb859c7b17d3b 100644
--- a/llvm/test/CodeGen/X86/2011-12-06-AVXVectorExtractCombine.ll
+++ b/llvm/test/CodeGen/X86/2011-12-06-AVXVectorExtractCombine.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s
; PR11494
define void @test(ptr nocapture %p) nounwind {
diff --git a/llvm/test/CodeGen/X86/2011-12-06-BitcastVectorGlobal.ll b/llvm/test/CodeGen/X86/2011-12-06-BitcastVectorGlobal.ll
index 4ea59bb4c5052..df600a815c2c4 100644
--- a/llvm/test/CodeGen/X86/2011-12-06-BitcastVectorGlobal.ll
+++ b/llvm/test/CodeGen/X86/2011-12-06-BitcastVectorGlobal.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; PR11495
; CHECK: 1311768467463790320
diff --git a/llvm/test/CodeGen/X86/2011-12-08-AVXISelBugs.ll b/llvm/test/CodeGen/X86/2011-12-08-AVXISelBugs.ll
index 6027b10db9981..a048dcd0dd996 100644
--- a/llvm/test/CodeGen/X86/2011-12-08-AVXISelBugs.ll
+++ b/llvm/test/CodeGen/X86/2011-12-08-AVXISelBugs.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx -mattr=+avx
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7-avx -mattr=+avx
; Various missing patterns causing crashes.
; rdar://10538793
diff --git a/llvm/test/CodeGen/X86/2011-12-15-vec_shift.ll b/llvm/test/CodeGen/X86/2011-12-15-vec_shift.ll
index fd991074f7b54..94be08f0b5045 100644
--- a/llvm/test/CodeGen/X86/2011-12-15-vec_shift.ll
+++ b/llvm/test/CodeGen/X86/2011-12-15-vec_shift.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -mattr=+sse4.1 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-W-SSE4
-; RUN: llc -mattr=-sse4.1 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-WO-SSE4
+; RUN: llc -combiner-topological-sorting -mattr=+sse4.1 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-W-SSE4
+; RUN: llc -combiner-topological-sorting -mattr=-sse4.1 -mcpu=penryn < %s | FileCheck %s -check-prefix=CHECK-WO-SSE4
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.7"
diff --git a/llvm/test/CodeGen/X86/2011-12-26-extractelement-duplicate-load.ll b/llvm/test/CodeGen/X86/2011-12-26-extractelement-duplicate-load.ll
index 075b9631f5272..6ed7a049cc0ef 100644
--- a/llvm/test/CodeGen/X86/2011-12-26-extractelement-duplicate-load.ll
+++ b/llvm/test/CodeGen/X86/2011-12-26-extractelement-duplicate-load.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown -mattr=-sse4.2,+sse4.1 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown -mattr=-sse4.2,+sse4.1 < %s | FileCheck %s
; Make sure we don't load from the location pointed to by %p
; twice: it has non-obvious performance implications, and
diff --git a/llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll b/llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll
index b725941d87030..336878ddb1160 100644
--- a/llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll
+++ b/llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
; ModuleID = '<stdin>'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/2011-12-8-bitcastintprom.ll b/llvm/test/CodeGen/X86/2011-12-8-bitcastintprom.ll
index 936bdc00477df..88cae224e0c38 100644
--- a/llvm/test/CodeGen/X86/2011-12-8-bitcastintprom.ll
+++ b/llvm/test/CodeGen/X86/2011-12-8-bitcastintprom.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
; Make sure that the conversion between v4i8 to v2i16 is not a simple bitcast.
define void @prom_bug(<4 x i8> %t, ptr %p) {
diff --git a/llvm/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll b/llvm/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll
index 1ae51ee975638..f90ee1a6ed512 100644
--- a/llvm/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll
+++ b/llvm/test/CodeGen/X86/2011-20-21-zext-ui2fp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
; Check that the booleans are converted using zext and not via sext.
; 0x1 means that we only look at the first bit.
diff --git a/llvm/test/CodeGen/X86/2012-01-10-UndefExceptionEdge.ll b/llvm/test/CodeGen/X86/2012-01-10-UndefExceptionEdge.ll
index f2b4c49b1dbcd..33f3341552f00 100644
--- a/llvm/test/CodeGen/X86/2012-01-10-UndefExceptionEdge.ll
+++ b/llvm/test/CodeGen/X86/2012-01-10-UndefExceptionEdge.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -simplifycfg-require-and-preserve-domtree=1 < %s -frame-pointer=all -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting -simplifycfg-require-and-preserve-domtree=1 < %s -frame-pointer=all -verify-machineinstrs | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"
target triple = "i386-apple-macosx10.7"
diff --git a/llvm/test/CodeGen/X86/2012-01-11-split-cv.ll b/llvm/test/CodeGen/X86/2012-01-11-split-cv.ll
index cf837eba1de9f..7982f41edb6d7 100644
--- a/llvm/test/CodeGen/X86/2012-01-11-split-cv.ll
+++ b/llvm/test/CodeGen/X86/2012-01-11-split-cv.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=+avx -mtriple=i686-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx -mtriple=i686-unknown-unknown | FileCheck %s
define void @add18i16(ptr nocapture sret(<18 x i16>) %ret, ptr %bp) nounwind {
; CHECK-LABEL: add18i16:
diff --git a/llvm/test/CodeGen/X86/2012-01-12-extract-sv.ll b/llvm/test/CodeGen/X86/2012-01-12-extract-sv.ll
index 65273870c3dfb..8a28d9753bee3 100644
--- a/llvm/test/CodeGen/X86/2012-01-12-extract-sv.ll
+++ b/llvm/test/CodeGen/X86/2012-01-12-extract-sv.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=+avx -mtriple=i686-pc-win32 | FileCheck %s --check-prefixes=AVX1
-; RUN: llc < %s -mattr=+avx2 -mtriple=i686-pc-win32 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx -mtriple=i686-pc-win32 | FileCheck %s --check-prefixes=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx2 -mtriple=i686-pc-win32 | FileCheck %s --check-prefixes=AVX2
define void @endless_loop() {
; AVX1-LABEL: endless_loop:
diff --git a/llvm/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll b/llvm/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll
index efc56d974e986..21cd36f7d79ee 100644
--- a/llvm/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll
+++ b/llvm/test/CodeGen/X86/2012-01-16-mfence-nosse-flags.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-linux -mattr=-sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-linux -mattr=-sse | FileCheck %s
; PR11768
@ptr = external dso_local global ptr
diff --git a/llvm/test/CodeGen/X86/2012-01-18-vbitcast.ll b/llvm/test/CodeGen/X86/2012-01-18-vbitcast.ll
index e4313060ba97d..d60f6a6056ded 100644
--- a/llvm/test/CodeGen/X86/2012-01-18-vbitcast.ll
+++ b/llvm/test/CodeGen/X86/2012-01-18-vbitcast.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=corei7 -mtriple=x86_64-pc-win32 | FileCheck %s
define <2 x i32> @vcast(<2 x float> %a, <2 x float> %b) {
; CHECK-LABEL: vcast:
diff --git a/llvm/test/CodeGen/X86/2012-02-12-dagco.ll b/llvm/test/CodeGen/X86/2012-02-12-dagco.ll
index a4a3ff399813f..acde01b9de048 100644
--- a/llvm/test/CodeGen/X86/2012-02-12-dagco.ll
+++ b/llvm/test/CodeGen/X86/2012-02-12-dagco.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx
target triple = "x86_64-unknown-linux-gnu"
; Make sure we are not crashing on this one
define void @dagco_crash() {
diff --git a/llvm/test/CodeGen/X86/2012-02-14-scalar.ll b/llvm/test/CodeGen/X86/2012-02-14-scalar.ll
index 1dc076b3e0d31..6f1fb4d6c7c53 100644
--- a/llvm/test/CodeGen/X86/2012-02-14-scalar.ll
+++ b/llvm/test/CodeGen/X86/2012-02-14-scalar.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx
target triple = "x86_64-unknown-linux-gnu"
; Make sure we are not crashing on this one
define void @autogen_28112_5000() {
diff --git a/llvm/test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll b/llvm/test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll
index 790bc1f329f1e..a2a1e29dd2550 100644
--- a/llvm/test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll
+++ b/llvm/test/CodeGen/X86/2012-02-23-mmx-inlineasm.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-- -mcpu=i686 -mattr=+mmx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -mcpu=i686 -mattr=+mmx < %s | FileCheck %s
; <rdar://problem/10106006>
define void @func() nounwind ssp {
diff --git a/llvm/test/CodeGen/X86/2012-02-29-CoalescerBug.ll b/llvm/test/CodeGen/X86/2012-02-29-CoalescerBug.ll
index 8e575954403cd..8f7518db8b3d3 100644
--- a/llvm/test/CodeGen/X86/2012-02-29-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/2012-02-29-CoalescerBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O1 < %s
+; RUN: llc -combiner-topological-sorting -O1 < %s
; PR12138
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"
target triple = "i386-apple-macosx10.7.0"
diff --git a/llvm/test/CodeGen/X86/2012-03-15-build_vector_wl.ll b/llvm/test/CodeGen/X86/2012-03-15-build_vector_wl.ll
index 9c1266504b129..be3c27d23261d 100644
--- a/llvm/test/CodeGen/X86/2012-03-15-build_vector_wl.ll
+++ b/llvm/test/CodeGen/X86/2012-03-15-build_vector_wl.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
define <4 x i8> @build_vector_again(<16 x i8> %in) nounwind readnone {
; CHECK-LABEL: build_vector_again:
; CHECK: ## %bb.0: ## %entry
diff --git a/llvm/test/CodeGen/X86/2012-03-26-PostRALICMBug.ll b/llvm/test/CodeGen/X86/2012-03-26-PostRALICMBug.ll
index c90bf2703ec37..569da2a32abcb 100644
--- a/llvm/test/CodeGen/X86/2012-03-26-PostRALICMBug.ll
+++ b/llvm/test/CodeGen/X86/2012-03-26-PostRALICMBug.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -stats 2>&1 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -stats 2>&1 | \
; RUN: not grep "Number of machine instructions hoisted out of loops post regalloc"
; rdar://11095580
diff --git a/llvm/test/CodeGen/X86/2012-04-09-TwoAddrPassBug.ll b/llvm/test/CodeGen/X86/2012-04-09-TwoAddrPassBug.ll
index 092c02bbd1f74..a95a16e08b03b 100644
--- a/llvm/test/CodeGen/X86/2012-04-09-TwoAddrPassBug.ll
+++ b/llvm/test/CodeGen/X86/2012-04-09-TwoAddrPassBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O1 -verify-coalescing < %s
+; RUN: llc -combiner-topological-sorting -O1 -verify-coalescing < %s
; PR12495
target datalayout =
"e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/2012-04-26-sdglue.ll b/llvm/test/CodeGen/X86/2012-04-26-sdglue.ll
index 4ed8a6b610aba..a7b32e0d39c78 100644
--- a/llvm/test/CodeGen/X86/2012-04-26-sdglue.ll
+++ b/llvm/test/CodeGen/X86/2012-04-26-sdglue.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=core-avx2 | FileCheck %s
; rdar://11314175: SD Scheduler, BuildSchedUnits assert:
; N->getNodeId() == -1 && "Node already inserted!
diff --git a/llvm/test/CodeGen/X86/2012-05-17-TwoAddressBug.ll b/llvm/test/CodeGen/X86/2012-05-17-TwoAddressBug.ll
index 881fa37f99cb8..67c905d04b881 100644
--- a/llvm/test/CodeGen/X86/2012-05-17-TwoAddressBug.ll
+++ b/llvm/test/CodeGen/X86/2012-05-17-TwoAddressBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-macosx -pre-RA-sched=source | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx -pre-RA-sched=source | FileCheck %s
; Teach two-address pass to update the "source" map so it doesn't perform a
; non-profitable commute using outdated info. The test case would still fail
diff --git a/llvm/test/CodeGen/X86/2012-05-19-CoalescerCrash.ll b/llvm/test/CodeGen/X86/2012-05-19-CoalescerCrash.ll
index fb3cfbbff3322..7db29d0cad94f 100644
--- a/llvm/test/CodeGen/X86/2012-05-19-CoalescerCrash.ll
+++ b/llvm/test/CodeGen/X86/2012-05-19-CoalescerCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-coalescing
+; RUN: llc -combiner-topological-sorting < %s -verify-coalescing
; PR12892
;
; Dead code elimination during coalesing causes a live range to split into two
diff --git a/llvm/test/CodeGen/X86/2012-07-10-extload64.ll b/llvm/test/CodeGen/X86/2012-07-10-extload64.ll
index 6db17251cd599..9090764b3f7b4 100644
--- a/llvm/test/CodeGen/X86/2012-07-10-extload64.ll
+++ b/llvm/test/CodeGen/X86/2012-07-10-extload64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-win32 -mcpu=corei7 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-pc-win32 -mcpu=corei7 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 -mcpu=corei7 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 -mcpu=corei7 | FileCheck %s --check-prefix=X64
define void @load_store(ptr %in) {
; X86-LABEL: load_store:
diff --git a/llvm/test/CodeGen/X86/2012-07-10-shufnorm.ll b/llvm/test/CodeGen/X86/2012-07-10-shufnorm.ll
index 5fe5a346c7750..b7af44813d6a0 100644
--- a/llvm/test/CodeGen/X86/2012-07-10-shufnorm.ll
+++ b/llvm/test/CodeGen/X86/2012-07-10-shufnorm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=corei7 -mattr=+avx | FileCheck %s
; CHECK: ocl
define void @ocl() {
diff --git a/llvm/test/CodeGen/X86/2012-07-15-BuildVectorPromote.ll b/llvm/test/CodeGen/X86/2012-07-15-BuildVectorPromote.ll
index 2d72d2b2575c1..c6468e0de81da 100644
--- a/llvm/test/CodeGen/X86/2012-07-15-BuildVectorPromote.ll
+++ b/llvm/test/CodeGen/X86/2012-07-15-BuildVectorPromote.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=corei7
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=corei7
; We don't care about the output, just that it doesn't crash
define <1 x i1> @buildvec_promote() {
diff --git a/llvm/test/CodeGen/X86/2012-07-15-broadcastfold.ll b/llvm/test/CodeGen/X86/2012-07-15-broadcastfold.ll
index ecd93d7e87700..161db5ecf8974 100644
--- a/llvm/test/CodeGen/X86/2012-07-15-broadcastfold.ll
+++ b/llvm/test/CodeGen/X86/2012-07-15-broadcastfold.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=corei7 -mattr=+avx2 | FileCheck %s
declare x86_fastcallcc i64 @barrier()
diff --git a/llvm/test/CodeGen/X86/2012-07-15-tconst_shl.ll b/llvm/test/CodeGen/X86/2012-07-15-tconst_shl.ll
index 0ac26c3b402ff..e8dd06ce77074 100644
--- a/llvm/test/CodeGen/X86/2012-07-15-tconst_shl.ll
+++ b/llvm/test/CodeGen/X86/2012-07-15-tconst_shl.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -mattr=+avx2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7 -mattr=+avx2
; make sure that we are not crashing.
define <16 x i32> @autogen_SD34717() {
diff --git a/llvm/test/CodeGen/X86/2012-07-15-vshl.ll b/llvm/test/CodeGen/X86/2012-07-15-vshl.ll
index b8b6f06bc0b0b..1ead4a22ef0f2 100644
--- a/llvm/test/CodeGen/X86/2012-07-15-vshl.ll
+++ b/llvm/test/CodeGen/X86/2012-07-15-vshl.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 -mattr=+avx
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=corei7 -mattr=+avx
; PR13352
declare <8 x float> @llvm.x86.avx.blendv.ps.256(<8 x float>, <8 x float>, <8 x float>) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/2012-07-16-LeaUndef.ll b/llvm/test/CodeGen/X86/2012-07-16-LeaUndef.ll
index 8fd1c21b988cd..67187258c03ac 100644
--- a/llvm/test/CodeGen/X86/2012-07-16-LeaUndef.ll
+++ b/llvm/test/CodeGen/X86/2012-07-16-LeaUndef.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7
define void @autogen_SD2543() {
A:
diff --git a/llvm/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll b/llvm/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll
index 7e78d70921f9b..491af4cb19335 100644
--- a/llvm/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll
+++ b/llvm/test/CodeGen/X86/2012-07-16-fp2ui-i1.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7
define void @autogen_SD3100() {
BB:
diff --git a/llvm/test/CodeGen/X86/2012-07-17-vtrunc.ll b/llvm/test/CodeGen/X86/2012-07-17-vtrunc.ll
index 764ccfe66e86b..071088fafccee 100644
--- a/llvm/test/CodeGen/X86/2012-07-17-vtrunc.ll
+++ b/llvm/test/CodeGen/X86/2012-07-17-vtrunc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7
define void @autogen_SD33189483() {
BB:
diff --git a/llvm/test/CodeGen/X86/2012-07-23-select_cc.ll b/llvm/test/CodeGen/X86/2012-07-23-select_cc.ll
index 1838dc97dda3d..cebacb14c4001 100644
--- a/llvm/test/CodeGen/X86/2012-07-23-select_cc.ll
+++ b/llvm/test/CodeGen/X86/2012-07-23-select_cc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=corei7
+; RUN: llc -combiner-topological-sorting < %s -mcpu=corei7
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/2012-08-07-CmpISelBug.ll b/llvm/test/CodeGen/X86/2012-08-07-CmpISelBug.ll
index 418cbb093a7d5..e7982a0b0c01f 100644
--- a/llvm/test/CodeGen/X86/2012-08-07-CmpISelBug.ll
+++ b/llvm/test/CodeGen/X86/2012-08-07-CmpISelBug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx | FileCheck %s
; Cmp lowering should not look past the truncate unless the high bits are known
; zero.
diff --git a/llvm/test/CodeGen/X86/2012-08-16-setcc.ll b/llvm/test/CodeGen/X86/2012-08-16-setcc.ll
index 89ae5680e3ba9..b678617c8d7a0 100644
--- a/llvm/test/CodeGen/X86/2012-08-16-setcc.ll
+++ b/llvm/test/CodeGen/X86/2012-08-16-setcc.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; rdar://12081007
diff --git a/llvm/test/CodeGen/X86/2012-08-17-legalizer-crash.ll b/llvm/test/CodeGen/X86/2012-08-17-legalizer-crash.ll
index c72d12914e447..c258478885377 100644
--- a/llvm/test/CodeGen/X86/2012-08-17-legalizer-crash.ll
+++ b/llvm/test/CodeGen/X86/2012-08-17-legalizer-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Check that an overly large immediate created by SROA doesn't crash the
; legalizer.
diff --git a/llvm/test/CodeGen/X86/2012-08-28-UnsafeMathCrash.ll b/llvm/test/CodeGen/X86/2012-08-28-UnsafeMathCrash.ll
index 0e0e20f3f2ede..07b65c164827a 100644
--- a/llvm/test/CodeGen/X86/2012-08-28-UnsafeMathCrash.ll
+++ b/llvm/test/CodeGen/X86/2012-08-28-UnsafeMathCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; <rdar://problem/12180135>
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"
target triple = "i386-apple-macosx10.8.0"
diff --git a/llvm/test/CodeGen/X86/2012-09-13-dagco-fneg.ll b/llvm/test/CodeGen/X86/2012-09-13-dagco-fneg.ll
index a0e0e4393a814..dcbaa371629b3 100644
--- a/llvm/test/CodeGen/X86/2012-09-13-dagco-fneg.ll
+++ b/llvm/test/CodeGen/X86/2012-09-13-dagco-fneg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=corei7 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.8.0"
diff --git a/llvm/test/CodeGen/X86/2012-09-28-CGPBug.ll b/llvm/test/CodeGen/X86/2012-09-28-CGPBug.ll
index 1d90e885274cc..98b3ab3ade8ca 100644
--- a/llvm/test/CodeGen/X86/2012-09-28-CGPBug.ll
+++ b/llvm/test/CodeGen/X86/2012-09-28-CGPBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i386-apple-macosx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-apple-macosx < %s | FileCheck %s
; rdar://12396696
@JT = global [4 x i32] [i32 sub (i32 ptrtoint (ptr blockaddress(@h, %bb16) to i32), i32 ptrtoint (ptr blockaddress(@h, %bb9) to i32)), i32 sub (i32 ptrtoint (ptr blockaddress(@h, %bb15) to i32), i32 ptrtoint (ptr blockaddress(@h, %bb9) to i32)), i32 sub (i32 ptrtoint (ptr blockaddress(@h, %bb20) to i32), i32 ptrtoint (ptr blockaddress(@h, %bb16) to i32)), i32 sub (i32 ptrtoint (ptr blockaddress(@h, %bb20) to i32), i32 ptrtoint (ptr blockaddress(@h, %bb15) to i32))]
diff --git a/llvm/test/CodeGen/X86/2012-1-10-buildvector.ll b/llvm/test/CodeGen/X86/2012-1-10-buildvector.ll
index fe6c9c991b51c..8c696c93c39b9 100644
--- a/llvm/test/CodeGen/X86/2012-1-10-buildvector.ll
+++ b/llvm/test/CodeGen/X86/2012-1-10-buildvector.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=+avx -mtriple=i686-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx -mtriple=i686-unknown-unknown | FileCheck %s
define void @bad_cast() {
; CHECK-LABEL: bad_cast:
diff --git a/llvm/test/CodeGen/X86/2012-10-02-DAGCycle.ll b/llvm/test/CodeGen/X86/2012-10-02-DAGCycle.ll
index cb2b6e4dd1923..4459e0098f109 100644
--- a/llvm/test/CodeGen/X86/2012-10-02-DAGCycle.ll
+++ b/llvm/test/CodeGen/X86/2012-10-02-DAGCycle.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i386-apple-macosx -relocation-model=pic < %s > /dev/null
-; RUN: llc -mtriple=x86_64-apple-macosx -relocation-model=pic < %s > /dev/null
+; RUN: llc -combiner-topological-sorting -mtriple=i386-apple-macosx -relocation-model=pic < %s > /dev/null
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx -relocation-model=pic < %s > /dev/null
; rdar://12393897
diff --git a/llvm/test/CodeGen/X86/2012-10-03-DAGCycle.ll b/llvm/test/CodeGen/X86/2012-10-03-DAGCycle.ll
index f9f6ce619653e..0bdb4481dec02 100644
--- a/llvm/test/CodeGen/X86/2012-10-03-DAGCycle.ll
+++ b/llvm/test/CodeGen/X86/2012-10-03-DAGCycle.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-macosx -mcpu=corei7 < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx -mcpu=corei7 < %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.8.0"
diff --git a/llvm/test/CodeGen/X86/2012-10-18-crash-dagco.ll b/llvm/test/CodeGen/X86/2012-10-18-crash-dagco.ll
index 1c418a75c9b14..af1d4a6811345 100644
--- a/llvm/test/CodeGen/X86/2012-10-18-crash-dagco.ll
+++ b/llvm/test/CodeGen/X86/2012-10-18-crash-dagco.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=corei7 -disable-cgp-select2branch < %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -disable-cgp-select2branch < %s
; We should not crash on this test.
diff --git a/llvm/test/CodeGen/X86/2012-11-28-merge-store-alias.ll b/llvm/test/CodeGen/X86/2012-11-28-merge-store-alias.ll
index 161613a506d00..700d0353d6973 100644
--- a/llvm/test/CodeGen/X86/2012-11-28-merge-store-alias.ll
+++ b/llvm/test/CodeGen/X86/2012-11-28-merge-store-alias.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=corei7 -mtriple=x86_64-pc-win64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=corei7 -mtriple=x86_64-pc-win64 | FileCheck %s
; CHECK: merge_stores_can
; CHECK: callq foo
diff --git a/llvm/test/CodeGen/X86/2012-12-1-merge-multiple.ll b/llvm/test/CodeGen/X86/2012-12-1-merge-multiple.ll
index 86af5fc58c977..a1ffb41b94ef4 100644
--- a/llvm/test/CodeGen/X86/2012-12-1-merge-multiple.ll
+++ b/llvm/test/CodeGen/X86/2012-12-1-merge-multiple.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define void @multiple_stores_on_chain(ptr %A) {
; CHECK-LABEL: multiple_stores_on_chain:
diff --git a/llvm/test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll b/llvm/test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll
index 4a268bc51f88e..e4f1f5447cb8d 100644
--- a/llvm/test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll
+++ b/llvm/test/CodeGen/X86/2012-12-12-DAGCombineCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-apple-ios -mcpu=yonah < %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-apple-ios -mcpu=yonah < %s
; rdar://12868039
define void @t() nounwind ssp {
diff --git a/llvm/test/CodeGen/X86/2012-12-14-v8fp80-crash.ll b/llvm/test/CodeGen/X86/2012-12-14-v8fp80-crash.ll
index c5e8ed90d4262..61fb31b30953b 100644
--- a/llvm/test/CodeGen/X86/2012-12-14-v8fp80-crash.ll
+++ b/llvm/test/CodeGen/X86/2012-12-14-v8fp80-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=corei7 -mtriple=i686-pc-win32
+; RUN: llc -combiner-topological-sorting < %s -mcpu=corei7 -mtriple=i686-pc-win32
; Make sure we don't crash on this testcase.
diff --git a/llvm/test/CodeGen/X86/2012-12-19-NoImplicitFloat.ll b/llvm/test/CodeGen/X86/2012-12-19-NoImplicitFloat.ll
index 14e9fcbaa9dda..52e3d97a28f48 100644
--- a/llvm/test/CodeGen/X86/2012-12-19-NoImplicitFloat.ll
+++ b/llvm/test/CodeGen/X86/2012-12-19-NoImplicitFloat.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core2 < %s | FileCheck %s
; Test that we do not introduce vector operations with noimplicitfloat.
; rdar://12879313
diff --git a/llvm/test/CodeGen/X86/2013-01-09-DAGCombineBug.ll b/llvm/test/CodeGen/X86/2013-01-09-DAGCombineBug.ll
index f7a0ddfaa12fb..654bdbcbb6df1 100644
--- a/llvm/test/CodeGen/X86/2013-01-09-DAGCombineBug.ll
+++ b/llvm/test/CodeGen/X86/2013-01-09-DAGCombineBug.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-macosx10.5.0 < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx10.5.0 < %s
; rdar://12968664
diff --git a/llvm/test/CodeGen/X86/2013-03-13-VEX-DestReg.ll b/llvm/test/CodeGen/X86/2013-03-13-VEX-DestReg.ll
index f12fc4a8b1f13..cdd301ea60612 100644
--- a/llvm/test/CodeGen/X86/2013-03-13-VEX-DestReg.ll
+++ b/llvm/test/CodeGen/X86/2013-03-13-VEX-DestReg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core-avx-i -show-mc-encoding
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core-avx-i -show-mc-encoding
; ModuleID = 'bugpoint-reduced-simplified.bc'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/2013-05-06-ConactVectorCrash.ll b/llvm/test/CodeGen/X86/2013-05-06-ConactVectorCrash.ll
index 9fb43518a6d9a..c77ee985a1ba9 100644
--- a/llvm/test/CodeGen/X86/2013-05-06-ConactVectorCrash.ll
+++ b/llvm/test/CodeGen/X86/2013-05-06-ConactVectorCrash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; Make sure this doesn't crash
diff --git a/llvm/test/CodeGen/X86/2013-10-14-FastISel-incorrect-vreg.ll b/llvm/test/CodeGen/X86/2013-10-14-FastISel-incorrect-vreg.ll
index cb74ae61f1eb9..2215205318d0b 100644
--- a/llvm/test/CodeGen/X86/2013-10-14-FastISel-incorrect-vreg.ll
+++ b/llvm/test/CodeGen/X86/2013-10-14-FastISel-incorrect-vreg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-apple-darwin -O0 < %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-darwin -O0 < %s -o - | FileCheck %s
;
; During X86 fastisel, the address of indirect call was resolved
; through bitcast, ptrtoint, and inttoptr instructions. This is valid
diff --git a/llvm/test/CodeGen/X86/2014-05-29-factorial.ll b/llvm/test/CodeGen/X86/2014-05-29-factorial.ll
index 6d7bc3918f2a8..98503c81a12ea 100644
--- a/llvm/test/CodeGen/X86/2014-05-29-factorial.ll
+++ b/llvm/test/CodeGen/X86/2014-05-29-factorial.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; CHECK: decq [[X:%rdi|%rcx]]
; CHECK-NOT: testq [[X]], [[X]]
diff --git a/llvm/test/CodeGen/X86/2014-08-29-CompactUnwind.ll b/llvm/test/CodeGen/X86/2014-08-29-CompactUnwind.ll
index 71fa028fc1435..b5ffc03b1055d 100644
--- a/llvm/test/CodeGen/X86/2014-08-29-CompactUnwind.ll
+++ b/llvm/test/CodeGen/X86/2014-08-29-CompactUnwind.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple x86_64-apple-darwin11 -mcpu corei7 -emit-compact-unwind-non-canonical=true -filetype=obj -o - | llvm-objdump -d --unwind-info -s - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-apple-darwin11 -mcpu corei7 -emit-compact-unwind-non-canonical=true -filetype=obj -o - | llvm-objdump -d --unwind-info -s - | FileCheck %s
; Regression test for http://llvm.org/bugs/show_bug.cgi?id=20800.
; ModuleID = 'asan_report.ii'
diff --git a/llvm/test/CodeGen/X86/2020_12_02_decrementing_loop.ll b/llvm/test/CodeGen/X86/2020_12_02_decrementing_loop.ll
index 49de5091f0e5f..724fde9c31a3f 100644
--- a/llvm/test/CodeGen/X86/2020_12_02_decrementing_loop.ll
+++ b/llvm/test/CodeGen/X86/2020_12_02_decrementing_loop.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx | FileCheck %s
define i32 @test_01(ptr %p, i64 %len, i32 %x) {
; CHECK-LABEL: test_01:
diff --git a/llvm/test/CodeGen/X86/20210831-inlineasm.ll b/llvm/test/CodeGen/X86/20210831-inlineasm.ll
index 3378b5606d96f..76069b3518b99 100644
--- a/llvm/test/CodeGen/X86/20210831-inlineasm.ll
+++ b/llvm/test/CodeGen/X86/20210831-inlineasm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-linux-gnu
; https://bugs.llvm.org/show_bug.cgi?id=51699
%"[]u8" = type { ptr, i64 }
diff --git a/llvm/test/CodeGen/X86/2023-02-22-combineMinNumMaxNum.ll b/llvm/test/CodeGen/X86/2023-02-22-combineMinNumMaxNum.ll
index 8b53d599393b9..5bff25f92d13b 100644
--- a/llvm/test/CodeGen/X86/2023-02-22-combineMinNumMaxNum.ll
+++ b/llvm/test/CodeGen/X86/2023-02-22-combineMinNumMaxNum.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake
; Checking for a DAGCombine ICE.
diff --git a/llvm/test/CodeGen/X86/3addr-16bit.ll b/llvm/test/CodeGen/X86/3addr-16bit.ll
index 2b692bff0461e..052df8bb81117 100644
--- a/llvm/test/CodeGen/X86/3addr-16bit.ll
+++ b/llvm/test/CodeGen/X86/3addr-16bit.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin | FileCheck %s -check-prefix=X86
; rdar://7329206
diff --git a/llvm/test/CodeGen/X86/3addr-or.ll b/llvm/test/CodeGen/X86/3addr-or.ll
index 65f6d2b4123e8..389288234c32b 100644
--- a/llvm/test/CodeGen/X86/3addr-or.ll
+++ b/llvm/test/CodeGen/X86/3addr-or.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; rdar://7527734
define i32 @test1(i32 %x) nounwind ssp {
diff --git a/llvm/test/CodeGen/X86/4char-promote.ll b/llvm/test/CodeGen/X86/4char-promote.ll
index fcecf310436cd..2d226c30c2a04 100644
--- a/llvm/test/CodeGen/X86/4char-promote.ll
+++ b/llvm/test/CodeGen/X86/4char-promote.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; A test for checking PR 9623
-; RUN: llc -mcpu=corei7 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 < %s | FileCheck %s
target triple = "x86_64-apple-darwin"
diff --git a/llvm/test/CodeGen/X86/64-bit-shift-by-32-minus-y.ll b/llvm/test/CodeGen/X86/64-bit-shift-by-32-minus-y.ll
index 4c92adb25d0bd..471522d53230e 100644
--- a/llvm/test/CodeGen/X86/64-bit-shift-by-32-minus-y.ll
+++ b/llvm/test/CodeGen/X86/64-bit-shift-by-32-minus-y.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64-NOBMI2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi2 | FileCheck %s --check-prefixes=X64-BMI2
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86-NOBMI2
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+bmi2 | FileCheck %s --check-prefixes=X86-BMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64-NOBMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi2 | FileCheck %s --check-prefixes=X64-BMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86-NOBMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+bmi2 | FileCheck %s --check-prefixes=X86-BMI2
define i64 @t0(i64 %val, i64 %shamt) nounwind {
; X64-NOBMI2-LABEL: t0:
diff --git a/llvm/test/CodeGen/X86/8bit_cmov_of_trunc_promotion.ll b/llvm/test/CodeGen/X86/8bit_cmov_of_trunc_promotion.ll
index 1a8d33f5b3480..0ae0cfedf0500 100644
--- a/llvm/test/CodeGen/X86/8bit_cmov_of_trunc_promotion.ll
+++ b/llvm/test/CodeGen/X86/8bit_cmov_of_trunc_promotion.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=-cmov | FileCheck %s --check-prefix=I386-NOCMOV
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=I386-CMOV
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-cmov | FileCheck %s --check-prefix=I686-NOCMOV
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=I686-CMOV
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-cmov | FileCheck %s --check-prefix=X86_64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=X86_64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=-cmov | FileCheck %s --check-prefix=I386-NOCMOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=I386-CMOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=-cmov | FileCheck %s --check-prefix=I686-NOCMOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=I686-CMOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-cmov | FileCheck %s --check-prefix=X86_64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=X86_64
; Values don't come from regs. All good.
diff --git a/llvm/test/CodeGen/X86/9601.ll b/llvm/test/CodeGen/X86/9601.ll
index 8f2218b959944..9cd362254556c 100644
--- a/llvm/test/CodeGen/X86/9601.ll
+++ b/llvm/test/CodeGen/X86/9601.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu
; PR9601
; Previously we'd crash trying to put a 32-bit float into a constraint
; for a normal 'r' register.
diff --git a/llvm/test/CodeGen/X86/AMX/amx-across-func.ll b/llvm/test/CodeGen/X86/AMX/amx-across-func.ll
index 2bda8db040296..5cabb2e70230a 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-across-func.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-across-func.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs -enable-ipra | FileCheck -check-prefix=IPRA %s
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck -check-prefix=O0 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs -enable-ipra | FileCheck -check-prefix=IPRA %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck -check-prefix=O0 %s
@buf = dso_local global [3072 x i8] zeroinitializer, align 64
diff --git a/llvm/test/CodeGen/X86/AMX/amx-bf16-intrinsics.ll b/llvm/test/CodeGen/X86/AMX/amx-bf16-intrinsics.ll
index a415d9c152422..558dd5deb7875 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-bf16-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-bf16-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile -mattr=+amx-bf16 -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile -mattr=+amx-bf16 -verify-machineinstrs | FileCheck %s
define void @test_amx() {
; CHECK-LABEL: test_amx:
diff --git a/llvm/test/CodeGen/X86/AMX/amx-config.ll b/llvm/test/CodeGen/X86/AMX/amx-config.ll
index 275c85389c4db..8d90457fedaf4 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-config.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-config.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8,+avx512f -verify-machineinstrs | FileCheck %s --check-prefix=AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8,+avx2 -verify-machineinstrs | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8,+avx -verify-machineinstrs | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -verify-machineinstrs | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8,+avx512f -verify-machineinstrs | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8,+avx2 -verify-machineinstrs | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8,+avx -verify-machineinstrs | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -verify-machineinstrs | FileCheck %s --check-prefix=SSE2
@buf = dso_local global [1024 x i8] zeroinitializer, align 64
@buf2 = dso_local global [1024 x i8] zeroinitializer, align 64
diff --git a/llvm/test/CodeGen/X86/AMX/amx-configO0toO0.ll b/llvm/test/CodeGen/X86/AMX/amx-configO0toO0.ll
index 0a5c16813722e..6a4958fa029a1 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-configO0toO0.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-configO0toO0.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f | FileCheck %s --check-prefix=AVX512
%struct.__tile1024i_str = type <{ i16, i16, [60 x i8], <256 x i32> }>
@buf = dso_local global [1024 x i8] zeroinitializer, align 16
diff --git a/llvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll b/llvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll
index 3d4b4b88c82ad..e220c1f988d0f 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f | FileCheck %s --check-prefix=AVX512
@buf = dso_local global [1024 x i8] zeroinitializer, align 16
@buf2 = dso_local global [1024 x i8] zeroinitializer, align 16
diff --git a/llvm/test/CodeGen/X86/AMX/amx-error.ll b/llvm/test/CodeGen/X86/AMX/amx-error.ll
index 769001dbee832..7fad0f14e4215 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-error.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-error.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile -o /dev/null 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile -o /dev/null 2>&1 | FileCheck %s
@row = dso_local global i16 8, align 2
@col = dso_local global i16 8, align 2
diff --git a/llvm/test/CodeGen/X86/AMX/amx-fp16.ll b/llvm/test/CodeGen/X86/AMX/amx-fp16.ll
index deeabffaf618e..97f915cddbe79 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-fp16.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-fp16.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-int8,+amx-fp16,+avx512f -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-int8,+amx-fp16,+avx512f -verify-machineinstrs | FileCheck %s
define void @test_amx(ptr %pointer, ptr %base, i64 %stride) {
; CHECK-LABEL: test_amx:
diff --git a/llvm/test/CodeGen/X86/AMX/amx-gemm.ll b/llvm/test/CodeGen/X86/AMX/amx-gemm.ll
index b8771d525a54b..984dc85e1b3e2 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-gemm.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-gemm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
; #include <immintrin.h>
;
diff --git a/llvm/test/CodeGen/X86/AMX/amx-greedy-ra-spill-shape.ll b/llvm/test/CodeGen/X86/AMX/amx-greedy-ra-spill-shape.ll
index cba394f9e55d6..8076724884fa1 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-greedy-ra-spill-shape.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-greedy-ra-spill-shape.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs -stop-before virtregrewriter | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs -stop-before virtregrewriter | FileCheck %s
; Check LEA64_32r register is split to COPY10
define void @foo(i32 %M, i32 %N, i32 %K, ptr %A, ptr %B_rcr4, ptr %C, i32 %c_row_from, i32 %c_row_to, i32 %c_row_tile, i32 %c_col_from, i32 %c_col_to, i32 %c_col_tile) {
diff --git a/llvm/test/CodeGen/X86/AMX/amx-greedy-ra.ll b/llvm/test/CodeGen/X86/AMX/amx-greedy-ra.ll
index d258364536cfb..6158cfd156ba1 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-greedy-ra.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-greedy-ra.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs -stop-after x86-tile-config | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs -stop-after x86-tile-config | FileCheck %s
; Test the tile register is allocated in a separate pass.
diff --git a/llvm/test/CodeGen/X86/AMX/amx-int8-intrinsics.ll b/llvm/test/CodeGen/X86/AMX/amx-int8-intrinsics.ll
index 2bbf4d9edb91a..14b635e84c174 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-int8-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-int8-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -verify-machineinstrs | FileCheck %s
define void @test_amx() {
; CHECK-LABEL: test_amx:
diff --git a/llvm/test/CodeGen/X86/AMX/amx-intrinsic-chain.ll b/llvm/test/CodeGen/X86/AMX/amx-intrinsic-chain.ll
index 46b5f62456cdc..f2d6821519fe2 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-intrinsic-chain.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-intrinsic-chain.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
define dso_local void @test_chain(ptr %A_mem, ptr %B_mem, ptr %C_mem) {
; CHECK-LABEL: test_chain:
diff --git a/llvm/test/CodeGen/X86/AMX/amx-ldtilecfg-insert.ll b/llvm/test/CodeGen/X86/AMX/amx-ldtilecfg-insert.ll
index 8a8e7a3b4df2c..53c5a37656e5d 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-ldtilecfg-insert.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-ldtilecfg-insert.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
@buf = dso_local global [3072 x i8] zeroinitializer, align 16
define dso_local void @test1(i16 signext %0, i16 signext %1) nounwind {
diff --git a/llvm/test/CodeGen/X86/AMX/amx-lower-tile-copy.ll b/llvm/test/CodeGen/X86/AMX/amx-lower-tile-copy.ll
index a2b13a27774c0..36af9fc12c363 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-lower-tile-copy.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-lower-tile-copy.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f,+egpr --show-mc-encoding -verify-machineinstrs | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f,+egpr --show-mc-encoding -verify-machineinstrs | FileCheck %s --check-prefix=EGPR
define dso_local void @test1(ptr%buf) nounwind {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/AMX/amx-sched.ll b/llvm/test/CodeGen/X86/AMX/amx-sched.ll
index db90e6252db94..b2d72b16850da 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-sched.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-sched.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -mcpu=skx -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -mcpu=skx -verify-machineinstrs | FileCheck %s
define <256 x i32> @test_shape_sched(i16 %m, i16 %n, i16 %k, <256 x i32> %c, <256 x i32> %a, <256 x i32> %b) nounwind {
; Just to make sure shape def is not scheduled across ldtilecfg.
diff --git a/llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll b/llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
index 254f824379d56..3c7500b60d50e 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f,+egpr --show-mc-encoding -verify-machineinstrs | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f,+egpr --show-mc-encoding -verify-machineinstrs | FileCheck %s --check-prefix=EGPR
@buf = dso_local global [3072 x i8] zeroinitializer, align 64
diff --git a/llvm/test/CodeGen/X86/AMX/amx-spill.ll b/llvm/test/CodeGen/X86/AMX/amx-spill.ll
index a04715bd61322..37da5538d35fd 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-spill.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-spill.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
@buf = dso_local global [1024 x i8] zeroinitializer, align 64
@buf2 = dso_local global [1024 x i8] zeroinitializer, align 64
diff --git a/llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll b/llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll
index 9cf7aab0b3655..f7f20eeeebd93 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-tile-basic.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-int8,+amx-bf16,+avx512f -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-int8,+amx-bf16,+avx512f -verify-machineinstrs | FileCheck %s
define void @test_amx(ptr %pointer, ptr %base, i64 %stride) {
; CHECK-LABEL: test_amx:
diff --git a/llvm/test/CodeGen/X86/AMX/amx-tile-complex-internals.ll b/llvm/test/CodeGen/X86/AMX/amx-tile-complex-internals.ll
index ac731b48f6712..3c6498b14e6cd 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-tile-complex-internals.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-tile-complex-internals.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-bf16,+avx512f, \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-bf16,+avx512f, \
; RUN: -mattr=+amx-complex \
; RUN: -verify-machineinstrs | FileCheck %s
diff --git a/llvm/test/CodeGen/X86/AMX/amx-tile-intrinsics.ll b/llvm/test/CodeGen/X86/AMX/amx-tile-intrinsics.ll
index ce2829d5330bc..19868f5306d66 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-tile-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-tile-intrinsics.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+egpr -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+egpr -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefix=EGPR
define void @test_amx(ptr %pointer, ptr %base, i64 %stride) {
; CHECK-LABEL: test_amx:
diff --git a/llvm/test/CodeGen/X86/AMX/amx-zero-config.ll b/llvm/test/CodeGen/X86/AMX/amx-zero-config.ll
index 1eb641b3d73e5..584554c212a83 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-zero-config.ll
+++ b/llvm/test/CodeGen/X86/AMX/amx-zero-config.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f | FileCheck %s --check-prefix=AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -O0 | FileCheck %s --check-prefix=AVX512-O0
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx2 -O0 | FileCheck %s --check-prefix=AVX2-O0
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -O0 | FileCheck %s --check-prefix=SSE2-O0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -O0 | FileCheck %s --check-prefix=AVX512-O0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx2 -O0 | FileCheck %s --check-prefix=AVX2-O0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -O0 | FileCheck %s --check-prefix=SSE2-O0
define void @foo(ptr %buf) nounwind {
; AVX512-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/AMX/amxcomplex-intrinsics.ll b/llvm/test/CodeGen/X86/AMX/amxcomplex-intrinsics.ll
index 7774092e4210f..3fcff805b89d3 100644
--- a/llvm/test/CodeGen/X86/AMX/amxcomplex-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/AMX/amxcomplex-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-complex --show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-complex --show-mc-encoding | FileCheck %s
define void @test_tcmmimfp16ps() {
; CHECK-LABEL: test_tcmmimfp16ps:
diff --git a/llvm/test/CodeGen/X86/AppendingLinkage.ll b/llvm/test/CodeGen/X86/AppendingLinkage.ll
index 77d1ce4a21481..e880c267dae72 100644
--- a/llvm/test/CodeGen/X86/AppendingLinkage.ll
+++ b/llvm/test/CodeGen/X86/AppendingLinkage.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -mtriple=i686-- 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=i686-- 2>&1 | FileCheck %s
; CHECK: error: unknown special variable with appending linkage: foo
@foo = appending constant [1 x i32 ] zeroinitializer
diff --git a/llvm/test/CodeGen/X86/Atomics-64.ll b/llvm/test/CodeGen/X86/Atomics-64.ll
index b8b9a3525d3c9..8b5f7358f00db 100644
--- a/llvm/test/CodeGen/X86/Atomics-64.ll
+++ b/llvm/test/CodeGen/X86/Atomics-64.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin8 > %t.x86-64
-; RUN: llc < %s -mtriple=i686-apple-darwin8 -mattr=cx16 > %t.x86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin8 > %t.x86-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin8 -mattr=cx16 > %t.x86
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
@sc = common global i8 0
diff --git a/llvm/test/CodeGen/X86/DynamicCalleeSavedRegisters.ll b/llvm/test/CodeGen/X86/DynamicCalleeSavedRegisters.ll
index 261e8f873b2fe..a5195c2caca3c 100644
--- a/llvm/test/CodeGen/X86/DynamicCalleeSavedRegisters.ll
+++ b/llvm/test/CodeGen/X86/DynamicCalleeSavedRegisters.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu | FileCheck %s
declare x86_regcallcc i32 @callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0);
diff --git a/llvm/test/CodeGen/X86/GC/alloc_loop.ll b/llvm/test/CodeGen/X86/GC/alloc_loop.ll
index 4b7230fee9c5a..099481776d52f 100644
--- a/llvm/test/CodeGen/X86/GC/alloc_loop.ll
+++ b/llvm/test/CodeGen/X86/GC/alloc_loop.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64 < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 < %s
declare ptr @llvm_gc_allocate(i32)
declare void @llvm_gc_initialize(i32)
diff --git a/llvm/test/CodeGen/X86/GC/cg-O0.ll b/llvm/test/CodeGen/X86/GC/cg-O0.ll
index 502bd9e31b050..0830ce1709f13 100644
--- a/llvm/test/CodeGen/X86/GC/cg-O0.ll
+++ b/llvm/test/CodeGen/X86/GC/cg-O0.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64 < %s -O0
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 < %s -O0
define i32 @main() {
entry:
diff --git a/llvm/test/CodeGen/X86/GC/dynamic-frame-size.ll b/llvm/test/CodeGen/X86/GC/dynamic-frame-size.ll
index 717bd893689e6..00fbbec744907 100644
--- a/llvm/test/CodeGen/X86/GC/dynamic-frame-size.ll
+++ b/llvm/test/CodeGen/X86/GC/dynamic-frame-size.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/GC/erlang-gc.ll b/llvm/test/CodeGen/X86/GC/erlang-gc.ll
index c2cb8c7d65750..7a59344b93a1a 100644
--- a/llvm/test/CodeGen/X86/GC/erlang-gc.ll
+++ b/llvm/test/CodeGen/X86/GC/erlang-gc.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-linux-gnu < %s | FileCheck %s --check-prefix=CHECK64
-; RUN: llc -mtriple=i686-linux-gnu < %s | FileCheck %s --check-prefix=CHECK32
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu < %s | FileCheck %s --check-prefix=CHECK64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-gnu < %s | FileCheck %s --check-prefix=CHECK32
define i32 @main(i32 %x) nounwind gc "erlang" {
%puts = tail call i32 @foo(i32 %x)
diff --git a/llvm/test/CodeGen/X86/GC/lower_gcroot.ll b/llvm/test/CodeGen/X86/GC/lower_gcroot.ll
index 73c596f4bed48..8b566e64cffae 100644
--- a/llvm/test/CodeGen/X86/GC/lower_gcroot.ll
+++ b/llvm/test/CodeGen/X86/GC/lower_gcroot.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64 < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 < %s
%Env = type ptr
diff --git a/llvm/test/CodeGen/X86/GC/ocaml-gc-assert.ll b/llvm/test/CodeGen/X86/GC/ocaml-gc-assert.ll
index bc3444f4914e0..c3c4258a64438 100644
--- a/llvm/test/CodeGen/X86/GC/ocaml-gc-assert.ll
+++ b/llvm/test/CodeGen/X86/GC/ocaml-gc-assert.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; PR3168
; CHECK-LABEL: append
diff --git a/llvm/test/CodeGen/X86/GC/ocaml-gc.ll b/llvm/test/CodeGen/X86/GC/ocaml-gc.ll
index 9e05f1ceaa0c3..0a1b929ab9d23 100644
--- a/llvm/test/CodeGen/X86/GC/ocaml-gc.ll
+++ b/llvm/test/CodeGen/X86/GC/ocaml-gc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s
; CHECK: .file "<stdin>"
diff --git a/llvm/test/CodeGen/X86/GlobalISel/GV.ll b/llvm/test/CodeGen/X86/GlobalISel/GV.ll
index c161a32fd6b95..ad7b72e5c47a2 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/GV.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/GV.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=x86_64-apple-darwin -global-isel -verify-machineinstrs -relocation-model=pic < %s -o - | FileCheck %s --check-prefix=X64_DARWIN_PIC
-; RUN: llc -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32
-; RUN: llc -mtriple=x86_64-linux-gnux32 -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32ABI
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -global-isel -verify-machineinstrs -relocation-model=pic < %s -o - | FileCheck %s --check-prefix=X64_DARWIN_PIC
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnux32 -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32ABI
@g_int = dso_local global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/GlobalISel/add-ext.ll b/llvm/test/CodeGen/X86/GlobalISel/add-ext.ll
index 8146252235b00..fbf3bc5aaad4c 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/add-ext.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/add-ext.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -global-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -global-isel | FileCheck %s
; The fundamental problem: an add separated from other arithmetic by a sign or
; zero extension can't be combined with the later instructions. However, if the
diff --git a/llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll
index 7cdfd519f04dc..b3168b4cb0fc4 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/add-scalar.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X86
define i128 @test_add_i128(i128 %arg1, i128 %arg2) nounwind {
; X64-LABEL: test_add_i128:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/add-vec.ll b/llvm/test/CodeGen/X86/GlobalISel/add-vec.ll
index 6bebf09b26b87..4dc4a6530dbb9 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/add-vec.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/add-vec.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SKX
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=core-avx2 -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=AVX2
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=corei7-avx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mcpu=skx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mcpu=core-avx2 -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mcpu=corei7-avx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=AVX1
define <16 x i8> @test_add_v16i8(<16 x i8> %arg1, <16 x i8> %arg2) {
diff --git a/llvm/test/CodeGen/X86/GlobalISel/binop.ll b/llvm/test/CodeGen/X86/GlobalISel/binop.ll
index aced59dd0a6ea..305ee93c94859 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/binop.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/binop.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -mattr=+avx512vl -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+avx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+avx512f -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+avx512f -mattr=+avx512vl -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=CHECK,AVX
define i64 @test_sub_i64(i64 %arg1, i64 %arg2) {
; CHECK-LABEL: test_sub_i64:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/callingconv.ll b/llvm/test/CodeGen/X86/GlobalISel/callingconv.ll
index ab8880734afe0..341c81919ceeb 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/callingconv.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/callingconv.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -enable-cse-in-irtranslator=0 -enable-cse-in-legalizer=0 -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32
-; RUN: llc -enable-cse-in-irtranslator=0 -enable-cse-in-legalizer=0 -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -enable-cse-in-irtranslator=0 -enable-cse-in-legalizer=0 -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting -enable-cse-in-irtranslator=0 -enable-cse-in-legalizer=0 -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
define i32 @test_ret_i32() {
; X32-LABEL: test_ret_i32:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/calllowering-nocrashret.ll b/llvm/test/CodeGen/X86/GlobalISel/calllowering-nocrashret.ll
index 5e9311559b400..352dde95c3947 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/calllowering-nocrashret.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/calllowering-nocrashret.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -o - -global-isel %s -stop-after=irtranslator | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -o - -global-isel %s -stop-after=irtranslator | FileCheck %s
define <4 x i1> @foo() {
; CHECK-LABEL: name: foo
diff --git a/llvm/test/CodeGen/X86/GlobalISel/calllowering-tailcall.ll b/llvm/test/CodeGen/X86/GlobalISel/calllowering-tailcall.ll
index 6a856c32eb261..708ba3b9b03c9 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/calllowering-tailcall.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/calllowering-tailcall.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel < %s | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i686-linux-gnu -global-isel < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-gnu -global-isel < %s | FileCheck %s --check-prefix=X86
declare ptr @foo()
diff --git a/llvm/test/CodeGen/X86/GlobalISel/constant.ll b/llvm/test/CodeGen/X86/GlobalISel/constant.ll
index ac80b546cb330..d7ef1c4a21556 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/constant.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/constant.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s
define i8 @const_i8() {
; CHECK-LABEL: const_i8:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/ext-x86-64.ll b/llvm/test/CodeGen/X86/GlobalISel/ext-x86-64.ll
index ae25eeac37c7a..79d9038c830cd 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/ext-x86-64.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/ext-x86-64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs -global-isel-abort=2 < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs -global-isel-abort=2 < %s -o - | FileCheck %s --check-prefix=X64
; TODO merge with ext.ll after i64 sext supported on 32bit platform
diff --git a/llvm/test/CodeGen/X86/GlobalISel/ext.ll b/llvm/test/CodeGen/X86/GlobalISel/ext.ll
index 953579a920294..1bc64455033af 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/ext.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/ext.ll
@@ -1,8 +1,8 @@
; XFAIL: *
; FIXME: This test is broken due to https://bugs.llvm.org/show_bug.cgi?id=50035
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32
define i8 @test_zext_i1toi8(i32 %a) {
; X64-LABEL: test_zext_i1toi8:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/fadd-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/fadd-scalar.ll
index 73be29e5d8438..9616607e209a4 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/fadd-scalar.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/fadd-scalar.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
define float @test_fadd_float(float %arg1, float %arg2) {
; X64-LABEL: test_fadd_float:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/fconstant.ll b/llvm/test/CodeGen/X86/GlobalISel/fconstant.ll
index 8d2ee3c50f215..7d0e721c20326 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/fconstant.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/fconstant.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64_SMALL
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -global-isel -code-model=large -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64_LARGE
-; RUN: llc -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK32
-; RUN: llc -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -code-model=large -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK32
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse2 -global-isel -relocation-model=pic -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64_SMALL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+sse2 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64_SMALL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+sse2 -global-isel -code-model=large -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64_LARGE
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK32
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -code-model=large -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK32
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+sse2 -global-isel -relocation-model=pic -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64_SMALL
define void @test_float(ptr %a , float %b) {
; CHECK64_SMALL-LABEL: test_float:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/fdiv-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/fdiv-scalar.ll
index f2dc6de08528e..5838582904609 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/fdiv-scalar.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/fdiv-scalar.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
define float @test_fdiv_float(float %arg1, float %arg2) {
; X64-LABEL: test_fdiv_float:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/fmul-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/fmul-scalar.ll
index 187593d082c54..f92a6284e463e 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/fmul-scalar.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/fmul-scalar.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
define float @test_fmul_float(float %arg1, float %arg2) {
; X64-LABEL: test_fmul_float:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/fp-bitcast.ll b/llvm/test/CodeGen/X86/GlobalISel/fp-bitcast.ll
index dad33cac66dc7..bc4670a1fdf56 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/fp-bitcast.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/fp-bitcast.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -global-isel | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -global-isel -mattr=+avx | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -global-isel -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -global-isel | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -global-isel -mattr=+avx | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -global-isel -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512
define half @test_i16_to_half(i16 %0) {
; SSE2-LABEL: test_i16_to_half:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/fpext-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/fpext-scalar.ll
index 8501009e2915a..a7b52686d03a3 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/fpext-scalar.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/fpext-scalar.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
define double @test(float %a) {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/frameIndex.ll b/llvm/test/CodeGen/X86/GlobalISel/frameIndex.ll
index ec00493f7651b..047b0eb60a02f 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/frameIndex.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/frameIndex.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=x86_64-linux-gnu -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32
-; RUN: llc -mtriple=i386-linux-gnu -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32
-; RUN: llc -mtriple=x86_64-linux-gnux32 -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32ABI-GISEL
-; RUN: llc -mtriple=x86_64-linux-gnux32 -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32ABI-SDAG
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnux32 -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32ABI-GISEL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnux32 -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X32ABI-SDAG
define ptr @allocai32() {
; X64-LABEL: allocai32:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/fsub-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/fsub-scalar.ll
index b2a82834af5bb..14ed28df06044 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/fsub-scalar.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/fsub-scalar.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
define float @test_fsub_float(float %arg1, float %arg2) {
; X64-LABEL: test_fsub_float:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/inttoptr.ll b/llvm/test/CodeGen/X86/GlobalISel/inttoptr.ll
index 64daf4ea6d957..75c1e760ec9dc 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/inttoptr.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/inttoptr.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
define ptr @inttoptr_p0_s64(i64 %val) {
; CHECK-LABEL: inttoptr_p0_s64:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll b/llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
index a797c235c46f4..33b8af29d71d1 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc -O0 -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -stop-after=irtranslator < %s | FileCheck %s --check-prefix=X86
-; RUN: llc -O0 -mtriple=x86_64-linux-gnu -global-isel -stop-after=irtranslator < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=i386-linux-gnu -mattr=+sse2 -global-isel -stop-after=irtranslator < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-linux-gnu -global-isel -stop-after=irtranslator < %s | FileCheck %s --check-prefix=X64
@a1_8bit = external global i8
@a7_8bit = external global i8
diff --git a/llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll
index 8a6215e07ebf6..e06df2c9e20f1 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/lshr-scalar.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
define i64 @test_lshr_i64(i64 %arg1, i64 %arg2) {
; X64-LABEL: test_lshr_i64:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll b/llvm/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll
index 86d2a74bbab83..739f211052fbd 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/memop-scalar-x32.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -mtriple=i386-linux-gnu -regbankselect-greedy -global-isel -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -regbankselect-greedy -global-isel -verify-machineinstrs < %s | FileCheck %s
;TODO merge with x86-64 tests (many operations not suppored yet)
diff --git a/llvm/test/CodeGen/X86/GlobalISel/memop-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/memop-scalar.ll
index 033672fb1fc21..08fde8512dabe 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/memop-scalar.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/memop-scalar.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE_FAST
-; RUN: llc -mtriple=x86_64-linux-gnu -regbankselect-greedy -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE_GREEDY
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE_FAST
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -regbankselect-greedy -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL --check-prefix=SSE_GREEDY
define i1 @test_load_i1(ptr %p1) {
; ALL-LABEL: test_load_i1:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/memop-vec.ll b/llvm/test/CodeGen/X86/GlobalISel/memop-vec.ll
index 7f4a276e1ecb5..f070c45df0efc 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/memop-vec.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/memop-vec.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=SKX
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skx -regbankselect-greedy -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mcpu=skx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mcpu=skx -regbankselect-greedy -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=SKX
define <4 x i32> @test_load_v4i32_noalign(ptr %p1) {
; SKX-LABEL: test_load_v4i32_noalign:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/mul-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/mul-scalar.ll
index a98035157aab6..7b419804fc5e6 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/mul-scalar.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/mul-scalar.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i686-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X86
define i8 @test_mul_i8(i8 %arg1, i8 %arg2) nounwind {
; X64-LABEL: test_mul_i8:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/mul-vec.ll b/llvm/test/CodeGen/X86/GlobalISel/mul-vec.ll
index 37e1745311566..62c0088b43e02 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/mul-vec.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/mul-vec.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mcpu=skx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=SKX
define <8 x i16> @test_mul_v8i16(<8 x i16> %arg1, <8 x i16> %arg2) {
; SKX-LABEL: test_mul_v8i16:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/pr49087.ll b/llvm/test/CodeGen/X86/GlobalISel/pr49087.ll
index af42dd7c67204..88b88252877de 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/pr49087.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/pr49087.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -o - -global-isel -global-isel-abort=1 < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -o - -global-isel -global-isel-abort=1 < %s 2>&1 | FileCheck %s
define i32 @test_01(ptr %p, i64 %len, i32 %x) {
; CHECK-LABEL: test_01:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/ptr-add.ll b/llvm/test/CodeGen/X86/GlobalISel/ptr-add.ll
index c2599b610cadb..66e784ca7365b 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/ptr-add.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/ptr-add.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64_GISEL
-; RUN: llc -mtriple=x86_64-linux-gnu -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64_GISEL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
define ptr @test_gep_i8(ptr%arr, i8 %ind) {
; X64_GISEL-LABEL: test_gep_i8:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/ptrtoaddr.ll b/llvm/test/CodeGen/X86/GlobalISel/ptrtoaddr.ll
index f65d99df53ee3..6b20388bb9f06 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/ptrtoaddr.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/ptrtoaddr.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel < %s -o - | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel < %s -o - | FileCheck %s --check-prefix=CHECK
define i1 @ptrtoaddr_1(ptr %p) {
; CHECK-LABEL: ptrtoaddr_1:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/ptrtoint.ll b/llvm/test/CodeGen/X86/GlobalISel/ptrtoint.ll
index 01b4360087702..9d5636421ccfb 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/ptrtoint.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/ptrtoint.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
define i1 @ptrtoint_s1_p0(ptr %p) {
; CHECK-LABEL: ptrtoint_s1_p0:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/regbankselect-sse-intrinsics.ll b/llvm/test/CodeGen/X86/GlobalISel/regbankselect-sse-intrinsics.ll
index 3388af605d969..39655e40369cf 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/regbankselect-sse-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/regbankselect-sse-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse -global-isel -stop-after=regbankselect | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse -global-isel -stop-after=regbankselect | FileCheck %s
define void @test_x86_sse_max_ps(ptr %p1, ptr %p2) {
; CHECK-LABEL: name: test_x86_sse_max_ps
diff --git a/llvm/test/CodeGen/X86/GlobalISel/regbankselect-x87.ll b/llvm/test/CodeGen/X86/GlobalISel/regbankselect-x87.ll
index 6c06d505e8231..c2f201253fa8a 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/regbankselect-x87.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/regbankselect-x87.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel -stop-after=regbankselect | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel -stop-after=regbankselect | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel -stop-after=regbankselect | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel -stop-after=regbankselect | FileCheck %s --check-prefix=X64
define x86_fp80 @f0(x86_fp80 noundef %a) {
; X86-LABEL: name: f0
diff --git a/llvm/test/CodeGen/X86/GlobalISel/reloc-none.ll b/llvm/test/CodeGen/X86/GlobalISel/reloc-none.ll
index 841c9a6d62d9e..d427048341e33 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/reloc-none.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/reloc-none.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
define void @test_reloc_none() {
; CHECK-LABEL: test_reloc_none:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/roundeven.ll b/llvm/test/CodeGen/X86/GlobalISel/roundeven.ll
index dae27ffe6c5b2..882a201912427 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/roundeven.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/roundeven.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -global-isel -mtriple=x86_64-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -global-isel -mtriple=x86_64-linux-gnu < %s | FileCheck %s
; FIXME: Calling convention lowering fails
; define half @roundeven_f16(half %x) {
diff --git a/llvm/test/CodeGen/X86/GlobalISel/select-get-carry-bit.ll b/llvm/test/CodeGen/X86/GlobalISel/select-get-carry-bit.ll
index 0cf1372fed497..d7e615257c76c 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/select-get-carry-bit.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/select-get-carry-bit.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -global-isel=1 -global-isel-abort=1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -global-isel=1 -global-isel-abort=1 | FileCheck %s
; Issue #120029
define i16 @use_carry_bit(i16 %2) {
diff --git a/llvm/test/CodeGen/X86/GlobalISel/shl-scalar-widening.ll b/llvm/test/CodeGen/X86/GlobalISel/shl-scalar-widening.ll
index c1b44f974c3df..9eb0f854955b5 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/shl-scalar-widening.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/shl-scalar-widening.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
define i16 @test_shl_i4(i16 %v, i16 %a, i16 %b) {
; Let's say the arguments are the following unsigned
diff --git a/llvm/test/CodeGen/X86/GlobalISel/stacksave-stackrestore.ll b/llvm/test/CodeGen/X86/GlobalISel/stacksave-stackrestore.ll
index f55706edf1301..06cc878b0cf5f 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/stacksave-stackrestore.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/stacksave-stackrestore.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -global-isel=1 -mtriple=x86_64-linux-gnu -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -global-isel=1 -mtriple=x86_64-linux-gnu -o - %s | FileCheck %s
declare void @use_addr(ptr)
declare ptr @llvm.stacksave.p0()
diff --git a/llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll b/llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll
index 825e7bb064519..32d1b4789271f 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X86
define i128 @test_sub_i128(i128 %arg1, i128 %arg2) nounwind {
; X64-LABEL: test_sub_i128:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/sub-vec.ll b/llvm/test/CodeGen/X86/GlobalISel/sub-vec.ll
index 8186026836f33..7d31794956128 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/sub-vec.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/sub-vec.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mcpu=skx -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=SKX
define <16 x i8> @test_sub_v16i8(<16 x i8> %arg1, <16 x i8> %arg2) {
; SKX-LABEL: test_sub_v16i8:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/trunc.ll b/llvm/test/CodeGen/X86/GlobalISel/trunc.ll
index 6b91773d5fa75..2df5c44f7b6dc 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/trunc.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/trunc.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=CHECK
define i1 @trunc_i32toi1(i32 %a) {
; CHECK-LABEL: trunc_i32toi1:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/undef.ll b/llvm/test/CodeGen/X86/GlobalISel/undef.ll
index 34ada8a20999d..f3b611fb7d420 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/undef.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/undef.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL
define i8 @test() {
; ALL-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x32-irtranslator.ll b/llvm/test/CodeGen/X86/GlobalISel/x32-irtranslator.ll
index e4b9fac7334e0..c8c17997867c4 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x32-irtranslator.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/x32-irtranslator.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc -global-isel -mtriple=x86_64-linux-gnux32 -stop-after=irtranslator -verify-machineinstrs < %s -o - | FileCheck -check-prefix=X32ABI %s
+; RUN: llc -combiner-topological-sorting -global-isel -mtriple=x86_64-linux-gnux32 -stop-after=irtranslator -verify-machineinstrs < %s -o - | FileCheck -check-prefix=X32ABI %s
define ptr @ret_ptr() {
; X32ABI-LABEL: name: ret_ptr
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86-calllowering-dbg-trunc.ll b/llvm/test/CodeGen/X86/GlobalISel/x86-calllowering-dbg-trunc.ll
index 90c9290a83bbd..5e9e05b19bbd7 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86-calllowering-dbg-trunc.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86-calllowering-dbg-trunc.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=ALL
; This file is the output of clang -g -O2
; int test_dbg_trunc(unsigned long long a) { return a; }
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-fallback.ll b/llvm/test/CodeGen/X86/GlobalISel/x86_64-fallback.ll
index bb0f0ae14f304..d184524aaeeea 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86_64-fallback.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86_64-fallback.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o %t.out 2> %t.err
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o %t.out 2> %t.err
; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-OUT < %t.out
; RUN: FileCheck %s --check-prefix=FALLBACK-WITH-REPORT-ERR < %t.err
; This file checks that the fallback path to selection dag works.
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll b/llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
index 2f1f8bc63aa4f..ec21eaa305347 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -stop-after=irtranslator < %s -o - | FileCheck %s --check-prefix=ALL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -stop-after=irtranslator < %s -o - | FileCheck %s --check-prefix=ALL
%struct.f1 = type { float }
%struct.d1 = type { double }
diff --git a/llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator.ll b/llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator.ll
index 18907c0c40045..cdd37fb6c91c8 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator.ll
+++ b/llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -O0 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -O0 -global-isel -stop-after=irtranslator -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
define i8 @zext_i1_to_i8(i1 %val) {
; CHECK-LABEL: name: zext_i1_to_i8
diff --git a/llvm/test/CodeGen/X86/MachineBranchProb.ll b/llvm/test/CodeGen/X86/MachineBranchProb.ll
index 943b804ebc206..59ecf7b80e0c6 100644
--- a/llvm/test/CodeGen/X86/MachineBranchProb.ll
+++ b/llvm/test/CodeGen/X86/MachineBranchProb.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -print-after=finalize-isel -o /dev/null 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -print-after=finalize-isel -o /dev/null 2>&1 | FileCheck %s
;; Make sure a transformation in SelectionDAGBuilder that converts "or + br" to
;; two branches correctly updates the branch probability.
diff --git a/llvm/test/CodeGen/X86/MachineSink-CritEdge.ll b/llvm/test/CodeGen/X86/MachineSink-CritEdge.ll
index bc058354a21f0..b807ac836ba4a 100644
--- a/llvm/test/CodeGen/X86/MachineSink-CritEdge.ll
+++ b/llvm/test/CodeGen/X86/MachineSink-CritEdge.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
diff --git a/llvm/test/CodeGen/X86/MachineSink-DbgValue.ll b/llvm/test/CodeGen/X86/MachineSink-DbgValue.ll
index 02d7ba355ebff..7d68b680363fb 100644
--- a/llvm/test/CodeGen/X86/MachineSink-DbgValue.ll
+++ b/llvm/test/CodeGen/X86/MachineSink-DbgValue.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Should sink matching DBG_VALUEs also.
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-macosx10.7.0"
diff --git a/llvm/test/CodeGen/X86/MachineSink-Issue98477.ll b/llvm/test/CodeGen/X86/MachineSink-Issue98477.ll
index 4abb1f8e1ca42..8c9c6a3886ec1 100644
--- a/llvm/test/CodeGen/X86/MachineSink-Issue98477.ll
+++ b/llvm/test/CodeGen/X86/MachineSink-Issue98477.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/MachineSink-PHIUse.ll b/llvm/test/CodeGen/X86/MachineSink-PHIUse.ll
index 1329200c3e6e5..dbaa2ebed8ced 100644
--- a/llvm/test/CodeGen/X86/MachineSink-PHIUse.ll
+++ b/llvm/test/CodeGen/X86/MachineSink-PHIUse.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=x86_64-appel-darwin -disable-cgp-branch-opts -stats 2>&1 | grep "machine-sink"
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-appel-darwin -disable-cgp-branch-opts -stats 2>&1 | grep "machine-sink"
define fastcc void @t() nounwind ssp {
entry:
diff --git a/llvm/test/CodeGen/X86/MachineSink-SubReg.ll b/llvm/test/CodeGen/X86/MachineSink-SubReg.ll
index 677c9c9922c90..9f351d8f7246f 100644
--- a/llvm/test/CodeGen/X86/MachineSink-SubReg.ll
+++ b/llvm/test/CodeGen/X86/MachineSink-SubReg.ll
@@ -1,5 +1,5 @@
; PR28852: Check machine code sinking is not stopped by SUBREG_TO_REG.
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/MachineSink-eflags.ll b/llvm/test/CodeGen/X86/MachineSink-eflags.ll
index a6f38fbdc4b67..3a6698650ef8d 100644
--- a/llvm/test/CodeGen/X86/MachineSink-eflags.ll
+++ b/llvm/test/CodeGen/X86/MachineSink-eflags.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-pc-linux"
diff --git a/llvm/test/CodeGen/X86/MergeConsecutiveStores.ll b/llvm/test/CodeGen/X86/MergeConsecutiveStores.ll
index 0103d2bf3cc2c..991146e2858bb 100644
--- a/llvm/test/CodeGen/X86/MergeConsecutiveStores.ll
+++ b/llvm/test/CodeGen/X86/MergeConsecutiveStores.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-unknown -mattr=+avx -fixup-byte-word-insts=1 < %s | FileCheck -check-prefixes=X86,X86-BWON %s
-; RUN: llc -mtriple=i686-unknown-unknown -mattr=+avx -fixup-byte-word-insts=0 < %s | FileCheck -check-prefixes=X86,X86-BWOFF %s
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=1 < %s | FileCheck -check-prefixes=X64,X64-BWON %s
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=0 < %s | FileCheck -check-prefixes=X64,X64-BWOFF %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown -mattr=+avx -fixup-byte-word-insts=1 < %s | FileCheck -check-prefixes=X86,X86-BWON %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown -mattr=+avx -fixup-byte-word-insts=0 < %s | FileCheck -check-prefixes=X86,X86-BWOFF %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=1 < %s | FileCheck -check-prefixes=X64,X64-BWON %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+avx -fixup-byte-word-insts=0 < %s | FileCheck -check-prefixes=X64,X64-BWOFF %s
%struct.A = type { i8, i8, i8, i8, i8, i8, i8, i8 }
%struct.B = type { i32, i32, i32, i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/O0-pipeline.ll b/llvm/test/CodeGen/X86/O0-pipeline.ll
index e8a3084563573..65151facae40c 100644
--- a/llvm/test/CodeGen/X86/O0-pipeline.ll
+++ b/llvm/test/CodeGen/X86/O0-pipeline.ll
@@ -1,6 +1,6 @@
; When EXPENSIVE_CHECKS are enabled, the machine verifier appears between each
; pass. Ignore it with 'grep -v'.
-; RUN: llc -mtriple=x86_64-- -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 \
; RUN: | grep -v 'Verify generated machine code' | FileCheck %s
; REQUIRES: asserts
diff --git a/llvm/test/CodeGen/X86/PR34565.ll b/llvm/test/CodeGen/X86/PR34565.ll
index 1058235cf2fc8..86b53de48b971 100644
--- a/llvm/test/CodeGen/X86/PR34565.ll
+++ b/llvm/test/CodeGen/X86/PR34565.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux -x86-cmov-converter=true -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -x86-cmov-converter=true -verify-machineinstrs < %s | FileCheck %s
; Test for PR34565, check that DBG instructions are ignored while optimizing
; X86 CMOV instructions.
diff --git a/llvm/test/CodeGen/X86/PR40322.ll b/llvm/test/CodeGen/X86/PR40322.ll
index 49709cb9b88f8..f54382dd8377a 100644
--- a/llvm/test/CodeGen/X86/PR40322.ll
+++ b/llvm/test/CodeGen/X86/PR40322.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-windows-gnu | FileCheck %s --check-prefix=CHECK-MINGW-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-windows-gnu | FileCheck %s --check-prefix=CHECK-MINGW-X86
%struct.as = type { ptr }
diff --git a/llvm/test/CodeGen/X86/PR71178-register-coalescer-crash.ll b/llvm/test/CodeGen/X86/PR71178-register-coalescer-crash.ll
index 12d66f64cb73d..be3c1221cb0ad 100644
--- a/llvm/test/CodeGen/X86/PR71178-register-coalescer-crash.ll
+++ b/llvm/test/CodeGen/X86/PR71178-register-coalescer-crash.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64 -- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -- | FileCheck %s
define i32 @h(i1 %arg, i32 %arg1) {
; CHECK-LABEL: h:
diff --git a/llvm/test/CodeGen/X86/StackColoring-dbg.ll b/llvm/test/CodeGen/X86/StackColoring-dbg.ll
index ccb1c3fdb27fe..5449226372f6b 100644
--- a/llvm/test/CodeGen/X86/StackColoring-dbg.ll
+++ b/llvm/test/CodeGen/X86/StackColoring-dbg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=corei7 -no-stack-coloring=false < %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -no-stack-coloring=false < %s
; Make sure that we don't crash when dbg values are used.
diff --git a/llvm/test/CodeGen/X86/StackColoring.ll b/llvm/test/CodeGen/X86/StackColoring.ll
index db3e7dcdfe2d5..624f10d4b29f4 100644
--- a/llvm/test/CodeGen/X86/StackColoring.ll
+++ b/llvm/test/CodeGen/X86/StackColoring.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mcpu=corei7 -no-stack-coloring=false < %s | FileCheck %s --check-prefix=YESCOLOR --check-prefix=CHECK
-; RUN: llc -mcpu=corei7 -no-stack-coloring=false -stackcoloring-lifetime-start-on-first-use=false < %s | FileCheck %s --check-prefix=NOFIRSTUSE --check-prefix=CHECK
-; RUN: llc -mcpu=corei7 -no-stack-coloring=true < %s | FileCheck %s --check-prefix=NOCOLOR --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -no-stack-coloring=false < %s | FileCheck %s --check-prefix=YESCOLOR --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -no-stack-coloring=false -stackcoloring-lifetime-start-on-first-use=false < %s | FileCheck %s --check-prefix=NOFIRSTUSE --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -no-stack-coloring=true < %s | FileCheck %s --check-prefix=NOCOLOR --check-prefix=CHECK
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.8.0"
diff --git a/llvm/test/CodeGen/X86/SwitchLowering.ll b/llvm/test/CodeGen/X86/SwitchLowering.ll
index 921b4e3d24d11..eb5ddc37cbeb4 100644
--- a/llvm/test/CodeGen/X86/SwitchLowering.ll
+++ b/llvm/test/CodeGen/X86/SwitchLowering.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; PR964
define ptr @FindChar(ptr %CurPtr) {
diff --git a/llvm/test/CodeGen/X86/SwizzleShuff.ll b/llvm/test/CodeGen/X86/SwizzleShuff.ll
index 0cfafdd86863e..f8b27700e71a5 100644
--- a/llvm/test/CodeGen/X86/SwizzleShuff.ll
+++ b/llvm/test/CodeGen/X86/SwizzleShuff.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
; Check that we perform a scalar XOR on i32.
diff --git a/llvm/test/CodeGen/X86/TruncAssertSext.ll b/llvm/test/CodeGen/X86/TruncAssertSext.ll
index 9ab7622ef9dce..10c7aaa75077d 100644
--- a/llvm/test/CodeGen/X86/TruncAssertSext.ll
+++ b/llvm/test/CodeGen/X86/TruncAssertSext.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O2 -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-unknown-unknown | FileCheck %s
; Checks that a zeroing mov is inserted for the trunc/zext pair even when
; the source of the zext is an AssertSext node
; PR20494
diff --git a/llvm/test/CodeGen/X86/TruncAssertZext.ll b/llvm/test/CodeGen/X86/TruncAssertZext.ll
index 38f4bcd2a2307..8ff4002a4c805 100644
--- a/llvm/test/CodeGen/X86/TruncAssertZext.ll
+++ b/llvm/test/CodeGen/X86/TruncAssertZext.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O2 -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-unknown-unknown | FileCheck %s
; Checks that a zeroing mov is inserted for the trunc/zext pair even when
; the source of the zext is an AssertZext node
; PR28540
diff --git a/llvm/test/CodeGen/X86/WidenArith.ll b/llvm/test/CodeGen/X86/WidenArith.ll
index 194f614d084bc..1eb9708e504a9 100644
--- a/llvm/test/CodeGen/X86/WidenArith.ll
+++ b/llvm/test/CodeGen/X86/WidenArith.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
define <8 x i32> @test(<8 x float> %a, <8 x float> %b) {
; X86-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/abds-vector-128.ll b/llvm/test/CodeGen/X86/abds-vector-128.ll
index 148be83892b72..4edc8f05617f0 100644
--- a/llvm/test/CodeGen/X86/abds-vector-128.ll
+++ b/llvm/test/CodeGen/X86/abds-vector-128.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
;
; trunc(abs(sub(sext(a),sext(b)))) -> abds(a,b)
diff --git a/llvm/test/CodeGen/X86/abds-vector-256.ll b/llvm/test/CodeGen/X86/abds-vector-256.ll
index cc63ad04c08a6..a21cb827e58a6 100644
--- a/llvm/test/CodeGen/X86/abds-vector-256.ll
+++ b/llvm/test/CodeGen/X86/abds-vector-256.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s --check-prefixes=AVX1
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s --check-prefixes=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX512
;
; trunc(abs(sub(sext(a),sext(b)))) -> abds(a,b)
diff --git a/llvm/test/CodeGen/X86/abds-vector-512.ll b/llvm/test/CodeGen/X86/abds-vector-512.ll
index 359b962a152b2..e12a73c5a6320 100644
--- a/llvm/test/CodeGen/X86/abds-vector-512.ll
+++ b/llvm/test/CodeGen/X86/abds-vector-512.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
;
; trunc(abs(sub(sext(a),sext(b)))) -> abds(a,b)
diff --git a/llvm/test/CodeGen/X86/abdu-vector-128.ll b/llvm/test/CodeGen/X86/abdu-vector-128.ll
index 78b315a3773ec..123526e2f4a26 100644
--- a/llvm/test/CodeGen/X86/abdu-vector-128.ll
+++ b/llvm/test/CodeGen/X86/abdu-vector-128.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
;
; trunc(abs(sub(zext(a),zext(b)))) -> abdu(a,b)
diff --git a/llvm/test/CodeGen/X86/abdu-vector-256.ll b/llvm/test/CodeGen/X86/abdu-vector-256.ll
index 080fb779fecb2..a11cb80912ae8 100644
--- a/llvm/test/CodeGen/X86/abdu-vector-256.ll
+++ b/llvm/test/CodeGen/X86/abdu-vector-256.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s --check-prefixes=AVX1
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s --check-prefixes=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX512
;
; trunc(abs(sub(zext(a),zext(b)))) -> abdu(a,b)
diff --git a/llvm/test/CodeGen/X86/abdu-vector-512.ll b/llvm/test/CodeGen/X86/abdu-vector-512.ll
index a855bea61e530..da140aea8b25b 100644
--- a/llvm/test/CodeGen/X86/abdu-vector-512.ll
+++ b/llvm/test/CodeGen/X86/abdu-vector-512.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
;
; trunc(abs(sub(zext(a),zext(b)))) -> abdu(a,b)
diff --git a/llvm/test/CodeGen/X86/abi-isel.ll b/llvm/test/CodeGen/X86/abi-isel.ll
index 2ac392c729d19..f66aca6c16734 100644
--- a/llvm/test/CodeGen/X86/abi-isel.ll
+++ b/llvm/test/CodeGen/X86/abi-isel.ll
@@ -1,18 +1,18 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; NOTE: Use the --no_x86_scrub_rip additional argument to keep the rip address math.
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-64-STATIC
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-STATIC
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-PIC
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-64-PIC
-
-; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-STATIC
-; RUN: llc < %s -mtriple=i686-apple-darwin9 -relocation-model=dynamic-no-pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC
-; RUN: llc < %s -mtriple=i686-apple-darwin9 -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-PIC
-
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-STATIC
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=dynamic-no-pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-PIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-64-STATIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-STATIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-32-PIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=LINUX-64-PIC
+
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-STATIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin9 -relocation-model=dynamic-no-pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-DYNAMIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin9 -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-32-PIC
+
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -relocation-model=static -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-STATIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -relocation-model=dynamic-no-pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-DYNAMIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -code-model=small -pre-RA-sched=list-ilp | FileCheck %s -check-prefix=DARWIN-64-PIC
@src = external global [131072 x i32]
@dst = external global [131072 x i32]
diff --git a/llvm/test/CodeGen/X86/absolute-bit-mask-fastisel.ll b/llvm/test/CodeGen/X86/absolute-bit-mask-fastisel.ll
index 81b01b5291e65..5064fec241231 100644
--- a/llvm/test/CodeGen/X86/absolute-bit-mask-fastisel.ll
+++ b/llvm/test/CodeGen/X86/absolute-bit-mask-fastisel.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s | FileCheck %s
-; RUN: llc -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -relocation-model=pic < %s | FileCheck %s
; Regression test for PR38200
diff --git a/llvm/test/CodeGen/X86/absolute-bit-mask.ll b/llvm/test/CodeGen/X86/absolute-bit-mask.ll
index 8cf55d1a364fa..6d19f5e8cc213 100644
--- a/llvm/test/CodeGen/X86/absolute-bit-mask.ll
+++ b/llvm/test/CodeGen/X86/absolute-bit-mask.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s | FileCheck %s
-; RUN: llc -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -relocation-model=pic < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/absolute-cmp.ll b/llvm/test/CodeGen/X86/absolute-cmp.ll
index 6e6615e7bddf1..ea2958024b0ce 100644
--- a/llvm/test/CodeGen/X86/absolute-cmp.ll
+++ b/llvm/test/CodeGen/X86/absolute-cmp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -show-mc-encoding | FileCheck %s --check-prefix=NOPIC
-; RUN: llc -relocation-model=pic -show-mc-encoding < %s | FileCheck %s --check-prefix=PIC
+; RUN: llc -combiner-topological-sorting < %s -show-mc-encoding | FileCheck %s --check-prefix=NOPIC
+; RUN: llc -combiner-topological-sorting -relocation-model=pic -show-mc-encoding < %s | FileCheck %s --check-prefix=PIC
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/absolute-rotate.ll b/llvm/test/CodeGen/X86/absolute-rotate.ll
index 2b754332c7095..ff4e88a254acd 100644
--- a/llvm/test/CodeGen/X86/absolute-rotate.ll
+++ b/llvm/test/CodeGen/X86/absolute-rotate.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s | FileCheck %s
-; RUN: llc -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -relocation-model=pic < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/absolute-symbol-kernel-code-model.ll b/llvm/test/CodeGen/X86/absolute-symbol-kernel-code-model.ll
index ce7024dcc438b..04fe099b93c9d 100644
--- a/llvm/test/CodeGen/X86/absolute-symbol-kernel-code-model.ll
+++ b/llvm/test/CodeGen/X86/absolute-symbol-kernel-code-model.ll
@@ -1,4 +1,4 @@
-; RUN: llc --code-model=kernel < %s -asm-verbose=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting --code-model=kernel < %s -asm-verbose=0 | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/add-and-not.ll b/llvm/test/CodeGen/X86/add-and-not.ll
index 10e3a6bf6d533..e671f76419bd6 100644
--- a/llvm/test/CodeGen/X86/add-and-not.ll
+++ b/llvm/test/CodeGen/X86/add-and-not.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=X64
declare void @use(i8)
diff --git a/llvm/test/CodeGen/X86/add-ext.ll b/llvm/test/CodeGen/X86/add-ext.ll
index 12df378af3de3..61daecab5e125 100644
--- a/llvm/test/CodeGen/X86/add-ext.ll
+++ b/llvm/test/CodeGen/X86/add-ext.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; The fundamental problem: an add separated from other arithmetic by a sign or
; zero extension can't be combined with the later instructions. However, if the
diff --git a/llvm/test/CodeGen/X86/add-i512.ll b/llvm/test/CodeGen/X86/add-i512.ll
index b7ed76da4922b..a2978bbd4c94d 100644
--- a/llvm/test/CodeGen/X86/add-i512.ll
+++ b/llvm/test/CodeGen/X86/add-i512.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512,AVX512VL
define i512 @test_add_i512_reg_reg(i512 %a0, i512 %a1) nounwind {
; SSE-LABEL: test_add_i512_reg_reg:
diff --git a/llvm/test/CodeGen/X86/add-i64.ll b/llvm/test/CodeGen/X86/add-i64.ll
index 9b8bbfdd34510..0da7761d75349 100644
--- a/llvm/test/CodeGen/X86/add-i64.ll
+++ b/llvm/test/CodeGen/X86/add-i64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
define i32 @pr32690(i32) {
; X86-LABEL: pr32690:
diff --git a/llvm/test/CodeGen/X86/add-of-carry.ll b/llvm/test/CodeGen/X86/add-of-carry.ll
index 9bb50de25b2d0..c8ac3e108ae7e 100644
--- a/llvm/test/CodeGen/X86/add-of-carry.ll
+++ b/llvm/test/CodeGen/X86/add-of-carry.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s
; These tests use adc/sbb in place of set+add/sub. Should this transform
; be enabled by micro-architecture rather than as part of generic lowering/isel?
diff --git a/llvm/test/CodeGen/X86/add-sub-nsw-nuw.ll b/llvm/test/CodeGen/X86/add-sub-nsw-nuw.ll
index 6ff37de594ad9..85b308fe6f001 100644
--- a/llvm/test/CodeGen/X86/add-sub-nsw-nuw.ll
+++ b/llvm/test/CodeGen/X86/add-sub-nsw-nuw.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-apple-darwin < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-apple-darwin < %s | FileCheck %s
; PR30841: https://llvm.org/bugs/show_bug.cgi?id=30841
; Demanded bits analysis must disable nsw/nuw when it makes a
diff --git a/llvm/test/CodeGen/X86/add.ll b/llvm/test/CodeGen/X86/add.ll
index 079294ef09bdb..5034723eb7ea0 100644
--- a/llvm/test/CodeGen/X86/add.ll
+++ b/llvm/test/CodeGen/X86/add.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux -verify-machineinstrs | FileCheck %s --check-prefix=X64-LINUX
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=X64-WIN32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -verify-machineinstrs | FileCheck %s --check-prefix=X64-LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=X64-WIN32
declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32)
declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32)
diff --git a/llvm/test/CodeGen/X86/add32ri8.ll b/llvm/test/CodeGen/X86/add32ri8.ll
index 60d59677c0012..bb47391336582 100644
--- a/llvm/test/CodeGen/X86/add32ri8.ll
+++ b/llvm/test/CodeGen/X86/add32ri8.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -mtriple=x86_64-linux -fast-isel -show-mc-encoding < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux -fast-isel -show-mc-encoding < %s | FileCheck %s
; pr22854
define void @foo(ptr %s, i32 %x) {
diff --git a/llvm/test/CodeGen/X86/add_shl_constant.ll b/llvm/test/CodeGen/X86/add_shl_constant.ll
index b783a51c2eef7..7f355f0f108ec 100644
--- a/llvm/test/CodeGen/X86/add_shl_constant.ll
+++ b/llvm/test/CodeGen/X86/add_shl_constant.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin < %s | FileCheck %s
; CHECK-LABEL: add_shl_add_constant_1_i32
; CHECK: leal 984(%rsi,%rdi,8), %eax
diff --git a/llvm/test/CodeGen/X86/addcarry2.ll b/llvm/test/CodeGen/X86/addcarry2.ll
index 0338577dbddc2..461b5fce5cec8 100644
--- a/llvm/test/CodeGen/X86/addcarry2.ll
+++ b/llvm/test/CodeGen/X86/addcarry2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown --show-mc-encoding | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown --show-mc-encoding | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown --show-mc-encoding | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown --show-mc-encoding | FileCheck %s --check-prefix=X64
define void @adc_load_store_64_15(ptr inreg %x, ptr inreg %x2, i64 inreg %y) nounwind {
; X86-LABEL: adc_load_store_64_15:
diff --git a/llvm/test/CodeGen/X86/addr-label-difference.ll b/llvm/test/CodeGen/X86/addr-label-difference.ll
index bfef0ac77bc15..aefac4f9ac1b2 100644
--- a/llvm/test/CodeGen/X86/addr-label-difference.ll
+++ b/llvm/test/CodeGen/X86/addr-label-difference.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; PR5929
; CHECK: .section __TEXT,__const
diff --git a/llvm/test/CodeGen/X86/addr-mode-matcher-2.ll b/llvm/test/CodeGen/X86/addr-mode-matcher-2.ll
index c810fe137024c..24fe13429e063 100644
--- a/llvm/test/CodeGen/X86/addr-mode-matcher-2.ll
+++ b/llvm/test/CodeGen/X86/addr-mode-matcher-2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
; Test coverage for matchAddressRecursively's MUL handling
diff --git a/llvm/test/CodeGen/X86/addr-mode-matcher-3.ll b/llvm/test/CodeGen/X86/addr-mode-matcher-3.ll
index beea6d36fe874..6f2b3f021bd42 100644
--- a/llvm/test/CodeGen/X86/addr-mode-matcher-3.ll
+++ b/llvm/test/CodeGen/X86/addr-mode-matcher-3.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define i32 @mask_add_sext_i32_i64(ptr %base, i32 %i) {
; X86-LABEL: mask_add_sext_i32_i64:
diff --git a/llvm/test/CodeGen/X86/addr-mode-matcher-4.ll b/llvm/test/CodeGen/X86/addr-mode-matcher-4.ll
index a384bc3e55107..47c8968ced079 100644
--- a/llvm/test/CodeGen/X86/addr-mode-matcher-4.ll
+++ b/llvm/test/CodeGen/X86/addr-mode-matcher-4.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
%structA = type { %classB, float, i16, i8, i32 }
%classB = type { double, double, double }
diff --git a/llvm/test/CodeGen/X86/addr-mode-matcher.ll b/llvm/test/CodeGen/X86/addr-mode-matcher.ll
index e6125c4159844..ef7bf7da6c505 100644
--- a/llvm/test/CodeGen/X86/addr-mode-matcher.ll
+++ b/llvm/test/CodeGen/X86/addr-mode-matcher.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; This testcase used to hit an assert during ISel. For details, see the big
; comment inside the function.
diff --git a/llvm/test/CodeGen/X86/addr-of-ret-addr.ll b/llvm/test/CodeGen/X86/addr-of-ret-addr.ll
index c065f17222666..c0996151b769e 100644
--- a/llvm/test/CodeGen/X86/addr-of-ret-addr.ll
+++ b/llvm/test/CodeGen/X86/addr-of-ret-addr.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -frame-pointer=all -mtriple=i686-- | FileCheck %s --check-prefix=CHECK-X86
-; RUN: llc < %s -frame-pointer=all -mtriple=x86_64-- | FileCheck %s --check-prefix=CHECK-X64
+; RUN: llc -combiner-topological-sorting < %s -frame-pointer=all -mtriple=i686-- | FileCheck %s --check-prefix=CHECK-X86
+; RUN: llc -combiner-topological-sorting < %s -frame-pointer=all -mtriple=x86_64-- | FileCheck %s --check-prefix=CHECK-X64
define ptr @f() nounwind readnone optsize {
entry:
diff --git a/llvm/test/CodeGen/X86/address-type-promotion-constantexpr.ll b/llvm/test/CodeGen/X86/address-type-promotion-constantexpr.ll
index 3202eb4718d6f..b19f56df40398 100644
--- a/llvm/test/CodeGen/X86/address-type-promotion-constantexpr.ll
+++ b/llvm/test/CodeGen/X86/address-type-promotion-constantexpr.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux
; PR20314 is a crashing bug. This program does nothing with the load, so just check that the return is 0.
diff --git a/llvm/test/CodeGen/X86/addrsig.ll b/llvm/test/CodeGen/X86/addrsig.ll
index e306681b00a16..5902c4bd30f9a 100644
--- a/llvm/test/CodeGen/X86/addrsig.ll
+++ b/llvm/test/CodeGen/X86/addrsig.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux | FileCheck --check-prefix=NO-ADDRSIG %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux -addrsig | FileCheck %s
-; RUN: llc %s -filetype=obj -mtriple=x86_64-unknown-linux -addrsig -o %t
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux | FileCheck --check-prefix=NO-ADDRSIG %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux -addrsig | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -filetype=obj -mtriple=x86_64-unknown-linux -addrsig -o %t
; RUN: llvm-readobj --addrsig %t | FileCheck %s --check-prefix=SYM
; NO-ADDRSIG-NOT: .addrsig
diff --git a/llvm/test/CodeGen/X86/addsub-constant-folding.ll b/llvm/test/CodeGen/X86/addsub-constant-folding.ll
index 1cdc81223168f..a6de21bbd9359 100644
--- a/llvm/test/CodeGen/X86/addsub-constant-folding.ll
+++ b/llvm/test/CodeGen/X86/addsub-constant-folding.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
declare void @use(i32 %arg)
declare void @vec_use(<4 x i32> %arg)
diff --git a/llvm/test/CodeGen/X86/adx-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/adx-intrinsics-upgrade.ll
index 91ce508f4aa64..76495e68bc49f 100644
--- a/llvm/test/CodeGen/X86/adx-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/adx-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 --show-mc-encoding | FileCheck %s --check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=broadwell --show-mc-encoding | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 --show-mc-encoding | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=broadwell --show-mc-encoding | FileCheck %s --check-prefix=CHECK
declare i8 @llvm.x86.addcarryx.u32(i8, i32, i32, ptr)
diff --git a/llvm/test/CodeGen/X86/adx-intrinsics.ll b/llvm/test/CodeGen/X86/adx-intrinsics.ll
index 936ce1e336ddc..52ef42755910b 100644
--- a/llvm/test/CodeGen/X86/adx-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/adx-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 --show-mc-encoding | FileCheck %s --check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=broadwell --show-mc-encoding | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 --show-mc-encoding | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=broadwell --show-mc-encoding | FileCheck %s --check-prefix=CHECK
define i8 @test_addcarry_32_load(i8 %c, ptr %aptr, i32 %b, ptr %ptr) {
; CHECK-LABEL: test_addcarry_32_load:
diff --git a/llvm/test/CodeGen/X86/aes_intrinsics.ll b/llvm/test/CodeGen/X86/aes_intrinsics.ll
index 442feca3fc197..2136dfaf4a4f6 100644
--- a/llvm/test/CodeGen/X86/aes_intrinsics.ll
+++ b/llvm/test/CodeGen/X86/aes_intrinsics.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+aes,-avx -show-mc-encoding | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+aes,+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+aes,-avx -show-mc-encoding | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+aes,+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+aes,-avx -show-mc-encoding | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+aes,+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+aes,-avx -show-mc-encoding | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+aes,+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX
define <2 x i64> @test_x86_aesni_aesdec(<2 x i64> %a0, <2 x i64> %a1) {
; SSE-LABEL: test_x86_aesni_aesdec:
diff --git a/llvm/test/CodeGen/X86/alias-gep.ll b/llvm/test/CodeGen/X86/alias-gep.ll
index 65d2ced6df5ba..99b5e2d7e2aad 100644
--- a/llvm/test/CodeGen/X86/alias-gep.ll
+++ b/llvm/test/CodeGen/X86/alias-gep.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck --check-prefix=MACHO %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck --check-prefix=ELF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck --check-prefix=MACHO %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck --check-prefix=ELF %s
;MACHO: .globl _offsetSym0
;MACHO-NOT: .alt_entry
diff --git a/llvm/test/CodeGen/X86/alias-static-alloca.ll b/llvm/test/CodeGen/X86/alias-static-alloca.ll
index f4a9e4b0df576..ca46f50773367 100644
--- a/llvm/test/CodeGen/X86/alias-static-alloca.ll
+++ b/llvm/test/CodeGen/X86/alias-static-alloca.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s
; We should be able to bypass the load values to their corresponding
; stores here.
diff --git a/llvm/test/CodeGen/X86/aliases.ll b/llvm/test/CodeGen/X86/aliases.ll
index d36798820fe83..af213b9b49653 100644
--- a/llvm/test/CodeGen/X86/aliases.ll
+++ b/llvm/test/CodeGen/X86/aliases.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -asm-verbose=false \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -asm-verbose=false \
; RUN: -relocation-model=pic | FileCheck %s
@thread_var = thread_local global i32 42, align 4
diff --git a/llvm/test/CodeGen/X86/align-branch-boundary-default.ll b/llvm/test/CodeGen/X86/align-branch-boundary-default.ll
index d2b4433426fbd..4b4d82e2d1f4b 100644
--- a/llvm/test/CodeGen/X86/align-branch-boundary-default.ll
+++ b/llvm/test/CodeGen/X86/align-branch-boundary-default.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -O3 -mtriple=x86_64-unknown-unknown -mcpu=skylake -filetype=obj < %s | llvm-objdump -d --no-show-raw-insn - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -O3 -mtriple=x86_64-unknown-unknown -mcpu=skylake -filetype=obj < %s | llvm-objdump -d --no-show-raw-insn - | FileCheck %s
; TODO: At the moment, autopadding for SKX102 is not the default, but
; eventually we'd like ti to be for the integrated assembler (only).
diff --git a/llvm/test/CodeGen/X86/align-branch-boundary-noautopadding.ll b/llvm/test/CodeGen/X86/align-branch-boundary-noautopadding.ll
index 3d8f771b0080d..dc13fff27c24d 100644
--- a/llvm/test/CodeGen/X86/align-branch-boundary-noautopadding.ll
+++ b/llvm/test/CodeGen/X86/align-branch-boundary-noautopadding.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -O3 -mcpu=skylake -x86-align-branch-boundary=32 -x86-align-branch=call -filetype=obj < %s | llvm-objdump -d --no-show-raw-insn - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -O3 -mcpu=skylake -x86-align-branch-boundary=32 -x86-align-branch=call -filetype=obj < %s | llvm-objdump -d --no-show-raw-insn - | FileCheck %s
;; This file is a companion to align-branch-boundary-suppressions.ll.
;; It exists to demonstrate that suppressions are actually wired into the
diff --git a/llvm/test/CodeGen/X86/align-branch-boundary-suppressions-tls.ll b/llvm/test/CodeGen/X86/align-branch-boundary-suppressions-tls.ll
index 0e2e6f3ef81df..0abb60f97743a 100644
--- a/llvm/test/CodeGen/X86/align-branch-boundary-suppressions-tls.ll
+++ b/llvm/test/CodeGen/X86/align-branch-boundary-suppressions-tls.ll
@@ -2,8 +2,8 @@
;; sequence. It uses prefixes to allow linker relaxation. We need to disable
;; prefix or nop padding for it. For simplicity and consistency, disable for
;; Local Dynamic and 32-bit as well.
-; RUN: llc -mtriple=i386 -relocation-model=pic -x86-branches-within-32B-boundaries < %s | FileCheck --check-prefixes=CHECK,X86 %s
-; RUN: llc -mtriple=x86_64 -relocation-model=pic -x86-branches-within-32B-boundaries < %s | FileCheck --check-prefixes=CHECK,X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386 -relocation-model=pic -x86-branches-within-32B-boundaries < %s | FileCheck --check-prefixes=CHECK,X86 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -relocation-model=pic -x86-branches-within-32B-boundaries < %s | FileCheck --check-prefixes=CHECK,X64 %s
@gd = external thread_local global i32
@ld = internal thread_local global i32 0
diff --git a/llvm/test/CodeGen/X86/align-branch-boundary-suppressions.ll b/llvm/test/CodeGen/X86/align-branch-boundary-suppressions.ll
index 97e2b5ff63e51..d5292efa5f4b4 100644
--- a/llvm/test/CodeGen/X86/align-branch-boundary-suppressions.ll
+++ b/llvm/test/CodeGen/X86/align-branch-boundary-suppressions.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -O3 -enable-implicit-null-checks -mcpu=skylake -x86-align-branch-boundary=32 -x86-align-branch=call+jmp+indirect+ret+jcc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -O3 -enable-implicit-null-checks -mcpu=skylake -x86-align-branch-boundary=32 -x86-align-branch=call+jmp+indirect+ret+jcc < %s | FileCheck %s
;; The tests in this file check that various constructs which need to disable
;; prefix and/or nop padding do so in the right places. However, since we
diff --git a/llvm/test/CodeGen/X86/align-down-const.ll b/llvm/test/CodeGen/X86/align-down-const.ll
index 378b55195acc7..c0cfe8f6db309 100644
--- a/llvm/test/CodeGen/X86/align-down-const.ll
+++ b/llvm/test/CodeGen/X86/align-down-const.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X86
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X64
; Fold
; ptr - (ptr & C)
diff --git a/llvm/test/CodeGen/X86/align-down.ll b/llvm/test/CodeGen/X86/align-down.ll
index c359c04f527a3..7a3a3484e4640 100644
--- a/llvm/test/CodeGen/X86/align-down.ll
+++ b/llvm/test/CodeGen/X86/align-down.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X86,NOBMI-X86
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefixes=X86,BMI-X86
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X64,NOBMI-X64
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefixes=X64,BMI-X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X86,NOBMI-X86
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefixes=X86,BMI-X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X64,NOBMI-X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefixes=X64,BMI-X64
; Fold
; ptr - (ptr & (alignment-1))
diff --git a/llvm/test/CodeGen/X86/aligned-comm.ll b/llvm/test/CodeGen/X86/aligned-comm.ll
index ba6b670eff594..d72c8b5c80636 100644
--- a/llvm/test/CodeGen/X86/aligned-comm.ll
+++ b/llvm/test/CodeGen/X86/aligned-comm.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=i686
-; RUN: llc < %s -mtriple=i386-apple-darwin10 | FileCheck %s --check-prefix=DARWIN
-; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s --check-prefix=DARWIN
-; RUN: llc < %s -mtriple=i386-apple-darwin8 | FileCheck %s --check-prefix=DARWIN8
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefix=i686
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10 | FileCheck %s --check-prefix=DARWIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9 | FileCheck %s --check-prefix=DARWIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin8 | FileCheck %s --check-prefix=DARWIN8
; i686: array,16512
; DARWIN8: array,16512
diff --git a/llvm/test/CodeGen/X86/aligned-variadic.ll b/llvm/test/CodeGen/X86/aligned-variadic.ll
index bc60662def2bf..b1e77a58202ff 100644
--- a/llvm/test/CodeGen/X86/aligned-variadic.ll
+++ b/llvm/test/CodeGen/X86/aligned-variadic.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -stack-symbol-ordering=0 | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=i686-apple-darwin -stack-symbol-ordering=0 | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -stack-symbol-ordering=0 | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -stack-symbol-ordering=0 | FileCheck %s -check-prefix=X86
%struct.Baz = type { [17 x i8] }
%struct.__va_list_tag = type { i32, i32, ptr, ptr }
diff --git a/llvm/test/CodeGen/X86/alignment-2.ll b/llvm/test/CodeGen/X86/alignment-2.ll
index b36ad7dde3bb6..4664ea896e090 100644
--- a/llvm/test/CodeGen/X86/alignment-2.ll
+++ b/llvm/test/CodeGen/X86/alignment-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple i386-apple-darwin10 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple i386-apple-darwin10 | FileCheck %s
; <rdar://problem/10058036>
%struct._psqlSettings = type { ptr, i32, ptr, i8, %struct.printQueryOpt, ptr, i8, i32, ptr, i8, i32, ptr, ptr, ptr, i64, i8, ptr, ptr, i8, i8, i8, i8, i8, i32, i32, i32, i32, i32, ptr, ptr, ptr, i32 }
diff --git a/llvm/test/CodeGen/X86/alignment.ll b/llvm/test/CodeGen/X86/alignment.ll
index acf11fdec494f..fe429c7563141 100644
--- a/llvm/test/CodeGen/X86/alignment.ll
+++ b/llvm/test/CodeGen/X86/alignment.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - -mtriple=x86_64-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - -mtriple=x86_64-linux-gnu | FileCheck %s
; This cannot get rounded up to the preferred alignment (16) if they have an
; explicit alignment specified.
diff --git a/llvm/test/CodeGen/X86/all-ones-vector.ll b/llvm/test/CodeGen/X86/all-ones-vector.ll
index d624f6c13e367..56a8c13723f5e 100644
--- a/llvm/test/CodeGen/X86/all-ones-vector.ll
+++ b/llvm/test/CodeGen/X86/all-ones-vector.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX256,AVX2
-; RUN: llc < %s -mtriple=i386-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX256,AVX512
-; RUN: llc < %s -mtriple=i386-unknown -mcpu=skx | FileCheck %s --check-prefixes=AVX,AVX256,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX256,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX256,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=skx | FileCheck %s --check-prefixes=AVX,AVX256,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX256,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX256,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mcpu=skx | FileCheck %s --check-prefixes=AVX,AVX256,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX256,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX256,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=skx | FileCheck %s --check-prefixes=AVX,AVX256,AVX512
define <16 x i8> @allones_v16i8() nounwind {
; SSE-LABEL: allones_v16i8:
diff --git a/llvm/test/CodeGen/X86/alldiv-divdi3.ll b/llvm/test/CodeGen/X86/alldiv-divdi3.ll
index ab2036743de42..f5a5a36a13c4a 100644
--- a/llvm/test/CodeGen/X86/alldiv-divdi3.ll
+++ b/llvm/test/CodeGen/X86/alldiv-divdi3.ll
@@ -1,9 +1,9 @@
; Test that, for a 64 bit signed div, a libcall to alldiv is made on Windows
; unless we have libgcc.
-; RUN: llc < %s -mtriple i386-pc-win32 | FileCheck %s
-; RUN: llc < %s -mtriple i386-pc-cygwin | FileCheck %s -check-prefix USEDIVDI
-; RUN: llc < %s -mtriple i386-pc-mingw32 | FileCheck %s -check-prefix USEDIVDI
+; RUN: llc -combiner-topological-sorting < %s -mtriple i386-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple i386-pc-cygwin | FileCheck %s -check-prefix USEDIVDI
+; RUN: llc -combiner-topological-sorting < %s -mtriple i386-pc-mingw32 | FileCheck %s -check-prefix USEDIVDI
define i32 @main(i32 %argc, ptr nocapture %argv) nounwind readonly {
entry:
diff --git a/llvm/test/CodeGen/X86/alloca-align-rounding-32.ll b/llvm/test/CodeGen/X86/alloca-align-rounding-32.ll
index fdc62b37c629e..0eb06796caebb 100644
--- a/llvm/test/CodeGen/X86/alloca-align-rounding-32.ll
+++ b/llvm/test/CodeGen/X86/alloca-align-rounding-32.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin | FileCheck %s
declare void @bar(ptr %n)
diff --git a/llvm/test/CodeGen/X86/alloca-align-rounding.ll b/llvm/test/CodeGen/X86/alloca-align-rounding.ll
index 38866ceaca32c..edb99af41ec76 100644
--- a/llvm/test/CodeGen/X86/alloca-align-rounding.ll
+++ b/llvm/test/CodeGen/X86/alloca-align-rounding.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux -enable-misched=false | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 -enable-misched=false | FileCheck %s -check-prefix=X32ABI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -enable-misched=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnux32 -enable-misched=false | FileCheck %s -check-prefix=X32ABI
declare void @bar(ptr %n)
diff --git a/llvm/test/CodeGen/X86/alloca-overaligned.ll b/llvm/test/CodeGen/X86/alloca-overaligned.ll
index 49eee3674dd20..54dfe34b787ce 100644
--- a/llvm/test/CodeGen/X86/alloca-overaligned.ll
+++ b/llvm/test/CodeGen/X86/alloca-overaligned.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=skylake | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=skylake | FileCheck %s
declare void @capture(ptr)
diff --git a/llvm/test/CodeGen/X86/allow-check.ll b/llvm/test/CodeGen/X86/allow-check.ll
index 602e5a94ee3ee..8574e44e86b63 100644
--- a/llvm/test/CodeGen/X86/allow-check.ll
+++ b/llvm/test/CodeGen/X86/allow-check.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64 -global-isel=0 -fast-isel=0 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64 -global-isel=1 -fast-isel=0 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64 -global-isel=0 -fast-isel=1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -global-isel=0 -fast-isel=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -global-isel=1 -fast-isel=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -global-isel=0 -fast-isel=1 | FileCheck %s
define i1 @test_runtime() local_unnamed_addr {
; CHECK-LABEL: test_runtime:
diff --git a/llvm/test/CodeGen/X86/allrem-moddi3.ll b/llvm/test/CodeGen/X86/allrem-moddi3.ll
index ffada4db8886d..1d5c4f69f7739 100644
--- a/llvm/test/CodeGen/X86/allrem-moddi3.ll
+++ b/llvm/test/CodeGen/X86/allrem-moddi3.ll
@@ -1,9 +1,9 @@
; Test that, for a 64 bit signed rem, a libcall to allrem is made on Windows
; unless we have libgcc.
-; RUN: llc < %s -mtriple i386-pc-win32 | FileCheck %s
-; RUN: llc < %s -mtriple i386-pc-cygwin | FileCheck %s -check-prefix USEMODDI
-; RUN: llc < %s -mtriple i386-pc-mingw32 | FileCheck %s -check-prefix USEMODDI
+; RUN: llc -combiner-topological-sorting < %s -mtriple i386-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple i386-pc-cygwin | FileCheck %s -check-prefix USEMODDI
+; RUN: llc -combiner-topological-sorting < %s -mtriple i386-pc-mingw32 | FileCheck %s -check-prefix USEMODDI
; PR10305
; END.
diff --git a/llvm/test/CodeGen/X86/amx-across-func-tilemovrow.ll b/llvm/test/CodeGen/X86/amx-across-func-tilemovrow.ll
index 885bc805d6552..d56517dbfdba8 100644
--- a/llvm/test/CodeGen/X86/amx-across-func-tilemovrow.ll
+++ b/llvm/test/CodeGen/X86/amx-across-func-tilemovrow.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx10.2 -mattr=+amx-avx512 -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx10.2 -mattr=+amx-avx512 -verify-machineinstrs -enable-ipra | FileCheck -check-prefix=IPRA %s
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx10.2 -mattr=+amx-avx512 -verify-machineinstrs | FileCheck -check-prefix=O0 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx10.2 -mattr=+amx-avx512 -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx10.2 -mattr=+amx-avx512 -verify-machineinstrs -enable-ipra | FileCheck -check-prefix=IPRA %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx10.2 -mattr=+amx-avx512 -verify-machineinstrs | FileCheck -check-prefix=O0 %s
@buf = dso_local global [3072 x i8] zeroinitializer, align 64
diff --git a/llvm/test/CodeGen/X86/amx-avx512-intrinsics.ll b/llvm/test/CodeGen/X86/amx-avx512-intrinsics.ll
index 62cafc5a43c7b..73062459ffb15 100644
--- a/llvm/test/CodeGen/X86/amx-avx512-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/amx-avx512-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+amx-tile,+amx-avx512,+avx10.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+amx-tile,+amx-avx512,+avx10.2 | FileCheck %s
define <16 x float> @test_tcvtrowd2ps(i32 %A) {
; CHECK-LABEL: test_tcvtrowd2ps:
diff --git a/llvm/test/CodeGen/X86/amx-fp8-internal.ll b/llvm/test/CodeGen/X86/amx-fp8-internal.ll
index 87d755f2a69f6..9bc735c031dea 100644
--- a/llvm/test/CodeGen/X86/amx-fp8-internal.ll
+++ b/llvm/test/CodeGen/X86/amx-fp8-internal.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+avx512f \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+avx512f \
; RUN: -mattr=+amx-fp8 -verify-machineinstrs | FileCheck %s
define void @test_amx(i8* %pointer, i8* %base, i64 %stride) {
diff --git a/llvm/test/CodeGen/X86/amx-tf32-internal.ll b/llvm/test/CodeGen/X86/amx-tf32-internal.ll
index caf7a1cb7bd2d..736e8cf8a289a 100644
--- a/llvm/test/CodeGen/X86/amx-tf32-internal.ll
+++ b/llvm/test/CodeGen/X86/amx-tf32-internal.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+avx512f, \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+avx512f, \
; RUN: -mattr=+amx-tf32 -verify-machineinstrs | FileCheck %s
define void @test_amx(i8* %pointer, i8* %base, i64 %stride) {
diff --git a/llvm/test/CodeGen/X86/amx-tf32-intrinsics.ll b/llvm/test/CodeGen/X86/amx-tf32-intrinsics.ll
index 642c1b7317f81..e0cf177269afc 100644
--- a/llvm/test/CodeGen/X86/amx-tf32-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/amx-tf32-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-tf32 -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-tf32 -verify-machineinstrs | FileCheck %s
define void @test_tmmultf32ps() {
; CHECK-LABEL: test_tmmultf32ps:
diff --git a/llvm/test/CodeGen/X86/amx-tile-avx512-internals.ll b/llvm/test/CodeGen/X86/amx-tile-avx512-internals.ll
index dc8252ae7aca1..985abd27e0c11 100644
--- a/llvm/test/CodeGen/X86/amx-tile-avx512-internals.ll
+++ b/llvm/test/CodeGen/X86/amx-tile-avx512-internals.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-bf16,+avx10.2, \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-bf16,+avx10.2, \
; RUN: -mattr=+amx-avx512 -verify-machineinstrs | FileCheck %s
define void @test_amx(i8* %pointer, i8* %base, i32 %index, i64 %stride) {
diff --git a/llvm/test/CodeGen/X86/amx_fp16_intrinsics.ll b/llvm/test/CodeGen/X86/amx_fp16_intrinsics.ll
index 0b7a3008594b2..82de193998f34 100644
--- a/llvm/test/CodeGen/X86/amx_fp16_intrinsics.ll
+++ b/llvm/test/CodeGen/X86/amx_fp16_intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-fp16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-fp16 | FileCheck %s
; CHECK-LABEL: test_amx:
; CHECK: # %bb.0:
diff --git a/llvm/test/CodeGen/X86/amx_fp8_intrinsics.ll b/llvm/test/CodeGen/X86/amx_fp8_intrinsics.ll
index f5d3f6ec9ec29..8826898f106fd 100644
--- a/llvm/test/CodeGen/X86/amx_fp8_intrinsics.ll
+++ b/llvm/test/CodeGen/X86/amx_fp8_intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-fp8 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-fp8 | FileCheck %s
; CHECK-LABEL: test_amx:
; CHECK: # %bb.0:
diff --git a/llvm/test/CodeGen/X86/amx_movrs_intrinsics.ll b/llvm/test/CodeGen/X86/amx_movrs_intrinsics.ll
index 1b93ae029f27b..d0e67c5e280db 100755
--- a/llvm/test/CodeGen/X86/amx_movrs_intrinsics.ll
+++ b/llvm/test/CodeGen/X86/amx_movrs_intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-movrs | FileCheck %s
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-movrs,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-movrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+amx-tile,+amx-movrs,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
define void @test_amx_internal(i16 %m, i16 %n, ptr %buf, i64 %s) {
; CHECK-LABEL: test_amx_internal:
diff --git a/llvm/test/CodeGen/X86/and-encoding.ll b/llvm/test/CodeGen/X86/and-encoding.ll
index 248686ff8b7a2..9a46c25580b69 100644
--- a/llvm/test/CodeGen/X86/and-encoding.ll
+++ b/llvm/test/CodeGen/X86/and-encoding.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -show-mc-encoding < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -show-mc-encoding < %s | FileCheck %s
; Test that the direct object emission selects the 'and' variant with 8-bit
; immediate.
diff --git a/llvm/test/CodeGen/X86/and-load-fold.ll b/llvm/test/CodeGen/X86/and-load-fold.ll
index b0819cd288775..fab26f656f8cf 100644
--- a/llvm/test/CodeGen/X86/and-load-fold.ll
+++ b/llvm/test/CodeGen/X86/and-load-fold.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-- -mcpu=generic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -mcpu=generic < %s | FileCheck %s
; Verify that the DAGCombiner doesn't wrongly remove the 'and' from the dag.
diff --git a/llvm/test/CodeGen/X86/and-or-fold.ll b/llvm/test/CodeGen/X86/and-or-fold.ll
index 1bb5fdeebac71..a2d75545d3b25 100644
--- a/llvm/test/CodeGen/X86/and-or-fold.ll
+++ b/llvm/test/CodeGen/X86/and-or-fold.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck -check-prefix=DARWIN %s
-; RUN: opt < %s -O2 | llc -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=DARWIN-OPT %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin | FileCheck -check-prefix=DARWIN %s
+; RUN: opt < %s -O2 | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=DARWIN-OPT %s
define i64 @or_and_fold(i64 %x, i64 %y) {
; DARWIN-LABEL: or_and_fold:
diff --git a/llvm/test/CodeGen/X86/and-shift.ll b/llvm/test/CodeGen/X86/and-shift.ll
index 42e68cd8aac5f..b1487bf288ba9 100644
--- a/llvm/test/CodeGen/X86/and-shift.ll
+++ b/llvm/test/CodeGen/X86/and-shift.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-gnux32 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-gnux32 | FileCheck %s --check-prefixes=X64
define i32 @shift30_and2_i32(i32 %x) {
; X86-LABEL: shift30_and2_i32:
diff --git a/llvm/test/CodeGen/X86/and-sink.ll b/llvm/test/CodeGen/X86/and-sink.ll
index d9a34d743ac65..d9da8c4b4970b 100644
--- a/llvm/test/CodeGen/X86/and-sink.ll
+++ b/llvm/test/CodeGen/X86/and-sink.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown -verify-machineinstrs < %s | FileCheck %s
; RUN: opt < %s -codegenprepare -S -mtriple=x86_64-unknown-unknown | FileCheck --check-prefix=CHECK-CGP %s
; RUN: opt < %s -codegenprepare -cgpp-huge-func=0 -S -mtriple=x86_64-unknown-unknown | FileCheck --check-prefix=CHECK-CGP %s
diff --git a/llvm/test/CodeGen/X86/and-su.ll b/llvm/test/CodeGen/X86/and-su.ll
index b657ed28f6dc6..346f23adb0df6 100644
--- a/llvm/test/CodeGen/X86/and-su.ll
+++ b/llvm/test/CodeGen/X86/and-su.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; Don't duplicate the load.
diff --git a/llvm/test/CodeGen/X86/and-with-overflow.ll b/llvm/test/CodeGen/X86/and-with-overflow.ll
index a63f6cc6ea7e2..f6c7e15c14bea 100644
--- a/llvm/test/CodeGen/X86/and-with-overflow.ll
+++ b/llvm/test/CodeGen/X86/and-with-overflow.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=X64
;
; PR48768 - 'and' clears the overflow flag, so we don't need a separate 'test'.
diff --git a/llvm/test/CodeGen/X86/andimm8.ll b/llvm/test/CodeGen/X86/andimm8.ll
index 6242d4f4c222b..7f83c7b172304 100644
--- a/llvm/test/CodeGen/X86/andimm8.ll
+++ b/llvm/test/CodeGen/X86/andimm8.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -show-mc-encoding | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -show-mc-encoding | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -show-mc-encoding | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu -show-mc-encoding | FileCheck %s --check-prefix=X64
; PR8365
diff --git a/llvm/test/CodeGen/X86/andnot-patterns.ll b/llvm/test/CodeGen/X86/andnot-patterns.ll
index fc573fbd4fc99..db37facb94407 100644
--- a/llvm/test/CodeGen/X86/andnot-patterns.ll
+++ b/llvm/test/CodeGen/X86/andnot-patterns.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=-bmi | FileCheck %s --check-prefixes=X86,X86-NOBMI
-; RUN: llc < %s -mtriple=i686-- -mattr=+bmi | FileCheck %s --check-prefixes=X86,X86-BMI
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-bmi | FileCheck %s --check-prefixes=X64,X64-NOBMI
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+bmi | FileCheck %s --check-prefixes=X64,X64-BMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-bmi | FileCheck %s --check-prefixes=X86,X86-NOBMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+bmi | FileCheck %s --check-prefixes=X86,X86-BMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-bmi | FileCheck %s --check-prefixes=X64,X64-NOBMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+bmi | FileCheck %s --check-prefixes=X64,X64-BMI
; TODO - PR112425 - attempt to reconstruct andnot patterns through bitwise-agnostic operations
diff --git a/llvm/test/CodeGen/X86/anyext.ll b/llvm/test/CodeGen/X86/anyext.ll
index ec23948d1a431..69e27e116af1d 100644
--- a/llvm/test/CodeGen/X86/anyext.ll
+++ b/llvm/test/CodeGen/X86/anyext.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
; Use movzbl to avoid partial-register updates.
diff --git a/llvm/test/CodeGen/X86/anyregcc-crash.ll b/llvm/test/CodeGen/X86/anyregcc-crash.ll
index 3b65babea23eb..ca58cb86e1b80 100644
--- a/llvm/test/CodeGen/X86/anyregcc-crash.ll
+++ b/llvm/test/CodeGen/X86/anyregcc-crash.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s
;
; Check that misuse of anyregcc results in a compile time error.
diff --git a/llvm/test/CodeGen/X86/anyregcc.ll b/llvm/test/CodeGen/X86/anyregcc.ll
index d5ca8819c1ad8..505f88c0c4660 100644
--- a/llvm/test/CodeGen/X86/anyregcc.ll
+++ b/llvm/test/CodeGen/X86/anyregcc.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -frame-pointer=all | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -frame-pointer=all | FileCheck --check-prefix=SSE %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -frame-pointer=all | FileCheck --check-prefix=AVX %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -frame-pointer=all | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -frame-pointer=all | FileCheck --check-prefix=SSE %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -frame-pointer=all | FileCheck --check-prefix=AVX %s
; Stackmap Header: no constants - 6 callsites
diff --git a/llvm/test/CodeGen/X86/apm.ll b/llvm/test/CodeGen/X86/apm.ll
index 6e57c2e1f6df7..093db901a7d3a 100644
--- a/llvm/test/CodeGen/X86/apm.ll
+++ b/llvm/test/CodeGen/X86/apm.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux -mattr=+sse3 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse3 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse3 | FileCheck %s --check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -mattr=+sse3 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+sse3 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mattr=+sse3 | FileCheck %s --check-prefix=WIN64
; PR8573
diff --git a/llvm/test/CodeGen/X86/apple-simulator-compact-unwind.ll b/llvm/test/CodeGen/X86/apple-simulator-compact-unwind.ll
index fbf6888b3f119..8a767dccab565 100644
--- a/llvm/test/CodeGen/X86/apple-simulator-compact-unwind.ll
+++ b/llvm/test/CodeGen/X86/apple-simulator-compact-unwind.ll
@@ -1,8 +1,8 @@
-; RUN: llc -mtriple x86_64-apple-ios-simulator -filetype=obj -o - %s | \
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-ios-simulator -filetype=obj -o - %s | \
; RUN: llvm-objdump --macho --unwind-info - | \
; RUN: FileCheck %s
-; RUN: llc -mtriple x86_64-apple-ios -filetype=obj -o - %s | \
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-ios -filetype=obj -o - %s | \
; RUN: llvm-objdump --macho --unwind-info - | \
; RUN: FileCheck %s
diff --git a/llvm/test/CodeGen/X86/apple-version-min.ll b/llvm/test/CodeGen/X86/apple-version-min.ll
index fde10ac3b4248..65e103d19d5d7 100644
--- a/llvm/test/CodeGen/X86/apple-version-min.ll
+++ b/llvm/test/CodeGen/X86/apple-version-min.ll
@@ -1,10 +1,10 @@
; Test emitting version_min directives.
-; RUN: llc %s -filetype=asm -o - --mtriple x86_64-apple-tvos9.0.0-simulator | FileCheck %s --check-prefix=TVOS
-; RUN: llc %s -filetype=asm -o - --mtriple x86_64-apple-tvos9.0.0 | FileCheck %s --check-prefix=TVOS
-; RUN: llc %s -filetype=asm -o - --mtriple x86_64-apple-driverkit19.0.0 | FileCheck %s --check-prefix=DRIVERKIT
-; RUN: llc %s -filetype=asm -o - --mtriple i386-apple-ios7.0.0-simulator | FileCheck %s --check-prefix=IOS
-; RUN: llc %s -filetype=asm -o - --mtriple i386-apple-watchos2.0.0-simulator | FileCheck %s --check-prefix=WATCHOS
+; RUN: llc -combiner-topological-sorting %s -filetype=asm -o - --mtriple x86_64-apple-tvos9.0.0-simulator | FileCheck %s --check-prefix=TVOS
+; RUN: llc -combiner-topological-sorting %s -filetype=asm -o - --mtriple x86_64-apple-tvos9.0.0 | FileCheck %s --check-prefix=TVOS
+; RUN: llc -combiner-topological-sorting %s -filetype=asm -o - --mtriple x86_64-apple-driverkit19.0.0 | FileCheck %s --check-prefix=DRIVERKIT
+; RUN: llc -combiner-topological-sorting %s -filetype=asm -o - --mtriple i386-apple-ios7.0.0-simulator | FileCheck %s --check-prefix=IOS
+; RUN: llc -combiner-topological-sorting %s -filetype=asm -o - --mtriple i386-apple-watchos2.0.0-simulator | FileCheck %s --check-prefix=WATCHOS
; TVOS: .tvos_version_min 9, 0
; DRIVERKIT: .build_version driverkit, 19, 0
diff --git a/llvm/test/CodeGen/X86/apx/adc.ll b/llvm/test/CodeGen/X86/apx/adc.ll
index 863fe8b5a518a..cfb83aa46e699 100644
--- a/llvm/test/CodeGen/X86/apx/adc.ll
+++ b/llvm/test/CodeGen/X86/apx/adc.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
define i8 @adc8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: adc8rr:
diff --git a/llvm/test/CodeGen/X86/apx/add.ll b/llvm/test/CodeGen/X86/apx/add.ll
index b56036c955024..e59ea9bb91869 100644
--- a/llvm/test/CodeGen/X86/apx/add.ll
+++ b/llvm/test/CodeGen/X86/apx/add.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,MEM,BOTH
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,MEM,BOTH
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
define i8 @add8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-LABEL: add8rr:
diff --git a/llvm/test/CodeGen/X86/apx/and.ll b/llvm/test/CodeGen/X86/apx/and.ll
index 9e9601afadb9a..8afc6030fdfdc 100644
--- a/llvm/test/CodeGen/X86/apx/and.ll
+++ b/llvm/test/CodeGen/X86/apx/and.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
define i8 @and8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-LABEL: and8rr:
diff --git a/llvm/test/CodeGen/X86/apx/asm-constraint-1-jr.ll b/llvm/test/CodeGen/X86/apx/asm-constraint-1-jr.ll
index 0c6d6a78cfb12..cf09d4b3e8fb7 100644
--- a/llvm/test/CodeGen/X86/apx/asm-constraint-1-jr.ll
+++ b/llvm/test/CodeGen/X86/apx/asm-constraint-1-jr.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: not llc -mtriple=x86_64 < %s >%t1 2>%t2
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64 < %s >%t1 2>%t2
; RUN: FileCheck %s <%t1
; RUN: FileCheck %s <%t2 --check-prefix=ERR
-; RUN: not llc -mattr=+egpr -mtriple=x86_64 < %s >%t1 2>%t2
+; RUN: not llc -combiner-topological-sorting -mattr=+egpr -mtriple=x86_64 < %s >%t1 2>%t2
; RUN: FileCheck %s <%t1
; RUN: FileCheck %s <%t2 --check-prefix=ERR
-; RUN: not llc -mattr=+egpr,+inline-asm-use-gpr32 -mtriple=x86_64 < %s >%t1 2>%t2
+; RUN: not llc -combiner-topological-sorting -mattr=+egpr,+inline-asm-use-gpr32 -mtriple=x86_64 < %s >%t1 2>%t2
; RUN: FileCheck %s <%t1
; RUN: FileCheck %s <%t2 --check-prefix=ERR
diff --git a/llvm/test/CodeGen/X86/apx/asm-constraint-2-jR.ll b/llvm/test/CodeGen/X86/apx/asm-constraint-2-jR.ll
index 7120104b9dd23..6b9781e0c60ce 100644
--- a/llvm/test/CodeGen/X86/apx/asm-constraint-2-jR.ll
+++ b/llvm/test/CodeGen/X86/apx/asm-constraint-2-jR.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: not llc -mtriple=x86_64 %s -o %t 2>&1 | FileCheck %s --check-prefix=ERR
-; RUN: llc -mtriple=x86_64 -mattr=+egpr < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64 -mattr=+egpr,+inline-asm-use-gpr32 < %s | FileCheck %s
-; RUN: not llc -mtriple=x86_64 -mattr=+inline-asm-use-gpr32 %s -o %t 2>&1 | FileCheck %s --check-prefix=ERR
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64 %s -o %t 2>&1 | FileCheck %s --check-prefix=ERR
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -mattr=+egpr < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -mattr=+egpr,+inline-asm-use-gpr32 < %s | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64 -mattr=+inline-asm-use-gpr32 %s -o %t 2>&1 | FileCheck %s --check-prefix=ERR
; ERR: error: inline assembly requires more registers than available
diff --git a/llvm/test/CodeGen/X86/apx/asm-constraint.ll b/llvm/test/CodeGen/X86/apx/asm-constraint.ll
index 114e8152e9757..fd374a21ebad8 100644
--- a/llvm/test/CodeGen/X86/apx/asm-constraint.ll
+++ b/llvm/test/CodeGen/X86/apx/asm-constraint.ll
@@ -1,7 +1,7 @@
; Check r16-r31 can not be used with 'q','r','l' constraint for backward compatibility.
-; RUN: not llc -mtriple=x86_64 < %s 2>&1 | FileCheck %s --check-prefix=ERR
-; RUN: not llc -mtriple=x86_64 -mattr=+egpr < %s 2>&1 | FileCheck %s --check-prefix=ERR
-; RUN: llc -mtriple=x86_64 -mattr=+egpr,+inline-asm-use-gpr32 < %s | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64 < %s 2>&1 | FileCheck %s --check-prefix=ERR
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64 -mattr=+egpr < %s 2>&1 | FileCheck %s --check-prefix=ERR
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -mattr=+egpr,+inline-asm-use-gpr32 < %s | FileCheck %s
define void @q() {
; ERR: error: inline assembly requires more registers than available
diff --git a/llvm/test/CodeGen/X86/apx/cfcmov.ll b/llvm/test/CodeGen/X86/apx/cfcmov.ll
index 37ba3d451c2b1..a3a772374a089 100644
--- a/llvm/test/CodeGen/X86/apx/cfcmov.ll
+++ b/llvm/test/CodeGen/X86/apx/cfcmov.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+cf -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+cf -x86-cmov-converter=false -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+cf -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+cf -x86-cmov-converter=false -verify-machineinstrs | FileCheck %s
define i8 @cfcmov8rr(i8 %0) {
; CHECK-LABEL: cfcmov8rr:
diff --git a/llvm/test/CodeGen/X86/apx/check-nf-in-suppress-reloc-pass.ll b/llvm/test/CodeGen/X86/apx/check-nf-in-suppress-reloc-pass.ll
index 3a2c954e37077..fd1fdc2c07e92 100644
--- a/llvm/test/CodeGen/X86/apx/check-nf-in-suppress-reloc-pass.ll
+++ b/llvm/test/CodeGen/X86/apx/check-nf-in-suppress-reloc-pass.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64 -mattr=+nf -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+nf -verify-machineinstrs | FileCheck %s
; This is to check no assertion raised in X86 Suppress APX for Relocation pass
; if there is a NF instruction
diff --git a/llvm/test/CodeGen/X86/apx/cmov.ll b/llvm/test/CodeGen/X86/apx/cmov.ll
index a26b77756711b..fceb508909cb1 100644
--- a/llvm/test/CodeGen/X86/apx/cmov.ll
+++ b/llvm/test/CodeGen/X86/apx/cmov.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
define i8 @cmov8(i8 %a, i8 %b, i8 %x, ptr %y.ptr) {
; CHECK-LABEL: cmov8:
diff --git a/llvm/test/CodeGen/X86/apx/dec.ll b/llvm/test/CodeGen/X86/apx/dec.ll
index 09eccb13314bb..4078b1a32e2ef 100644
--- a/llvm/test/CodeGen/X86/apx/dec.ll
+++ b/llvm/test/CodeGen/X86/apx/dec.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,IMM,MEM,BOTH
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs | FileCheck --check-prefix=NF %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,IMM,MEM,BOTH
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs | FileCheck --check-prefix=NF %s
define i8 @dec8r(i8 noundef %a) {
; CHECK-LABEL: dec8r:
diff --git a/llvm/test/CodeGen/X86/apx/evex-to-vex.ll b/llvm/test/CodeGen/X86/apx/evex-to-vex.ll
index f70c50eb468c3..317d605c2acc3 100644
--- a/llvm/test/CodeGen/X86/apx/evex-to-vex.ll
+++ b/llvm/test/CodeGen/X86/apx/evex-to-vex.ll
@@ -1,5 +1,5 @@
; Check EVEX is not compressed into VEX when egpr is used.
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+egpr -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+egpr -show-mc-encoding | FileCheck %s
define void @test_x86_vcvtps2ph_256_m(ptr nocapture %d, <8 x float> %a) nounwind {
; CHECK: vcvtps2ph $3, %ymm0, (%r16) # encoding: [0x62,0xfb,0x7d,0x28,0x1d,0x00,0x03]
diff --git a/llvm/test/CodeGen/X86/apx/flags-copy-lowering.ll b/llvm/test/CodeGen/X86/apx/flags-copy-lowering.ll
index 0dcda8efdbc78..c30a782672f4c 100644
--- a/llvm/test/CodeGen/X86/apx/flags-copy-lowering.ll
+++ b/llvm/test/CodeGen/X86/apx/flags-copy-lowering.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+nf | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+nf -x86-enable-apx-for-relocation=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+nf | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+nf -x86-enable-apx-for-relocation=true | FileCheck %s
define i32 @flag_copy_1(i32 %x, i32 %y, ptr %pz) nounwind {
; CHECK-LABEL: flag_copy_1:
diff --git a/llvm/test/CodeGen/X86/apx/gr8_norex2.ll b/llvm/test/CodeGen/X86/apx/gr8_norex2.ll
index afa62f72abbe0..704bf34ae374b 100644
--- a/llvm/test/CodeGen/X86/apx/gr8_norex2.ll
+++ b/llvm/test/CodeGen/X86/apx/gr8_norex2.ll
@@ -1,5 +1,5 @@
; Check ah is not allocatable for register class gr8_norex2
-; RUN: not llc < %s -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s
define void @gr8_norex2() {
; CHECK: error: inline assembly requires more registers than available
diff --git a/llvm/test/CodeGen/X86/apx/i386-ndd.ll b/llvm/test/CodeGen/X86/apx/i386-ndd.ll
index 146a99340eb66..b9cd476777236 100644
--- a/llvm/test/CodeGen/X86/apx/i386-ndd.ll
+++ b/llvm/test/CodeGen/X86/apx/i386-ndd.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=i386-linux-gnu -mattr=+cmov,+ndd < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -mattr=+cmov,+ndd < %s | FileCheck %s
define i32 @test(i1 %cmp, i32 %x, i32 %y) nounwind {
; CHECK-LABEL: test:
; CHECK: # %bb.0: # %entry
diff --git a/llvm/test/CodeGen/X86/apx/imul.ll b/llvm/test/CodeGen/X86/apx/imul.ll
index dbc098ab8ef3f..55e9cb629ac35 100644
--- a/llvm/test/CodeGen/X86/apx/imul.ll
+++ b/llvm/test/CodeGen/X86/apx/imul.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,IMM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs | FileCheck --check-prefix=NF %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,IMM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs | FileCheck --check-prefix=NF %s
define i16 @mul16rr(i16 noundef %a, i16 noundef %b) {
; CHECK-LABEL: mul16rr:
diff --git a/llvm/test/CodeGen/X86/apx/imulzu.ll b/llvm/test/CodeGen/X86/apx/imulzu.ll
index 9a4a63750a1db..27faf0344ca3f 100644
--- a/llvm/test/CodeGen/X86/apx/imulzu.ll
+++ b/llvm/test/CodeGen/X86/apx/imulzu.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -mattr=+zu | FileCheck %s --check-prefixes=CHECK,ZU
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s --check-prefixes=CHECK,NOZU
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu -mattr=+zu | FileCheck %s --check-prefixes=CHECK,ZU
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s --check-prefixes=CHECK,NOZU
; Test generation of 16b imulzu when -mattr=+zu is specified.
; The mulzu_* tests check for basic generation, which is limited to cases where a
diff --git a/llvm/test/CodeGen/X86/apx/inc.ll b/llvm/test/CodeGen/X86/apx/inc.ll
index aaff438e95ac2..0490fe5f54518 100644
--- a/llvm/test/CodeGen/X86/apx/inc.ll
+++ b/llvm/test/CodeGen/X86/apx/inc.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,IMM,MEM,BOTH
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs | FileCheck --check-prefix=NF %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,IMM,MEM,BOTH
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs | FileCheck --check-prefix=NF %s
define i8 @inc8r(i8 noundef %a) {
; CHECK-LABEL: inc8r:
diff --git a/llvm/test/CodeGen/X86/apx/kmov-copy-to-from-asymmetric-reg.ll b/llvm/test/CodeGen/X86/apx/kmov-copy-to-from-asymmetric-reg.ll
index 747b288ec2f03..26626fd6ad1c2 100644
--- a/llvm/test/CodeGen/X86/apx/kmov-copy-to-from-asymmetric-reg.ll
+++ b/llvm/test/CodeGen/X86/apx/kmov-copy-to-from-asymmetric-reg.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f -show-mc-encoding | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+egpr -show-mc-encoding | FileCheck --check-prefix=EGPR %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f,+egpr -show-mc-encoding | FileCheck --check-prefix=EGPR %s
define void @kmov(i1 %cmp23.not) {
; CHECK-LABEL: kmov:
diff --git a/llvm/test/CodeGen/X86/apx/kmov-domain-assignment.ll b/llvm/test/CodeGen/X86/apx/kmov-domain-assignment.ll
index a7fe8983f2f29..d228d1b663039 100644
--- a/llvm/test/CodeGen/X86/apx/kmov-domain-assignment.ll
+++ b/llvm/test/CodeGen/X86/apx/kmov-domain-assignment.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -stop-after=x86-domain-reassignment -mattr=+avx512f,+avx512bw,+avx512dq,+egpr | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -stop-after=x86-domain-reassignment -mattr=+avx512f,+avx512bw,+avx512dq,+egpr | FileCheck %s
define void @test_fcmp_storei1(i1 %cond, ptr %fptr, ptr %iptr, float %f1, float %f2, float %f3, float %f4) {
; CHECK-LABEL: name: test_fcmp_storei1
diff --git a/llvm/test/CodeGen/X86/apx/kmov-kk.ll b/llvm/test/CodeGen/X86/apx/kmov-kk.ll
index 639a35f4546fc..de4a1a4457c13 100644
--- a/llvm/test/CodeGen/X86/apx/kmov-kk.ll
+++ b/llvm/test/CodeGen/X86/apx/kmov-kk.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+egpr -show-mc-encoding | FileCheck --check-prefix=EGPR %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f,+egpr -show-mc-encoding | FileCheck --check-prefix=EGPR %s
define <16 x i32> @kmovkk(ptr %base, <16 x i32> %ind, i16 %mask) {
; EGPR: kmovq %k1, %k2 # EVEX TO VEX Compression encoding: [0xc4,0xe1,0xf8,0x90,0xd1]
diff --git a/llvm/test/CodeGen/X86/apx/long-instruction-fixup-x32.ll b/llvm/test/CodeGen/X86/apx/long-instruction-fixup-x32.ll
index b1596f95bc542..4c233020bacba 100644
--- a/llvm/test/CodeGen/X86/apx/long-instruction-fixup-x32.ll
+++ b/llvm/test/CodeGen/X86/apx/long-instruction-fixup-x32.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnux32 -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s
define i32 @add32mi_SIB_ADSIZE(ptr nocapture noundef readonly %a, i32 noundef %b) {
diff --git a/llvm/test/CodeGen/X86/apx/long-instruction-fixup.ll b/llvm/test/CodeGen/X86/apx/long-instruction-fixup.ll
index d9d47674d7d11..5d5960d577c83 100644
--- a/llvm/test/CodeGen/X86/apx/long-instruction-fixup.ll
+++ b/llvm/test/CodeGen/X86/apx/long-instruction-fixup.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s
define i32 @add32mi_GS() {
; CHECK-LABEL: add32mi_GS:
diff --git a/llvm/test/CodeGen/X86/apx/mul-i1024.ll b/llvm/test/CodeGen/X86/apx/mul-i1024.ll
index 0ca77c303de3d..e4016a2fba1c0 100644
--- a/llvm/test/CodeGen/X86/apx/mul-i1024.ll
+++ b/llvm/test/CodeGen/X86/apx/mul-i1024.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+egpr | FileCheck %s --check-prefix=EGPR
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+egpr,+ndd,+prefer-ndd-imm,+prefer-ndd-mem | FileCheck %s --check-prefix=EGPR-NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+egpr | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+egpr,+ndd,+prefer-ndd-imm,+prefer-ndd-mem | FileCheck %s --check-prefix=EGPR-NDD
define void @test_1024(ptr %a, ptr %b, ptr %out) nounwind {
; EGPR-LABEL: test_1024:
diff --git a/llvm/test/CodeGen/X86/apx/ndd-neg-addr-index.ll b/llvm/test/CodeGen/X86/apx/ndd-neg-addr-index.ll
index 41fa34667af86..c29b3ad51879b 100644
--- a/llvm/test/CodeGen/X86/apx/ndd-neg-addr-index.ll
+++ b/llvm/test/CodeGen/X86/apx/ndd-neg-addr-index.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding -o - | FileCheck %s --check-prefix=NDD
+; RUN: llc -combiner-topological-sorting %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding -o - | FileCheck %s --check-prefix=NDD
define void @neg_8bit_1(i1 %cmp) {
diff --git a/llvm/test/CodeGen/X86/apx/neg.ll b/llvm/test/CodeGen/X86/apx/neg.ll
index aed8c73795ca5..9914569e3c71a 100644
--- a/llvm/test/CodeGen/X86/apx/neg.ll
+++ b/llvm/test/CodeGen/X86/apx/neg.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+nf -verify-machineinstrs | FileCheck --check-prefix=NF %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+nf -x86-enable-apx-for-relocation=true -verify-machineinstrs | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+nf -verify-machineinstrs | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+nf -x86-enable-apx-for-relocation=true -verify-machineinstrs | FileCheck --check-prefix=NF %s
define i8 @neg8r(i8 noundef %a) {
; CHECK-LABEL: neg8r:
diff --git a/llvm/test/CodeGen/X86/apx/nf-regressions.ll b/llvm/test/CodeGen/X86/apx/nf-regressions.ll
index 68bd05a0737b6..07b1e2f8dec1f 100644
--- a/llvm/test/CodeGen/X86/apx/nf-regressions.ll
+++ b/llvm/test/CodeGen/X86/apx/nf-regressions.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64 -mattr=+nf -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+nf -verify-machineinstrs | FileCheck %s
define void @convertToThreeAddress(ptr %arg, ptr %arg1) {
; CHECK-LABEL: convertToThreeAddress:
diff --git a/llvm/test/CodeGen/X86/apx/no-rex2-general.ll b/llvm/test/CodeGen/X86/apx/no-rex2-general.ll
index 6f31aef9aee98..2bd3e5a5180b8 100644
--- a/llvm/test/CodeGen/X86/apx/no-rex2-general.ll
+++ b/llvm/test/CodeGen/X86/apx/no-rex2-general.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+ssse3,+egpr --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+ssse3,+egpr,+avx --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2,+ssse3,+egpr --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2,+ssse3,+egpr,+avx --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX
define i32 @map0(ptr nocapture noundef readonly %a, i64 noundef %b) {
; CHECK-LABEL: map0:
diff --git a/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-amx.ll b/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-amx.ll
index a6ab98f8bf03e..67003af56c427 100644
--- a/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-amx.ll
+++ b/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-amx.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+amx-tile,+egpr --show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+amx-tile,+egpr --show-mc-encoding | FileCheck %s
define dso_local void @amx(ptr noundef %data) nounwind {
; CHECK-LABEL: amx:
diff --git a/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-x87.ll b/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-x87.ll
index e7bc0c362cad3..beb017ec55d73 100644
--- a/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-x87.ll
+++ b/llvm/test/CodeGen/X86/apx/no-rex2-pseudo-x87.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=-sse,+egpr --show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=-sse,+egpr --show-mc-encoding | FileCheck %s
define void @x87(ptr %0, ptr %1) nounwind {
; CHECK-LABEL: x87:
diff --git a/llvm/test/CodeGen/X86/apx/no-rex2-special.ll b/llvm/test/CodeGen/X86/apx/no-rex2-special.ll
index 9b89bce283b15..131909c888558 100644
--- a/llvm/test/CodeGen/X86/apx/no-rex2-special.ll
+++ b/llvm/test/CodeGen/X86/apx/no-rex2-special.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+xsave,+egpr --show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+xsave,+egpr --show-mc-encoding | FileCheck %s
define void @test_xsave(ptr %ptr, i32 %hi, i32 %lo) nounwind {
; CHECK-LABEL: test_xsave:
diff --git a/llvm/test/CodeGen/X86/apx/not.ll b/llvm/test/CodeGen/X86/apx/not.ll
index fd5e3232b59c1..420bb47336e25 100644
--- a/llvm/test/CodeGen/X86/apx/not.ll
+++ b/llvm/test/CodeGen/X86/apx/not.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
define i8 @not8r(i8 noundef %a) {
; CHECK-LABEL: not8r:
diff --git a/llvm/test/CodeGen/X86/apx/or.ll b/llvm/test/CodeGen/X86/apx/or.ll
index 594ed7b29216b..2ebbd86df0392 100644
--- a/llvm/test/CodeGen/X86/apx/or.ll
+++ b/llvm/test/CodeGen/X86/apx/or.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
define i8 @or8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-LABEL: or8rr:
diff --git a/llvm/test/CodeGen/X86/apx/pp2-with-stack-clash-protection.ll b/llvm/test/CodeGen/X86/apx/pp2-with-stack-clash-protection.ll
index a7795f0b6bc5d..dac35cdcf474b 100644
--- a/llvm/test/CodeGen/X86/apx/pp2-with-stack-clash-protection.ll
+++ b/llvm/test/CodeGen/X86/apx/pp2-with-stack-clash-protection.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64 -mattr=+push2pop2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+push2pop2 | FileCheck %s
; This test is to check if "pushq %rax" is emitted correctly for push2pop2
diff --git a/llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh.ll b/llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh.ll
index 071b297b49dc1..183748a258f8b 100644
--- a/llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh.ll
+++ b/llvm/test/CodeGen/X86/apx/push2-pop2-cfi-seh.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=LIN-REF
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+push2pop2 | FileCheck %s --check-prefix=LIN
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+push2pop2,+ppx | FileCheck %s --check-prefix=LIN-PPX
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=diamondrapids | FileCheck %s --check-prefix=LIN-PPX
-; RUN: llc < %s -mtriple=x86_64-windows-msvc | FileCheck %s --check-prefix=WIN-REF
-; RUN: llc < %s -mtriple=x86_64-windows-msvc -mcpu=diamondrapids | FileCheck %s --check-prefix=WIN-REF
-; RUN: llc < %s -mtriple=x86_64-windows-msvc -mattr=+push2pop2 | FileCheck %s --check-prefix=WIN
-; RUN: llc < %s -mtriple=x86_64-windows-msvc -mattr=+push2pop2,+ppx | FileCheck %s --check-prefix=WIN-PPX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=LIN-REF
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+push2pop2 | FileCheck %s --check-prefix=LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+push2pop2,+ppx | FileCheck %s --check-prefix=LIN-PPX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=diamondrapids | FileCheck %s --check-prefix=LIN-PPX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc | FileCheck %s --check-prefix=WIN-REF
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc -mcpu=diamondrapids | FileCheck %s --check-prefix=WIN-REF
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc -mattr=+push2pop2 | FileCheck %s --check-prefix=WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc -mattr=+push2pop2,+ppx | FileCheck %s --check-prefix=WIN-PPX
define i32 @csr6_alloc16(ptr %argv) {
; LIN-REF-LABEL: csr6_alloc16:
diff --git a/llvm/test/CodeGen/X86/apx/push2-pop2-disabled-with-small-stack-alignment.ll b/llvm/test/CodeGen/X86/apx/push2-pop2-disabled-with-small-stack-alignment.ll
index f07e40b442c04..e7542fc84a73d 100644
--- a/llvm/test/CodeGen/X86/apx/push2-pop2-disabled-with-small-stack-alignment.ll
+++ b/llvm/test/CodeGen/X86/apx/push2-pop2-disabled-with-small-stack-alignment.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+push2pop2 | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+push2pop2 | FileCheck %s --check-prefix=CHECK
; This test is used to check no push2/pop2 emitted if stack alignment is set to
; the value less than 16 bytes required by push2/pop2 instruction. Here it's set
diff --git a/llvm/test/CodeGen/X86/apx/push2-pop2-vector-register.ll b/llvm/test/CodeGen/X86/apx/push2-pop2-vector-register.ll
index f20c4c1ae2786..e4d223f51e398 100644
--- a/llvm/test/CodeGen/X86/apx/push2-pop2-vector-register.ll
+++ b/llvm/test/CodeGen/X86/apx/push2-pop2-vector-register.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; Check PUSH2/POP2 is not used for vector registers
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -mattr=+push2pop2 | FileCheck %s --check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -mattr=+push2pop2 -frame-pointer=all | FileCheck %s --check-prefix=FRAME
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc -mattr=+push2pop2 | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc -mattr=+push2pop2 -frame-pointer=all | FileCheck %s --check-prefix=FRAME
define void @widget(float %arg) nounwind {
; CHECK-LABEL: widget:
diff --git a/llvm/test/CodeGen/X86/apx/push2-pop2.ll b/llvm/test/CodeGen/X86/apx/push2-pop2.ll
index f5be484be2b1a..2155c9ad386c5 100644
--- a/llvm/test/CodeGen/X86/apx/push2-pop2.ll
+++ b/llvm/test/CodeGen/X86/apx/push2-pop2.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+push2pop2 | FileCheck %s --check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+push2pop2,+ppx | FileCheck %s --check-prefix=PPX
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+push2pop2 -frame-pointer=all | FileCheck %s --check-prefix=FRAME
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+push2pop2 | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+push2pop2,+ppx | FileCheck %s --check-prefix=PPX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+push2pop2 -frame-pointer=all | FileCheck %s --check-prefix=FRAME
define void @csr1() nounwind {
; CHECK-LABEL: csr1:
diff --git a/llvm/test/CodeGen/X86/apx/pushp-popp.ll b/llvm/test/CodeGen/X86/apx/pushp-popp.ll
index 625e70b07198e..0ec54287a578a 100644
--- a/llvm/test/CodeGen/X86/apx/pushp-popp.ll
+++ b/llvm/test/CodeGen/X86/apx/pushp-popp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ppx | FileCheck %s --check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ppx -frame-pointer=all | FileCheck %s --check-prefix=FRAME
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ppx | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ppx -frame-pointer=all | FileCheck %s --check-prefix=FRAME
define void @csr2() nounwind {
; CHECK-LABEL: csr2:
diff --git a/llvm/test/CodeGen/X86/apx/reloc-opt.ll b/llvm/test/CodeGen/X86/apx/reloc-opt.ll
index 51b6169ac3e73..c8d26eb819e7f 100644
--- a/llvm/test/CodeGen/X86/apx/reloc-opt.ll
+++ b/llvm/test/CodeGen/X86/apx/reloc-opt.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mcpu=diamondrapids %s -mtriple=x86_64 -filetype=obj -o %t.o
+; RUN: llc -combiner-topological-sorting -mcpu=diamondrapids %s -mtriple=x86_64 -filetype=obj -o %t.o
; RUN: llvm-objdump --no-print-imm-hex -dr %t.o | FileCheck %s --check-prefixes=NOAPXREL,CHECK
-; RUN: llc -mcpu=diamondrapids %s -mtriple=x86_64 -filetype=obj -o %t.o -x86-enable-apx-for-relocation=true
+; RUN: llc -combiner-topological-sorting -mcpu=diamondrapids %s -mtriple=x86_64 -filetype=obj -o %t.o -x86-enable-apx-for-relocation=true
; RUN: llvm-objdump --no-print-imm-hex -dr %t.o | FileCheck %s --check-prefixes=APXREL,CHECK
diff --git a/llvm/test/CodeGen/X86/apx/rol.ll b/llvm/test/CodeGen/X86/apx/rol.ll
index 098ea96c4bae6..dc297dc3a36ec 100644
--- a/llvm/test/CodeGen/X86/apx/rol.ll
+++ b/llvm/test/CodeGen/X86/apx/rol.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
define i8 @rol8m1(ptr %ptr) {
; NDD-LABEL: rol8m1:
diff --git a/llvm/test/CodeGen/X86/apx/ror.ll b/llvm/test/CodeGen/X86/apx/ror.ll
index 4cb7421c218fb..4c9f149478948 100644
--- a/llvm/test/CodeGen/X86/apx/ror.ll
+++ b/llvm/test/CodeGen/X86/apx/ror.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
define i8 @ror8m1(ptr %ptr) {
; NDD-LABEL: ror8m1:
diff --git a/llvm/test/CodeGen/X86/apx/sar.ll b/llvm/test/CodeGen/X86/apx/sar.ll
index 91790e2f8f31e..ff7882363b452 100644
--- a/llvm/test/CodeGen/X86/apx/sar.ll
+++ b/llvm/test/CodeGen/X86/apx/sar.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
define i8 @sar8m1(ptr %ptr) {
; NDD-LABEL: sar8m1:
diff --git a/llvm/test/CodeGen/X86/apx/sbb.ll b/llvm/test/CodeGen/X86/apx/sbb.ll
index a7fda8eea8e0e..8847054f7f3e5 100644
--- a/llvm/test/CodeGen/X86/apx/sbb.ll
+++ b/llvm/test/CodeGen/X86/apx/sbb.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,MEM,BOTH
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,MEM,BOTH
define i8 @sbb8rr(i8 %a, i8 %b, i8 %x, i8 %y) nounwind {
; CHECK-LABEL: sbb8rr:
diff --git a/llvm/test/CodeGen/X86/apx/setzucc.ll b/llvm/test/CodeGen/X86/apx/setzucc.ll
index a7215164ee9e3..e6c074faaebdc 100644
--- a/llvm/test/CodeGen/X86/apx/setzucc.ll
+++ b/llvm/test/CodeGen/X86/apx/setzucc.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64 -mattr=+zu,+prefer-legacy-setcc | FileCheck %s --check-prefixes=CHECK,PREFER_NO_SETZUCC
-; RUN: llc < %s -mtriple=x86_64 -mattr=+zu | FileCheck %s --check-prefixes=CHECK,PREFER_SETZUCC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+zu,+prefer-legacy-setcc | FileCheck %s --check-prefixes=CHECK,PREFER_NO_SETZUCC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+zu | FileCheck %s --check-prefixes=CHECK,PREFER_SETZUCC
define i16 @i8(i8 %x) nounwind {
; CHECK-LABEL: i8:
diff --git a/llvm/test/CodeGen/X86/apx/shift-eflags.ll b/llvm/test/CodeGen/X86/apx/shift-eflags.ll
index 2659f8031ef77..a0a87e711efeb 100644
--- a/llvm/test/CodeGen/X86/apx/shift-eflags.ll
+++ b/llvm/test/CodeGen/X86/apx/shift-eflags.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+ndd | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+ndd | FileCheck %s
; Use shift eflags result when it won't cause stalls
diff --git a/llvm/test/CodeGen/X86/apx/shl.ll b/llvm/test/CodeGen/X86/apx/shl.ll
index 8d4ff1fae4643..18eacc4293443 100644
--- a/llvm/test/CodeGen/X86/apx/shl.ll
+++ b/llvm/test/CodeGen/X86/apx/shl.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
define i8 @shl8ri(i8 noundef %a) {
; CHECK-LABEL: shl8ri:
diff --git a/llvm/test/CodeGen/X86/apx/shld.ll b/llvm/test/CodeGen/X86/apx/shld.ll
index de91ac0acca38..4d1d6899f2f92 100644
--- a/llvm/test/CodeGen/X86/apx/shld.ll
+++ b/llvm/test/CodeGen/X86/apx/shld.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
define i16 @shld16rrcl(i16 noundef %a, i16 noundef %b, i8 %cl) {
; CHECK-LABEL: shld16rrcl:
diff --git a/llvm/test/CodeGen/X86/apx/shr.ll b/llvm/test/CodeGen/X86/apx/shr.ll
index d0146b0641883..0511f107bdaea 100644
--- a/llvm/test/CodeGen/X86/apx/shr.ll
+++ b/llvm/test/CodeGen/X86/apx/shr.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
define i8 @shr8m1(ptr %ptr) {
; NDD-LABEL: shr8m1:
diff --git a/llvm/test/CodeGen/X86/apx/shrd.ll b/llvm/test/CodeGen/X86/apx/shrd.ll
index 56def4116c47b..03dec3fb9e57e 100644
--- a/llvm/test/CodeGen/X86/apx/shrd.ll
+++ b/llvm/test/CodeGen/X86/apx/shrd.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,MEM
define i16 @shrd16rrcl(i16 noundef %a, i16 noundef %b, i8 %cl) {
; CHECK-LABEL: shrd16rrcl:
diff --git a/llvm/test/CodeGen/X86/apx/sub.ll b/llvm/test/CodeGen/X86/apx/sub.ll
index d7c19734eb308..55fee41c6f5ce 100644
--- a/llvm/test/CodeGen/X86/apx/sub.ll
+++ b/llvm/test/CodeGen/X86/apx/sub.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,MEM,BOTH
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,MEM,BOTH
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
define i8 @sub8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-LABEL: sub8rr:
diff --git a/llvm/test/CodeGen/X86/apx/tls.ll b/llvm/test/CodeGen/X86/apx/tls.ll
index 1149fe832802e..81de9776de643 100644
--- a/llvm/test/CodeGen/X86/apx/tls.ll
+++ b/llvm/test/CodeGen/X86/apx/tls.ll
@@ -1,12 +1,12 @@
-; RUN: llc -mattr=+egpr %s -mtriple=x86_64 --relocation-model=pic -enable-tlsdesc -filetype=obj -o %t.o
+; RUN: llc -combiner-topological-sorting -mattr=+egpr %s -mtriple=x86_64 --relocation-model=pic -enable-tlsdesc -filetype=obj -o %t.o
; RUN: llvm-objdump --no-print-imm-hex -dr %t.o | FileCheck %s --check-prefix=TLSDESC
; RUN: echo '.tbss; .globl b,c,d,e,f,g,h,i,j; b: .zero 4;c: .zero 4;d: .zero 4;e: .zero 4;f: .zero 4;g: .zero 4;h: .zero 4;i: .zero 4;j: .zero 4' | llvm-mc -filetype=obj -triple=x86_64 - -o %t1.o
-; RUN: llc -mattr=+egpr %s -mtriple=x86_64 -filetype=obj -o %t.o -x86-enable-apx-for-relocation=true
+; RUN: llc -combiner-topological-sorting -mattr=+egpr %s -mtriple=x86_64 -filetype=obj -o %t.o -x86-enable-apx-for-relocation=true
; RUN: llvm-objdump --no-print-imm-hex -dr %t.o | FileCheck %s --check-prefix=GOTTPOFF_APXRELAX
; RUN: echo '.tbss; .globl b,c,d,e,f,g,h,i,j; b: .zero 4;c: .zero 4;d: .zero 4;e: .zero 4;f: .zero 4;g: .zero 4;h: .zero 4;i: .zero 4;j: .zero 4' | llvm-mc -filetype=obj -triple=x86_64 - -o %t1.o
-; RUN: llc -mattr=+egpr %s -mtriple=x86_64 -filetype=obj -o %t.o
+; RUN: llc -combiner-topological-sorting -mattr=+egpr %s -mtriple=x86_64 -filetype=obj -o %t.o
; RUN: llvm-objdump --no-print-imm-hex -dr %t.o | FileCheck %s --check-prefix=GOTTPOFF_NOAPXRELAX
; RUN: echo '.tbss; .globl b,c,d,e,f,g,h,i,j; b: .zero 4;c: .zero 4;d: .zero 4;e: .zero 4;f: .zero 4;g: .zero 4;h: .zero 4;i: .zero 4;j: .zero 4' | llvm-mc -filetype=obj -triple=x86_64 - -o %t1.o
diff --git a/llvm/test/CodeGen/X86/apx/xor.ll b/llvm/test/CodeGen/X86/apx/xor.ll
index aebde64790c0c..7d17d70393b7a 100644
--- a/llvm/test/CodeGen/X86/apx/xor.ll
+++ b/llvm/test/CodeGen/X86/apx/xor.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,MEM
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,IMMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,MEM,MEMONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,+prefer-ndd-imm,+prefer-ndd-mem -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,IMM,MEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd,nf -x86-enable-apx-for-relocation=true -verify-machineinstrs --show-mc-encoding | FileCheck --check-prefix=NF %s
define i8 @xor8rr(i8 noundef %a, i8 noundef %b) {
; CHECK-LABEL: xor8rr:
diff --git a/llvm/test/CodeGen/X86/arbitrary-fp-convert-error.ll b/llvm/test/CodeGen/X86/arbitrary-fp-convert-error.ll
index 86fd0a5d22e0d..9008a717203f7 100644
--- a/llvm/test/CodeGen/X86/arbitrary-fp-convert-error.ll
+++ b/llvm/test/CodeGen/X86/arbitrary-fp-convert-error.ll
@@ -1,10 +1,10 @@
; RUN: split-file %s %t
-; RUN: not llc < %t/float8e4m3.ll -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s --check-prefix=E4M3
-; RUN: not llc < %t/float8e3m4.ll -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s --check-prefix=E3M4
-; RUN: not llc < %t/float8e5m2fnuz.ll -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s --check-prefix=E5M2FNUZ
-; RUN: not llc < %t/float8e4m3fnuz.ll -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s --check-prefix=E4M3FNUZ
-; RUN: not llc < %t/float8e4m3b11fnuz.ll -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s --check-prefix=E4M3B11FNUZ
-; RUN: not llc < %t/float8e8m0fnu.ll -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s --check-prefix=E8M0FNU
+; RUN: not llc -combiner-topological-sorting < %t/float8e4m3.ll -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s --check-prefix=E4M3
+; RUN: not llc -combiner-topological-sorting < %t/float8e3m4.ll -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s --check-prefix=E3M4
+; RUN: not llc -combiner-topological-sorting < %t/float8e5m2fnuz.ll -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s --check-prefix=E5M2FNUZ
+; RUN: not llc -combiner-topological-sorting < %t/float8e4m3fnuz.ll -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s --check-prefix=E4M3FNUZ
+; RUN: not llc -combiner-topological-sorting < %t/float8e4m3b11fnuz.ll -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s --check-prefix=E4M3B11FNUZ
+; RUN: not llc -combiner-topological-sorting < %t/float8e8m0fnu.ll -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s --check-prefix=E8M0FNU
; Test that llvm.convert.from.arbitrary.fp emits an error for formats that pass
; verifier validation but are not yet implemented in SelectionDAGBuilder.
diff --git a/llvm/test/CodeGen/X86/arbitrary-fp-to-float.ll b/llvm/test/CodeGen/X86/arbitrary-fp-to-float.ll
index e60fed64fd179..31313df8cea36 100644
--- a/llvm/test/CodeGen/X86/arbitrary-fp-to-float.ll
+++ b/llvm/test/CodeGen/X86/arbitrary-fp-to-float.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; Test llvm.convert.from.arbitrary intrinsic expansion.
diff --git a/llvm/test/CodeGen/X86/arg-cast.ll b/llvm/test/CodeGen/X86/arg-cast.ll
index 9559ff64e88b8..6c1f93fddc21d 100644
--- a/llvm/test/CodeGen/X86/arg-cast.ll
+++ b/llvm/test/CodeGen/X86/arg-cast.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; This should compile to movl $2147483647, %eax + andl only.
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; rdar://5736574
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/arg-copy-elide-win64.ll b/llvm/test/CodeGen/X86/arg-copy-elide-win64.ll
index ee02cbfab7ee6..091583d181f2c 100644
--- a/llvm/test/CodeGen/X86/arg-copy-elide-win64.ll
+++ b/llvm/test/CodeGen/X86/arg-copy-elide-win64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-windows-msvc -mattr=avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc -mattr=avx2 | FileCheck %s
; Make sure we don't try to copy elide these arguments since they will be
; passed indirectly.
diff --git a/llvm/test/CodeGen/X86/arg-copy-elide.ll b/llvm/test/CodeGen/X86/arg-copy-elide.ll
index f13627b55856f..9e6a9947e250c 100644
--- a/llvm/test/CodeGen/X86/arg-copy-elide.ll
+++ b/llvm/test/CodeGen/X86/arg-copy-elide.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-windows < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-windows < %s | FileCheck %s
declare void @addrof_i1(ptr)
declare void @addrof_i32(ptr)
diff --git a/llvm/test/CodeGen/X86/arg_returned_bitcast.ll b/llvm/test/CodeGen/X86/arg_returned_bitcast.ll
index 2699dc3de9ddd..63fea5fb2d3ec 100644
--- a/llvm/test/CodeGen/X86/arg_returned_bitcast.ll
+++ b/llvm/test/CodeGen/X86/arg_returned_bitcast.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s
; Test that the "returned" attribute "works" even if there is a bitcast between
; the argument and return value.
diff --git a/llvm/test/CodeGen/X86/arithmetic_fence.ll b/llvm/test/CodeGen/X86/arithmetic_fence.ll
index e167601e0e6a2..7bd4840175cf4 100644
--- a/llvm/test/CodeGen/X86/arithmetic_fence.ll
+++ b/llvm/test/CodeGen/X86/arithmetic_fence.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+fma | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+fma | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+fma | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+fma | FileCheck %s --check-prefix=X64
define float @f1(float %a, float %b, float %c) {
; X86-LABEL: f1:
diff --git a/llvm/test/CodeGen/X86/arithmetic_fence2.ll b/llvm/test/CodeGen/X86/arithmetic_fence2.ll
index 3c2ef21527f50..bb09e3de95dfc 100644
--- a/llvm/test/CodeGen/X86/arithmetic_fence2.ll
+++ b/llvm/test/CodeGen/X86/arithmetic_fence2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
define double @f1(double %a) {
; X86-LABEL: f1:
diff --git a/llvm/test/CodeGen/X86/asan-check-memaccess-add.ll b/llvm/test/CodeGen/X86/asan-check-memaccess-add.ll
index df07884555c84..5a469e9a3e98a 100644
--- a/llvm/test/CodeGen/X86/asan-check-memaccess-add.ll
+++ b/llvm/test/CodeGen/X86/asan-check-memaccess-add.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/asan-check-memaccess-or.ll b/llvm/test/CodeGen/X86/asan-check-memaccess-or.ll
index 887650bcc826a..f22a2a4e5972a 100644
--- a/llvm/test/CodeGen/X86/asan-check-memaccess-or.ll
+++ b/llvm/test/CodeGen/X86/asan-check-memaccess-or.ll
@@ -1,5 +1,5 @@
; XFAIL: *
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
target triple = "x86_64-pc-win"
diff --git a/llvm/test/CodeGen/X86/asm-block-labels.ll b/llvm/test/CodeGen/X86/asm-block-labels.ll
index fd78c793fa73e..d945e190c539b 100644
--- a/llvm/test/CodeGen/X86/asm-block-labels.ll
+++ b/llvm/test/CodeGen/X86/asm-block-labels.ll
@@ -1,4 +1,4 @@
-; RUN: opt < %s -O3 | llc -no-integrated-as
+; RUN: opt < %s -O3 | llc -combiner-topological-sorting -no-integrated-as
; ModuleID = 'block12.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/asm-block-labels2.ll b/llvm/test/CodeGen/X86/asm-block-labels2.ll
index 266f12e5fef8e..c08cc3401bf7a 100644
--- a/llvm/test/CodeGen/X86/asm-block-labels2.ll
+++ b/llvm/test/CodeGen/X86/asm-block-labels2.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=x86_64-linux-gnu -o - %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -o - %s 2>&1 | FileCheck %s
; Test that the blockaddress with X, i, or s constraint is printed as an
; immediate (.Ltmp0).
diff --git a/llvm/test/CodeGen/X86/asm-dialect-directive.ll b/llvm/test/CodeGen/X86/asm-dialect-directive.ll
index 4cdf4408c2084..ee22c2056d29b 100644
--- a/llvm/test/CodeGen/X86/asm-dialect-directive.ll
+++ b/llvm/test/CodeGen/X86/asm-dialect-directive.ll
@@ -1,7 +1,7 @@
;; Make sure that we always emit an assembly syntax directive for X86.
-; RUN: llc < %s -mtriple=x86_64 | FileCheck %s --check-prefix=ATT
-; RUN: llc < %s -mtriple=x86_64 -x86-asm-syntax=att | FileCheck %s --check-prefix=ATT
-; RUN: llc < %s -mtriple=x86_64 -x86-asm-syntax=intel | FileCheck %s --check-prefix=INTEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 | FileCheck %s --check-prefix=ATT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -x86-asm-syntax=att | FileCheck %s --check-prefix=ATT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -x86-asm-syntax=intel | FileCheck %s --check-prefix=INTEL
; INTEL: .intel_syntax noprefix
; ATT: .att_syntax
diff --git a/llvm/test/CodeGen/X86/asm-dialect-module.ll b/llvm/test/CodeGen/X86/asm-dialect-module.ll
index 2c00a44424c2c..431fdbbf475d7 100644
--- a/llvm/test/CodeGen/X86/asm-dialect-module.ll
+++ b/llvm/test/CodeGen/X86/asm-dialect-module.ll
@@ -1,6 +1,6 @@
;; Test that we respect the assembler dialect when parsing module-level inline asm.
-; RUN: not llc < %s -mtriple=x86_64 2>&1 | FileCheck %s --check-prefix=ERR
-; RUN: llc < %s -mtriple=x86_64 -x86-asm-syntax=intel | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64 2>&1 | FileCheck %s --check-prefix=ERR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -x86-asm-syntax=intel | FileCheck %s
; ERR: <inline asm>:1:1: error: unknown use of instruction mnemonic without a size suffix
diff --git a/llvm/test/CodeGen/X86/asm-dialect.ll b/llvm/test/CodeGen/X86/asm-dialect.ll
index ba1969dff4af3..14eaa44780b5f 100644
--- a/llvm/test/CodeGen/X86/asm-dialect.ll
+++ b/llvm/test/CodeGen/X86/asm-dialect.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu %s -o - \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu %s -o - \
; RUN: | FileCheck --check-prefix=OUTPUT_ATT %s
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu %s -x86-asm-syntax=intel -o - \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu %s -x86-asm-syntax=intel -o - \
; RUN: | FileCheck --check-prefix=OUTPUT_INTEL %s
define void @f() {
diff --git a/llvm/test/CodeGen/X86/asm-global-imm.ll b/llvm/test/CodeGen/X86/asm-global-imm.ll
index e3b31701c9676..375f820e0d2ef 100644
--- a/llvm/test/CodeGen/X86/asm-global-imm.ll
+++ b/llvm/test/CodeGen/X86/asm-global-imm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=static -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=static -no-integrated-as | FileCheck %s
; PR882
target datalayout = "e-p:32:32"
diff --git a/llvm/test/CodeGen/X86/asm-indirect-mem.ll b/llvm/test/CodeGen/X86/asm-indirect-mem.ll
index 95d97723a0f8e..3edc1a7d38b35 100644
--- a/llvm/test/CodeGen/X86/asm-indirect-mem.ll
+++ b/llvm/test/CodeGen/X86/asm-indirect-mem.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR2267
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i386-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/asm-invalid-register-class-crasher.ll b/llvm/test/CodeGen/X86/asm-invalid-register-class-crasher.ll
index b802140896edd..dd15614dd22d6 100644
--- a/llvm/test/CodeGen/X86/asm-invalid-register-class-crasher.ll
+++ b/llvm/test/CodeGen/X86/asm-invalid-register-class-crasher.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -mtriple=i386-apple-darwin 2>&1 %t
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin 2>&1 %t
; Previously, this would assert in an assert build, but crash in a release build.
; No FileCheck, just make sure we handle this gracefully.
diff --git a/llvm/test/CodeGen/X86/asm-label.ll b/llvm/test/CodeGen/X86/asm-label.ll
index 2d3e7b624d354..e5286f2918e57 100644
--- a/llvm/test/CodeGen/X86/asm-label.ll
+++ b/llvm/test/CodeGen/X86/asm-label.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin10 -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin10 -O0 < %s | FileCheck %s
; test that we print a label that we use. We had a bug where
; we would print the jump, but not the label because it was considered
@@ -7,7 +7,7 @@
; CHECK: jmp LBB0_9
; CHECK: LBB0_9: ## %cleanup
-; RUN: llc -filetype=obj -mtriple=x86_64 -O0 -save-temp-labels < %s | llvm-objdump -d - | FileCheck %s --check-prefix=SAVETEMP
+; RUN: llc -combiner-topological-sorting -filetype=obj -mtriple=x86_64 -O0 -save-temp-labels < %s | llvm-objdump -d - | FileCheck %s --check-prefix=SAVETEMP
; SAVETEMP: jne {{.*}} <.LBB0_1>
; SAVETEMP-LABEL: <.LBB0_1>:
diff --git a/llvm/test/CodeGen/X86/asm-label2.ll b/llvm/test/CodeGen/X86/asm-label2.ll
index 9760cacbc37b8..eb46061bdf4d1 100644
--- a/llvm/test/CodeGen/X86/asm-label2.ll
+++ b/llvm/test/CodeGen/X86/asm-label2.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin10 -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin10 -O0 < %s | FileCheck %s
; test that we print a label that we use. We had a bug where
; we would print the jump, but not the label because it was considered
diff --git a/llvm/test/CodeGen/X86/asm-mismatched-types.ll b/llvm/test/CodeGen/X86/asm-mismatched-types.ll
index 47525e025f1dc..8893563c90645 100644
--- a/llvm/test/CodeGen/X86/asm-mismatched-types.ll
+++ b/llvm/test/CodeGen/X86/asm-mismatched-types.ll
@@ -1,4 +1,4 @@
-; RUN: llc -o - %s -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - %s -no-integrated-as | FileCheck %s
target triple = "x86_64--"
; Allow to specify any of the 8/16/32/64 register names interchangeably in
diff --git a/llvm/test/CodeGen/X86/asm-modifier-32.ll b/llvm/test/CodeGen/X86/asm-modifier-32.ll
index 79cd2cb7af49a..6a977df6da9e4 100644
--- a/llvm/test/CodeGen/X86/asm-modifier-32.ll
+++ b/llvm/test/CodeGen/X86/asm-modifier-32.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -no-integrated-as | FileCheck %s
; If the target does not have 64-bit integer registers, emit 32-bit register
; names.
diff --git a/llvm/test/CodeGen/X86/asm-modifier-P.ll b/llvm/test/CodeGen/X86/asm-modifier-P.ll
index 5465ad37f1ae4..40bbb28ebddab 100644
--- a/llvm/test/CodeGen/X86/asm-modifier-P.ll
+++ b/llvm/test/CodeGen/X86/asm-modifier-P.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-32
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-32
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-64
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=CHECK-STATIC-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=CHECK-PIC-64
; PR3379
; XFAIL: *
diff --git a/llvm/test/CodeGen/X86/asm-modifier-error.ll b/llvm/test/CodeGen/X86/asm-modifier-error.ll
index 3f193dca5c804..734acbaccd09a 100644
--- a/llvm/test/CodeGen/X86/asm-modifier-error.ll
+++ b/llvm/test/CodeGen/X86/asm-modifier-error.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s
; CHECK: error: invalid operand in inline asm: 'mov %ah, ${0:h}'
define void @test1() {
diff --git a/llvm/test/CodeGen/X86/asm-modifier-macho.ll b/llvm/test/CodeGen/X86/asm-modifier-macho.ll
index b8da424bbacca..0ed5663bd6706 100644
--- a/llvm/test/CodeGen/X86/asm-modifier-macho.ll
+++ b/llvm/test/CodeGen/X86/asm-modifier-macho.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=i386-apple-darwin9.6 < %s | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting -mtriple=i386-apple-darwin9.6 < %s | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin < %s | FileCheck %s --check-prefixes=CHECK,X64
define i32 @test1() nounwind {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/asm-modifier-pic.ll b/llvm/test/CodeGen/X86/asm-modifier-pic.ll
index a8d904fd96d9d..8efeeac7e93f2 100644
--- a/llvm/test/CodeGen/X86/asm-modifier-pic.ll
+++ b/llvm/test/CodeGen/X86/asm-modifier-pic.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64 -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -relocation-model=pic < %s | FileCheck %s
@var = internal global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/asm-modifier.ll b/llvm/test/CodeGen/X86/asm-modifier.ll
index e1aac95a1ff6a..1618ecc4a608e 100644
--- a/llvm/test/CodeGen/X86/asm-modifier.ll
+++ b/llvm/test/CodeGen/X86/asm-modifier.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=i686 < %s | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc -mtriple=x86_64 < %s | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686 < %s | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 < %s | FileCheck %s --check-prefixes=CHECK,X64
;; Certain constraints should not be used for PIC. See asm-modifier-pic.ll for PIC-specific tests.
@var = internal global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/asm-modifier2.ll b/llvm/test/CodeGen/X86/asm-modifier2.ll
index 69af99e2d5555..3f7f0e6664400 100644
--- a/llvm/test/CodeGen/X86/asm-modifier2.ll
+++ b/llvm/test/CodeGen/X86/asm-modifier2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define void @test1() {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/asm-reg-type-mismatch-avx512.ll b/llvm/test/CodeGen/X86/asm-reg-type-mismatch-avx512.ll
index 56b05418afa94..15beb970b55ff 100644
--- a/llvm/test/CodeGen/X86/asm-reg-type-mismatch-avx512.ll
+++ b/llvm/test/CodeGen/X86/asm-reg-type-mismatch-avx512.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx512f | FileCheck %s
define i64 @test1() nounwind {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/asm-reg-type-mismatch.ll b/llvm/test/CodeGen/X86/asm-reg-type-mismatch.ll
index e11b103003183..48080b3a32879 100644
--- a/llvm/test/CodeGen/X86/asm-reg-type-mismatch.ll
+++ b/llvm/test/CodeGen/X86/asm-reg-type-mismatch.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=core2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core2 | FileCheck %s
; PR2715
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/asm-reject-reg-type-mismatch-avx.ll b/llvm/test/CodeGen/X86/asm-reject-reg-type-mismatch-avx.ll
index 887de29e7e672..fc609783f47e9 100644
--- a/llvm/test/CodeGen/X86/asm-reject-reg-type-mismatch-avx.ll
+++ b/llvm/test/CodeGen/X86/asm-reject-reg-type-mismatch-avx.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -o /dev/null -mattr=avx %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -o /dev/null -mattr=avx %s 2>&1 | FileCheck %s
target triple = "x86_64--"
; CHECK: error: register 'XMM15' allocated for constraint '{xmm15}' does not match required type
diff --git a/llvm/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll b/llvm/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
index db754892511a8..efc204070bca2 100644
--- a/llvm/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
+++ b/llvm/test/CodeGen/X86/asm-reject-reg-type-mismatch.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -o /dev/null %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -o /dev/null %s 2>&1 | FileCheck %s
target triple = "x86_64--"
; CHECK: error: couldn't allocate output register for constraint '{ax}'
diff --git a/llvm/test/CodeGen/X86/asm-reject-rex.ll b/llvm/test/CodeGen/X86/asm-reject-rex.ll
index f9719b84816a6..b63fa8153adf5 100644
--- a/llvm/test/CodeGen/X86/asm-reject-rex.ll
+++ b/llvm/test/CodeGen/X86/asm-reject-rex.ll
@@ -1,6 +1,6 @@
-; RUN: not llc -o /dev/null %s -mtriple=i386-unknown-unknown 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -o /dev/null %s -mtriple=i386-unknown-unknown 2>&1 | FileCheck %s
; Make sure X32 still works.
-; RUN: llc -o /dev/null %s -mtriple=x86_64-linux-gnux32
+; RUN: llc -combiner-topological-sorting -o /dev/null %s -mtriple=x86_64-linux-gnux32
; CHECK: error: couldn't allocate output register for constraint '{xmm8}'
define i64 @blup() {
diff --git a/llvm/test/CodeGen/X86/asm-reject-vk32-vk64.ll b/llvm/test/CodeGen/X86/asm-reject-vk32-vk64.ll
index 12d148a3a74b6..599e4fede5202 100644
--- a/llvm/test/CodeGen/X86/asm-reject-vk32-vk64.ll
+++ b/llvm/test/CodeGen/X86/asm-reject-vk32-vk64.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -o /dev/null %s -mtriple=x86_64-unknown-unknown -mattr=avx512f 2>&1 | FileCheck %s
-; RUN: not llc -o /dev/null %s -mtriple=i386-unknown-unknown -mattr=avx512f 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -o /dev/null %s -mtriple=x86_64-unknown-unknown -mattr=avx512f 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -o /dev/null %s -mtriple=i386-unknown-unknown -mattr=avx512f 2>&1 | FileCheck %s
; CHECK: error: couldn't allocate input reg for constraint 'Yk'
define <8 x i64> @mask_Yk_i32(i32 %msk, <8 x i64> %x, <8 x i64> %y) {
diff --git a/llvm/test/CodeGen/X86/asm-reject-x87-int.ll b/llvm/test/CodeGen/X86/asm-reject-x87-int.ll
index 233a0df5ba46b..6153dfe1eaea8 100644
--- a/llvm/test/CodeGen/X86/asm-reject-x87-int.ll
+++ b/llvm/test/CodeGen/X86/asm-reject-x87-int.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -o /dev/null %s -mtriple=i386-unknown-unknown 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -o /dev/null %s -mtriple=i386-unknown-unknown 2>&1 | FileCheck %s
; This test was derived from this C code. The frontend sees that the constraint
; doesn't accept memory, but the argument is a strict. So it tries to bitcast
diff --git a/llvm/test/CodeGen/X86/asm-reject-xmm16.ll b/llvm/test/CodeGen/X86/asm-reject-xmm16.ll
index 52915d9558b9c..f9c877d958add 100644
--- a/llvm/test/CodeGen/X86/asm-reject-xmm16.ll
+++ b/llvm/test/CodeGen/X86/asm-reject-xmm16.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -o /dev/null %s -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s
-; RUN: not llc -o /dev/null %s -mtriple=i386-unknown-unknown -mattr=avx512vl 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -o /dev/null %s -mtriple=x86_64-unknown-unknown 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -o /dev/null %s -mtriple=i386-unknown-unknown -mattr=avx512vl 2>&1 | FileCheck %s
; CHECK: error: couldn't allocate output register for constraint '{xmm16}'
define i64 @blup() {
diff --git a/llvm/test/CodeGen/X86/assertzext-demanded.ll b/llvm/test/CodeGen/X86/assertzext-demanded.ll
index 33a8c543ed9ab..1d71169a02ac0 100644
--- a/llvm/test/CodeGen/X86/assertzext-demanded.ll
+++ b/llvm/test/CodeGen/X86/assertzext-demanded.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; Reported on D129765
define void @simplify_assertzext(ptr %0) {
diff --git a/llvm/test/CodeGen/X86/atom-call-reg-indirect-foldedreload32.ll b/llvm/test/CodeGen/X86/atom-call-reg-indirect-foldedreload32.ll
index 7f534cf2a0e2b..a440a95f776d0 100644
--- a/llvm/test/CodeGen/X86/atom-call-reg-indirect-foldedreload32.ll
+++ b/llvm/test/CodeGen/X86/atom-call-reg-indirect-foldedreload32.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=i386-linux-gnu -mcpu=atom | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -mcpu=atom | \
; RUN: FileCheck --check-prefix=ATOM %s
-; RUN: llc < %s -mtriple=i386-linux-gnu -mcpu=core2 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -mcpu=core2 | \
; RUN: FileCheck --check-prefix=CORE2 %s
; ATOM: calll *{{%[a-z]+}}
; CORE2: calll *funcp
diff --git a/llvm/test/CodeGen/X86/atom-call-reg-indirect-foldedreload64.ll b/llvm/test/CodeGen/X86/atom-call-reg-indirect-foldedreload64.ll
index 2379db0671c30..d2b37f4068f52 100644
--- a/llvm/test/CodeGen/X86/atom-call-reg-indirect-foldedreload64.ll
+++ b/llvm/test/CodeGen/X86/atom-call-reg-indirect-foldedreload64.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mcpu=atom | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mcpu=atom | \
; RUN: FileCheck --check-prefix=ATOM %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mcpu=core2 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mcpu=core2 | \
; RUN: FileCheck --check-prefix=CORE2 %s
; ATOM: callq *{{%[a-z]+[0-9]*}}
; CORE2: callq *funcp
diff --git a/llvm/test/CodeGen/X86/atom-call-reg-indirect.ll b/llvm/test/CodeGen/X86/atom-call-reg-indirect.ll
index d8bc72f380e9c..e1252c3e4b92a 100644
--- a/llvm/test/CodeGen/X86/atom-call-reg-indirect.ll
+++ b/llvm/test/CodeGen/X86/atom-call-reg-indirect.ll
@@ -1,11 +1,11 @@
-; RUN: llc < %s -mcpu=atom -mtriple=i686-linux | FileCheck -check-prefix=ATOM32 %s
-; RUN: llc < %s -mcpu=core2 -mtriple=i686-linux | FileCheck -check-prefix=ATOM-NOT32 %s
-; RUN: llc < %s -mcpu=atom -mtriple=x86_64-linux | FileCheck -check-prefix=ATOM64 %s
-; RUN: llc < %s -mcpu=core2 -mtriple=x86_64-linux | FileCheck -check-prefix=ATOM-NOT64 %s
-; RUN: llc < %s -mcpu=slm -mtriple=i686-linux | FileCheck -check-prefix=SLM32 %s
-; RUN: llc < %s -mcpu=slm -mtriple=x86_64-linux | FileCheck -check-prefix=SLM64 %s
-; RUN: llc < %s -mcpu=goldmont -mtriple=i686-linux | FileCheck -check-prefix=SLM32 %s
-; RUN: llc < %s -mcpu=goldmont -mtriple=x86_64-linux | FileCheck -check-prefix=SLM64 %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=atom -mtriple=i686-linux | FileCheck -check-prefix=ATOM32 %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core2 -mtriple=i686-linux | FileCheck -check-prefix=ATOM-NOT32 %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=atom -mtriple=x86_64-linux | FileCheck -check-prefix=ATOM64 %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core2 -mtriple=x86_64-linux | FileCheck -check-prefix=ATOM-NOT64 %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=slm -mtriple=i686-linux | FileCheck -check-prefix=SLM32 %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=slm -mtriple=x86_64-linux | FileCheck -check-prefix=SLM64 %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=goldmont -mtriple=i686-linux | FileCheck -check-prefix=SLM32 %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=goldmont -mtriple=x86_64-linux | FileCheck -check-prefix=SLM64 %s
; fn_ptr.ll
diff --git a/llvm/test/CodeGen/X86/atom-cmpb.ll b/llvm/test/CodeGen/X86/atom-cmpb.ll
index 46ac6e416738f..43f500c45a3ec 100644
--- a/llvm/test/CodeGen/X86/atom-cmpb.ll
+++ b/llvm/test/CodeGen/X86/atom-cmpb.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=atom | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=atom | FileCheck %s
; CHECK: movl
; CHECK: movzbl
; CHECK: movzbl
diff --git a/llvm/test/CodeGen/X86/atom-fixup-lea1.ll b/llvm/test/CodeGen/X86/atom-fixup-lea1.ll
index 59f655bd7cd14..a8b83bb8d18bc 100644
--- a/llvm/test/CodeGen/X86/atom-fixup-lea1.ll
+++ b/llvm/test/CodeGen/X86/atom-fixup-lea1.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=atom -mtriple=i686-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=atom -mtriple=i686-linux | FileCheck %s
; CHECK: addl
; CHECK-NEXT:leal
; CHECK-NEXT:decl
diff --git a/llvm/test/CodeGen/X86/atom-fixup-lea2.ll b/llvm/test/CodeGen/X86/atom-fixup-lea2.ll
index adea9e1386a90..0f04304dfca85 100644
--- a/llvm/test/CodeGen/X86/atom-fixup-lea2.ll
+++ b/llvm/test/CodeGen/X86/atom-fixup-lea2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=atom -mtriple=i686-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=atom -mtriple=i686-linux | FileCheck %s
; CHECK:%bb.5
; CHECK-NEXT:leal
diff --git a/llvm/test/CodeGen/X86/atom-fixup-lea3.ll b/llvm/test/CodeGen/X86/atom-fixup-lea3.ll
index d4c010e391024..08190a7af8cb0 100644
--- a/llvm/test/CodeGen/X86/atom-fixup-lea3.ll
+++ b/llvm/test/CodeGen/X86/atom-fixup-lea3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=atom -mtriple=i686-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=atom -mtriple=i686-linux | FileCheck %s
; CHECK: addl ({{%[a-z]+}},[[reg:%[a-z]+]],4)
; CHECK-NEXT: movl
; CHECK-NEXT: addl 4({{%[a-z]+}},[[reg:%[a-z]+]],4)
diff --git a/llvm/test/CodeGen/X86/atom-fixup-lea4.ll b/llvm/test/CodeGen/X86/atom-fixup-lea4.ll
index 69689f027c982..ba8dda930b232 100644
--- a/llvm/test/CodeGen/X86/atom-fixup-lea4.ll
+++ b/llvm/test/CodeGen/X86/atom-fixup-lea4.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=atom -mtriple=x86_64-linux
+; RUN: llc -combiner-topological-sorting < %s -mcpu=atom -mtriple=x86_64-linux
%struct.ValueWrapper = type { double }
%struct.ValueWrapper.6 = type { %struct.ValueWrapper.7 }
diff --git a/llvm/test/CodeGen/X86/atom-lea-addw-bug.ll b/llvm/test/CodeGen/X86/atom-lea-addw-bug.ll
index b7abfe5df8abc..c75d87a8ff8cf 100644
--- a/llvm/test/CodeGen/X86/atom-lea-addw-bug.ll
+++ b/llvm/test/CodeGen/X86/atom-lea-addw-bug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=atom | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=atom | FileCheck %s
; ModuleID = 'bugpoint-reduced-simplified.bc'
target triple = "x86_64-apple-darwin12.5.0"
diff --git a/llvm/test/CodeGen/X86/atom-lea-sp.ll b/llvm/test/CodeGen/X86/atom-lea-sp.ll
index 9ad0a0eee7df2..f76b967dba097 100644
--- a/llvm/test/CodeGen/X86/atom-lea-sp.ll
+++ b/llvm/test/CodeGen/X86/atom-lea-sp.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mcpu=atom -mtriple=i686-linux -no-x86-call-frame-opt | FileCheck -check-prefix=ATOM %s
-; RUN: llc < %s -mcpu=core2 -mtriple=i686-linux -no-x86-call-frame-opt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=atom -mtriple=i686-linux -no-x86-call-frame-opt | FileCheck -check-prefix=ATOM %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core2 -mtriple=i686-linux -no-x86-call-frame-opt | FileCheck %s
declare void @use_arr(ptr)
declare void @many_params(i32, i32, i32, i32, i32, i32)
diff --git a/llvm/test/CodeGen/X86/atom-pad-short-functions.ll b/llvm/test/CodeGen/X86/atom-pad-short-functions.ll
index 301995dfef0a3..a8644a68cc745 100644
--- a/llvm/test/CodeGen/X86/atom-pad-short-functions.ll
+++ b/llvm/test/CodeGen/X86/atom-pad-short-functions.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O1 -mcpu=atom -mtriple=i686-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O1 -mcpu=atom -mtriple=i686-linux | FileCheck %s
declare void @external_function(...)
diff --git a/llvm/test/CodeGen/X86/atom-sched.ll b/llvm/test/CodeGen/X86/atom-sched.ll
index 94a8e41a5847d..b94d157776d4b 100644
--- a/llvm/test/CodeGen/X86/atom-sched.ll
+++ b/llvm/test/CodeGen/X86/atom-sched.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -O2 -mcpu=atom -mtriple=i686-- -relocation-model=static | FileCheck -check-prefix=atom %s
-; RUN: llc < %s -O2 -mcpu=slm -mtriple=i686-- -relocation-model=static | FileCheck -check-prefix=slm %s
-; RUN: llc < %s -O2 -mcpu=goldmont -mtriple=i686-- -relocation-model=static | FileCheck -check-prefix=slm %s
-; RUN: llc < %s -O2 -mcpu=core2 -mtriple=i686-- -relocation-model=static | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mcpu=atom -mtriple=i686-- -relocation-model=static | FileCheck -check-prefix=atom %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mcpu=slm -mtriple=i686-- -relocation-model=static | FileCheck -check-prefix=slm %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mcpu=goldmont -mtriple=i686-- -relocation-model=static | FileCheck -check-prefix=slm %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mcpu=core2 -mtriple=i686-- -relocation-model=static | FileCheck %s
;
@a = common global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/atom-shuf.ll b/llvm/test/CodeGen/X86/atom-shuf.ll
index 7e1094abf1fd0..a49010b45f939 100644
--- a/llvm/test/CodeGen/X86/atom-shuf.ll
+++ b/llvm/test/CodeGen/X86/atom-shuf.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux-pc -mcpu=atom | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-pc -mcpu=atom | FileCheck %s
define <16 x i8> @foo(<16 x i8> %in) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/atomic-add.ll b/llvm/test/CodeGen/X86/atomic-add.ll
index c6cb877558783..12a080729287f 100644
--- a/llvm/test/CodeGen/X86/atomic-add.ll
+++ b/llvm/test/CodeGen/X86/atomic-add.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -mattr=slow-incdec -verify-machineinstrs | FileCheck %s --check-prefix SLOW_INC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=slow-incdec -verify-machineinstrs | FileCheck %s --check-prefix SLOW_INC
; rdar://7103704
diff --git a/llvm/test/CodeGen/X86/atomic-bit-test.ll b/llvm/test/CodeGen/X86/atomic-bit-test.ll
index b06bef44a5e9e..c515a9a67e180 100644
--- a/llvm/test/CodeGen/X86/atomic-bit-test.ll
+++ b/llvm/test/CodeGen/X86/atomic-bit-test.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
@v16 = dso_local global i16 0, align 2
@v32 = dso_local global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/atomic-dagsched.ll b/llvm/test/CodeGen/X86/atomic-dagsched.ll
index 4cb0611a2295f..eea363d1e6f8d 100644
--- a/llvm/test/CodeGen/X86/atomic-dagsched.ll
+++ b/llvm/test/CodeGen/X86/atomic-dagsched.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s
define void @test(ptr %a, ptr %b, i64 %c, i64 %d) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/atomic-eflags-reuse.ll b/llvm/test/CodeGen/X86/atomic-eflags-reuse.ll
index 0c5abef83c45d..bf14e63ccd94c 100644
--- a/llvm/test/CodeGen/X86/atomic-eflags-reuse.ll
+++ b/llvm/test/CodeGen/X86/atomic-eflags-reuse.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=CHECK --check-prefix=FASTINCDEC
-; RUN: llc < %s -mtriple=x86_64-- -mattr=slow-incdec | FileCheck %s --check-prefix=CHECK --check-prefix=SLOWINCDEC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=CHECK --check-prefix=FASTINCDEC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=slow-incdec | FileCheck %s --check-prefix=CHECK --check-prefix=SLOWINCDEC
define i32 @test_add_1_cmov_slt(ptr %p, i32 %a0, i32 %a1) #0 {
; FASTINCDEC-LABEL: test_add_1_cmov_slt:
diff --git a/llvm/test/CodeGen/X86/atomic-flags.ll b/llvm/test/CodeGen/X86/atomic-flags.ll
index 317af67deb163..c4118e5c51e31 100644
--- a/llvm/test/CodeGen/X86/atomic-flags.ll
+++ b/llvm/test/CodeGen/X86/atomic-flags.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=X86
; Make sure that flags are properly preserved despite atomic optimizations.
diff --git a/llvm/test/CodeGen/X86/atomic-fp.ll b/llvm/test/CodeGen/X86/atomic-fp.ll
index 2dee1d12e7255..66a193366c687 100644
--- a/llvm/test/CodeGen/X86/atomic-fp.ll
+++ b/llvm/test/CodeGen/X86/atomic-fp.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=X86-NOSSE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=sse -verify-machineinstrs | FileCheck %s --check-prefix=X86-SSE1
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=sse2 -verify-machineinstrs | FileCheck %s --check-prefix=X86-SSE2
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx -verify-machineinstrs | FileCheck %s --check-prefix=X86-AVX
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512f -verify-machineinstrs | FileCheck %s --check-prefix=X86-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=X64-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx -verify-machineinstrs | FileCheck %s --check-prefix=X64-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f -verify-machineinstrs | FileCheck %s --check-prefix=X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=X86-NOSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=sse -verify-machineinstrs | FileCheck %s --check-prefix=X86-SSE1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=sse2 -verify-machineinstrs | FileCheck %s --check-prefix=X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx -verify-machineinstrs | FileCheck %s --check-prefix=X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512f -verify-machineinstrs | FileCheck %s --check-prefix=X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx -verify-machineinstrs | FileCheck %s --check-prefix=X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f -verify-machineinstrs | FileCheck %s --check-prefix=X64-AVX
; ----- FADD -----
diff --git a/llvm/test/CodeGen/X86/atomic-idempotent-syncscope.ll b/llvm/test/CodeGen/X86/atomic-idempotent-syncscope.ll
index 9e20fdb59f552..69a4d6869978e 100644
--- a/llvm/test/CodeGen/X86/atomic-idempotent-syncscope.ll
+++ b/llvm/test/CodeGen/X86/atomic-idempotent-syncscope.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686-- -verify-machineinstrs -mattr=+sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SSE2
-; RUN: llc < %s -mtriple=i686-- -verify-machineinstrs -mcpu=slm -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SLM
-; RUN: llc < %s -mtriple=i686-- -verify-machineinstrs -mcpu=goldmont -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SLM
-; RUN: llc < %s -mtriple=i686-- -verify-machineinstrs -mcpu=knl -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SLM
-; RUN: llc < %s -mtriple=i686-- -verify-machineinstrs -mcpu=atom -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-ATOM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -verify-machineinstrs -mattr=+sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -verify-machineinstrs -mcpu=slm -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SLM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -verify-machineinstrs -mcpu=goldmont -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SLM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -verify-machineinstrs -mcpu=knl -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SLM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -verify-machineinstrs -mcpu=atom -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-ATOM
; On x86, an atomic rmw operation that does not modify the value in memory
; (such as atomic add 0) can be replaced by an mfence followed by a mov.
diff --git a/llvm/test/CodeGen/X86/atomic-idempotent.ll b/llvm/test/CodeGen/X86/atomic-idempotent.ll
index 01c3e7999a92c..244ac9b33dd32 100644
--- a/llvm/test/CodeGen/X86/atomic-idempotent.ll
+++ b/llvm/test/CodeGen/X86/atomic-idempotent.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686-- -verify-machineinstrs -mattr=+sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SSE2
-; RUN: llc < %s -mtriple=i686-- -verify-machineinstrs -mcpu=slm -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SLM
-; RUN: llc < %s -mtriple=i686-- -verify-machineinstrs -mcpu=goldmont -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SLM
-; RUN: llc < %s -mtriple=i686-- -verify-machineinstrs -mcpu=knl -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SLM
-; RUN: llc < %s -mtriple=i686-- -verify-machineinstrs -mcpu=atom -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-ATOM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -verify-machineinstrs -mattr=+sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -verify-machineinstrs -mcpu=slm -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SLM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -verify-machineinstrs -mcpu=goldmont -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SLM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -verify-machineinstrs -mcpu=knl -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-GENERIC,X86-SLM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -verify-machineinstrs -mcpu=atom -mattr=-sse2 | FileCheck %s --check-prefixes=X86,X86-ATOM
; On x86, an atomic rmw operation that does not modify the value in memory
; (such as atomic add 0) can be replaced by an mfence followed by a mov.
diff --git a/llvm/test/CodeGen/X86/atomic-load-store-wide.ll b/llvm/test/CodeGen/X86/atomic-load-store-wide.ll
index 1b73a41439688..3b1fe144f1b70 100644
--- a/llvm/test/CodeGen/X86/atomic-load-store-wide.ll
+++ b/llvm/test/CodeGen/X86/atomic-load-store-wide.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=corei7 -mtriple=i686-- -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=SSE42
-; RUN: llc < %s -mtriple=i686-- -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=NOSSE
+; RUN: llc -combiner-topological-sorting < %s -mcpu=corei7 -mtriple=i686-- -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -verify-machineinstrs | FileCheck %s --check-prefix=CHECK --check-prefix=NOSSE
; 64-bit load/store on x86-32
; FIXME: The generated code can be substantially improved.
diff --git a/llvm/test/CodeGen/X86/atomic-load-store.ll b/llvm/test/CodeGen/X86/atomic-load-store.ll
index 7e15b9303887f..3ccf49c84d2ed 100644
--- a/llvm/test/CodeGen/X86/atomic-load-store.ll
+++ b/llvm/test/CodeGen/X86/atomic-load-store.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=x86-64 | FileCheck %s --check-prefixes=CHECK,CHECK-O3,CHECK-SSE-O3
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,CHECK-O3,CHECK-SSE-O3
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,CHECK-O3,CHECK-AVX-O3,CHECK-AVX2-O3
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-O3,CHECK-AVX-O3,CHECK-AVX512-O3
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -O0 -mcpu=x86-64 | FileCheck %s --check-prefixes=CHECK,CHECK-O0,CHECK-SSE-O0
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -O0 -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,CHECK-O0,CHECK-SSE-O0
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -O0 -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,CHECK-O0,CHECK-AVX-O0,CHECK-AVX2-O0
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -O0 -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-O0,CHECK-AVX-O0,CHECK-AVX512-O0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=x86-64 | FileCheck %s --check-prefixes=CHECK,CHECK-O3,CHECK-SSE-O3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,CHECK-O3,CHECK-SSE-O3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,CHECK-O3,CHECK-AVX-O3,CHECK-AVX2-O3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-O3,CHECK-AVX-O3,CHECK-AVX512-O3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs -O0 -mcpu=x86-64 | FileCheck %s --check-prefixes=CHECK,CHECK-O0,CHECK-SSE-O0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs -O0 -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,CHECK-O0,CHECK-SSE-O0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs -O0 -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,CHECK-O0,CHECK-AVX-O0,CHECK-AVX2-O0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs -O0 -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-O0,CHECK-AVX-O0,CHECK-AVX512-O0
define void @test1(ptr %ptr, i32 %val1) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/atomic-minmax-i6432.ll b/llvm/test/CodeGen/X86/atomic-minmax-i6432.ll
index 362135cb1808b..8334cb415ee15 100644
--- a/llvm/test/CodeGen/X86/atomic-minmax-i6432.ll
+++ b/llvm/test/CodeGen/X86/atomic-minmax-i6432.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mattr=+cmov -mtriple=i386-pc-linux -verify-machineinstrs < %s | FileCheck %s -check-prefix=LINUX
-; RUN: llc -mattr=+cmov -mtriple=i386-macosx -relocation-model=pic -verify-machineinstrs < %s | FileCheck %s -check-prefix=PIC
+; RUN: llc -combiner-topological-sorting -mattr=+cmov -mtriple=i386-pc-linux -verify-machineinstrs < %s | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting -mattr=+cmov -mtriple=i386-macosx -relocation-model=pic -verify-machineinstrs < %s | FileCheck %s -check-prefix=PIC
@sc64 = external dso_local global i64
diff --git a/llvm/test/CodeGen/X86/atomic-monotonic.ll b/llvm/test/CodeGen/X86/atomic-monotonic.ll
index 963825ec48e40..24580bb717cc4 100644
--- a/llvm/test/CodeGen/X86/atomic-monotonic.ll
+++ b/llvm/test/CodeGen/X86/atomic-monotonic.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck --check-prefixes=CHECK,CHECK-O0 %s
-; RUN: llc -O3 < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck --check-prefixes=CHECK,CHECK-O3 %s
+; RUN: llc -combiner-topological-sorting -O0 < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck --check-prefixes=CHECK,CHECK-O0 %s
+; RUN: llc -combiner-topological-sorting -O3 < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck --check-prefixes=CHECK,CHECK-O3 %s
define i8 @load_i8(ptr %ptr) {
; CHECK-O0-LABEL: load_i8:
diff --git a/llvm/test/CodeGen/X86/atomic-nocx16-win.ll b/llvm/test/CodeGen/X86/atomic-nocx16-win.ll
index 3f0649cd9ae07..05f9da29fc69d 100644
--- a/llvm/test/CodeGen/X86/atomic-nocx16-win.ll
+++ b/llvm/test/CodeGen/X86/atomic-nocx16-win.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-windows-gnu -verify-machineinstrs -mcpu=corei7 -mattr=-cx16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-gnu -verify-machineinstrs -mcpu=corei7 -mattr=-cx16 | FileCheck %s
define void @call_load(ptr %dst, ptr %src) nounwind {
; CHECK-LABEL: call_load:
diff --git a/llvm/test/CodeGen/X86/atomic-nocx16.ll b/llvm/test/CodeGen/X86/atomic-nocx16.ll
index c854a21d30bc9..9129c478c9b36 100644
--- a/llvm/test/CodeGen/X86/atomic-nocx16.ll
+++ b/llvm/test/CodeGen/X86/atomic-nocx16.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=corei7 -mattr=-cx16 | FileCheck %s
-; RUN: llc < %s -mtriple=i386-linux-gnu -verify-machineinstrs -mattr=cx16 | FileCheck -check-prefix=CHECK32 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs -mcpu=corei7 -mattr=-cx16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -verify-machineinstrs -mattr=cx16 | FileCheck -check-prefix=CHECK32 %s
;; Verify that 128-bit atomics emit a libcall without cx16
;; available.
diff --git a/llvm/test/CodeGen/X86/atomic-non-integer-fp128.ll b/llvm/test/CodeGen/X86/atomic-non-integer-fp128.ll
index e7bbd91d98fab..6af670a50d0c1 100644
--- a/llvm/test/CodeGen/X86/atomic-non-integer-fp128.ll
+++ b/llvm/test/CodeGen/X86/atomic-non-integer-fp128.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2,cx16 | FileCheck %s --check-prefixes=X64-SSE
-; RUN: llc < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=avx,cx16 | FileCheck %s --check-prefixes=X64-AVX
-; RUN: llc < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=avx512f,cx16 | FileCheck %s --check-prefixes=X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2,cx16 | FileCheck %s --check-prefixes=X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=avx,cx16 | FileCheck %s --check-prefixes=X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=avx512f,cx16 | FileCheck %s --check-prefixes=X64-AVX
; Codegen of fp128 without cx16 is tested in atomic-nocx16.ll
diff --git a/llvm/test/CodeGen/X86/atomic-non-integer.ll b/llvm/test/CodeGen/X86/atomic-non-integer.ll
index ed882cbbc5254..9efd6250f7a18 100644
--- a/llvm/test/CodeGen/X86/atomic-non-integer.ll
+++ b/llvm/test/CodeGen/X86/atomic-non-integer.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-linux-generic -verify-machineinstrs -mattr=sse | FileCheck %s --check-prefixes=X86,X86-SSE1
-; RUN: llc < %s -mtriple=i386-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
-; RUN: llc < %s -mtriple=i386-linux-generic -verify-machineinstrs -mattr=avx | FileCheck %s --check-prefixes=X86,X86-AVX
-; RUN: llc < %s -mtriple=i386-linux-generic -verify-machineinstrs -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86-AVX
-; RUN: llc < %s -mtriple=i386-linux-generic -verify-machineinstrs | FileCheck %s --check-prefixes=X86,X86-NOSSE
-; RUN: llc < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck %s --check-prefixes=X64-SSE
-; RUN: llc < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=avx | FileCheck %s --check-prefixes=X64-AVX
-; RUN: llc < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=avx512f | FileCheck %s --check-prefixes=X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-generic -verify-machineinstrs -mattr=sse | FileCheck %s --check-prefixes=X86,X86-SSE1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-generic -verify-machineinstrs -mattr=avx | FileCheck %s --check-prefixes=X86,X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-generic -verify-machineinstrs -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-generic -verify-machineinstrs | FileCheck %s --check-prefixes=X86,X86-NOSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=sse2 | FileCheck %s --check-prefixes=X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=avx | FileCheck %s --check-prefixes=X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mattr=avx512f | FileCheck %s --check-prefixes=X64-AVX
; Note: This test is testing that the lowering for atomics matches what we
; currently emit for non-atomics + the atomic restriction. The presence of
diff --git a/llvm/test/CodeGen/X86/atomic-op.ll b/llvm/test/CodeGen/X86/atomic-op.ll
index 5bdc60b031179..e84296525e361 100644
--- a/llvm/test/CodeGen/X86/atomic-op.ll
+++ b/llvm/test/CodeGen/X86/atomic-op.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -mtriple=i686-- -mattr=+cmov,cx16 -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-- -mattr=+cmov,cx16 -verify-machineinstrs | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/atomic-ops-ancient-64.ll b/llvm/test/CodeGen/X86/atomic-ops-ancient-64.ll
index bc99caeea12b6..3348e3a0b96cb 100644
--- a/llvm/test/CodeGen/X86/atomic-ops-ancient-64.ll
+++ b/llvm/test/CodeGen/X86/atomic-ops-ancient-64.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i386-linux-gnu -mcpu=i386 %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -mcpu=i386 %s -o - | FileCheck %s
define i64 @test_add(ptr %addr, i64 %inc) {
; CHECK-LABEL: test_add:
diff --git a/llvm/test/CodeGen/X86/atomic-or.ll b/llvm/test/CodeGen/X86/atomic-or.ll
index 11ab47dd4aad5..d3a7cd4ee78b5 100644
--- a/llvm/test/CodeGen/X86/atomic-or.ll
+++ b/llvm/test/CodeGen/X86/atomic-or.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s
; rdar://9692967
diff --git a/llvm/test/CodeGen/X86/atomic-oversize.ll b/llvm/test/CodeGen/X86/atomic-oversize.ll
index 93213ebc06674..97ad7cac47096 100644
--- a/llvm/test/CodeGen/X86/atomic-oversize.ll
+++ b/llvm/test/CodeGen/X86/atomic-oversize.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64 -mattr=cx16 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -mattr=cx16 < %s | FileCheck %s
; Atomics larger than 128-bit are unsupported, and emit libcalls.
define void @test(ptr %a) nounwind {
diff --git a/llvm/test/CodeGen/X86/atomic-pointer.ll b/llvm/test/CodeGen/X86/atomic-pointer.ll
index 9c2061ef30e31..c03f20eec5f53 100644
--- a/llvm/test/CodeGen/X86/atomic-pointer.ll
+++ b/llvm/test/CodeGen/X86/atomic-pointer.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-none-linux -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-none-linux -verify-machineinstrs | FileCheck %s
define ptr @test_atomic_ptr_load(ptr %a0) {
; CHECK-LABEL: test_atomic_ptr_load:
diff --git a/llvm/test/CodeGen/X86/atomic-rm-bit-test-64.ll b/llvm/test/CodeGen/X86/atomic-rm-bit-test-64.ll
index 3fe5b70edc718..750d54d687a9e 100644
--- a/llvm/test/CodeGen/X86/atomic-rm-bit-test-64.ll
+++ b/llvm/test/CodeGen/X86/atomic-rm-bit-test-64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
define i64 @atomic_shl1_xor_64_gpr_val(ptr %v, i64 %c) nounwind {
; CHECK-LABEL: atomic_shl1_xor_64_gpr_val:
diff --git a/llvm/test/CodeGen/X86/atomic-rm-bit-test.ll b/llvm/test/CodeGen/X86/atomic-rm-bit-test.ll
index 71887e369bd18..db8ca44738dce 100644
--- a/llvm/test/CodeGen/X86/atomic-rm-bit-test.ll
+++ b/llvm/test/CodeGen/X86/atomic-rm-bit-test.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X86
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X64
define zeroext i8 @atomic_shl1_or_8_gpr_val(ptr %v, i8 zeroext %c) nounwind {
; X86-LABEL: atomic_shl1_or_8_gpr_val:
diff --git a/llvm/test/CodeGen/X86/atomic-unaligned.ll b/llvm/test/CodeGen/X86/atomic-unaligned.ll
index f02041cc5fc8f..8aecd9f3939ba 100644
--- a/llvm/test/CodeGen/X86/atomic-unaligned.ll
+++ b/llvm/test/CodeGen/X86/atomic-unaligned.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 < %s | FileCheck %s
; Quick test to ensure that atomics which are not naturally-aligned
; emit unsized libcalls, and aren't emitted as native instructions or
diff --git a/llvm/test/CodeGen/X86/atomic-unordered.ll b/llvm/test/CodeGen/X86/atomic-unordered.ll
index 7946204865ab6..bc88018813b19 100644
--- a/llvm/test/CodeGen/X86/atomic-unordered.ll
+++ b/llvm/test/CodeGen/X86/atomic-unordered.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mcpu=skylake | FileCheck --check-prefixes=CHECK,CHECK-O0 %s
-; RUN: llc -O3 < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mcpu=skylake | FileCheck --check-prefixes=CHECK,CHECK-O3 %s
+; RUN: llc -combiner-topological-sorting -O0 < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mcpu=skylake | FileCheck --check-prefixes=CHECK,CHECK-O0 %s
+; RUN: llc -combiner-topological-sorting -O3 < %s -mtriple=x86_64-linux-generic -verify-machineinstrs -mcpu=skylake | FileCheck --check-prefixes=CHECK,CHECK-O3 %s
define i8 @load_i8(ptr %ptr) {
; CHECK-O0-LABEL: load_i8:
diff --git a/llvm/test/CodeGen/X86/atomic-xor.ll b/llvm/test/CodeGen/X86/atomic-xor.ll
index c648ecdfbe674..b27a653e31384 100644
--- a/llvm/test/CodeGen/X86/atomic-xor.ll
+++ b/llvm/test/CodeGen/X86/atomic-xor.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
define void @xor32_signbit_unused(ptr %p) nounwind {
; X86-LABEL: xor32_signbit_unused:
diff --git a/llvm/test/CodeGen/X86/atomic128.ll b/llvm/test/CodeGen/X86/atomic128.ll
index 8d43c612aa07f..9a76e3516d6d5 100644
--- a/llvm/test/CodeGen/X86/atomic128.ll
+++ b/llvm/test/CodeGen/X86/atomic128.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.9 -verify-machineinstrs -mattr=cx16 | FileCheck %s --check-prefixes=CHECK,CHECK-NOAVX
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.9 -verify-machineinstrs -mattr=cx16,avx | FileCheck %s --check-prefixes=CHECK,CHECK-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.9 -verify-machineinstrs -mattr=cx16 | FileCheck %s --check-prefixes=CHECK,CHECK-NOAVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.9 -verify-machineinstrs -mattr=cx16,avx | FileCheck %s --check-prefixes=CHECK,CHECK-AVX
; Codegen of i128 without cx16 is tested in atomic-nocx16.ll
diff --git a/llvm/test/CodeGen/X86/atomic16.ll b/llvm/test/CodeGen/X86/atomic16.ll
index cb5458e82a212..5f5c5a16f9257 100644
--- a/llvm/test/CodeGen/X86/atomic16.ll
+++ b/llvm/test/CodeGen/X86/atomic16.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mcpu=corei7 -verify-machineinstrs -show-mc-encoding | FileCheck %s --check-prefix X64
-; RUN: llc < %s -O0 -mtriple=i386-unknown-unknown -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mcpu=corei7 -verify-machineinstrs -show-mc-encoding | FileCheck %s --check-prefix X64
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=i386-unknown-unknown -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32
@sc16 = external dso_local global i16
@fsc16 = external dso_local global half
diff --git a/llvm/test/CodeGen/X86/atomic32.ll b/llvm/test/CodeGen/X86/atomic32.ll
index f4666738db7d2..900d38a9fd54b 100644
--- a/llvm/test/CodeGen/X86/atomic32.ll
+++ b/llvm/test/CodeGen/X86/atomic32.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -O0 -mtriple=i686-unknown-unknown -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefixes=X86,X86-CMOV
-; RUN: llc < %s -O0 -mtriple=i686-unknown-unknown -mcpu=corei7 -mattr=-cmov,-sse -verify-machineinstrs | FileCheck %s --check-prefixes=X86,X86-NOCMOV
-; RUN: llc < %s -O0 -mtriple=i686-unknown-unknown -mcpu=corei7 -mattr=-cmov,-sse,-x87 -verify-machineinstrs | FileCheck %s --check-prefixes=X86,X86-NOX87
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=i686-unknown-unknown -mcpu=corei7 -verify-machineinstrs | FileCheck %s -check-prefixes=X86,X86-CMOV
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=i686-unknown-unknown -mcpu=corei7 -mattr=-cmov,-sse -verify-machineinstrs | FileCheck %s --check-prefixes=X86,X86-NOCMOV
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=i686-unknown-unknown -mcpu=corei7 -mattr=-cmov,-sse,-x87 -verify-machineinstrs | FileCheck %s --check-prefixes=X86,X86-NOX87
@sc32 = external dso_local global i32
@fsc32 = external dso_local global float
diff --git a/llvm/test/CodeGen/X86/atomic64.ll b/llvm/test/CodeGen/X86/atomic64.ll
index 8f4da356e06cb..75fea65f28361 100644
--- a/llvm/test/CodeGen/X86/atomic64.ll
+++ b/llvm/test/CodeGen/X86/atomic64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64
-; RUN: llc < %s -O0 -mtriple=i386-- -mcpu=i486 -verify-machineinstrs | FileCheck %s --check-prefix I486
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=i386-- -mcpu=i486 -verify-machineinstrs | FileCheck %s --check-prefix I486
@sc64 = external dso_local global i64
@fsc64 = external dso_local global double
diff --git a/llvm/test/CodeGen/X86/atomic6432.ll b/llvm/test/CodeGen/X86/atomic6432.ll
index 8ff5f338e1482..18a1ad8a31416 100644
--- a/llvm/test/CodeGen/X86/atomic6432.ll
+++ b/llvm/test/CodeGen/X86/atomic6432.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -mtriple=i686-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=i686-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32
@sc64 = external dso_local global i64
diff --git a/llvm/test/CodeGen/X86/atomic8.ll b/llvm/test/CodeGen/X86/atomic8.ll
index bb26c8fe704ac..83a635d6cae52 100644
--- a/llvm/test/CodeGen/X86/atomic8.ll
+++ b/llvm/test/CodeGen/X86/atomic8.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -O0 -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64
-; RUN: llc < %s -O0 -mtriple=i686-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X64
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=i686-- -mcpu=corei7 -verify-machineinstrs | FileCheck %s --check-prefix X32
@sc8 = external dso_local global i8
diff --git a/llvm/test/CodeGen/X86/atomicrmw-cond-sub-clamp.ll b/llvm/test/CodeGen/X86/atomicrmw-cond-sub-clamp.ll
index 3e1a631e39b06..58fab7de6bf32 100644
--- a/llvm/test/CodeGen/X86/atomicrmw-cond-sub-clamp.ll
+++ b/llvm/test/CodeGen/X86/atomicrmw-cond-sub-clamp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple i686-pc-linux < %s | FileCheck %s --check-prefix=CHECK-32
-; RUN: llc -mtriple x86_64-pc-linux < %s | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -combiner-topological-sorting -mtriple i686-pc-linux < %s | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux < %s | FileCheck %s --check-prefix=CHECK-64
define i8 @atomicrmw_usub_cond_i8(ptr %ptr, i8 %val) {
; CHECK-32-LABEL: atomicrmw_usub_cond_i8:
diff --git a/llvm/test/CodeGen/X86/atomicrmw-fadd-fp-vector.ll b/llvm/test/CodeGen/X86/atomicrmw-fadd-fp-vector.ll
index e118f5dbc1534..10eb175e8252c 100644
--- a/llvm/test/CodeGen/X86/atomicrmw-fadd-fp-vector.ll
+++ b/llvm/test/CodeGen/X86/atomicrmw-fadd-fp-vector.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple x86_64-pc-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux < %s | FileCheck %s
define <2 x half> @test_atomicrmw_fadd_v2f16_align4(ptr addrspace(1) %ptr, <2 x half> %value) #0 {
; CHECK-LABEL: test_atomicrmw_fadd_v2f16_align4:
diff --git a/llvm/test/CodeGen/X86/atomicrmw-uinc-udec-wrap.ll b/llvm/test/CodeGen/X86/atomicrmw-uinc-udec-wrap.ll
index f6fc65e3db459..01707626a09d9 100644
--- a/llvm/test/CodeGen/X86/atomicrmw-uinc-udec-wrap.ll
+++ b/llvm/test/CodeGen/X86/atomicrmw-uinc-udec-wrap.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple x86_64-pc-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux < %s | FileCheck %s
define i8 @atomicrmw_uinc_wrap_i8(ptr %ptr, i8 %val) {
; CHECK-LABEL: atomicrmw_uinc_wrap_i8:
diff --git a/llvm/test/CodeGen/X86/attr-dontcall.ll b/llvm/test/CodeGen/X86/attr-dontcall.ll
index 9024280fda027..c9bb9723a995f 100644
--- a/llvm/test/CodeGen/X86/attr-dontcall.ll
+++ b/llvm/test/CodeGen/X86/attr-dontcall.ll
@@ -1,6 +1,6 @@
-; RUN: not llc -mtriple=x86_64 -global-isel=0 -fast-isel=0 -stop-after=finalize-isel < %s 2>&1 | FileCheck %s
-; RUN: not llc -mtriple=x86_64 -global-isel=0 -fast-isel=1 -stop-after=finalize-isel < %s 2>&1 | FileCheck %s
-; RUN: not llc -mtriple=x86_64 -global-isel=1 -fast-isel=0 -global-isel-abort=0 < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64 -global-isel=0 -fast-isel=0 -stop-after=finalize-isel < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64 -global-isel=0 -fast-isel=1 -stop-after=finalize-isel < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64 -global-isel=1 -fast-isel=0 -global-isel-abort=0 < %s 2>&1 | FileCheck %s
declare void @foo() "dontcall-error"="e"
define void @bar() {
diff --git a/llvm/test/CodeGen/X86/attr-function-return.ll b/llvm/test/CodeGen/X86/attr-function-return.ll
index 091a8ea8da3ae..a028895432168 100644
--- a/llvm/test/CodeGen/X86/attr-function-return.ll
+++ b/llvm/test/CodeGen/X86/attr-function-return.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc --mtriple=i386-linux-gnu %s -o - -verify-machineinstrs \
+; RUN: llc -combiner-topological-sorting --mtriple=i386-linux-gnu %s -o - -verify-machineinstrs \
; RUN: | FileCheck %s
-; RUN: llc --mtriple=x86_64-linux-gnu %s -o - -verify-machineinstrs \
+; RUN: llc -combiner-topological-sorting --mtriple=x86_64-linux-gnu %s -o - -verify-machineinstrs \
; RUN: | FileCheck %s
define void @x() fn_ret_thunk_extern {
; CHECK-LABEL: x:
diff --git a/llvm/test/CodeGen/X86/attribute-sections.ll b/llvm/test/CodeGen/X86/attribute-sections.ll
index c1603376f54b1..869ff272adfbe 100644
--- a/llvm/test/CodeGen/X86/attribute-sections.ll
+++ b/llvm/test/CodeGen/X86/attribute-sections.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
declare i32 @foo()
diff --git a/llvm/test/CodeGen/X86/avg-mask.ll b/llvm/test/CodeGen/X86/avg-mask.ll
index b148cd3d42df6..0a7e0a3a84d59 100644
--- a/llvm/test/CodeGen/X86/avg-mask.ll
+++ b/llvm/test/CodeGen/X86/avg-mask.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512BWVL
define <16 x i8> @avg_v16i8_mask(<16 x i8> %a, <16 x i8> %b, <16 x i8> %src, i16 %mask) nounwind {
; AVX512F-LABEL: avg_v16i8_mask:
diff --git a/llvm/test/CodeGen/X86/avgceils-scalar.ll b/llvm/test/CodeGen/X86/avgceils-scalar.ll
index a44c746ad0eda..a63937048e52a 100644
--- a/llvm/test/CodeGen/X86/avgceils-scalar.ll
+++ b/llvm/test/CodeGen/X86/avgceils-scalar.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
;
; fixed avg(x,y) = sub(or(x,y),ashr(xor(x,y),1))
diff --git a/llvm/test/CodeGen/X86/avgceils.ll b/llvm/test/CodeGen/X86/avgceils.ll
index 7b17286ae7570..0418d2df6ca2a 100644
--- a/llvm/test/CodeGen/X86/avgceils.ll
+++ b/llvm/test/CodeGen/X86/avgceils.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE4
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
;
; 128-bit vectors
diff --git a/llvm/test/CodeGen/X86/avgceilu-scalar.ll b/llvm/test/CodeGen/X86/avgceilu-scalar.ll
index 987e0a0188c2d..95936a48a975e 100644
--- a/llvm/test/CodeGen/X86/avgceilu-scalar.ll
+++ b/llvm/test/CodeGen/X86/avgceilu-scalar.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
;
; fixed avg(x,y) = sub(or(x,y),lshr(xor(x,y),1))
diff --git a/llvm/test/CodeGen/X86/avgceilu.ll b/llvm/test/CodeGen/X86/avgceilu.ll
index 23b26e57ce19d..adfe4b3913002 100644
--- a/llvm/test/CodeGen/X86/avgceilu.ll
+++ b/llvm/test/CodeGen/X86/avgceilu.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
;
; 128-bit vectors
diff --git a/llvm/test/CodeGen/X86/avgfloors.ll b/llvm/test/CodeGen/X86/avgfloors.ll
index 9cc55c6f7a81f..d290d44fc33d6 100644
--- a/llvm/test/CodeGen/X86/avgfloors.ll
+++ b/llvm/test/CodeGen/X86/avgfloors.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE4
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
;
; 128-bit vectors
diff --git a/llvm/test/CodeGen/X86/avgflooru-i128.ll b/llvm/test/CodeGen/X86/avgflooru-i128.ll
index 11e886e25ba4e..89a2df9f18f45 100644
--- a/llvm/test/CodeGen/X86/avgflooru-i128.ll
+++ b/llvm/test/CodeGen/X86/avgflooru-i128.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 < %s | FileCheck %s
define i128 @avgflooru_i128(i128 %x, i128 %y) {
; CHECK-LABEL: avgflooru_i128:
diff --git a/llvm/test/CodeGen/X86/avgflooru.ll b/llvm/test/CodeGen/X86/avgflooru.ll
index 82a0796b116ee..19704e4ebd8fe 100644
--- a/llvm/test/CodeGen/X86/avgflooru.ll
+++ b/llvm/test/CodeGen/X86/avgflooru.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE4
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
;
; 128-bit vectors
diff --git a/llvm/test/CodeGen/X86/avoid-lea-scale2.ll b/llvm/test/CodeGen/X86/avoid-lea-scale2.ll
index cee2ee4e03992..b721d11cbd377 100644
--- a/llvm/test/CodeGen/X86/avoid-lea-scale2.ll
+++ b/llvm/test/CodeGen/X86/avoid-lea-scale2.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s
; CHECK: leal -2({{%rdi,%rdi|%rcx,%rcx}})
define i32 @foo(i32 %x) nounwind readnone {
diff --git a/llvm/test/CodeGen/X86/avoid-loop-align-2.ll b/llvm/test/CodeGen/X86/avoid-loop-align-2.ll
index 7e5615fe74314..25f8c7241189e 100644
--- a/llvm/test/CodeGen/X86/avoid-loop-align-2.ll
+++ b/llvm/test/CodeGen/X86/avoid-loop-align-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | grep align | count 4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | grep align | count 4
; TODO: Is it a good idea to align inner loops? It's hard to know without
; knowing what their trip counts are, or other dynamic information. For
diff --git a/llvm/test/CodeGen/X86/avoid-loop-align.ll b/llvm/test/CodeGen/X86/avoid-loop-align.ll
index f10adcaf330d9..aab03d1e4b228 100644
--- a/llvm/test/CodeGen/X86/avoid-loop-align.ll
+++ b/llvm/test/CodeGen/X86/avoid-loop-align.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin | FileCheck %s
; CodeGen should align the top of the loop, which differs from the loop
; header in this case.
diff --git a/llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll b/llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll
index f074390552c48..de01b5d0b5939 100644
--- a/llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll
+++ b/llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=x86-64 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=x86-64 --x86-disable-avoid-SFB -verify-machineinstrs | FileCheck %s --check-prefix=DISABLED
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=core-avx2 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-AVX2
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=skx -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=x86-64 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=x86-64 --x86-disable-avoid-SFB -verify-machineinstrs | FileCheck %s --check-prefix=DISABLED
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=core-avx2 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=skx -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-AVX512
; ModuleID = '../testSFB/testOverlapBlocks.c'
source_filename = "../testSFB/testOverlapBlocks.c"
diff --git a/llvm/test/CodeGen/X86/avx-arith.ll b/llvm/test/CodeGen/X86/avx-arith.ll
index ef9e40fc07870..37753b3e3f3d3 100644
--- a/llvm/test/CodeGen/X86/avx-arith.ll
+++ b/llvm/test/CodeGen/X86/avx-arith.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
define <4 x double> @addpd256(<4 x double> %y, <4 x double> %x) nounwind uwtable readnone ssp {
; CHECK-LABEL: addpd256:
diff --git a/llvm/test/CodeGen/X86/avx-basic.ll b/llvm/test/CodeGen/X86/avx-basic.ll
index b47f424acc942..7db305867b34a 100644
--- a/llvm/test/CodeGen/X86/avx-basic.ll
+++ b/llvm/test/CodeGen/X86/avx-basic.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=avx | FileCheck %s
@x = common global <8 x float> zeroinitializer, align 32
@y = common global <4 x double> zeroinitializer, align 32
diff --git a/llvm/test/CodeGen/X86/avx-bitcast.ll b/llvm/test/CodeGen/X86/avx-bitcast.ll
index 0f18ac3a93120..01f704d0f5dfa 100644
--- a/llvm/test/CodeGen/X86/avx-bitcast.ll
+++ b/llvm/test/CodeGen/X86/avx-bitcast.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
define i64 @bitcasti64tof64() {
; CHECK-LABEL: bitcasti64tof64:
diff --git a/llvm/test/CodeGen/X86/avx-brcond.ll b/llvm/test/CodeGen/X86/avx-brcond.ll
index facaef2a2998a..fcf1c14f23df7 100644
--- a/llvm/test/CodeGen/X86/avx-brcond.ll
+++ b/llvm/test/CodeGen/X86/avx-brcond.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx | FileCheck %s
declare i32 @llvm.x86.avx.ptestz.256(<4 x i64> %p1, <4 x i64> %p2) nounwind
declare i32 @llvm.x86.avx.ptestc.256(<4 x i64> %p1, <4 x i64> %p2) nounwind
diff --git a/llvm/test/CodeGen/X86/avx-cast.ll b/llvm/test/CodeGen/X86/avx-cast.ll
index e1058a855d4c7..1d95c9dafb95b 100644
--- a/llvm/test/CodeGen/X86/avx-cast.ll
+++ b/llvm/test/CodeGen/X86/avx-cast.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=AVX
; Prefer a blend instruction to a vinsert128 instruction because blends
; are simpler (no lane changes) and therefore will have equal or better
diff --git a/llvm/test/CodeGen/X86/avx-cmp.ll b/llvm/test/CodeGen/X86/avx-cmp.ll
index 3ced4f71bad8c..2b591e30650f9 100644
--- a/llvm/test/CodeGen/X86/avx-cmp.ll
+++ b/llvm/test/CodeGen/X86/avx-cmp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
define <8 x i32> @cmp00(<8 x float> %a, <8 x float> %b) nounwind {
; CHECK-LABEL: cmp00:
diff --git a/llvm/test/CodeGen/X86/avx-cvt-2.ll b/llvm/test/CodeGen/X86/avx-cvt-2.ll
index 0dab7c3544a22..eea981bcc5575 100644
--- a/llvm/test/CodeGen/X86/avx-cvt-2.ll
+++ b/llvm/test/CodeGen/X86/avx-cvt-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
; Check that we generate vector conversion from float to narrower int types
diff --git a/llvm/test/CodeGen/X86/avx-cvt-3.ll b/llvm/test/CodeGen/X86/avx-cvt-3.ll
index 760db4af1f1b4..9d7bbdbf1707d 100644
--- a/llvm/test/CodeGen/X86/avx-cvt-3.ll
+++ b/llvm/test/CodeGen/X86/avx-cvt-3.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=X64
; Insertion/shuffles of all-zero/all-bits/constants into v8i32->v8f32 sitofp conversion.
diff --git a/llvm/test/CodeGen/X86/avx-cvt.ll b/llvm/test/CodeGen/X86/avx-cvt.ll
index fb30044512fa5..28b485b908071 100644
--- a/llvm/test/CodeGen/X86/avx-cvt.ll
+++ b/llvm/test/CodeGen/X86/avx-cvt.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512
define <8 x float> @sitofp00(<8 x i32> %a) nounwind {
; CHECK-LABEL: sitofp00:
diff --git a/llvm/test/CodeGen/X86/avx-cvttp2si.ll b/llvm/test/CodeGen/X86/avx-cvttp2si.ll
index e177563ae14f0..bd357a59bca1e 100644
--- a/llvm/test/CodeGen/X86/avx-cvttp2si.ll
+++ b/llvm/test/CodeGen/X86/avx-cvttp2si.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512f,avx512vl | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx512f,avx512vl | FileCheck %s --check-prefix=AVX
; PR37751 - https://bugs.llvm.org/show_bug.cgi?id=37751
; We can't combine into 'round' instructions because the behavior is different for out-of-range values.
diff --git a/llvm/test/CodeGen/X86/avx-fp2int.ll b/llvm/test/CodeGen/X86/avx-fp2int.ll
index 195b6f660e927..577ac5b04fcaf 100644
--- a/llvm/test/CodeGen/X86/avx-fp2int.ll
+++ b/llvm/test/CodeGen/X86/avx-fp2int.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10 -mcpu=corei7-avx -mattr=+avx | FileCheck %s
;; Check that FP_TO_SINT and FP_TO_UINT generate convert with truncate
diff --git a/llvm/test/CodeGen/X86/avx-gfni-intrinsics.ll b/llvm/test/CodeGen/X86/avx-gfni-intrinsics.ll
index a59cfcccad247..22cdc7fc3141d 100644
--- a/llvm/test/CodeGen/X86/avx-gfni-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx-gfni-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+gfni,+avx -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+gfni,+avx -show-mc-encoding | FileCheck %s
declare <16 x i8> @llvm.x86.vgf2p8affineinvqb.128(<16 x i8>, <16 x i8>, i8)
define <16 x i8> @test_vgf2p8affineinvqb_128(<16 x i8> %src1, <16 x i8> %src2) {
diff --git a/llvm/test/CodeGen/X86/avx-ifma-intrinsics.ll b/llvm/test/CodeGen/X86/avx-ifma-intrinsics.ll
index f2f1d9d910356..263db37fdf70d 100644
--- a/llvm/test/CodeGen/X86/avx-ifma-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx-ifma-intrinsics.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avxifma --show-mc-encoding | FileCheck %s --check-prefix=AVXIFMA
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avxifma --show-mc-encoding | FileCheck %s --check-prefix=AVXIFMA
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avxifma,+avx512ifma,+avx512vl --show-mc-encoding | FileCheck %s --check-prefix=AVX512IFMA
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avxifma,+avx512ifma,+avx512vl --show-mc-encoding | FileCheck %s --check-prefix=AVX512IFMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avxifma --show-mc-encoding | FileCheck %s --check-prefix=AVXIFMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avxifma --show-mc-encoding | FileCheck %s --check-prefix=AVXIFMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avxifma,+avx512ifma,+avx512vl --show-mc-encoding | FileCheck %s --check-prefix=AVX512IFMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avxifma,+avx512ifma,+avx512vl --show-mc-encoding | FileCheck %s --check-prefix=AVX512IFMA
declare <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64>, <2 x i64>, <2 x i64>)
diff --git a/llvm/test/CodeGen/X86/avx-insertelt.ll b/llvm/test/CodeGen/X86/avx-insertelt.ll
index f8feceb0404b5..21e929b53e713 100644
--- a/llvm/test/CodeGen/X86/avx-insertelt.ll
+++ b/llvm/test/CodeGen/X86/avx-insertelt.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX2
; 0'th element insertion into an AVX register.
diff --git a/llvm/test/CodeGen/X86/avx-intel-ocl.ll b/llvm/test/CodeGen/X86/avx-intel-ocl.ll
index 5a299d594b469..32424640ac8e0 100644
--- a/llvm/test/CodeGen/X86/avx-intel-ocl.ll
+++ b/llvm/test/CodeGen/X86/avx-intel-ocl.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -mtriple=i386-pc-win32 -mattr=+avx | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+avx | FileCheck -check-prefix=WIN64 %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck -check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+avx | FileCheck -check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-win32 -mattr=+avx | FileCheck -check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mattr=+avx | FileCheck -check-prefix=WIN64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck -check-prefix=X64 %s
declare <16 x float> @func_float16_ptr(<16 x float>, ptr)
declare <16 x float> @func_float16(<16 x float>, <16 x float>)
diff --git a/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
index 7d0a5679936da..601001f586cc5 100644
--- a/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=avx,aes,pclmul | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=avx,aes,pclmul | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=avx,aes,pclmul | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=avx,aes,pclmul | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx-intrinsics-x86-upgrade.ll b/llvm/test/CodeGen/X86/avx-intrinsics-x86-upgrade.ll
index 46f67a8912d4a..63c0519f08448 100644
--- a/llvm/test/CodeGen/X86/avx-intrinsics-x86-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx-intrinsics-x86-upgrade.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,X86-AVX
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX512VL,X86-AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,X64-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX512VL,X64-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX512VL,X86-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX512VL,X64-AVX512VL
; We don't check any vinsertf128 variant with immediate 0 because that's just a blend.
diff --git a/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll b/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll
index f0e8987bd6b2d..b84d3d0ed26e2 100644
--- a/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll
+++ b/llvm/test/CodeGen/X86/avx-intrinsics-x86.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+pclmul,+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86,AVX,X86-AVX
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+pclmul,+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86,AVX512VL,X86-AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+pclmul,+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64,AVX,X64-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+pclmul,+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64,AVX512VL,X64-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+pclmul,+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86,AVX,X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+pclmul,+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86,AVX512VL,X86-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+pclmul,+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64,AVX,X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+pclmul,+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64,AVX512VL,X64-AVX512VL
define <4 x double> @test_x86_avx_addsub_pd_256(<4 x double> %a0, <4 x double> %a1) {
; CHECK-LABEL: test_x86_avx_addsub_pd_256:
diff --git a/llvm/test/CodeGen/X86/avx-intrinsics-x86_64.ll b/llvm/test/CodeGen/X86/avx-intrinsics-x86_64.ll
index ea010ebc28a43..28df08cc22ae1 100644
--- a/llvm/test/CodeGen/X86/avx-intrinsics-x86_64.ll
+++ b/llvm/test/CodeGen/X86/avx-intrinsics-x86_64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512VL
define <4 x double> @test_x86_avx_vzeroall(<4 x double> %a, <4 x double> %b) {
; AVX-LABEL: test_x86_avx_vzeroall:
diff --git a/llvm/test/CodeGen/X86/avx-isa-check.ll b/llvm/test/CodeGen/X86/avx-isa-check.ll
index c82a37781ab05..df5504cc97a32 100644
--- a/llvm/test/CodeGen/X86/avx-isa-check.ll
+++ b/llvm/test/CodeGen/X86/avx-isa-check.ll
@@ -1,12 +1,12 @@
; check AVX2 instructions that are disabled in case avx512VL/avx512BW present
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mcpu=corei7-avx -o /dev/null
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mcpu=core-avx2 -mattr=+avx2 -o /dev/null
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mcpu=knl -o /dev/null
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mcpu=knl -mattr=+avx512vl -o /dev/null
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mcpu=knl -mattr=+avx512bw -o /dev/null
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mcpu=knl -mattr=+avx512vl -mattr=+avx512bw -o /dev/null
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mcpu=skx -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mcpu=corei7-avx -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mcpu=core-avx2 -mattr=+avx2 -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mcpu=knl -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mcpu=knl -mattr=+avx512vl -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mcpu=knl -mattr=+avx512bw -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mcpu=knl -mattr=+avx512vl -mattr=+avx512bw -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -show-mc-encoding -mcpu=skx -o /dev/null
define <4 x i64> @vpand_256(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
; Force the execution domain with an add.
diff --git a/llvm/test/CodeGen/X86/avx-load-store.ll b/llvm/test/CodeGen/X86/avx-load-store.ll
index cc2cedb6b8b20..aeef92abdded3 100644
--- a/llvm/test/CodeGen/X86/avx-load-store.ll
+++ b/llvm/test/CodeGen/X86/avx-load-store.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx,slow-unaligned-mem-32 | FileCheck %s
-; RUN: llc -O0 < %s -mtriple=x86_64-unknown-unknown -mattr=avx,slow-unaligned-mem-32 | FileCheck %s -check-prefix=CHECK_O0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx,slow-unaligned-mem-32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 < %s -mtriple=x86_64-unknown-unknown -mattr=avx,slow-unaligned-mem-32 | FileCheck %s -check-prefix=CHECK_O0
define void @test_256_load(ptr nocapture %d, ptr nocapture %f, ptr nocapture %i) nounwind {
; CHECK-LABEL: test_256_load:
diff --git a/llvm/test/CodeGen/X86/avx-minmax.ll b/llvm/test/CodeGen/X86/avx-minmax.ll
index 58b36ba0e4ac5..2a04d51515ba4 100644
--- a/llvm/test/CodeGen/X86/avx-minmax.ll
+++ b/llvm/test/CodeGen/X86/avx-minmax.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s
define <2 x double> @maxpd(<2 x double> %x, <2 x double> %y) {
; CHECK-LABEL: maxpd:
diff --git a/llvm/test/CodeGen/X86/avx-select.ll b/llvm/test/CodeGen/X86/avx-select.ll
index 1b688c8cf9cca..ecc47e8c8cd4d 100644
--- a/llvm/test/CodeGen/X86/avx-select.ll
+++ b/llvm/test/CodeGen/X86/avx-select.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
define <8 x i32> @select00(i32 %a, <8 x i32> %b) nounwind {
; X86-LABEL: select00:
diff --git a/llvm/test/CodeGen/X86/avx-shift.ll b/llvm/test/CodeGen/X86/avx-shift.ll
index 3bce84348b7f0..ef46c52973961 100644
--- a/llvm/test/CodeGen/X86/avx-shift.ll
+++ b/llvm/test/CodeGen/X86/avx-shift.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
;;; Shift left
define <8 x i32> @vshift00(<8 x i32> %a) {
diff --git a/llvm/test/CodeGen/X86/avx-shuffle-x86_32.ll b/llvm/test/CodeGen/X86/avx-shuffle-x86_32.ll
index edc92abff045a..414c8a4e06232 100644
--- a/llvm/test/CodeGen/X86/avx-shuffle-x86_32.ll
+++ b/llvm/test/CodeGen/X86/avx-shuffle-x86_32.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s
; Avoid unnecessary vinsertf128
define <4 x i64> @test1(<4 x i64> %a) nounwind {
diff --git a/llvm/test/CodeGen/X86/avx-splat.ll b/llvm/test/CodeGen/X86/avx-splat.ll
index 15c2aab1a82e1..882b452032638 100644
--- a/llvm/test/CodeGen/X86/avx-splat.ll
+++ b/llvm/test/CodeGen/X86/avx-splat.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_mem_shuffle
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X64
define <32 x i8> @funcA(<32 x i8> %a) nounwind uwtable readnone ssp {
; CHECK-LABEL: funcA:
diff --git a/llvm/test/CodeGen/X86/avx-trunc.ll b/llvm/test/CodeGen/X86/avx-trunc.ll
index bf9f9e841c947..9462341f3e1de 100644
--- a/llvm/test/CodeGen/X86/avx-trunc.ll
+++ b/llvm/test/CodeGen/X86/avx-trunc.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
define <4 x i32> @trunc_64_32(<4 x i64> %A) nounwind uwtable readnone ssp{
; CHECK-LABEL: trunc_64_32:
diff --git a/llvm/test/CodeGen/X86/avx-unpack.ll b/llvm/test/CodeGen/X86/avx-unpack.ll
index 14401266c251b..3cd03a6332e64 100644
--- a/llvm/test/CodeGen/X86/avx-unpack.ll
+++ b/llvm/test/CodeGen/X86/avx-unpack.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
define <8 x float> @unpackhips(<8 x float> %src1, <8 x float> %src2) nounwind uwtable readnone ssp {
; CHECK-LABEL: unpackhips:
diff --git a/llvm/test/CodeGen/X86/avx-varargs-x86_64.ll b/llvm/test/CodeGen/X86/avx-varargs-x86_64.ll
index 90bb18733a9b6..120823c19d5e6 100644
--- a/llvm/test/CodeGen/X86/avx-varargs-x86_64.ll
+++ b/llvm/test/CodeGen/X86/avx-varargs-x86_64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -mattr=+avx | FileCheck %s
; <rdar://problem/10463281>
; Check that the <8 x float> is passed on the stack.
diff --git a/llvm/test/CodeGen/X86/avx-vbroadcastf128.ll b/llvm/test/CodeGen/X86/avx-vbroadcastf128.ll
index 9434bc22d9976..769404984579b 100644
--- a/llvm/test/CodeGen/X86/avx-vbroadcastf128.ll
+++ b/llvm/test/CodeGen/X86/avx-vbroadcastf128.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
define <4 x double> @test_broadcast_2f64_4f64(ptr%p) nounwind {
; X86-LABEL: test_broadcast_2f64_4f64:
diff --git a/llvm/test/CodeGen/X86/avx-vextractf128.ll b/llvm/test/CodeGen/X86/avx-vextractf128.ll
index edae933072f4d..ac89368cdbffc 100644
--- a/llvm/test/CodeGen/X86/avx-vextractf128.ll
+++ b/llvm/test/CodeGen/X86/avx-vextractf128.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s
define <8 x float> @A(<8 x float> %a) nounwind uwtable readnone ssp {
; CHECK-LABEL: A:
diff --git a/llvm/test/CodeGen/X86/avx-vinsertf128.ll b/llvm/test/CodeGen/X86/avx-vinsertf128.ll
index 9a52ef3293d2e..fcf3c81e39127 100644
--- a/llvm/test/CodeGen/X86/avx-vinsertf128.ll
+++ b/llvm/test/CodeGen/X86/avx-vinsertf128.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
define <8 x float> @A(<8 x float> %a) nounwind uwtable readnone ssp {
; CHECK-LABEL: A:
diff --git a/llvm/test/CodeGen/X86/avx-vpclmulqdq.ll b/llvm/test/CodeGen/X86/avx-vpclmulqdq.ll
index 4c791e0807f92..e58fb93ea4eb8 100644
--- a/llvm/test/CodeGen/X86/avx-vpclmulqdq.ll
+++ b/llvm/test/CodeGen/X86/avx-vpclmulqdq.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx,vpclmulqdq -show-mc-encoding | FileCheck %s --check-prefix=AVX_VPCLMULQDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx,vpclmulqdq -show-mc-encoding | FileCheck %s --check-prefix=AVX_VPCLMULQDQ
; Check for vpclmulqdq
define <4 x i64> @test_x86_pclmulqdq(<4 x i64> %a0, <4 x i64> %a1) {
diff --git a/llvm/test/CodeGen/X86/avx-vperm2x128.ll b/llvm/test/CodeGen/X86/avx-vperm2x128.ll
index a3d4b876ed3c4..e7227dbed47a1 100644
--- a/llvm/test/CodeGen/X86/avx-vperm2x128.ll
+++ b/llvm/test/CodeGen/X86/avx-vperm2x128.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_mem_shuffle
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -disable-peephole | FileCheck %s --check-prefixes=ALL,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 -disable-peephole | FileCheck %s --check-prefixes=ALL,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -disable-peephole | FileCheck %s --check-prefixes=ALL,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 -disable-peephole | FileCheck %s --check-prefixes=ALL,AVX2
define <8 x float> @shuffle_v8f32_45670123(<8 x float> %a, <8 x float> %b) nounwind uwtable readnone ssp {
; AVX1-LABEL: shuffle_v8f32_45670123:
diff --git a/llvm/test/CodeGen/X86/avx-vzeroupper.ll b/llvm/test/CodeGen/X86/avx-vzeroupper.ll
index b84b0c2c5cc30..fdc2f800f8960 100644
--- a/llvm/test/CodeGen/X86/avx-vzeroupper.ll
+++ b/llvm/test/CodeGen/X86/avx-vzeroupper.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,VZ
-; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=ALL,VZ
-; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mattr=+avx,-vzeroupper | FileCheck %s --check-prefixes=ALL,DISABLE-VZ
-; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mcpu=bdver2 | FileCheck %s --check-prefixes=ALL,BDVER2
-; RUN: llc < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mcpu=btver2 | FileCheck %s --check-prefixes=ALL,BTVER2
+; RUN: llc -combiner-topological-sorting < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,VZ
+; RUN: llc -combiner-topological-sorting < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=ALL,VZ
+; RUN: llc -combiner-topological-sorting < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mattr=+avx,-vzeroupper | FileCheck %s --check-prefixes=ALL,DISABLE-VZ
+; RUN: llc -combiner-topological-sorting < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mcpu=bdver2 | FileCheck %s --check-prefixes=ALL,BDVER2
+; RUN: llc -combiner-topological-sorting < %s -x86-use-vzeroupper -mtriple=x86_64-unknown-unknown -mcpu=btver2 | FileCheck %s --check-prefixes=ALL,BTVER2
declare dso_local i32 @foo()
declare dso_local <4 x float> @do_sse(<4 x float>)
diff --git a/llvm/test/CodeGen/X86/avx-win64-args.ll b/llvm/test/CodeGen/X86/avx-win64-args.ll
index 85b2634a532b3..7dbeb75b365af 100644
--- a/llvm/test/CodeGen/X86/avx-win64-args.ll
+++ b/llvm/test/CodeGen/X86/avx-win64-args.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=corei7-avx -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=corei7-avx -mattr=+avx | FileCheck %s
target triple = "x86_64-pc-win32"
declare <8 x float> @foo(<8 x float>, i32)
diff --git a/llvm/test/CodeGen/X86/avx-win64.ll b/llvm/test/CodeGen/X86/avx-win64.ll
index 239242eb78678..65764b5dba4c7 100644
--- a/llvm/test/CodeGen/X86/avx-win64.ll
+++ b/llvm/test/CodeGen/X86/avx-win64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=corei7-avx -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=corei7-avx -mattr=+avx | FileCheck %s
; PR11862
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-pc-win32"
diff --git a/llvm/test/CodeGen/X86/avx.ll b/llvm/test/CodeGen/X86/avx.ll
index 4ce092c099b08..20fb26d1ff227 100644
--- a/llvm/test/CodeGen/X86/avx.ll
+++ b/llvm/test/CodeGen/X86/avx.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_mem_shuffle
-; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=corei7-avx | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mcpu=corei7-avx | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck %s --check-prefixes=CHECK,X64
define <4 x i32> @blendvb_fallback_v4i32(<4 x i1> %mask, <4 x i32> %x, <4 x i32> %y) {
; CHECK-LABEL: blendvb_fallback_v4i32:
diff --git a/llvm/test/CodeGen/X86/avx10.2-fma-commute.ll b/llvm/test/CodeGen/X86/avx10.2-fma-commute.ll
index b43b1f7b9c32b..13a05950a0d2f 100644
--- a/llvm/test/CodeGen/X86/avx10.2-fma-commute.ll
+++ b/llvm/test/CodeGen/X86/avx10.2-fma-commute.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s --mtriple=x86_64-unknown-unknown -mattr=avx10.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s --mtriple=x86_64-unknown-unknown -mattr=avx10.2 | FileCheck %s
define <8 x bfloat> @fma_123_v8bf16(<8 x bfloat> %x, <8 x bfloat> %y, <8 x bfloat> %z) {
; CHECK-LABEL: fma_123_v8bf16:
diff --git a/llvm/test/CodeGen/X86/avx10.2-intrinsic-upgrade.ll b/llvm/test/CodeGen/X86/avx10.2-intrinsic-upgrade.ll
index 860d60ff0d4e1..3076d991870c3 100644
--- a/llvm/test/CodeGen/X86/avx10.2-intrinsic-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx10.2-intrinsic-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=X64
declare <16 x i32> @llvm.x86.avx10.vpdpbssd.512(<16 x i32>, <16 x i32>, <16 x i32>)
diff --git a/llvm/test/CodeGen/X86/avx10_2-cmp.ll b/llvm/test/CodeGen/X86/avx10_2-cmp.ll
index 8117345d9de04..bdb993ffc91fe 100644
--- a/llvm/test/CodeGen/X86/avx10_2-cmp.ll
+++ b/llvm/test/CodeGen/X86/avx10_2-cmp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx10.2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+avx10.2 | FileCheck %s --check-prefix=X86
define i1 @hoeq(half %x, half %y) {
; X64-LABEL: hoeq:
diff --git a/llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll b/llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll
index d9b4635042256..e205307aad43e 100644
--- a/llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll
+++ b/llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
define <32 x bfloat> @test_int_x86_avx10_vaddbf16512(<32 x bfloat> %x1, <32 x bfloat> %x2) {
; CHECK-LABEL: test_int_x86_avx10_vaddbf16512:
diff --git a/llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll
index 9225bd88b0896..0964ade8542c8 100644
--- a/llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
declare <32 x bfloat> @llvm.x86.avx10.vminbf16512(<32 x bfloat>, <32 x bfloat>)
diff --git a/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
index cc87ae0aad1f5..27662cae7b3b7 100644
--- a/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2_512convert-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
define <32 x half> @test_int_x86_avx10_vcvt2ps2phx512(<16 x float> %A, <16 x float> %B) {
; CHECK-LABEL: test_int_x86_avx10_vcvt2ps2phx512:
diff --git a/llvm/test/CodeGen/X86/avx10_2_512fptosi_satcvtds.ll b/llvm/test/CodeGen/X86/avx10_2_512fptosi_satcvtds.ll
index 827570e7311c7..96b7b34b185a1 100644
--- a/llvm/test/CodeGen/X86/avx10_2_512fptosi_satcvtds.ll
+++ b/llvm/test/CodeGen/X86/avx10_2_512fptosi_satcvtds.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
; VCVTTPD2DQS
define <8 x i24> @test_signed_v8i24_v8f64(<8 x double> %f) nounwind {
diff --git a/llvm/test/CodeGen/X86/avx10_2_512minmax-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2_512minmax-intrinsics.ll
index c27ee1680dea3..47ca78b093a80 100644
--- a/llvm/test/CodeGen/X86/avx10_2_512minmax-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2_512minmax-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=X86
define <32 x bfloat> @test_int_x86_avx10_vminmaxbf16512(<32 x bfloat> %A, <32 x bfloat> %B) nounwind {
; X64-LABEL: test_int_x86_avx10_vminmaxbf16512:
diff --git a/llvm/test/CodeGen/X86/avx10_2_512ni-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2_512ni-intrinsics.ll
index e9c6cb6a19ba4..a51162f19767b 100644
--- a/llvm/test/CodeGen/X86/avx10_2_512ni-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2_512ni-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
; VNNI FP16
diff --git a/llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
index 2e69b41d282b5..f69af67ef5792 100644
--- a/llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2_512satcvt-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64 --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686 --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64 --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686 --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
define dso_local <8 x i64> @test_mm512_ipcvtbf16_epi8(<32 x bfloat> noundef %__A) {
; CHECK-LABEL: test_mm512_ipcvtbf16_epi8:
diff --git a/llvm/test/CodeGen/X86/avx10_2_512satcvtds-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2_512satcvtds-intrinsics.ll
index 591349aabef45..226abbb29cea9 100644
--- a/llvm/test/CodeGen/X86/avx10_2_512satcvtds-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2_512satcvtds-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
define <8 x i32> @test_int_x86_mask_vcvtt_pd2dqs_512(<8 x double> %x0, <8 x i32> %src, i8 %mask) {
diff --git a/llvm/test/CodeGen/X86/avx10_2bf16-arith.ll b/llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
index 01b7618753a23..c70c19e9464d6 100644
--- a/llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
+++ b/llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
define <16 x bfloat> @test_int_x86_avx10_add_bf16_256(<16 x bfloat> %x1, <16 x bfloat> %x2) {
; CHECK-LABEL: test_int_x86_avx10_add_bf16_256:
diff --git a/llvm/test/CodeGen/X86/avx10_2bf16-fma.ll b/llvm/test/CodeGen/X86/avx10_2bf16-fma.ll
index d79f0cc79b5f4..13b348dec3c39 100644
--- a/llvm/test/CodeGen/X86/avx10_2bf16-fma.ll
+++ b/llvm/test/CodeGen/X86/avx10_2bf16-fma.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 | FileCheck %s --check-prefixes=AVX10_2
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16,+avx512vl | FileCheck %s --check-prefixes=AVX512BF16
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+avxneconvert | FileCheck %s --check-prefixes=AVXNECONVERT
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 | FileCheck %s --check-prefixes=AVX10_2
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16,+avx512vl | FileCheck %s --check-prefixes=AVX512BF16
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+avxneconvert | FileCheck %s --check-prefixes=AVXNECONVERT
define bfloat @fuse_bf16(bfloat %a, bfloat %b, bfloat %c) nounwind {
; AVX10_2-LABEL: fuse_bf16:
diff --git a/llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
index 3efc8cc3d1290..348f1add24368 100644
--- a/llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
declare <16 x bfloat> @llvm.x86.avx10.vminbf16256(<16 x bfloat>, <16 x bfloat>)
diff --git a/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
index 04c93eb1ee6d0..9ae208a5c86d1 100644
--- a/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2convert-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
define <8 x half> @test_int_x86_avx10_vcvt2ps2phx128(<4 x float> %A, <4 x float> %B) {
; CHECK-LABEL: test_int_x86_avx10_vcvt2ps2phx128:
diff --git a/llvm/test/CodeGen/X86/avx10_2fptosi_satcvtds.ll b/llvm/test/CodeGen/X86/avx10_2fptosi_satcvtds.ll
index 3d79457eb2a8a..6e83a1c28f4b2 100644
--- a/llvm/test/CodeGen/X86/avx10_2fptosi_satcvtds.ll
+++ b/llvm/test/CodeGen/X86/avx10_2fptosi_satcvtds.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
;
; 32-bit float to signed integer
diff --git a/llvm/test/CodeGen/X86/avx10_2minmax-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2minmax-intrinsics.ll
index 9c4c4b78df641..22355f0f829b1 100644
--- a/llvm/test/CodeGen/X86/avx10_2minmax-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2minmax-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=X86
define <8 x bfloat> @test_int_x86_avx10_vminmaxbf16128(<8 x bfloat> %A, <8 x bfloat> %B) nounwind {
; X64-LABEL: test_int_x86_avx10_vminmaxbf16128:
diff --git a/llvm/test/CodeGen/X86/avx10_2ni-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2ni-intrinsics.ll
index bf7f9375570f9..708a94718e5a7 100644
--- a/llvm/test/CodeGen/X86/avx10_2ni-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2ni-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
; VNNI FP16
diff --git a/llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
index 094637270503d..23b0313d7a137 100644
--- a/llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2satcvt-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64 --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686 --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64 --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686 --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
define dso_local <2 x i64> @test_mm_ipcvtbf16_epi8(<8 x bfloat> noundef %__A) {
; CHECK-LABEL: test_mm_ipcvtbf16_epi8:
diff --git a/llvm/test/CodeGen/X86/avx10_2satcvtds-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2satcvtds-intrinsics.ll
index 00db1fb07c78d..80c64999f4a3c 100644
--- a/llvm/test/CodeGen/X86/avx10_2satcvtds-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2satcvtds-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=CHECK,X86
define i32 @test_x86_avx512_vcvttsd2usis(<2 x double> %a0) {
; CHECK-LABEL: test_x86_avx512_vcvttsd2usis:
diff --git a/llvm/test/CodeGen/X86/avx10_2satcvtds-x64-intrinsics.ll b/llvm/test/CodeGen/X86/avx10_2satcvtds-x64-intrinsics.ll
index c853da5d2168b..82b7d2aa60ccf 100644
--- a/llvm/test/CodeGen/X86/avx10_2satcvtds-x64-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx10_2satcvtds-x64-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s
define i64 @test_x86_avx512_vcvttsd2si64(<2 x double> %a0) {
; CHECK-LABEL: test_x86_avx512_vcvttsd2si64:
diff --git a/llvm/test/CodeGen/X86/avx2-arith.ll b/llvm/test/CodeGen/X86/avx2-arith.ll
index d21df472f06cb..02ff5f63bc54b 100644
--- a/llvm/test/CodeGen/X86/avx2-arith.ll
+++ b/llvm/test/CodeGen/X86/avx2-arith.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64
define <4 x i64> @test_vpaddq(<4 x i64> %i, <4 x i64> %j) nounwind readnone {
; CHECK-LABEL: test_vpaddq:
diff --git a/llvm/test/CodeGen/X86/avx2-cmp.ll b/llvm/test/CodeGen/X86/avx2-cmp.ll
index 04b673ca5afc8..fbe083addb90e 100644
--- a/llvm/test/CodeGen/X86/avx2-cmp.ll
+++ b/llvm/test/CodeGen/X86/avx2-cmp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64
define <8 x i32> @v8i32_cmpgt(<8 x i32> %i, <8 x i32> %j) nounwind readnone {
; CHECK-LABEL: v8i32_cmpgt:
diff --git a/llvm/test/CodeGen/X86/avx2-conversions.ll b/llvm/test/CodeGen/X86/avx2-conversions.ll
index 7b35e602cc0fa..cb89112f7a0f3 100644
--- a/llvm/test/CodeGen/X86/avx2-conversions.ll
+++ b/llvm/test/CodeGen/X86/avx2-conversions.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86,X86-SLOW
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X86,X86-FAST-ALL
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X86,X86-FAST-PERLANE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64,X64-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X64,X64-FAST-ALL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X64,X64-FAST-PERLANE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86,X86-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X86,X86-FAST-ALL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X86,X86-FAST-PERLANE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64,X64-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X64,X64-FAST-ALL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X64,X64-FAST-PERLANE
define <4 x i32> @trunc4(<4 x i64> %A) nounwind {
; X86-SLOW-LABEL: trunc4:
diff --git a/llvm/test/CodeGen/X86/avx2-gather.ll b/llvm/test/CodeGen/X86/avx2-gather.ll
index 4b77edefa820d..55069670c772d 100644
--- a/llvm/test/CodeGen/X86/avx2-gather.ll
+++ b/llvm/test/CodeGen/X86/avx2-gather.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64
declare <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float>, ptr,
<4 x i32>, <4 x float>, i8) nounwind readonly
diff --git a/llvm/test/CodeGen/X86/avx2-intrinsics-canonical.ll b/llvm/test/CodeGen/X86/avx2-intrinsics-canonical.ll
index 1d7f7ac1aab9e..c6283ed02897a 100644
--- a/llvm/test/CodeGen/X86/avx2-intrinsics-canonical.ll
+++ b/llvm/test/CodeGen/X86/avx2-intrinsics-canonical.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=avx2 -show-mc-encoding | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq -show-mc-encoding | FileCheck %s --check-prefix=AVX512VL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx2 -show-mc-encoding | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq -show-mc-encoding | FileCheck %s --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=avx2 -show-mc-encoding | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq -show-mc-encoding | FileCheck %s --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=avx2 -show-mc-encoding | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq -show-mc-encoding | FileCheck %s --check-prefix=AVX512VL
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse2-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll b/llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
index 6b994b0782e6f..9094018dbd61a 100644
--- a/llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
+++ b/llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=avx2 -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX2 --check-prefix=X86 --check-prefix=X86-AVX
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VL --check-prefix=X86 --check-prefix=X86-AVX512VL
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx2 -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX2 --check-prefix=X64 --check-prefix=X64-AVX
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VL --check-prefix=X64 --check-prefix=X64-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=avx2 -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX2 --check-prefix=X86 --check-prefix=X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VL --check-prefix=X86 --check-prefix=X86-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx2 -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX2 --check-prefix=X64 --check-prefix=X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq -show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VL --check-prefix=X64 --check-prefix=X64-AVX512VL
define <16 x i16> @test_x86_avx2_packssdw(<8 x i32> %a0, <8 x i32> %a1) {
; AVX2-LABEL: test_x86_avx2_packssdw:
diff --git a/llvm/test/CodeGen/X86/avx2-logic.ll b/llvm/test/CodeGen/X86/avx2-logic.ll
index df49fbc6790f4..bfab328567a6b 100644
--- a/llvm/test/CodeGen/X86/avx2-logic.ll
+++ b/llvm/test/CodeGen/X86/avx2-logic.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64
define <4 x i64> @vpandn(<4 x i64> %a, <4 x i64> %b) nounwind uwtable readnone ssp {
; CHECK-LABEL: vpandn:
diff --git a/llvm/test/CodeGen/X86/avx2-masked-gather.ll b/llvm/test/CodeGen/X86/avx2-masked-gather.ll
index 2429536bdb15f..ac66ac01ff87e 100644
--- a/llvm/test/CodeGen/X86/avx2-masked-gather.ll
+++ b/llvm/test/CodeGen/X86/avx2-masked-gather.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=skylake -mtriple=i386-unknown-linux-gnu -mattr=+avx2 | FileCheck --check-prefix=X86 %s
-; RUN: llc < %s -mcpu=skylake -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck --check-prefix=X64 %s
-; RUN: llc < %s -mcpu=skx -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2,-avx512f | FileCheck --check-prefix=X64 %s
-; RUN: llc < %s -mcpu=skylake -mtriple=x86_64-unknown-linux-gnu -mattr=-avx2 | FileCheck --check-prefix=NOGATHER %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=skylake -mtriple=i386-unknown-linux-gnu -mattr=+avx2 | FileCheck --check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=skylake -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck --check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=skx -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2,-avx512f | FileCheck --check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=skylake -mtriple=x86_64-unknown-linux-gnu -mattr=-avx2 | FileCheck --check-prefix=NOGATHER %s
declare <2 x i32> @llvm.masked.gather.v2i32(<2 x ptr> %ptrs, i32 %align, <2 x i1> %masks, <2 x i32> %passthro)
diff --git a/llvm/test/CodeGen/X86/avx2-nontemporal.ll b/llvm/test/CodeGen/X86/avx2-nontemporal.ll
index cd16b30184482..f448f24d7a750 100644
--- a/llvm/test/CodeGen/X86/avx2-nontemporal.ll
+++ b/llvm/test/CodeGen/X86/avx2-nontemporal.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefix=X64
define i32 @f(<8 x float> %A, ptr %B, <4 x double> %C, <4 x i64> %E, <8 x i32> %F, <16 x i16> %G, <32 x i8> %H, ptr %loadptr) nounwind {
; X86-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/avx2-phaddsub.ll b/llvm/test/CodeGen/X86/avx2-phaddsub.ll
index 5b6a5b2bff101..a12e949366176 100644
--- a/llvm/test/CodeGen/X86/avx2-phaddsub.ll
+++ b/llvm/test/CodeGen/X86/avx2-phaddsub.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx2 | FileCheck %s
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx2,fast-hops | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2,fast-hops | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+avx2,fast-hops | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2,fast-hops | FileCheck %s
define <16 x i16> @phaddw1(<16 x i16> %x, <16 x i16> %y) {
; CHECK-LABEL: phaddw1:
diff --git a/llvm/test/CodeGen/X86/avx2-pmovxrm.ll b/llvm/test/CodeGen/X86/avx2-pmovxrm.ll
index 6ddbc82965b42..e959d6e55f23a 100644
--- a/llvm/test/CodeGen/X86/avx2-pmovxrm.ll
+++ b/llvm/test/CodeGen/X86/avx2-pmovxrm.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i686-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -disable-peephole -mtriple=i686-apple-darwin -mattr=+avx512vl,avx512bw | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512vl,avx512bw | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-apple-darwin -mattr=+avx512vl,avx512bw | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512vl,avx512bw | FileCheck %s --check-prefix=X64
define <16 x i16> @test_llvm_x86_avx2_pmovsxbw(ptr %a) {
; X86-LABEL: test_llvm_x86_avx2_pmovsxbw:
diff --git a/llvm/test/CodeGen/X86/avx2-shift.ll b/llvm/test/CodeGen/X86/avx2-shift.ll
index f70c547958519..621c56f4bc3f2 100644
--- a/llvm/test/CodeGen/X86/avx2-shift.ll
+++ b/llvm/test/CodeGen/X86/avx2-shift.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64
define <4 x i32> @variable_shl0(<4 x i32> %x, <4 x i32> %y) {
; CHECK-LABEL: variable_shl0:
diff --git a/llvm/test/CodeGen/X86/avx2-vbroadcast.ll b/llvm/test/CodeGen/X86/avx2-vbroadcast.ll
index c50af6968f5bb..928eb3b2c3c59 100644
--- a/llvm/test/CodeGen/X86/avx2-vbroadcast.ll
+++ b/llvm/test/CodeGen/X86/avx2-vbroadcast.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx2,+mmx | FileCheck %s --check-prefixes=X86,X86-AVX2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2,+mmx | FileCheck %s --check-prefixes=X64,X64-AVX2
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx512vl,+avx512dq,+mmx | FileCheck %s --check-prefixes=X86,X86-AVX512VL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512vl,+avx512dq,+mmx | FileCheck %s --check-prefixes=X64,X64-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+avx2,+mmx | FileCheck %s --check-prefixes=X86,X86-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx2,+mmx | FileCheck %s --check-prefixes=X64,X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+avx512vl,+avx512dq,+mmx | FileCheck %s --check-prefixes=X86,X86-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512vl,+avx512dq,+mmx | FileCheck %s --check-prefixes=X64,X64-AVX512VL
define <16 x i8> @BB16(ptr %ptr) nounwind uwtable readnone ssp {
; X86-LABEL: BB16:
diff --git a/llvm/test/CodeGen/X86/avx2-vbroadcasti128.ll b/llvm/test/CodeGen/X86/avx2-vbroadcasti128.ll
index b5cf3b616f6a6..1d643f308f161 100644
--- a/llvm/test/CodeGen/X86/avx2-vbroadcasti128.ll
+++ b/llvm/test/CodeGen/X86/avx2-vbroadcasti128.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64
define <4 x double> @test_broadcast_2f64_4f64(ptr%p) nounwind {
; X86-LABEL: test_broadcast_2f64_4f64:
diff --git a/llvm/test/CodeGen/X86/avx2-vector-shifts.ll b/llvm/test/CodeGen/X86/avx2-vector-shifts.ll
index 95c2eda5059e5..df1811d36063a 100644
--- a/llvm/test/CodeGen/X86/avx2-vector-shifts.ll
+++ b/llvm/test/CodeGen/X86/avx2-vector-shifts.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86,X86-SLOW
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X86,X86-FAST-ALL
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X86,X86-FAST-PERLANE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64,X64-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X64,X64-FAST-ALL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X64,X64-FAST-PERLANE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X86,X86-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X86,X86-FAST-ALL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X86,X86-FAST-PERLANE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64,X64-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X64,X64-FAST-ALL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,X64,X64-FAST-PERLANE
; AVX2 Logical Shift Left
diff --git a/llvm/test/CodeGen/X86/avx2-vperm.ll b/llvm/test/CodeGen/X86/avx2-vperm.ll
index 90430aa51dcdc..b1868efae15ef 100644
--- a/llvm/test/CodeGen/X86/avx2-vperm.ll
+++ b/llvm/test/CodeGen/X86/avx2-vperm.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64
define <8 x i32> @perm_cl_int_8x32(<8 x i32> %A) nounwind readnone {
; X86-LABEL: perm_cl_int_8x32:
diff --git a/llvm/test/CodeGen/X86/avx512-adc-sbb.ll b/llvm/test/CodeGen/X86/avx512-adc-sbb.ll
index bb21dea68dfaa..1ffff9f45ef29 100644
--- a/llvm/test/CodeGen/X86/avx512-adc-sbb.ll
+++ b/llvm/test/CodeGen/X86/avx512-adc-sbb.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=avx512f %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=avx512f %s -o - | FileCheck %s
; This asserted because we didn't account for a zext of a non-SETCC node:
; https://bugs.llvm.org/show_bug.cgi?id=32316
diff --git a/llvm/test/CodeGen/X86/avx512-any_extend_load.ll b/llvm/test/CodeGen/X86/avx512-any_extend_load.ll
index 48ebda40a5ca2..a8aafcaf20a9a 100644
--- a/llvm/test/CodeGen/X86/avx512-any_extend_load.ll
+++ b/llvm/test/CodeGen/X86/avx512-any_extend_load.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gn -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=KNL
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gn -mattr=+avx512f,+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gn -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gn -mattr=+avx512f,+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=SKX
define void @any_extend_load_v8i64(ptr %ptr) {
diff --git a/llvm/test/CodeGen/X86/avx512-arith.ll b/llvm/test/CodeGen/X86/avx512-arith.ll
index 20550fc4eb9fa..41a98ddda5482 100644
--- a/llvm/test/CodeGen/X86/avx512-arith.ll
+++ b/llvm/test/CodeGen/X86/avx512-arith.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512bw,+avx512vl | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512bw,+avx512vl | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
define <8 x double> @addpd512(<8 x double> %y, <8 x double> %x) {
; CHECK-LABEL: addpd512:
diff --git a/llvm/test/CodeGen/X86/avx512-bugfix-23634.ll b/llvm/test/CodeGen/X86/avx512-bugfix-23634.ll
index 96e20d0b8f967..1c873efe5d56e 100644
--- a/llvm/test/CodeGen/X86/avx512-bugfix-23634.ll
+++ b/llvm/test/CodeGen/X86/avx512-bugfix-23634.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/avx512-bugfix-25270.ll b/llvm/test/CodeGen/X86/avx512-bugfix-25270.ll
index 60390958b3e47..ca072ad25974d 100644
--- a/llvm/test/CodeGen/X86/avx512-bugfix-25270.ll
+++ b/llvm/test/CodeGen/X86/avx512-bugfix-25270.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
declare void @Print__512(<16 x i32>) #0
diff --git a/llvm/test/CodeGen/X86/avx512-cmp-kor-sequence.ll b/llvm/test/CodeGen/X86/avx512-cmp-kor-sequence.ll
index 7fd4f59626649..32730e9af285d 100644
--- a/llvm/test/CodeGen/X86/avx512-cmp-kor-sequence.ll
+++ b/llvm/test/CodeGen/X86/avx512-cmp-kor-sequence.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; This test checks optimal passing values between "cmp" and "kor" intrinsics
; PR28839
diff --git a/llvm/test/CodeGen/X86/avx512-cmp.ll b/llvm/test/CodeGen/X86/avx512-cmp.ll
index ac099b5c6718e..c9abe61c3d273 100644
--- a/llvm/test/CodeGen/X86/avx512-cmp.ll
+++ b/llvm/test/CodeGen/X86/avx512-cmp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=KNL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=SKX
define double @test1(double %a, double %b) nounwind {
; ALL-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/avx512-cvt.ll b/llvm/test/CodeGen/X86/avx512-cvt.ll
index 76c87900b04d2..68620d120e9ac 100644
--- a/llvm/test/CodeGen/X86/avx512-cvt.ll
+++ b/llvm/test/CodeGen/X86/avx512-cvt.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=ALL,NOVL,NODQ,NOVLDQ,KNL
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s --check-prefixes=ALL,VL,VLDQ,VLBW
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx512vl | FileCheck %s --check-prefixes=ALL,NODQ,VL,VLNODQ,VLNOBW
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx512dq | FileCheck %s --check-prefixes=ALL,NOVL,DQNOVL
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefixes=ALL,NOVL,NODQ,NOVLDQ,AVX512BW
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx512vl,avx512dq | FileCheck %s --check-prefixes=ALL,VL,VLDQ,VLNOBW
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx512vl,avx512bw | FileCheck %s --check-prefixes=ALL,NODQ,VL,VLNODQ,VLBW
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=ALL,NOVL,NODQ,NOVLDQ,KNL
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s --check-prefixes=ALL,VL,VLDQ,VLBW
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx512vl | FileCheck %s --check-prefixes=ALL,NODQ,VL,VLNODQ,VLNOBW
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx512dq | FileCheck %s --check-prefixes=ALL,NOVL,DQNOVL
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefixes=ALL,NOVL,NODQ,NOVLDQ,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx512vl,avx512dq | FileCheck %s --check-prefixes=ALL,VL,VLDQ,VLNOBW
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx512vl,avx512bw | FileCheck %s --check-prefixes=ALL,NODQ,VL,VLNODQ,VLBW
define <16 x float> @sitof32(<16 x i32> %a) nounwind {
diff --git a/llvm/test/CodeGen/X86/avx512-cvttp2i.ll b/llvm/test/CodeGen/X86/avx512-cvttp2i.ll
index 9a4e2fa695483..567f34487fb56 100644
--- a/llvm/test/CodeGen/X86/avx512-cvttp2i.ll
+++ b/llvm/test/CodeGen/X86/avx512-cvttp2i.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512f,avx512vl,avx512dq | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx512f,avx512vl,avx512dq | FileCheck %s --check-prefixes=CHECK
; PR37751 - https://bugs.llvm.org/show_bug.cgi?id=37751
; We can't combine into 'round' instructions because the behavior is different for out-of-range values.
diff --git a/llvm/test/CodeGen/X86/avx512-extract-subvector.ll b/llvm/test/CodeGen/X86/avx512-extract-subvector.ll
index 00cc92f7a88d4..831b3a9b657bd 100644
--- a/llvm/test/CodeGen/X86/avx512-extract-subvector.ll
+++ b/llvm/test/CodeGen/X86/avx512-extract-subvector.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck --check-prefix=SKX %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck --check-prefix=SKX %s
define <8 x i16> @extract_subvector128_v32i16(<32 x i16> %x) nounwind {
diff --git a/llvm/test/CodeGen/X86/avx512-f16c-v16f16-fadd.ll b/llvm/test/CodeGen/X86/avx512-f16c-v16f16-fadd.ll
index 32b84087b8888..d75dcd3c7046c 100644
--- a/llvm/test/CodeGen/X86/avx512-f16c-v16f16-fadd.ll
+++ b/llvm/test/CodeGen/X86/avx512-f16c-v16f16-fadd.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=f16c| FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=f16c| FileCheck %s --check-prefixes=CHECK
define <16 x half> @foo(<16 x half> %a, <16 x half> %b) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/avx512-fma-commute.ll b/llvm/test/CodeGen/X86/avx512-fma-commute.ll
index 8686b3360df1c..837ec541c2216 100644
--- a/llvm/test/CodeGen/X86/avx512-fma-commute.ll
+++ b/llvm/test/CodeGen/X86/avx512-fma-commute.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=avx512f | FileCheck %s
declare <4 x float> @llvm.x86.avx512.mask3.vfmadd.ss(<4 x float>, <4 x float>, <4 x float>, i8, i32)
declare <2 x double> @llvm.x86.avx512.mask3.vfmadd.sd(<2 x double>, <2 x double>, <2 x double>, i8, i32)
diff --git a/llvm/test/CodeGen/X86/avx512-fma-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx512-fma-intrinsics-upgrade.ll
index 71ba6d48d0a7b..81a920c9ceefe 100644
--- a/llvm/test/CodeGen/X86/avx512-fma-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx512-fma-intrinsics-upgrade.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s
declare <16 x float> @llvm.x86.avx512.mask.vfmadd.ps.512(<16 x float>, <16 x float>, <16 x float>, i16, i32)
declare <8 x double> @llvm.x86.avx512.mask.vfmadd.pd.512(<8 x double>, <8 x double>, <8 x double>, i8, i32)
diff --git a/llvm/test/CodeGen/X86/avx512-fma-intrinsics.ll b/llvm/test/CodeGen/X86/avx512-fma-intrinsics.ll
index c5a994e6846a4..c7da9abb7e1d7 100644
--- a/llvm/test/CodeGen/X86/avx512-fma-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512-fma-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <16 x float> @llvm.x86.avx512.vfmadd.ps.512(<16 x float>, <16 x float>, <16 x float>, i32)
declare <8 x double> @llvm.x86.avx512.vfmadd.pd.512(<8 x double>, <8 x double>, <8 x double>, i32)
diff --git a/llvm/test/CodeGen/X86/avx512-fma.ll b/llvm/test/CodeGen/X86/avx512-fma.ll
index 29120c8815aea..523be85ad3c07 100644
--- a/llvm/test/CodeGen/X86/avx512-fma.ll
+++ b/llvm/test/CodeGen/X86/avx512-fma.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=KNL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=ALL --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=ALL --check-prefix=SKX
define <16 x float> @test_x86_fmadd_ps_z(<16 x float> %a0, <16 x float> %a1, <16 x float> %a2) {
; ALL-LABEL: test_x86_fmadd_ps_z:
diff --git a/llvm/test/CodeGen/X86/avx512-fsel.ll b/llvm/test/CodeGen/X86/avx512-fsel.ll
index 6efb66e6865e3..eb44ddfdee102 100644
--- a/llvm/test/CodeGen/X86/avx512-fsel.ll
+++ b/llvm/test/CodeGen/X86/avx512-fsel.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 -mattr=+avx512f < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -mattr=+avx512f < %s | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.11.0"
diff --git a/llvm/test/CodeGen/X86/avx512-gather-scatter-intrin-deprecated.ll b/llvm/test/CodeGen/X86/avx512-gather-scatter-intrin-deprecated.ll
index 4dd883a24f623..0b80b9dae0ab6 100644
--- a/llvm/test/CodeGen/X86/avx512-gather-scatter-intrin-deprecated.ll
+++ b/llvm/test/CodeGen/X86/avx512-gather-scatter-intrin-deprecated.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s
declare <16 x float> @llvm.x86.avx512.gather.dps.512 (<16 x float>, ptr, <16 x i32>, i16, i32)
declare void @llvm.x86.avx512.scatter.dps.512 (ptr, i16, <16 x i32>, <16 x float>, i32)
diff --git a/llvm/test/CodeGen/X86/avx512-gather-scatter-intrin.ll b/llvm/test/CodeGen/X86/avx512-gather-scatter-intrin.ll
index 5ed91ea1eb872..b60651da23eb0 100644
--- a/llvm/test/CodeGen/X86/avx512-gather-scatter-intrin.ll
+++ b/llvm/test/CodeGen/X86/avx512-gather-scatter-intrin.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s
define dso_local void @gather_mask_dps(<16 x i32> %ind, <16 x float> %src, i16 %mask, ptr %base, ptr %stbuf) {
; CHECK-LABEL: gather_mask_dps:
diff --git a/llvm/test/CodeGen/X86/avx512-gfni-intrinsics.ll b/llvm/test/CodeGen/X86/avx512-gfni-intrinsics.ll
index 3b7803427ae5e..da4255b04c0ed 100644
--- a/llvm/test/CodeGen/X86/avx512-gfni-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512-gfni-intrinsics.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl,+gfni,+avx512bw --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni,+avx512bw --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64BW
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl,+gfni --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86NOBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64NOBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl,+gfni,+avx512bw --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni,+avx512bw --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl,+gfni --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86NOBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64NOBW
declare <16 x i8> @llvm.x86.vgf2p8affineinvqb.128(<16 x i8>, <16 x i8>, i8)
define { <16 x i8>, <16 x i8>, <16 x i8> } @test_vgf2p8affineinvqb_128(<16 x i8> %src1, <16 x i8> %src2, <16 x i8> %passthru, i16 %mask) {
diff --git a/llvm/test/CodeGen/X86/avx512-i1test.ll b/llvm/test/CodeGen/X86/avx512-i1test.ll
index c5d4c87d66da2..b8ab35831a2a2 100644
--- a/llvm/test/CodeGen/X86/avx512-i1test.ll
+++ b/llvm/test/CodeGen/X86/avx512-i1test.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=+avx512f -disable-cgp-delete-phis | FileCheck %s
-; RUN: llc < %s -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq -disable-cgp-delete-phis | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx512f -disable-cgp-delete-phis | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq -disable-cgp-delete-phis | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/avx512-inc-dec.ll b/llvm/test/CodeGen/X86/avx512-inc-dec.ll
index beef481315d75..20e336a03dc9a 100644
--- a/llvm/test/CodeGen/X86/avx512-inc-dec.ll
+++ b/llvm/test/CodeGen/X86/avx512-inc-dec.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
define i32 @test(i32 %a, i32 %b) {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/avx512-insert-extract_i1.ll b/llvm/test/CodeGen/X86/avx512-insert-extract_i1.ll
index ee2bd96be099c..064a1f12471bc 100644
--- a/llvm/test/CodeGen/X86/avx512-insert-extract_i1.ll
+++ b/llvm/test/CodeGen/X86/avx512-insert-extract_i1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck --check-prefix=SKX %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck --check-prefix=SKX %s
; TODO - fix fail on KNL and move this test to avx512-insert-extract.ll
diff --git a/llvm/test/CodeGen/X86/avx512-intel-ocl.ll b/llvm/test/CodeGen/X86/avx512-intel-ocl.ll
index eb8bff26f3b77..38b3d2950fb05 100644
--- a/llvm/test/CodeGen/X86/avx512-intel-ocl.ll
+++ b/llvm/test/CodeGen/X86/avx512-intel-ocl.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=knl | FileCheck %s -check-prefix=X32
-; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=skx | FileCheck %s -check-prefix=X32
-; RUN: llc < %s -mtriple=i386-pc-win32 -mcpu=knl | FileCheck %s -check-prefix=WIN32
-; RUN: llc < %s -mtriple=i386-pc-win32 -mcpu=skx | FileCheck %s -check-prefix=WIN32
-; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=knl | FileCheck %s -check-prefixes=WIN64,WIN64-KNL
-; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=skx | FileCheck %s -check-prefixes=WIN64,WIN64-SKX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s -check-prefixes=X64,X64-KNL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s -check-prefixes=X64,X64-SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mcpu=knl | FileCheck %s -check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mcpu=skx | FileCheck %s -check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-win32 -mcpu=knl | FileCheck %s -check-prefix=WIN32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-win32 -mcpu=skx | FileCheck %s -check-prefix=WIN32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mcpu=knl | FileCheck %s -check-prefixes=WIN64,WIN64-KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mcpu=skx | FileCheck %s -check-prefixes=WIN64,WIN64-SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s -check-prefixes=X64,X64-KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s -check-prefixes=X64,X64-SKX
declare <16 x float> @func_float16_ptr(<16 x float>, ptr)
declare <16 x float> @func_float16(<16 x float>, <16 x float>)
diff --git a/llvm/test/CodeGen/X86/avx512-intrinsics-canonical.ll b/llvm/test/CodeGen/X86/avx512-intrinsics-canonical.ll
index a84c32aeead4a..f6e3702afbba1 100644
--- a/llvm/test/CodeGen/X86/avx512-intrinsics-canonical.ll
+++ b/llvm/test/CodeGen/X86/avx512-intrinsics-canonical.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx512f --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+avx512f --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512f-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
index eea4261ea30fe..889ef4b3d3c68 100644
--- a/llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512f-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx512-intrinsics-x86_64.ll b/llvm/test/CodeGen/X86/avx512-intrinsics-x86_64.ll
index d5d10565f24b8..5f77de5dcb4da 100644
--- a/llvm/test/CodeGen/X86/avx512-intrinsics-x86_64.ll
+++ b/llvm/test/CodeGen/X86/avx512-intrinsics-x86_64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s
define i64 @test_x86_sse2_cvtsd2si64(<2 x double> %a0) {
diff --git a/llvm/test/CodeGen/X86/avx512-intrinsics.ll b/llvm/test/CodeGen/X86/avx512-intrinsics.ll
index b979f7531cd36..2c867f954d52a 100644
--- a/llvm/test/CodeGen/X86/avx512-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X86
define <8 x double> @test_mask_compress_pd_512(<8 x double> %data, <8 x double> %passthru, i8 %mask) {
diff --git a/llvm/test/CodeGen/X86/avx512-load-store.ll b/llvm/test/CodeGen/X86/avx512-load-store.ll
index ce6bfa90d88a7..f82ad4bac6ff2 100644
--- a/llvm/test/CodeGen/X86/avx512-load-store.ll
+++ b/llvm/test/CodeGen/X86/avx512-load-store.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O2 -mattr=avx512f -mtriple=x86_64-unknown | FileCheck %s --check-prefix=CHECK64
-; RUN: llc < %s -O2 -mattr=avx512f -mtriple=i386-unknown | FileCheck %s --check-prefix=CHECK32
-; RUN: llc < %s -O2 -mattr=avx512vl -mtriple=x86_64-unknown | FileCheck %s --check-prefix=CHECK64
-; RUN: llc < %s -O2 -mattr=avx512vl -mtriple=i386-unknown | FileCheck %s --check-prefix=CHECK32
+; RUN: llc -combiner-topological-sorting < %s -O2 -mattr=avx512f -mtriple=x86_64-unknown | FileCheck %s --check-prefix=CHECK64
+; RUN: llc -combiner-topological-sorting < %s -O2 -mattr=avx512f -mtriple=i386-unknown | FileCheck %s --check-prefix=CHECK32
+; RUN: llc -combiner-topological-sorting < %s -O2 -mattr=avx512vl -mtriple=x86_64-unknown | FileCheck %s --check-prefix=CHECK64
+; RUN: llc -combiner-topological-sorting < %s -O2 -mattr=avx512vl -mtriple=i386-unknown | FileCheck %s --check-prefix=CHECK32
define <4 x float> @test_mm_mask_move_ss(<4 x float> %__W, i8 zeroext %__U, <4 x float> %__A, <4 x float> %__B) local_unnamed_addr #0 {
; CHECK64-LABEL: test_mm_mask_move_ss:
diff --git a/llvm/test/CodeGen/X86/avx512-load-trunc-store-i1.ll b/llvm/test/CodeGen/X86/avx512-load-trunc-store-i1.ll
index 38179d9fcf68d..7b33a509bd98e 100644
--- a/llvm/test/CodeGen/X86/avx512-load-trunc-store-i1.ll
+++ b/llvm/test/CodeGen/X86/avx512-load-trunc-store-i1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq -O2 | FileCheck %s --check-prefix=AVX512-ALL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O2| FileCheck %s --check-prefix=AVX512-ONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq -O2 | FileCheck %s --check-prefix=AVX512-ALL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O2| FileCheck %s --check-prefix=AVX512-ONLY
define void @load_v1i2_trunc_v1i1_store(ptr %a0,ptr %a1) {
; AVX512-ALL-LABEL: load_v1i2_trunc_v1i1_store:
diff --git a/llvm/test/CodeGen/X86/avx512-logic.ll b/llvm/test/CodeGen/X86/avx512-logic.ll
index bdcc524545fb1..7c8e94857ae78 100644
--- a/llvm/test/CodeGen/X86/avx512-logic.ll
+++ b/llvm/test/CodeGen/X86/avx512-logic.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=ALL --check-prefix=KNL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=ALL --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=ALL --check-prefix=KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=ALL --check-prefix=SKX
define <16 x i32> @vpandd(<16 x i32> %a, <16 x i32> %b) nounwind uwtable readnone ssp {
diff --git a/llvm/test/CodeGen/X86/avx512-mask-bit-manip.ll b/llvm/test/CodeGen/X86/avx512-mask-bit-manip.ll
index 0474c9fc8eb34..23b6194b802c0 100644
--- a/llvm/test/CodeGen/X86/avx512-mask-bit-manip.ll
+++ b/llvm/test/CodeGen/X86/avx512-mask-bit-manip.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=AVX512F
; Tests for BMI1/BMI2/TBM style bit manipulations that could potentially stay on the predicate registers
diff --git a/llvm/test/CodeGen/X86/avx512-mask-set-opt.ll b/llvm/test/CodeGen/X86/avx512-mask-set-opt.ll
index ca5f3192d7b97..1f98a38239bd2 100644
--- a/llvm/test/CodeGen/X86/avx512-mask-set-opt.ll
+++ b/llvm/test/CodeGen/X86/avx512-mask-set-opt.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512DQBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512DQBW
declare <16 x float> @llvm.masked.gather.v16f32.v16p0(<16 x ptr>, i32, <16 x i1>, <16 x float>)
declare <16 x float> @llvm.masked.expandload.v16f32(ptr, <16 x i1>, <16 x float>)
diff --git a/llvm/test/CodeGen/X86/avx512-mask-spills.ll b/llvm/test/CodeGen/X86/avx512-mask-spills.ll
index 3c02ae6d24b4b..ef9e2eddf4ce7 100644
--- a/llvm/test/CodeGen/X86/avx512-mask-spills.ll
+++ b/llvm/test/CodeGen/X86/avx512-mask-spills.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s
declare void @f()
define <4 x i1> @test_4i1(<4 x i32> %a, <4 x i32> %b) {
diff --git a/llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll b/llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll
index 2412e7aefdc2f..6d61fda43da49 100644
--- a/llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll
+++ b/llvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s
; ModuleID = 'mask_set.c'
source_filename = "mask_set.c"
diff --git a/llvm/test/CodeGen/X86/avx512-masked_memop-16-8.ll b/llvm/test/CodeGen/X86/avx512-masked_memop-16-8.ll
index 52df1b164500d..06c5e6dcd76d9 100644
--- a/llvm/test/CodeGen/X86/avx512-masked_memop-16-8.ll
+++ b/llvm/test/CodeGen/X86/avx512-masked_memop-16-8.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-apple-darwin -mattr=avx512f,avx512bw,avx512vl < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mattr=avx512f,avx512bw,avx512vl < %s | FileCheck %s
; Skylake-avx512 target supports masked load/store for i8 and i16 vectors
diff --git a/llvm/test/CodeGen/X86/avx512-memfold.ll b/llvm/test/CodeGen/X86/avx512-memfold.ll
index 906687569529d..28436af3c49e9 100644
--- a/llvm/test/CodeGen/X86/avx512-memfold.ll
+++ b/llvm/test/CodeGen/X86/avx512-memfold.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
define i8 @test_int_x86_avx512_mask_cmp_ss(<4 x float> %a, ptr %b, i8 %mask) {
; CHECK-LABEL: test_int_x86_avx512_mask_cmp_ss:
diff --git a/llvm/test/CodeGen/X86/avx512-mov.ll b/llvm/test/CodeGen/X86/avx512-mov.ll
index 895317cd73d82..ba6e0131e3468 100644
--- a/llvm/test/CodeGen/X86/avx512-mov.ll
+++ b/llvm/test/CodeGen/X86/avx512-mov.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding| FileCheck %s
define i32 @test1(float %x) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/avx512-movmsk.ll b/llvm/test/CodeGen/X86/avx512-movmsk.ll
index 1f7fc15fdee6a..1b3a8508b14a3 100644
--- a/llvm/test/CodeGen/X86/avx512-movmsk.ll
+++ b/llvm/test/CodeGen/X86/avx512-movmsk.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx512vl | FileCheck %s --check-prefixes=AVX512VL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx512vl,avx512dq,avx512bw | FileCheck %s --check-prefixes=AVX512VLDQBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=avx512vl | FileCheck %s --check-prefixes=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=avx512vl,avx512dq,avx512bw | FileCheck %s --check-prefixes=AVX512VLDQBW
; This test makes sure we don't use movmsk instructions when masked compares
; would be better. The use of the getmant intrinsic introduces a convertion
diff --git a/llvm/test/CodeGen/X86/avx512-nontemporal.ll b/llvm/test/CodeGen/X86/avx512-nontemporal.ll
index 7c6837cca9023..511b6f80125c8 100644
--- a/llvm/test/CodeGen/X86/avx512-nontemporal.ll
+++ b/llvm/test/CodeGen/X86/avx512-nontemporal.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512bw | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512bw | FileCheck %s
define i32 @f(<16 x float> %A, <16 x float> %AA, ptr %B, <8 x double> %C, <8 x double> %CC, <8 x i64> %E, <8 x i64> %EE, <16 x i32> %F, <16 x i32> %FF, <32 x i16> %G, <32 x i16> %GG, <64 x i8> %H, <64 x i8> %HH, ptr %loadptr) {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/avx512-pmovxrm.ll b/llvm/test/CodeGen/X86/avx512-pmovxrm.ll
index 237ae7a5c64ad..4332c2d895b9c 100644
--- a/llvm/test/CodeGen/X86/avx512-pmovxrm.ll
+++ b/llvm/test/CodeGen/X86/avx512-pmovxrm.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i686-apple-darwin -mattr=+avx512f,avx512bw | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,avx512bw | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-apple-darwin -mattr=+avx512f,avx512bw | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,avx512bw | FileCheck %s --check-prefix=X64
define <32 x i16> @test_llvm_x86_avx512_pmovsxbw(ptr %a) {
; X86-LABEL: test_llvm_x86_avx512_pmovsxbw:
diff --git a/llvm/test/CodeGen/X86/avx512-regcall-Mask.ll b/llvm/test/CodeGen/X86/avx512-regcall-Mask.ll
index 162f5efd78f6d..2057521f04d4c 100644
--- a/llvm/test/CodeGen/X86/avx512-regcall-Mask.ll
+++ b/llvm/test/CodeGen/X86/avx512-regcall-Mask.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-pc-win32 -mattr=+avx512bw | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+avx512bw | FileCheck %s --check-prefix=CHECK64 --check-prefix=WIN64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mattr=+avx512bw | FileCheck %s --check-prefix=CHECK64 --check-prefix=LINUXOSX64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-win32 -mattr=+avx512bw | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mattr=+avx512bw | FileCheck %s --check-prefix=CHECK64 --check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mattr=+avx512bw | FileCheck %s --check-prefix=CHECK64 --check-prefix=LINUXOSX64
; Test regcall when receiving arguments of v64i1 type
define dso_local x86_regcallcc i64 @test_argv64i1(<64 x i1> %x0, <64 x i1> %x1, <64 x i1> %x2, <64 x i1> %x3, <64 x i1> %x4, <64 x i1> %x5, <64 x i1> %x6, <64 x i1> %x7, <64 x i1> %x8, <64 x i1> %x9, <64 x i1> %x10, <64 x i1> %x11, <64 x i1> %x12) {
diff --git a/llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll b/llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
index a664cc7f17a5c..c93150fff6c1a 100644
--- a/llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
+++ b/llvm/test/CodeGen/X86/avx512-regcall-NoMask.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-pc-win32 -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq -verify-machineinstrs | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq -verify-machineinstrs | FileCheck %s --check-prefix=WIN64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq -verify-machineinstrs | FileCheck %s --check-prefix=LINUXOSX64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-win32 -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq -verify-machineinstrs | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq -verify-machineinstrs | FileCheck %s --check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mattr=+avx512f -mattr=+avx512vl -mattr=+avx512bw -mattr=+avx512dq -verify-machineinstrs | FileCheck %s --check-prefix=LINUXOSX64
; Test regcall when receiving/returning i1
define dso_local x86_regcallcc i1 @test_argReti1(i1 %a) {
diff --git a/llvm/test/CodeGen/X86/avx512-rndscale.ll b/llvm/test/CodeGen/X86/avx512-rndscale.ll
index 37406644ac08e..b05cefb197db3 100644
--- a/llvm/test/CodeGen/X86/avx512-rndscale.ll
+++ b/llvm/test/CodeGen/X86/avx512-rndscale.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512vl | FileCheck %s
declare <2 x double> @llvm.floor.v2f64(<2 x double> %p)
declare <4 x float> @llvm.floor.v4f32(<4 x float> %p)
diff --git a/llvm/test/CodeGen/X86/avx512-rotate.ll b/llvm/test/CodeGen/X86/avx512-rotate.ll
index fcf1a5c3e13c2..9e10ce0529a30 100644
--- a/llvm/test/CodeGen/X86/avx512-rotate.ll
+++ b/llvm/test/CodeGen/X86/avx512-rotate.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
declare <16 x i32> @llvm.x86.avx512.mask.prolv.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
declare <16 x i32> @llvm.x86.avx512.mask.prorv.d.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
diff --git a/llvm/test/CodeGen/X86/avx512-scalar.ll b/llvm/test/CodeGen/X86/avx512-scalar.ll
index 200d36d116770..189fbb8ca9e05 100644
--- a/llvm/test/CodeGen/X86/avx512-scalar.ll
+++ b/llvm/test/CodeGen/X86/avx512-scalar.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512-KNL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx --show-mc-encoding | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512-SKX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx --show-mc-encoding | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512-KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skx --show-mc-encoding | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512-SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx --show-mc-encoding | FileCheck %s --check-prefix=AVX
define float @test_fdiv(float %a, float %b) {
; AVX512-LABEL: test_fdiv:
diff --git a/llvm/test/CodeGen/X86/avx512-scalarIntrinsics.ll b/llvm/test/CodeGen/X86/avx512-scalarIntrinsics.ll
index 9767237c4818e..234876c3a4535 100644
--- a/llvm/test/CodeGen/X86/avx512-scalarIntrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512-scalarIntrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
define <4 x float> @test_rsqrt14_ss(<4 x float> %a0) {
diff --git a/llvm/test/CodeGen/X86/avx512-scalar_mask.ll b/llvm/test/CodeGen/X86/avx512-scalar_mask.ll
index fc2bf88631678..1870ccdcd30e5 100644
--- a/llvm/test/CodeGen/X86/avx512-scalar_mask.ll
+++ b/llvm/test/CodeGen/X86/avx512-scalar_mask.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
declare <4 x float> @llvm.x86.avx512.mask.vfmadd.ss(<4 x float>, <4 x float>, <4 x float>, i8, i32)
declare <4 x float> @llvm.x86.avx512.maskz.vfmadd.ss(<4 x float>, <4 x float>, <4 x float>, i8, i32)
diff --git a/llvm/test/CodeGen/X86/avx512-select.ll b/llvm/test/CodeGen/X86/avx512-select.ll
index 721ffbe1ceb79..e70dd80d46a65 100644
--- a/llvm/test/CodeGen/X86/avx512-select.ll
+++ b/llvm/test/CodeGen/X86/avx512-select.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86-AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64,X64-AVX512F
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefixes=X86,X86-AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefixes=X64,X64-AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86-AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64,X64-AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefixes=X86,X86-AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefixes=X64,X64-AVX512BW
define <16 x i32> @select00(i32 %a, <16 x i32> %b) nounwind {
; X86-LABEL: select00:
diff --git a/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-scalar-fp.ll b/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-scalar-fp.ll
index 4066a3333f994..f9da6639ab6cc 100644
--- a/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-scalar-fp.ll
+++ b/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-scalar-fp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s
define <4 x double> @test_double_to_4(double %s) {
; CHECK-LABEL: test_double_to_4:
diff --git a/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-scalar-int.ll b/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-scalar-int.ll
index f614739fb5368..1981e44609c82 100644
--- a/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-scalar-int.ll
+++ b/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-scalar-int.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512bw %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512bw %s -o - | FileCheck %s
define <16 x i8> @test_i8_to_16(i8 %s) {
; CHECK-LABEL: test_i8_to_16:
diff --git a/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-vector-fp.ll b/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-vector-fp.ll
index 29a38002131ce..ee456d581f1b8 100644
--- a/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-vector-fp.ll
+++ b/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-vector-fp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512dq %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512dq %s -o - | FileCheck %s
define <8 x float> @test_2xfloat_to_8xfloat(<8 x float> %vec) {
; CHECK-LABEL: test_2xfloat_to_8xfloat:
diff --git a/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll b/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll
index 95c8aa6be9f43..2dd240afff57e 100644
--- a/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll
+++ b/llvm/test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512dq,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle %s -o - | FileCheck %s
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512dq,+fast-variable-perlane-shuffle %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512dq,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512dq,+fast-variable-perlane-shuffle %s -o - | FileCheck %s
define <4 x i32> @test_2xi32_to_4xi32(<4 x i32> %vec) {
; CHECK-LABEL: test_2xi32_to_4xi32:
diff --git a/llvm/test/CodeGen/X86/avx512-shuffles/duplicate-high.ll b/llvm/test/CodeGen/X86/avx512-shuffles/duplicate-high.ll
index b9ed80bb82c05..ed9a2be33351e 100644
--- a/llvm/test/CodeGen/X86/avx512-shuffles/duplicate-high.ll
+++ b/llvm/test/CodeGen/X86/avx512-shuffles/duplicate-high.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s
define <4 x float> @test_4xfloat_dup_high(<4 x float> %vec) {
; CHECK-LABEL: test_4xfloat_dup_high:
diff --git a/llvm/test/CodeGen/X86/avx512-shuffles/duplicate-low.ll b/llvm/test/CodeGen/X86/avx512-shuffles/duplicate-low.ll
index c5b188091620d..b2171f6ebc87e 100644
--- a/llvm/test/CodeGen/X86/avx512-shuffles/duplicate-low.ll
+++ b/llvm/test/CodeGen/X86/avx512-shuffles/duplicate-low.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s
define <2 x double> @test_2xdouble_dup_low(<2 x double> %vec) {
; CHECK-LABEL: test_2xdouble_dup_low:
diff --git a/llvm/test/CodeGen/X86/avx512-shuffles/in_lane_permute.ll b/llvm/test/CodeGen/X86/avx512-shuffles/in_lane_permute.ll
index c876d996db9ad..3fb3fa2fbe202 100644
--- a/llvm/test/CodeGen/X86/avx512-shuffles/in_lane_permute.ll
+++ b/llvm/test/CodeGen/X86/avx512-shuffles/in_lane_permute.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s
; FIXME: The non immediate <16 x float> test cases should be fixed by PR34382
diff --git a/llvm/test/CodeGen/X86/avx512-shuffles/permute.ll b/llvm/test/CodeGen/X86/avx512-shuffles/permute.ll
index 367e28eb7364e..1137eb4a050df 100644
--- a/llvm/test/CodeGen/X86/avx512-shuffles/permute.ll
+++ b/llvm/test/CodeGen/X86/avx512-shuffles/permute.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512bw %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512bw %s -o - | FileCheck %s
define <16 x i16> @test_16xi16_perm_mask0(<16 x i16> %vec) {
; CHECK-LABEL: test_16xi16_perm_mask0:
diff --git a/llvm/test/CodeGen/X86/avx512-shuffles/shuffle-blend.ll b/llvm/test/CodeGen/X86/avx512-shuffles/shuffle-blend.ll
index 78957d10301c9..fc18af34ab38f 100644
--- a/llvm/test/CodeGen/X86/avx512-shuffles/shuffle-blend.ll
+++ b/llvm/test/CodeGen/X86/avx512-shuffles/shuffle-blend.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512F
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512BW,X86-AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512BW,X64-AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512BW,X86-AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512BW,X64-AVX512BW
define <16 x i32> @shuffle_v8i64(<16 x i32> %t0, <16 x i32> %t1) {
; CHECK-LABEL: shuffle_v8i64:
diff --git a/llvm/test/CodeGen/X86/avx512-shuffles/shuffle-interleave.ll b/llvm/test/CodeGen/X86/avx512-shuffles/shuffle-interleave.ll
index b7b1212e76722..5114fc9890ffc 100644
--- a/llvm/test/CodeGen/X86/avx512-shuffles/shuffle-interleave.ll
+++ b/llvm/test/CodeGen/X86/avx512-shuffles/shuffle-interleave.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s
define <4 x float> @test_4xfloat_shuff_mask0(<4 x float> %vec1, <4 x float> %vec2) {
; CHECK-LABEL: test_4xfloat_shuff_mask0:
diff --git a/llvm/test/CodeGen/X86/avx512-shuffles/shuffle-vec.ll b/llvm/test/CodeGen/X86/avx512-shuffles/shuffle-vec.ll
index f0ae6da8304be..9cc5a151fb002 100644
--- a/llvm/test/CodeGen/X86/avx512-shuffles/shuffle-vec.ll
+++ b/llvm/test/CodeGen/X86/avx512-shuffles/shuffle-vec.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s
; FIXME: 128-bit shuffles of 256-bit vectors cases should be fixed by PR34359
diff --git a/llvm/test/CodeGen/X86/avx512-shuffles/shuffle.ll b/llvm/test/CodeGen/X86/avx512-shuffles/shuffle.ll
index a65f93aba180f..afa87b6b4d8f7 100644
--- a/llvm/test/CodeGen/X86/avx512-shuffles/shuffle.ll
+++ b/llvm/test/CodeGen/X86/avx512-shuffles/shuffle.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512bw %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+avx512bw %s -o - | FileCheck %s
define <16 x i8> @test_16xi8_perm_mask0(<16 x i8> %vec) {
; CHECK-LABEL: test_16xi8_perm_mask0:
diff --git a/llvm/test/CodeGen/X86/avx512-shuffles/unpack.ll b/llvm/test/CodeGen/X86/avx512-shuffles/unpack.ll
index d0b183dfeae6e..b6391b27e3d42 100644
--- a/llvm/test/CodeGen/X86/avx512-shuffles/unpack.ll
+++ b/llvm/test/CodeGen/X86/avx512-shuffles/unpack.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl %s -o - | FileCheck %s
define <4 x float> @test_4xfloat_unpack_low_mask0(<4 x float> %vec1, <4 x float> %vec2) {
; CHECK-LABEL: test_4xfloat_unpack_low_mask0:
diff --git a/llvm/test/CodeGen/X86/avx512-skx-insert-subvec.ll b/llvm/test/CodeGen/X86/avx512-skx-insert-subvec.ll
index 2fd2eba42315e..71a7398ddc4d5 100644
--- a/llvm/test/CodeGen/X86/avx512-skx-insert-subvec.ll
+++ b/llvm/test/CodeGen/X86/avx512-skx-insert-subvec.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw -mattr=+avx512dq -mattr=+avx512vl| FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw -mattr=+avx512dq -mattr=+avx512vl| FileCheck %s
define <8 x i1> @test(<2 x i1> %a) {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/avx512-skx-v32f16-fadd.ll b/llvm/test/CodeGen/X86/avx512-skx-v32f16-fadd.ll
index 3c0e3aaf47fa2..84b85af71d9f8 100644
--- a/llvm/test/CodeGen/X86/avx512-skx-v32f16-fadd.ll
+++ b/llvm/test/CodeGen/X86/avx512-skx-v32f16-fadd.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512f| FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx512f| FileCheck %s --check-prefixes=CHECK
define <32 x half> @foo(<32 x half> %a, <32 x half> %b) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/avx512-unsafe-fp-math.ll b/llvm/test/CodeGen/X86/avx512-unsafe-fp-math.ll
index 7596cee5af1eb..0ba756dac14e2 100644
--- a/llvm/test/CodeGen/X86/avx512-unsafe-fp-math.ll
+++ b/llvm/test/CodeGen/X86/avx512-unsafe-fp-math.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64 -mattr=+avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+avx512f | FileCheck %s
define <16 x float> @test_max_v16f32(ptr %a_ptr, <16 x float> %b) {
; CHECK-LABEL: test_max_v16f32:
diff --git a/llvm/test/CodeGen/X86/avx512-vbroadcast.ll b/llvm/test/CodeGen/X86/avx512-vbroadcast.ll
index c50418feff6fb..09a065570c508 100644
--- a/llvm/test/CodeGen/X86/avx512-vbroadcast.ll
+++ b/llvm/test/CodeGen/X86/avx512-vbroadcast.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=ALL,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=ALL,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512BW
define <16 x i32> @_inreg16xi32(i32 %a) {
; ALL-LABEL: _inreg16xi32:
diff --git a/llvm/test/CodeGen/X86/avx512-vbroadcasti128.ll b/llvm/test/CodeGen/X86/avx512-vbroadcasti128.ll
index fcde7ffe30ff2..03e800d282aee 100644
--- a/llvm/test/CodeGen/X86/avx512-vbroadcasti128.ll
+++ b/llvm/test/CodeGen/X86/avx512-vbroadcasti128.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512vl | FileCheck %s --check-prefix=X64-AVX512 --check-prefix=X64-AVX512VL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=X64-AVX512 --check-prefix=X64-AVX512BWVL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64-AVX512 --check-prefix=X64-AVX512DQVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512vl | FileCheck %s --check-prefix=X64-AVX512 --check-prefix=X64-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=X64-AVX512 --check-prefix=X64-AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64-AVX512 --check-prefix=X64-AVX512DQVL
;
; 128-bit Subvector Broadcast to 256-bit
diff --git a/llvm/test/CodeGen/X86/avx512-vbroadcasti256.ll b/llvm/test/CodeGen/X86/avx512-vbroadcasti256.ll
index 4361d0d30b244..75b442d67105f 100644
--- a/llvm/test/CodeGen/X86/avx512-vbroadcasti256.ll
+++ b/llvm/test/CodeGen/X86/avx512-vbroadcasti256.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512vl | FileCheck %s --check-prefix=X64-AVX512 --check-prefix=X64-AVX512VL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=X64-AVX512 --check-prefix=X64-AVX512BWVL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64-AVX512 --check-prefix=X64-AVX512DQVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512vl | FileCheck %s --check-prefix=X64-AVX512 --check-prefix=X64-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=X64-AVX512 --check-prefix=X64-AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64-AVX512 --check-prefix=X64-AVX512DQVL
define <8 x double> @test_broadcast_4f64_8f64(ptr%p) nounwind {
; X64-AVX512-LABEL: test_broadcast_4f64_8f64:
diff --git a/llvm/test/CodeGen/X86/avx512-vec3-crash.ll b/llvm/test/CodeGen/X86/avx512-vec3-crash.ll
index a6e354b3330e8..1fb5cd75af54d 100644
--- a/llvm/test/CodeGen/X86/avx512-vec3-crash.ll
+++ b/llvm/test/CodeGen/X86/avx512-vec3-crash.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mcpu=skx -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=skx -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
; This test crashed during type legalization of SETCC result type.
define <3 x i8 > @foo(<3 x i8>%x, <3 x i8>%a, <3 x i8>%b) {
diff --git a/llvm/test/CodeGen/X86/avx512-vpclmulqdq.ll b/llvm/test/CodeGen/X86/avx512-vpclmulqdq.ll
index 14b2717f2e730..156613850dc52 100644
--- a/llvm/test/CodeGen/X86/avx512-vpclmulqdq.ll
+++ b/llvm/test/CodeGen/X86/avx512-vpclmulqdq.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr=+avx512f,+vpclmulqdq -show-mc-encoding | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+vpclmulqdq -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -mattr=+avx512f,+vpclmulqdq -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+vpclmulqdq -show-mc-encoding | FileCheck %s
define <8 x i64> @test_x86_pclmulqdq(<8 x i64> %a0, <8 x i64> %a1) {
; CHECK-LABEL: test_x86_pclmulqdq:
diff --git a/llvm/test/CodeGen/X86/avx512-vpermv3-commute.ll b/llvm/test/CodeGen/X86/avx512-vpermv3-commute.ll
index 26f00f0402efb..dad378ecb1e5c 100644
--- a/llvm/test/CodeGen/X86/avx512-vpermv3-commute.ll
+++ b/llvm/test/CodeGen/X86/avx512-vpermv3-commute.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=cannonlake | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=cannonlake | FileCheck %s
; These test cases demonstrate cases where vpermt2/vpermi2 could benefit from being commuted.
diff --git a/llvm/test/CodeGen/X86/avx512-vpternlog-commute.ll b/llvm/test/CodeGen/X86/avx512-vpternlog-commute.ll
index 022f04d360ddf..eff26f7a44c21 100644
--- a/llvm/test/CodeGen/X86/avx512-vpternlog-commute.ll
+++ b/llvm/test/CodeGen/X86/avx512-vpternlog-commute.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s
; These test cases demonstrate cases where vpternlog could benefit from being commuted.
diff --git a/llvm/test/CodeGen/X86/avx512-vselect-crash.ll b/llvm/test/CodeGen/X86/avx512-vselect-crash.ll
index 31ccf867f7aaf..b2d4b4be92c5b 100644
--- a/llvm/test/CodeGen/X86/avx512-vselect-crash.ll
+++ b/llvm/test/CodeGen/X86/avx512-vselect-crash.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
define <16 x i32> @test() {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/avx512-vselect.ll b/llvm/test/CodeGen/X86/avx512-vselect.ll
index aacd5d1ab0298..6f5d41046cf15 100644
--- a/llvm/test/CodeGen/X86/avx512-vselect.ll
+++ b/llvm/test/CodeGen/X86/avx512-vselect.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=skx | FileCheck %s --check-prefixes=CHECK,CHECK-SKX
-; RUN: llc < %s -mcpu=knl | FileCheck %s --check-prefixes=CHECK,CHECK-KNL
+; RUN: llc -combiner-topological-sorting < %s -mcpu=skx | FileCheck %s --check-prefixes=CHECK,CHECK-SKX
+; RUN: llc -combiner-topological-sorting < %s -mcpu=knl | FileCheck %s --check-prefixes=CHECK,CHECK-KNL
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/avx512bf16-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx512bf16-intrinsics-upgrade.ll
index 32f8c0f0be9f2..d921ce7b780a0 100644
--- a/llvm/test/CodeGen/X86/avx512bf16-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx512bf16-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512bf16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512bf16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <32 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float>, <16 x float>) #3
diff --git a/llvm/test/CodeGen/X86/avx512bf16-intrinsics.ll b/llvm/test/CodeGen/X86/avx512bf16-intrinsics.ll
index a5767ecf14a53..259e8744bf4f4 100644
--- a/llvm/test/CodeGen/X86/avx512bf16-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512bf16-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512bf16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512bf16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <32 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.512(<16 x float>, <16 x float>) #3
diff --git a/llvm/test/CodeGen/X86/avx512bf16-mov.ll b/llvm/test/CodeGen/X86/avx512bf16-mov.ll
index da52c42a41600..46f8c84dc823d 100644
--- a/llvm/test/CodeGen/X86/avx512bf16-mov.ll
+++ b/llvm/test/CodeGen/X86/avx512bf16-mov.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512bf16 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512bf16 | FileCheck %s --check-prefix=X86
define dso_local void @funbf16(ptr readonly %src, ptr writeonly %dst) {
; X64-LABEL: funbf16:
diff --git a/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics-upgrade.ll
index f51fe141fed21..f38a1a241e17f 100644
--- a/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512bf16 -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512bf16 -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <8 x i16> @llvm.x86.avx512bf16.cvtne2ps2bf16.128(<4 x float>, <4 x float>) #1
diff --git a/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll b/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
index b3c261147c773..49cc03a77354d 100644
--- a/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512bf16-vl-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512bf16 -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512bf16 -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <8 x bfloat> @llvm.x86.avx512bf16.cvtne2ps2bf16.128(<4 x float>, <4 x float>) #1
diff --git a/llvm/test/CodeGen/X86/avx512bw-arith.ll b/llvm/test/CodeGen/X86/avx512bw-arith.ll
index 3ce9704558f1c..aac86d1719290 100644
--- a/llvm/test/CodeGen/X86/avx512bw-arith.ll
+++ b/llvm/test/CodeGen/X86/avx512bw-arith.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s
define <64 x i8> @vpaddb512_test(<64 x i8> %i, <64 x i8> %j) nounwind readnone {
; CHECK-LABEL: vpaddb512_test:
diff --git a/llvm/test/CodeGen/X86/avx512bw-intrinsics-canonical.ll b/llvm/test/CodeGen/X86/avx512bw-intrinsics-canonical.ll
index 21ae182acc6b0..55e232e24d81c 100644
--- a/llvm/test/CodeGen/X86/avx512bw-intrinsics-canonical.ll
+++ b/llvm/test/CodeGen/X86/avx512bw-intrinsics-canonical.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512BW
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mcpu=knl -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512F-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mcpu=knl -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512F-32
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512bw-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx512bw-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx512bw-intrinsics-fast-isel.ll
index ada2c8d53aa53..5517f99bbad47 100644
--- a/llvm/test/CodeGen/X86/avx512bw-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/avx512bw-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512bw-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx512bw-intrinsics.ll b/llvm/test/CodeGen/X86/avx512bw-intrinsics.ll
index 5b58233ac51aa..797fc4f9b8b44 100644
--- a/llvm/test/CodeGen/X86/avx512bw-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512bw-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512bw --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512bw --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512bw --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512bw --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
define i32 @test_int_x86_avx512_kadd_d(<32 x i16> %A, <32 x i16> %B) nounwind {
; CHECK-LABEL: test_int_x86_avx512_kadd_d:
diff --git a/llvm/test/CodeGen/X86/avx512bw-mov.ll b/llvm/test/CodeGen/X86/avx512bw-mov.ll
index 7e2f3620863d7..00c25c73447e0 100644
--- a/llvm/test/CodeGen/X86/avx512bw-mov.ll
+++ b/llvm/test/CodeGen/X86/avx512bw-mov.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s
define <64 x i8> @test1(ptr %addr) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/avx512bw-vec-cmp.ll b/llvm/test/CodeGen/X86/avx512bw-vec-cmp.ll
index 500a71b7dde27..d2ec4217a885a 100644
--- a/llvm/test/CodeGen/X86/avx512bw-vec-cmp.ll
+++ b/llvm/test/CodeGen/X86/avx512bw-vec-cmp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s
define <64 x i8> @test1(<64 x i8> %x, <64 x i8> %y) nounwind {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/avx512bw-vec-test-testn.ll b/llvm/test/CodeGen/X86/avx512bw-vec-test-testn.ll
index b767515bcc953..89425cc66c254 100644
--- a/llvm/test/CodeGen/X86/avx512bw-vec-test-testn.ll
+++ b/llvm/test/CodeGen/X86/avx512bw-vec-test-testn.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s
; Function Attrs: norecurse nounwind readnone
define zeroext i32 @TEST_mm512_test_epi16_mask(<8 x i64> %__A, <8 x i64> %__B) local_unnamed_addr #0 {
diff --git a/llvm/test/CodeGen/X86/avx512bwvl-arith.ll b/llvm/test/CodeGen/X86/avx512bwvl-arith.ll
index a7b93924e6f82..468efb99b3efc 100644
--- a/llvm/test/CodeGen/X86/avx512bwvl-arith.ll
+++ b/llvm/test/CodeGen/X86/avx512bwvl-arith.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=CHECK
; 256-bit
diff --git a/llvm/test/CodeGen/X86/avx512bwvl-intrinsics-canonical.ll b/llvm/test/CodeGen/X86/avx512bwvl-intrinsics-canonical.ll
index e931b5206e423..0848c3bf2fd1e 100644
--- a/llvm/test/CodeGen/X86/avx512bwvl-intrinsics-canonical.ll
+++ b/llvm/test/CodeGen/X86/avx512bwvl-intrinsics-canonical.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512vl --show-mc-encoding| FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512vl --show-mc-encoding| FileCheck %s
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512vlbw-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll
index 00729262473da..527d3494214eb 100644
--- a/llvm/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/avx512bwvl-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512vlbw-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx512bwvl-intrinsics.ll b/llvm/test/CodeGen/X86/avx512bwvl-intrinsics.ll
index 01b153b4fbc61..9eb697491dccb 100644
--- a/llvm/test/CodeGen/X86/avx512bwvl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512bwvl-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512bw,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512bw,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
define <8 x i16> @test_mask_packs_epi32_rr_128(<4 x i32> %a, <4 x i32> %b) {
; CHECK-LABEL: test_mask_packs_epi32_rr_128:
diff --git a/llvm/test/CodeGen/X86/avx512bwvl-mov.ll b/llvm/test/CodeGen/X86/avx512bwvl-mov.ll
index 71b26588833de..2c53631b1a5ad 100644
--- a/llvm/test/CodeGen/X86/avx512bwvl-mov.ll
+++ b/llvm/test/CodeGen/X86/avx512bwvl-mov.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512vl --show-mc-encoding| FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512vl --show-mc-encoding| FileCheck %s
define <32 x i8> @test_256_1(ptr %addr) {
; CHECK-LABEL: test_256_1:
diff --git a/llvm/test/CodeGen/X86/avx512bwvl-vec-cmp.ll b/llvm/test/CodeGen/X86/avx512bwvl-vec-cmp.ll
index ee75083490746..52c04c1be44b6 100644
--- a/llvm/test/CodeGen/X86/avx512bwvl-vec-cmp.ll
+++ b/llvm/test/CodeGen/X86/avx512bwvl-vec-cmp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s
define <32 x i8> @test256_1(<32 x i8> %x, <32 x i8> %y) nounwind {
; CHECK-LABEL: test256_1:
diff --git a/llvm/test/CodeGen/X86/avx512bwvl-vec-test-testn.ll b/llvm/test/CodeGen/X86/avx512bwvl-vec-test-testn.ll
index ecb76b3f9a7a6..bea5518b5ed8c 100644
--- a/llvm/test/CodeGen/X86/avx512bwvl-vec-test-testn.ll
+++ b/llvm/test/CodeGen/X86/avx512bwvl-vec-test-testn.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512BWVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512BW
; Function Attrs: norecurse nounwind readnone
define zeroext i16 @TEST_mm_test_epi8_mask(<2 x i64> %__A, <2 x i64> %__B) local_unnamed_addr #0 {
diff --git a/llvm/test/CodeGen/X86/avx512cd-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx512cd-intrinsics-fast-isel.ll
index 39dbbc5259af7..1e21d55e0dfb3 100644
--- a/llvm/test/CodeGen/X86/avx512cd-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/avx512cd-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i686-unknown -mattr=+avx512cd | FileCheck %s
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown -mattr=+avx512cd | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i686-unknown -mattr=+avx512cd | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown -mattr=+avx512cd | FileCheck %s
define <8 x i64> @test_mm512_broadcastmb_epi64(<8 x i64> %a, <8 x i64> %b) {
; CHECK-LABEL: test_mm512_broadcastmb_epi64:
diff --git a/llvm/test/CodeGen/X86/avx512cd-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx512cd-intrinsics-upgrade.ll
index ce5d2e7e8f348..9869d9d5c5969 100644
--- a/llvm/test/CodeGen/X86/avx512cd-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx512cd-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512cd | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512cd | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx512cd | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512cd | FileCheck %s --check-prefixes=CHECK,X64
declare <16 x i32> @llvm.x86.avx512.mask.conflict.d.512(<16 x i32>, <16 x i32>, i16) nounwind readonly
diff --git a/llvm/test/CodeGen/X86/avx512cd-intrinsics.ll b/llvm/test/CodeGen/X86/avx512cd-intrinsics.ll
index ea248f47f8d1b..ba49e021380af 100644
--- a/llvm/test/CodeGen/X86/avx512cd-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512cd-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512cd | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512cd | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx512cd | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512cd | FileCheck %s --check-prefixes=CHECK,X64
define <16 x i32> @test_conflict_d(<16 x i32> %a) {
; CHECK-LABEL: test_conflict_d:
diff --git a/llvm/test/CodeGen/X86/avx512cdvl-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx512cdvl-intrinsics-upgrade.ll
index 6d1631bff3d85..2fa72c511d992 100644
--- a/llvm/test/CodeGen/X86/avx512cdvl-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx512cdvl-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
declare <4 x i32> @llvm.x86.avx512.mask.lzcnt.d.128(<4 x i32>, <4 x i32>, i8)
diff --git a/llvm/test/CodeGen/X86/avx512cdvl-intrinsics.ll b/llvm/test/CodeGen/X86/avx512cdvl-intrinsics.ll
index 7f3a19d92b4c3..041c1be80c8b9 100644
--- a/llvm/test/CodeGen/X86/avx512cdvl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512cdvl-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
define <4 x i32> @test_int_x86_avx512_mask_vplzcnt_d_128(<4 x i32> %x0, <4 x i32> %x1, i8 %x2) {
; X86-LABEL: test_int_x86_avx512_mask_vplzcnt_d_128:
diff --git a/llvm/test/CodeGen/X86/avx512cfma-intrinsics.ll b/llvm/test/CodeGen/X86/avx512cfma-intrinsics.ll
index 8d9a927818ce9..ed80f3d021fa4 100644
--- a/llvm/test/CodeGen/X86/avx512cfma-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512cfma-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s
declare <4 x float> @llvm.x86.avx512fp16.mask.vfmadd.cph.128(<4 x float>, <4 x float>, <4 x float>, i8)
declare <4 x float> @llvm.x86.avx512fp16.maskz.vfmadd.cph.128(<4 x float>, <4 x float>, <4 x float>, i8)
diff --git a/llvm/test/CodeGen/X86/avx512cfmul-intrinsics.ll b/llvm/test/CodeGen/X86/avx512cfmul-intrinsics.ll
index e37c649a4786d..3edd19ad17361 100644
--- a/llvm/test/CodeGen/X86/avx512cfmul-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512cfmul-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s
declare <4 x float> @llvm.x86.avx512fp16.mask.vfmul.cph.128(<4 x float>, <4 x float>, <4 x float>, i8)
diff --git a/llvm/test/CodeGen/X86/avx512cfmulsh-instrinsics.ll b/llvm/test/CodeGen/X86/avx512cfmulsh-instrinsics.ll
index b60d7a5463d6b..b067974be3f3d 100644
--- a/llvm/test/CodeGen/X86/avx512cfmulsh-instrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512cfmulsh-instrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s
declare <4 x float> @llvm.x86.avx512fp16.mask.vfmul.csh(<4 x float>, <4 x float>, <4 x float>, i8, i32)
declare <4 x float> @llvm.x86.avx512fp16.maskz.vfmul.csh(<4 x float>, <4 x float>, <4 x float>, i8, i32)
diff --git a/llvm/test/CodeGen/X86/avx512copy-intrinsics.ll b/llvm/test/CodeGen/X86/avx512copy-intrinsics.ll
index d09807e4a3346..763de92b03dad 100644
--- a/llvm/test/CodeGen/X86/avx512copy-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512copy-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=AVX102
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx512f | FileCheck %s --check-prefixes=NOAVX512MOVZXC
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefixes=AVX102
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx512f | FileCheck %s --check-prefixes=NOAVX512MOVZXC
define <4 x i32> @test_mm_move_epi32(<4 x i32> %a0) nounwind {
; AVX102-LABEL: test_mm_move_epi32:
diff --git a/llvm/test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll
index 8a0428d022b6d..1c1d070961cd4 100644
--- a/llvm/test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <2 x double> @llvm.x86.avx512.mask.vextractf64x2.512(<8 x double>, i32, <2 x double>, i8)
diff --git a/llvm/test/CodeGen/X86/avx512dq-intrinsics.ll b/llvm/test/CodeGen/X86/avx512dq-intrinsics.ll
index 70f60c802a2d5..ef117b7d062d6 100644
--- a/llvm/test/CodeGen/X86/avx512dq-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512dq-intrinsics.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86,X86-AVX512DQ
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86,X86-AVX512DQVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX512DQVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86,X86-AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86,X86-AVX512DQVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX512DQVL
define i32 @test_int_x86_avx512_kadd_w(<16 x i32> %A, <16 x i32> %B) nounwind {
; CHECK-LABEL: test_int_x86_avx512_kadd_w:
diff --git a/llvm/test/CodeGen/X86/avx512dqvl-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx512dqvl-intrinsics-upgrade.ll
index 6f3be88d7cd0c..64d9e5036f8fa 100644
--- a/llvm/test/CodeGen/X86/avx512dqvl-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx512dqvl-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
define <4 x float> @test_mask_andnot_ps_rr_128(<4 x float> %a, <4 x float> %b) {
; CHECK-LABEL: test_mask_andnot_ps_rr_128:
diff --git a/llvm/test/CodeGen/X86/avx512dqvl-intrinsics.ll b/llvm/test/CodeGen/X86/avx512dqvl-intrinsics.ll
index ec94b593148df..c4639df6892d8 100644
--- a/llvm/test/CodeGen/X86/avx512dqvl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512dqvl-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <2 x i64> @llvm.x86.avx512.mask.cvtpd2qq.128(<2 x double>, <2 x i64>, i8)
diff --git a/llvm/test/CodeGen/X86/avx512f-large-stack.ll b/llvm/test/CodeGen/X86/avx512f-large-stack.ll
index 3cb5391c56abf..bb29832b63cdd 100644
--- a/llvm/test/CodeGen/X86/avx512f-large-stack.ll
+++ b/llvm/test/CodeGen/X86/avx512f-large-stack.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --version 4
-; RUN: llc -O0 -mtriple=x86_64 -mattr=+avx512f -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64 -mattr=+avx512f -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK
define void @f(i16 %LGV2, i1 %LGV3) {
; CHECK-LABEL: f:
; CHECK: # %bb.0: # %BB
diff --git a/llvm/test/CodeGen/X86/avx512fp16-arith-intrinsics.ll b/llvm/test/CodeGen/X86/avx512fp16-arith-intrinsics.ll
index 64de098bcd15c..d872a89f04072 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-arith-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-arith-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unkown-unkown -mattr=+avx512bw -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unkown-unkown -mattr=+avx512bw -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s
declare <32 x half> @llvm.x86.avx512fp16.add.ph.512(<32 x half>, <32 x half>, i32)
diff --git a/llvm/test/CodeGen/X86/avx512fp16-arith-vl-intrinsics.ll b/llvm/test/CodeGen/X86/avx512fp16-arith-vl-intrinsics.ll
index 7092345382162..784891562563f 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-arith-vl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-arith-vl-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unkown-unkown -mattr=+avx512bw -mattr=+avx512vl -mattr=+avx512fp16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unkown-unkown -mattr=+avx512bw -mattr=+avx512vl -mattr=+avx512fp16 | FileCheck %s
define <16 x half> @test_int_x86_avx512fp16_add_ph_256(<16 x half> %x1, <16 x half> %x2) {
; CHECK-LABEL: test_int_x86_avx512fp16_add_ph_256:
diff --git a/llvm/test/CodeGen/X86/avx512fp16-arith.ll b/llvm/test/CodeGen/X86/avx512fp16-arith.ll
index 9f74316f3c918..fabbc277ee294 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-arith.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-arith.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx -mattr=+avx512fp16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skx -mattr=+avx512fp16 | FileCheck %s
define <32 x half> @vaddph_512_test(<32 x half> %i, <32 x half> %j) nounwind readnone {
; CHECK-LABEL: vaddph_512_test:
diff --git a/llvm/test/CodeGen/X86/avx512fp16-combine-vfmac-fadd.ll b/llvm/test/CodeGen/X86/avx512fp16-combine-vfmac-fadd.ll
index 5d720109ebc4a..aac986c63b0ae 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-combine-vfmac-fadd.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-combine-vfmac-fadd.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl | FileCheck %s
; FADD(acc, FMA(a, b, +0.0)) can be combined to FMA(a, b, acc) if the nsz flag set.
define dso_local <32 x half> @test1(<32 x half> %acc, <32 x half> %a, <32 x half> %b) {
diff --git a/llvm/test/CodeGen/X86/avx512fp16-combine-vfmulc-fadd.ll b/llvm/test/CodeGen/X86/avx512fp16-combine-vfmulc-fadd.ll
index 1147d7945c694..8e2b84b56c3b7 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-combine-vfmulc-fadd.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-combine-vfmulc-fadd.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl | FileCheck %s
define dso_local <32 x half> @test1(<32 x half> %acc.coerce, <32 x half> %lhs.coerce, <32 x half> %rhs.coerce) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc-fadd.ll b/llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc-fadd.ll
index 1c4d9c6535761..0d99cfc3fd01d 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc-fadd.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc-fadd.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl | FileCheck %s
define dso_local <32 x half> @test1(<32 x half> %acc.coerce, <32 x half> %lhs.coerce.conj, <32 x half> %rhs.coerce) local_unnamed_addr #0 {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll b/llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll
index a8ff969c3c05f..8ea4b289f9f65 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-combine-xor-vfmulc.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl | FileCheck %s
define dso_local <32 x half> @test1(<32 x half> %lhs.coerce.conj, <32 x half> %rhs.coerce) local_unnamed_addr #0 {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/avx512fp16-cvt-ph-w-intrinsics.ll b/llvm/test/CodeGen/X86/avx512fp16-cvt-ph-w-intrinsics.ll
index cd455bf6d541f..cf50cfacee110 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-cvt-ph-w-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-cvt-ph-w-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unkown-unkown -mattr=+avx512bw -mattr=+avx512fp16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unkown-unkown -mattr=+avx512bw -mattr=+avx512fp16 | FileCheck %s
declare <32 x half> @llvm.x86.avx512.sitofp.round.v32f16.v32i16(<32 x i16>, i32)
diff --git a/llvm/test/CodeGen/X86/avx512fp16-cvt-ph-w-vl-intrinsics.ll b/llvm/test/CodeGen/X86/avx512fp16-cvt-ph-w-vl-intrinsics.ll
index c306bfdd0c614..60000200c8189 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-cvt-ph-w-vl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-cvt-ph-w-vl-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unkown-unkown -mattr=+avx512bw -mattr=+avx512vl -mattr=+avx512fp16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unkown-unkown -mattr=+avx512bw -mattr=+avx512vl -mattr=+avx512fp16 | FileCheck %s
define <16 x half> @test_int_x86_avx512fp16_mask_cvtw2ph_256(<16 x i16> %arg0, <16 x half> %arg1, i16 %mask) {
; CHECK-LABEL: test_int_x86_avx512fp16_mask_cvtw2ph_256:
diff --git a/llvm/test/CodeGen/X86/avx512fp16-cvt.ll b/llvm/test/CodeGen/X86/avx512fp16-cvt.ll
index cc58bc1e44f37..fee62d87ea805 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-cvt.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-cvt.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
define half @f32tof16(float %b) nounwind {
; X64-LABEL: f32tof16:
diff --git a/llvm/test/CodeGen/X86/avx512fp16-fma-commute.ll b/llvm/test/CodeGen/X86/avx512fp16-fma-commute.ll
index 78dc44a32711d..3e63ff87d16cf 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-fma-commute.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-fma-commute.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s --mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s --mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl | FileCheck %s
declare half @llvm.fma.f16(half, half, half)
declare <8 x half> @llvm.fma.v8f16(<8 x half>, <8 x half>, <8 x half>)
diff --git a/llvm/test/CodeGen/X86/avx512fp16-fma-intrinsics.ll b/llvm/test/CodeGen/X86/avx512fp16-fma-intrinsics.ll
index 3d4fa9e2cc6fa..3bd1b6629e96b 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-fma-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-fma-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <32 x half> @llvm.x86.avx512fp16.vfmadd.ph.512(<32 x half>, <32 x half>, <32 x half>, i32)
diff --git a/llvm/test/CodeGen/X86/avx512fp16-fmaxnum.ll b/llvm/test/CodeGen/X86/avx512fp16-fmaxnum.ll
index d2507b32446b6..c43e7f196d46b 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-fmaxnum.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-fmaxnum.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs --show-mc-encoding -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,avx512vl | FileCheck %s --check-prefixes=CHECK,HasVL
-; RUN: llc < %s -verify-machineinstrs --show-mc-encoding -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 | FileCheck %s --check-prefixes=CHECK,NOVL
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs --show-mc-encoding -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,avx512vl | FileCheck %s --check-prefixes=CHECK,HasVL
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs --show-mc-encoding -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 | FileCheck %s --check-prefixes=CHECK,NOVL
declare half @llvm.maxnum.f16(half, half)
declare <2 x half> @llvm.maxnum.v2f16(<2 x half>, <2 x half>)
diff --git a/llvm/test/CodeGen/X86/avx512fp16-fminimum-fmaximum.ll b/llvm/test/CodeGen/X86/avx512fp16-fminimum-fmaximum.ll
index 626d2e807ee9d..4e4bdee49eed2 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-fminimum-fmaximum.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-fminimum-fmaximum.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s
declare half @llvm.minimum.f16(half, half)
declare half @llvm.maximum.f16(half, half)
diff --git a/llvm/test/CodeGen/X86/avx512fp16-fminnum.ll b/llvm/test/CodeGen/X86/avx512fp16-fminnum.ll
index 06ba4b4b85d51..69ca45bf21c3c 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-fminnum.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-fminnum.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs --show-mc-encoding -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=CHECK,HasVL
-; RUN: llc < %s -verify-machineinstrs --show-mc-encoding -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 | FileCheck %s --check-prefixes=CHECK,NOVL
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs --show-mc-encoding -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=CHECK,HasVL
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs --show-mc-encoding -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 | FileCheck %s --check-prefixes=CHECK,NOVL
declare half @llvm.minnum.f16(half, half)
declare <2 x half> @llvm.minnum.v2f16(<2 x half>, <2 x half>)
diff --git a/llvm/test/CodeGen/X86/avx512fp16-fold-load-binops.ll b/llvm/test/CodeGen/X86/avx512fp16-fold-load-binops.ll
index 4a5c1fe5a2a04..3b6fda1354a02 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-fold-load-binops.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-fold-load-binops.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 < %s | FileCheck %s
; Verify that we're folding the load into the math instruction.
; This pattern is generated out of the simplest intrinsics usage:
diff --git a/llvm/test/CodeGen/X86/avx512fp16-fold-xmm-zero.ll b/llvm/test/CodeGen/X86/avx512fp16-fold-xmm-zero.ll
index 33d4cc164fb68..421e6f83e173f 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-fold-xmm-zero.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-fold-xmm-zero.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-macosx10.6.7 -mattr=+avx512fp16 -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-macosx10.6.7 -mattr=+avx512fp16 -no-integrated-as | FileCheck %s
; Simple test to make sure folding for special constants (like half zero)
; isn't completely broken.
diff --git a/llvm/test/CodeGen/X86/avx512fp16-fp-logic.ll b/llvm/test/CodeGen/X86/avx512fp16-fp-logic.ll
index f4c20b3b9b425..7f2f85a5e6f4a 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-fp-logic.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-fp-logic.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl < %s | FileCheck %s
; Test cases derived from float/double tests in fp-logic.ll
diff --git a/llvm/test/CodeGen/X86/avx512fp16-frem.ll b/llvm/test/CodeGen/X86/avx512fp16-frem.ll
index 2164c2460f6d7..fac3c6bb2b437 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-frem.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-frem.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl | FileCheck %s
define half @frem(half %x, half %y) nounwind {
; CHECK-LABEL: frem:
diff --git a/llvm/test/CodeGen/X86/avx512fp16-insert-extract.ll b/llvm/test/CodeGen/X86/avx512fp16-insert-extract.ll
index 73a2dff7dab04..7ec0414dbea12 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-insert-extract.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-insert-extract.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=CHECK
define <8 x half> @extract_v16f16_v8f16_0(<16 x half> %x) {
; CHECK-LABEL: extract_v16f16_v8f16_0:
diff --git a/llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll b/llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll
index 44ea3ce64ccf4..73cc9c2ea94fc 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 | FileCheck %s
declare i32 @llvm.x86.avx512fp16.vcomi.sh(<8 x half>, <8 x half>, i32, i32)
diff --git a/llvm/test/CodeGen/X86/avx512fp16-machine-combiner.ll b/llvm/test/CodeGen/X86/avx512fp16-machine-combiner.ll
index 904a230ddc073..98add9b57547c 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-machine-combiner.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-machine-combiner.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx512fp16,avx512vl -machine-combiner-verify-pattern-order=true < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx512fp16,avx512vl -machine-combiner-verify-pattern-order=true < %s | FileCheck %s
; Incremental updates of the instruction depths should be enough for this test
; case.
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx512fp16,avx512vl -machine-combiner-inc-threshold=0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx512fp16,avx512vl -machine-combiner-inc-threshold=0 < %s | FileCheck %s
; Verify that the first two adds are independent regardless of how the inputs are
; commuted. The destination registers are used as source registers for the third add.
diff --git a/llvm/test/CodeGen/X86/avx512fp16-mscatter.ll b/llvm/test/CodeGen/X86/avx512fp16-mscatter.ll
index fd7212623c79d..381a69010390a 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-mscatter.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-mscatter.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unkown-unkown -mattr=+avx512bw -mattr=+avx512vl -mattr=+avx512fp16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unkown-unkown -mattr=+avx512bw -mattr=+avx512vl -mattr=+avx512fp16 | FileCheck %s
define void @test_mscatter_v16f16(ptr %base, <16 x i32> %index, <16 x half> %val)
; CHECK-LABEL: test_mscatter_v16f16:
diff --git a/llvm/test/CodeGen/X86/avx512fp16-novl.ll b/llvm/test/CodeGen/X86/avx512fp16-novl.ll
index d17cacc0e1ad7..1fbace0d3c84d 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-novl.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-novl.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64 -mattr=+avx512fp16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+avx512fp16 | FileCheck %s
define <2 x half> @vector_sint64ToHalf(<2 x i64> %int64) {
; CHECK-LABEL: vector_sint64ToHalf:
diff --git a/llvm/test/CodeGen/X86/avx512fp16-rndscale.ll b/llvm/test/CodeGen/X86/avx512fp16-rndscale.ll
index e4f9d94759276..d248832acf628 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-rndscale.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-rndscale.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512fp16,+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512fp16,+avx512vl | FileCheck %s
declare <8 x half> @llvm.ceil.v8f16(<8 x half>)
declare <16 x half> @llvm.ceil.v16f16(<16 x half>)
diff --git a/llvm/test/CodeGen/X86/avx512fp16-scalar.ll b/llvm/test/CodeGen/X86/avx512fp16-scalar.ll
index 36145e86469aa..e4f3c6a20adb9 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-scalar.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-scalar.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512fp16 --show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512fp16 --show-mc-encoding | FileCheck %s
declare half @llvm.ceil.f16(half)
declare half @llvm.floor.f16(half)
diff --git a/llvm/test/CodeGen/X86/avx512fp16-subv-broadcast-fp16.ll b/llvm/test/CodeGen/X86/avx512fp16-subv-broadcast-fp16.ll
index 8c32e650da8ff..b48cc4d016662 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-subv-broadcast-fp16.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-subv-broadcast-fp16.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx -mattr=+avx512fp16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skx -mattr=+avx512fp16 | FileCheck %s
define dso_local void @test_v8f16_v32f16(ptr %x_addr, ptr %y_addr) {
; CHECK-LABEL: test_v8f16_v32f16:
diff --git a/llvm/test/CodeGen/X86/avx512fp16-unsafe-fp-math.ll b/llvm/test/CodeGen/X86/avx512fp16-unsafe-fp-math.ll
index 93083ecf90617..93d72e9cd80c9 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-unsafe-fp-math.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-unsafe-fp-math.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64 -mattr=+avx512fp16,+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+avx512fp16,+avx512vl | FileCheck %s
define <32 x half> @test_max_v32f16(ptr %a_ptr, <32 x half> %b) {
; CHECK-LABEL: test_max_v32f16:
diff --git a/llvm/test/CodeGen/X86/avx512fp16vl-fma-intrinsics.ll b/llvm/test/CodeGen/X86/avx512fp16vl-fma-intrinsics.ll
index 5c0a05132f4cf..bfda110094459 100644
--- a/llvm/test/CodeGen/X86/avx512fp16vl-fma-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16vl-fma-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl -mattr=+avx512fp16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -mattr=+avx512fp16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl -mattr=+avx512fp16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -mattr=+avx512fp16 --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
define <16 x half> @test_x86_vfnmadd_ph_z_256(<16 x half> %a0, <16 x half> %a1, <16 x half> %a2) {
diff --git a/llvm/test/CodeGen/X86/avx512fp16vl-intrinsics.ll b/llvm/test/CodeGen/X86/avx512fp16vl-intrinsics.ll
index 47bfea91f58dd..8c75d0c20f2cb 100644
--- a/llvm/test/CodeGen/X86/avx512fp16vl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16vl-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -mattr=+avx512fp16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -mattr=+avx512fp16 | FileCheck %s
define signext i16 @test_mm_cvtsi128_si16(<2 x i64> %A) local_unnamed_addr #0 {
; CHECK-LABEL: test_mm_cvtsi128_si16:
diff --git a/llvm/test/CodeGen/X86/avx512ifma-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx512ifma-intrinsics-fast-isel.ll
index d54784c71992b..81c7a50c81af0 100644
--- a/llvm/test/CodeGen/X86/avx512ifma-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/avx512ifma-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+avx512ifma | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+avx512ifma | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512ifma-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx512ifma-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx512ifma-intrinsics-upgrade.ll
index 41ad4662f5ee0..0bb3d6eeef8d0 100644
--- a/llvm/test/CodeGen/X86/avx512ifma-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx512ifma-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512ifma --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512ifma --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <8 x i64> @llvm.x86.avx512.mask.vpmadd52h.uq.512(<8 x i64>, <8 x i64>, <8 x i64>, i8)
diff --git a/llvm/test/CodeGen/X86/avx512ifma-intrinsics.ll b/llvm/test/CodeGen/X86/avx512ifma-intrinsics.ll
index 4ef63cfb6abb8..7fd67b57f54a6 100644
--- a/llvm/test/CodeGen/X86/avx512ifma-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512ifma-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512ifma --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512ifma --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <8 x i64> @llvm.x86.avx512.vpmadd52h.uq.512(<8 x i64>, <8 x i64>, <8 x i64>)
diff --git a/llvm/test/CodeGen/X86/avx512ifmavl-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx512ifmavl-intrinsics-fast-isel.ll
index 4ee81405f608d..d0969fcbd6f9a 100644
--- a/llvm/test/CodeGen/X86/avx512ifmavl-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/avx512ifmavl-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+avx512ifma,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+avx512ifma,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512ifmavl-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx512ifmavl-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx512ifmavl-intrinsics-upgrade.ll
index 0d59948caafde..080c3ab23abe3 100644
--- a/llvm/test/CodeGen/X86/avx512ifmavl-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx512ifmavl-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512ifma,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512ifma,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <2 x i64> @llvm.x86.avx512.mask.vpmadd52h.uq.128(<2 x i64>, <2 x i64>, <2 x i64>, i8)
diff --git a/llvm/test/CodeGen/X86/avx512ifmavl-intrinsics.ll b/llvm/test/CodeGen/X86/avx512ifmavl-intrinsics.ll
index 26e269d2d8116..5596a2e2eeb66 100644
--- a/llvm/test/CodeGen/X86/avx512ifmavl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512ifmavl-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512ifma,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512ifma,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64>, <2 x i64>, <2 x i64>)
diff --git a/llvm/test/CodeGen/X86/avx512vbmi-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx512vbmi-intrinsics-fast-isel.ll
index 8eb9a7c3866b5..9277bf3c9e0e6 100644
--- a/llvm/test/CodeGen/X86/avx512vbmi-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/avx512vbmi-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512vbmi | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512vbmi | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512vbmi-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx512vbmi-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx512vbmi-intrinsics-upgrade.ll
index 746e3858333e6..0037398098fa0 100644
--- a/llvm/test/CodeGen/X86/avx512vbmi-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx512vbmi-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <64 x i8> @llvm.x86.avx512.mask.permvar.qi.512(<64 x i8>, <64 x i8>, <64 x i8>, i64)
diff --git a/llvm/test/CodeGen/X86/avx512vbmi-intrinsics.ll b/llvm/test/CodeGen/X86/avx512vbmi-intrinsics.ll
index 0df1a1dd75f3f..4d9e33438c517 100644
--- a/llvm/test/CodeGen/X86/avx512vbmi-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512vbmi-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <64 x i8> @llvm.x86.avx512.permvar.qi.512(<64 x i8>, <64 x i8>)
diff --git a/llvm/test/CodeGen/X86/avx512vbmi2-funnel-shifts.ll b/llvm/test/CodeGen/X86/avx512vbmi2-funnel-shifts.ll
index 6330f1022fc46..06b79b43fb081 100644
--- a/llvm/test/CodeGen/X86/avx512vbmi2-funnel-shifts.ll
+++ b/llvm/test/CodeGen/X86/avx512vbmi2-funnel-shifts.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi2 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi2 -| FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi2 -| FileCheck %s --check-prefixes=CHECK,X64
define <8 x i64> @avx512_funnel_shift_q_512(<8 x i64> %a0, <8 x i64> %a1) {
; X86-LABEL: avx512_funnel_shift_q_512:
diff --git a/llvm/test/CodeGen/X86/avx512vbmi2-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx512vbmi2-intrinsics-fast-isel.ll
index a05b2a36183cc..c69c6493a5000 100644
--- a/llvm/test/CodeGen/X86/avx512vbmi2-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/avx512vbmi2-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512vbmi2 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512vbmi2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi2 | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512vbmi2-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx512vbmi2vl-funnel-shifts.ll b/llvm/test/CodeGen/X86/avx512vbmi2vl-funnel-shifts.ll
index dbb94a7c3985b..fd3e66c68ed8d 100644
--- a/llvm/test/CodeGen/X86/avx512vbmi2vl-funnel-shifts.ll
+++ b/llvm/test/CodeGen/X86/avx512vbmi2vl-funnel-shifts.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi2,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi2,+avx512vl -| FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi2,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi2,+avx512vl -| FileCheck %s --check-prefixes=CHECK,X64
define <2 x i64> @avx512_funnel_shift_q_128(<2 x i64> %a0, <2 x i64> %a1) {
; X86-LABEL: avx512_funnel_shift_q_128:
diff --git a/llvm/test/CodeGen/X86/avx512vbmi2vl-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx512vbmi2vl-intrinsics-fast-isel.ll
index 4e69fcdc2fd07..d22d1b5a9221b 100644
--- a/llvm/test/CodeGen/X86/avx512vbmi2vl-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/avx512vbmi2vl-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512vlvbmi2-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx512vbmi2vl-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx512vbmi2vl-intrinsics-upgrade.ll
index 1bcac8ff553d1..07b162db8d4de 100644
--- a/llvm/test/CodeGen/X86/avx512vbmi2vl-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx512vbmi2vl-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi2,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi2,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi2,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi2,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
define <8 x i16> @test_mask_expand_load_w_128(ptr %addr, <8 x i16> %data, i8 %mask) {
; X86-LABEL: test_mask_expand_load_w_128:
diff --git a/llvm/test/CodeGen/X86/avx512vbmi2vl-intrinsics.ll b/llvm/test/CodeGen/X86/avx512vbmi2vl-intrinsics.ll
index 9223885730d04..0e5fd7e4270f7 100644
--- a/llvm/test/CodeGen/X86/avx512vbmi2vl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512vbmi2vl-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi2,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi2,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi2,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi2,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
define <8 x i16> @test_mask_expand_load_w_128(ptr %addr, <8 x i16> %data, i8 %mask) {
; X86-LABEL: test_mask_expand_load_w_128:
diff --git a/llvm/test/CodeGen/X86/avx512vbmivl-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx512vbmivl-intrinsics-fast-isel.ll
index 896a30af5f45b..5f5a4ef68e3ed 100644
--- a/llvm/test/CodeGen/X86/avx512vbmivl-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/avx512vbmivl-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512vlvbmi-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx512vbmivl-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx512vbmivl-intrinsics-upgrade.ll
index 57479666506ab..3d10a66af4a7e 100644
--- a/llvm/test/CodeGen/X86/avx512vbmivl-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx512vbmivl-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <16 x i8> @llvm.x86.avx512.mask.permvar.qi.128(<16 x i8>, <16 x i8>, <16 x i8>, i16)
diff --git a/llvm/test/CodeGen/X86/avx512vbmivl-intrinsics.ll b/llvm/test/CodeGen/X86/avx512vbmivl-intrinsics.ll
index 748c35a3afcb9..e68cd8d697aa9 100644
--- a/llvm/test/CodeGen/X86/avx512vbmivl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512vbmivl-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vbmi,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <16 x i8> @llvm.x86.avx512.permvar.qi.128(<16 x i8>, <16 x i8>)
diff --git a/llvm/test/CodeGen/X86/avx512vl-arith.ll b/llvm/test/CodeGen/X86/avx512vl-arith.ll
index b03a8c1a4f51b..568fec15f0177 100644
--- a/llvm/test/CodeGen/X86/avx512vl-arith.ll
+++ b/llvm/test/CodeGen/X86/avx512vl-arith.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl --show-mc-encoding| FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl,-evex512 --show-mc-encoding| FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl --show-mc-encoding| FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl,-evex512 --show-mc-encoding| FileCheck %s
; 256-bit
diff --git a/llvm/test/CodeGen/X86/avx512vl-intrinsics-canonical.ll b/llvm/test/CodeGen/X86/avx512vl-intrinsics-canonical.ll
index 73681b26415c0..03340341a6368 100644
--- a/llvm/test/CodeGen/X86/avx512vl-intrinsics-canonical.ll
+++ b/llvm/test/CodeGen/X86/avx512vl-intrinsics-canonical.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefix=X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/avx512vl-builtins.c
diff --git a/llvm/test/CodeGen/X86/avx512vl-intrinsics.ll b/llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
index 7fe32c293420d..12450cd654da4 100644
--- a/llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
define <2 x double> @test_mask_compress_pd_128(<2 x double> %data, <2 x double> %passthru, i8 %mask) {
; X86-LABEL: test_mask_compress_pd_128:
diff --git a/llvm/test/CodeGen/X86/avx512vl-logic.ll b/llvm/test/CodeGen/X86/avx512vl-logic.ll
index c1ae0e36c2c0d..6d860fc78063d 100644
--- a/llvm/test/CodeGen/X86/avx512vl-logic.ll
+++ b/llvm/test/CodeGen/X86/avx512vl-logic.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx -mattr=+avx512vl | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skx -mattr=+avx512vl | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
; 256-bit
diff --git a/llvm/test/CodeGen/X86/avx512vl-mov.ll b/llvm/test/CodeGen/X86/avx512vl-mov.ll
index a86c6a726f016..2c8e4129abebe 100644
--- a/llvm/test/CodeGen/X86/avx512vl-mov.ll
+++ b/llvm/test/CodeGen/X86/avx512vl-mov.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl --show-mc-encoding| FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512vl --show-mc-encoding| FileCheck %s
define <8 x i32> @test_256_1(ptr %addr) {
; CHECK-LABEL: test_256_1:
diff --git a/llvm/test/CodeGen/X86/avx512vl-nontemporal.ll b/llvm/test/CodeGen/X86/avx512vl-nontemporal.ll
index 750364db1a65b..bb0340fa8fd07 100644
--- a/llvm/test/CodeGen/X86/avx512vl-nontemporal.ll
+++ b/llvm/test/CodeGen/X86/avx512vl-nontemporal.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx --show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skx --show-mc-encoding | FileCheck %s
define i32 @f256(<8 x float> %A, <8 x float> %AA, ptr %B, <4 x double> %C, <4 x double> %CC, i32 %D, <4 x i64> %E, <4 x i64> %EE, ptr %loadptr) {
; CHECK-LABEL: f256:
diff --git a/llvm/test/CodeGen/X86/avx512vl-vbroadcast.ll b/llvm/test/CodeGen/X86/avx512vl-vbroadcast.ll
index 485e3f635e23b..9c24e52b8e320 100644
--- a/llvm/test/CodeGen/X86/avx512vl-vbroadcast.ll
+++ b/llvm/test/CodeGen/X86/avx512vl-vbroadcast.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f -mattr=+avx512vl| FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f -mattr=+avx512vl| FileCheck %s
declare void @func_f32(float)
define <8 x float> @_256_broadcast_ss_spill(float %x) {
diff --git a/llvm/test/CodeGen/X86/avx512vl-vec-cmp.ll b/llvm/test/CodeGen/X86/avx512vl-vec-cmp.ll
index 5b09e45b6fcf1..dcafb7f0b7d40 100644
--- a/llvm/test/CodeGen/X86/avx512vl-vec-cmp.ll
+++ b/llvm/test/CodeGen/X86/avx512vl-vec-cmp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=VLX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefix=NoVLX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=VLX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefix=NoVLX
define <4 x i64> @test256_1(<4 x i64> %x, <4 x i64> %y) nounwind {
; VLX-LABEL: test256_1:
diff --git a/llvm/test/CodeGen/X86/avx512vl-vec-test-testn.ll b/llvm/test/CodeGen/X86/avx512vl-vec-test-testn.ll
index ae74be241d5a0..e6bb41f1a485a 100644
--- a/llvm/test/CodeGen/X86/avx512vl-vec-test-testn.ll
+++ b/llvm/test/CodeGen/X86/avx512vl-vec-test-testn.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512VL --check-prefix=AVX512VL-X64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512VL --check-prefix=AVX512VL-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F --check-prefix=AVX512F-X64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F --check-prefix=AVX512F-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512VL --check-prefix=AVX512VL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512VL --check-prefix=AVX512VL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F --check-prefix=AVX512F-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F --check-prefix=AVX512F-X86
; Function Attrs: norecurse nounwind readnone
define zeroext i8 @TEST_mm_test_epi64_mask(<2 x i64> %__A, <2 x i64> %__B) local_unnamed_addr #0 {
diff --git a/llvm/test/CodeGen/X86/avx512vl-vpclmulqdq.ll b/llvm/test/CodeGen/X86/avx512vl-vpclmulqdq.ll
index 05910a263a471..58b54beeecd5e 100644
--- a/llvm/test/CodeGen/X86/avx512vl-vpclmulqdq.ll
+++ b/llvm/test/CodeGen/X86/avx512vl-vpclmulqdq.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+vpclmulqdq -show-mc-encoding | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+vpclmulqdq -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+vpclmulqdq -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl,+vpclmulqdq -show-mc-encoding | FileCheck %s
define <2 x i64> @test_x86_pclmulqdq(<2 x i64> %a0, <2 x i64> %a1) {
; CHECK-LABEL: test_x86_pclmulqdq:
diff --git a/llvm/test/CodeGen/X86/avx512vl_vnni-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx512vl_vnni-intrinsics-upgrade.ll
index 0855baf2e1ba1..c3b826bf0f2e3 100644
--- a/llvm/test/CodeGen/X86/avx512vl_vnni-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx512vl_vnni-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vnni,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vnni,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <8 x i32> @llvm.x86.avx512.mask.vpdpbusd.256(<8 x i32>, <8 x i32>, <8 x i32>, i8)
declare <8 x i32> @llvm.x86.avx512.maskz.vpdpbusd.256(<8 x i32>, <8 x i32>, <8 x i32>, i8)
diff --git a/llvm/test/CodeGen/X86/avx512vl_vnni-intrinsics.ll b/llvm/test/CodeGen/X86/avx512vl_vnni-intrinsics.ll
index ddf0050dbd74a..2447bed12851d 100644
--- a/llvm/test/CodeGen/X86/avx512vl_vnni-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512vl_vnni-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vnni,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vnni,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni,+avx512vl --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <8 x i32> @llvm.x86.avx512.vpdpbusd.256(<8 x i32>, <32 x i8>, <32 x i8>)
diff --git a/llvm/test/CodeGen/X86/avx512vlcd-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/avx512vlcd-intrinsics-fast-isel.ll
index 56d28338103ca..cc6b13fb35302 100644
--- a/llvm/test/CodeGen/X86/avx512vlcd-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/avx512vlcd-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s
define <2 x i64> @test_mm_broadcastmb_epi64(<2 x i64> %a, <2 x i64> %b) {
; CHECK-LABEL: test_mm_broadcastmb_epi64:
diff --git a/llvm/test/CodeGen/X86/avx512vlvp2intersect-intrinsics.ll b/llvm/test/CodeGen/X86/avx512vlvp2intersect-intrinsics.ll
index 9741972767bcd..76c570263e888 100644
--- a/llvm/test/CodeGen/X86/avx512vlvp2intersect-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512vlvp2intersect-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vp2intersect,+avx512vl --show-mc-encoding | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vp2intersect,+avx512vl --show-mc-encoding | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vp2intersect,+avx512vl --show-mc-encoding | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vp2intersect,+avx512vl --show-mc-encoding | FileCheck %s --check-prefix=X64
define void @test_mm256_2intersect_epi32(<4 x i64> %a, <4 x i64> %b, ptr nocapture %m0, ptr nocapture %m1) {
; X86-LABEL: test_mm256_2intersect_epi32:
diff --git a/llvm/test/CodeGen/X86/avx512vnni-combine.ll b/llvm/test/CodeGen/X86/avx512vnni-combine.ll
index b7d950e994241..7a6ca49d5db4a 100644
--- a/llvm/test/CodeGen/X86/avx512vnni-combine.ll
+++ b/llvm/test/CodeGen/X86/avx512vnni-combine.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -verify-machineinstrs | FileCheck %s
define <8 x i64> @foo_reg_512(<8 x i64> %0, <8 x i64> %1, <8 x i64> %2, <8 x i64> %3, <8 x i64> %4, <8 x i64> %5) {
; CHECK-LABEL: foo_reg_512:
diff --git a/llvm/test/CodeGen/X86/avx512vnni-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx512vnni-intrinsics-upgrade.ll
index 2aabfab1c8666..7bfa90e6d415d 100644
--- a/llvm/test/CodeGen/X86/avx512vnni-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx512vnni-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vnni --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vnni --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <16 x i32> @llvm.x86.avx512.vpdpbusd.512(<16 x i32>, <16 x i32>, <16 x i32>, i16)
diff --git a/llvm/test/CodeGen/X86/avx512vnni-intrinsics.ll b/llvm/test/CodeGen/X86/avx512vnni-intrinsics.ll
index e97b8a5c5503f..bb5e96392bc7a 100644
--- a/llvm/test/CodeGen/X86/avx512vnni-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512vnni-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vnni --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vnni --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni --show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64
declare <16 x i32> @llvm.x86.avx512.vpdpbusd.512(<16 x i32>, <64 x i8>, <64 x i8>)
diff --git a/llvm/test/CodeGen/X86/avx512vnni.ll b/llvm/test/CodeGen/X86/avx512vnni.ll
index 8f954370015a4..c7bdabb86e26d 100644
--- a/llvm/test/CodeGen/X86/avx512vnni.ll
+++ b/llvm/test/CodeGen/X86/avx512vnni.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni,+avx512vl,+avx512bw | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni,+avx512vl,+avx512bw | FileCheck %s --check-prefixes=CHECK
define <16 x i32> @test_pmaddwd_v32i16_add_v16i32(<16 x i32> %a0, <32 x i16> %a1, <32 x i16> %a2) {
; CHECK-LABEL: test_pmaddwd_v32i16_add_v16i32:
diff --git a/llvm/test/CodeGen/X86/avx512vp2intersect-intrinsics.ll b/llvm/test/CodeGen/X86/avx512vp2intersect-intrinsics.ll
index 28e3d6dd5d849..f0a081c449615 100644
--- a/llvm/test/CodeGen/X86/avx512vp2intersect-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512vp2intersect-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vp2intersect --show-mc-encoding | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vp2intersect --show-mc-encoding | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vp2intersect --show-mc-encoding | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vp2intersect --show-mc-encoding | FileCheck %s --check-prefix=X64
define void @test_mm512_2intersect_epi32(<8 x i64> %a, <8 x i64> %b, ptr nocapture %m0, ptr nocapture %m1) {
; X86-LABEL: test_mm512_2intersect_epi32:
diff --git a/llvm/test/CodeGen/X86/avx512vpopcntdq-intrinsics.ll b/llvm/test/CodeGen/X86/avx512vpopcntdq-intrinsics.ll
index c58fa4b3325f1..1c5bd3e88fa7f 100644
--- a/llvm/test/CodeGen/X86/avx512vpopcntdq-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx512vpopcntdq-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vpopcntdq --show-mc-encoding | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq --show-mc-encoding | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vpopcntdq --show-mc-encoding | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq --show-mc-encoding | FileCheck %s --check-prefix=X64
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; The following tests check that patterns that includes ;;
diff --git a/llvm/test/CodeGen/X86/avx_vnni-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avx_vnni-intrinsics-upgrade.ll
index f359ecef8ceb3..a399d99a5550b 100644
--- a/llvm/test/CodeGen/X86/avx_vnni-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avx_vnni-intrinsics-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avxvnni --show-mc-encoding | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avxvnni --show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avxvnni --show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avxvnni --show-mc-encoding | FileCheck %s
declare <4 x i32> @llvm.x86.avx512.vpdpbusd.128(<4 x i32>, <4 x i32>, <4 x i32>)
diff --git a/llvm/test/CodeGen/X86/avx_vnni-intrinsics.ll b/llvm/test/CodeGen/X86/avx_vnni-intrinsics.ll
index 5748a426c76c3..a674b6b66c0e1 100644
--- a/llvm/test/CodeGen/X86/avx_vnni-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avx_vnni-intrinsics.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avxvnni --show-mc-encoding | FileCheck %s --check-prefixes=AVXVNNI
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vnni,+avx512vl,+avxvnni --show-mc-encoding | FileCheck %s --check-prefixes=AVX512VNNI
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avxvnni --show-mc-encoding | FileCheck %s --check-prefixes=AVXVNNI
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni,+avx512vl,+avxvnni --show-mc-encoding | FileCheck %s --check-prefixes=AVX512VNNI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avxvnni --show-mc-encoding | FileCheck %s --check-prefixes=AVXVNNI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vnni,+avx512vl,+avxvnni --show-mc-encoding | FileCheck %s --check-prefixes=AVX512VNNI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avxvnni --show-mc-encoding | FileCheck %s --check-prefixes=AVXVNNI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni,+avx512vl,+avxvnni --show-mc-encoding | FileCheck %s --check-prefixes=AVX512VNNI
declare <8 x i32> @llvm.x86.avx512.vpdpbusd.256(<8 x i32>, <32 x i8>, <32 x i8>)
diff --git a/llvm/test/CodeGen/X86/avxneconvert-intrinsics-shared.ll b/llvm/test/CodeGen/X86/avxneconvert-intrinsics-shared.ll
index d88e95c34a4a3..af58c372ccfda 100644
--- a/llvm/test/CodeGen/X86/avxneconvert-intrinsics-shared.ll
+++ b/llvm/test/CodeGen/X86/avxneconvert-intrinsics-shared.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avxneconvert,+avx512bf16,+avx512vl | FileCheck %s --check-prefix=AVX512BF16-COMMON
-; RUN: llc < %s -O0 -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avxneconvert,+avx512bf16,+avx512vl | FileCheck %s --check-prefix=AVX512BF16-COMMON
-; RUN: llc < %s -O0 -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx512bf16,+avx512vl | FileCheck %s --check-prefix=AVX512BF16
-; RUN: llc < %s -O0 -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx512bf16,+avx512vl | FileCheck %s --check-prefix=AVX512BF16
+; RUN: llc -combiner-topological-sorting < %s -O0 -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avxneconvert,+avx512bf16,+avx512vl | FileCheck %s --check-prefix=AVX512BF16-COMMON
+; RUN: llc -combiner-topological-sorting < %s -O0 -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avxneconvert,+avx512bf16,+avx512vl | FileCheck %s --check-prefix=AVX512BF16-COMMON
+; RUN: llc -combiner-topological-sorting < %s -O0 -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx512bf16,+avx512vl | FileCheck %s --check-prefix=AVX512BF16
+; RUN: llc -combiner-topological-sorting < %s -O0 -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx512bf16,+avx512vl | FileCheck %s --check-prefix=AVX512BF16
define <8 x bfloat> @test_int_x86_vcvtneps2bf16128(<4 x float> %A) {
; AVX512BF16-COMMON-LABEL: test_int_x86_vcvtneps2bf16128:
diff --git a/llvm/test/CodeGen/X86/avxneconvert-intrinsics.ll b/llvm/test/CodeGen/X86/avxneconvert-intrinsics.ll
index ef87ac31fcf48..3bd23b41c6ff0 100644
--- a/llvm/test/CodeGen/X86/avxneconvert-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avxneconvert-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avxneconvert | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -O0 -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avxneconvert | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -O0 -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avxneconvert | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -O0 -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avxneconvert | FileCheck %s --check-prefixes=CHECK,X86
define <4 x float> @test_int_x86_vbcstnebf162ps128(ptr %A) {
; X64-LABEL: test_int_x86_vbcstnebf162ps128:
diff --git a/llvm/test/CodeGen/X86/avxvnni-combine.ll b/llvm/test/CodeGen/X86/avxvnni-combine.ll
index 45f9a6475244e..384bddec923ed 100644
--- a/llvm/test/CodeGen/X86/avxvnni-combine.ll
+++ b/llvm/test/CodeGen/X86/avxvnni-combine.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=alderlake -verify-machineinstrs| FileCheck %s --check-prefixes=AVX,ADL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -verify-machineinstrs | FileCheck %s --check-prefixes=AVX,SPR
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -verify-machineinstrs | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=alderlake -verify-machineinstrs| FileCheck %s --check-prefixes=AVX,ADL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids -verify-machineinstrs | FileCheck %s --check-prefixes=AVX,SPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -verify-machineinstrs | FileCheck %s --check-prefixes=AVX512
define <2 x i64> @foo_reg_128(<2 x i64> %0, <2 x i64> %1, <2 x i64> %2, <2 x i64> %3, <2 x i64> %4, <2 x i64> %5) {
; AVX-LABEL: foo_reg_128:
diff --git a/llvm/test/CodeGen/X86/avxvnni.ll b/llvm/test/CodeGen/X86/avxvnni.ll
index ea9f9100543e9..02dbd89f0d313 100644
--- a/llvm/test/CodeGen/X86/avxvnni.ll
+++ b/llvm/test/CodeGen/X86/avxvnni.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avxvnni | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni,+avx512vl,+avx512bw | FileCheck %s --check-prefix=AVX512
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni,+avx512vl,+avx512bw,+avxvnni | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avxvnni | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni,+avx512vl,+avx512bw | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vnni,+avx512vl,+avx512bw,+avxvnni | FileCheck %s --check-prefix=AVX
define <4 x i32> @test_pmaddwd_v8i16_add_v4i32(<4 x i32> %a0, <8 x i16> %a1, <8 x i16> %a2) {
; AVX-LABEL: test_pmaddwd_v8i16_add_v4i32:
diff --git a/llvm/test/CodeGen/X86/avxvnniint16-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avxvnniint16-intrinsics-upgrade.ll
index abdc296ae1e1c..5469f374859da 100644
--- a/llvm/test/CodeGen/X86/avxvnniint16-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avxvnniint16-intrinsics-upgrade.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avxvnniint16 | FileCheck %s
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avxvnniint16 | FileCheck %s
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefix=AVX10
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefix=AVX10
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avxvnniint16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avxvnniint16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefix=AVX10
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefix=AVX10
define <4 x i32> @test_int_x86_avx2_vpdpwsud_128(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: test_int_x86_avx2_vpdpwsud_128:
diff --git a/llvm/test/CodeGen/X86/avxvnniint16-intrinsics.ll b/llvm/test/CodeGen/X86/avxvnniint16-intrinsics.ll
index 7576b12645bd0..35db8637c2392 100644
--- a/llvm/test/CodeGen/X86/avxvnniint16-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avxvnniint16-intrinsics.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avxvnniint16 | FileCheck %s
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avxvnniint16 | FileCheck %s
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefix=AVX10
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefix=AVX10
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avxvnniint16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avxvnniint16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefix=AVX10
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+avx10.2 | FileCheck %s --check-prefix=AVX10
define <4 x i32> @test_int_x86_avx2_vpdpwsud_128(<4 x i32> %A, <8 x i16> %B, <8 x i16> %C) {
; CHECK-LABEL: test_int_x86_avx2_vpdpwsud_128:
diff --git a/llvm/test/CodeGen/X86/avxvnniint8-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/avxvnniint8-intrinsics-upgrade.ll
index ce9a0fb0d5336..ae222a8af7b57 100644
--- a/llvm/test/CodeGen/X86/avxvnniint8-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/avxvnniint8-intrinsics-upgrade.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avxvnniint8 --show-mc-encoding | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avxvnniint8 --show-mc-encoding | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=AVX10-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=AVX10-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avxvnniint8 --show-mc-encoding | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avxvnniint8 --show-mc-encoding | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=AVX10-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=AVX10-X64
declare <4 x i32> @llvm.x86.avx2.vpdpbssd.128(<4 x i32>, <4 x i32>, <4 x i32>)
diff --git a/llvm/test/CodeGen/X86/avxvnniint8-intrinsics.ll b/llvm/test/CodeGen/X86/avxvnniint8-intrinsics.ll
index 6c3d90aab77e8..8aa90cdb1b95b 100644
--- a/llvm/test/CodeGen/X86/avxvnniint8-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/avxvnniint8-intrinsics.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avxvnniint8 --show-mc-encoding | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avxvnniint8 --show-mc-encoding | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=AVX10-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=AVX10-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avxvnniint8 --show-mc-encoding | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avxvnniint8 --show-mc-encoding | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=AVX10-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 --show-mc-encoding | FileCheck %s --check-prefixes=AVX10-X64
declare <4 x i32> @llvm.x86.avx2.vpdpbssd.128(<4 x i32>, <16 x i8>, <16 x i8>)
diff --git a/llvm/test/CodeGen/X86/backpropmask.ll b/llvm/test/CodeGen/X86/backpropmask.ll
index 0e6b5fef7f064..6a0d86b9120f0 100644
--- a/llvm/test/CodeGen/X86/backpropmask.ll
+++ b/llvm/test/CodeGen/X86/backpropmask.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
; Verify that backwards propagation of a mask does not affect
; nodes with multiple result values. In both tests, the stored
diff --git a/llvm/test/CodeGen/X86/barrier-sse.ll b/llvm/test/CodeGen/X86/barrier-sse.ll
index 80c0cc82e93e0..6b42999ffd7ce 100644
--- a/llvm/test/CodeGen/X86/barrier-sse.ll
+++ b/llvm/test/CodeGen/X86/barrier-sse.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+sse2 | FileCheck %s
define void @test() {
fence acquire
diff --git a/llvm/test/CodeGen/X86/barrier.ll b/llvm/test/CodeGen/X86/barrier.ll
index f85c0ae98af1d..3eda213e2e884 100644
--- a/llvm/test/CodeGen/X86/barrier.ll
+++ b/llvm/test/CodeGen/X86/barrier.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=-sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-sse2 | FileCheck %s
define void @test() {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/base-pointer-and-cmpxchg.ll b/llvm/test/CodeGen/X86/base-pointer-and-cmpxchg.ll
index 5e8da5818fe97..6a9aa1feb375b 100644
--- a/llvm/test/CodeGen/X86/base-pointer-and-cmpxchg.ll
+++ b/llvm/test/CodeGen/X86/base-pointer-and-cmpxchg.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=x86_64-apple-macosx -mattr=+cx16 -x86-use-base-pointer=true -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE --check-prefix=USE_BASE_64 %s
-; RUN: llc -mtriple=x86_64-apple-macosx -mattr=+cx16 -x86-use-base-pointer=false -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=DONT_USE_BASE %s
-; RUN: llc -mtriple=x86_64-linux-gnux32 -mattr=+cx16 -x86-use-base-pointer=true -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE --check-prefix=USE_BASE_32 %s
-; RUN: llc -mtriple=x86_64-linux-gnux32 -mattr=+cx16 -x86-use-base-pointer=false -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=DONT_USE_BASE %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx -mattr=+cx16 -x86-use-base-pointer=true -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE --check-prefix=USE_BASE_64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx -mattr=+cx16 -x86-use-base-pointer=false -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=DONT_USE_BASE %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnux32 -mattr=+cx16 -x86-use-base-pointer=true -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE --check-prefix=USE_BASE_32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnux32 -mattr=+cx16 -x86-use-base-pointer=false -stackrealign %s -o - | FileCheck --check-prefix=CHECK --check-prefix=DONT_USE_BASE %s
; This function uses dynamic allocated stack to force the use
; of a frame pointer.
diff --git a/llvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll b/llvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll
index eae2e827d72e2..ed9773640228a 100644
--- a/llvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll
+++ b/llvm/test/CodeGen/X86/base-pointer-and-mwaitx.ll
@@ -1,9 +1,9 @@
; RUN: split-file %s %t
; RUN: cat %t/main.ll %t/_align32.ll > %t/align32.ll
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -mattr=+mwaitx -x86-use-base-pointer=true -stackrealign %t/align32.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE_64 %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -mattr=+mwaitx -x86-use-base-pointer=true -stackrealign %t/align32.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE_32 %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -mattr=+mwaitx -x86-use-base-pointer=true %t/main.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=NO_BASE_64 %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -mattr=+mwaitx -x86-use-base-pointer=true %t/main.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=NO_BASE_32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -mattr=+mwaitx -x86-use-base-pointer=true -stackrealign %t/align32.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE_64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnux32 -mattr=+mwaitx -x86-use-base-pointer=true -stackrealign %t/align32.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=USE_BASE_32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -mattr=+mwaitx -x86-use-base-pointer=true %t/main.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=NO_BASE_64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnux32 -mattr=+mwaitx -x86-use-base-pointer=true %t/main.ll -o - | FileCheck --check-prefix=CHECK --check-prefix=NO_BASE_32 %s
;--- main.ll
diff --git a/llvm/test/CodeGen/X86/basic-block-address-map-empty-block.ll b/llvm/test/CodeGen/X86/basic-block-address-map-empty-block.ll
index 76671c4bad89a..f977d6d7acb55 100644
--- a/llvm/test/CodeGen/X86/basic-block-address-map-empty-block.ll
+++ b/llvm/test/CodeGen/X86/basic-block-address-map-empty-block.ll
@@ -1,5 +1,5 @@
;; This test verifies that with -enable-gc-empty-basic-blocks SHT_LLVM_BB_ADDR_MAP will not include entries for empty blocks.
-; RUN: llc < %s -mtriple=x86_64 -O0 -basic-block-address-map -enable-gc-empty-basic-blocks | FileCheck --check-prefix=CHECK %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -O0 -basic-block-address-map -enable-gc-empty-basic-blocks | FileCheck --check-prefix=CHECK %s
define void @foo(i1 zeroext %0) nounwind {
br i1 %0, label %2, label %empty_block
diff --git a/llvm/test/CodeGen/X86/basic-block-address-map-empty-function.ll b/llvm/test/CodeGen/X86/basic-block-address-map-empty-function.ll
index c63022ed05c4e..acb101b726728 100644
--- a/llvm/test/CodeGen/X86/basic-block-address-map-empty-function.ll
+++ b/llvm/test/CodeGen/X86/basic-block-address-map-empty-function.ll
@@ -1,6 +1,6 @@
;; Verify that the BB address map is not emitted for empty functions.
-; RUN: llc < %s -mtriple=x86_64 -basic-block-address-map | FileCheck %s --check-prefixes=CHECK,BASIC
-; RUN: llc < %s -mtriple=x86_64 -basic-block-address-map -pgo-analysis-map=func-entry-count,bb-freq | FileCheck %s --check-prefixes=CHECK,PGO
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -basic-block-address-map | FileCheck %s --check-prefixes=CHECK,BASIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -basic-block-address-map -pgo-analysis-map=func-entry-count,bb-freq | FileCheck %s --check-prefixes=CHECK,PGO
define void @empty_func() {
entry:
diff --git a/llvm/test/CodeGen/X86/basic-block-address-map-function-sections.ll b/llvm/test/CodeGen/X86/basic-block-address-map-function-sections.ll
index 892fa009935d2..9432981f44890 100644
--- a/llvm/test/CodeGen/X86/basic-block-address-map-function-sections.ll
+++ b/llvm/test/CodeGen/X86/basic-block-address-map-function-sections.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-address-map | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -basic-block-address-map | FileCheck %s
$_Z4fooTIiET_v = comdat any
diff --git a/llvm/test/CodeGen/X86/basic-block-address-map-pgo-features.ll b/llvm/test/CodeGen/X86/basic-block-address-map-pgo-features.ll
index 8dff2873b12c4..dd03656aae613 100644
--- a/llvm/test/CodeGen/X86/basic-block-address-map-pgo-features.ll
+++ b/llvm/test/CodeGen/X86/basic-block-address-map-pgo-features.ll
@@ -1,23 +1,23 @@
; Check the basic block sections labels option
-; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map | FileCheck %s --check-prefixes=CHECK,BASIC,PGO-NONE
-; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=none | FileCheck %s --check-prefixes=CHECK,BASIC,PGO-NONE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map | FileCheck %s --check-prefixes=CHECK,BASIC,PGO-NONE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=none | FileCheck %s --check-prefixes=CHECK,BASIC,PGO-NONE
;; Also verify this holds for all PGO features enabled
-; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=func-entry-count,bb-freq,br-prob | FileCheck %s --check-prefixes=CHECK,PGO-ALL,PGO-FEC,PGO-BBF,PGO-BRP
-; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=all | FileCheck %s --check-prefixes=CHECK,PGO-ALL,PGO-FEC,PGO-BBF,PGO-BRP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=func-entry-count,bb-freq,br-prob | FileCheck %s --check-prefixes=CHECK,PGO-ALL,PGO-FEC,PGO-BBF,PGO-BRP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=all | FileCheck %s --check-prefixes=CHECK,PGO-ALL,PGO-FEC,PGO-BBF,PGO-BRP
;; Also verify that pgo extension only includes the enabled feature
-; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=func-entry-count | FileCheck %s --check-prefixes=CHECK,PGO-FEC,FEC-ONLY
-; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=bb-freq | FileCheck %s --check-prefixes=CHECK,PGO-BBF,BBF-ONLY
-; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=br-prob | FileCheck %s --check-prefixes=CHECK,PGO-BRP,BRP-ONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=func-entry-count | FileCheck %s --check-prefixes=CHECK,PGO-FEC,FEC-ONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=bb-freq | FileCheck %s --check-prefixes=CHECK,PGO-BBF,BBF-ONLY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=br-prob | FileCheck %s --check-prefixes=CHECK,PGO-BRP,BRP-ONLY
-; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=func-entry-count -basic-block-address-map-skip-bb-entries | FileCheck %s --check-prefixes=SKIP-BB-ENTRIES
-; RUN: not llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=bb-freq -basic-block-address-map-skip-bb-entries 2>&1 | FileCheck %s --check-prefixes=SKIP-BB-ENTRIES-ERROR
-; RUN: not llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=br-prob -basic-block-address-map-skip-bb-entries 2>&1 | FileCheck %s --check-prefixes=SKIP-BB-ENTRIES-ERROR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=func-entry-count -basic-block-address-map-skip-bb-entries | FileCheck %s --check-prefixes=SKIP-BB-ENTRIES
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=bb-freq -basic-block-address-map-skip-bb-entries 2>&1 | FileCheck %s --check-prefixes=SKIP-BB-ENTRIES-ERROR
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -pgo-analysis-map=br-prob -basic-block-address-map-skip-bb-entries 2>&1 | FileCheck %s --check-prefixes=SKIP-BB-ENTRIES-ERROR
;; Verify that we emit an error if we try and specify values in addition to all/none
-; RUN: not llc < %s -mtriple=x86_64 -basic-block-address-map -pgo-analysis-map=all,bb-freq
-; RUN: not llc < %s -mtriple=x86_64 -basic-block-address-map -pgo-analysis-map=none,bb-freq
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64 -basic-block-address-map -pgo-analysis-map=all,bb-freq
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64 -basic-block-address-map -pgo-analysis-map=none,bb-freq
define void @_Z3bazb(i1 zeroext, i1 zeroext) personality ptr @__gxx_personality_v0 !prof !0 {
diff --git a/llvm/test/CodeGen/X86/basic-block-address-map-with-basic-block-sections.ll b/llvm/test/CodeGen/X86/basic-block-address-map-with-basic-block-sections.ll
index 16808819ab2d3..47588c1724c39 100644
--- a/llvm/test/CodeGen/X86/basic-block-address-map-with-basic-block-sections.ll
+++ b/llvm/test/CodeGen/X86/basic-block-address-map-with-basic-block-sections.ll
@@ -2,7 +2,7 @@
;; Let a function with 4 basic blocks get split into 2 sections.
; RUN: echo '!_Z3bazb' > %t
; RUN: echo '!!0 2' >> %t
-; RUN: llc < %s -mtriple=x86_64 -basic-block-address-map -basic-block-sections=%t | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -basic-block-address-map -basic-block-sections=%t | FileCheck %s
define void @_Z3bazb(i1 zeroext) personality ptr @__gxx_personality_v0 {
br i1 %0, label %2, label %7
diff --git a/llvm/test/CodeGen/X86/basic-block-address-map-with-emit-bb-hash.ll b/llvm/test/CodeGen/X86/basic-block-address-map-with-emit-bb-hash.ll
index 39d83cd26f316..816aa5ba17041 100644
--- a/llvm/test/CodeGen/X86/basic-block-address-map-with-emit-bb-hash.ll
+++ b/llvm/test/CodeGen/X86/basic-block-address-map-with-emit-bb-hash.ll
@@ -1,5 +1,5 @@
; Check the basic block sections labels option works when used along with -emit-bb-hash.
-; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -emit-bb-hash | FileCheck %s --check-prefixes=CHECK,UNIQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -emit-bb-hash | FileCheck %s --check-prefixes=CHECK,UNIQ
define void @_Z3bazb(i1 zeroext, i1 zeroext) personality ptr @__gxx_personality_v0 {
br i1 %0, label %3, label %8
diff --git a/llvm/test/CodeGen/X86/basic-block-address-map-with-mfs.ll b/llvm/test/CodeGen/X86/basic-block-address-map-with-mfs.ll
index f8146bb38f71e..ba7d624fd55ba 100644
--- a/llvm/test/CodeGen/X86/basic-block-address-map-with-mfs.ll
+++ b/llvm/test/CodeGen/X86/basic-block-address-map-with-mfs.ll
@@ -1,8 +1,8 @@
; COM: Emitting basic-block-address-map when machine function splitting is enabled.
-; RUN: llc < %s -mtriple=x86_64 -function-sections -split-machine-functions -basic-block-address-map | FileCheck %s --check-prefixes=CHECK,BASIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -split-machine-functions -basic-block-address-map | FileCheck %s --check-prefixes=CHECK,BASIC
; COM: Emitting basic-block-address-map with PGO analysis with machine function splitting enabled.
-; RUN: llc < %s -mtriple=x86_64 -function-sections -split-machine-functions -basic-block-address-map -pgo-analysis-map=func-entry-count,bb-freq,br-prob | FileCheck %s --check-prefixes=CHECK,PGO
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -split-machine-functions -basic-block-address-map -pgo-analysis-map=func-entry-count,bb-freq,br-prob | FileCheck %s --check-prefixes=CHECK,PGO
define void @foo(i1 zeroext %0) nounwind !prof !14 {
br i1 %0, label %2, label %4, !prof !15
diff --git a/llvm/test/CodeGen/X86/basic-block-address-map.ll b/llvm/test/CodeGen/X86/basic-block-address-map.ll
index 5567ccd4f9e75..92ca279d97641 100644
--- a/llvm/test/CodeGen/X86/basic-block-address-map.ll
+++ b/llvm/test/CodeGen/X86/basic-block-address-map.ll
@@ -1,7 +1,7 @@
; Check the basic block sections labels option
-; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map | FileCheck %s --check-prefixes=CHECK,UNIQ
-; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=false -basic-block-address-map | FileCheck %s --check-prefixes=CHECK,NOUNIQ
-; RUN: llc < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -split-machine-functions | FileCheck %s --check-prefixes=CHECK,UNIQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map | FileCheck %s --check-prefixes=CHECK,UNIQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -unique-section-names=false -basic-block-address-map | FileCheck %s --check-prefixes=CHECK,NOUNIQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -unique-section-names=true -basic-block-address-map -split-machine-functions | FileCheck %s --check-prefixes=CHECK,UNIQ
define void @_Z3bazb(i1 zeroext, i1 zeroext) personality ptr @__gxx_personality_v0 {
br i1 %0, label %3, label %8
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-bb-hash.ll b/llvm/test/CodeGen/X86/basic-block-sections-bb-hash.ll
index 293b48d7dc5dd..d4bb9cc696bfe 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-bb-hash.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-bb-hash.ll
@@ -6,7 +6,7 @@
; RUN: echo 'g 0:10,1:9,2:1 1:8,3:8 2:2,3:2 3:11' >> %t
; RUN: echo 'c 0 2 3' >> %t
; RUN: echo 'h 0:64863A11B5CA0000 1:54F1E80D6B270006 2:54F1F4E66B270008 3:C8BC6041A2CB0009' >> %t
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t | FileCheck %s
;
define void @foo(i1 zeroext) nounwind {
%2 = alloca i8, align 1
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-blockaddress-taken.ll b/llvm/test/CodeGen/X86/basic-block-sections-blockaddress-taken.ll
index efdbfef5b87f3..3d8bf03048e34 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-blockaddress-taken.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-blockaddress-taken.ll
@@ -1,5 +1,5 @@
;; This test verifies that basic-block-sections works with address-taken basic blocks.
-; RUN: llc < %s -mtriple=x86_64 -basic-block-sections=all | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -basic-block-sections=all | FileCheck %s
define void @foo(i1 zeroext %0) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-cfg.ll b/llvm/test/CodeGen/X86/basic-block-sections-cfg.ll
index b8eadc3cac36e..fdb61ec64532e 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-cfg.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-cfg.ll
@@ -6,7 +6,7 @@
; RUN: echo 'g 0:10,1:9,2:1 1:8,3:8 2:2,3:2 3:11' >> %t
; RUN: echo 'c 0 2 3' >> %t
;
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t | FileCheck %s
;
define void @foo(i1 zeroext) nounwind {
%2 = alloca i8, align 1
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-cloning-1.ll b/llvm/test/CodeGen/X86/basic-block-sections-cloning-1.ll
index 0f84b891a7c52..7cd271f191568 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-cloning-1.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-cloning-1.ll
@@ -7,8 +7,8 @@ declare void @effect(i32 zeroext)
; RUN: echo 'f foo' >> %t
; RUN: echo 'p 0 3 5' >> %t
; RUN: echo 'c 0 3.1 5.1 1 2 3 4 5' >> %t
-; RUN: llc < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t -stop-after=bb-path-cloning | FileCheck %s --check-prefix=MIR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t -stop-after=bb-path-cloning | FileCheck %s --check-prefix=MIR
define void @foo(i1 %a, i1 %b, i1 %c, i1 %d) {
b0:
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-cloning-2.ll b/llvm/test/CodeGen/X86/basic-block-sections-cloning-2.ll
index c433491a49430..2b81bf0463d6e 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-cloning-2.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-cloning-2.ll
@@ -8,8 +8,8 @@ declare void @effect(i32 zeroext)
; RUN: echo 'p 1 3 4 5' >> %t
; RUN: echo 'c 0 3.1 5.1' >> %t
; RUN: echo 'c 1 3.2 4.1 5.2 2 3 4 5' >> %t
-; RUN: llc < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t -stop-after=bb-path-cloning | FileCheck %s --check-prefix=MIR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t -stop-after=bb-path-cloning | FileCheck %s --check-prefix=MIR
define void @foo(i1 %a, i1 %b, i1 %c, i1 %d) {
b0:
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-cloning-indirect-invalid.ll b/llvm/test/CodeGen/X86/basic-block-sections-cloning-indirect-invalid.ll
index d8686cdfa098e..2466630cc9916 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-cloning-indirect-invalid.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-cloning-indirect-invalid.ll
@@ -7,13 +7,13 @@ declare void @effect(i32 zeroext)
; RUN: echo 'f bar' >> %t1
; RUN: echo 'p 0 1 2' >> %t1
; RUN: echo 'c 0 1.1 2.1 1' >> %t1
-; RUN: llc < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t1 2> %t1.err | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t1 2> %t1.err | FileCheck %s
; RUN: FileCheck %s --check-prefix=WARN < %t1.err
; RUN: echo 'v1' > %t2
; RUN: echo 'f bar' >> %t2
; RUN: echo 'p 1 2' >> %t2
; RUN: echo 'c 0 1 2.1' >> %t2
-; RUN: llc < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t2 2> %t2.err | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t2 2> %t2.err | FileCheck %s
; RUN: FileCheck %s --check-prefix=WARN < %t2.err
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-cloning-indirect.ll b/llvm/test/CodeGen/X86/basic-block-sections-cloning-indirect.ll
index 3d9a8d36ca105..add16c182712f 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-cloning-indirect.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-cloning-indirect.ll
@@ -7,7 +7,7 @@ declare void @effect(i32 zeroext)
; RUN: echo 'f bar' >> %t
; RUN: echo 'p 0 1' >> %t
; RUN: echo 'c 0 1.1 2 1' >> %t
-; RUN: llc < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t | FileCheck %s
define void @bar(i1 %a, i1 %b) {
b0:
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-cloning-invalid.ll b/llvm/test/CodeGen/X86/basic-block-sections-cloning-invalid.ll
index 3c3c4b55e89b3..fb7db9d27165e 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-cloning-invalid.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-cloning-invalid.ll
@@ -7,7 +7,7 @@ declare void @effect(i32 zeroext)
; RUN: echo 'f foo' >> %t1
; RUN: echo 'p 0 2 3' >> %t1
; RUN: echo 'c 0 2.1 3.1 1' >> %t1
-; RUN: llc < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t1 2> %t1.err | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t1 2> %t1.err | FileCheck %s
; RUN: FileCheck %s --check-prefixes=WARN1 < %t1.err
;; Test that valid clonings are applied correctly, even if invalid clonings exist.
; RUN: echo 'v1' > %t2
@@ -15,19 +15,19 @@ declare void @effect(i32 zeroext)
; RUN: echo 'p 0 2 3' >> %t2
; RUN: echo 'p 0 1 2 3' >> %t2
; RUN: echo 'c 0 1.1 2.2 3.2 2.1 3.1 1' >> %t2
-; RUN: llc < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t2 2> %t2.err | FileCheck %s --check-prefixes=PATH
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t2 2> %t2.err | FileCheck %s --check-prefixes=PATH
; RUN: FileCheck %s --check-prefixes=WARN1 < %t2.err
; RUN: echo 'v1' > %t3
; RUN: echo 'f foo' >> %t3
; RUN: echo 'p 0 100' >> %t3
; RUN: echo 'c 0 100.1 1' >> %t3
-; RUN: llc < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t3 2> %t3.err | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t3 2> %t3.err | FileCheck %s
; RUN: FileCheck %s --check-prefixes=WARN2 < %t3.err
; RUN: echo 'v1' > %t4
; RUN: echo 'f foo' >> %t4
; RUN: echo 'p 1 6' >> %t4
; RUN: echo 'c 0 1 6.1' >> %t4
-; RUN: llc < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t4 2> %t4.err | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -O0 -function-sections -basic-block-sections=%t4 2> %t4.err | FileCheck %s
; RUN: FileCheck %s --check-prefixes=WARN3 < %t4.err
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-clusters-bb-hash.ll b/llvm/test/CodeGen/X86/basic-block-sections-clusters-bb-hash.ll
index 6fe7bf5c25cd4..78d56beacbee1 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-clusters-bb-hash.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-clusters-bb-hash.ll
@@ -8,7 +8,7 @@
; In Test 1 and Test 2, the weights of basic blocks and edges in the profiles are different, which
; will ultimately result in distinct cluster partitioning outcomes.
;
-; RUN: llc %s -O0 -mtriple=x86_64-pc-linux -function-sections -filetype=obj -basic-block-address-map -emit-bb-hash -o %t.o
+; RUN: llc -combiner-topological-sorting %s -O0 -mtriple=x86_64-pc-linux -function-sections -filetype=obj -basic-block-address-map -emit-bb-hash -o %t.o
;
; Test1: Basic blocks #0 (entry), #1 and #3 will be placed in the same section.
; The rest will be placed in the cold section.
@@ -26,7 +26,7 @@
; RUN: END {print ""}' \
; RUN: >> %t1
;
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t1 -basic-block-section-match-infer | \
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t1 -basic-block-section-match-infer | \
; RUN: FileCheck %s -check-prefixes=CHECK,LINUX-SECTIONS1
;
; Test2: Basic #0 (entry), #2 and #3 will be placed in the same section.
@@ -45,7 +45,7 @@
; RUN: END {print ""}' \
; RUN: >> %t2
;
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t2 -basic-block-section-match-infer | \
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t2 -basic-block-section-match-infer | \
; RUN: FileCheck %s -check-prefixes=CHECK,LINUX-SECTIONS2
define void @foo(i1 zeroext) nounwind {
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-clusters-branches.ll b/llvm/test/CodeGen/X86/basic-block-sections-clusters-branches.ll
index b463454e07c6b..ac728188c5e38 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-clusters-branches.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-clusters-branches.ll
@@ -7,7 +7,7 @@
; RUN: echo '!foo' > %t1
; RUN: echo '!!0 2' >> %t1
; RUN: echo '!!1' >> %t1
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t1 | FileCheck %s -check-prefix=LINUX-SECTIONS1
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t1 | FileCheck %s -check-prefix=LINUX-SECTIONS1
;
; Test2: Basic blocks #1 and #3 will be placed in the same section.
; The rest (#0 and #2) go into the function's section.
@@ -15,7 +15,7 @@
; #2 must have an explicit jump to #3.
; RUN: echo '!foo' > %t2
; RUN: echo '!!1 3' >> %t2
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t2 | FileCheck %s -check-prefix=LINUX-SECTIONS2
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t2 | FileCheck %s -check-prefix=LINUX-SECTIONS2
define void @foo(i1 zeroext) nounwind {
%2 = alloca i8, align 1
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-clusters-eh.ll b/llvm/test/CodeGen/X86/basic-block-sections-clusters-eh.ll
index 77b4b27ac046d..e5e871c4aee11 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-clusters-eh.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-clusters-eh.ll
@@ -5,14 +5,14 @@
; The rest will be placed in a section along with the entry basic block.
; RUN: echo '!main' > %t1
; RUN: echo '!!1 2' >> %t1
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t1 | FileCheck %s -check-prefix=LINUX-SECTIONS1
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t1 | FileCheck %s -check-prefix=LINUX-SECTIONS1
;
; Test2: Basic blocks #1, #2, and #3 go into a separate section.
; No separate exception section will be created as #1 and #3 are already in one section.
; The rest will be placed in a section along with the entry basic block.
; RUN: echo '!main' > %t2
; RUN: echo '!!1 2 3' >> %t2
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t2 | FileCheck %s -check-prefix=LINUX-SECTIONS2
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t2 | FileCheck %s -check-prefix=LINUX-SECTIONS2
@_ZTIi = external constant ptr
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-clusters-error.ll b/llvm/test/CodeGen/X86/basic-block-sections-clusters-error.ll
index eb0a14b2820b4..a121c39b5c8d8 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-clusters-error.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-clusters-error.ll
@@ -3,85 +3,85 @@
; RUN: echo '!dummy1' > %t1
; RUN: echo '!!1 4' >> %t1
; RUN: echo '!!1' >> %t1
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t1 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR1
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t1 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR1
; CHECK-ERROR1: LLVM ERROR: invalid profile {{.*}} at line 3: duplicate basic block id found '1'
; RUN: echo '!dummy1' > %t3
; RUN: echo '!!-1' >> %t3
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR3
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR3
; CHECK-ERROR3: LLVM ERROR: invalid profile {{.*}} at line 2: unsigned integer expected: '-1'
; RUN: echo '!dummy1 /path/to/filename' > %t4
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR4
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR4
; CHECK-ERROR4: LLVM ERROR: invalid profile {{.*}} at line 1: unknown string found: '/path/to/filename'
; RUN: echo '!dummy2 M=test_dir/test_file' > %t5
; RUN: echo '!dummy2 M=test_dir/test_file' >> %t5
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t5 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR5
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t5 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR5
; CHECK-ERROR5: LLVM ERROR: invalid profile {{.*}} at line 2: duplicate profile for function 'dummy2'
; RUN: echo '!dummy1 M=' > %t6
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR6
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR6
; CHECK-ERROR6: LLVM ERROR: invalid profile {{.*}} at line 1: empty module name specifier
;;
;; Error handling for version 1:
; RUN: echo 'v2' > %t7
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t7 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR7
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t7 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR7
; CHECK-ERROR7: LLVM ERROR: invalid profile {{.*}} at line 1: invalid profile version: 2
; RUN: echo 'v1' > %t8
; RUN: echo '!dummy1' >> %t8
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t8 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR8
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t8 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR8
; CHECK-ERROR8: LLVM ERROR: invalid profile {{.*}} at line 2: invalid specifier: '!'
; RUN: echo 'v1' > %t9
; RUN: echo 'm dummy1/module1 dummy1/module2' >> %t9
; RUN: echo 'f dummy1' >> %t9
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t9 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR9
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t9 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR9
; CHECK-ERROR9: LLVM ERROR: invalid profile {{.*}} at line 2: invalid module name value: 'dummy1/module1 dummy1/module2'
;;
;; Error handling for version 1, cloning paths.
; RUN: echo 'v1' > %t10
; RUN: echo 'f dummy1' >> %t10
; RUN: echo 'c 0 1.1.1' >> %t10
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t10 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR10
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t10 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR10
; CHECK-ERROR10: LLVM ERROR: invalid profile {{.*}} at line 3: unable to parse basic block id: '1.1.1'
; RUN: echo 'v1' > %t11
; RUN: echo 'f dummy1' >> %t11
; RUN: echo 'c 0 1.a' >> %t11
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t11 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR11
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t11 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR11
; CHECK-ERROR11: LLVM ERROR: invalid profile {{.*}} at line 3: unable to parse clone id: 'a'
; RUN: echo 'v1' > %t12
; RUN: echo 'f dummy1' >> %t12
; RUN: echo 'c 0 1' >> %t12
; RUN: echo 'p 1 2.1' >> %t12
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t12 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR12
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t12 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR12
; CHECK-ERROR12: LLVM ERROR: invalid profile {{.*}} at line 4: unsigned integer expected: '2.1'
; RUN: echo 'v1' > %t13
; RUN: echo 'f dummy1' >> %t13
; RUN: echo 'c 0 1' >> %t13
; RUN: echo 'p 1 2 3 2' >> %t13
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t13 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR13
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t13 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR13
; CHECK-ERROR13: LLVM ERROR: invalid profile {{.*}} at line 4: duplicate cloned block in path: '2'
; RUN: echo 'v1' > %t14
; RUN: echo 'f dummy1' >> %t14
; RUN: echo 'c 0 1' >> %t14
; RUN: echo 'g 0,1:2' >> %t14
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t14 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR14
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t14 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR14
; CHECK-ERROR14: LLVM ERROR: invalid profile {{.*}} at line 4: unsigned integer expected: ''
; RUN: echo 'v1' > %t15
; RUN: echo 'f dummy1' >> %t15
; RUN: echo 'c 0 1' >> %t15
; RUN: echo 'g 0:4,1:2:3' >> %t15
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t15 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR15
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t15 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR15
; CHECK-ERROR15: LLVM ERROR: invalid profile {{.*}} at line 4: unsigned integer expected: '2:3'
; RUN: echo 'v1' > %t16
; RUN: echo 'f dummy1' >> %t16
; RUN: echo 'c 0 1' >> %t16
; RUN: echo 'g 0:4,1:2' >> %t16
; RUN: echo 'h a:1111111111111111 1:ffffffffffffffff' >> %t16
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t16 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR16
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t16 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR16
; CHECK-ERROR16: LLVM ERROR: invalid profile {{.*}} at line 5: unsigned integer expected: 'a'
; RUN: echo 'v1' > %t17
; RUN: echo 'f dummy1' >> %t17
; RUN: echo 'c 0 1' >> %t17
; RUN: echo 'g 0:4,1:2' >> %t17
; RUN: echo 'h 0:111111111111111g 1:ffffffffffffffff' >> %t17
-; RUN: not --crash llc < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t17 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR17
+; RUN: not --crash llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64 -function-sections -basic-block-sections=%t17 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR17
; CHECK-ERROR17: LLVM ERROR: invalid profile {{.*}} at line 5: unsigned integer expected in hex format: '111111111111111g'
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-clusters.ll b/llvm/test/CodeGen/X86/basic-block-sections-clusters.ll
index a2ea84ff88592..327ea6657e203 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-clusters.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-clusters.ll
@@ -15,8 +15,8 @@
; RUN: echo 'c 0 2' >> %t2
; RUN: echo 'c 1' >> %t2
;
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t1 | FileCheck %s -check-prefix=LINUX-SECTIONS1
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t2 | FileCheck %s -check-prefix=LINUX-SECTIONS1
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t1 | FileCheck %s -check-prefix=LINUX-SECTIONS1
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t2 | FileCheck %s -check-prefix=LINUX-SECTIONS1
;
; Test2: Basic blocks #1 and #3 will be placed in the same section.
; All other BBs (including the entry block) go into the function's section.
@@ -25,8 +25,8 @@
; RUN: echo 'v1' > %t4
; RUN: echo 'f foo' >> %t4
; RUN: echo 'c 1 3' >> %t4
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t3 | FileCheck %s -check-prefix=LINUX-SECTIONS2
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t4 | FileCheck %s -check-prefix=LINUX-SECTIONS2
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t3 | FileCheck %s -check-prefix=LINUX-SECTIONS2
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t4 | FileCheck %s -check-prefix=LINUX-SECTIONS2
define void @foo(i1 zeroext) nounwind {
%2 = alloca i8, align 1
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-code-prefetch-call-terminates-block.ll b/llvm/test/CodeGen/X86/basic-block-sections-code-prefetch-call-terminates-block.ll
index bf98076770b5b..ddc18d37a2722 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-code-prefetch-call-terminates-block.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-code-prefetch-call-terminates-block.ll
@@ -5,7 +5,7 @@
; RUN: echo 'f foo' >> %t
; RUN: echo 't 0,1' >> %t
;;
-; RUN: llc < %s -mtriple=x86_64-pc-linux -asm-verbose=false -function-sections -basic-block-sections=%t -O1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -asm-verbose=false -function-sections -basic-block-sections=%t -O1 | FileCheck %s
define i32 @foo() personality ptr @__gxx_personality_v0 {
entry:
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-code-prefetch.ll b/llvm/test/CodeGen/X86/basic-block-sections-code-prefetch.ll
index bef121aecf483..d7b669141a9ed 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-code-prefetch.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-code-prefetch.ll
@@ -16,7 +16,7 @@
; RUN: echo 't 0,0' >> %t
; RUN: echo 't 0,1' >> %t
;;
-; RUN: llc < %s -mtriple=x86_64-pc-linux -asm-verbose=false -function-sections -basic-block-sections=%t -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -asm-verbose=false -function-sections -basic-block-sections=%t -O0 | FileCheck %s
define void @foo(i1 %arg) nounwind {
br i1 %arg, label %cond.true, label %cond.false
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-cold.ll b/llvm/test/CodeGen/X86/basic-block-sections-cold.ll
index 58cec1b658c1e..0d0d7f95dc392 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-cold.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-cold.ll
@@ -10,9 +10,9 @@
; RUN: echo 'f _Z3bazb' >> %t2
; RUN: echo 'c 0' >> %t2
;;
-; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t1 -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
-; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t2 -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
-; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t1 -unique-basic-block-section-names -bbsections-cold-text-prefix=".text.unlikely." | FileCheck %s -check-prefix=LINUX-SPLIT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t1 -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t2 -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t1 -unique-basic-block-section-names -bbsections-cold-text-prefix=".text.unlikely." | FileCheck %s -check-prefix=LINUX-SPLIT
define void @_Z3bazb(i1 zeroext %0) nounwind {
br i1 %0, label %2, label %4
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-directjumps.ll b/llvm/test/CodeGen/X86/basic-block-sections-directjumps.ll
index bf5b004eb7e40..1cda640a3b2cd 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-directjumps.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-directjumps.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -function-sections -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -function-sections -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
define void @_Z3bazb(i1 zeroext) {
%2 = alloca i8, align 1
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-eh.ll b/llvm/test/CodeGen/X86/basic-block-sections-eh.ll
index 6896b08cbbaf0..cfdd5dca6c558 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-eh.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-eh.ll
@@ -1,5 +1,5 @@
; Check if landing pads are kept in a separate eh section
-; RUN: llc -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=i386-unknown-linux-gnu -function-sections -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
+; RUN: llc -combiner-topological-sorting -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=i386-unknown-linux-gnu -function-sections -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
@_ZTIb = external dso_local constant ptr
define i32 @_Z3foob(i1 zeroext %0) #0 personality ptr @__gxx_personality_v0 {
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-entryblock.ll b/llvm/test/CodeGen/X86/basic-block-sections-entryblock.ll
index 349015e1403df..9c41dc53ce8ed 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-entryblock.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-entryblock.ll
@@ -2,12 +2,12 @@
; RUN: echo 'v1' > %t1
; RUN: echo 'f foo' >> %t1
; RUN: echo 'c2 0' >> %t1
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t1 -O0 | FileCheck %s -check-prefix=LINUX-SECTIONS1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t1 -O0 | FileCheck %s -check-prefix=LINUX-SECTIONS1
; RUN: echo 'v1' > %t2
; RUN: echo 'f foo' >> %t2
; RUN: echo 'c2' >> %t2
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t2 -O0 | FileCheck %s -check-prefix=LINUX-SECTIONS2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t2 -O0 | FileCheck %s -check-prefix=LINUX-SECTIONS2
define void @foo(i1 %a, i1 %b) {
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-list.ll b/llvm/test/CodeGen/X86/basic-block-sections-list.ll
index d17182131168c..4a59b66d84d82 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-list.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-list.ll
@@ -5,8 +5,8 @@
; RUN: echo 'v1' > %t
; RUN: echo 'f _Z3foob' >> %t
;;
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t > %t.bbsections
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections > %t.orig
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t > %t.bbsections
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections > %t.orig
; RUN: diff -u %t.orig %t.bbsections
define i32 @_Z3foob(i1 zeroext %0) nounwind {
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-listbb.ll b/llvm/test/CodeGen/X86/basic-block-sections-listbb.ll
index d815dffbf7097..fdf5d57f23a1f 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-listbb.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-listbb.ll
@@ -2,7 +2,7 @@
; Only basic block with id 2 must get a section.
; RUN: echo '!_Z3bazb' > %t
; RUN: echo '!!2' >> %t
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
define void @_Z3bazb(i1 zeroext) nounwind {
%2 = alloca i8, align 1
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-mir-print.ll b/llvm/test/CodeGen/X86/basic-block-sections-mir-print.ll
index fec87656be195..a80c9e4fa56c5 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-mir-print.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-mir-print.ll
@@ -1,9 +1,9 @@
; Stop after bbsections-prepare and check MIR output for section type.
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-address-map -stop-after=bbsections-prepare | FileCheck %s -check-prefix=BBADDRMAP
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-address-map -stop-after=bbsections-prepare | FileCheck %s -check-prefix=BBADDRMAP
; RUN: echo '!_Z3foob' > %t
; RUN: echo '!!1' >> %t
; RUN: echo '!!2' >> %t
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t -stop-after=bbsections-prepare | FileCheck %s -check-prefix=BBSECTIONS
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t -stop-after=bbsections-prepare | FileCheck %s -check-prefix=BBSECTIONS
@_ZTIb = external constant ptr
define dso_local i32 @_Z3foob(i1 zeroext %0) {
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-module1.ll b/llvm/test/CodeGen/X86/basic-block-sections-module1.ll
index c719b7732648b..7fba7f423a66f 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-module1.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-module1.ll
@@ -2,41 +2,41 @@
;; Specify the right filename.
; RUN: echo '!test M=/path/to/dir/test_filename' > %t1
; RUN: echo '!!0' >> %t1
-; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t1 | FileCheck %s -check-prefix=RIGHT-MODULE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t1 | FileCheck %s -check-prefix=RIGHT-MODULE
;; Specify no filename and verify that the profile is ingested.
; RUN: echo '!test' > %t2
; RUN: echo '!!0' >> %t2
-; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t2 | FileCheck %s -check-prefix=NO-MODULE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t2 | FileCheck %s -check-prefix=NO-MODULE
;; Specify wrong filenames and verify that the profile is not ingested.
; RUN: echo '!test M=test_filename' > %t3
; RUN: echo '!!0' >> %t3
-; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t3 | FileCheck %s -check-prefix=WRONG-MODULE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t3 | FileCheck %s -check-prefix=WRONG-MODULE
; RUN: echo '!test M=./path/to/dir/test_filename' > %t4
; RUN: echo '!!0' >> %t4
-; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t4 | FileCheck %s -check-prefix=WRONG-MODULE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t4 | FileCheck %s -check-prefix=WRONG-MODULE
;; Version 1 profile.
;; Specify the right filename.
; RUN: echo 'v1' > %t5
; RUN: echo 'm /path/to/dir/test_filename' >> %t5
; RUN: echo 'f test' >> %t5
; RUN: echo 'c 0' >> %t5
-; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t5 | FileCheck %s -check-prefix=RIGHT-MODULE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t5 | FileCheck %s -check-prefix=RIGHT-MODULE
;; Specify no filename and verify that the profile is ingested.
; RUN: echo 'v1' > %t6
; RUN: echo 'f test' >> %t6
; RUN: echo 'c 0' >> %t6
-; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t6 | FileCheck %s -check-prefix=NO-MODULE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t6 | FileCheck %s -check-prefix=NO-MODULE
;; Specify wrong filenames and verify that the profile is not ingested.
; RUN: echo 'v1' > %t7
; RUN: echo 'm test_filename' >> %t7
; RUN: echo 'f test' >> %t7
; RUN: echo 'c 0' >> %t7
-; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t7 | FileCheck %s -check-prefix=WRONG-MODULE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t7 | FileCheck %s -check-prefix=WRONG-MODULE
; RUN: echo 'v1' > %t8
; RUN: echo 'm ./path/to/dir/test_filename' >> %t8
; RUN: echo 'f test' >> %t8
; RUN: echo 'c 0' >> %t8
-; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t8 | FileCheck %s -check-prefix=WRONG-MODULE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t8 | FileCheck %s -check-prefix=WRONG-MODULE
define dso_local i32 @test(i32 noundef %0) #0 !dbg !10 {
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-module2.ll b/llvm/test/CodeGen/X86/basic-block-sections-module2.ll
index 44e7d2219170c..75798f22e4c56 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-module2.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-module2.ll
@@ -10,7 +10,7 @@
; RUN: echo '!!0' >> %t1
; RUN: echo '!test5' >> %t1
; RUN: echo '!!0' >> %t1
-; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t1 | FileCheck %s -check-prefix=RIGHT-MODULE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t1 | FileCheck %s -check-prefix=RIGHT-MODULE
;; Specifying wrong filenames.
; RUN: echo '!test1 M=/test_dirname/test_filename1' > %t2
; RUN: echo '!!0' >> %t2
@@ -22,7 +22,7 @@
; RUN: echo '!!0' >> %t2
; RUN: echo '!test5 M=any_filename' >> %t1
; RUN: echo '!!0' >> %t1
-; RUN: llc < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t2 | FileCheck %s -check-prefix=WRONG-MODULE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -function-sections -basic-block-sections=%t2 | FileCheck %s -check-prefix=WRONG-MODULE
define dso_local i32 @test1(i32 noundef %0) #0 !dbg !10 {
%2 = alloca i32, align 4
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-named-section.ll b/llvm/test/CodeGen/X86/basic-block-sections-named-section.ll
index 213b1a0f13f6b..7fed166ecce44 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-named-section.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-named-section.ll
@@ -1,9 +1,9 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux -basic-block-sections=all | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=all | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -basic-block-sections=all | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=all | FileCheck %s
; RUN: echo "!_Z3fooi" > %t.order.txt
; RUN: echo "!!2" >> %t.order.txt
-; RUN: llc < %s -mtriple=x86_64-pc-linux -basic-block-sections=%t.order.txt | FileCheck %s --check-prefix=LIST
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t.order.txt | FileCheck %s --check-prefix=LIST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -basic-block-sections=%t.order.txt | FileCheck %s --check-prefix=LIST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t.order.txt | FileCheck %s --check-prefix=LIST
; CHECK: .section foo_section,"ax", at progbits,unique,1
; CHECK-LABEL: _Z3fooi:
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-pgo-features.ll b/llvm/test/CodeGen/X86/basic-block-sections-pgo-features.ll
index 5beb422919de5..76fabce2dbb69 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-pgo-features.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-pgo-features.ll
@@ -5,7 +5,7 @@
; RUN: echo 'g 0:1000,1:800,2:200 1:800,3:800 2:200,3:200 3:1000' >> %t
; RUN: echo 'c 0 1 2' >> %t
;
-; RUN: llc < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t -basic-block-address-map -pgo-analysis-map=all -pgo-analysis-map-emit-bb-sections-cfg | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t -basic-block-address-map -pgo-analysis-map=all -pgo-analysis-map-emit-bb-sections-cfg | FileCheck %s
define void @foo(i1 %cond) nounwind !prof !0 {
entry:
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-pragma-sections.ll b/llvm/test/CodeGen/X86/basic-block-sections-pragma-sections.ll
index da3b4f253147b..c28739109ac1b 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-pragma-sections.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-pragma-sections.ll
@@ -1,14 +1,14 @@
;; Tests for basic block sections applied on a function in a custom section.
-; RUN: llc < %s -mtriple=x86_64-pc-linux -basic-block-sections=all | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=all | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -basic-block-sections=all | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=all | FileCheck %s
; RUN: echo "!_Z3fooi" > %t1.list.txt
; RUN: echo "!!2" >> %t1.list.txt
-; RUN: llc < %s -mtriple=x86_64-pc-linux -basic-block-sections=%t1.list.txt | FileCheck %s --check-prefix=LIST1
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t1.list.txt | FileCheck %s --check-prefix=LIST1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -basic-block-sections=%t1.list.txt | FileCheck %s --check-prefix=LIST1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t1.list.txt | FileCheck %s --check-prefix=LIST1
; RUN: echo "!_Z3fooi" > %t2.list.txt
; RUN: echo "!!0" >> %t2.list.txt
-; RUN: llc < %s -mtriple=x86_64-pc-linux -basic-block-sections=%t2.list.txt | FileCheck %s --check-prefix=LIST2
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t2.list.txt | FileCheck %s --check-prefix=LIST2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -basic-block-sections=%t2.list.txt | FileCheck %s --check-prefix=LIST2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=%t2.list.txt | FileCheck %s --check-prefix=LIST2
; CHECK: .section foo_section,"ax", at progbits,unique,1
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-source-drift.ll b/llvm/test/CodeGen/X86/basic-block-sections-source-drift.ll
index 6e0db20ca0492..9b1026744cdec 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-source-drift.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-source-drift.ll
@@ -1,8 +1,8 @@
; RUN: echo "v1" > %t
; RUN: echo "f foo" >> %t
; RUN: echo "c 0" >> %t
-; RUN: llc < %s -mtriple=x86_64-pc-linux -basic-block-sections=%t | FileCheck --check-prefix=SOURCE-DRIFT %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux -basic-block-sections=%t -bbsections-detect-source-drift=false | FileCheck --check-prefix=HASH-CHECK-DISABLED %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -basic-block-sections=%t | FileCheck --check-prefix=SOURCE-DRIFT %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -basic-block-sections=%t -bbsections-detect-source-drift=false | FileCheck --check-prefix=HASH-CHECK-DISABLED %s
define dso_local i32 @foo(i1 zeroext %0, i1 zeroext %1) !annotation !1 {
br i1 %0, label %5, label %3
diff --git a/llvm/test/CodeGen/X86/basic-block-sections-unreachable.ll b/llvm/test/CodeGen/X86/basic-block-sections-unreachable.ll
index d585007bd48e4..1fa2ad666f646 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections-unreachable.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections-unreachable.ll
@@ -1,6 +1,6 @@
; Check that basic block section is emitted when a non-entry block has no predecessors.
-; RUN: llc < %s -mtriple=x86_64 -O0 -basic-block-sections=all | FileCheck %s --check-prefix=CHECK-SECTIONS
-; RUN: llc < %s -mtriple=x86_64 -O0 | FileCheck %s --check-prefix=CHECK-NOSECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -O0 -basic-block-sections=all | FileCheck %s --check-prefix=CHECK-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -O0 | FileCheck %s --check-prefix=CHECK-NOSECTIONS
define void @foo(ptr %bar) {
%v = load i32, ptr %bar
switch i32 %v, label %default [
diff --git a/llvm/test/CodeGen/X86/basic-block-sections.ll b/llvm/test/CodeGen/X86/basic-block-sections.ll
index 8e50416554a0a..d3e2d95989e15 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections.ll
@@ -1,8 +1,8 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
-; RUN: llc < %s -mtriple=x86_64-pc-linux -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=all -unique-basic-block-section-names -split-machine-functions | FileCheck %s -check-prefix=LINUX-SECTIONS
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -function-sections -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=all -unique-basic-block-section-names -split-machine-functions | FileCheck %s -check-prefix=LINUX-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -function-sections -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s -check-prefix=LINUX-SECTIONS
define void @_Z3bazb(i1 zeroext) nounwind {
%2 = alloca i8, align 1
diff --git a/llvm/test/CodeGen/X86/basic-block-sections_2.ll b/llvm/test/CodeGen/X86/basic-block-sections_2.ll
index 8a676858e30ae..5982c7962f967 100644
--- a/llvm/test/CodeGen/X86/basic-block-sections_2.ll
+++ b/llvm/test/CodeGen/X86/basic-block-sections_2.ll
@@ -11,7 +11,7 @@
;; $ clang -O1 -emit-llvm -S
;;
; __cxx_global_var_init has multiple basic blocks which will produce many sections.
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections -basic-block-sections=all -unique-basic-block-section-names | FileCheck %s
; CHECK-LABEL: __cxx_global_var_init:
; CHECK-LABEL: __cxx_global_var_init.__part.1:
diff --git a/llvm/test/CodeGen/X86/basic-promote-integers.ll b/llvm/test/CodeGen/X86/basic-promote-integers.ll
index 75bb2b200edee..29b4e67b29f87 100644
--- a/llvm/test/CodeGen/X86/basic-promote-integers.ll
+++ b/llvm/test/CodeGen/X86/basic-promote-integers.ll
@@ -1,5 +1,5 @@
; Test that vectors are scalarized/lowered correctly.
-; RUN: llc -mtriple=i686-- < %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- < %s
; A simple test to check copyToParts and copyFromParts.
diff --git a/llvm/test/CodeGen/X86/bb_rotate.ll b/llvm/test/CodeGen/X86/bb_rotate.ll
index 0ed0600e8dbad..8b4d4c1853d85 100644
--- a/llvm/test/CodeGen/X86/bb_rotate.ll
+++ b/llvm/test/CodeGen/X86/bb_rotate.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux < %s | FileCheck %s
define i1 @no_viable_top_fallthrough() {
; CHECK-LABEL: no_viable_top_fallthrough
diff --git a/llvm/test/CodeGen/X86/bc-extract.ll b/llvm/test/CodeGen/X86/bc-extract.ll
index 23091a2da9c58..803d1ed062f32 100644
--- a/llvm/test/CodeGen/X86/bc-extract.ll
+++ b/llvm/test/CodeGen/X86/bc-extract.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
define float @extractFloat1() nounwind {
; X32-LABEL: extractFloat1:
diff --git a/llvm/test/CodeGen/X86/bf16-fast-isel.ll b/llvm/test/CodeGen/X86/bf16-fast-isel.ll
index 812ffc3ab5f19..53b6f2587082c 100644
--- a/llvm/test/CodeGen/X86/bf16-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/bf16-fast-isel.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc --fast-isel < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting --fast-isel < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i8 @test_direct_call(ptr %f) nounwind {
; CHECK-LABEL: test_direct_call:
diff --git a/llvm/test/CodeGen/X86/bfloat-constrained.ll b/llvm/test/CodeGen/X86/bfloat-constrained.ll
index 081b1cebfc43d..1a3b6b38241cf 100644
--- a/llvm/test/CodeGen/X86/bfloat-constrained.ll
+++ b/llvm/test/CodeGen/X86/bfloat-constrained.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mattr=+avx512bf16,+avx512vl | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mattr=+avx512bf16,+avx512vl | FileCheck %s --check-prefixes=X64
@a = global bfloat 0xR0000, align 2
@b = global bfloat 0xR0000, align 2
diff --git a/llvm/test/CodeGen/X86/big-array-init.ll b/llvm/test/CodeGen/X86/big-array-init.ll
index 6b05f901ebea8..b1110f574cbb5 100644
--- a/llvm/test/CodeGen/X86/big-array-init.ll
+++ b/llvm/test/CodeGen/X86/big-array-init.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 | FileCheck %s
; CHECK-LABEL: bad_int:
; CHECK-NEXT: .long 1
diff --git a/llvm/test/CodeGen/X86/bigstructret.ll b/llvm/test/CodeGen/X86/bigstructret.ll
index b4593308ff934..155d7aef52053 100644
--- a/llvm/test/CodeGen/X86/bigstructret.ll
+++ b/llvm/test/CodeGen/X86/bigstructret.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
%0 = type { i32, i32, i32, i32 }
%1 = type { i1, i1, i1, i32 }
diff --git a/llvm/test/CodeGen/X86/bigstructret2.ll b/llvm/test/CodeGen/X86/bigstructret2.ll
index 28b71f9a8c367..2a70fc2613384 100644
--- a/llvm/test/CodeGen/X86/bigstructret2.ll
+++ b/llvm/test/CodeGen/X86/bigstructret2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu | FileCheck %s
; CHECK: .cfi_startproc
; CHECK: .cfi_def_cfa_offset 8
diff --git a/llvm/test/CodeGen/X86/bit-manip-i128.ll b/llvm/test/CodeGen/X86/bit-manip-i128.ll
index 451ce3b1b7578..d9e6c345c49b5 100644
--- a/llvm/test/CodeGen/X86/bit-manip-i128.ll
+++ b/llvm/test/CodeGen/X86/bit-manip-i128.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s -check-prefixes=CHECK,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s -check-prefixes=CHECK,AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s -check-prefixes=CHECK,AVX,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s -check-prefixes=CHECK,AVX,AVX512,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 -mattr=+avx512vbmi2 | FileCheck %s -check-prefixes=CHECK,AVX,AVX512,AVX512VBMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s -check-prefixes=CHECK,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s -check-prefixes=CHECK,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s -check-prefixes=CHECK,AVX,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s -check-prefixes=CHECK,AVX,AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 -mattr=+avx512vbmi2 | FileCheck %s -check-prefixes=CHECK,AVX,AVX512,AVX512VBMI
define i128 @bext_i128(i128 %a0, i128 %idx, i128 %len) nounwind {
; SSE-LABEL: bext_i128:
diff --git a/llvm/test/CodeGen/X86/bit-piece-comment.ll b/llvm/test/CodeGen/X86/bit-piece-comment.ll
index 85c64a7d83406..ea2f6998260ae 100644
--- a/llvm/test/CodeGen/X86/bit-piece-comment.ll
+++ b/llvm/test/CodeGen/X86/bit-piece-comment.ll
@@ -1,4 +1,4 @@
-; RUN: llc -filetype=asm < %s
+; RUN: llc -combiner-topological-sorting -filetype=asm < %s
;
; We check that we don't crash when printing assembly comments that include
; a DW_OP_bit_piece
diff --git a/llvm/test/CodeGen/X86/bit_ceil.ll b/llvm/test/CodeGen/X86/bit_ceil.ll
index 1f21fcac8341d..8fa16578fd272 100644
--- a/llvm/test/CodeGen/X86/bit_ceil.ll
+++ b/llvm/test/CodeGen/X86/bit_ceil.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-bmi2,-lzcnt | FileCheck %s --check-prefix=NOBMI
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi2,+lzcnt | FileCheck %s --check-prefix=BMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-bmi2,-lzcnt | FileCheck %s --check-prefix=NOBMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi2,+lzcnt | FileCheck %s --check-prefix=BMI
; Check the assembly sequence generated for std::bit_ceil.
diff --git a/llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll b/llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll
index 234c7a0a500d3..4baf48d543233 100644
--- a/llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll
+++ b/llvm/test/CodeGen/X86/bitcast-and-setcc-256.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+SSE2 | FileCheck %s --check-prefix=SSE2-SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+SSSE3 | FileCheck %s --check-prefix=SSE2-SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX12,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX12,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+SSE2 | FileCheck %s --check-prefix=SSE2-SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+SSSE3 | FileCheck %s --check-prefix=SSE2-SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX12,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX12,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw | FileCheck %s --check-prefix=AVX512BW
define i4 @v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c, <4 x i64> %d) {
; SSE2-SSSE3-LABEL: v4i64:
diff --git a/llvm/test/CodeGen/X86/bitcast-and-setcc-512.ll b/llvm/test/CodeGen/X86/bitcast-and-setcc-512.ll
index 6acce84645e88..edb26c2f2465e 100644
--- a/llvm/test/CodeGen/X86/bitcast-and-setcc-512.ll
+++ b/llvm/test/CodeGen/X86/bitcast-and-setcc-512.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX12,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX12,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX12,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX12,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX512BW
define i8 @v8i64(<8 x i64> %a, <8 x i64> %b, <8 x i64> %c, <8 x i64> %d) {
; SSE-LABEL: v8i64:
diff --git a/llvm/test/CodeGen/X86/bitcast-i256.ll b/llvm/test/CodeGen/X86/bitcast-i256.ll
index 57fc26600cb7f..1c83d012a5745 100644
--- a/llvm/test/CodeGen/X86/bitcast-i256.ll
+++ b/llvm/test/CodeGen/X86/bitcast-i256.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,-slow-unaligned-mem-32 | FileCheck %s --check-prefix=FAST
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+slow-unaligned-mem-32 | FileCheck %s --check-prefix=SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,-slow-unaligned-mem-32 | FileCheck %s --check-prefix=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+slow-unaligned-mem-32 | FileCheck %s --check-prefix=SLOW
define i256 @foo(<8 x i32> %a) {
; FAST-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll b/llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
index f478fa5a1f6cd..39967720be02b 100644
--- a/llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
+++ b/llvm/test/CodeGen/X86/bitcast-int-to-vector-bool-zext.ll
@@ -1,13 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2-SSSE3,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE2-SSSE3,SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=AVX512VLBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=AVX512VLBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2-SSSE3,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE2-SSSE3,SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=AVX512VLBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=AVX512VLBW
;
; 128-bit vectors
diff --git a/llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll b/llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll
index 2a79dae43bb2f..54d0223535023 100644
--- a/llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll
+++ b/llvm/test/CodeGen/X86/bitcast-int-to-vector-bool.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2-SSSE3,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE2-SSSE3,SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX12,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX12,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2-SSSE3,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE2-SSSE3,SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX12,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX12,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw | FileCheck %s --check-prefixes=AVX512
define <2 x i1> @bitcast_i2_2i1(i2 zeroext %a0) {
; SSE2-SSSE3-LABEL: bitcast_i2_2i1:
diff --git a/llvm/test/CodeGen/X86/bitcast-int-to-vector.ll b/llvm/test/CodeGen/X86/bitcast-int-to-vector.ll
index 995532cb5b9d7..4b2d2cf5e5116 100644
--- a/llvm/test/CodeGen/X86/bitcast-int-to-vector.ll
+++ b/llvm/test/CodeGen/X86/bitcast-int-to-vector.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define i1 @foo(i64 %a) {
; X86-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/bitcast-mmx.ll b/llvm/test/CodeGen/X86/bitcast-mmx.ll
index fe48a96a51d3e..79ee08adb2e70 100644
--- a/llvm/test/CodeGen/X86/bitcast-mmx.ll
+++ b/llvm/test/CodeGen/X86/bitcast-mmx.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X64
define i32 @t0(i64 %x) nounwind {
; X86-LABEL: t0:
diff --git a/llvm/test/CodeGen/X86/bitcast.ll b/llvm/test/CodeGen/X86/bitcast.ll
index 0866a0b1b2bd1..72fd44f81a2b7 100644
--- a/llvm/test/CodeGen/X86/bitcast.ll
+++ b/llvm/test/CodeGen/X86/bitcast.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686--
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
; PR1033
define i64 @test1(double %t) {
diff --git a/llvm/test/CodeGen/X86/bitcast2.ll b/llvm/test/CodeGen/X86/bitcast2.ll
index 381a75edfce15..2b740f5908959 100644
--- a/llvm/test/CodeGen/X86/bitcast2.ll
+++ b/llvm/test/CodeGen/X86/bitcast2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-avx | FileCheck %s
define i64 @test1(double %A) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/bitcnt-false-dep.ll b/llvm/test/CodeGen/X86/bitcnt-false-dep.ll
index 793cbb8f75bdc..bf936f935be88 100644
--- a/llvm/test/CodeGen/X86/bitcnt-false-dep.ll
+++ b/llvm/test/CodeGen/X86/bitcnt-false-dep.ll
@@ -1,9 +1,9 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell | FileCheck %s --check-prefix=HSW
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake | FileCheck %s --check-prefix=SKL
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skx | FileCheck %s --check-prefix=SKL
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=alderlake | FileCheck %s --check-prefix=ADL
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=silvermont -mattr=+lzcnt,+bmi | FileCheck %s --check-prefix=SKL
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=goldmont -mattr=+lzcnt,+bmi | FileCheck %s --check-prefix=SKL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell | FileCheck %s --check-prefix=HSW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake | FileCheck %s --check-prefix=SKL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skx | FileCheck %s --check-prefix=SKL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=alderlake | FileCheck %s --check-prefix=ADL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=silvermont -mattr=+lzcnt,+bmi | FileCheck %s --check-prefix=SKL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=goldmont -mattr=+lzcnt,+bmi | FileCheck %s --check-prefix=SKL
; This tests a fix for bugzilla 33869 https://bugs.llvm.org/show_bug.cgi?id=33869
diff --git a/llvm/test/CodeGen/X86/bittest-intrin.ll b/llvm/test/CodeGen/X86/bittest-intrin.ll
index 09613889d9d4b..b682b008f7517 100644
--- a/llvm/test/CodeGen/X86/bittest-intrin.ll
+++ b/llvm/test/CodeGen/X86/bittest-intrin.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-windows-msvc19.11.0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-windows-msvc19.11.0 | FileCheck %s
; This matches the code produced by clang/lib/CodeGen/bittest-intrin.c
diff --git a/llvm/test/CodeGen/X86/blend-of-shift.ll b/llvm/test/CodeGen/X86/blend-of-shift.ll
index cf382c7903bd7..9292f15dc8620 100644
--- a/llvm/test/CodeGen/X86/blend-of-shift.ll
+++ b/llvm/test/CodeGen/X86/blend-of-shift.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2,X64,X64-SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X64,X64-AVX2
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2,X86,X86-SSE2
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X86,X86-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2,X64,X64-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X64,X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2,X86,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X86,X86-AVX2
;------------------------------ 32-bit shuffles -------------------------------;
diff --git a/llvm/test/CodeGen/X86/block-placement.ll b/llvm/test/CodeGen/X86/block-placement.ll
index 1369131413053..8beedb2b8a418 100644
--- a/llvm/test/CodeGen/X86/block-placement.ll
+++ b/llvm/test/CodeGen/X86/block-placement.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-linux -pre-RA-sched=source < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux -pre-RA-sched=source < %s | FileCheck %s
; RUN: opt -disable-output -passes=debugify < %s
declare void @error(i32 %i, i32 %a, i32 %b)
diff --git a/llvm/test/CodeGen/X86/block_set.ll b/llvm/test/CodeGen/X86/block_set.ll
index bfe391d5b464f..cf7c43a40c3db 100644
--- a/llvm/test/CodeGen/X86/block_set.ll
+++ b/llvm/test/CodeGen/X86/block_set.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux < %s | FileCheck %s
define i1 @block_filter() !prof !22{
; CHECK-LABEL: block_filter
diff --git a/llvm/test/CodeGen/X86/blockaddress-stale-addresstaken.ll b/llvm/test/CodeGen/X86/blockaddress-stale-addresstaken.ll
index 52adca08cb259..9d3e3dc7cead4 100644
--- a/llvm/test/CodeGen/X86/blockaddress-stale-addresstaken.ll
+++ b/llvm/test/CodeGen/X86/blockaddress-stale-addresstaken.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+retpoline | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+retpoline | FileCheck %s
;
; verify that blocks are NOT marked as "Block address taken" when the
; BlockAddress constant has no users (was optimized away).
diff --git a/llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll b/llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll
index 5b7bb1ca97b5c..b10be5a278a61 100644
--- a/llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll
+++ b/llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+bmi,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+bmi,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/bmi-builtins.c
diff --git a/llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll
index 7dbd1bba63861..f69a24758c43f 100644
--- a/llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+bmi,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+bmi,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/bmi-builtins.c
;
diff --git a/llvm/test/CodeGen/X86/bmi-out-of-order.ll b/llvm/test/CodeGen/X86/bmi-out-of-order.ll
index 3e23a5f348bde..ae9fe627a48bc 100644
--- a/llvm/test/CodeGen/X86/bmi-out-of-order.ll
+++ b/llvm/test/CodeGen/X86/bmi-out-of-order.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+bmi | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov,+bmi | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+bmi | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov,+bmi | FileCheck %s --check-prefix=X64
define i32 @blsmsk_used2(i32 %a) nounwind {
; X86-LABEL: blsmsk_used2:
diff --git a/llvm/test/CodeGen/X86/bmi-select-distrib.ll b/llvm/test/CodeGen/X86/bmi-select-distrib.ll
index e5696ded4fbf1..f80d9de25c2dd 100644
--- a/llvm/test/CodeGen/X86/bmi-select-distrib.ll
+++ b/llvm/test/CodeGen/X86/bmi-select-distrib.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+sse2,+bmi | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+sse2,+bmi,+bmi2 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+sse2,+bmi | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+sse2,+bmi,+bmi2 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefixes=X64
; PR131587
define i32 @and_select_neg_to_blsi1(i1 %a0, i32 inreg %a1) nounwind {
diff --git a/llvm/test/CodeGen/X86/bmi-x86_64.ll b/llvm/test/CodeGen/X86/bmi-x86_64.ll
index aa571531c0c6a..eddcada2708da 100644
--- a/llvm/test/CodeGen/X86/bmi-x86_64.ll
+++ b/llvm/test/CodeGen/X86/bmi-x86_64.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefixes=CHECK,BEXTR-SLOW,BMI1-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefixes=CHECK,BEXTR-SLOW,BMI2-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+fast-bextr | FileCheck %s --check-prefixes=CHECK,BEXTR-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2,+fast-bextr | FileCheck %s --check-prefixes=CHECK,BEXTR-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefixes=CHECK,BEXTR-SLOW,BMI1-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefixes=CHECK,BEXTR-SLOW,BMI2-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+fast-bextr | FileCheck %s --check-prefixes=CHECK,BEXTR-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2,+fast-bextr | FileCheck %s --check-prefixes=CHECK,BEXTR-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
declare i64 @llvm.x86.bmi.bextr.64(i64, i64)
diff --git a/llvm/test/CodeGen/X86/bmi.ll b/llvm/test/CodeGen/X86/bmi.ll
index f37176d7c0a37..b0996c3ad4c0d 100644
--- a/llvm/test/CodeGen/X86/bmi.ll
+++ b/llvm/test/CodeGen/X86/bmi.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+bmi | FileCheck %s --check-prefixes=X86,X86-SLOW-BEXTR
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+bmi,+bmi2 | FileCheck %s --check-prefixes=X86,X86-SLOW-BEXTR
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefixes=X64,X64-SLOW-BEXTR
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefixes=X64,X64-SLOW-BEXTR
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+bmi,+fast-bextr | FileCheck %s --check-prefixes=X86,X86-FAST-BEXTR
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+fast-bextr | FileCheck %s --check-prefixes=X64,X64-FAST-BEXTR
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+fast-bextr,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+bmi | FileCheck %s --check-prefixes=X86,X86-SLOW-BEXTR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+bmi,+bmi2 | FileCheck %s --check-prefixes=X86,X86-SLOW-BEXTR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefixes=X64,X64-SLOW-BEXTR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefixes=X64,X64-SLOW-BEXTR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+cmov,+bmi,+fast-bextr | FileCheck %s --check-prefixes=X86,X86-FAST-BEXTR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+fast-bextr | FileCheck %s --check-prefixes=X64,X64-FAST-BEXTR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+fast-bextr,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
define i32 @andn32(i32 %x, i32 %y) {
; X86-LABEL: andn32:
diff --git a/llvm/test/CodeGen/X86/bmi2-x86_64.ll b/llvm/test/CodeGen/X86/bmi2-x86_64.ll
index fa1c67986e11f..c80bb3e085af1 100644
--- a/llvm/test/CodeGen/X86/bmi2-x86_64.ll
+++ b/llvm/test/CodeGen/X86/bmi2-x86_64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefixes=CHECK
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2,egpr --show-mc-encoding | FileCheck %s --check-prefixes=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2,egpr --show-mc-encoding | FileCheck %s --check-prefixes=EGPR
define i64 @bzhi64(i64 %x, i64 %y) {
; CHECK-LABEL: bzhi64:
diff --git a/llvm/test/CodeGen/X86/bmi2.ll b/llvm/test/CodeGen/X86/bmi2.ll
index cabeebb0c3f36..872535c2826e1 100644
--- a/llvm/test/CodeGen/X86/bmi2.ll
+++ b/llvm/test/CodeGen/X86/bmi2.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+bmi,+bmi2,+cmov | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+bmi,+bmi2,+cmov | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
define i32 @bzhi32(i32 %x, i32 %y) {
; X86-LABEL: bzhi32:
diff --git a/llvm/test/CodeGen/X86/bool-simplify.ll b/llvm/test/CodeGen/X86/bool-simplify.ll
index edc36fd8b1446..dd376f94d52a0 100644
--- a/llvm/test/CodeGen/X86/bool-simplify.ll
+++ b/llvm/test/CodeGen/X86/bool-simplify.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1,-avx,+rdrnd,+rdseed | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1,-avx,+rdrnd,+rdseed | FileCheck %s
define i32 @foo(<2 x i64> %c, i32 %a, i32 %b) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/bool-vector.ll b/llvm/test/CodeGen/X86/bool-vector.ll
index d52b455eb2e6b..b767d54c12180 100644
--- a/llvm/test/CodeGen/X86/bool-vector.ll
+++ b/llvm/test/CodeGen/X86/bool-vector.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
define i32 @PR15215_bad(<4 x i32> %input) nounwind {
; X86-LABEL: PR15215_bad:
diff --git a/llvm/test/CodeGen/X86/bool-zext.ll b/llvm/test/CodeGen/X86/bool-zext.ll
index 539be245eb1d0..490b6c8da948c 100644
--- a/llvm/test/CodeGen/X86/bool-zext.ll
+++ b/llvm/test/CodeGen/X86/bool-zext.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
; It's not necessary to zero-extend the arg because it is specified 'zeroext'.
define void @bar1(i1 zeroext %v1) nounwind ssp {
diff --git a/llvm/test/CodeGen/X86/br-fold.ll b/llvm/test/CodeGen/X86/br-fold.ll
index fb37d0d4a49aa..d6dd23d45fc5a 100644
--- a/llvm/test/CodeGen/X86/br-fold.ll
+++ b/llvm/test/CodeGen/X86/br-fold.ll
@@ -1,8 +1,8 @@
-; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck -check-prefix=X64_DARWIN %s
-; RUN: llc -mtriple=x86_64-pc-linux < %s | FileCheck -check-prefix=X64_LINUX %s
-; RUN: llc -mtriple=x86_64-pc-windows < %s | FileCheck -check-prefix=X64_WINDOWS %s
-; RUN: llc -mtriple=x86_64-pc-windows-gnu < %s | FileCheck -check-prefix=X64_WINDOWS_GNU %s
-; RUN: llc -mtriple=x86_64-scei-ps4 < %s | FileCheck -check-prefix=PS4 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin < %s | FileCheck -check-prefix=X64_DARWIN %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux < %s | FileCheck -check-prefix=X64_LINUX %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows < %s | FileCheck -check-prefix=X64_WINDOWS %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-gnu < %s | FileCheck -check-prefix=X64_WINDOWS_GNU %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-scei-ps4 < %s | FileCheck -check-prefix=PS4 %s
; X64_DARWIN: orq
; X64_DARWIN-NEXT: ud2
diff --git a/llvm/test/CodeGen/X86/branch-hint.ll b/llvm/test/CodeGen/X86/branch-hint.ll
index 591fb324e1b7b..b579922e919e9 100644
--- a/llvm/test/CodeGen/X86/branch-hint.ll
+++ b/llvm/test/CodeGen/X86/branch-hint.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64 -mattr=+branch-hint -enable-branch-hint | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64 -mattr=+branch-hint -enable-branch-hint -branch-hint-probability-threshold=50 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64 -mattr=+branch-hint -enable-branch-hint -branch-hint-probability-threshold=60 -tail-dup-placement=false | FileCheck --check-prefix=TH60 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+branch-hint -enable-branch-hint | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+branch-hint -enable-branch-hint -branch-hint-probability-threshold=50 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+branch-hint -enable-branch-hint -branch-hint-probability-threshold=60 -tail-dup-placement=false | FileCheck --check-prefix=TH60 %s
; Design: Add DS segment override prefix for condition branch who has high
diff --git a/llvm/test/CodeGen/X86/branchfolding-catchpads.ll b/llvm/test/CodeGen/X86/branchfolding-catchpads.ll
index 3059a702b6a49..20ba06b05f2e1 100644
--- a/llvm/test/CodeGen/X86/branchfolding-catchpads.ll
+++ b/llvm/test/CodeGen/X86/branchfolding-catchpads.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s
declare i32 @__CxxFrameHandler3(...)
diff --git a/llvm/test/CodeGen/X86/branchfolding-debugloc.ll b/llvm/test/CodeGen/X86/branchfolding-debugloc.ll
index cfcc2af16e3fc..66b2139ae7c31 100644
--- a/llvm/test/CodeGen/X86/branchfolding-debugloc.ll
+++ b/llvm/test/CodeGen/X86/branchfolding-debugloc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
;
; The test code is generated from the following source code:
;
diff --git a/llvm/test/CodeGen/X86/branchfolding-landingpads.ll b/llvm/test/CodeGen/X86/branchfolding-landingpads.ll
index a9ee990321efc..fc75979d46cf9 100644
--- a/llvm/test/CodeGen/X86/branchfolding-landingpads.ll
+++ b/llvm/test/CodeGen/X86/branchfolding-landingpads.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - -verify-machineinstrs | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/brcc.ll b/llvm/test/CodeGen/X86/brcc.ll
index dd00354b60a6d..e95810566df1e 100644
--- a/llvm/test/CodeGen/X86/brcc.ll
+++ b/llvm/test/CodeGen/X86/brcc.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s
define i64 @foo(i1 %0) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/brcond.ll b/llvm/test/CodeGen/X86/brcond.ll
index 02daaa23569b2..e68662ef6ebca 100644
--- a/llvm/test/CodeGen/X86/brcond.ll
+++ b/llvm/test/CodeGen/X86/brcond.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=penryn | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10 -mcpu=penryn | FileCheck %s
; rdar://7475489
diff --git a/llvm/test/CodeGen/X86/break-anti-dependencies.ll b/llvm/test/CodeGen/X86/break-anti-dependencies.ll
index b76e90752c740..8ce9973bc57cd 100644
--- a/llvm/test/CodeGen/X86/break-anti-dependencies.ll
+++ b/llvm/test/CodeGen/X86/break-anti-dependencies.ll
@@ -2,8 +2,8 @@
; Without list-burr scheduling we may not see the difference in codegen here.
; Use a subtarget that has post-RA scheduling enabled because the anti-dependency
; breaker requires liveness information to be kept.
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=atom -enable-misched=false -post-RA-scheduler -pre-RA-sched=list-burr -break-anti-dependencies=none | FileCheck %s --check-prefix=none
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=atom -post-RA-scheduler -break-anti-dependencies=critical | FileCheck %s --check-prefix=critical
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=atom -enable-misched=false -post-RA-scheduler -pre-RA-sched=list-burr -break-anti-dependencies=none | FileCheck %s --check-prefix=none
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=atom -post-RA-scheduler -break-anti-dependencies=critical | FileCheck %s --check-prefix=critical
define void @goo(ptr %r, ptr %p, ptr %q) nounwind {
; none-LABEL: goo:
diff --git a/llvm/test/CodeGen/X86/break-false-dep.ll b/llvm/test/CodeGen/X86/break-false-dep.ll
index 6943622fac7f2..28272bddfb0f1 100644
--- a/llvm/test/CodeGen/X86/break-false-dep.ll
+++ b/llvm/test/CodeGen/X86/break-false-dep.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse2 -mcpu=nehalem | FileCheck %s --check-prefixes=SSE,SSE-LINUX
-; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse2 -mcpu=nehalem | FileCheck %s --check-prefixes=SSE,SSE-WIN
-; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+avx -mcpu=corei7-avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+avx512vl -mcpu=skx | FileCheck %s --check-prefixes=AVX,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+sse2 -mcpu=nehalem | FileCheck %s --check-prefixes=SSE,SSE-LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mattr=+sse2 -mcpu=nehalem | FileCheck %s --check-prefixes=SSE,SSE-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mattr=+avx -mcpu=corei7-avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mattr=+avx512vl -mcpu=skx | FileCheck %s --check-prefixes=AVX,AVX512VL
define dso_local double @t1(ptr nocapture %x) nounwind readonly ssp {
; SSE-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll b/llvm/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll
index 37917b4c8dd55..87d136dc4c2b0 100644
--- a/llvm/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll
+++ b/llvm/test/CodeGen/X86/broadcast-elm-cross-splat-vec.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX1,X86-AVX1
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X86-AVX2
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F,X86-AVX512,X86-AVX512F
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW,X86-AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX1,X64-AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X64-AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F,X64-AVX512,X64-AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW,X64-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX1,X86-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X86-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F,X86-AVX512,X86-AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW,X86-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX1,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F,X64-AVX512,X64-AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512BW,X64-AVX512
;===-----------------------------------------------------------------------------===
; This test checks the ability to recognize a cross element pattern of
diff --git a/llvm/test/CodeGen/X86/broadcastm-lowering.ll b/llvm/test/CodeGen/X86/broadcastm-lowering.ll
index 266ab31616aaa..4332a76ab3f87 100644
--- a/llvm/test/CodeGen/X86/broadcastm-lowering.ll
+++ b/llvm/test/CodeGen/X86/broadcastm-lowering.ll
@@ -1,16 +1,16 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CD
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CD
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512cd,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CD
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512cd,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CD
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CDBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CDBW
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512cd,+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CDBW
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512cd,+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CDBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,avx512cd,+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512VLCDBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,avx512cd,+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512VLCDBW
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl,avx512cd,+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512VLCDBW
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl,avx512cd,+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512VLCDBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512cd,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512cd,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CDBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CDBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512cd,+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CDBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512cd,+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512CDBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,avx512cd,+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512VLCDBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,avx512cd,+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512VLCDBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl,avx512cd,+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512VLCDBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl,avx512cd,+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX512VLCDBW
define <2 x i64> @test_mm_epi64(<8 x i16> %a, <8 x i16> %b) {
; AVX512CD-LABEL: test_mm_epi64:
diff --git a/llvm/test/CodeGen/X86/bsr.ll b/llvm/test/CodeGen/X86/bsr.ll
index affacc5ee6487..98495451bcb89 100644
--- a/llvm/test/CodeGen/X86/bsr.ll
+++ b/llvm/test/CodeGen/X86/bsr.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
define i8 @cmov_bsr8(i8 %x, i8 %y) nounwind {
; X86-LABEL: cmov_bsr8:
diff --git a/llvm/test/CodeGen/X86/bss_pagealigned.ll b/llvm/test/CodeGen/X86/bss_pagealigned.ll
index 38c57cd4973f3..744dbe30c174f 100644
--- a/llvm/test/CodeGen/X86/bss_pagealigned.ll
+++ b/llvm/test/CodeGen/X86/bss_pagealigned.ll
@@ -1,4 +1,4 @@
-; RUN: llc --code-model=kernel < %s -asm-verbose=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting --code-model=kernel < %s -asm-verbose=0 | FileCheck %s
; PR4933
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/bswap-inline-asm.ll b/llvm/test/CodeGen/X86/bswap-inline-asm.ll
index a9ce616b7eccc..3b29c71366dc8 100644
--- a/llvm/test/CodeGen/X86/bswap-inline-asm.ll
+++ b/llvm/test/CodeGen/X86/bswap-inline-asm.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; bswap inline assembly should be preserved as-is.
diff --git a/llvm/test/CodeGen/X86/bswap-rotate.ll b/llvm/test/CodeGen/X86/bswap-rotate.ll
index 3326c1b3c0224..68ab6d87ebe42 100644
--- a/llvm/test/CodeGen/X86/bswap-rotate.ll
+++ b/llvm/test/CodeGen/X86/bswap-rotate.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=i686 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mcpu=i686 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
; Combine BSWAP (lowered to rolw 8) with a second rotate.
; This test checks for combining rotates with inconsistent constant value types.
diff --git a/llvm/test/CodeGen/X86/bswap-vector.ll b/llvm/test/CodeGen/X86/bswap-vector.ll
index cb8d8671ff8e8..20a3b8eb8cd7a 100644
--- a/llvm/test/CodeGen/X86/bswap-vector.ll
+++ b/llvm/test/CodeGen/X86/bswap-vector.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SSE,CHECK-NOSSSE3,CHECK-SSE-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SSE,CHECK-SSE-X64,CHECK-NOSSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SSE,CHECK-SSE-X64,CHECK-SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SSE,CHECK-NOSSSE3,CHECK-SSE-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SSE,CHECK-SSE-X64,CHECK-NOSSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SSE,CHECK-SSE-X64,CHECK-SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-AVX
declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>)
declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>)
diff --git a/llvm/test/CodeGen/X86/bswap-wide-int.ll b/llvm/test/CodeGen/X86/bswap-wide-int.ll
index 673b7f16de75c..0c72f5c56f7cd 100644
--- a/llvm/test/CodeGen/X86/bswap-wide-int.ll
+++ b/llvm/test/CodeGen/X86/bswap-wide-int.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+movbe | FileCheck %s --check-prefix=X86-MOVBE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+movbe | FileCheck %s --check-prefix=X64-MOVBE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+movbe | FileCheck %s --check-prefix=X86-MOVBE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+movbe | FileCheck %s --check-prefix=X64-MOVBE
declare i64 @llvm.bswap.i64(i64)
declare i128 @llvm.bswap.i128(i128)
diff --git a/llvm/test/CodeGen/X86/bswap_tree.ll b/llvm/test/CodeGen/X86/bswap_tree.ll
index b136263b179e7..c6bcc8be988a4 100644
--- a/llvm/test/CodeGen/X86/bswap_tree.ll
+++ b/llvm/test/CodeGen/X86/bswap_tree.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK64
; Check reconstructing bswap from shifted masks and tree of ORs
diff --git a/llvm/test/CodeGen/X86/btq.ll b/llvm/test/CodeGen/X86/btq.ll
index f11b170dba552..40647c5ee38f7 100644
--- a/llvm/test/CodeGen/X86/btq.ll
+++ b/llvm/test/CodeGen/X86/btq.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
declare dso_local void @bar()
diff --git a/llvm/test/CodeGen/X86/bug37521.ll b/llvm/test/CodeGen/X86/bug37521.ll
index 96d8202c1d9e8..91dd843fcfcf4 100644
--- a/llvm/test/CodeGen/X86/bug37521.ll
+++ b/llvm/test/CodeGen/X86/bug37521.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s | FileCheck %s
@a = external dso_local global <16 x float>, align 64
diff --git a/llvm/test/CodeGen/X86/bug80500.ll b/llvm/test/CodeGen/X86/bug80500.ll
index bdf72887ef2f9..b3c4b7c666944 100644
--- a/llvm/test/CodeGen/X86/bug80500.ll
+++ b/llvm/test/CodeGen/X86/bug80500.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686 -mcpu=skylake | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -mcpu=skylake | FileCheck %s
; Fix for a typo introduced by D80500
diff --git a/llvm/test/CodeGen/X86/build-vector-128.ll b/llvm/test/CodeGen/X86/build-vector-128.ll
index 51d3a65be5236..76abcdec1aa01 100644
--- a/llvm/test/CodeGen/X86/build-vector-128.ll
+++ b/llvm/test/CodeGen/X86/build-vector-128.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE-32 --check-prefix=SSE2-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE-64 --check-prefix=SSE2-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE-32 --check-prefix=SSE41-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE-64 --check-prefix=SSE41-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-32 --check-prefix=AVX1-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-64 --check-prefix=AVX1-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX-32 --check-prefix=AVX2-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX-64 --check-prefix=AVX2-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE-32 --check-prefix=SSE2-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE-64 --check-prefix=SSE2-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE-32 --check-prefix=SSE41-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE-64 --check-prefix=SSE41-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-32 --check-prefix=AVX1-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-64 --check-prefix=AVX1-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX-32 --check-prefix=AVX2-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX-64 --check-prefix=AVX2-64
define <2 x double> @test_buildvector_v2f64(double %a0, double %a1) {
; SSE-32-LABEL: test_buildvector_v2f64:
diff --git a/llvm/test/CodeGen/X86/build-vector-256.ll b/llvm/test/CodeGen/X86/build-vector-256.ll
index 773eb8f6742e5..59101725a268b 100644
--- a/llvm/test/CodeGen/X86/build-vector-256.ll
+++ b/llvm/test/CodeGen/X86/build-vector-256.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-32 --check-prefix=AVX1-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-64 --check-prefix=AVX1-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX-32 --check-prefix=AVX2-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX-64 --check-prefix=AVX2-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-32 --check-prefix=AVX1-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-64 --check-prefix=AVX1-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX-32 --check-prefix=AVX2-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX-64 --check-prefix=AVX2-64
define <4 x double> @test_buildvector_v4f64(double %a0, double %a1, double %a2, double %a3) {
; AVX-32-LABEL: test_buildvector_v4f64:
diff --git a/llvm/test/CodeGen/X86/build_fp16_constant_vector.ll b/llvm/test/CodeGen/X86/build_fp16_constant_vector.ll
index 6cb449822145a..b668682a4ed0e 100644
--- a/llvm/test/CodeGen/X86/build_fp16_constant_vector.ll
+++ b/llvm/test/CodeGen/X86/build_fp16_constant_vector.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 | FileCheck %s
define dso_local <32 x half> @foo(<32 x half> %a, <32 x half> %b, <32 x half> %c) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/buildvec-bitcast.ll b/llvm/test/CodeGen/X86/buildvec-bitcast.ll
index 980fd2dee0915..0d90956fde5a2 100644
--- a/llvm/test/CodeGen/X86/buildvec-bitcast.ll
+++ b/llvm/test/CodeGen/X86/buildvec-bitcast.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64 -mattr=avx512bw | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=avx512bw | FileCheck %s
; Verify that the DAGCombiner doesn't change build_vector to concat_vectors if
; the vector element type is different than splat type. The example here:
diff --git a/llvm/test/CodeGen/X86/buildvec-extract.ll b/llvm/test/CodeGen/X86/buildvec-extract.ll
index 9d856ed7647ca..bc57e34a97223 100644
--- a/llvm/test/CodeGen/X86/buildvec-extract.ll
+++ b/llvm/test/CodeGen/X86/buildvec-extract.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=AVX
define <2 x i64> @extract0_i32_zext_insert0_i64_undef(<4 x i32> %x) {
; SSE2-LABEL: extract0_i32_zext_insert0_i64_undef:
diff --git a/llvm/test/CodeGen/X86/bypass-slow-division-64.ll b/llvm/test/CodeGen/X86/bypass-slow-division-64.ll
index 821b7b8e4144f..1e5c6b7068881 100644
--- a/llvm/test/CodeGen/X86/bypass-slow-division-64.ll
+++ b/llvm/test/CodeGen/X86/bypass-slow-division-64.ll
@@ -1,30 +1,30 @@
; Check that 64-bit division is bypassed correctly.
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-idivq-to-divl | FileCheck %s --check-prefixes=CHECK,FAST-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+idivq-to-divl | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-idivq-to-divl | FileCheck %s --check-prefixes=CHECK,FAST-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+idivq-to-divl | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
; Intel
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=nehalem | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=sandybridge | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=haswell | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=skylake | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=alderlake | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=nehalem | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=sandybridge | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=haswell | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=skylake | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=alderlake | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
; AMD
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=barcelona | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver1 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver1 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver2 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver3 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver4 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver1 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver2 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver3 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver4 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver5 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver6 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=barcelona | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=btver1 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=bdver1 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=bdver2 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=bdver3 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=bdver4 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver1 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver2 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver3 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver4 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver5 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver6 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
; Additional tests for 64-bit divide bypass
diff --git a/llvm/test/CodeGen/X86/bypass-slow-division-tune.ll b/llvm/test/CodeGen/X86/bypass-slow-division-tune.ll
index afecf00113a0a..daa926207d14f 100644
--- a/llvm/test/CodeGen/X86/bypass-slow-division-tune.ll
+++ b/llvm/test/CodeGen/X86/bypass-slow-division-tune.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; Check that a division is bypassed when appropriate only.
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=atom < %s | FileCheck -check-prefixes=CHECK,ATOM %s
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 < %s | FileCheck -check-prefixes=CHECK,REST,X64 %s
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=silvermont < %s | FileCheck -check-prefixes=CHECK,REST,SLM %s
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake < %s | FileCheck -check-prefixes=CHECK,REST,SKL %s
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=goldmont < %s | FileCheck -check-prefixes=CHECK,REST,GMT %s
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=gracemont < %s | FileCheck -check-prefixes=CHECK,REST,GMT %s
-; RUN: llc -profile-summary-huge-working-set-size-threshold=1 -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake < %s | FileCheck -check-prefixes=HUGEWS %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=atom < %s | FileCheck -check-prefixes=CHECK,ATOM %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 < %s | FileCheck -check-prefixes=CHECK,REST,X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=silvermont < %s | FileCheck -check-prefixes=CHECK,REST,SLM %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake < %s | FileCheck -check-prefixes=CHECK,REST,SKL %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=goldmont < %s | FileCheck -check-prefixes=CHECK,REST,GMT %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=gracemont < %s | FileCheck -check-prefixes=CHECK,REST,GMT %s
+; RUN: llc -combiner-topological-sorting -profile-summary-huge-working-set-size-threshold=1 -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake < %s | FileCheck -check-prefixes=HUGEWS %s
; Verify that div32 is bypassed only for Atoms.
define i32 @div32(i32 %a, i32 %b) {
diff --git a/llvm/test/CodeGen/X86/byref.ll b/llvm/test/CodeGen/X86/byref.ll
index 67fa130ef9d73..7302c6d73c8b2 100644
--- a/llvm/test/CodeGen/X86/byref.ll
+++ b/llvm/test/CodeGen/X86/byref.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck %s
%Foo = type { i32, i32 }
diff --git a/llvm/test/CodeGen/X86/byte-constants.ll b/llvm/test/CodeGen/X86/byte-constants.ll
index ca0a6e974b512..510b8e2bdf305 100644
--- a/llvm/test/CodeGen/X86/byte-constants.ll
+++ b/llvm/test/CodeGen/X86/byte-constants.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
; CHECK: .globl x
; CHECK: x:
diff --git a/llvm/test/CodeGen/X86/byval-align.ll b/llvm/test/CodeGen/X86/byval-align.ll
index fcfd4d8c53fa7..e3b2a49046ea1 100644
--- a/llvm/test/CodeGen/X86/byval-align.ll
+++ b/llvm/test/CodeGen/X86/byval-align.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
%struct.S = type { i32}
@.str = private constant [10 x i8] c"ptr = %p\0A\00", align 1 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/byval-callee-cleanup.ll b/llvm/test/CodeGen/X86/byval-callee-cleanup.ll
index e809f0f2bdbff..8e140478ca6a8 100644
--- a/llvm/test/CodeGen/X86/byval-callee-cleanup.ll
+++ b/llvm/test/CodeGen/X86/byval-callee-cleanup.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-win32 | FileCheck %s
; Previously we would forget to align to stack slot alignment after placing a
; byval argument. Subsequent arguments would align themselves, but if it was
diff --git a/llvm/test/CodeGen/X86/byval.ll b/llvm/test/CodeGen/X86/byval.ll
index d538366ee0442..f8cadc556f26c 100644
--- a/llvm/test/CodeGen/X86/byval.ll
+++ b/llvm/test/CodeGen/X86/byval.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck -check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck -check-prefix=X64 %s
; Win64 has not supported byval yet.
-; RUN: llc < %s -mtriple=i686-- | FileCheck -check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck -check-prefix=X86 %s
%struct.s = type { i64, i64, i64 }
diff --git a/llvm/test/CodeGen/X86/byval2.ll b/llvm/test/CodeGen/X86/byval2.ll
index 77640e4bb5ac6..9bb1d58506190 100644
--- a/llvm/test/CodeGen/X86/byval2.ll
+++ b/llvm/test/CodeGen/X86/byval2.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=-avx | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=-avx | FileCheck %s -check-prefix=X64
; Win64 has not supported byval yet.
-; RUN: llc < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X86
%struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64,
i64, i64, i64, i64, i64, i64, i64, i64,
diff --git a/llvm/test/CodeGen/X86/byval3.ll b/llvm/test/CodeGen/X86/byval3.ll
index eef13f1f1aa27..50f3814310170 100644
--- a/llvm/test/CodeGen/X86/byval3.ll
+++ b/llvm/test/CodeGen/X86/byval3.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=-avx | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=-avx | FileCheck %s -check-prefix=X64
; Win64 has not supported byval yet.
-; RUN: llc < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X86
%struct.s = type { i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32,
diff --git a/llvm/test/CodeGen/X86/byval4.ll b/llvm/test/CodeGen/X86/byval4.ll
index bcb2818ee6e51..bc1d847705d6f 100644
--- a/llvm/test/CodeGen/X86/byval4.ll
+++ b/llvm/test/CodeGen/X86/byval4.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=-avx | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=-avx | FileCheck %s -check-prefix=X64
; Win64 has not supported byval yet.
-; RUN: llc < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X86
%struct.s = type { i16, i16, i16, i16, i16, i16, i16, i16,
i16, i16, i16, i16, i16, i16, i16, i16,
diff --git a/llvm/test/CodeGen/X86/byval5.ll b/llvm/test/CodeGen/X86/byval5.ll
index 28deafcd982f5..102889ace382d 100644
--- a/llvm/test/CodeGen/X86/byval5.ll
+++ b/llvm/test/CodeGen/X86/byval5.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=-avx | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=-avx | FileCheck %s -check-prefix=X64
; Win64 has not supported byval yet.
-; RUN: llc < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-avx | FileCheck %s -check-prefix=X86
%struct.s = type { i8, i8, i8, i8, i8, i8, i8, i8,
i8, i8, i8, i8, i8, i8, i8, i8,
diff --git a/llvm/test/CodeGen/X86/byval6.ll b/llvm/test/CodeGen/X86/byval6.ll
index e4ea5d9ab6cff..033b0f94d92cb 100644
--- a/llvm/test/CodeGen/X86/byval6.ll
+++ b/llvm/test/CodeGen/X86/byval6.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-- | FileCheck %s
%struct.W = type { x86_fp80, x86_fp80 }
@B = global %struct.W { x86_fp80 0xK4001A000000000000000, x86_fp80 0xK4001C000000000000000 }, align 32
diff --git a/llvm/test/CodeGen/X86/byval7.ll b/llvm/test/CodeGen/X86/byval7.ll
index ae058006dee3c..e9267b131d950 100644
--- a/llvm/test/CodeGen/X86/byval7.ll
+++ b/llvm/test/CodeGen/X86/byval7.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
%struct.S = type { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>,
<2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>,
diff --git a/llvm/test/CodeGen/X86/cache-intrinsic.ll b/llvm/test/CodeGen/X86/cache-intrinsic.ll
index d4e65aea515a4..9f61953d4ab71 100644
--- a/llvm/test/CodeGen/X86/cache-intrinsic.ll
+++ b/llvm/test/CodeGen/X86/cache-intrinsic.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/call-graph-section-addrtaken.ll b/llvm/test/CodeGen/X86/call-graph-section-addrtaken.ll
index ab8498d8d3451..3d67863ebd0bd 100644
--- a/llvm/test/CodeGen/X86/call-graph-section-addrtaken.ll
+++ b/llvm/test/CodeGen/X86/call-graph-section-addrtaken.ll
@@ -3,7 +3,7 @@
;; This test also makes sure that callback functions which meet the above constraint
;; are handled correctly.
-; RUN: llc -mtriple=x86_64-unknown-linux --call-graph-section -o - < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux --call-graph-section -o - < %s | FileCheck %s
declare !type !0 void @_Z6doWorkPFviE(ptr)
diff --git a/llvm/test/CodeGen/X86/call-graph-section-assembly.ll b/llvm/test/CodeGen/X86/call-graph-section-assembly.ll
index 02d71073b65c5..d361698260712 100644
--- a/llvm/test/CodeGen/X86/call-graph-section-assembly.ll
+++ b/llvm/test/CodeGen/X86/call-graph-section-assembly.ll
@@ -4,7 +4,7 @@
;; call sites annotated with !callee_type metadata.
;; Test if the .llvm.callgraph section contains unique direct callees.
-; RUN: llc -mtriple=x86_64-unknown-linux --call-graph-section -o - < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux --call-graph-section -o - < %s | FileCheck %s
declare !type !0 void @direct_foo()
declare !type !1 i32 @direct_bar(i8)
diff --git a/llvm/test/CodeGen/X86/call-graph-section-tailcall.ll b/llvm/test/CodeGen/X86/call-graph-section-tailcall.ll
index 49cc335bf7379..a1bfd3aba43d4 100644
--- a/llvm/test/CodeGen/X86/call-graph-section-tailcall.ll
+++ b/llvm/test/CodeGen/X86/call-graph-section-tailcall.ll
@@ -3,7 +3,7 @@
; REQUIRES: x86-registered-target
; REQUIRES: arm-registered-target
-; RUN: llc -mtriple=x86_64-unknown-linux --call-graph-section -filetype=obj -o - < %s | \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux --call-graph-section -filetype=obj -o - < %s | \
; RUN: llvm-readelf -x .llvm.callgraph - | FileCheck %s
define i32 @check_tailcall(ptr %func, i8 %x) !type !0 {
diff --git a/llvm/test/CodeGen/X86/call-graph-section.ll b/llvm/test/CodeGen/X86/call-graph-section.ll
index 8a1c6ca627cb5..54c255e54039d 100644
--- a/llvm/test/CodeGen/X86/call-graph-section.ll
+++ b/llvm/test/CodeGen/X86/call-graph-section.ll
@@ -3,7 +3,7 @@
; REQUIRES: x86-registered-target
; REQUIRES: arm-registered-target
-; RUN: llc -mtriple=x86_64-unknown-linux --call-graph-section -filetype=obj -o - < %s | \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux --call-graph-section -filetype=obj -o - < %s | \
; RUN: llvm-readelf -x .llvm.callgraph - | FileCheck %s
declare !type !0 void @foo()
diff --git a/llvm/test/CodeGen/X86/call-imm.ll b/llvm/test/CodeGen/X86/call-imm.ll
index b8f5a0cb9b428..74b382c665e80 100644
--- a/llvm/test/CodeGen/X86/call-imm.ll
+++ b/llvm/test/CodeGen/X86/call-imm.ll
@@ -1,12 +1,12 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=static | FileCheck -check-prefix X86STA %s
-; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic | FileCheck -check-prefix X86PIC %s
-; RUN: llc < %s -mtriple=i386-pc-linux -relocation-model=dynamic-no-pic | FileCheck -check-prefix X86DYN %s
-; RUN: llc < %s -mtriple=i386-pc-win32 -relocation-model=static | FileCheck -check-prefix X86WINSTA %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -relocation-model=static | FileCheck -check-prefix X86STA %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -relocation-model=pic | FileCheck -check-prefix X86PIC %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux -relocation-model=dynamic-no-pic | FileCheck -check-prefix X86DYN %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-win32 -relocation-model=static | FileCheck -check-prefix X86WINSTA %s
; Call to immediate is not safe on x86-64 unless we *know* that the
; call will be within 32-bits pcrel from the dest immediate.
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck -check-prefix X64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck -check-prefix X64 %s
; PR3666
; PR3773
diff --git a/llvm/test/CodeGen/X86/call-push.ll b/llvm/test/CodeGen/X86/call-push.ll
index 392de0f545022..b55a397f6bf9f 100644
--- a/llvm/test/CodeGen/X86/call-push.ll
+++ b/llvm/test/CodeGen/X86/call-push.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -frame-pointer=all -no-x86-call-frame-opt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -frame-pointer=all -no-x86-call-frame-opt | FileCheck %s
%struct.decode_t = type { i8, i8, i8, i8, i16, i8, i8, ptr }
%struct.range_t = type { float, float, i32, i32, i32, [0 x i8] }
diff --git a/llvm/test/CodeGen/X86/call-rv-marker.ll b/llvm/test/CodeGen/X86/call-rv-marker.ll
index 6ce7430b52c71..0e3058b3ac360 100644
--- a/llvm/test/CodeGen/X86/call-rv-marker.ll
+++ b/llvm/test/CodeGen/X86/call-rv-marker.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-apple-macosx -verify-machineinstrs -o - %s | FileCheck --check-prefix=CHECK %s
-; RUN: llc -mtriple=x86_64-windows-msvc -verify-machineinstrs -o - %s | FileCheck --check-prefix=WINABI %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx -verify-machineinstrs -o - %s | FileCheck --check-prefix=CHECK %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc -verify-machineinstrs -o - %s | FileCheck --check-prefix=WINABI %s
; TODO: support marker generation with GlobalISel
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
diff --git a/llvm/test/CodeGen/X86/call-site-info-output.ll b/llvm/test/CodeGen/X86/call-site-info-output.ll
index 6d21940cf9ffc..eba23beb429c3 100644
--- a/llvm/test/CodeGen/X86/call-site-info-output.ll
+++ b/llvm/test/CodeGen/X86/call-site-info-output.ll
@@ -1,6 +1,6 @@
; Test call site info MIR printer and parser.Parser assertions and machine
; verifier will check the rest;
-; RUN: llc -emit-call-site-info %s -stop-before=finalize-isel -o %t.mir
+; RUN: llc -combiner-topological-sorting -emit-call-site-info %s -stop-before=finalize-isel -o %t.mir
; RUN: cat %t.mir | FileCheck %s
; CHECK: name: fn2
; CHECK: callSites:
@@ -10,8 +10,8 @@
; CHECK-NEXT: arg: 0, reg: '$edi'
; CHECK-NEXT: arg: 1, reg: '$esi'
; CHECK-NEXT: arg: 2, reg: '$edx'
-; RUN: llc -emit-call-site-info %t.mir -run-pass=finalize-isel -o -| FileCheck %s --check-prefix=PARSER
-; RUN: llc -emit-call-site-info %t.mir -passes=finalize-isel -o -| FileCheck %s --check-prefix=PARSER
+; RUN: llc -combiner-topological-sorting -emit-call-site-info %t.mir -run-pass=finalize-isel -o -| FileCheck %s --check-prefix=PARSER
+; RUN: llc -combiner-topological-sorting -emit-call-site-info %t.mir -passes=finalize-isel -o -| FileCheck %s --check-prefix=PARSER
; Verify that we are able to parse output mir and that we are getting the same result.
; PARSER: name: fn2
; PARSER: callSites:
diff --git a/llvm/test/CodeGen/X86/call-structfp.ll b/llvm/test/CodeGen/X86/call-structfp.ll
index 19a42381361c2..95b5817200420 100644
--- a/llvm/test/CodeGen/X86/call-structfp.ll
+++ b/llvm/test/CodeGen/X86/call-structfp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnux32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnux32 | FileCheck %s
declare { i64, ptr } @f()
define void @pr52357() {
; CHECK-LABEL: pr52357:
diff --git a/llvm/test/CodeGen/X86/callbr-asm-bb-exports.ll b/llvm/test/CodeGen/X86/callbr-asm-bb-exports.ll
index 35c921b6fd6fc..9e6ba8c073807 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-bb-exports.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-bb-exports.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -o /dev/null -debug-only=isel 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -o /dev/null -debug-only=isel 2>&1 | FileCheck %s
; Make sure we emit the basic block exports and the TokenFactor before the
; inlineasm_br. Not sure how to get a MachineIR change so this reads the debug
diff --git a/llvm/test/CodeGen/X86/callbr-asm-blockplacement.ll b/llvm/test/CodeGen/X86/callbr-asm-blockplacement.ll
index db27132d4055b..d45b18665397a 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-blockplacement.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-blockplacement.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; This test asserted in MachineBlockPlacement during asm-goto bring up.
diff --git a/llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll b/llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll
index 3d389523dffb3..8615d9dd30fe8 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; This test hung in the BranchFolding pass during asm-goto bring up
diff --git a/llvm/test/CodeGen/X86/callbr-asm-destinations.ll b/llvm/test/CodeGen/X86/callbr-asm-destinations.ll
index 71e45f0bab423..5bd8d00a9bd40 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-destinations.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-destinations.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-- -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -verify-machineinstrs < %s | FileCheck %s
define i32 @duplicate_normal_and_indirect_dest(i32 %a) {
; CHECK-LABEL: duplicate_normal_and_indirect_dest:
diff --git a/llvm/test/CodeGen/X86/callbr-asm-different-indirect-target-end-to-end.ll b/llvm/test/CodeGen/X86/callbr-asm-different-indirect-target-end-to-end.ll
index b9ef6ecf8800b..da5184a9de512 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-different-indirect-target-end-to-end.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-different-indirect-target-end-to-end.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -mtriple=x86_64-- -O1 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O1 < %s | FileCheck %s
define i64 @inlineasm_br_different_indirect_target(i1 %cmp) {
; CHECK-LABEL: inlineasm_br_different_indirect_target:
diff --git a/llvm/test/CodeGen/X86/callbr-asm-endbr.ll b/llvm/test/CodeGen/X86/callbr-asm-endbr.ll
index 133de89d5f3a1..c875efa779161 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-endbr.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-endbr.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i32 @test1(i32 %a) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/callbr-asm-instr-scheduling.ll b/llvm/test/CodeGen/X86/callbr-asm-instr-scheduling.ll
index 1d1a010b95573..c2124c450b963 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-instr-scheduling.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-instr-scheduling.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -mcpu=znver2 -O2 -frame-pointer=none < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -mcpu=znver2 -O2 -frame-pointer=none < %s | FileCheck %s
; Make sure that instructions aren't scheduled after the "callbr". In the
; example below, we don't want the "shrxq" through "leaq" instructions to be
diff --git a/llvm/test/CodeGen/X86/callbr-asm-label-addr.ll b/llvm/test/CodeGen/X86/callbr-asm-label-addr.ll
index b369662f85306..4eb39c0c207b5 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-label-addr.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-label-addr.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define i32 @test1(i32 %x) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/callbr-asm-loop.ll b/llvm/test/CodeGen/X86/callbr-asm-loop.ll
index 0b6898815f8cc..c033c05344798 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-loop.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-loop.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -O1 -mtriple=i686-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O1 -mtriple=i686-- < %s | FileCheck %s
; Test that causes multiple defs of %eax.
define i32 @loop1() nounwind {
diff --git a/llvm/test/CodeGen/X86/callbr-asm-obj-file.ll b/llvm/test/CodeGen/X86/callbr-asm-obj-file.ll
index 43089d49d4652..b247b95e083e5 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-obj-file.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-obj-file.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -filetype=obj -o - \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -filetype=obj -o - \
; RUN: | llvm-objdump --no-print-imm-hex --triple=x86_64-linux-gnu -d - \
; RUN: | FileCheck %s
diff --git a/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel-m32.ll b/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel-m32.ll
index 187298e7b815b..dcf532d309b75 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel-m32.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel-m32.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; FIXME(ndesaulniers): get this test to pass with -verify-machineinstrs
; enabled. https://github.com/llvm/llvm-project/issues/60827
-; RUN: llc -mtriple=i386-linux-gnu %s -o - -stop-after=finalize-isel \
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu %s -o - -stop-after=finalize-isel \
; RUN: -verify-machineinstrs=0 -start-before=x86-isel | FileCheck %s
define i8 @emulator_cmpxchg_emulated() {
diff --git a/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel.ll b/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel.ll
index 77f4138788197..f41e41250c5bc 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-outputs-indirect-isel.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; FIXME(ndesaulniers): get this test to pass with -verify-machineinstrs
; enabled. https://github.com/llvm/llvm-project/issues/60827
-; RUN: llc -mtriple=x86_64-linux-gnu %s -o - -stop-after=finalize-isel \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu %s -o - -stop-after=finalize-isel \
; RUN: -verify-machineinstrs=0 -start-before=x86-isel | FileCheck %s
; One virtual register, w/o phi
diff --git a/llvm/test/CodeGen/X86/callbr-asm-outputs-pred-succ.ll b/llvm/test/CodeGen/X86/callbr-asm-outputs-pred-succ.ll
index 1504516d60cde..9d7a2ab7e80c6 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-outputs-pred-succ.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-outputs-pred-succ.ll
@@ -1,7 +1,7 @@
; Tests that InstrEmitter::EmitMachineNode correctly sets predecessors and
; successors.
-; RUN: llc -stop-after=finalize-isel -print-after=finalize-isel -mtriple=i686-- < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -stop-after=finalize-isel -print-after=finalize-isel -mtriple=i686-- < %s 2>&1 | FileCheck %s
; The block containting the INLINEASM_BR should have a fallthrough and its
; indirect targets as its successors. Fallthrough should have 100% branch weight,
diff --git a/llvm/test/CodeGen/X86/callbr-asm-outputs.ll b/llvm/test/CodeGen/X86/callbr-asm-outputs.ll
index 6ee43099209d2..635b2c0ea7698 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-outputs.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-outputs.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-- -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -verify-machineinstrs < %s | FileCheck %s
; A test for asm-goto output
diff --git a/llvm/test/CodeGen/X86/callbr-asm-phi-placement.ll b/llvm/test/CodeGen/X86/callbr-asm-phi-placement.ll
index 1a4f24e3c5b42..e0dc580c6278f 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-phi-placement.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-phi-placement.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -O2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -O2 < %s | FileCheck %s
;; https://llvm.org/PR47468
diff --git a/llvm/test/CodeGen/X86/callbr-asm-sink.ll b/llvm/test/CodeGen/X86/callbr-asm-sink.ll
index c0a501fba0919..03d2fb153c143 100644
--- a/llvm/test/CodeGen/X86/callbr-asm-sink.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm-sink.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
;; Verify that the machine instructions generated from the first
;; getelementptr don't get sunk below the callbr. (Reduced from a bug
diff --git a/llvm/test/CodeGen/X86/callbr-asm.ll b/llvm/test/CodeGen/X86/callbr-asm.ll
index 16b23fa81e341..dd631daad069d 100644
--- a/llvm/test/CodeGen/X86/callbr-asm.ll
+++ b/llvm/test/CodeGen/X86/callbr-asm.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -O3 -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -O3 -verify-machineinstrs | FileCheck %s
; Tests for using callbr as an asm-goto wrapper
diff --git a/llvm/test/CodeGen/X86/calleetypeid-directcall-mismatched.ll b/llvm/test/CodeGen/X86/calleetypeid-directcall-mismatched.ll
index 7881ea7d59314..58fcf697091aa 100644
--- a/llvm/test/CodeGen/X86/calleetypeid-directcall-mismatched.ll
+++ b/llvm/test/CodeGen/X86/calleetypeid-directcall-mismatched.ll
@@ -1,6 +1,6 @@
;; Tests that callee_type metadata attached to direct call sites are safely ignored.
-; RUN: llc --call-graph-section -mtriple x86_64-linux-gnu < %s -stop-after=finalize-isel -o - | FileCheck --match-full-lines %s
+; RUN: llc -combiner-topological-sorting --call-graph-section -mtriple x86_64-linux-gnu < %s -stop-after=finalize-isel -o - | FileCheck --match-full-lines %s
;; Test that `calleeTypeIds` field is not present in `callSites`
; CHECK-LABEL: callSites:
diff --git a/llvm/test/CodeGen/X86/callsite-emit-calleetypeid-tailcall.ll b/llvm/test/CodeGen/X86/callsite-emit-calleetypeid-tailcall.ll
index 8f6b7a6d7f240..bacc206f7683a 100644
--- a/llvm/test/CodeGen/X86/callsite-emit-calleetypeid-tailcall.ll
+++ b/llvm/test/CodeGen/X86/callsite-emit-calleetypeid-tailcall.ll
@@ -3,7 +3,7 @@
;; Verify the exact calleeTypeIds value to ensure it is not garbage but the value
;; computed as the type id from the callee_type metadata.
-; RUN: llc --call-graph-section -mtriple=x86_64-unknown-linux < %s -stop-after=finalize-isel -o - | FileCheck --match-full-lines %s
+; RUN: llc -combiner-topological-sorting --call-graph-section -mtriple=x86_64-unknown-linux < %s -stop-after=finalize-isel -o - | FileCheck --match-full-lines %s
define i32 @check_tailcall(ptr %func, i8 %x) !type !0 {
entry:
diff --git a/llvm/test/CodeGen/X86/callsite-emit-calleetypeid.ll b/llvm/test/CodeGen/X86/callsite-emit-calleetypeid.ll
index e97a6ac75e111..abfdfc79ba2fb 100644
--- a/llvm/test/CodeGen/X86/callsite-emit-calleetypeid.ll
+++ b/llvm/test/CodeGen/X86/callsite-emit-calleetypeid.ll
@@ -3,7 +3,7 @@
;; Verify the exact calleeTypeIds value to ensure it is not garbage but the value
;; computed as the type id from the callee_type metadata.
-; RUN: llc --call-graph-section -mtriple=x86_64-unknown-linux < %s -stop-after=finalize-isel -o - | FileCheck --match-full-lines %s
+; RUN: llc -combiner-topological-sorting --call-graph-section -mtriple=x86_64-unknown-linux < %s -stop-after=finalize-isel -o - | FileCheck --match-full-lines %s
; CHECK: name: main
; CHECK: callSites:
diff --git a/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll b/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
index 8b3aa2964db02..3b4fa2d5897ec 100644
--- a/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
+++ b/llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --default-march x86_64-unknown-linux-gnu --version 5
-; RUN: llc -mattr=+sse2 -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=SSE
-; RUN: llc -mattr=+avx -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=AVX,AVX1
-; RUN: llc -mattr=+avx2 -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=AVX,AVX2
-; RUN: llc -mattr=+avx512f -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=AVX512,AVX512F
-; RUN: llc -mattr=+avx512bw -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting -mattr=+sse2 -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting -mattr=+avx -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting -mattr=+avx2 -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting -mattr=+avx512f -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting -mattr=+avx512bw -mtriple=x86_64 < %s | FileCheck %s -check-prefixes=AVX512,AVX512BW
define void @v_test_canonicalize__half(half addrspace(1)* %out) nounwind {
; SSE-LABEL: v_test_canonicalize__half:
diff --git a/llvm/test/CodeGen/X86/cas.ll b/llvm/test/CodeGen/X86/cas.ll
index ba8df3e2a1b14..8a758336d584f 100644
--- a/llvm/test/CodeGen/X86/cas.ll
+++ b/llvm/test/CodeGen/X86/cas.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux-gnu %s -o - -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu %s -o - -no-integrated-as | FileCheck %s
; C code this came from
;bool cas(float volatile *p, ptr expected, float desired) {
diff --git a/llvm/test/CodeGen/X86/cast-vsel.ll b/llvm/test/CodeGen/X86/cast-vsel.ll
index 79513b205933e..2e0bf260d0eca 100644
--- a/llvm/test/CodeGen/X86/cast-vsel.ll
+++ b/llvm/test/CodeGen/X86/cast-vsel.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
; If we have a cmp and a sel with different-sized operands followed by a size-changing cast,
; we may want to pull the cast ahead of the select operands to create a select with matching op sizes:
diff --git a/llvm/test/CodeGen/X86/catch.ll b/llvm/test/CodeGen/X86/catch.ll
index 04357541755d3..685a3565e2f8c 100644
--- a/llvm/test/CodeGen/X86/catch.ll
+++ b/llvm/test/CodeGen/X86/catch.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
; PR18390
; We used to assert creating this label. The name itself is not critical. It
diff --git a/llvm/test/CodeGen/X86/catchpad-dynamic-alloca.ll b/llvm/test/CodeGen/X86/catchpad-dynamic-alloca.ll
index 6b63162717e7f..288b238f8809a 100644
--- a/llvm/test/CodeGen/X86/catchpad-dynamic-alloca.ll
+++ b/llvm/test/CodeGen/X86/catchpad-dynamic-alloca.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/catchpad-lifetime.ll b/llvm/test/CodeGen/X86/catchpad-lifetime.ll
index bbcbb636c3749..133df77570cf8 100644
--- a/llvm/test/CodeGen/X86/catchpad-lifetime.ll
+++ b/llvm/test/CodeGen/X86/catchpad-lifetime.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i686-windows-msvc < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-windows-msvc < %s | FileCheck %s --check-prefix=X86
declare void @throw()
diff --git a/llvm/test/CodeGen/X86/catchpad-realign-savexmm.ll b/llvm/test/CodeGen/X86/catchpad-realign-savexmm.ll
index 7e2651da43c31..b35c43bac1508 100644
--- a/llvm/test/CodeGen/X86/catchpad-realign-savexmm.ll
+++ b/llvm/test/CodeGen/X86/catchpad-realign-savexmm.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-windows-msvc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc -verify-machineinstrs < %s | FileCheck %s
; We should store -2 into UnwindHelp in a slot immediately after the last XMM
; CSR save.
diff --git a/llvm/test/CodeGen/X86/catchpad-regmask.ll b/llvm/test/CodeGen/X86/catchpad-regmask.ll
index 713d015e2c15b..cdd35a1f5d1bb 100644
--- a/llvm/test/CodeGen/X86/catchpad-regmask.ll
+++ b/llvm/test/CodeGen/X86/catchpad-regmask.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Based on this code:
;
diff --git a/llvm/test/CodeGen/X86/catchpad-reuse.ll b/llvm/test/CodeGen/X86/catchpad-reuse.ll
index 163980fddf04f..770502b60f409 100644
--- a/llvm/test/CodeGen/X86/catchpad-reuse.ll
+++ b/llvm/test/CodeGen/X86/catchpad-reuse.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; IR generated by the following C++ source with modifications to reuse the 'v'
; alloca between catchpads:
diff --git a/llvm/test/CodeGen/X86/catchpad-weight.ll b/llvm/test/CodeGen/X86/catchpad-weight.ll
index 699243d9d262c..171861602f9ec 100644
--- a/llvm/test/CodeGen/X86/catchpad-weight.ll
+++ b/llvm/test/CodeGen/X86/catchpad-weight.ll
@@ -1,4 +1,4 @@
-; RUN: llc -print-after=finalize-isel %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -print-after=finalize-isel %s -o /dev/null 2>&1 | FileCheck %s
; Check if the edge weight to the catchpad is calculated correctly.
diff --git a/llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll b/llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll
index 24d3030ea4bdb..203f7ba079e8a 100644
--- a/llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll
+++ b/llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
; BranchFolding used to remove our empty landingpad block, which is
; undesirable.
diff --git a/llvm/test/CodeGen/X86/catchret-fallthrough.ll b/llvm/test/CodeGen/X86/catchret-fallthrough.ll
index 14ed9ee143007..172c35812f72b 100644
--- a/llvm/test/CodeGen/X86/catchret-fallthrough.ll
+++ b/llvm/test/CodeGen/X86/catchret-fallthrough.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
; We used to have an issue where we inserted an MBB between invoke.cont.3 and
; its fallthrough target of ret void.
diff --git a/llvm/test/CodeGen/X86/catchret-regmask.ll b/llvm/test/CodeGen/X86/catchret-regmask.ll
index 773e84179f0e4..5066f0eeb6c49 100644
--- a/llvm/test/CodeGen/X86/catchret-regmask.ll
+++ b/llvm/test/CodeGen/X86/catchret-regmask.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/cet_endbr_imm_enhance.ll b/llvm/test/CodeGen/X86/cet_endbr_imm_enhance.ll
index 98d315ad14e68..01aea81b60267 100644
--- a/llvm/test/CodeGen/X86/cet_endbr_imm_enhance.ll
+++ b/llvm/test/CodeGen/X86/cet_endbr_imm_enhance.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O2 -mtriple=x86_64-unknown-unknown -x86-indirect-branch-tracking | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-unknown-unknown -x86-indirect-branch-tracking | FileCheck %s
; This test is for CET enhancement.
;
diff --git a/llvm/test/CodeGen/X86/cfguard-checks-funclet.ll b/llvm/test/CodeGen/X86/cfguard-checks-funclet.ll
index fa7388e9e59d2..10b134ecfd83f 100644
--- a/llvm/test/CodeGen/X86/cfguard-checks-funclet.ll
+++ b/llvm/test/CodeGen/X86/cfguard-checks-funclet.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-pc-windows-msvc | FileCheck %s -check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s -check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-windows-msvc | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s -check-prefixes=X64
; Control Flow Guard is currently only available on Windows
; funclets only supported in MSVC env.
diff --git a/llvm/test/CodeGen/X86/cfguard-checks.ll b/llvm/test/CodeGen/X86/cfguard-checks.ll
index ec9c5ee5e01a2..0b9878155660e 100644
--- a/llvm/test/CodeGen/X86/cfguard-checks.ll
+++ b/llvm/test/CodeGen/X86/cfguard-checks.ll
@@ -1,9 +1,9 @@
-; RUN: llc < %s -mtriple=i686-pc-windows-msvc | FileCheck %s -check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s -check-prefixes=X64,X64_MSVC,X64_SELDAG
-; RUN: llc < %s --fast-isel -mtriple=x86_64-pc-windows-msvc | FileCheck %s -check-prefixes=X64,X64_MSVC,X64_FISEL
-; RUN: llc < %s -mtriple=i686-w64-windows-gnu | FileCheck %s -check-prefixes=X86,X86_MINGW
-; RUN: llc < %s -mtriple=x86_64-w64-windows-gnu | FileCheck %s -check-prefixes=X64,X64_MINGW,X64_SELDAG
-; RUN: llc < %s --fast-isel -mtriple=x86_64-w64-windows-gnu | FileCheck %s -check-prefixes=X64,X64_MINGW,X64_FISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-windows-msvc | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s -check-prefixes=X64,X64_MSVC,X64_SELDAG
+; RUN: llc -combiner-topological-sorting < %s --fast-isel -mtriple=x86_64-pc-windows-msvc | FileCheck %s -check-prefixes=X64,X64_MSVC,X64_FISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-w64-windows-gnu | FileCheck %s -check-prefixes=X86,X86_MINGW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-w64-windows-gnu | FileCheck %s -check-prefixes=X64,X64_MINGW,X64_SELDAG
+; RUN: llc -combiner-topological-sorting < %s --fast-isel -mtriple=x86_64-w64-windows-gnu | FileCheck %s -check-prefixes=X64,X64_MINGW,X64_FISEL
; Control Flow Guard is currently only available on Windows
; Test that Control Flow Guard checks are correctly added when required.
diff --git a/llvm/test/CodeGen/X86/cfguard-module-flag.ll b/llvm/test/CodeGen/X86/cfguard-module-flag.ll
index bf0120781292f..dfb735c488204 100644
--- a/llvm/test/CodeGen/X86/cfguard-module-flag.ll
+++ b/llvm/test/CodeGen/X86/cfguard-module-flag.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=i686-pc-windows-msvc | FileCheck %s -check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=i686-w64-windows-gnu | FileCheck %s -check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-w64-windows-gnu | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-windows-msvc | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-w64-windows-gnu | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-w64-windows-gnu | FileCheck %s -check-prefix=X64
; Control Flow Guard is currently only available on Windows
; Test that Control Flow Guard checks are not added in modules with the
diff --git a/llvm/test/CodeGen/X86/cfguard-x86-vectorcall.ll b/llvm/test/CodeGen/X86/cfguard-x86-vectorcall.ll
index fd95e923df7ce..13c3000de5b33 100644
--- a/llvm/test/CodeGen/X86/cfguard-x86-vectorcall.ll
+++ b/llvm/test/CodeGen/X86/cfguard-x86-vectorcall.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-pc-windows-msvc | FileCheck %s -check-prefix=X86
-; RUN: llc < %s -mtriple=i686-w64-windows-gnu | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-windows-msvc | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-w64-windows-gnu | FileCheck %s -check-prefix=X86
; Control Flow Guard is currently only available on Windows
%struct.HVA = type { double, double, double, double }
diff --git a/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll b/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll
index 1b7cf85f16579..cd5b1119d82c0 100644
--- a/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll
+++ b/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll
@@ -1,6 +1,6 @@
-; RUN: llc -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=asm --frame-pointer=all -o - | FileCheck --check-prefix=SECTIONS_CFI %s
-; RUN: llc -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=asm --frame-pointer=none -o - | FileCheck --check-prefix=SECTIONS_NOFP_CFI %s
-; RUN: llc -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=obj --frame-pointer=all -o - | llvm-dwarfdump --eh-frame - | FileCheck --check-prefix=EH_FRAME %s
+; RUN: llc -combiner-topological-sorting -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=asm --frame-pointer=all -o - | FileCheck --check-prefix=SECTIONS_CFI %s
+; RUN: llc -combiner-topological-sorting -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=asm --frame-pointer=none -o - | FileCheck --check-prefix=SECTIONS_NOFP_CFI %s
+; RUN: llc -combiner-topological-sorting -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=obj --frame-pointer=all -o - | llvm-dwarfdump --eh-frame - | FileCheck --check-prefix=EH_FRAME %s
;; void f1();
;; void f3(bool b) {
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll b/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll
index 5fda94694ff43..e865473ece318 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll
+++ b/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll
@@ -1,6 +1,6 @@
;; This test checks if CFI instructions for all callee saved registers are emitted
;; correctly with basic block sections.
-; RUN: llc %s -mtriple=x86_64 -filetype=asm --basic-block-sections=all --frame-pointer=all -o - | FileCheck --check-prefix=SECTIONS_CFI %s
+; RUN: llc -combiner-topological-sorting %s -mtriple=x86_64 -filetype=asm --basic-block-sections=all --frame-pointer=all -o - | FileCheck --check-prefix=SECTIONS_CFI %s
; SECTIONS_CFI: _Z3foob:
; SECTIONS_CFI: .cfi_offset %rbp, -16
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-check-order.ll b/llvm/test/CodeGen/X86/cfi-inserter-check-order.ll
index d2f47c2d66b5f..ba8192c2fd28e 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-check-order.ll
+++ b/llvm/test/CodeGen/X86/cfi-inserter-check-order.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-- -O2 -enable-machine-outliner -debug-pass=Structure < %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O2 -enable-machine-outliner -debug-pass=Structure < %s -o /dev/null 2>&1 | FileCheck %s
; REQUIRES: asserts
diff --git a/llvm/test/CodeGen/X86/cfi-xmm-asm.ll b/llvm/test/CodeGen/X86/cfi-xmm-asm.ll
index 530c522a318bc..84550442ebd77 100644
--- a/llvm/test/CodeGen/X86/cfi-xmm-asm.ll
+++ b/llvm/test/CodeGen/X86/cfi-xmm-asm.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -mtriple x86_64-w64-windows-gnu -filetype=asm -exception-model=dwarf -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-w64-windows-gnu -filetype=asm -exception-model=dwarf -o - %s | FileCheck %s
define void @_Z1fv() {
; CHECK-LABEL: _Z1fv:
diff --git a/llvm/test/CodeGen/X86/cfi-xmm.ll b/llvm/test/CodeGen/X86/cfi-xmm.ll
index fa972d04f5cef..fcc6e2f925885 100644
--- a/llvm/test/CodeGen/X86/cfi-xmm.ll
+++ b/llvm/test/CodeGen/X86/cfi-xmm.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple x86_64-w64-windows-gnu -exception-model=dwarf -stop-after=prologepilog | FileCheck %s --check-prefix=PEI
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-w64-windows-gnu -exception-model=dwarf -stop-after=prologepilog | FileCheck %s --check-prefix=PEI
define void @_Z1fv() {
; PEI-LABEL: name: _Z1fv
diff --git a/llvm/test/CodeGen/X86/cfi.ll b/llvm/test/CodeGen/X86/cfi.ll
index 5a09577636260..c8ebc46ed080b 100644
--- a/llvm/test/CodeGen/X86/cfi.ll
+++ b/llvm/test/CodeGen/X86/cfi.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck --check-prefix=STATIC %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic | FileCheck --check-prefix=PIC %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck --check-prefix=STATIC %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic | FileCheck --check-prefix=PIC %s
; STATIC: .cfi_personality 3, __gxx_personality_v0
; STATIC: .cfi_lsda 3, .Lexception0
diff --git a/llvm/test/CodeGen/X86/cfstring.ll b/llvm/test/CodeGen/X86/cfstring.ll
index 402d0f9623faf..97affe9f6e015 100644
--- a/llvm/test/CodeGen/X86/cfstring.ll
+++ b/llvm/test/CodeGen/X86/cfstring.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; <rdar://problem/10564621>
%0 = type opaque
diff --git a/llvm/test/CodeGen/X86/cgp-usubo.ll b/llvm/test/CodeGen/X86/cgp-usubo.ll
index 57e2a2b22bc9b..1bfedce195ad0 100644
--- a/llvm/test/CodeGen/X86/cgp-usubo.ll
+++ b/llvm/test/CodeGen/X86/cgp-usubo.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; CodeGenPrepare is expected to form overflow intrinsics to improve DAG/isel.
diff --git a/llvm/test/CodeGen/X86/chain_order.ll b/llvm/test/CodeGen/X86/chain_order.ll
index 18faec5747abe..36382853b565c 100644
--- a/llvm/test/CodeGen/X86/chain_order.ll
+++ b/llvm/test/CodeGen/X86/chain_order.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=corei7-avx -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=corei7-avx -mtriple=x86_64-linux | FileCheck %s
; A test from pifft (after SLP-vectorization) that fails when we drop the chain on newly merged loads.
define void @cftx020(ptr nocapture %a) {
diff --git a/llvm/test/CodeGen/X86/change-compare-stride-1.ll b/llvm/test/CodeGen/X86/change-compare-stride-1.ll
index 10de16987a074..5f35f5b70c329 100644
--- a/llvm/test/CodeGen/X86/change-compare-stride-1.ll
+++ b/llvm/test/CodeGen/X86/change-compare-stride-1.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -enable-lsr-nested | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -enable-lsr-nested | FileCheck %s
;
; Nested LSR is required to optimize this case.
; We do not expect to see this form of IR without -enable-iv-rewrite.
diff --git a/llvm/test/CodeGen/X86/change-compare-stride-trickiness-0.ll b/llvm/test/CodeGen/X86/change-compare-stride-trickiness-0.ll
index be9e709191673..4052477ec5216 100644
--- a/llvm/test/CodeGen/X86/change-compare-stride-trickiness-0.ll
+++ b/llvm/test/CodeGen/X86/change-compare-stride-trickiness-0.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -o - | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin9"
diff --git a/llvm/test/CodeGen/X86/change-compare-stride-trickiness-1.ll b/llvm/test/CodeGen/X86/change-compare-stride-trickiness-1.ll
index b59eeea9f1913..14b73d4a0802f 100644
--- a/llvm/test/CodeGen/X86/change-compare-stride-trickiness-1.ll
+++ b/llvm/test/CodeGen/X86/change-compare-stride-trickiness-1.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- < %s | FileCheck %s
; The comparison happens after the relevant use, so the stride can easily
; be changed. The comparison can be done in a narrower mode than the
diff --git a/llvm/test/CodeGen/X86/change-compare-stride-trickiness-2.ll b/llvm/test/CodeGen/X86/change-compare-stride-trickiness-2.ll
index 801c95c326bb1..b0a39d5ba3815 100644
--- a/llvm/test/CodeGen/X86/change-compare-stride-trickiness-2.ll
+++ b/llvm/test/CodeGen/X86/change-compare-stride-trickiness-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR4222
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/change-unsafe-fp-math.ll b/llvm/test/CodeGen/X86/change-unsafe-fp-math.ll
index 2aa79fafe59a5..b02d3736ed278 100644
--- a/llvm/test/CodeGen/X86/change-unsafe-fp-math.ll
+++ b/llvm/test/CodeGen/X86/change-unsafe-fp-math.ll
@@ -1,10 +1,10 @@
; Check that we can enable/disable UnsafeFPMath via function attributes. An
; attribute on one function should not magically apply to the next one.
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown \
; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=SAFE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown \
; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=UNSAFE
; The div in these functions should be converted to a mul when unsafe-fp-math
diff --git a/llvm/test/CodeGen/X86/cldemote-intrinsic.ll b/llvm/test/CodeGen/X86/cldemote-intrinsic.ll
index 2d9f613441761..7ae53334f0b08 100644
--- a/llvm/test/CodeGen/X86/cldemote-intrinsic.ll
+++ b/llvm/test/CodeGen/X86/cldemote-intrinsic.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+cldemote | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i386-pc-linux -mattr=+cldemote | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+cldemote | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux -mattr=+cldemote | FileCheck %s --check-prefix=X32
define void @test_cldemote(ptr %p) {
; X64-LABEL: test_cldemote:
diff --git a/llvm/test/CodeGen/X86/cleanuppad-inalloca.ll b/llvm/test/CodeGen/X86/cleanuppad-inalloca.ll
index 863f580374e55..2760b57a223bf 100644
--- a/llvm/test/CodeGen/X86/cleanuppad-inalloca.ll
+++ b/llvm/test/CodeGen/X86/cleanuppad-inalloca.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Based on this C++:
; struct A {
diff --git a/llvm/test/CodeGen/X86/cleanuppad-large-codemodel.ll b/llvm/test/CodeGen/X86/cleanuppad-large-codemodel.ll
index ad07740ac3a5c..f9aa7ac7c607b 100644
--- a/llvm/test/CodeGen/X86/cleanuppad-large-codemodel.ll
+++ b/llvm/test/CodeGen/X86/cleanuppad-large-codemodel.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-windows-msvc -code-model=large -relocation-model=static -o - < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc -code-model=large -relocation-model=static -o - < %s | FileCheck %s
declare i32 @__CxxFrameHandler3(...)
diff --git a/llvm/test/CodeGen/X86/cleanuppad-realign.ll b/llvm/test/CodeGen/X86/cleanuppad-realign.ll
index 7aad5a30522f7..6f46be0d76cad 100644
--- a/llvm/test/CodeGen/X86/cleanuppad-realign.ll
+++ b/llvm/test/CodeGen/X86/cleanuppad-realign.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i686-pc-windows-msvc -stack-symbol-ordering=0 < %s | FileCheck --check-prefix=X86 %s
-; RUN: llc -mtriple=x86_64-pc-windows-msvc -stack-symbol-ordering=0 < %s | FileCheck --check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-pc-windows-msvc -stack-symbol-ordering=0 < %s | FileCheck --check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc -stack-symbol-ordering=0 < %s | FileCheck --check-prefix=X64 %s
declare i32 @__CxxFrameHandler3(...)
declare void @Dtor(ptr %o)
diff --git a/llvm/test/CodeGen/X86/clear-bitfield.ll b/llvm/test/CodeGen/X86/clear-bitfield.ll
index 145c64c55d659..53e2cbf24cbe5 100644
--- a/llvm/test/CodeGen/X86/clear-bitfield.ll
+++ b/llvm/test/CodeGen/X86/clear-bitfield.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -combiner-reduce-load-op-store-width=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -combiner-reduce-load-op-store-width=false | FileCheck %s
%struct.bit_fields = type { i32 }
diff --git a/llvm/test/CodeGen/X86/clear-highbits.ll b/llvm/test/CodeGen/X86/clear-highbits.ll
index 755b1094234fd..b95d03c1967d2 100644
--- a/llvm/test/CodeGen/X86/clear-highbits.ll
+++ b/llvm/test/CodeGen/X86/clear-highbits.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=-bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-NOBMI2,X86-BASELINE
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+cmov,+bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-NOBMI2,X86-BMI1
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+cmov,+bmi,+tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-NOBMI2,X86-BMI1
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+cmov,+bmi,+tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-BMI2
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+cmov,+bmi,-tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-BMI2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=-bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-NOBMI2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-NOBMI2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,+tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-NOBMI2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,+tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-BMI2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,-tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-BMI2
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=-bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-NOBMI2,X86-BASELINE
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+cmov,+bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-NOBMI2,X86-BMI1
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+cmov,+bmi,+tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-NOBMI2,X86-BMI1
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+cmov,+bmi,+tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-BMI2
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+cmov,+bmi,-tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-BMI2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=-bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-NOBMI2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-NOBMI2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,+tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-NOBMI2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,+tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-BMI2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,-tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-BMI2
; Patterns:
; c) x & (-1 >> y)
diff --git a/llvm/test/CodeGen/X86/clear-lowbits.ll b/llvm/test/CodeGen/X86/clear-lowbits.ll
index 49ea2d0f1ed7a..abed00e434a1c 100644
--- a/llvm/test/CodeGen/X86/clear-lowbits.ll
+++ b/llvm/test/CodeGen/X86/clear-lowbits.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=-bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-NOBMI2
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-NOBMI2
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+bmi,+tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-NOBMI2
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+bmi,+tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-BMI2
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+bmi,-tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-BMI2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=-bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-NOBMI2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-NOBMI2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,+tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-NOBMI2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,+tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-BMI2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,-tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-BMI2
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=-bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-NOBMI2
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-NOBMI2
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+bmi,+tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-NOBMI2
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+bmi,+tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-BMI2
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+bmi,-tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X86,X86-BMI2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=-bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-NOBMI2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,-tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-NOBMI2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,+tbm,-bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-NOBMI2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,+tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-BMI2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,-tbm,+bmi2 < %s | FileCheck %s --check-prefixes=X64,X64-BMI2
; Patterns:
; c) x & (-1 << y)
diff --git a/llvm/test/CodeGen/X86/clear_upper_vector_element_bits.ll b/llvm/test/CodeGen/X86/clear_upper_vector_element_bits.ll
index ef21006ab64d3..e77dd8f58dba3 100644
--- a/llvm/test/CodeGen/X86/clear_upper_vector_element_bits.ll
+++ b/llvm/test/CodeGen/X86/clear_upper_vector_element_bits.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
;
; PR6455 'Clear Upper Bits' Patterns
diff --git a/llvm/test/CodeGen/X86/clflush.ll b/llvm/test/CodeGen/X86/clflush.ll
index 2adb9468e393f..406d0b6fdb234 100644
--- a/llvm/test/CodeGen/X86/clflush.ll
+++ b/llvm/test/CodeGen/X86/clflush.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X64
; It doesn't matter if an x86-64 target has specified "no-sse2"; we still can use clflush.
diff --git a/llvm/test/CodeGen/X86/clflushopt.ll b/llvm/test/CodeGen/X86/clflushopt.ll
index 82a47529fd324..bbe172e0ef9c5 100644
--- a/llvm/test/CodeGen/X86/clflushopt.ll
+++ b/llvm/test/CodeGen/X86/clflushopt.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=clflushopt | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=clflushopt | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=clflushopt | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=clflushopt | FileCheck %s --check-prefix=X64
define void @clflushopt(ptr %p) nounwind {
; X86-LABEL: clflushopt:
diff --git a/llvm/test/CodeGen/X86/clobber_base_ptr.ll b/llvm/test/CodeGen/X86/clobber_base_ptr.ll
index 2c39560f02d16..e020b0fc337e1 100644
--- a/llvm/test/CodeGen/X86/clobber_base_ptr.ll
+++ b/llvm/test/CodeGen/X86/clobber_base_ptr.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:x-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:32-n8:16:32-a:0:32-S32"
target triple = "i386-pc-windows-gnu"
diff --git a/llvm/test/CodeGen/X86/clobber_frame_ptr.ll b/llvm/test/CodeGen/X86/clobber_frame_ptr.ll
index 3b4e18030a366..86e631abef5a5 100644
--- a/llvm/test/CodeGen/X86/clobber_frame_ptr.ll
+++ b/llvm/test/CodeGen/X86/clobber_frame_ptr.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=x86_64-pc-linux -stackrealign -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -stackrealign -verify-machineinstrs < %s | FileCheck %s
; Calling convention ghccc uses ebp to pass parameter, so calling a function
; using ghccc clobbers ebp. We should save and restore ebp around such a call
diff --git a/llvm/test/CodeGen/X86/clobber_frame_ptr2.ll b/llvm/test/CodeGen/X86/clobber_frame_ptr2.ll
index 0551152a0718d..6b9de1dec8b6c 100644
--- a/llvm/test/CodeGen/X86/clobber_frame_ptr2.ll
+++ b/llvm/test/CodeGen/X86/clobber_frame_ptr2.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=x86_64-pc-linux -stackrealign -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -stackrealign -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
declare cc 11 i64 @hipe2(i64, i64, i64, i64, i64, i64, i64)
diff --git a/llvm/test/CodeGen/X86/clobber_frame_ptr_x32.ll b/llvm/test/CodeGen/X86/clobber_frame_ptr_x32.ll
index 25c951d8b1a10..2b9f4f4b2fc1a 100644
--- a/llvm/test/CodeGen/X86/clobber_frame_ptr_x32.ll
+++ b/llvm/test/CodeGen/X86/clobber_frame_ptr_x32.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target triple = "x86_64-linux-gnux32"
diff --git a/llvm/test/CodeGen/X86/clwb.ll b/llvm/test/CodeGen/X86/clwb.ll
index 92c974370793d..ecaa549df9c40 100644
--- a/llvm/test/CodeGen/X86/clwb.ll
+++ b/llvm/test/CodeGen/X86/clwb.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; NOTE: clwb is available in Skylake Server, not available in the newer
; NOTE: Cannon Lake arch, but available again in the newer Ice Lake arch.
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=clwb | FileCheck %s
-; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=skx | FileCheck %s
-; RUN: not --crash llc < %s -mtriple=i686-apple-darwin -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CNL
-; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=icelake-server | FileCheck %s
-; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=tigerlake | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=clwb | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mcpu=skx | FileCheck %s
+; RUN: not --crash llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mcpu=icelake-server | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mcpu=tigerlake | FileCheck %s
; CNL: LLVM ERROR: Cannot select: intrinsic %llvm.x86.clwb
diff --git a/llvm/test/CodeGen/X86/clzero.ll b/llvm/test/CodeGen/X86/clzero.ll
index 98070cce31527..13ee1e6a8b4f9 100644
--- a/llvm/test/CodeGen/X86/clzero.ll
+++ b/llvm/test/CodeGen/X86/clzero.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+clzero | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i386-pc-linux -mattr=+clzero | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+clzero | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux -mattr=+clzero | FileCheck %s --check-prefix=X86
define void @foo(ptr %p) #0 {
; X64-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/cmov-double.ll b/llvm/test/CodeGen/X86/cmov-double.ll
index 6769add3a2b98..e95a14f4fbe44 100644
--- a/llvm/test/CodeGen/X86/cmov-double.ll
+++ b/llvm/test/CodeGen/X86/cmov-double.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - %s | FileCheck %s
target triple = "x86_64-unknown-unknown"
; select with and i1/or i1 condition should be implemented as a series of 2
diff --git a/llvm/test/CodeGen/X86/cmov-fp.ll b/llvm/test/CodeGen/X86/cmov-fp.ll
index 77665d083b7e3..a12690f4a4334 100644
--- a/llvm/test/CodeGen/X86/cmov-fp.ll
+++ b/llvm/test/CodeGen/X86/cmov-fp.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-- -mcpu pentium4 < %s | FileCheck %s -check-prefix=SSE
-; RUN: llc -mtriple=i686-- -mcpu pentium3 < %s | FileCheck %s -check-prefixes=NOSSE,NOSSE2
-; RUN: llc -mtriple=i686-- -mcpu pentium2 < %s | FileCheck %s -check-prefixes=NOSSE,NOSSE1
-; RUN: llc -mtriple=i686-- -mcpu pentium < %s | FileCheck %s -check-prefix=NOCMOV
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -mcpu pentium4 < %s | FileCheck %s -check-prefix=SSE
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -mcpu pentium3 < %s | FileCheck %s -check-prefixes=NOSSE,NOSSE2
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -mcpu pentium2 < %s | FileCheck %s -check-prefixes=NOSSE,NOSSE1
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -mcpu pentium < %s | FileCheck %s -check-prefix=NOCMOV
; PR14035
define double @test1(i32 %a, i32 %b, double %x) nounwind {
diff --git a/llvm/test/CodeGen/X86/cmov-into-branch.ll b/llvm/test/CodeGen/X86/cmov-into-branch.ll
index b18283dd8e8d2..943665a2a96ba 100644
--- a/llvm/test/CodeGen/X86/cmov-into-branch.ll
+++ b/llvm/test/CodeGen/X86/cmov-into-branch.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
; cmp with single-use load, should not form branch.
define i32 @test1(double %a, ptr nocapture %b, i32 %x, i32 %y) {
diff --git a/llvm/test/CodeGen/X86/cmovcmov.ll b/llvm/test/CodeGen/X86/cmovcmov.ll
index d2d1c4db4608d..fae2b1d522850 100644
--- a/llvm/test/CodeGen/X86/cmovcmov.ll
+++ b/llvm/test/CodeGen/X86/cmovcmov.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=CMOV
-; RUN: llc < %s -mtriple=i686-unknown-linux | FileCheck %s --check-prefix=NOCMOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=CMOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux | FileCheck %s --check-prefix=NOCMOV
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/cmp-concat.ll b/llvm/test/CodeGen/X86/cmp-concat.ll
index 5e030de1409f2..93002de1dd61c 100644
--- a/llvm/test/CodeGen/X86/cmp-concat.ll
+++ b/llvm/test/CodeGen/X86/cmp-concat.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s
define i1 @cmp_allbits_concat_i8(i8 %x, i8 %y) {
; CHECK-LABEL: cmp_allbits_concat_i8:
diff --git a/llvm/test/CodeGen/X86/cmp-fast-isel.ll b/llvm/test/CodeGen/X86/cmp-fast-isel.ll
index 39738fae12d18..183ed638436ee 100644
--- a/llvm/test/CodeGen/X86/cmp-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/cmp-fast-isel.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux -fast-isel -show-mc-encoding < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux -fast-isel -show-mc-encoding < %s | FileCheck %s
; pr22854
diff --git a/llvm/test/CodeGen/X86/cmp-merge.ll b/llvm/test/CodeGen/X86/cmp-merge.ll
index 0c355af64b027..9c383c539bb84 100644
--- a/llvm/test/CodeGen/X86/cmp-merge.ll
+++ b/llvm/test/CodeGen/X86/cmp-merge.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686--| FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64--| FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--| FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--| FileCheck %s --check-prefixes=X64
;
; PR35202
diff --git a/llvm/test/CodeGen/X86/cmp-xor.ll b/llvm/test/CodeGen/X86/cmp-xor.ll
index a8a7da4871ba9..a83fd8997915b 100644
--- a/llvm/test/CodeGen/X86/cmp-xor.ll
+++ b/llvm/test/CodeGen/X86/cmp-xor.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686--| FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64--| FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--| FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--| FileCheck %s --check-prefixes=X64
;
; PR6146
diff --git a/llvm/test/CodeGen/X86/cmp16.ll b/llvm/test/CodeGen/X86/cmp16.ll
index ff6ee68074088..bc513a23b8e2b 100644
--- a/llvm/test/CodeGen/X86/cmp16.ll
+++ b/llvm/test/CodeGen/X86/cmp16.ll
@@ -1,20 +1,20 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86,X86-GENERIC
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,X64-GENERIC
-; RUN: llc < %s -mtriple=i686-- -mattr=+fast-imm16 | FileCheck %s --check-prefixes=X86,X86-FAST
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+fast-imm16 | FileCheck %s --check-prefixes=X64,X64-FAST
-; RUN: llc < %s -mtriple=i686-- -mcpu=atom | FileCheck %s --check-prefixes=X86,X86-ATOM
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=atom | FileCheck %s --check-prefixes=X64,X64-ATOM
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=slm | FileCheck %s --check-prefixes=X64,X64-FAST
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=X64,X64-FAST
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver1 | FileCheck %s --check-prefixes=X64,X64-FAST
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=X64,X64-FAST
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver1 | FileCheck %s --check-prefixes=X64,X64-FAST
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver2 | FileCheck %s --check-prefixes=X64,X64-FAST
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver3 | FileCheck %s --check-prefixes=X64,X64-FAST
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver4 | FileCheck %s --check-prefixes=X64,X64-FAST
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver5 | FileCheck %s --check-prefixes=X64,X64-FAST
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver6 | FileCheck %s --check-prefixes=X64,X64-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86,X86-GENERIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,X64-GENERIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+fast-imm16 | FileCheck %s --check-prefixes=X86,X86-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+fast-imm16 | FileCheck %s --check-prefixes=X64,X64-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=atom | FileCheck %s --check-prefixes=X86,X86-ATOM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=atom | FileCheck %s --check-prefixes=X64,X64-ATOM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=slm | FileCheck %s --check-prefixes=X64,X64-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=X64,X64-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=btver1 | FileCheck %s --check-prefixes=X64,X64-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=X64,X64-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver1 | FileCheck %s --check-prefixes=X64,X64-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver2 | FileCheck %s --check-prefixes=X64,X64-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver3 | FileCheck %s --check-prefixes=X64,X64-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver4 | FileCheck %s --check-prefixes=X64,X64-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver5 | FileCheck %s --check-prefixes=X64,X64-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver6 | FileCheck %s --check-prefixes=X64,X64-FAST
define i1 @cmp16_reg_eq_reg(i16 %a0, i16 %a1) {
; X86-GENERIC-LABEL: cmp16_reg_eq_reg:
diff --git a/llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll b/llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll
index 561289c1b7746..598d66af2e08e 100644
--- a/llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/cmpccxadd-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+cmpccxadd | FileCheck %s
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+cmpccxadd,+egpr | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+cmpccxadd | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+cmpccxadd,+egpr | FileCheck %s --check-prefix=EGPR
define dso_local i32 @test_cmpbexadd32(ptr %__A, i32 %__B, i32 %__C) nounwind {
; CHECK-LABEL: test_cmpbexadd32:
diff --git a/llvm/test/CodeGen/X86/cmpf-avx.ll b/llvm/test/CodeGen/X86/cmpf-avx.ll
index e58295fff9855..60436712f13ff 100644
--- a/llvm/test/CodeGen/X86/cmpf-avx.ll
+++ b/llvm/test/CodeGen/X86/cmpf-avx.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X64
; PR82242
define <8 x i32> @cmp_eq_bitcast(<8 x i32> %x) {
diff --git a/llvm/test/CodeGen/X86/cmpxchg-clobber-flags.ll b/llvm/test/CodeGen/X86/cmpxchg-clobber-flags.ll
index 4877d15e44a4f..1957a4aab3f09 100644
--- a/llvm/test/CodeGen/X86/cmpxchg-clobber-flags.ll
+++ b/llvm/test/CodeGen/X86/cmpxchg-clobber-flags.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-linux-gnu -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=X86-ALL,X86-GOOD-RA
-; RUN: llc -mtriple=i386-linux-gnu -verify-machineinstrs -pre-RA-sched=fast %s -o - | FileCheck %s --check-prefixes=X86-ALL,X86-FAST-RA
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=X86-ALL,X86-GOOD-RA
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -verify-machineinstrs -pre-RA-sched=fast %s -o - | FileCheck %s --check-prefixes=X86-ALL,X86-FAST-RA
-; RUN: llc -mtriple=x86_64-linux-gnu -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=X64-ALL
-; RUN: llc -mtriple=x86_64-linux-gnu -verify-machineinstrs -pre-RA-sched=fast %s -o - | FileCheck %s --check-prefix=X64-ALL
-; RUN: llc -mtriple=x86_64-linux-gnu -verify-machineinstrs -mattr=+sahf %s -o - | FileCheck %s --check-prefix=X64-ALL
-; RUN: llc -mtriple=x86_64-linux-gnu -verify-machineinstrs -mattr=+sahf -pre-RA-sched=fast %s -o - | FileCheck %s --check-prefix=X64-ALL
-; RUN: llc -mtriple=x86_64-linux-gnu -verify-machineinstrs -mcpu=corei7 %s -o - | FileCheck %s --check-prefix=X64-ALL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=X64-ALL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -verify-machineinstrs -pre-RA-sched=fast %s -o - | FileCheck %s --check-prefix=X64-ALL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -verify-machineinstrs -mattr=+sahf %s -o - | FileCheck %s --check-prefix=X64-ALL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -verify-machineinstrs -mattr=+sahf -pre-RA-sched=fast %s -o - | FileCheck %s --check-prefix=X64-ALL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -verify-machineinstrs -mcpu=corei7 %s -o - | FileCheck %s --check-prefix=X64-ALL
declare i32 @foo()
declare i32 @bar(i64)
diff --git a/llvm/test/CodeGen/X86/cmpxchg-i1.ll b/llvm/test/CodeGen/X86/cmpxchg-i1.ll
index ae70c9cedad2e..a4f176a2c425c 100644
--- a/llvm/test/CodeGen/X86/cmpxchg-i1.ll
+++ b/llvm/test/CodeGen/X86/cmpxchg-i1.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64 -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -o - %s | FileCheck %s
define i1 @try_cmpxchg(ptr %addr, i32 %desired, i32 %new) {
; CHECK-LABEL: try_cmpxchg:
diff --git a/llvm/test/CodeGen/X86/cmpxchg-i128-i1.ll b/llvm/test/CodeGen/X86/cmpxchg-i128-i1.ll
index bb07640dd285f..86f39f571a209 100644
--- a/llvm/test/CodeGen/X86/cmpxchg-i128-i1.ll
+++ b/llvm/test/CodeGen/X86/cmpxchg-i128-i1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s
define i1 @try_cmpxchg(ptr %addr, i128 %desired, i128 %new) {
; CHECK-LABEL: try_cmpxchg:
diff --git a/llvm/test/CodeGen/X86/cmpxchg8b.ll b/llvm/test/CodeGen/X86/cmpxchg8b.ll
index 10e957015047b..22a127ea06eb0 100644
--- a/llvm/test/CodeGen/X86/cmpxchg8b.ll
+++ b/llvm/test/CodeGen/X86/cmpxchg8b.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown- -mcpu=core2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown- -mcpu=core2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown- -mcpu=i486 | FileCheck %s --check-prefix=I486
-; RUN: llc < %s -mtriple=i686-unknown- -mcpu=znver1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=i686-unknown- -mcpu=lakemont | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown- -mcpu=core2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown- -mcpu=core2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown- -mcpu=i486 | FileCheck %s --check-prefix=I486
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown- -mcpu=znver1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown- -mcpu=lakemont | FileCheck %s --check-prefix=X86
; Basic 64-bit cmpxchg
define void @t1(ptr nocapture %p) nounwind ssp {
diff --git a/llvm/test/CodeGen/X86/cmpxchg8b_alloca_regalloc_handling.ll b/llvm/test/CodeGen/X86/cmpxchg8b_alloca_regalloc_handling.ll
index 079dd529ae7bd..91a96292b7917 100644
--- a/llvm/test/CodeGen/X86/cmpxchg8b_alloca_regalloc_handling.ll
+++ b/llvm/test/CodeGen/X86/cmpxchg8b_alloca_regalloc_handling.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -stackrealign -O2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -stackrealign -O2 | FileCheck %s
; PR28755
; Check that register allocator is able to handle that
diff --git a/llvm/test/CodeGen/X86/coal-sections.ll b/llvm/test/CodeGen/X86/coal-sections.ll
index e0caae67f4d62..4ea37aec557bd 100644
--- a/llvm/test/CodeGen/X86/coal-sections.ll
+++ b/llvm/test/CodeGen/X86/coal-sections.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-apple-darwin | FileCheck %s
; Check that *coal* sections are not emitted.
diff --git a/llvm/test/CodeGen/X86/coalesce-esp.ll b/llvm/test/CodeGen/X86/coalesce-esp.ll
index 0c495c9cf2b00..4759b46b4fd2a 100644
--- a/llvm/test/CodeGen/X86/coalesce-esp.ll
+++ b/llvm/test/CodeGen/X86/coalesce-esp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; PR4572
; Don't coalesce with %esp if it would end up putting %esp in
diff --git a/llvm/test/CodeGen/X86/coalesce-implicitdef.ll b/llvm/test/CodeGen/X86/coalesce-implicitdef.ll
index b5941ee85f5a2..5b97ea34c3ba5 100644
--- a/llvm/test/CodeGen/X86/coalesce-implicitdef.ll
+++ b/llvm/test/CodeGen/X86/coalesce-implicitdef.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-coalescing
+; RUN: llc -combiner-topological-sorting < %s -verify-coalescing
; PR14732
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10"
diff --git a/llvm/test/CodeGen/X86/coalesce_commute_movsd.ll b/llvm/test/CodeGen/X86/coalesce_commute_movsd.ll
index 441c79b3fc31f..c96ec1386a5bb 100644
--- a/llvm/test/CodeGen/X86/coalesce_commute_movsd.ll
+++ b/llvm/test/CodeGen/X86/coalesce_commute_movsd.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -verify-coalescing -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -verify-coalescing -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -verify-coalescing -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -verify-coalescing -mattr=+avx512f | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -verify-coalescing -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -verify-coalescing -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -verify-coalescing -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -verify-coalescing -mattr=+avx512f | FileCheck %s --check-prefix=AVX512
; PR30607
diff --git a/llvm/test/CodeGen/X86/coalesce_commute_subreg.ll b/llvm/test/CodeGen/X86/coalesce_commute_subreg.ll
index 8d0a20cfebbd2..afbeefcc1ae2d 100644
--- a/llvm/test/CodeGen/X86/coalesce_commute_subreg.ll
+++ b/llvm/test/CodeGen/X86/coalesce_commute_subreg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple="x86_64-apple-darwin" -o - -verify-machineinstrs %s
+; RUN: llc -combiner-topological-sorting -mtriple="x86_64-apple-darwin" -o - -verify-machineinstrs %s
define void @make_wanted() #0 {
entry:
diff --git a/llvm/test/CodeGen/X86/coalescer-add-implicit-def-subreg-to-reg-regression.ll b/llvm/test/CodeGen/X86/coalescer-add-implicit-def-subreg-to-reg-regression.ll
index 0e6cb7a3aff2e..68287589fa692 100644
--- a/llvm/test/CodeGen/X86/coalescer-add-implicit-def-subreg-to-reg-regression.ll
+++ b/llvm/test/CodeGen/X86/coalescer-add-implicit-def-subreg-to-reg-regression.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
; Not from issue 76416, but separate testcase reported on the same
; regressing commit.
diff --git a/llvm/test/CodeGen/X86/coalescer-breaks-subreg-to-reg-liveness-reduced.ll b/llvm/test/CodeGen/X86/coalescer-breaks-subreg-to-reg-liveness-reduced.ll
index e9f529eea7d3f..df4b00aa857df 100644
--- a/llvm/test/CodeGen/X86/coalescer-breaks-subreg-to-reg-liveness-reduced.ll
+++ b/llvm/test/CodeGen/X86/coalescer-breaks-subreg-to-reg-liveness-reduced.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -mtriple=x86_64-grtev4-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-grtev4-linux-gnu < %s | FileCheck %s
; Test a bad interaction between register allocation and the register
; coalescer. The coalescer lost the high subregister def when
diff --git a/llvm/test/CodeGen/X86/coalescer-commute1.ll b/llvm/test/CodeGen/X86/coalescer-commute1.ll
index f4decb7e2e0c5..5f9e17022d339 100644
--- a/llvm/test/CodeGen/X86/coalescer-commute1.ll
+++ b/llvm/test/CodeGen/X86/coalescer-commute1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=corei7-avx -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mcpu=corei7-avx -mattr=+sse2 | FileCheck %s
; PR1877
@NNTOT = weak global i32 0 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/coalescer-commute2.ll b/llvm/test/CodeGen/X86/coalescer-commute2.ll
index e45437cc9484e..274d1b62101d7 100644
--- a/llvm/test/CodeGen/X86/coalescer-commute2.ll
+++ b/llvm/test/CodeGen/X86/coalescer-commute2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=nehalem | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=nehalem | FileCheck %s
; CHECK-NOT: mov
; CHECK: paddw
; CHECK-NOT: mov
diff --git a/llvm/test/CodeGen/X86/coalescer-commute3.ll b/llvm/test/CodeGen/X86/coalescer-commute3.ll
index 023a302e51cd2..e2b8eb13a5aae 100644
--- a/llvm/test/CodeGen/X86/coalescer-commute3.ll
+++ b/llvm/test/CodeGen/X86/coalescer-commute3.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 -no-x86-call-frame-opt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+sse2 -no-x86-call-frame-opt | FileCheck %s
%struct.quad_struct = type { i32, i32, ptr, ptr, ptr, ptr, ptr }
diff --git a/llvm/test/CodeGen/X86/coalescer-commute4.ll b/llvm/test/CodeGen/X86/coalescer-commute4.ll
index 0ec99dcba88ae..d9b7c76e63e68 100644
--- a/llvm/test/CodeGen/X86/coalescer-commute4.ll
+++ b/llvm/test/CodeGen/X86/coalescer-commute4.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+sse2 | FileCheck %s
; PR1501
define float @foo(ptr %x, ptr %y, i32 %c) nounwind {
diff --git a/llvm/test/CodeGen/X86/coalescer-commute5.ll b/llvm/test/CodeGen/X86/coalescer-commute5.ll
index a571bb42a5a58..c78dd3ee4e98d 100644
--- a/llvm/test/CodeGen/X86/coalescer-commute5.ll
+++ b/llvm/test/CodeGen/X86/coalescer-commute5.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+sse2 | FileCheck %s
define i32 @t() {
; CHECK-LABEL: t:
diff --git a/llvm/test/CodeGen/X86/coalescer-cross.ll b/llvm/test/CodeGen/X86/coalescer-cross.ll
index cd61a5a76ae22..a524d3b6a8c2f 100644
--- a/llvm/test/CodeGen/X86/coalescer-cross.ll
+++ b/llvm/test/CodeGen/X86/coalescer-cross.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin10 | FileCheck %s
-; RUN: llc < %s -mtriple=i386-apple-darwin10 -regalloc=basic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10 -regalloc=basic | FileCheck %s
; rdar://6509240
; CHECK: os_clock
diff --git a/llvm/test/CodeGen/X86/coalescer-dce.ll b/llvm/test/CodeGen/X86/coalescer-dce.ll
index 7685526cef9b4..e14ee65654e20 100644
--- a/llvm/test/CodeGen/X86/coalescer-dce.ll
+++ b/llvm/test/CodeGen/X86/coalescer-dce.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-machineinstrs -frame-pointer=all -disable-machine-dce -verify-coalescing
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -frame-pointer=all -disable-machine-dce -verify-coalescing
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-macosx10.7.0"
diff --git a/llvm/test/CodeGen/X86/coalescer-dce2.ll b/llvm/test/CodeGen/X86/coalescer-dce2.ll
index 63b8e9540fd92..dfffe797945cc 100644
--- a/llvm/test/CodeGen/X86/coalescer-dce2.ll
+++ b/llvm/test/CodeGen/X86/coalescer-dce2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-coalescing
+; RUN: llc -combiner-topological-sorting < %s -verify-coalescing
; PR12911
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-macosx10.7.0"
diff --git a/llvm/test/CodeGen/X86/coalescer-dead-flag-verifier-error.ll b/llvm/test/CodeGen/X86/coalescer-dead-flag-verifier-error.ll
index a42a715bdc6ab..67d2ee5d33ae0 100644
--- a/llvm/test/CodeGen/X86/coalescer-dead-flag-verifier-error.ll
+++ b/llvm/test/CodeGen/X86/coalescer-dead-flag-verifier-error.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -verify-coalescing < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -verify-coalescing < %s | FileCheck %s
%"class.llvm::APInt." = type <{ %union.anon., i32, [4 x i8] }>
%union.anon. = type { i64 }
diff --git a/llvm/test/CodeGen/X86/coalescer-identity.ll b/llvm/test/CodeGen/X86/coalescer-identity.ll
index 374031a89e634..e6b4463f19038 100644
--- a/llvm/test/CodeGen/X86/coalescer-identity.ll
+++ b/llvm/test/CodeGen/X86/coalescer-identity.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-coalescing
+; RUN: llc -combiner-topological-sorting < %s -verify-coalescing
; PR12927
target triple = "x86_64-apple-macosx10.8.0"
diff --git a/llvm/test/CodeGen/X86/coalescer-implicit-def-regression.ll b/llvm/test/CodeGen/X86/coalescer-implicit-def-regression.ll
index 66ba54f3e318e..6515f2e809c55 100644
--- a/llvm/test/CodeGen/X86/coalescer-implicit-def-regression.ll
+++ b/llvm/test/CodeGen/X86/coalescer-implicit-def-regression.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
; Check there's no assert in the coalescer from implicit-def operands
; on an IMPLICIT_DEF.
diff --git a/llvm/test/CodeGen/X86/coalescer-remat.ll b/llvm/test/CodeGen/X86/coalescer-remat.ll
index d34f3eadc925d..3c7f64406134a 100644
--- a/llvm/test/CodeGen/X86/coalescer-remat.ll
+++ b/llvm/test/CodeGen/X86/coalescer-remat.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
@val = internal global i64 0
@"\01LC" = internal constant [7 x i8] c"0x%lx\0A\00"
diff --git a/llvm/test/CodeGen/X86/coalescer-subreg.ll b/llvm/test/CodeGen/X86/coalescer-subreg.ll
index 5115a0658ad05..4005b84f4dd01 100644
--- a/llvm/test/CodeGen/X86/coalescer-subreg.ll
+++ b/llvm/test/CodeGen/X86/coalescer-subreg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -o - %s -verify-machineinstrs
+; RUN: llc -combiner-topological-sorting -o - %s -verify-machineinstrs
; This used to crash when coalescing a regclass like GR16 which did not support
; the sub_8bit_hi subregister with a class like GR16_ABCD that did.
target triple = "x86_64-apple-macosx10.10.0"
diff --git a/llvm/test/CodeGen/X86/coalescer-win64.ll b/llvm/test/CodeGen/X86/coalescer-win64.ll
index 571016c1d06ea..406b549d7a6b5 100644
--- a/llvm/test/CodeGen/X86/coalescer-win64.ll
+++ b/llvm/test/CodeGen/X86/coalescer-win64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-coalescing | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-coalescing | FileCheck %s
target triple = "x86_64-pc-win32"
@fnptr = external global ptr
diff --git a/llvm/test/CodeGen/X86/code-align-loops.ll b/llvm/test/CodeGen/X86/code-align-loops.ll
index cd2bac54fee14..f2056875f060c 100644
--- a/llvm/test/CodeGen/X86/code-align-loops.ll
+++ b/llvm/test/CodeGen/X86/code-align-loops.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s -check-prefixes=CHECK,ALIGN
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -align-loops=32 | FileCheck %s -check-prefixes=CHECK,ALIGN32
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -align-loops=256 | FileCheck %s -check-prefixes=CHECK,ALIGN256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s -check-prefixes=CHECK,ALIGN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu -align-loops=32 | FileCheck %s -check-prefixes=CHECK,ALIGN32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu -align-loops=256 | FileCheck %s -check-prefixes=CHECK,ALIGN256
; This test is to check if .p2align can be correctly generated by considerring
; 1. -align-loops=N from llc option
diff --git a/llvm/test/CodeGen/X86/code-model-elf-memset.ll b/llvm/test/CodeGen/X86/code-model-elf-memset.ll
index 05898c54b262c..5db9b3775f0d0 100644
--- a/llvm/test/CodeGen/X86/code-model-elf-memset.ll
+++ b/llvm/test/CodeGen/X86/code-model-elf-memset.ll
@@ -5,9 +5,9 @@
; Memset is interesting because it is an ExternalSymbol reference instead of a
; GlobalValue. Make sure we do the right GOT load for 64-bit large.
-; RUN: llc < %s -relocation-model=pic -code-model=small | FileCheck %s --check-prefix=SMALL-PIC
-; RUN: llc < %s -relocation-model=pic -code-model=medium | FileCheck %s --check-prefix=MEDIUM-PIC
-; RUN: llc < %s -relocation-model=pic -code-model=large | FileCheck %s --check-prefix=LARGE-PIC
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -code-model=small | FileCheck %s --check-prefix=SMALL-PIC
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -code-model=medium | FileCheck %s --check-prefix=MEDIUM-PIC
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -code-model=large | FileCheck %s --check-prefix=LARGE-PIC
; Generated from this C source:
;
diff --git a/llvm/test/CodeGen/X86/code-model-elf-merge-sections.ll b/llvm/test/CodeGen/X86/code-model-elf-merge-sections.ll
index f955f71561dbf..5a0bd7ddd78bc 100644
--- a/llvm/test/CodeGen/X86/code-model-elf-merge-sections.ll
+++ b/llvm/test/CodeGen/X86/code-model-elf-merge-sections.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=medium -large-data-threshold=0 -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=medium -large-data-threshold=0 -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=LARGE
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=medium -large-data-threshold=99 -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=medium -large-data-threshold=99 -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=SMALL
; LARGE: .lrodata.str4.4 {{.*}} AMSl
diff --git a/llvm/test/CodeGen/X86/code-model-elf-sections.ll b/llvm/test/CodeGen/X86/code-model-elf-sections.ll
index f7a7ebb705ea6..9ca3bad4ff05e 100644
--- a/llvm/test/CodeGen/X86/code-model-elf-sections.ll
+++ b/llvm/test/CodeGen/X86/code-model-elf-sections.ll
@@ -1,21 +1,21 @@
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=small -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=small -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=SMALL
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=medium -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=medium -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=LARGE
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=medium -large-data-threshold=79 -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=medium -large-data-threshold=79 -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=LARGE
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=medium -large-data-threshold=80 -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=medium -large-data-threshold=80 -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=SMALL
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=large -large-data-threshold=79 -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=large -large-data-threshold=79 -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=LARGE
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=large -large-data-threshold=80 -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=large -large-data-threshold=80 -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=SMALL
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=small -data-sections -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=small -data-sections -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=SMALL-DS
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=medium -data-sections -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=medium -data-sections -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=LARGE-DS
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=large -data-sections -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=large -data-sections -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=LARGE-DS
; SMALL: .data {{.*}} WA {{.*}}
diff --git a/llvm/test/CodeGen/X86/code-model-elf-text-sections.ll b/llvm/test/CodeGen/X86/code-model-elf-text-sections.ll
index 66a6fd3767542..6b2f1432188a2 100644
--- a/llvm/test/CodeGen/X86/code-model-elf-text-sections.ll
+++ b/llvm/test/CodeGen/X86/code-model-elf-text-sections.ll
@@ -1,15 +1,15 @@
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=small -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=small -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=SMALL
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=medium -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=medium -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=SMALL
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=large -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=large -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=LARGE
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=small -function-sections -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=small -function-sections -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=SMALL-DS
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=medium -function-sections -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=medium -function-sections -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=SMALL-DS
-; RUN: llc < %s -relocation-model=pic -filetype=obj -code-model=large -function-sections -o %t
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -filetype=obj -code-model=large -function-sections -o %t
; RUN: llvm-readelf -S %t | FileCheck %s --check-prefix=LARGE-DS
; SMALL: .text {{.*}} AX {{.*}}
diff --git a/llvm/test/CodeGen/X86/code-model-elf.ll b/llvm/test/CodeGen/X86/code-model-elf.ll
index aa2cc3a4981a2..460a57f3277da 100644
--- a/llvm/test/CodeGen/X86/code-model-elf.ll
+++ b/llvm/test/CodeGen/X86/code-model-elf.ll
@@ -2,24 +2,24 @@
; Run with --no_x86_scrub_rip because we care a lot about how globals are
; accessed in the code model.
-; RUN: llc -verify-machineinstrs < %s -relocation-model=static -code-model=small | FileCheck %s --check-prefix=CHECK --check-prefix=SMALL-STATIC
-; RUN: llc -verify-machineinstrs < %s -relocation-model=static -code-model=medium | FileCheck %s --check-prefix=CHECK --check-prefix=MEDIUM-STATIC
-; RUN: llc -verify-machineinstrs < %s -relocation-model=static -code-model=large | FileCheck %s --check-prefix=CHECK --check-prefix=LARGE-STATIC
-; RUN: llc -verify-machineinstrs < %s -relocation-model=pic -code-model=small | FileCheck %s --check-prefix=CHECK --check-prefix=SMALL-PIC
-; RUN: llc -verify-machineinstrs < %s -relocation-model=pic -code-model=medium -large-data-threshold=1000 | FileCheck %s --check-prefix=CHECK --check-prefix=MEDIUM-SMALL-DATA-PIC
-; RUN: llc -verify-machineinstrs < %s -relocation-model=pic -code-model=medium | FileCheck %s --check-prefix=CHECK --check-prefix=MEDIUM-PIC
-; RUN: llc -verify-machineinstrs < %s -relocation-model=pic -code-model=large | FileCheck %s --check-prefix=CHECK --check-prefix=LARGE-PIC
-; RUN: llc -verify-machineinstrs < %s -relocation-model=pic -code-model=large -large-data-threshold=1000 | FileCheck %s --check-prefix=CHECK --check-prefix=LARGE-SMALL-DATA-PIC
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=static -code-model=small | FileCheck %s --check-prefix=CHECK --check-prefix=SMALL-STATIC
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=static -code-model=medium | FileCheck %s --check-prefix=CHECK --check-prefix=MEDIUM-STATIC
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=static -code-model=large | FileCheck %s --check-prefix=CHECK --check-prefix=LARGE-STATIC
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=pic -code-model=small | FileCheck %s --check-prefix=CHECK --check-prefix=SMALL-PIC
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=pic -code-model=medium -large-data-threshold=1000 | FileCheck %s --check-prefix=CHECK --check-prefix=MEDIUM-SMALL-DATA-PIC
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=pic -code-model=medium | FileCheck %s --check-prefix=CHECK --check-prefix=MEDIUM-PIC
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=pic -code-model=large | FileCheck %s --check-prefix=CHECK --check-prefix=LARGE-PIC
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=pic -code-model=large -large-data-threshold=1000 | FileCheck %s --check-prefix=CHECK --check-prefix=LARGE-SMALL-DATA-PIC
; Check that the relocations we emit are valid.
-; RUN: llc -verify-machineinstrs < %s -relocation-model=static -code-model=small -filetype=obj -o /dev/null
-; RUN: llc -verify-machineinstrs < %s -relocation-model=static -code-model=medium -filetype=obj -o /dev/null
-; RUN: llc -verify-machineinstrs < %s -relocation-model=static -code-model=large -filetype=obj -o /dev/null
-; RUN: llc -verify-machineinstrs < %s -relocation-model=pic -code-model=small -filetype=obj -o /dev/null
-; RUN: llc -verify-machineinstrs < %s -relocation-model=pic -code-model=medium -large-data-threshold=1000 -filetype=obj -o /dev/null
-; RUN: llc -verify-machineinstrs < %s -relocation-model=pic -code-model=medium -filetype=obj -o /dev/null
-; RUN: llc -verify-machineinstrs < %s -relocation-model=pic -code-model=large -filetype=obj -o /dev/null
-; RUN: llc -verify-machineinstrs < %s -relocation-model=pic -code-model=large -large-data-threshold=1000 -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=static -code-model=small -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=static -code-model=medium -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=static -code-model=large -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=pic -code-model=small -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=pic -code-model=medium -large-data-threshold=1000 -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=pic -code-model=medium -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=pic -code-model=large -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=pic -code-model=large -large-data-threshold=1000 -filetype=obj -o /dev/null
; Generated from this C source:
;
diff --git a/llvm/test/CodeGen/X86/code-model-kernel.ll b/llvm/test/CodeGen/X86/code-model-kernel.ll
index 53b832374b1f9..d6ddd4e3e138b 100644
--- a/llvm/test/CodeGen/X86/code-model-kernel.ll
+++ b/llvm/test/CodeGen/X86/code-model-kernel.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -code-model=kernel -simplifycfg-require-and-preserve-domtree=1 %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -code-model=kernel -simplifycfg-require-and-preserve-domtree=1 %s -o - | FileCheck %s
; CHECK-LABEL: main
; CHECK: .cfi_startproc
; CHECK: .cfi_personality 0, __gxx_personality_v0
diff --git a/llvm/test/CodeGen/X86/code_placement.ll b/llvm/test/CodeGen/X86/code_placement.ll
index 6293dac1fcb06..c67b572a7188b 100644
--- a/llvm/test/CodeGen/X86/code_placement.ll
+++ b/llvm/test/CodeGen/X86/code_placement.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- < %s | FileCheck %s
@Te0 = external dso_local global [256 x i32] ; <[256 x i32]*> [#uses=5]
@Te1 = external dso_local global [256 x i32] ; <[256 x i32]*> [#uses=4]
diff --git a/llvm/test/CodeGen/X86/code_placement_align_all.ll b/llvm/test/CodeGen/X86/code_placement_align_all.ll
index 0e57b0e8ebd32..c9facfc1bf734 100644
--- a/llvm/test/CodeGen/X86/code_placement_align_all.ll
+++ b/llvm/test/CodeGen/X86/code_placement_align_all.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -align-all-blocks=16 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux -align-all-blocks=16 < %s | FileCheck %s
;CHECK-LABEL: foo:
;CHECK: .p2align 16
diff --git a/llvm/test/CodeGen/X86/code_placement_cold_loop_blocks.ll b/llvm/test/CodeGen/X86/code_placement_cold_loop_blocks.ll
index 01161ab95185c..c6c40bf1c0dae 100644
--- a/llvm/test/CodeGen/X86/code_placement_cold_loop_blocks.ll
+++ b/llvm/test/CodeGen/X86/code_placement_cold_loop_blocks.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
define void @foo() !prof !1 {
; Test if a cold block in a loop will be placed at the end of the function
diff --git a/llvm/test/CodeGen/X86/code_placement_eh.ll b/llvm/test/CodeGen/X86/code_placement_eh.ll
index 56d642fc0e0e1..df60b6633d350 100644
--- a/llvm/test/CodeGen/X86/code_placement_eh.ll
+++ b/llvm/test/CodeGen/X86/code_placement_eh.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; CodePlacementOpt shouldn't try to modify this loop because
; it involves EH edges.
diff --git a/llvm/test/CodeGen/X86/code_placement_ext_tsp.ll b/llvm/test/CodeGen/X86/code_placement_ext_tsp.ll
index 37e3245467c86..46ecbfb0ace8c 100644
--- a/llvm/test/CodeGen/X86/code_placement_ext_tsp.ll
+++ b/llvm/test/CodeGen/X86/code_placement_ext_tsp.ll
@@ -1,5 +1,5 @@
;; See also llvm/unittests/Transforms/Utils/CodeLayoutTest.cpp
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs -enable-ext-tsp-block-placement < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs -enable-ext-tsp-block-placement < %s | FileCheck %s
define void @func1a() {
; Test that the algorithm positions the most likely successor first
diff --git a/llvm/test/CodeGen/X86/code_placement_ext_tsp_large.ll b/llvm/test/CodeGen/X86/code_placement_ext_tsp_large.ll
index 24c52f1e88656..74e3b93a5e1c1 100644
--- a/llvm/test/CodeGen/X86/code_placement_ext_tsp_large.ll
+++ b/llvm/test/CodeGen/X86/code_placement_ext_tsp_large.ll
@@ -1,8 +1,8 @@
; REQUIRES: asserts
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs -enable-ext-tsp-block-placement -ext-tsp-chain-split-threshold=128 -debug-only=block-placement < %s 2>&1 | FileCheck %s
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs -enable-ext-tsp-block-placement -ext-tsp-chain-split-threshold=1 -debug-only=block-placement < %s 2>&1 | FileCheck %s -check-prefix=CHECK2
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs -debug-only=block-placement < %s 2>&1 | FileCheck %s -check-prefix=CHECK3
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs -enable-ext-tsp-block-placement -ext-tsp-block-placement-max-blocks=8 -debug-only=block-placement < %s 2>&1 | FileCheck %s -check-prefix=CHECK4
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs -enable-ext-tsp-block-placement -ext-tsp-chain-split-threshold=128 -debug-only=block-placement < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs -enable-ext-tsp-block-placement -ext-tsp-chain-split-threshold=1 -debug-only=block-placement < %s 2>&1 | FileCheck %s -check-prefix=CHECK2
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs -debug-only=block-placement < %s 2>&1 | FileCheck %s -check-prefix=CHECK3
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs -enable-ext-tsp-block-placement -ext-tsp-block-placement-max-blocks=8 -debug-only=block-placement < %s 2>&1 | FileCheck %s -check-prefix=CHECK4
@yydebug = dso_local global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/code_placement_ext_tsp_size.ll b/llvm/test/CodeGen/X86/code_placement_ext_tsp_size.ll
index e7a4d6d8fd23a..f1292e1a1ef6d 100644
--- a/llvm/test/CodeGen/X86/code_placement_ext_tsp_size.ll
+++ b/llvm/test/CodeGen/X86/code_placement_ext_tsp_size.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs -apply-ext-tsp-for-size < %s | FileCheck %s -check-prefix=CHECK-SIZE
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK-PERF
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs -apply-ext-tsp-for-size < %s | FileCheck %s -check-prefix=CHECK-SIZE
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs < %s | FileCheck %s -check-prefix=CHECK-PERF
define void @func1() minsize {
;
diff --git a/llvm/test/CodeGen/X86/code_placement_ext_tsp_size_and_perf.ll b/llvm/test/CodeGen/X86/code_placement_ext_tsp_size_and_perf.ll
index 0980bba58f018..5f0a32f4ab240 100644
--- a/llvm/test/CodeGen/X86/code_placement_ext_tsp_size_and_perf.ll
+++ b/llvm/test/CodeGen/X86/code_placement_ext_tsp_size_and_perf.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs -enable-ext-tsp-block-placement -apply-ext-tsp-for-size < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux -verify-machineinstrs -enable-ext-tsp-block-placement -apply-ext-tsp-for-size < %s | FileCheck %s
;; Cold function with optsize: should use ext-tsp for size.
;; The size-optimized layout keeps the original order (b0, b1, b2) since it
diff --git a/llvm/test/CodeGen/X86/code_placement_ignore_succ_in_inner_loop.ll b/llvm/test/CodeGen/X86/code_placement_ignore_succ_in_inner_loop.ll
index 48329ed86e15f..b59d9e31abe37 100644
--- a/llvm/test/CodeGen/X86/code_placement_ignore_succ_in_inner_loop.ll
+++ b/llvm/test/CodeGen/X86/code_placement_ignore_succ_in_inner_loop.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
define void @foo() {
; After moving the latch to the top of loop, there is no fall through from the
diff --git a/llvm/test/CodeGen/X86/code_placement_loop_rotation.ll b/llvm/test/CodeGen/X86/code_placement_loop_rotation.ll
index 96fbc81389999..69a8fa41ebba0 100644
--- a/llvm/test/CodeGen/X86/code_placement_loop_rotation.ll
+++ b/llvm/test/CodeGen/X86/code_placement_loop_rotation.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -precise-rotation-cost < %s | FileCheck %s -check-prefix=CHECK-PROFILE
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux -precise-rotation-cost < %s | FileCheck %s -check-prefix=CHECK-PROFILE
define void @foo() {
; Test that not all edges in the loop chain are fall through without profile
diff --git a/llvm/test/CodeGen/X86/code_placement_loop_rotation2.ll b/llvm/test/CodeGen/X86/code_placement_loop_rotation2.ll
index cdf2fb05a7313..0e2c76dc2bc88 100644
--- a/llvm/test/CodeGen/X86/code_placement_loop_rotation2.ll
+++ b/llvm/test/CodeGen/X86/code_placement_loop_rotation2.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -precise-rotation-cost < %s | FileCheck %s -check-prefix=CHECK-PROFILE
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux -precise-rotation-cost < %s | FileCheck %s -check-prefix=CHECK-PROFILE
define void @foo() {
; Test a nested loop case when profile data is not available.
diff --git a/llvm/test/CodeGen/X86/code_placement_loop_rotation3.ll b/llvm/test/CodeGen/X86/code_placement_loop_rotation3.ll
index b3f06b7cf48b4..06cd279055144 100644
--- a/llvm/test/CodeGen/X86/code_placement_loop_rotation3.ll
+++ b/llvm/test/CodeGen/X86/code_placement_loop_rotation3.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux -force-precise-rotation-cost < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux -force-precise-rotation-cost < %s | FileCheck %s
define void @bar() {
; Test that all edges in the loop chain are fall through with profile data.
diff --git a/llvm/test/CodeGen/X86/code_placement_no_header_change.ll b/llvm/test/CodeGen/X86/code_placement_no_header_change.ll
index ab173b8de713f..044152f58e8cc 100644
--- a/llvm/test/CodeGen/X86/code_placement_no_header_change.ll
+++ b/llvm/test/CodeGen/X86/code_placement_no_header_change.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux < %s | FileCheck %s
define i32 @bar(i32 %count) {
diff --git a/llvm/test/CodeGen/X86/codegen-no-uselist-constantdata.ll b/llvm/test/CodeGen/X86/codegen-no-uselist-constantdata.ll
index d2a755919a254..18dd441cdaf17 100644
--- a/llvm/test/CodeGen/X86/codegen-no-uselist-constantdata.ll
+++ b/llvm/test/CodeGen/X86/codegen-no-uselist-constantdata.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
; Make sure codegen doesn't try to inspect the use list of constants
diff --git a/llvm/test/CodeGen/X86/codegen-prepare-addrmode-tls.ll b/llvm/test/CodeGen/X86/codegen-prepare-addrmode-tls.ll
index 0ca1da26fa89c..2313e5e834e27 100644
--- a/llvm/test/CodeGen/X86/codegen-prepare-addrmode-tls.ll
+++ b/llvm/test/CodeGen/X86/codegen-prepare-addrmode-tls.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -o - %s | FileCheck %s --check-prefix=NOPIC
-; RUN: llc -o - %s -relocation-model=pic | FileCheck %s --check-prefix=PIC
-; RUN: llc -o - %s -relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=TLSDESC
+; RUN: llc -combiner-topological-sorting -o - %s | FileCheck %s --check-prefix=NOPIC
+; RUN: llc -combiner-topological-sorting -o - %s -relocation-model=pic | FileCheck %s --check-prefix=PIC
+; RUN: llc -combiner-topological-sorting -o - %s -relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=TLSDESC
target triple = "x86_64--linux-gnu"
diff --git a/llvm/test/CodeGen/X86/codegen-prepare-cast.ll b/llvm/test/CodeGen/X86/codegen-prepare-cast.ll
index 5eb66f0282244..1078c568b599b 100644
--- a/llvm/test/CodeGen/X86/codegen-prepare-cast.ll
+++ b/llvm/test/CodeGen/X86/codegen-prepare-cast.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR4297
; RUN: opt -S < %s -codegenprepare | FileCheck %s
diff --git a/llvm/test/CodeGen/X86/codegen-prepare-collapse.ll b/llvm/test/CodeGen/X86/codegen-prepare-collapse.ll
index 69843af898019..3cdcd695f8dc0 100644
--- a/llvm/test/CodeGen/X86/codegen-prepare-collapse.ll
+++ b/llvm/test/CodeGen/X86/codegen-prepare-collapse.ll
@@ -1,4 +1,4 @@
-; RUN: llc -fast-isel=true -O1 -mtriple=x86_64-unknown-linux-gnu -start-before=codegenprepare -stop-after=codegenprepare -o - < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -fast-isel=true -O1 -mtriple=x86_64-unknown-linux-gnu -start-before=codegenprepare -stop-after=codegenprepare -o - < %s | FileCheck %s
; CHECK-LABEL: @foo
define void @foo() {
diff --git a/llvm/test/CodeGen/X86/codegen-prepare-crash.ll b/llvm/test/CodeGen/X86/codegen-prepare-crash.ll
index 8af096320d8ad..74ea4f282f0ed 100644
--- a/llvm/test/CodeGen/X86/codegen-prepare-crash.ll
+++ b/llvm/test/CodeGen/X86/codegen-prepare-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
target triple = "x86_64-unknown-linux-gnu"
@g = external global [10 x i32]
diff --git a/llvm/test/CodeGen/X86/codegen-prepare-extload.ll b/llvm/test/CodeGen/X86/codegen-prepare-extload.ll
index 7846f82ad54cd..3ec205b2d63ac 100644
--- a/llvm/test/CodeGen/X86/codegen-prepare-extload.ll
+++ b/llvm/test/CodeGen/X86/codegen-prepare-extload.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win64 | FileCheck %s
; RUN: opt -passes='require<profile-summary>,function(codegenprepare)' < %s -mtriple=x86_64-apple-macosx -S | FileCheck %s --check-prefix=OPTALL --check-prefix=OPT --check-prefix=NONSTRESS
; RUN: opt -passes='require<profile-summary>,function(codegenprepare)' < %s -mtriple=x86_64-apple-macosx -S -stress-cgp-ext-ld-promotion | FileCheck %s --check-prefix=OPTALL --check-prefix=OPT --check-prefix=STRESS
; RUN: opt -passes='require<profile-summary>,function(codegenprepare)' < %s -mtriple=x86_64-apple-macosx -S -disable-cgp-ext-ld-promotion | FileCheck %s --check-prefix=OPTALL --check-prefix=DISABLE
diff --git a/llvm/test/CodeGen/X86/codegen-prepare-uaddo.ll b/llvm/test/CodeGen/X86/codegen-prepare-uaddo.ll
index a0686cfe5e13e..3bd95deb8b455 100644
--- a/llvm/test/CodeGen/X86/codegen-prepare-uaddo.ll
+++ b/llvm/test/CodeGen/X86/codegen-prepare-uaddo.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s
; PR31754
;
diff --git a/llvm/test/CodeGen/X86/codegen-prepare.ll b/llvm/test/CodeGen/X86/codegen-prepare.ll
index a041f577abbbc..a992c7d0e9c06 100644
--- a/llvm/test/CodeGen/X86/codegen-prepare.ll
+++ b/llvm/test/CodeGen/X86/codegen-prepare.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s
; Check that the CodeGenPrepare Pass
; does not wrongly rewrite the address computed by Instruction %4
diff --git a/llvm/test/CodeGen/X86/codemodel.ll b/llvm/test/CodeGen/X86/codemodel.ll
index b56d68d5e6bfb..9035afb90513a 100644
--- a/llvm/test/CodeGen/X86/codemodel.ll
+++ b/llvm/test/CodeGen/X86/codemodel.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s
-; RUN: llc < %s -code-model=kernel | FileCheck -check-prefix CHECK-KERNEL %s
-; RUN: not llc < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s
+; RUN: llc -combiner-topological-sorting < %s -code-model=small | FileCheck -check-prefix CHECK-SMALL %s
+; RUN: llc -combiner-topological-sorting < %s -code-model=kernel | FileCheck -check-prefix CHECK-KERNEL %s
+; RUN: not llc -combiner-topological-sorting < %s -code-model=tiny 2>&1 | FileCheck -check-prefix CHECK-TINY %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/coff-alias-type.ll b/llvm/test/CodeGen/X86/coff-alias-type.ll
index 6cc0638b2d4af..b9c637d9fb412 100644
--- a/llvm/test/CodeGen/X86/coff-alias-type.ll
+++ b/llvm/test/CodeGen/X86/coff-alias-type.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-windows-gnu -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-gnu -o - %s | FileCheck %s
%struct.MyStruct = type { i8 }
diff --git a/llvm/test/CodeGen/X86/coff-comdat.ll b/llvm/test/CodeGen/X86/coff-comdat.ll
index 084a5a71125ee..09b3736e8ea9f 100644
--- a/llvm/test/CodeGen/X86/coff-comdat.ll
+++ b/llvm/test/CodeGen/X86/coff-comdat.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple i386-pc-win32 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-win32 < %s | FileCheck %s
$f1 = comdat any
@v1 = global i32 0, comdat($f1)
diff --git a/llvm/test/CodeGen/X86/coff-comdat2.ll b/llvm/test/CodeGen/X86/coff-comdat2.ll
index 3538e7ec10175..ebe9e05dad360 100644
--- a/llvm/test/CodeGen/X86/coff-comdat2.ll
+++ b/llvm/test/CodeGen/X86/coff-comdat2.ll
@@ -1,4 +1,4 @@
-; RUN: not --crash llc %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: not --crash llc -combiner-topological-sorting %s -o /dev/null 2>&1 | FileCheck %s
target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32"
target triple = "i686-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/coff-comdat3.ll b/llvm/test/CodeGen/X86/coff-comdat3.ll
index 95a23742efaeb..01b0a02f916ca 100644
--- a/llvm/test/CodeGen/X86/coff-comdat3.ll
+++ b/llvm/test/CodeGen/X86/coff-comdat3.ll
@@ -1,4 +1,4 @@
-; RUN: not --crash llc %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: not --crash llc -combiner-topological-sorting %s -o /dev/null 2>&1 | FileCheck %s
target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32"
target triple = "i686-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/coff-exclude.ll b/llvm/test/CodeGen/X86/coff-exclude.ll
index 35ab756a066b4..df8cbc38fa9f5 100644
--- a/llvm/test/CodeGen/X86/coff-exclude.ll
+++ b/llvm/test/CodeGen/X86/coff-exclude.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-win32-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-win32-gnu < %s | FileCheck %s
@a = global i32 1
@b = global i32 1, !exclude !0
diff --git a/llvm/test/CodeGen/X86/coff-feat00.ll b/llvm/test/CodeGen/X86/coff-feat00.ll
index 1dcd4276399a9..cd7e56aaa976c 100644
--- a/llvm/test/CodeGen/X86/coff-feat00.ll
+++ b/llvm/test/CodeGen/X86/coff-feat00.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mtriple=i386-pc-win32 -filetype=asm -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=i386-pc-win32 -filetype=asm -o - %s | FileCheck %s
define i32 @foo() {
ret i32 0
diff --git a/llvm/test/CodeGen/X86/coff-fp-section-name.ll b/llvm/test/CodeGen/X86/coff-fp-section-name.ll
index 4dc45cf2958f0..d5623cf58236c 100644
--- a/llvm/test/CodeGen/X86/coff-fp-section-name.ll
+++ b/llvm/test/CodeGen/X86/coff-fp-section-name.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 < %s | FileCheck %s
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/coff-linkonce.ll b/llvm/test/CodeGen/X86/coff-linkonce.ll
index 369750147f292..885297e1f3cd5 100644
--- a/llvm/test/CodeGen/X86/coff-linkonce.ll
+++ b/llvm/test/CodeGen/X86/coff-linkonce.ll
@@ -1,4 +1,4 @@
-; RUN: llc -function-sections -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -function-sections -o - %s | FileCheck %s
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/coff-no-dead-strip.ll b/llvm/test/CodeGen/X86/coff-no-dead-strip.ll
index 34a9da55335da..b432d2b730258 100644
--- a/llvm/test/CodeGen/X86/coff-no-dead-strip.ll
+++ b/llvm/test/CodeGen/X86/coff-no-dead-strip.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple i686-windows-msvc -filetype asm -o - %s | FileCheck %s -check-prefix CHECK -check-prefix CHECK-ULP
-; RUN: llc -mtriple x86_64-windows-msvc -filetype asm -o - %s | FileCheck %s -check-prefix CHECK -check-prefix CHECK-NOULP
+; RUN: llc -combiner-topological-sorting -mtriple i686-windows-msvc -filetype asm -o - %s | FileCheck %s -check-prefix CHECK -check-prefix CHECK-ULP
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-windows-msvc -filetype asm -o - %s | FileCheck %s -check-prefix CHECK -check-prefix CHECK-NOULP
@i = global i32 0
@j = weak global i32 0
diff --git a/llvm/test/CodeGen/X86/coff-weak.ll b/llvm/test/CodeGen/X86/coff-weak.ll
index 485e8f6a3847b..08fd602b16eaa 100644
--- a/llvm/test/CodeGen/X86/coff-weak.ll
+++ b/llvm/test/CodeGen/X86/coff-weak.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i686-windows-msvc -o - %s | FileCheck -check-prefix=X86 %s
-; RUN: llc -mtriple=x86_64-windows-msvc -o - %s | FileCheck -check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-windows-msvc -o - %s | FileCheck -check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc -o - %s | FileCheck -check-prefix=X64 %s
; X86: .weak _foo
; X64: .weak foo
diff --git a/llvm/test/CodeGen/X86/coldcc64.ll b/llvm/test/CodeGen/X86/coldcc64.ll
index 4db56bbaea2dc..4b28735db05a3 100644
--- a/llvm/test/CodeGen/X86/coldcc64.ll
+++ b/llvm/test/CodeGen/X86/coldcc64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target triple = "x86_64-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/combine-64bit-vec-binop.ll b/llvm/test/CodeGen/X86/combine-64bit-vec-binop.ll
index 387b770c28757..44cd37848bd8c 100644
--- a/llvm/test/CodeGen/X86/combine-64bit-vec-binop.ll
+++ b/llvm/test/CodeGen/X86/combine-64bit-vec-binop.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefix=SSE41
define double @test1_add(double %A, double %B) {
; SSE41-LABEL: test1_add:
diff --git a/llvm/test/CodeGen/X86/combine-abs.ll b/llvm/test/CodeGen/X86/combine-abs.ll
index 76ee02e798707..ccd9d96c38006 100644
--- a/llvm/test/CodeGen/X86/combine-abs.ll
+++ b/llvm/test/CodeGen/X86/combine-abs.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX,AVX512VL
; fold (abs c1) -> c2
define <4 x i32> @combine_v4i32_abs_constant() {
diff --git a/llvm/test/CodeGen/X86/combine-adc.ll b/llvm/test/CodeGen/X86/combine-adc.ll
index cb934c8664e45..47d309ea6a434 100644
--- a/llvm/test/CodeGen/X86/combine-adc.ll
+++ b/llvm/test/CodeGen/X86/combine-adc.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
define i32 @PR40483_add1(ptr, i32) nounwind {
; X86-LABEL: PR40483_add1:
diff --git a/llvm/test/CodeGen/X86/combine-add-ssat.ll b/llvm/test/CodeGen/X86/combine-add-ssat.ll
index 75adcddc7b2f3..6ca7dcf9d0054 100644
--- a/llvm/test/CodeGen/X86/combine-add-ssat.ll
+++ b/llvm/test/CodeGen/X86/combine-add-ssat.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX
declare i32 @llvm.sadd.sat.i32 (i32, i32)
declare i64 @llvm.sadd.sat.i64 (i64, i64)
diff --git a/llvm/test/CodeGen/X86/combine-add-usat.ll b/llvm/test/CodeGen/X86/combine-add-usat.ll
index 5b947dd6f2b55..43234c13150f3 100644
--- a/llvm/test/CodeGen/X86/combine-add-usat.ll
+++ b/llvm/test/CodeGen/X86/combine-add-usat.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX
declare i32 @llvm.uadd.sat.i32 (i32, i32)
declare i64 @llvm.uadd.sat.i64 (i64, i64)
diff --git a/llvm/test/CodeGen/X86/combine-add.ll b/llvm/test/CodeGen/X86/combine-add.ll
index 5efc8cd111d1f..362a4401b21ad 100644
--- a/llvm/test/CodeGen/X86/combine-add.ll
+++ b/llvm/test/CodeGen/X86/combine-add.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
; fold (add x, 0) -> x
define <4 x i32> @combine_vec_add_to_zero(<4 x i32> %a) {
diff --git a/llvm/test/CodeGen/X86/combine-addo.ll b/llvm/test/CodeGen/X86/combine-addo.ll
index ba748b6e653cf..8a3631d2185c8 100644
--- a/llvm/test/CodeGen/X86/combine-addo.ll
+++ b/llvm/test/CodeGen/X86/combine-addo.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
declare {i32, i1} @llvm.sadd.with.overflow.i32(i32, i32) nounwind readnone
declare {i32, i1} @llvm.uadd.with.overflow.i32(i32, i32) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/combine-adx.ll b/llvm/test/CodeGen/X86/combine-adx.ll
index c2b11e78115a8..4840d3afbdd0c 100644
--- a/llvm/test/CodeGen/X86/combine-adx.ll
+++ b/llvm/test/CodeGen/X86/combine-adx.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
define i32 @test_addcarry_32_x_0_false(i32 %a0) {
; X86-LABEL: test_addcarry_32_x_0_false:
diff --git a/llvm/test/CodeGen/X86/combine-andintoload.ll b/llvm/test/CodeGen/X86/combine-andintoload.ll
index caca66adc111c..b201e1969a90e 100644
--- a/llvm/test/CodeGen/X86/combine-andintoload.ll
+++ b/llvm/test/CodeGen/X86/combine-andintoload.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-none-eabi -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-none-eabi -o - | FileCheck %s
define zeroext i1 @bigger(ptr nocapture readonly %c, ptr nocapture readonly %e, i64 %d, i64 %p1) {
; CHECK-LABEL: bigger:
diff --git a/llvm/test/CodeGen/X86/combine-avx-intrinsics.ll b/llvm/test/CodeGen/X86/combine-avx-intrinsics.ll
index e46a1903e81e0..30f6f88e97eb3 100644
--- a/llvm/test/CodeGen/X86/combine-avx-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/combine-avx-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
define <4 x double> @test_x86_avx_blend_pd_256(<4 x double> %a0) {
diff --git a/llvm/test/CodeGen/X86/combine-bextr.ll b/llvm/test/CodeGen/X86/combine-bextr.ll
index 6eea67cb43ec7..3650550f8a859 100644
--- a/llvm/test/CodeGen/X86/combine-bextr.ll
+++ b/llvm/test/CodeGen/X86/combine-bextr.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2,+bmi | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2,+bmi | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2,+bmi | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2,+bmi | FileCheck %s --check-prefixes=CHECK,X64
declare i32 @llvm.x86.bmi.bextr.32(i32, i32)
diff --git a/llvm/test/CodeGen/X86/combine-bitreverse.ll b/llvm/test/CodeGen/X86/combine-bitreverse.ll
index f3d4d691b453b..9431784552848 100644
--- a/llvm/test/CodeGen/X86/combine-bitreverse.ll
+++ b/llvm/test/CodeGen/X86/combine-bitreverse.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
; These tests just check that the plumbing is in place for @llvm.bitreverse. The
; actual output is massive at the moment as llvm.bitreverse is not yet legal.
diff --git a/llvm/test/CodeGen/X86/combine-bzhi.ll b/llvm/test/CodeGen/X86/combine-bzhi.ll
index 37b0c78347373..537ebf1447fb8 100644
--- a/llvm/test/CodeGen/X86/combine-bzhi.ll
+++ b/llvm/test/CodeGen/X86/combine-bzhi.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2,+bmi2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2,+bmi2 | FileCheck %s
declare i32 @llvm.x86.bmi.bzhi.32(i32, i32) nounwind readnone
declare i64 @llvm.x86.bmi.bzhi.64(i64, i64) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/combine-clmul.ll b/llvm/test/CodeGen/X86/combine-clmul.ll
index 1581f7cfc64e2..a32548a7236cc 100644
--- a/llvm/test/CodeGen/X86/combine-clmul.ll
+++ b/llvm/test/CodeGen/X86/combine-clmul.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SCALAR
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,+pclmul | FileCheck %s --check-prefixes=CHECK,SSE-PCLMUL
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.2,+pclmul | FileCheck %s --check-prefixes=CHECK,SSE-PCLMUL
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2,+pclmul | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2,+vpclmulqdq | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl,+vpclmulqdq | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SCALAR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2,+pclmul | FileCheck %s --check-prefixes=CHECK,SSE-PCLMUL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.2,+pclmul | FileCheck %s --check-prefixes=CHECK,SSE-PCLMUL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2,+pclmul | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2,+vpclmulqdq | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512vl,+vpclmulqdq | FileCheck %s --check-prefixes=CHECK,AVX
; Test with constant 0 - should optimize to just returning 0
define i32 @clmul_i32_zero(i32 %a) {
diff --git a/llvm/test/CodeGen/X86/combine-cvtp2si.ll b/llvm/test/CodeGen/X86/combine-cvtp2si.ll
index 033c752a9734b..50ab20d0b91be 100644
--- a/llvm/test/CodeGen/X86/combine-cvtp2si.ll
+++ b/llvm/test/CodeGen/X86/combine-cvtp2si.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <8 x i32> @concat_cvtps2dq_v8i32_v4f32(<4 x float> %a0, <4 x float> %a1) {
; AVX-LABEL: concat_cvtps2dq_v8i32_v4f32:
diff --git a/llvm/test/CodeGen/X86/combine-cvttp2si.ll b/llvm/test/CodeGen/X86/combine-cvttp2si.ll
index 2fa402a9e90e3..24536b0028e4b 100644
--- a/llvm/test/CodeGen/X86/combine-cvttp2si.ll
+++ b/llvm/test/CodeGen/X86/combine-cvttp2si.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <8 x i32> @concat_cvttps2dq_v8i32_v4f32(<4 x float> %a0, <4 x float> %a1) {
; AVX-LABEL: concat_cvttps2dq_v8i32_v4f32:
diff --git a/llvm/test/CodeGen/X86/combine-fabs.ll b/llvm/test/CodeGen/X86/combine-fabs.ll
index 7aa6628cb7f39..63b0d92ff8dc9 100644
--- a/llvm/test/CodeGen/X86/combine-fabs.ll
+++ b/llvm/test/CodeGen/X86/combine-fabs.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
;
; NOTE: this is generated by utils/update_llc_test_checks.py but we can't check NAN types (PR30443),
diff --git a/llvm/test/CodeGen/X86/combine-fceil.ll b/llvm/test/CodeGen/X86/combine-fceil.ll
index a3f55e8f64b80..1067c4669ab34 100644
--- a/llvm/test/CodeGen/X86/combine-fceil.ll
+++ b/llvm/test/CodeGen/X86/combine-fceil.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <4 x double> @concat_ceil_v4f64_v2f64(<2 x double> %a0, <2 x double> %a1) {
; SSE-LABEL: concat_ceil_v4f64_v2f64:
diff --git a/llvm/test/CodeGen/X86/combine-ffloor.ll b/llvm/test/CodeGen/X86/combine-ffloor.ll
index 5cde95ec7aa4f..7abaf7abb3df5 100644
--- a/llvm/test/CodeGen/X86/combine-ffloor.ll
+++ b/llvm/test/CodeGen/X86/combine-ffloor.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <4 x double> @concat_floor_v4f64_v2f64(<2 x double> %a0, <2 x double> %a1) {
; SSE-LABEL: concat_floor_v4f64_v2f64:
diff --git a/llvm/test/CodeGen/X86/combine-fma-negate.ll b/llvm/test/CodeGen/X86/combine-fma-negate.ll
index 945df32781464..139b33ce9b4ca 100644
--- a/llvm/test/CodeGen/X86/combine-fma-negate.ll
+++ b/llvm/test/CodeGen/X86/combine-fma-negate.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f -mattr=+fma | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f -mattr=+fma | FileCheck %s
define void @fma_neg(<8 x i1> %r280, ptr %pp1, ptr %pp2) {
; CHECK-LABEL: fma_neg:
diff --git a/llvm/test/CodeGen/X86/combine-fmax.ll b/llvm/test/CodeGen/X86/combine-fmax.ll
index 5247b770773d9..550e068db50ea 100644
--- a/llvm/test/CodeGen/X86/combine-fmax.ll
+++ b/llvm/test/CodeGen/X86/combine-fmax.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX
define <4 x double> @concat_fmax_v4f64_v2f64(<2 x double> %a0, <2 x double> %a1) {
; SSE-LABEL: concat_fmax_v4f64_v2f64:
diff --git a/llvm/test/CodeGen/X86/combine-fmin.ll b/llvm/test/CodeGen/X86/combine-fmin.ll
index 331771ba41ebc..14ff03e13d30e 100644
--- a/llvm/test/CodeGen/X86/combine-fmin.ll
+++ b/llvm/test/CodeGen/X86/combine-fmin.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX
define <4 x double> @concat_fmin_v4f64_v2f64(<2 x double> %a0, <2 x double> %a1) {
; SSE-LABEL: concat_fmin_v4f64_v2f64:
diff --git a/llvm/test/CodeGen/X86/combine-fmul.ll b/llvm/test/CodeGen/X86/combine-fmul.ll
index c5966a81147e9..4d117d42e5f16 100644
--- a/llvm/test/CodeGen/X86/combine-fmul.ll
+++ b/llvm/test/CodeGen/X86/combine-fmul.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <4 x double> @concat_fmul_self_v4f64_v2f64(<2 x double> %a0, <2 x double> %a1) {
; SSE-LABEL: concat_fmul_self_v4f64_v2f64:
diff --git a/llvm/test/CodeGen/X86/combine-fnearbyint.ll b/llvm/test/CodeGen/X86/combine-fnearbyint.ll
index fde136af7c4c2..ff8bdba8417fa 100644
--- a/llvm/test/CodeGen/X86/combine-fnearbyint.ll
+++ b/llvm/test/CodeGen/X86/combine-fnearbyint.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <4 x double> @concat_nearbyint_v4f64_v2f64(<2 x double> %a0, <2 x double> %a1) {
; SSE-LABEL: concat_nearbyint_v4f64_v2f64:
diff --git a/llvm/test/CodeGen/X86/combine-frint.ll b/llvm/test/CodeGen/X86/combine-frint.ll
index 1c52529e8386c..d142afc22bd1b 100644
--- a/llvm/test/CodeGen/X86/combine-frint.ll
+++ b/llvm/test/CodeGen/X86/combine-frint.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <4 x double> @concat_rint_v4f64_v2f64(<2 x double> %a0, <2 x double> %a1) {
; SSE-LABEL: concat_rint_v4f64_v2f64:
diff --git a/llvm/test/CodeGen/X86/combine-fround.ll b/llvm/test/CodeGen/X86/combine-fround.ll
index 42dbaf234dbc7..2903661735c9e 100644
--- a/llvm/test/CodeGen/X86/combine-fround.ll
+++ b/llvm/test/CodeGen/X86/combine-fround.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <4 x double> @concat_round_v4f64_v2f64(<2 x double> %a0, <2 x double> %a1) {
; SSE-LABEL: concat_round_v4f64_v2f64:
diff --git a/llvm/test/CodeGen/X86/combine-froundeven.ll b/llvm/test/CodeGen/X86/combine-froundeven.ll
index 4bf1e86d887ae..14686cdacaeec 100644
--- a/llvm/test/CodeGen/X86/combine-froundeven.ll
+++ b/llvm/test/CodeGen/X86/combine-froundeven.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <4 x double> @concat_roundeven_v4f64_v2f64(<2 x double> %a0, <2 x double> %a1) {
; SSE-LABEL: concat_roundeven_v4f64_v2f64:
diff --git a/llvm/test/CodeGen/X86/combine-fsqrt.ll b/llvm/test/CodeGen/X86/combine-fsqrt.ll
index 7e2d5d8de77ee..67f8752d6bbbe 100644
--- a/llvm/test/CodeGen/X86/combine-fsqrt.ll
+++ b/llvm/test/CodeGen/X86/combine-fsqrt.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <4 x double> @concat_sqrt_v4f64_v2f64(<2 x double> %a0, <2 x double> %a1) {
; SSE-LABEL: concat_sqrt_v4f64_v2f64:
diff --git a/llvm/test/CodeGen/X86/combine-ftrunc.ll b/llvm/test/CodeGen/X86/combine-ftrunc.ll
index 3dde226db73df..0a5b76686f139 100644
--- a/llvm/test/CodeGen/X86/combine-ftrunc.ll
+++ b/llvm/test/CodeGen/X86/combine-ftrunc.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <4 x double> @concat_trunc_v4f64_v2f64(<2 x double> %a0, <2 x double> %a1) {
; SSE-LABEL: concat_trunc_v4f64_v2f64:
diff --git a/llvm/test/CodeGen/X86/combine-gfni.ll b/llvm/test/CodeGen/X86/combine-gfni.ll
index b105cdf7ea895..f5e4847796837 100644
--- a/llvm/test/CodeGen/X86/combine-gfni.ll
+++ b/llvm/test/CodeGen/X86/combine-gfni.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+gfni | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+gfni,+avx | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl,+gfni,+avx512bw | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+gfni | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+gfni,+avx | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512vl,+gfni,+avx512bw | FileCheck %s --check-prefixes=AVX512
define <16 x i8> @gf2p8affineqb_freeze(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> %a2) {
; SSE-LABEL: gf2p8affineqb_freeze:
diff --git a/llvm/test/CodeGen/X86/combine-i64-trunc-srl-add.ll b/llvm/test/CodeGen/X86/combine-i64-trunc-srl-add.ll
index f7906e5a009ae..46163b38067eb 100644
--- a/llvm/test/CodeGen/X86/combine-i64-trunc-srl-add.ll
+++ b/llvm/test/CodeGen/X86/combine-i64-trunc-srl-add.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
; Test for https://github.com/llvm/llvm-project/issues/123239
diff --git a/llvm/test/CodeGen/X86/combine-lds.ll b/llvm/test/CodeGen/X86/combine-lds.ll
index 62f3a1b1ef9c1..5ad1567950b6c 100644
--- a/llvm/test/CodeGen/X86/combine-lds.ll
+++ b/llvm/test/CodeGen/X86/combine-lds.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
define double @doload64(i64 %x) nounwind {
; CHECK-LABEL: doload64:
diff --git a/llvm/test/CodeGen/X86/combine-mask-with-shuffle.ll b/llvm/test/CodeGen/X86/combine-mask-with-shuffle.ll
index 7564e65a428b7..6d34f76850fba 100644
--- a/llvm/test/CodeGen/X86/combine-mask-with-shuffle.ll
+++ b/llvm/test/CodeGen/X86/combine-mask-with-shuffle.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vpopcntdq,+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512vpopcntdq,+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK
define <16 x i32> @combine_mask_with_or(<16 x i32> %v0) {
diff --git a/llvm/test/CodeGen/X86/combine-movmsk-avx.ll b/llvm/test/CodeGen/X86/combine-movmsk-avx.ll
index 303873599ca52..1a477a870decc 100644
--- a/llvm/test/CodeGen/X86/combine-movmsk-avx.ll
+++ b/llvm/test/CodeGen/X86/combine-movmsk-avx.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,VTEST,VTEST-AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,VTEST,VTEST-AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+prefer-movmsk-over-vtest | FileCheck %s --check-prefixes=CHECK,MOVMSK,MOVMSK-AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+prefer-movmsk-over-vtest | FileCheck %s --check-prefixes=CHECK,MOVMSK,MOVMSK-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,VTEST,VTEST-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,VTEST,VTEST-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+prefer-movmsk-over-vtest | FileCheck %s --check-prefixes=CHECK,MOVMSK,MOVMSK-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+prefer-movmsk-over-vtest | FileCheck %s --check-prefixes=CHECK,MOVMSK,MOVMSK-AVX2
declare i32 @llvm.x86.avx.movmsk.pd.256(<4 x double>)
declare i32 @llvm.x86.avx.movmsk.ps.256(<8 x float>)
diff --git a/llvm/test/CodeGen/X86/combine-movmsk.ll b/llvm/test/CodeGen/X86/combine-movmsk.ll
index c107a981f1a3d..6b63b417b18c7 100644
--- a/llvm/test/CodeGen/X86/combine-movmsk.ll
+++ b/llvm/test/CodeGen/X86/combine-movmsk.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+prefer-movmsk-over-vtest | FileCheck %s --check-prefixes=ADL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+prefer-movmsk-over-vtest | FileCheck %s --check-prefixes=ADL
declare i32 @llvm.x86.sse.movmsk.ps(<4 x float>)
declare i32 @llvm.x86.sse2.movmsk.pd(<2 x double>)
diff --git a/llvm/test/CodeGen/X86/combine-mul.ll b/llvm/test/CodeGen/X86/combine-mul.ll
index 15d187a5baeec..79d1347fba948 100644
--- a/llvm/test/CodeGen/X86/combine-mul.ll
+++ b/llvm/test/CodeGen/X86/combine-mul.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
; fold (mul x, 0) -> 0
define <4 x i32> @combine_vec_mul_zero(<4 x i32> %x) {
diff --git a/llvm/test/CodeGen/X86/combine-mulo.ll b/llvm/test/CodeGen/X86/combine-mulo.ll
index 896269a288f56..6508fa58af51c 100644
--- a/llvm/test/CodeGen/X86/combine-mulo.ll
+++ b/llvm/test/CodeGen/X86/combine-mulo.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
declare {i32, i1} @llvm.smul.with.overflow.i32(i32, i32) nounwind readnone
declare {i32, i1} @llvm.umul.with.overflow.i32(i32, i32) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/combine-or.ll b/llvm/test/CodeGen/X86/combine-or.ll
index 8f106e5349f71..378dcbc4a4585 100644
--- a/llvm/test/CodeGen/X86/combine-or.ll
+++ b/llvm/test/CodeGen/X86/combine-or.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s -check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -early-live-intervals | FileCheck %s -check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7-avx | FileCheck %s -check-prefixes=CHECK,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v3 | FileCheck %s -check-prefixes=CHECK,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s -check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -early-live-intervals | FileCheck %s -check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7-avx | FileCheck %s -check-prefixes=CHECK,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v3 | FileCheck %s -check-prefixes=CHECK,AVX,AVX2
define i32 @or_self(i32 %x) {
; CHECK-LABEL: or_self:
diff --git a/llvm/test/CodeGen/X86/combine-pack.ll b/llvm/test/CodeGen/X86/combine-pack.ll
index 2f5454dc2c3ec..30cb1279f4074 100644
--- a/llvm/test/CodeGen/X86/combine-pack.ll
+++ b/llvm/test/CodeGen/X86/combine-pack.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>)
diff --git a/llvm/test/CodeGen/X86/combine-pclmul.ll b/llvm/test/CodeGen/X86/combine-pclmul.ll
index 4bb88636d4b60..0949c9f493d15 100644
--- a/llvm/test/CodeGen/X86/combine-pclmul.ll
+++ b/llvm/test/CodeGen/X86/combine-pclmul.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s
define <2 x i64> @test_extract_pclmulqdq_v4i64_v2i64(<4 x i64> %a0, <4 x i64> %a1) {
; CHECK-LABEL: test_extract_pclmulqdq_v4i64_v2i64:
diff --git a/llvm/test/CodeGen/X86/combine-pmadd.ll b/llvm/test/CodeGen/X86/combine-pmadd.ll
index 656aff18f02ef..bb0165bafe626 100644
--- a/llvm/test/CodeGen/X86/combine-pmadd.ll
+++ b/llvm/test/CodeGen/X86/combine-pmadd.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
declare <4 x i32> @llvm.x86.sse2.pmadd.wd(<8 x i16>, <8 x i16>) nounwind readnone
declare <8 x i16> @llvm.x86.ssse3.pmadd.ub.sw.128(<16 x i8>, <16 x i8>) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/combine-ptest-256.ll b/llvm/test/CodeGen/X86/combine-ptest-256.ll
index a071da0ecc4e9..802cc53788a7b 100644
--- a/llvm/test/CodeGen/X86/combine-ptest-256.ll
+++ b/llvm/test/CodeGen/X86/combine-ptest-256.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2
;
; testz(~X,Y) -> testc(X,Y)
diff --git a/llvm/test/CodeGen/X86/combine-ptest.ll b/llvm/test/CodeGen/X86/combine-ptest.ll
index fda14027e994e..a7efb3a820685 100644
--- a/llvm/test/CodeGen/X86/combine-ptest.ll
+++ b/llvm/test/CodeGen/X86/combine-ptest.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
;
; testz(~X,Y) -> testc(X,Y)
diff --git a/llvm/test/CodeGen/X86/combine-rcp.ll b/llvm/test/CodeGen/X86/combine-rcp.ll
index 4647516528bf3..b7ad457991164 100644
--- a/llvm/test/CodeGen/X86/combine-rcp.ll
+++ b/llvm/test/CodeGen/X86/combine-rcp.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <8 x float> @concat_rcp_v8f32_v4f32(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: concat_rcp_v8f32_v4f32:
diff --git a/llvm/test/CodeGen/X86/combine-rndscale.ll b/llvm/test/CodeGen/X86/combine-rndscale.ll
index 79ccefc4b714c..2893badb7f13f 100644
--- a/llvm/test/CodeGen/X86/combine-rndscale.ll
+++ b/llvm/test/CodeGen/X86/combine-rndscale.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <4 x double> @concat_roundpd_v4f64_v2f64(<2 x double> %a0, <2 x double> %a1) {
; AVX-LABEL: concat_roundpd_v4f64_v2f64:
diff --git a/llvm/test/CodeGen/X86/combine-rsqrt.ll b/llvm/test/CodeGen/X86/combine-rsqrt.ll
index b373458654419..70e94b0c0b3c6 100644
--- a/llvm/test/CodeGen/X86/combine-rsqrt.ll
+++ b/llvm/test/CodeGen/X86/combine-rsqrt.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <8 x float> @concat_rsqrt_v8f32_v4f32(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: concat_rsqrt_v8f32_v4f32:
diff --git a/llvm/test/CodeGen/X86/combine-sbb.ll b/llvm/test/CodeGen/X86/combine-sbb.ll
index 62744d4f3050a..d8cf91cff7ee2 100644
--- a/llvm/test/CodeGen/X86/combine-sbb.ll
+++ b/llvm/test/CodeGen/X86/combine-sbb.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
%WideUInt32 = type { i32, i32 }
diff --git a/llvm/test/CodeGen/X86/combine-select.ll b/llvm/test/CodeGen/X86/combine-select.ll
index 7cbb9831ba9ad..645d664362427 100644
--- a/llvm/test/CodeGen/X86/combine-select.ll
+++ b/llvm/test/CodeGen/X86/combine-select.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
define <4 x float> @select_mask_add_ss(<4 x float> %w, i8 zeroext %u, <4 x float> %a, <4 x float> %b) {
; CHECK-LABEL: select_mask_add_ss:
diff --git a/llvm/test/CodeGen/X86/combine-sext-in-reg.ll b/llvm/test/CodeGen/X86/combine-sext-in-reg.ll
index 686945a7bcd9e..80a16b618456d 100644
--- a/llvm/test/CodeGen/X86/combine-sext-in-reg.ll
+++ b/llvm/test/CodeGen/X86/combine-sext-in-reg.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
; fold sextinreg(zext) -> sext
define <4 x i64> @sextinreg_zext_v16i8_4i64(<16 x i8> %a0) {
diff --git a/llvm/test/CodeGen/X86/combine-sitofp.ll b/llvm/test/CodeGen/X86/combine-sitofp.ll
index 3a1753e5ecf32..5f359913128aa 100644
--- a/llvm/test/CodeGen/X86/combine-sitofp.ll
+++ b/llvm/test/CodeGen/X86/combine-sitofp.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <4 x double> @concat_sitofp_v4f64_v2i32(<2 x i32> %a0, <2 x i32> %a1, <2 x double> %b0, <2 x double> %b1) {
; SSE-LABEL: concat_sitofp_v4f64_v2i32:
diff --git a/llvm/test/CodeGen/X86/combine-smax.ll b/llvm/test/CodeGen/X86/combine-smax.ll
index ac6f347edcd0d..a804e21a8859a 100644
--- a/llvm/test/CodeGen/X86/combine-smax.ll
+++ b/llvm/test/CodeGen/X86/combine-smax.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX512BW
define i8 @test_i8_knownbits(i8 %a) {
; CHECK-LABEL: test_i8_knownbits:
diff --git a/llvm/test/CodeGen/X86/combine-smin.ll b/llvm/test/CodeGen/X86/combine-smin.ll
index 35b1c54835e7b..317116197ac24 100644
--- a/llvm/test/CodeGen/X86/combine-smin.ll
+++ b/llvm/test/CodeGen/X86/combine-smin.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX512BW
define i8 @test_i8_knownbits(i8 %a) {
; CHECK-LABEL: test_i8_knownbits:
diff --git a/llvm/test/CodeGen/X86/combine-sra-load.ll b/llvm/test/CodeGen/X86/combine-sra-load.ll
index aa175f07154e2..83a07f13694f4 100644
--- a/llvm/test/CodeGen/X86/combine-sra-load.ll
+++ b/llvm/test/CodeGen/X86/combine-sra-load.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK
; fold (sra (load i32), 16)) -> (sextload i16)
define i32 @sra_half(ptr %p) {
diff --git a/llvm/test/CodeGen/X86/combine-sra.ll b/llvm/test/CodeGen/X86/combine-sra.ll
index fa5c5ecded124..f5fa5cbcc8914 100644
--- a/llvm/test/CodeGen/X86/combine-sra.ll
+++ b/llvm/test/CodeGen/X86/combine-sra.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX2-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX2-FAST-ALL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX2-FAST-PERLANE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX2-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX2-FAST-ALL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,AVX,AVX2,AVX2-FAST-PERLANE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
; fold (sra 0, x) -> 0
define <4 x i32> @combine_vec_ashr_zero(<4 x i32> %x) {
diff --git a/llvm/test/CodeGen/X86/combine-sub-ssat.ll b/llvm/test/CodeGen/X86/combine-sub-ssat.ll
index 0dab025c19cc1..0f86cbb3bca06 100644
--- a/llvm/test/CodeGen/X86/combine-sub-ssat.ll
+++ b/llvm/test/CodeGen/X86/combine-sub-ssat.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX
declare i32 @llvm.ssub.sat.i32 (i32, i32)
declare i64 @llvm.ssub.sat.i64 (i64, i64)
diff --git a/llvm/test/CodeGen/X86/combine-sub-usat.ll b/llvm/test/CodeGen/X86/combine-sub-usat.ll
index 7ec4e062930db..d3479f7c4ffe2 100644
--- a/llvm/test/CodeGen/X86/combine-sub-usat.ll
+++ b/llvm/test/CodeGen/X86/combine-sub-usat.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
declare i32 @llvm.usub.sat.i32 (i32, i32)
declare i64 @llvm.usub.sat.i64 (i64, i64)
diff --git a/llvm/test/CodeGen/X86/combine-subo.ll b/llvm/test/CodeGen/X86/combine-subo.ll
index 5e4bba6e0fd35..5ca61a7c7ec09 100644
--- a/llvm/test/CodeGen/X86/combine-subo.ll
+++ b/llvm/test/CodeGen/X86/combine-subo.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
declare {i32, i1} @llvm.ssub.with.overflow.i32(i32, i32) nounwind readnone
declare {i32, i1} @llvm.usub.with.overflow.i32(i32, i32) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/combine-testpd.ll b/llvm/test/CodeGen/X86/combine-testpd.ll
index f634e9443ba71..a74d8fa4fc8ab 100644
--- a/llvm/test/CodeGen/X86/combine-testpd.ll
+++ b/llvm/test/CodeGen/X86/combine-testpd.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s -check-prefix=CHECK -check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s -check-prefix=CHECK -check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s -check-prefix=CHECK -check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s -check-prefix=CHECK -check-prefix=AVX2
;
; testz(~X,Y) -> testc(X,Y)
diff --git a/llvm/test/CodeGen/X86/combine-testps.ll b/llvm/test/CodeGen/X86/combine-testps.ll
index e2927435f424d..0a1401c99e174 100644
--- a/llvm/test/CodeGen/X86/combine-testps.ll
+++ b/llvm/test/CodeGen/X86/combine-testps.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s -check-prefix=CHECK -check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s -check-prefix=CHECK -check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s -check-prefix=CHECK -check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s -check-prefix=CHECK -check-prefix=AVX2
;
; testz(~X,Y) -> testc(X,Y)
diff --git a/llvm/test/CodeGen/X86/combine-udiv.ll b/llvm/test/CodeGen/X86/combine-udiv.ll
index b25afb7fc4d3f..308e7db3321c2 100644
--- a/llvm/test/CodeGen/X86/combine-udiv.ll
+++ b/llvm/test/CodeGen/X86/combine-udiv.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,XOP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,XOP
; fold (udiv x, 1) -> x
define i32 @combine_udiv_by_one(i32 %x) {
diff --git a/llvm/test/CodeGen/X86/combine-umax.ll b/llvm/test/CodeGen/X86/combine-umax.ll
index 307073ee6bb65..c4bd590212d5d 100644
--- a/llvm/test/CodeGen/X86/combine-umax.ll
+++ b/llvm/test/CodeGen/X86/combine-umax.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512BW
define <8 x i16> @test_v8i16_nosignbit(<8 x i16> %a, <8 x i16> %b) {
; SSE2-LABEL: test_v8i16_nosignbit:
diff --git a/llvm/test/CodeGen/X86/combine-umin.ll b/llvm/test/CodeGen/X86/combine-umin.ll
index 880059d32172e..81d70255e1a62 100644
--- a/llvm/test/CodeGen/X86/combine-umin.ll
+++ b/llvm/test/CodeGen/X86/combine-umin.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX512BW
define i8 @test_demandedbits_umin_ult(i8 %a0, i8 %a1) {
; CHECK-LABEL: test_demandedbits_umin_ult:
diff --git a/llvm/test/CodeGen/X86/combine-undef-index-mscatter.ll b/llvm/test/CodeGen/X86/combine-undef-index-mscatter.ll
index 6f748d405458c..f710b911783df 100644
--- a/llvm/test/CodeGen/X86/combine-undef-index-mscatter.ll
+++ b/llvm/test/CodeGen/X86/combine-undef-index-mscatter.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s
define void @main(<24 x ptr> %x)
; CHECK-LABEL: main:
diff --git a/llvm/test/CodeGen/X86/combine-urem.ll b/llvm/test/CodeGen/X86/combine-urem.ll
index 34c7d3deea023..0b9e3fcf5c31d 100644
--- a/llvm/test/CodeGen/X86/combine-urem.ll
+++ b/llvm/test/CodeGen/X86/combine-urem.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX2
; fold (urem x, 1) -> 0
define i32 @combine_urem_by_one(i32 %x) {
diff --git a/llvm/test/CodeGen/X86/combine-vpmadd52.ll b/llvm/test/CodeGen/X86/combine-vpmadd52.ll
index b6dfef064de29..6cc948481093b 100644
--- a/llvm/test/CodeGen/X86/combine-vpmadd52.ll
+++ b/llvm/test/CodeGen/X86/combine-vpmadd52.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avxifma | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avxifma | FileCheck %s --check-prefixes=CHECK,AVX
define <2 x i64> @test1_vpmadd52l(<2 x i64> %x0, <2 x i64> %x1, <2 x i64> %x2) {
; AVX512-LABEL: test1_vpmadd52l:
diff --git a/llvm/test/CodeGen/X86/combineIncDecVector-crash.ll b/llvm/test/CodeGen/X86/combineIncDecVector-crash.ll
index 2d6ce2017dc0d..7e6bcc117f9ca 100644
--- a/llvm/test/CodeGen/X86/combineIncDecVector-crash.ll
+++ b/llvm/test/CodeGen/X86/combineIncDecVector-crash.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; This used to crash, just ensure that it doesn't.
diff --git a/llvm/test/CodeGen/X86/comi-flags.ll b/llvm/test/CodeGen/X86/comi-flags.ll
index 805b1b54d5b6e..a8ea6b5cc2c02 100644
--- a/llvm/test/CodeGen/X86/comi-flags.ll
+++ b/llvm/test/CodeGen/X86/comi-flags.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,NO-AVX10_2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx10.2 | FileCheck %s --check-prefixes=AVX,AVX10_2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,NO-AVX10_2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx10.2 | FileCheck %s --check-prefixes=AVX,AVX10_2
;
; SSE
diff --git a/llvm/test/CodeGen/X86/commandline-metadata.ll b/llvm/test/CodeGen/X86/commandline-metadata.ll
index de77dd27b160b..d00cfce8b134a 100644
--- a/llvm/test/CodeGen/X86/commandline-metadata.ll
+++ b/llvm/test/CodeGen/X86/commandline-metadata.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
; Verify that llvm.commandline metadata is emitted to a section named
; .GCC.command.line with each line separated with null bytes.
diff --git a/llvm/test/CodeGen/X86/commute-blend-avx2.ll b/llvm/test/CodeGen/X86/commute-blend-avx2.ll
index 75511104580e9..a0483ed872a65 100644
--- a/llvm/test/CodeGen/X86/commute-blend-avx2.ll
+++ b/llvm/test/CodeGen/X86/commute-blend-avx2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s
define <8 x i16> @commute_fold_vpblendw_128(<8 x i16> %a, ptr %b) #0 {
; CHECK-LABEL: commute_fold_vpblendw_128:
diff --git a/llvm/test/CodeGen/X86/commute-fcmp.ll b/llvm/test/CodeGen/X86/commute-fcmp.ll
index c9b8379d81d02..c67a7f9f40705 100644
--- a/llvm/test/CodeGen/X86/commute-fcmp.ll
+++ b/llvm/test/CodeGen/X86/commute-fcmp.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 -disable-peephole | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 -disable-peephole | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512vl,+avx512dq -disable-peephole | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 -disable-peephole | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 -disable-peephole | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512vl,+avx512dq -disable-peephole | FileCheck %s --check-prefix=AVX512
;
; Float Comparisons
diff --git a/llvm/test/CodeGen/X86/commute-intrinsic.ll b/llvm/test/CodeGen/X86/commute-intrinsic.ll
index c23e7dd6d065d..b51acaa4be49a 100644
--- a/llvm/test/CodeGen/X86/commute-intrinsic.ll
+++ b/llvm/test/CodeGen/X86/commute-intrinsic.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -relocation-model=static | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+sse2 -relocation-model=static | FileCheck %s
; CHECK-NOT: movaps
diff --git a/llvm/test/CodeGen/X86/commute-pclmul.ll b/llvm/test/CodeGen/X86/commute-pclmul.ll
index ea1b160f1c496..80f7938f948c7 100644
--- a/llvm/test/CodeGen/X86/commute-pclmul.ll
+++ b/llvm/test/CodeGen/X86/commute-pclmul.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown -mattr=+sse2,+pclmul | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown -mattr=+avx2,+pclmul | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown -mattr=+avx512vl,+vpclmulqdq | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown -mattr=+sse2,+pclmul | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown -mattr=+avx2,+pclmul | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown -mattr=+avx512vl,+vpclmulqdq | FileCheck %s --check-prefix=AVX
declare <2 x i64> @llvm.x86.pclmulqdq(<2 x i64>, <2 x i64>, i8) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/commute-two-addr.ll b/llvm/test/CodeGen/X86/commute-two-addr.ll
index 9a3ac44a19570..e94ed07c4592d 100644
--- a/llvm/test/CodeGen/X86/commute-two-addr.ll
+++ b/llvm/test/CodeGen/X86/commute-two-addr.ll
@@ -2,8 +2,8 @@
; insertion of register-register copies.
; Make sure there are only 3 mov's for each testcase
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=corei7 | FileCheck %s -check-prefix=LINUX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s -check-prefix=DARWIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -mcpu=corei7 | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s -check-prefix=DARWIN
@G = external dso_local global i32 ; <ptr> [#uses=2]
diff --git a/llvm/test/CodeGen/X86/commute-vpclmulqdq-avx.ll b/llvm/test/CodeGen/X86/commute-vpclmulqdq-avx.ll
index 0d9ea5450a08d..5045eeb023964 100644
--- a/llvm/test/CodeGen/X86/commute-vpclmulqdq-avx.ll
+++ b/llvm/test/CodeGen/X86/commute-vpclmulqdq-avx.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+vpclmulqdq | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+vpclmulqdq | FileCheck %s
; FIXME: actual vpclmulqdq operation should be eliminated
declare <4 x i64> @llvm.x86.pclmulqdq.256(<4 x i64>, <4 x i64>, i8) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/commute-vpclmulqdq-avx512.ll b/llvm/test/CodeGen/X86/commute-vpclmulqdq-avx512.ll
index 400f27baca616..6d009b0472058 100644
--- a/llvm/test/CodeGen/X86/commute-vpclmulqdq-avx512.ll
+++ b/llvm/test/CodeGen/X86/commute-vpclmulqdq-avx512.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+vpclmulqdq,+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+vpclmulqdq,+avx512vl | FileCheck %s
; FIXME: actual vpclmulqdq operation should be eliminated
declare <2 x i64> @llvm.x86.pclmulqdq(<2 x i64>, <2 x i64>, i8) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/commute-xop.ll b/llvm/test/CodeGen/X86/commute-xop.ll
index 26b023ac2e011..b6f4045db7b6a 100644
--- a/llvm/test/CodeGen/X86/commute-xop.ll
+++ b/llvm/test/CodeGen/X86/commute-xop.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X64
define <16 x i8> @commute_fold_vpcomb(ptr %a0, <16 x i8> %a1) {
; X86-LABEL: commute_fold_vpcomb:
diff --git a/llvm/test/CodeGen/X86/commuted-blend-mask.ll b/llvm/test/CodeGen/X86/commuted-blend-mask.ll
index 6c8dd254b15da..89f0dc70e4c95 100644
--- a/llvm/test/CodeGen/X86/commuted-blend-mask.ll
+++ b/llvm/test/CodeGen/X86/commuted-blend-mask.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s
; When commuting the operands of a SSE blend, make sure that the resulting blend
; mask can be encoded as a imm8.
diff --git a/llvm/test/CodeGen/X86/compact-unwind.ll b/llvm/test/CodeGen/X86/compact-unwind.ll
index 8e8845b281eaf..f07f8061e26bf 100644
--- a/llvm/test/CodeGen/X86/compact-unwind.ll
+++ b/llvm/test/CodeGen/X86/compact-unwind.ll
@@ -1,16 +1,16 @@
-; RUN: llc < %s -frame-pointer=all -mtriple x86_64-apple-darwin11 -mcpu corei7 -emit-compact-unwind-non-canonical=true | FileCheck -check-prefix=ASM %s
-; RUN: llc < %s -frame-pointer=all -mtriple x86_64-apple-darwin11 -mcpu corei7 -filetype=obj -emit-compact-unwind-non-canonical=true -o - \
+; RUN: llc -combiner-topological-sorting < %s -frame-pointer=all -mtriple x86_64-apple-darwin11 -mcpu corei7 -emit-compact-unwind-non-canonical=true | FileCheck -check-prefix=ASM %s
+; RUN: llc -combiner-topological-sorting < %s -frame-pointer=all -mtriple x86_64-apple-darwin11 -mcpu corei7 -filetype=obj -emit-compact-unwind-non-canonical=true -o - \
; RUN: | llvm-objdump --triple=x86_64-apple-darwin11 --unwind-info - \
; RUN: | FileCheck -check-prefix=CU %s
-; RUN: llc < %s -frame-pointer=all -mtriple x86_64-apple-darwin11 -mcpu corei7 -emit-compact-unwind-non-canonical=true \
+; RUN: llc -combiner-topological-sorting < %s -frame-pointer=all -mtriple x86_64-apple-darwin11 -mcpu corei7 -emit-compact-unwind-non-canonical=true \
; RUN: | llvm-mc -triple x86_64-apple-darwin11 -filetype=obj -emit-compact-unwind-non-canonical=true -o - \
; RUN: | llvm-objdump --triple=x86_64-apple-darwin11 --unwind-info - \
; RUN: | FileCheck -check-prefix=FROM-ASM %s
-; RUN: llc < %s -mtriple x86_64-apple-macosx10.8.0 -mcpu corei7 -filetype=obj -emit-compact-unwind-non-canonical=true -o - \
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-apple-macosx10.8.0 -mcpu corei7 -filetype=obj -emit-compact-unwind-non-canonical=true -o - \
; RUN: | llvm-objdump --triple=x86_64-apple-macosx10.8.0 --unwind-info - \
; RUN: | FileCheck -check-prefix=NOFP-CU %s
-; RUN: llc < %s -mtriple x86_64-apple-darwin11 -mcpu corei7 \
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-apple-darwin11 -mcpu corei7 \
; RUN: | llvm-mc -triple x86_64-apple-darwin11 -filetype=obj -emit-compact-unwind-non-canonical=true -o - \
; RUN: | llvm-objdump --triple=x86_64-apple-darwin11 --unwind-info - \
; RUN: | FileCheck -check-prefix=NOFP-FROM-ASM %s
diff --git a/llvm/test/CodeGen/X86/compare-add.ll b/llvm/test/CodeGen/X86/compare-add.ll
index 0045201628c99..1444996cfb9ae 100644
--- a/llvm/test/CodeGen/X86/compare-add.ll
+++ b/llvm/test/CodeGen/X86/compare-add.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define i1 @X(i32 %X) {
; CHECK-LABEL: X:
diff --git a/llvm/test/CodeGen/X86/compare-global.ll b/llvm/test/CodeGen/X86/compare-global.ll
index 708792c12662c..f5a9dc3667320 100644
--- a/llvm/test/CodeGen/X86/compare-global.ll
+++ b/llvm/test/CodeGen/X86/compare-global.ll
@@ -1,4 +1,4 @@
-; RUN: llc -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - %s | FileCheck %s
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i686-pc-windows-msvc18.0.0"
diff --git a/llvm/test/CodeGen/X86/compare-inf.ll b/llvm/test/CodeGen/X86/compare-inf.ll
index 5beec4d76e22e..80559d71889aa 100644
--- a/llvm/test/CodeGen/X86/compare-inf.ll
+++ b/llvm/test/CodeGen/X86/compare-inf.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; Convert oeq and une to ole/oge/ule/uge when comparing with infinity
; and negative infinity, because those are more efficient on x86.
diff --git a/llvm/test/CodeGen/X86/compare_folding.ll b/llvm/test/CodeGen/X86/compare_folding.ll
index b24217fe6ec20..850038aa860f7 100644
--- a/llvm/test/CodeGen/X86/compare_folding.ll
+++ b/llvm/test/CodeGen/X86/compare_folding.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
declare i1 @llvm.isunordered.f64(double, double)
define i1 @test1(double %X, double %Y) {
diff --git a/llvm/test/CodeGen/X86/compiler_used.ll b/llvm/test/CodeGen/X86/compiler_used.ll
index 4f251e00afa48..2bfe2982e5252 100644
--- a/llvm/test/CodeGen/X86/compiler_used.ll
+++ b/llvm/test/CodeGen/X86/compiler_used.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9 | FileCheck %s
@X = internal global i8 4
@Y = internal global i32 123
diff --git a/llvm/test/CodeGen/X86/complex-asm.ll b/llvm/test/CodeGen/X86/complex-asm.ll
index 2d4612bce14d0..3da8cc9f54eb8 100644
--- a/llvm/test/CodeGen/X86/complex-asm.ll
+++ b/llvm/test/CodeGen/X86/complex-asm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin
; This formerly crashed.
%0 = type { i64, i64 }
diff --git a/llvm/test/CodeGen/X86/complex-fastmath.ll b/llvm/test/CodeGen/X86/complex-fastmath.ll
index 21bb64a2f9e80..efd721a4f7ac7 100644
--- a/llvm/test/CodeGen/X86/complex-fastmath.ll
+++ b/llvm/test/CodeGen/X86/complex-fastmath.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fma | FileCheck %s --check-prefix=FMA
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=FMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fma | FileCheck %s --check-prefix=FMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=FMA
; PR31866
; complex float complex_square_f32(complex float x) {
diff --git a/llvm/test/CodeGen/X86/complex-fca.ll b/llvm/test/CodeGen/X86/complex-fca.ll
index 6b2ba462fa83e..be9f09930ed98 100644
--- a/llvm/test/CodeGen/X86/complex-fca.ll
+++ b/llvm/test/CodeGen/X86/complex-fca.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define void @ccosl(ptr noalias sret({ x86_fp80, x86_fp80 }) %agg.result, { x86_fp80, x86_fp80 } %z) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/compress-undef-float-passthrough.ll b/llvm/test/CodeGen/X86/compress-undef-float-passthrough.ll
index b19112c02c085..194d360dd77c4 100644
--- a/llvm/test/CodeGen/X86/compress-undef-float-passthrough.ll
+++ b/llvm/test/CodeGen/X86/compress-undef-float-passthrough.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512f,avx512vl | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx512f,avx512vl | FileCheck %s --check-prefix=CHECK
define void @test_compress_undef_float_passthrough(<4 x double> %a0) {
; CHECK-LABEL: test_compress_undef_float_passthrough:
diff --git a/llvm/test/CodeGen/X86/computeKnownBits_urem.ll b/llvm/test/CodeGen/X86/computeKnownBits_urem.ll
index 9f811656a50f9..4cc8f96361d67 100644
--- a/llvm/test/CodeGen/X86/computeKnownBits_urem.ll
+++ b/llvm/test/CodeGen/X86/computeKnownBits_urem.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
define i32 @main() nounwind {
; X86-LABEL: main:
diff --git a/llvm/test/CodeGen/X86/concat-cast.ll b/llvm/test/CodeGen/X86/concat-cast.ll
index ae61fa1eb2319..2d9169088a20b 100644
--- a/llvm/test/CodeGen/X86/concat-cast.ll
+++ b/llvm/test/CodeGen/X86/concat-cast.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE4
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512F
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512VL
define <4 x float> @sitofp_v4i32_v4f32(<2 x i32> %x, <2 x i32> %y) {
; SSE-LABEL: sitofp_v4i32_v4f32:
diff --git a/llvm/test/CodeGen/X86/cond-loop.ll b/llvm/test/CodeGen/X86/cond-loop.ll
index e6d6618855077..3557ffe7965f3 100644
--- a/llvm/test/CodeGen/X86/cond-loop.ll
+++ b/llvm/test/CodeGen/X86/cond-loop.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 | FileCheck %s
define void @f1(i64 %a, i64 %b) {
; CHECK-LABEL: f1:
diff --git a/llvm/test/CodeGen/X86/conditional-indecrement.ll b/llvm/test/CodeGen/X86/conditional-indecrement.ll
index 924a4564637ec..e7a8dde6130c1 100644
--- a/llvm/test/CodeGen/X86/conditional-indecrement.ll
+++ b/llvm/test/CodeGen/X86/conditional-indecrement.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
define i32 @test1(i32 %a, i32 %b) nounwind readnone {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/conditional-tailcall-pgso.ll b/llvm/test/CodeGen/X86/conditional-tailcall-pgso.ll
index 7855ff2c7eb83..da4834b3c65f1 100644
--- a/llvm/test/CodeGen/X86/conditional-tailcall-pgso.ll
+++ b/llvm/test/CodeGen/X86/conditional-tailcall-pgso.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux -show-mc-encoding | FileCheck %s --check-prefix=CHECK32
-; RUN: llc < %s -mtriple=x86_64-linux -show-mc-encoding | FileCheck %s --check-prefix=CHECK64
-; RUN: llc < %s -mtriple=x86_64-win32 -show-mc-encoding | FileCheck %s --check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -show-mc-encoding | FileCheck %s --check-prefix=CHECK32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -show-mc-encoding | FileCheck %s --check-prefix=CHECK64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -show-mc-encoding | FileCheck %s --check-prefix=WIN64
declare void @foo()
declare void @bar()
diff --git a/llvm/test/CodeGen/X86/consecutive-load-shuffle.ll b/llvm/test/CodeGen/X86/consecutive-load-shuffle.ll
index 82d83c6cc373b..621fd2d21944a 100644
--- a/llvm/test/CodeGen/X86/consecutive-load-shuffle.ll
+++ b/llvm/test/CodeGen/X86/consecutive-load-shuffle.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-windows | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows | FileCheck %s
; We should be able to prodcue a single 128-bit load for these two 64-bit loads.
; But we previously weren't because we weren't consistently looking through
diff --git a/llvm/test/CodeGen/X86/const-base-addr.ll b/llvm/test/CodeGen/X86/const-base-addr.ll
index 74ca7dd526164..b03631e6e4b02 100644
--- a/llvm/test/CodeGen/X86/const-base-addr.ll
+++ b/llvm/test/CodeGen/X86/const-base-addr.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.9.0"
diff --git a/llvm/test/CodeGen/X86/constant-combines.ll b/llvm/test/CodeGen/X86/constant-combines.ll
index 0e30671a54bcd..9ca4d865f3bf3 100644
--- a/llvm/test/CodeGen/X86/constant-combines.ll
+++ b/llvm/test/CodeGen/X86/constant-combines.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/constant-hoisting-and.ll b/llvm/test/CodeGen/X86/constant-hoisting-and.ll
index 416a216d8fef1..f62c329167a3b 100644
--- a/llvm/test/CodeGen/X86/constant-hoisting-and.ll
+++ b/llvm/test/CodeGen/X86/constant-hoisting-and.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O3 -mtriple=x86_64-- |FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O3 -mtriple=x86_64-- |FileCheck %s
define i64 @foo(i1 %z, i64 %data1, i64 %data2)
{
; If constant 4294967294 is hoisted to a variable, then we won't be able to use
diff --git a/llvm/test/CodeGen/X86/constant-hoisting-cmp.ll b/llvm/test/CodeGen/X86/constant-hoisting-cmp.ll
index c11dfe5c11c0d..e0640be3e23ca 100644
--- a/llvm/test/CodeGen/X86/constant-hoisting-cmp.ll
+++ b/llvm/test/CodeGen/X86/constant-hoisting-cmp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -O3 -mtriple=x86_64-- |FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O3 -mtriple=x86_64-- |FileCheck %s
; If constant 4294967295 is hoisted to a variable, then we won't be able to
; use a shift right by 32 to optimize the compare.
diff --git a/llvm/test/CodeGen/X86/constant-hoisting-optnone.ll b/llvm/test/CodeGen/X86/constant-hoisting-optnone.ll
index 777f965ddc6a5..aa749557ca6db 100644
--- a/llvm/test/CodeGen/X86/constant-hoisting-optnone.ll
+++ b/llvm/test/CodeGen/X86/constant-hoisting-optnone.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s
;
; Verify that pass 'Constant Hoisting' is not run on optnone functions.
; Without optnone, Pass 'Constant Hoisting' would firstly hoist
diff --git a/llvm/test/CodeGen/X86/constant-hoisting-shift-immediate.ll b/llvm/test/CodeGen/X86/constant-hoisting-shift-immediate.ll
index d67c4fe8c94cc..8354695d9eecc 100644
--- a/llvm/test/CodeGen/X86/constant-hoisting-shift-immediate.ll
+++ b/llvm/test/CodeGen/X86/constant-hoisting-shift-immediate.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O3 -mtriple=x86_64-- |FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O3 -mtriple=x86_64-- |FileCheck %s
define i64 @foo(i1 %z, ptr %p, ptr %q)
{
; If const 128 is hoisted to a variable, then in basic block L_val2 we would
diff --git a/llvm/test/CodeGen/X86/constant-pool-partition.ll b/llvm/test/CodeGen/X86/constant-pool-partition.ll
index e42b41b257651..d6c3101e6104d 100644
--- a/llvm/test/CodeGen/X86/constant-pool-partition.ll
+++ b/llvm/test/CodeGen/X86/constant-pool-partition.ll
@@ -10,15 +10,15 @@ target triple = "x86_64-grtev4-linux-gnu"
; 2. Similarly if a constant is accessed by both cold function and un-profiled
; function, constant pools for this constant should not have .unlikely suffix.
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -partition-static-data-sections \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -partition-static-data-sections \
; RUN: -function-sections -data-sections -unique-section-names=false \
; RUN: %s -o - 2>&1 | FileCheck %s --dump-input=always
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -partition-static-data-sections \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -partition-static-data-sections \
; RUN: -function-sections -data-sections -unique-section-names \
; RUN: %s -o - 2>&1 | FileCheck %s --dump-input=always
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -partition-static-data-sections \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -partition-static-data-sections \
; RUN: -function-sections=false -data-sections=false \
; RUN: -unique-section-names=false \
; RUN: %s -o - 2>&1 | FileCheck %s --dump-input=always
diff --git a/llvm/test/CodeGen/X86/constant-pool-remat-0.ll b/llvm/test/CodeGen/X86/constant-pool-remat-0.ll
index 5722dcc93dbea..be875bfb7637f 100644
--- a/llvm/test/CodeGen/X86/constant-pool-remat-0.ll
+++ b/llvm/test/CodeGen/X86/constant-pool-remat-0.ll
@@ -1,16 +1,16 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux -regalloc=greedy | FileCheck %s
-; RUN: llc < %s -mtriple=i386-linux -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -regalloc=greedy | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux -mattr=+sse2 | FileCheck %s
; CHECK: LCPI
; CHECK: LCPI
; CHECK: LCPI
; CHECK-NOT: LCPI
-; RUN: llc < %s -mtriple=x86_64-linux -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X64stat
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X64stat
; X64stat: 6 asm-printer
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X32stat
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 -o /dev/null -stats -info-output-file - | FileCheck %s -check-prefix=X32stat
; X32stat: 12 asm-printer
declare float @qux(float %y)
diff --git a/llvm/test/CodeGen/X86/constpool.ll b/llvm/test/CodeGen/X86/constpool.ll
index dc028dfb62929..78c52b5964ecd 100644
--- a/llvm/test/CodeGen/X86/constpool.ll
+++ b/llvm/test/CodeGen/X86/constpool.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9.7
-; RUN: llc < %s -mtriple=i386-apple-darwin9.7 -fast-isel
-; RUN: llc < %s -mtriple=x86_64-apple-darwin9.7
-; RUN: llc < %s -mtriple=x86_64-apple-darwin9.7 -fast-isel
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9.7
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9.7 -fast-isel
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin9.7
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin9.7 -fast-isel
; PR4466
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/constrained-fp80-trunc-ext.ll b/llvm/test/CodeGen/X86/constrained-fp80-trunc-ext.ll
index efa86e241bada..fd707dd0e69b1 100644
--- a/llvm/test/CodeGen/X86/constrained-fp80-trunc-ext.ll
+++ b/llvm/test/CodeGen/X86/constrained-fp80-trunc-ext.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -mtriple=x86_64-gnu-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -mtriple=x86_64-gnu-linux < %s | FileCheck %s
define x86_fp80 @constrained_fpext_f32_as_fp80(float %mem) #0 {
; CHECK-LABEL: constrained_fpext_f32_as_fp80:
diff --git a/llvm/test/CodeGen/X86/constructor.ll b/llvm/test/CodeGen/X86/constructor.ll
index dca62acff6ed5..0e13364ba4f7b 100644
--- a/llvm/test/CodeGen/X86/constructor.ll
+++ b/llvm/test/CodeGen/X86/constructor.ll
@@ -1,13 +1,13 @@
-; RUN: llc -mtriple x86_64 < %s | FileCheck --check-prefix=INIT-ARRAY %s
-; RUN: llc -mtriple x86_64-pc-linux -use-ctors < %s | FileCheck --check-prefix=CTOR %s
-; RUN: llc -mtriple x86_64-unknown-freebsd -use-ctors < %s | FileCheck --check-prefix=CTOR %s
-; RUN: llc -mtriple x86_64-pc-solaris2.11 -use-ctors < %s | FileCheck --check-prefix=CTOR %s
-; RUN: llc -mtriple x86_64-pc-linux < %s | FileCheck --check-prefix=INIT-ARRAY %s
-; RUN: llc -mtriple x86_64-unknown-freebsd < %s | FileCheck --check-prefix=INIT-ARRAY %s
-; RUN: llc -mtriple x86_64-pc-solaris2.11 < %s | FileCheck --check-prefix=INIT-ARRAY %s
-; RUN: llc -mtriple i586-intel-elfiamcu -use-ctors < %s | FileCheck %s --check-prefix=MCU-CTORS
-; RUN: llc -mtriple i586-intel-elfiamcu < %s | FileCheck %s --check-prefix=MCU-INIT-ARRAY
-; RUN: llc -mtriple x86_64-win32-gnu < %s | FileCheck --check-prefix=COFF-CTOR %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64 < %s | FileCheck --check-prefix=INIT-ARRAY %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux -use-ctors < %s | FileCheck --check-prefix=CTOR %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-freebsd -use-ctors < %s | FileCheck --check-prefix=CTOR %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-solaris2.11 -use-ctors < %s | FileCheck --check-prefix=CTOR %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux < %s | FileCheck --check-prefix=INIT-ARRAY %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-freebsd < %s | FileCheck --check-prefix=INIT-ARRAY %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-solaris2.11 < %s | FileCheck --check-prefix=INIT-ARRAY %s
+; RUN: llc -combiner-topological-sorting -mtriple i586-intel-elfiamcu -use-ctors < %s | FileCheck %s --check-prefix=MCU-CTORS
+; RUN: llc -combiner-topological-sorting -mtriple i586-intel-elfiamcu < %s | FileCheck %s --check-prefix=MCU-INIT-ARRAY
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-win32-gnu < %s | FileCheck --check-prefix=COFF-CTOR %s
@llvm.global_ctors = appending global [5 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 65535, ptr @f, ptr null}, { i32, ptr, ptr } { i32 15, ptr @g, ptr @v }, { i32, ptr, ptr } { i32 55555, ptr @h, ptr @v }, { i32, ptr, ptr } { i32 65535, ptr @i, ptr null }, { i32, ptr, ptr } { i32 65535, ptr @j, ptr null }]
@v = weak_odr global i8 0
diff --git a/llvm/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll b/llvm/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll
index ba130aa741c36..fd0c9746cfe95 100644
--- a/llvm/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll
+++ b/llvm/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll
@@ -1,10 +1,10 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=x86_64-linux -o /dev/null -stats 2>&1 | FileCheck %s -check-prefix=STATS
-; RUN: llc < %s -mtriple=x86_64-win32 -o /dev/null -stats 2>&1 | FileCheck %s -check-prefix=STATS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -o /dev/null -stats 2>&1 | FileCheck %s -check-prefix=STATS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -o /dev/null -stats 2>&1 | FileCheck %s -check-prefix=STATS
; STATS: 9 asm-printer
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s
; CHECK: leal 1({{%rsi|%rdx}}),
define fastcc zeroext i8 @fullGtU(i32 %i1, i32 %i2, ptr %ptr) nounwind optsize {
diff --git a/llvm/test/CodeGen/X86/copy-eflags.ll b/llvm/test/CodeGen/X86/copy-eflags.ll
index e1711ccdbe13f..29fcaa6c6d722 100644
--- a/llvm/test/CodeGen/X86/copy-eflags.ll
+++ b/llvm/test/CodeGen/X86/copy-eflags.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -o - -mtriple=i686-unknown-unknown %s | FileCheck %s --check-prefix=X32
-; RUN: llc -o - -mtriple=x86_64-unknown-unknown %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -o - -mtriple=i686-unknown-unknown %s | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting -o - -mtriple=x86_64-unknown-unknown %s | FileCheck %s --check-prefix=X64
;
; Test patterns that require preserving and restoring flags.
diff --git a/llvm/test/CodeGen/X86/copy-low-subvec-elt-to-high-subvec-elt.ll b/llvm/test/CodeGen/X86/copy-low-subvec-elt-to-high-subvec-elt.ll
index edd3933fcfc28..5884b8bd3e28b 100644
--- a/llvm/test/CodeGen/X86/copy-low-subvec-elt-to-high-subvec-elt.ll
+++ b/llvm/test/CodeGen/X86/copy-low-subvec-elt-to-high-subvec-elt.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,CHECK-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,CHECK-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-FAST
; Shuffle lowest element of some subvector into highest element of some subvector.
; Mainly this is testing how well we avoid subvector extractions/insertions.
diff --git a/llvm/test/CodeGen/X86/copy-propagation.ll b/llvm/test/CodeGen/X86/copy-propagation.ll
index bb8eed7ac00db..bdafe37abc219 100644
--- a/llvm/test/CodeGen/X86/copy-propagation.ll
+++ b/llvm/test/CodeGen/X86/copy-propagation.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -mattr=+avx -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -mattr=+avx -o - | FileCheck %s
; Originally from http://llvm.org/PR21743.
target triple = "x86_64-pc-win32-elf"
diff --git a/llvm/test/CodeGen/X86/copysign-constant-magnitude.ll b/llvm/test/CodeGen/X86/copysign-constant-magnitude.ll
index 0052359eedb50..26ecd6294a194 100644
--- a/llvm/test/CodeGen/X86/copysign-constant-magnitude.ll
+++ b/llvm/test/CodeGen/X86/copysign-constant-magnitude.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-apple-macosx10.10.0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx10.10.0 < %s | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/cov-sections.ll b/llvm/test/CodeGen/X86/cov-sections.ll
index 6c4f3f079f38e..c71b04339e703 100644
--- a/llvm/test/CodeGen/X86/cov-sections.ll
+++ b/llvm/test/CodeGen/X86/cov-sections.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -filetype=obj -o - | llvm-readobj -S - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc -filetype=obj -o - | llvm-readobj -S - | FileCheck %s
@covmap = private global i32 0, section ".lcovmap$M"
@covfun = private global i32 0, section ".lcovfun$M"
diff --git a/llvm/test/CodeGen/X86/cpus-amd-no-x86_64.ll b/llvm/test/CodeGen/X86/cpus-amd-no-x86_64.ll
index 0dadc599abdb9..1348b6a2dc361 100644
--- a/llvm/test/CodeGen/X86/cpus-amd-no-x86_64.ll
+++ b/llvm/test/CodeGen/X86/cpus-amd-no-x86_64.ll
@@ -2,15 +2,15 @@
; CHECK-NO-ERROR-NOT: not a recognized processor for this target
; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it!
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-tbird 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-xp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-mp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=geode 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k6-3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-tbird 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-xp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-mp 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=geode 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
define void @foo() {
ret void
diff --git a/llvm/test/CodeGen/X86/cpus-amd.ll b/llvm/test/CodeGen/X86/cpus-amd.ll
index 33cbc71b41ecd..83aebbf48a649 100644
--- a/llvm/test/CodeGen/X86/cpus-amd.ll
+++ b/llvm/test/CodeGen/X86/cpus-amd.ll
@@ -1,36 +1,36 @@
; Test that the CPU names work.
; CHECK-NO-ERROR-NOT: not a recognized processor for this target
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=k6 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=k6-2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=k6-3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=athlon 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=athlon-tbird 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=athlon-4 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=athlon-xp 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=athlon-mp 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=k6 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=k6-2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=k6-3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=athlon 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=athlon-tbird 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=athlon-4 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=athlon-xp 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=athlon-mp 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k8 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=opteron 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon64 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-fx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k8-sse3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=opteron-sse3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon64-sse3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=amdfam10 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=barcelona 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver1 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver4 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=btver1 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=btver2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=znver1 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=znver2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=znver3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=znver4 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=znver5 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=znver6 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k8 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=opteron 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon64 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon-fx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=k8-sse3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=opteron-sse3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=athlon64-sse3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=amdfam10 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=barcelona 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver1 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bdver4 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=btver1 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=btver2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=znver1 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=znver2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=znver3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=znver4 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=znver5 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=znver6 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
define void @foo() {
ret void
diff --git a/llvm/test/CodeGen/X86/cpus-intel-no-x86_64.ll b/llvm/test/CodeGen/X86/cpus-intel-no-x86_64.ll
index d28ac9a83fd82..d904be53e7aa1 100644
--- a/llvm/test/CodeGen/X86/cpus-intel-no-x86_64.ll
+++ b/llvm/test/CodeGen/X86/cpus-intel-no-x86_64.ll
@@ -2,22 +2,22 @@
; CHECK-NO-ERROR-NOT: not a recognized processor for this target
; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it!
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i386 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i486 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i586 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-mmx 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i686 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentiumpro 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=yonah 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=prescott 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=lakemont 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i386 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i486 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i586 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-mmx 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=i686 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentiumpro 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium3m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium-m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pentium4m 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=yonah 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=prescott 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=lakemont 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
define void @foo() {
ret void
diff --git a/llvm/test/CodeGen/X86/cpus-intel.ll b/llvm/test/CodeGen/X86/cpus-intel.ll
index 646629d49ec84..23a907b527188 100644
--- a/llvm/test/CodeGen/X86/cpus-intel.ll
+++ b/llvm/test/CodeGen/X86/cpus-intel.ll
@@ -1,115 +1,115 @@
; Test that the CPU names work.
; CHECK-NO-ERROR-NOT: not a recognized processor for this target
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=i386 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=i486 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=i586 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium-mmx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_mmx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=i686 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentiumpro 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_pro 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_ii 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium3m 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_iii 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_iii_no_xmm_regs 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_m 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium-m 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium4 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium4m 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_4 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=yonah 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=prescott 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_4_sse3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=lakemont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=raptorlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=meteorlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=sierraforest 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=grandridge 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=graniterapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=graniterapids-d 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=emeraldrapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=arrowlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=arrowlake-s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=arrowlake_s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=lunarlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=gracemont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pantherlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=wildcatlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=novalake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=clearwaterforest 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=diamondrapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=i386 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=i486 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=i586 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium-mmx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_mmx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=i686 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentiumpro 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_pro 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_ii 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium3m 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_iii 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_iii_no_xmm_regs 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_m 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium-m 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium4 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium4m 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_4 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=yonah 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=prescott 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pentium_4_sse3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=lakemont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=raptorlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=meteorlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=sierraforest 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=grandridge 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=graniterapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=graniterapids-d 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=emeraldrapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=arrowlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=arrowlake-s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=arrowlake_s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=lunarlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=gracemont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=pantherlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=wildcatlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=novalake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=clearwaterforest 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=diamondrapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nocona 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_2_duo_ssse3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=penryn 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_2_duo_sse4_1 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nehalem 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=corei7 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_i7_sse4_2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=westmere 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_aes_pclmulqdq 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_5th_gen_avx_tsx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=sandybridge 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_2nd_gen_avx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=ivybridge 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_3rd_gen_avx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=haswell 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_4th_gen_avx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_4th_gen_avx_tsx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=broadwell 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_5th_gen_avx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=skylake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=skx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=skylake_avx512 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=cascadelake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=cooperlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=icelake-client 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=icelake_client 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=rocketlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=icelake-server 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=icelake_server 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=tigerlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=alderlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=atom 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bonnell 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=silvermont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=slm 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=atom_sse4_2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=goldmont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=atom_sse4_2_movbe 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=goldmont-plus 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=goldmont_plus 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=tremont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=knl 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=mic_avx512 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=knm 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=raptorlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=meteorlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=sierraforest 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=grandridge 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=graniterapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=graniterapids-d 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=arrowlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=arrowlake-s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=arrowlake_s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=lunarlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=gracemont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pantherlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=wildcatlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=novalake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=clearwaterforest 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=diamondrapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nocona 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_2_duo_ssse3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=penryn 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_2_duo_sse4_1 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=nehalem 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=corei7 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_i7_sse4_2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=westmere 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_aes_pclmulqdq 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_5th_gen_avx_tsx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=sandybridge 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_2nd_gen_avx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=ivybridge 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_3rd_gen_avx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=haswell 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_4th_gen_avx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_4th_gen_avx_tsx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=broadwell 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=core_5th_gen_avx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=skylake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=skx 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=skylake_avx512 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=cascadelake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=cooperlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=cannonlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=icelake-client 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=icelake_client 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=rocketlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=icelake-server 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=icelake_server 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=tigerlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=sapphirerapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=alderlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=atom 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=bonnell 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=silvermont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=slm 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=atom_sse4_2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=goldmont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=atom_sse4_2_movbe 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=goldmont-plus 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=goldmont_plus 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=tremont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=knl 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=mic_avx512 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=knm 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=raptorlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=meteorlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=sierraforest 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=grandridge 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=graniterapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=graniterapids-d 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=arrowlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=arrowlake-s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=arrowlake_s 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=lunarlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=gracemont 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=pantherlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=wildcatlake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=novalake 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=clearwaterforest 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=diamondrapids 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
define void @foo() {
ret void
diff --git a/llvm/test/CodeGen/X86/cpus-no-x86_64.ll b/llvm/test/CodeGen/X86/cpus-no-x86_64.ll
index e2e000386717e..9250c1af31a8d 100644
--- a/llvm/test/CodeGen/X86/cpus-no-x86_64.ll
+++ b/llvm/test/CodeGen/X86/cpus-no-x86_64.ll
@@ -2,10 +2,10 @@
; CHECK-NO-ERROR-NOT: not a recognized processor for this target
; CHECK-ERROR64: LLVM ERROR: 64-bit code requested on a subtarget that doesn't support it!
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip-c6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
-; RUN: not llc < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3-2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip-c6 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=winchip2 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR64
+; RUN: not llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-unknown-unknown -mcpu=c3-2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR
define void @foo() {
ret void
diff --git a/llvm/test/CodeGen/X86/cpus-other.ll b/llvm/test/CodeGen/X86/cpus-other.ll
index 0b97be4b69990..1e4fd068b8edb 100644
--- a/llvm/test/CodeGen/X86/cpus-other.ll
+++ b/llvm/test/CodeGen/X86/cpus-other.ll
@@ -3,23 +3,23 @@
; First ensure the error message matches what we expect.
; CHECK-ERROR: not a recognized processor for this target
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=foobar 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=foobar 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
; Now ensure the error message doesn't occur for valid CPUs.
; CHECK-NO-ERROR-NOT: not a recognized processor for this target
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=generic 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=geode 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=winchip-c6 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=winchip2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=c3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
-; RUN: llc < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=c3-2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=geode 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=winchip-c6 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=winchip2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=c3 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-unknown-unknown -mcpu=c3-2 2>&1 | FileCheck %s --check-prefix=CHECK-NO-ERROR --allow-empty
;; x86-64 micro-architecture levels.
-; RUN: llc %s -filetype=null -mtriple=x86_64 -mcpu=x86-64-v2
-; RUN: llc %s -filetype=null -mtriple=x86_64 -mcpu=x86-64-v3
-; RUN: llc %s -filetype=null -mtriple=x86_64 -mcpu=x86-64-v4
+; RUN: llc -combiner-topological-sorting %s -filetype=null -mtriple=x86_64 -mcpu=x86-64-v2
+; RUN: llc -combiner-topological-sorting %s -filetype=null -mtriple=x86_64 -mcpu=x86-64-v3
+; RUN: llc -combiner-topological-sorting %s -filetype=null -mtriple=x86_64 -mcpu=x86-64-v4
define void @foo() {
ret void
diff --git a/llvm/test/CodeGen/X86/crash-O0.ll b/llvm/test/CodeGen/X86/crash-O0.ll
index 7602ecd4603ab..6e53771489ad9 100644
--- a/llvm/test/CodeGen/X86/crash-O0.ll
+++ b/llvm/test/CodeGen/X86/crash-O0.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 -relocation-model=pic -frame-pointer=all < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -relocation-model=pic -frame-pointer=all < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10"
diff --git a/llvm/test/CodeGen/X86/crash-lre-eliminate-dead-def.ll b/llvm/test/CodeGen/X86/crash-lre-eliminate-dead-def.ll
index 9f51fa4be8e1d..347d31153d328 100644
--- a/llvm/test/CodeGen/X86/crash-lre-eliminate-dead-def.ll
+++ b/llvm/test/CodeGen/X86/crash-lre-eliminate-dead-def.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - | FileCheck %s
; This file checks some weird corner case in LiveRangeEdit.
; We used to do crash when we eliminate the definition
; of the product of splitting when the original live-range
diff --git a/llvm/test/CodeGen/X86/crash-nosse.ll b/llvm/test/CodeGen/X86/crash-nosse.ll
index 1967fc285a902..9c4608f7a795d 100644
--- a/llvm/test/CodeGen/X86/crash-nosse.ll
+++ b/llvm/test/CodeGen/X86/crash-nosse.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=corei7 -mattr=-sse2,-sse4.1 -verify-machineinstrs
+; RUN: llc -combiner-topological-sorting < %s -mcpu=corei7 -mattr=-sse2,-sse4.1 -verify-machineinstrs
target triple = "x86_64-unknown-linux-gnu"
; PR10503
diff --git a/llvm/test/CodeGen/X86/crash.ll b/llvm/test/CodeGen/X86/crash.ll
index 2f49a60a26f4d..2471edf6e0176 100644
--- a/llvm/test/CodeGen/X86/crash.ll
+++ b/llvm/test/CodeGen/X86/crash.ll
@@ -1,6 +1,6 @@
; REQUIRES: asserts
-; RUN: llc -mtriple=i686-- -no-integrated-as < %s -verify-machineinstrs -precompute-phys-liveness
-; RUN: llc -mtriple=x86_64-- -no-integrated-as < %s -verify-machineinstrs -precompute-phys-liveness
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -no-integrated-as < %s -verify-machineinstrs -precompute-phys-liveness
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -no-integrated-as < %s -verify-machineinstrs -precompute-phys-liveness
; PR6497
diff --git a/llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86.ll b/llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86.ll
index fe5182e5ef731..328dd8c5aeb97 100644
--- a/llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86.ll
+++ b/llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no-generate-body-for-unused-prefixes
; i686 uses -fast-isel-abort=1 only as argument lowering is not supported, so check that FastISel didn't miss the call.
-; RUN: llc < %s -fast-isel -pass-remarks-missed=sdagisel -mtriple=i686-unknown-unknown -mattr=+crc32 2>&1 >/dev/null | FileCheck %s -check-prefix=STDERR-X86 -allow-empty
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-unknown-unknown -mattr=-sse4.2,+crc32 | FileCheck %s -check-prefix=X86
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-unknown-unknown -mattr=+crc32 | FileCheck %s -check-prefix=X86
-; RUN: llc < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=-sse4.2,+crc32 --show-mc-encoding | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=+crc32 --show-mc-encoding | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=+crc32,+egpr --show-mc-encoding | FileCheck %s -check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -pass-remarks-missed=sdagisel -mtriple=i686-unknown-unknown -mattr=+crc32 2>&1 >/dev/null | FileCheck %s -check-prefix=STDERR-X86 -allow-empty
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-unknown-unknown -mattr=-sse4.2,+crc32 | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-unknown-unknown -mattr=+crc32 | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=-sse4.2,+crc32 --show-mc-encoding | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=+crc32 --show-mc-encoding | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=+crc32,+egpr --show-mc-encoding | FileCheck %s -check-prefix=EGPR
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse42-builtins.c
diff --git a/llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86_64.ll b/llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86_64.ll
index ba5f846c22db0..77117c81dce7f 100644
--- a/llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86_64.ll
+++ b/llvm/test/CodeGen/X86/crc32-intrinsics-fast-isel-x86_64.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=-sse4.2,+crc32 --show-mc-encoding | FileCheck %s
-; RUN: llc < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=+crc32 --show-mc-encoding | FileCheck %s
-; RUN: llc < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=+crc32,+egpr --show-mc-encoding | FileCheck %s -check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=-sse4.2,+crc32 --show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=+crc32 --show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64-unknown-unknown -mattr=+crc32,+egpr --show-mc-encoding | FileCheck %s -check-prefix=EGPR
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse42-builtins.c
diff --git a/llvm/test/CodeGen/X86/crc32-intrinsics-x86.ll b/llvm/test/CodeGen/X86/crc32-intrinsics-x86.ll
index ea4e0ffb109ce..b8a74ffc8d39f 100644
--- a/llvm/test/CodeGen/X86/crc32-intrinsics-x86.ll
+++ b/llvm/test/CodeGen/X86/crc32-intrinsics-x86.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+crc32 -show-mc-encoding | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+crc32 -show-mc-encoding | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+crc32,+egpr -show-mc-encoding | FileCheck %s --check-prefixes=EGPR
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+crc32 -show-mc-encoding | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+crc32 -show-mc-encoding | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+crc32,+egpr -show-mc-encoding | FileCheck %s --check-prefixes=EGPR
define i32 @crc32_32_8(i32 %a, i8 %b) nounwind {
; X86-LABEL: crc32_32_8:
diff --git a/llvm/test/CodeGen/X86/crc32-intrinsics-x86_64.ll b/llvm/test/CodeGen/X86/crc32-intrinsics-x86_64.ll
index af2b590b1f6b2..95c13d70c02f4 100644
--- a/llvm/test/CodeGen/X86/crc32-intrinsics-x86_64.ll
+++ b/llvm/test/CodeGen/X86/crc32-intrinsics-x86_64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+crc32 -show-mc-encoding | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+crc32,+egpr -show-mc-encoding | FileCheck %s --check-prefixes=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+crc32 -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+crc32,+egpr -show-mc-encoding | FileCheck %s --check-prefixes=EGPR
declare i64 @llvm.x86.sse42.crc32.64.8(i64, i8) nounwind
declare i64 @llvm.x86.sse42.crc32.64.64(i64, i64) nounwind
diff --git a/llvm/test/CodeGen/X86/crc32-target-feature.ll b/llvm/test/CodeGen/X86/crc32-target-feature.ll
index 9dfe27e653511..ab5dc92d95366 100644
--- a/llvm/test/CodeGen/X86/crc32-target-feature.ll
+++ b/llvm/test/CodeGen/X86/crc32-target-feature.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
define i32 @test1(i32 %a, i8 %b) nounwind #0 {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll b/llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll
index 653ce171b1d8f..a2f893ae19357 100644
--- a/llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll
+++ b/llvm/test/CodeGen/X86/critical-anti-dep-breaker.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic -post-RA-scheduler=1 -break-anti-dependencies=critical | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic -post-RA-scheduler=1 -break-anti-dependencies=critical | FileCheck %s
; PR20308 ( http://llvm.org/bugs/show_bug.cgi?id=20308 ).
; The critical-anti-dependency-breaker must not use register def information from a kill inst.
diff --git a/llvm/test/CodeGen/X86/cse-add-with-overflow.ll b/llvm/test/CodeGen/X86/cse-add-with-overflow.ll
index 40214267e1743..140a56f7b122d 100644
--- a/llvm/test/CodeGen/X86/cse-add-with-overflow.ll
+++ b/llvm/test/CodeGen/X86/cse-add-with-overflow.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-darwin -mcpu=generic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-darwin -mcpu=generic | FileCheck %s
; XFAIL: *
; rdar:15661073 simple example of redundant adds
;
diff --git a/llvm/test/CodeGen/X86/csr-split.ll b/llvm/test/CodeGen/X86/csr-split.ll
index 20d577efd2714..7b16823bd675f 100644
--- a/llvm/test/CodeGen/X86/csr-split.ll
+++ b/llvm/test/CodeGen/X86/csr-split.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-linux < %s | FileCheck %s --check-prefixes=X64
-; RUN: llc -verify-machineinstrs -mtriple=i386-unknown-linux < %s | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown-linux < %s | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i386-unknown-linux < %s | FileCheck %s --check-prefixes=X86
; Check CSR split can work properly for tests below.
diff --git a/llvm/test/CodeGen/X86/cstring.ll b/llvm/test/CodeGen/X86/cstring.ll
index dd00d58dc9530..cdb50bb15ef4c 100644
--- a/llvm/test/CodeGen/X86/cstring.ll
+++ b/llvm/test/CodeGen/X86/cstring.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin | FileCheck %s
; rdar://6479858
; CHECK-NOT: comm
diff --git a/llvm/test/CodeGen/X86/ctlo.ll b/llvm/test/CodeGen/X86/ctlo.ll
index c5aa2a9f40239..a78a2c69c9513 100644
--- a/llvm/test/CodeGen/X86/ctlo.ll
+++ b/llvm/test/CodeGen/X86/ctlo.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86,X86-NOCMOV
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefixes=X86,X86-CMOV
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s --check-prefix=X86-CLZ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s --check-prefix=X64-CLZ
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+bmi,+lzcnt,+fast-lzcnt | FileCheck %s --check-prefix=X86-CLZ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+lzcnt,+fast-lzcnt | FileCheck %s --check-prefix=X64-CLZ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86,X86-NOCMOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefixes=X86,X86-CMOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s --check-prefix=X86-CLZ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+lzcnt | FileCheck %s --check-prefix=X64-CLZ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+bmi,+lzcnt,+fast-lzcnt | FileCheck %s --check-prefix=X86-CLZ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi,+lzcnt,+fast-lzcnt | FileCheck %s --check-prefix=X64-CLZ
declare i8 @llvm.ctlz.i8(i8, i1)
declare i16 @llvm.ctlz.i16(i16, i1)
diff --git a/llvm/test/CodeGen/X86/ctor-priority-coff.ll b/llvm/test/CodeGen/X86/ctor-priority-coff.ll
index c99eb4e51d79d..a4e10263630c4 100644
--- a/llvm/test/CodeGen/X86/ctor-priority-coff.ll
+++ b/llvm/test/CodeGen/X86/ctor-priority-coff.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Check that we come up with appropriate section names that link.exe sorts
; well.
diff --git a/llvm/test/CodeGen/X86/ctpop-combine.ll b/llvm/test/CodeGen/X86/ctpop-combine.ll
index 73152e9f909cf..086480a16714d 100644
--- a/llvm/test/CodeGen/X86/ctpop-combine.ll
+++ b/llvm/test/CodeGen/X86/ctpop-combine.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+popcnt | FileCheck %s -check-prefixes=CHECK,POPCOUNT
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=-popcnt | FileCheck %s -check-prefixes=CHECK,NO-POPCOUNT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+popcnt | FileCheck %s -check-prefixes=CHECK,POPCOUNT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=-popcnt | FileCheck %s -check-prefixes=CHECK,NO-POPCOUNT
declare i8 @llvm.ctpop.i8(i8) nounwind readnone
declare i64 @llvm.ctpop.i64(i64) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/cvtv2f32.ll b/llvm/test/CodeGen/X86/cvtv2f32.ll
index 3875b72d5d68a..d625d4dd0ca42 100644
--- a/llvm/test/CodeGen/X86/cvtv2f32.ll
+++ b/llvm/test/CodeGen/X86/cvtv2f32.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux-pc -mcpu=corei7 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux-pc -mcpu=corei7 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-pc -mcpu=corei7 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-pc -mcpu=corei7 | FileCheck %s --check-prefix=X64
; uitofp <2 x i32> codegen from buildvector or legalization is different but gives the same results
; across the full 0 - 0xFFFFFFFF u32 range.
diff --git a/llvm/test/CodeGen/X86/cxx_tlscc64.ll b/llvm/test/CodeGen/X86/cxx_tlscc64.ll
index df658fc40eb98..517100d46ae91 100644
--- a/llvm/test/CodeGen/X86/cxx_tlscc64.ll
+++ b/llvm/test/CodeGen/X86/cxx_tlscc64.ll
@@ -1,10 +1,10 @@
-; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; TLS function were wrongly model and after fixing that, shrink-wrapping
; cannot help here. To achieve the expected lowering, we need to playing
; tricks similar to AArch64 fast TLS calling convention (r255821).
; Applying tricks on x86-64 similar to r255821.
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -enable-shrink-wrap=true | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -O0 | FileCheck %s --check-prefix=CHECK-O0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -enable-shrink-wrap=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -O0 | FileCheck %s --check-prefix=CHECK-O0
%struct.S = type { i8 }
@sg = internal thread_local global %struct.S zeroinitializer, align 1
diff --git a/llvm/test/CodeGen/X86/dag-combiner-fma-folding.ll b/llvm/test/CodeGen/X86/dag-combiner-fma-folding.ll
index 3ebbf34dd8367..64d91afb28309 100644
--- a/llvm/test/CodeGen/X86/dag-combiner-fma-folding.ll
+++ b/llvm/test/CodeGen/X86/dag-combiner-fma-folding.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64-- --start-before=x86-isel -mattr=+avx,+fma %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- --start-before=x86-isel -mattr=+avx,+fma %s -o - | FileCheck %s
define double @fma_folding(double %x) {
; CHECK-LABEL: fma_folding:
diff --git a/llvm/test/CodeGen/X86/dag-fmf-cse.ll b/llvm/test/CodeGen/X86/dag-fmf-cse.ll
index cdcc082e72f2b..18b35ad2cb716 100644
--- a/llvm/test/CodeGen/X86/dag-fmf-cse.ll
+++ b/llvm/test/CodeGen/X86/dag-fmf-cse.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=fma | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=fma | FileCheck %s
; If fast-math-flags are propagated correctly, the mul1 expression
; should be recognized as a factor in the last fsub, so we should
diff --git a/llvm/test/CodeGen/X86/dag-merge-fast-accesses.ll b/llvm/test/CodeGen/X86/dag-merge-fast-accesses.ll
index a8081a1651f8f..2a2a06ca488c7 100644
--- a/llvm/test/CodeGen/X86/dag-merge-fast-accesses.ll
+++ b/llvm/test/CodeGen/X86/dag-merge-fast-accesses.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-slow-unaligned-mem-16 | FileCheck %s --check-prefix=FAST
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+slow-unaligned-mem-16 | FileCheck %s --check-prefix=SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-slow-unaligned-mem-16 | FileCheck %s --check-prefix=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+slow-unaligned-mem-16 | FileCheck %s --check-prefix=SLOW
; Verify that the DAGCombiner is creating unaligned 16-byte loads and stores
; if and only if those are fast.
diff --git a/llvm/test/CodeGen/X86/dag-optnone.ll b/llvm/test/CodeGen/X86/dag-optnone.ll
index 022694e1d516d..01ed682c15d4d 100644
--- a/llvm/test/CodeGen/X86/dag-optnone.ll
+++ b/llvm/test/CodeGen/X86/dag-optnone.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-win32 -O0 -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 -O0 -mattr=+avx | FileCheck %s
; Background:
; If fast-isel bails out to normal selection, then the DAG combiner will run,
diff --git a/llvm/test/CodeGen/X86/dag-rauw-cse.ll b/llvm/test/CodeGen/X86/dag-rauw-cse.ll
index 5e6b6cf10e746..625fe81f1b906 100644
--- a/llvm/test/CodeGen/X86/dag-rauw-cse.ll
+++ b/llvm/test/CodeGen/X86/dag-rauw-cse.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; PR3018
define i32 @test(i32 %A) nounwind {
diff --git a/llvm/test/CodeGen/X86/dag-stlf-mismatch.ll b/llvm/test/CodeGen/X86/dag-stlf-mismatch.ll
index 309df51e303d8..e67429e97ed10 100644
--- a/llvm/test/CodeGen/X86/dag-stlf-mismatch.ll
+++ b/llvm/test/CodeGen/X86/dag-stlf-mismatch.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-pc-windows-gnu -mcpu=x86-64-v4 | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-gnu -mcpu=x86-64-v4 | FileCheck %s --check-prefix=AVX512
%struct.Data = type { float }
diff --git a/llvm/test/CodeGen/X86/dag-update-nodetomatch.ll b/llvm/test/CodeGen/X86/dag-update-nodetomatch.ll
index 71ad598abe683..344d4e9ee8f02 100644
--- a/llvm/test/CodeGen/X86/dag-update-nodetomatch.ll
+++ b/llvm/test/CodeGen/X86/dag-update-nodetomatch.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
%struct.i = type { i32, i24 }
%struct.m = type { %struct.i }
diff --git a/llvm/test/CodeGen/X86/dagcombine-and-setcc.ll b/llvm/test/CodeGen/X86/dagcombine-and-setcc.ll
index 842ee55d255aa..7892ee7e149cc 100644
--- a/llvm/test/CodeGen/X86/dagcombine-and-setcc.ll
+++ b/llvm/test/CodeGen/X86/dagcombine-and-setcc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.10.0"
diff --git a/llvm/test/CodeGen/X86/dagcombine-buildvector.ll b/llvm/test/CodeGen/X86/dagcombine-buildvector.ll
index 9ddb7a3d425ec..7d5b7faef55f0 100644
--- a/llvm/test/CodeGen/X86/dagcombine-buildvector.ll
+++ b/llvm/test/CodeGen/X86/dagcombine-buildvector.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mcpu=penryn | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mcpu=penryn | FileCheck %s
; Shows a dag combine bug that will generate an illegal build vector
; with v2i64 build_vector i32, i32.
diff --git a/llvm/test/CodeGen/X86/dagcombine-dead-store.ll b/llvm/test/CodeGen/X86/dagcombine-dead-store.ll
index f509e19bedacf..437fd39576cd9 100644
--- a/llvm/test/CodeGen/X86/dagcombine-dead-store.ll
+++ b/llvm/test/CodeGen/X86/dagcombine-dead-store.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux | FileCheck %s
; Checks that the stores aren't eliminated by the DAG combiner, because the address
; spaces are different. In X86, we're checking this for the non-zero address space :fs.
diff --git a/llvm/test/CodeGen/X86/dagcombine-tokenfactor-limit-crash.ll b/llvm/test/CodeGen/X86/dagcombine-tokenfactor-limit-crash.ll
index fce59ff485efe..7ed99ecf3b2a7 100644
--- a/llvm/test/CodeGen/X86/dagcombine-tokenfactor-limit-crash.ll
+++ b/llvm/test/CodeGen/X86/dagcombine-tokenfactor-limit-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -combiner-tokenfactor-inline-limit=5 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -combiner-tokenfactor-inline-limit=5 -o - | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/dagcombine-unsafe-math.ll b/llvm/test/CodeGen/X86/dagcombine-unsafe-math.ll
index c2b6240c61ad8..dc2a35ee6efb4 100644
--- a/llvm/test/CodeGen/X86/dagcombine-unsafe-math.ll
+++ b/llvm/test/CodeGen/X86/dagcombine-unsafe-math.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck %s
; rdar://13126763
diff --git a/llvm/test/CodeGen/X86/darwin-bzero.ll b/llvm/test/CodeGen/X86/darwin-bzero.ll
index b2c3e7513b446..4e6292da5fe36 100644
--- a/llvm/test/CodeGen/X86/darwin-bzero.ll
+++ b/llvm/test/CodeGen/X86/darwin-bzero.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin10 | FileCheck -check-prefixes=CHECK,BZERO %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck -check-prefixes=CHECK,BZERO %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck -check-prefixes=CHECK,NOBZERO %s
-; RUN: llc < %s -mtriple=x86_64-apple-ios10.0-simulator | FileCheck -check-prefixes=CHECK,NOBZERO %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10 | FileCheck -check-prefixes=CHECK,BZERO %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 | FileCheck -check-prefixes=CHECK,BZERO %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck -check-prefixes=CHECK,NOBZERO %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-ios10.0-simulator | FileCheck -check-prefixes=CHECK,NOBZERO %s
declare void @llvm.memset.p0.i32(ptr nocapture, i8, i32, i1) nounwind
diff --git a/llvm/test/CodeGen/X86/darwin-no-dead-strip.ll b/llvm/test/CodeGen/X86/darwin-no-dead-strip.ll
index a05111967465e..1eb7a7e12ea14 100644
--- a/llvm/test/CodeGen/X86/darwin-no-dead-strip.ll
+++ b/llvm/test/CodeGen/X86/darwin-no-dead-strip.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:32:32"
target triple = "i686-apple-darwin8.7.2"
diff --git a/llvm/test/CodeGen/X86/darwin-preemption.ll b/llvm/test/CodeGen/X86/darwin-preemption.ll
index ff473e536fc5d..9eb6744307eb7 100644
--- a/llvm/test/CodeGen/X86/darwin-preemption.ll
+++ b/llvm/test/CodeGen/X86/darwin-preemption.ll
@@ -1,17 +1,17 @@
-; RUN: llc -mtriple x86_64-apple-darwin \
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-darwin \
; RUN: -relocation-model=static < %s | FileCheck %s
-; RUN: llc -mtriple x86_64-apple-darwin \
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-darwin \
; RUN: -relocation-model=pic < %s | FileCheck %s
-; RUN: llc -mtriple x86_64-apple-darwin \
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-darwin \
; RUN: -relocation-model=dynamic-no-pic < %s | FileCheck %s
; 32 bits
-; RUN: llc -mtriple i386-apple-darwin \
+; RUN: llc -combiner-topological-sorting -mtriple i386-apple-darwin \
; RUN: -relocation-model=static < %s | FileCheck --check-prefix=DARWIN32_S %s
-; RUN: llc -mtriple i386-apple-darwin \
+; RUN: llc -combiner-topological-sorting -mtriple i386-apple-darwin \
; RUN: -relocation-model=pic < %s | FileCheck --check-prefix=DARWIN32 %s
-; RUN: llc -mtriple i386-apple-darwin \
+; RUN: llc -combiner-topological-sorting -mtriple i386-apple-darwin \
; RUN: -relocation-model=dynamic-no-pic < %s | \
; RUN: FileCheck --check-prefix=DARWIN32_DNP %s
diff --git a/llvm/test/CodeGen/X86/darwin-quote.ll b/llvm/test/CodeGen/X86/darwin-quote.ll
index a38b7b1bffe5b..bddc8ec6e8481 100644
--- a/llvm/test/CodeGen/X86/darwin-quote.ll
+++ b/llvm/test/CodeGen/X86/darwin-quote.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin | FileCheck %s
define internal i64 @baz() nounwind {
diff --git a/llvm/test/CodeGen/X86/darwin-tls.ll b/llvm/test/CodeGen/X86/darwin-tls.ll
index 35f1c288813f1..0345de2950280 100644
--- a/llvm/test/CodeGen/X86/darwin-tls.ll
+++ b/llvm/test/CodeGen/X86/darwin-tls.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-apple-darwin | FileCheck %s
@a = thread_local global i32 4, align 4
diff --git a/llvm/test/CodeGen/X86/data-section-prefix.ll b/llvm/test/CodeGen/X86/data-section-prefix.ll
index 36e0527eb3c06..b08c317ac5963 100644
--- a/llvm/test/CodeGen/X86/data-section-prefix.ll
+++ b/llvm/test/CodeGen/X86/data-section-prefix.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple x86_64-linux-gnu -data-sections %s -o - | FileCheck %s --check-prefix=ELF
-; RUN: llc -mtriple x86_64-linux-gnu -unique-section-names=0 -data-sections %s -o - | FileCheck %s --check-prefix=ELF-NOUNIQ
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-linux-gnu -data-sections %s -o - | FileCheck %s --check-prefix=ELF
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-linux-gnu -unique-section-names=0 -data-sections %s -o - | FileCheck %s --check-prefix=ELF-NOUNIQ
-; RUN: llc -mtriple x86_64-windows-msvc -data-sections %s -o - | FileCheck %s --check-prefix=COFF-MSVC
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-windows-msvc -data-sections %s -o - | FileCheck %s --check-prefix=COFF-MSVC
; ELF: .section .data.hot.foo,
; ELF: .section .data.bar,
diff --git a/llvm/test/CodeGen/X86/dbg-baseptr.ll b/llvm/test/CodeGen/X86/dbg-baseptr.ll
index 9194ce9299861..55b481ae6be68 100644
--- a/llvm/test/CodeGen/X86/dbg-baseptr.ll
+++ b/llvm/test/CodeGen/X86/dbg-baseptr.ll
@@ -1,5 +1,5 @@
-; RUN: llc -o - %s | FileCheck %s
-; RUN: llc -filetype=obj -o - %s | llvm-dwarfdump -v - | FileCheck %s --check-prefix=DWARF
+; RUN: llc -combiner-topological-sorting -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -filetype=obj -o - %s | llvm-dwarfdump -v - | FileCheck %s --check-prefix=DWARF
; This test checks that parameters on the stack pointer are correctly
; referenced by debug info.
target triple = "x86_64--"
diff --git a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll
index 18e5490d8dda1..8ac1b69e3194d 100644
--- a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll
+++ b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
-; RUN: opt -strip-debug < %s | llc -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: opt -strip-debug < %s | llc -combiner-topological-sorting -mtriple=x86_64-linux | FileCheck %s
; http://llvm.org/PR19051. Minor code-motion difference with -g.
; Presence of debug info shouldn't affect the codegen. Make sure that
; we generated the same code sequence with and without debug info.
diff --git a/llvm/test/CodeGen/X86/dbg-changes-codegen.ll b/llvm/test/CodeGen/X86/dbg-changes-codegen.ll
index c688895335181..f11d650d85c8a 100644
--- a/llvm/test/CodeGen/X86/dbg-changes-codegen.ll
+++ b/llvm/test/CodeGen/X86/dbg-changes-codegen.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
; The Peephole optimizer should fold the load into the cmp even with debug info.
; CHECK-LABEL: _ZN3Foo3batEv
diff --git a/llvm/test/CodeGen/X86/dbg-combine.ll b/llvm/test/CodeGen/X86/dbg-combine.ll
index 3ff5a266d9834..e63bb59ec977d 100644
--- a/llvm/test/CodeGen/X86/dbg-combine.ll
+++ b/llvm/test/CodeGen/X86/dbg-combine.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-pc-linux -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux -O0 < %s | FileCheck %s
; Make sure that the sequence of debug locations for function foo is correctly
; generated. More specifically, .loc entries for lines 4,5,6,7 must appear in
diff --git a/llvm/test/CodeGen/X86/dbg-distringtype-uint.ll b/llvm/test/CodeGen/X86/dbg-distringtype-uint.ll
index 47b32967e68f7..8664324f2041f 100644
--- a/llvm/test/CodeGen/X86/dbg-distringtype-uint.ll
+++ b/llvm/test/CodeGen/X86/dbg-distringtype-uint.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64 -filetype=obj < %s | llvm-dwarfdump -debug-info - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -filetype=obj < %s | llvm-dwarfdump -debug-info - | FileCheck %s
; CHECK: DW_TAG_subprogram
; CHECK-NOT: DW_TAG
diff --git a/llvm/test/CodeGen/X86/dbg-line-0-no-discriminator.ll b/llvm/test/CodeGen/X86/dbg-line-0-no-discriminator.ll
index 5008148f95e4b..cfe55e1c6a636 100644
--- a/llvm/test/CodeGen/X86/dbg-line-0-no-discriminator.ll
+++ b/llvm/test/CodeGen/X86/dbg-line-0-no-discriminator.ll
@@ -1,4 +1,4 @@
-; RUN: llc -filetype=obj -use-unknown-locations=Enable -mtriple=x86_64-unknown-linux %s -o %t
+; RUN: llc -combiner-topological-sorting -filetype=obj -use-unknown-locations=Enable -mtriple=x86_64-unknown-linux %s -o %t
; RUN: llvm-dwarfdump -debug-line %t | FileCheck %s
define void @_Z3bazv() !dbg !6 {
diff --git a/llvm/test/CodeGen/X86/dbg-list-dependencies.ll b/llvm/test/CodeGen/X86/dbg-list-dependencies.ll
index 56bbc22c1e62e..e9a566be745ec 100644
--- a/llvm/test/CodeGen/X86/dbg-list-dependencies.ll
+++ b/llvm/test/CodeGen/X86/dbg-list-dependencies.ll
@@ -1,4 +1,4 @@
-; RUN: llc --stop-after=finalize-isel < %s
+; RUN: llc -combiner-topological-sorting --stop-after=finalize-isel < %s
; Tests that files with multiple SDNode dependencies are correctly handled by
; SelectionDAG; dependencies that are incorrectly updated for an SDDbgValue
diff --git a/llvm/test/CodeGen/X86/dbg-value-func-arg.ll b/llvm/test/CodeGen/X86/dbg-value-func-arg.ll
index c8ea6ac42e5c7..ca39c8504536b 100644
--- a/llvm/test/CodeGen/X86/dbg-value-func-arg.ll
+++ b/llvm/test/CodeGen/X86/dbg-value-func-arg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple i386-unknown-unknown -O1 -stop-before=finalize-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple i386-unknown-unknown -O1 -stop-before=finalize-isel | FileCheck %s
; Test case is designed to show the differences related to how implicit values
; are handled by SelectionDAGBuilder::EmitFuncArgumentDbgValue.
diff --git a/llvm/test/CodeGen/X86/dbg-value-swift-async-non-entry-block.ll b/llvm/test/CodeGen/X86/dbg-value-swift-async-non-entry-block.ll
index 34cf4616a1c0e..45434f0e51d57 100644
--- a/llvm/test/CodeGen/X86/dbg-value-swift-async-non-entry-block.ll
+++ b/llvm/test/CodeGen/X86/dbg-value-swift-async-non-entry-block.ll
@@ -1,5 +1,5 @@
-; RUN: llc --mtriple="x86_64-" -O0 -fast-isel=false -global-isel=false -stop-after=finalize-isel %s -o - | FileCheck %s --check-prefix=X86
-; RUN: llc --mtriple="x86_64-" -O0 -fast-isel -stop-after=finalize-isel %s -o - | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting --mtriple="x86_64-" -O0 -fast-isel=false -global-isel=false -stop-after=finalize-isel %s -o - | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting --mtriple="x86_64-" -O0 -fast-isel -stop-after=finalize-isel %s -o - | FileCheck %s --check-prefix=X86
; X86-NOT: DBG_VALUE
; X86: DBG_VALUE $r14, $noreg, !{{.*}}, !DIExpression(DW_OP_LLVM_entry_value, 1)
diff --git a/llvm/test/CodeGen/X86/dbg-value-swift-async.ll b/llvm/test/CodeGen/X86/dbg-value-swift-async.ll
index 275940cfaecaf..950c64fc23a76 100644
--- a/llvm/test/CodeGen/X86/dbg-value-swift-async.ll
+++ b/llvm/test/CodeGen/X86/dbg-value-swift-async.ll
@@ -1,5 +1,5 @@
-; RUN: llc --mtriple="x86_64-" -O0 -fast-isel=false -global-isel=false -stop-after=finalize-isel %s -o - | FileCheck %s --check-prefix=X86
-; RUN: llc --mtriple="x86_64-" -O0 -fast-isel -stop-after=finalize-isel %s -o - | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting --mtriple="x86_64-" -O0 -fast-isel=false -global-isel=false -stop-after=finalize-isel %s -o - | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting --mtriple="x86_64-" -O0 -fast-isel -stop-after=finalize-isel %s -o - | FileCheck %s --check-prefix=X86
; X86-NOT: DBG_VALUE
; X86: DBG_VALUE $r14, $noreg, !{{.*}}, !DIExpression(DW_OP_LLVM_entry_value, 1)
diff --git a/llvm/test/CodeGen/X86/debug-loclists-lto.ll b/llvm/test/CodeGen/X86/debug-loclists-lto.ll
index 2bd927fcb66ed..0e9dcdccb9fdb 100644
--- a/llvm/test/CodeGen/X86/debug-loclists-lto.ll
+++ b/llvm/test/CodeGen/X86/debug-loclists-lto.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=x86_64-pc-linux -filetype=asm -function-sections < %s | \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -filetype=asm -function-sections < %s | \
; RUN: FileCheck --check-prefixes=CHECK,DWARF32 --implicit-check-not=loclists_table_base %s
-; RUN: llc -dwarf64 -mtriple=x86_64-pc-linux -filetype=asm -function-sections < %s | \
+; RUN: llc -combiner-topological-sorting -dwarf64 -mtriple=x86_64-pc-linux -filetype=asm -function-sections < %s | \
; RUN: FileCheck --check-prefixes=CHECK,DWARF64 --implicit-check-not=loclists_table_base %s
; CHECK: {{^}}.Lloclists_table_base0:
diff --git a/llvm/test/CodeGen/X86/debug-loclists.ll b/llvm/test/CodeGen/X86/debug-loclists.ll
index 62388a4c91e0c..67b04e0d06130 100644
--- a/llvm/test/CodeGen/X86/debug-loclists.ll
+++ b/llvm/test/CodeGen/X86/debug-loclists.ll
@@ -1,24 +1,24 @@
-; RUN: llc -mtriple=x86_64-pc-linux -filetype=obj -function-sections -o %t -experimental-debug-variable-locations=true < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -filetype=obj -function-sections -o %t -experimental-debug-variable-locations=true < %s
; RUN: llvm-dwarfdump -v -debug-info -debug-loclists %t | \
; RUN: FileCheck %s --check-prefixes=CHECK,DWARF32
-; RUN: llc -mtriple=x86_64-pc-mingw -filetype=obj -function-sections -o %t -experimental-debug-variable-locations=true < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-mingw -filetype=obj -function-sections -o %t -experimental-debug-variable-locations=true < %s
; RUN: llvm-dwarfdump -v -debug-info -debug-loclists %t | \
; RUN: FileCheck %s --check-prefixes=CHECK,DWARF32
-; RUN: llc -dwarf64 -mtriple=x86_64-pc-linux -filetype=obj -function-sections -o %t -experimental-debug-variable-locations=true < %s
+; RUN: llc -combiner-topological-sorting -dwarf64 -mtriple=x86_64-pc-linux -filetype=obj -function-sections -o %t -experimental-debug-variable-locations=true < %s
; RUN: llvm-dwarfdump -v -debug-info -debug-loclists %t | \
; RUN: FileCheck %s --check-prefixes=CHECK,DWARF64
-; RUN: llc -dwarf-version=5 -split-dwarf-file=foo.dwo -mtriple=x86_64-pc-linux -filetype=obj -function-sections -o %t -experimental-debug-variable-locations=true < %s
+; RUN: llc -combiner-topological-sorting -dwarf-version=5 -split-dwarf-file=foo.dwo -mtriple=x86_64-pc-linux -filetype=obj -function-sections -o %t -experimental-debug-variable-locations=true < %s
; RUN: llvm-dwarfdump -v -debug-info -debug-loclists %t | \
; RUN: FileCheck %s --check-prefixes=DWO,DWO32
-; RUN: llc -dwarf-version=5 -split-dwarf-file=foo.dwo -mtriple=x86_64-pc-mingw -filetype=obj -function-sections -o %t -experimental-debug-variable-locations=true < %s
+; RUN: llc -combiner-topological-sorting -dwarf-version=5 -split-dwarf-file=foo.dwo -mtriple=x86_64-pc-mingw -filetype=obj -function-sections -o %t -experimental-debug-variable-locations=true < %s
; RUN: llvm-dwarfdump -v -debug-info -debug-loclists %t | \
; RUN: FileCheck %s --check-prefixes=DWO,DWO32
-; RUN: llc -dwarf64 -dwarf-version=5 -split-dwarf-file=foo.dwo -mtriple=x86_64-pc-linux -filetype=obj -function-sections -o %t -experimental-debug-variable-locations=true < %s
+; RUN: llc -combiner-topological-sorting -dwarf64 -dwarf-version=5 -split-dwarf-file=foo.dwo -mtriple=x86_64-pc-linux -filetype=obj -function-sections -o %t -experimental-debug-variable-locations=true < %s
; RUN: llvm-dwarfdump -v -debug-info -debug-loclists %t | \
; RUN: FileCheck %s --check-prefixes=DWO,DWO64
diff --git a/llvm/test/CodeGen/X86/debug-spilled-snippet.ll b/llvm/test/CodeGen/X86/debug-spilled-snippet.ll
index 96d5d9812325f..7efba5fe52092 100644
--- a/llvm/test/CodeGen/X86/debug-spilled-snippet.ll
+++ b/llvm/test/CodeGen/X86/debug-spilled-snippet.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple i386 %s -stop-after=livedebugvalues -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple i386 %s -stop-after=livedebugvalues -o - | FileCheck %s
; There should be multiple debug values for this variable after regalloc. The
; value has been spilled, but we shouldn't lose track of the location because
diff --git a/llvm/test/CodeGen/X86/debuginfo-locations-dce.ll b/llvm/test/CodeGen/X86/debuginfo-locations-dce.ll
index 6e1884f561806..e58d851c9ff38 100644
--- a/llvm/test/CodeGen/X86/debuginfo-locations-dce.ll
+++ b/llvm/test/CodeGen/X86/debuginfo-locations-dce.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O2 %s -o %t -filetype=obj
+; RUN: llc -combiner-topological-sorting -O2 %s -o %t -filetype=obj
; RUN: llvm-dwarfdump -debug-info %t | FileCheck %s
; Check that Machine CSE correctly handles during the transformation, the
diff --git a/llvm/test/CodeGen/X86/debugloc-argsize.ll b/llvm/test/CodeGen/X86/debugloc-argsize.ll
index f4527c5b786fd..4f5b3a3ea5d3d 100644
--- a/llvm/test/CodeGen/X86/debugloc-argsize.ll
+++ b/llvm/test/CodeGen/X86/debugloc-argsize.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux | FileCheck %s
; CHECK-LABEL: _Z3foov:
; CHECK: .loc 1 4 3 prologue_end
diff --git a/llvm/test/CodeGen/X86/debugloc-no-line-0.ll b/llvm/test/CodeGen/X86/debugloc-no-line-0.ll
index c68dd296a9b1b..048361f12c651 100644
--- a/llvm/test/CodeGen/X86/debugloc-no-line-0.ll
+++ b/llvm/test/CodeGen/X86/debugloc-no-line-0.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mtriple=x86_64-unknown-linux-gnu -stop-before="regallocfast" -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-unknown-linux-gnu -stop-before="regallocfast" -o - %s | FileCheck %s
;
; We check that all the instructions in bb4 now have a debug-location
; annotation, and that the annotation is identical to the one on e.g.,
diff --git a/llvm/test/CodeGen/X86/deopt-bundles.ll b/llvm/test/CodeGen/X86/deopt-bundles.ll
index 8cb69dd72408d..ce8b968b3c89e 100644
--- a/llvm/test/CodeGen/X86/deopt-bundles.ll
+++ b/llvm/test/CodeGen/X86/deopt-bundles.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s | FileCheck %s
-; RUN: llc -O3 < %s | FileCheck %s
-; RUN: llc -O3 -debug-only=stackmaps < %s 2>&1 | FileCheck -check-prefix=STACKMAPS %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -debug-only=stackmaps < %s 2>&1 | FileCheck -check-prefix=STACKMAPS %s
; REQUIRES: asserts
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/deopt-intrinsic.ll b/llvm/test/CodeGen/X86/deopt-intrinsic.ll
index d610cc859f1ce..dc915d95a3372 100644
--- a/llvm/test/CodeGen/X86/deopt-intrinsic.ll
+++ b/llvm/test/CodeGen/X86/deopt-intrinsic.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s | FileCheck %s
-; RUN: llc -debug-only=stackmaps < %s 2>&1 | FileCheck --check-prefix=STACKMAPS %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -debug-only=stackmaps < %s 2>&1 | FileCheck --check-prefix=STACKMAPS %s
; REQUIRES: asserts
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/disable-shrink-store.ll b/llvm/test/CodeGen/X86/disable-shrink-store.ll
index 325c870e4a615..e3747f924424b 100644
--- a/llvm/test/CodeGen/X86/disable-shrink-store.ll
+++ b/llvm/test/CodeGen/X86/disable-shrink-store.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -combiner-shrink-load-replace-store-with-store=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -combiner-shrink-load-replace-store-with-store=false | FileCheck %s
define void @shrink(ptr %ptr) {
; CHECK-LABEL: shrink:
diff --git a/llvm/test/CodeGen/X86/disable-tail-calls.ll b/llvm/test/CodeGen/X86/disable-tail-calls.ll
index 16f838e8fdca8..4f6138e245e19 100644
--- a/llvm/test/CodeGen/X86/disable-tail-calls.ll
+++ b/llvm/test/CodeGen/X86/disable-tail-calls.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=NO-OPTION
-; RUN: llc < %s -mtriple=x86_64-- -disable-tail-calls | FileCheck %s --check-prefix=DISABLE-TRUE
-; RUN: llc < %s -mtriple=x86_64-- -disable-tail-calls=false | FileCheck %s --check-prefix=DISABLE-FALSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=NO-OPTION
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -disable-tail-calls | FileCheck %s --check-prefix=DISABLE-TRUE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -disable-tail-calls=false | FileCheck %s --check-prefix=DISABLE-FALSE
; Check that command line option "-disable-tail-calls" overrides function
; attribute "disable-tail-calls".
diff --git a/llvm/test/CodeGen/X86/discontiguous-loops.ll b/llvm/test/CodeGen/X86/discontiguous-loops.ll
index ec65fe99c74d0..71cae1c050765 100644
--- a/llvm/test/CodeGen/X86/discontiguous-loops.ll
+++ b/llvm/test/CodeGen/X86/discontiguous-loops.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-loop-info -verify-dom-info -mtriple=x86_64-- < %s
+; RUN: llc -combiner-topological-sorting -verify-loop-info -verify-dom-info -mtriple=x86_64-- < %s
; PR5243
@.str96 = external constant [37 x i8], align 8 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/div-rem-simplify.ll b/llvm/test/CodeGen/X86/div-rem-simplify.ll
index af43df0075598..ab311faacb852 100644
--- a/llvm/test/CodeGen/X86/div-rem-simplify.ll
+++ b/llvm/test/CodeGen/X86/div-rem-simplify.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; Div/rem by zero is undef.
diff --git a/llvm/test/CodeGen/X86/div8.ll b/llvm/test/CodeGen/X86/div8.ll
index 44ce72ab8e03e..5dd6b3ff73019 100644
--- a/llvm/test/CodeGen/X86/div8.ll
+++ b/llvm/test/CodeGen/X86/div8.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; ModuleID = '8div.c'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-macosx10.6.6"
diff --git a/llvm/test/CodeGen/X86/divide-windows-itanium.ll b/llvm/test/CodeGen/X86/divide-windows-itanium.ll
index 4a8a9138073af..4ed13c5c21b64 100644
--- a/llvm/test/CodeGen/X86/divide-windows-itanium.ll
+++ b/llvm/test/CodeGen/X86/divide-windows-itanium.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple i686-windows-itanium -filetype asm -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple i686-windows-itanium -filetype asm -o - %s | FileCheck %s
define i64 @f(i64 %i, i64 %j) {
%1 = sdiv i64 %i, %j
diff --git a/llvm/test/CodeGen/X86/divrem-by-select.ll b/llvm/test/CodeGen/X86/divrem-by-select.ll
index f9582bb7343ba..8b77815bc81b8 100644
--- a/llvm/test/CodeGen/X86/divrem-by-select.ll
+++ b/llvm/test/CodeGen/X86/divrem-by-select.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK-X64,CHECK-X64-V3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK-X64,CHECK-X64-V4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK-X64,CHECK-X64-V3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK-X64,CHECK-X64-V4
define <2 x i64> @udiv_identity_const(<2 x i1> %c, <2 x i64> %x) {
; CHECK-X64-V3-LABEL: udiv_identity_const:
diff --git a/llvm/test/CodeGen/X86/divrem.ll b/llvm/test/CodeGen/X86/divrem.ll
index ba777b4954611..0a65fd01dcda6 100644
--- a/llvm/test/CodeGen/X86/divrem.ll
+++ b/llvm/test/CodeGen/X86/divrem.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define void @si64(i64 %x, i64 %y, ptr %p, ptr %q) nounwind {
; X86-LABEL: si64:
diff --git a/llvm/test/CodeGen/X86/divrem8_ext.ll b/llvm/test/CodeGen/X86/divrem8_ext.ll
index bfc982d2def5d..ac8d3d5f1788d 100644
--- a/llvm/test/CodeGen/X86/divrem8_ext.ll
+++ b/llvm/test/CodeGen/X86/divrem8_ext.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define zeroext i8 @test_udivrem_zext_ah(i8 %x, i8 %y) {
; X86-LABEL: test_udivrem_zext_ah:
diff --git a/llvm/test/CodeGen/X86/dllexport-x86_64.ll b/llvm/test/CodeGen/X86/dllexport-x86_64.ll
index b640e630e47e6..b232ff4ea116b 100644
--- a/llvm/test/CodeGen/X86/dllexport-x86_64.ll
+++ b/llvm/test/CodeGen/X86/dllexport-x86_64.ll
@@ -1,8 +1,8 @@
-; RUN: llc -mtriple x86_64-pc-win32 < %s | FileCheck -check-prefix=CHECK -check-prefix=WIN32 %s
-; RUN: llc -mtriple x86_64-pc-uefi < %s | FileCheck -check-prefix=CHECK -check-prefix=WIN32 %s
-; RUN: llc -mtriple x86_64-pc-mingw32 < %s | FileCheck -check-prefix=CHECK -check-prefix=MINGW %s
-; RUN: llc -mtriple x86_64-pc-win32 < %s | FileCheck -check-prefix=NOTEXPORTED %s
-; RUN: llc -mtriple x86_64-pc-mingw32 < %s | FileCheck -check-prefix=NOTEXPORTED %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-win32 < %s | FileCheck -check-prefix=CHECK -check-prefix=WIN32 %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-uefi < %s | FileCheck -check-prefix=CHECK -check-prefix=WIN32 %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-mingw32 < %s | FileCheck -check-prefix=CHECK -check-prefix=MINGW %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-win32 < %s | FileCheck -check-prefix=NOTEXPORTED %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-mingw32 < %s | FileCheck -check-prefix=NOTEXPORTED %s
; CHECK: .text
diff --git a/llvm/test/CodeGen/X86/dllexport.ll b/llvm/test/CodeGen/X86/dllexport.ll
index 53ecb8e7a1b4f..3b93320ef8091 100644
--- a/llvm/test/CodeGen/X86/dllexport.ll
+++ b/llvm/test/CodeGen/X86/dllexport.ll
@@ -1,14 +1,14 @@
-; RUN: llc -mtriple i386-pc-win32 < %s \
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-win32 < %s \
; RUN: | FileCheck -check-prefix CHECK -check-prefix CHECK-CL %s
-; RUN: llc -mtriple i386-pc-mingw32 < %s \
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-mingw32 < %s \
; RUN: | FileCheck -check-prefix CHECK -check-prefix CHECK-GCC %s
-; RUN: llc -mtriple i686-pc-cygwin %s -o - \
+; RUN: llc -combiner-topological-sorting -mtriple i686-pc-cygwin %s -o - \
; RUN: | FileCheck -check-prefix CHECK -check-prefix CHECK-GCC %s
-; RUN: llc -mtriple i386-pc-win32 < %s \
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-win32 < %s \
; RUN: | FileCheck -check-prefix NOTEXPORTED %s
-; RUN: llc -mtriple i386-pc-mingw32 < %s \
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-mingw32 < %s \
; RUN: | FileCheck -check-prefix NOTEXPORTED %s
-; RUN: llc -mtriple i686-pc-cygwin %s -o - \
+; RUN: llc -combiner-topological-sorting -mtriple i686-pc-cygwin %s -o - \
; RUN: | FileCheck -check-prefix NOTEXPORTED %s
; CHECK: .text
diff --git a/llvm/test/CodeGen/X86/dllimport-x86_64.ll b/llvm/test/CodeGen/X86/dllimport-x86_64.ll
index 1a66c9decf287..64b9c92bfdfcb 100644
--- a/llvm/test/CodeGen/X86/dllimport-x86_64.ll
+++ b/llvm/test/CodeGen/X86/dllimport-x86_64.ll
@@ -1,8 +1,8 @@
-; RUN: llc -mtriple x86_64-pc-win32 < %s | FileCheck %s
-; RUN: llc -mtriple x86_64-pc-mingw32 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-win32 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-mingw32 < %s | FileCheck %s
;
-; RUN: llc -mtriple x86_64-pc-mingw32 -O0 < %s | FileCheck %s
-; RUN: llc -mtriple x86_64-pc-windows-msvc -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-mingw32 -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-windows-msvc -O0 < %s | FileCheck %s
; PR6275
;
; RUN: opt -mtriple x86_64-pc-win32 -O3 -S < %s | FileCheck %s -check-prefix=OPT
diff --git a/llvm/test/CodeGen/X86/dllimport.ll b/llvm/test/CodeGen/X86/dllimport.ll
index 2fa1515ad03a9..aa9438e133e52 100644
--- a/llvm/test/CodeGen/X86/dllimport.ll
+++ b/llvm/test/CodeGen/X86/dllimport.ll
@@ -1,8 +1,8 @@
-; RUN: llc -mtriple i386-pc-win32 < %s | FileCheck %s
-; RUN: llc -mtriple i386-pc-mingw32 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-win32 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-mingw32 < %s | FileCheck %s
;
-; RUN: llc -mtriple i386-pc-mingw32 -O0 < %s | FileCheck %s
-; RUN: llc -mtriple i386-pc-windows-msvc -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-mingw32 -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-windows-msvc -O0 < %s | FileCheck %s
; PR6275
;
; RUN: opt -mtriple i386-pc-win32 -O3 -S < %s | FileCheck %s -check-prefix=OPT
diff --git a/llvm/test/CodeGen/X86/dollar-name-asm.ll b/llvm/test/CodeGen/X86/dollar-name-asm.ll
index 6e0c66ef3ccc7..db194bc0b0e2f 100644
--- a/llvm/test/CodeGen/X86/dollar-name-asm.ll
+++ b/llvm/test/CodeGen/X86/dollar-name-asm.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64 | FileCheck %s --check-prefix=ATT
-; RUN: llc < %s -mtriple=x86_64 -output-asm-variant=1 | FileCheck %s --check-prefix=INTEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 | FileCheck %s --check-prefix=ATT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -output-asm-variant=1 | FileCheck %s --check-prefix=INTEL
module asm "mov ($foo), %eax"
diff --git a/llvm/test/CodeGen/X86/dollar-name.ll b/llvm/test/CodeGen/X86/dollar-name.ll
index b997b5107f01a..149a3d31cde40 100644
--- a/llvm/test/CodeGen/X86/dollar-name.ll
+++ b/llvm/test/CodeGen/X86/dollar-name.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
;; See also dollar-name-asm.ll for module asm tests, which update_llc_test_checks.py doesn't support.
-; RUN: llc < %s -mtriple=i686 -relocation-model=static | FileCheck %s --check-prefix=STATIC
-; RUN: llc < %s -mtriple=x86_64 -relocation-model=pic | FileCheck %s --check-prefix=PIC
-; RUN: llc < %s -mtriple=x86_64 -relocation-model=pic -output-asm-variant=1 | FileCheck %s --check-prefix=INTEL-PIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -relocation-model=static | FileCheck %s --check-prefix=STATIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -relocation-model=pic | FileCheck %s --check-prefix=PIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -relocation-model=pic -output-asm-variant=1 | FileCheck %s --check-prefix=INTEL-PIC
@"$arr" = global [2 x i32] zeroinitializer
@"$arr_h" = hidden global [2 x i32] zeroinitializer
diff --git a/llvm/test/CodeGen/X86/domain-reassignment-implicit-def.ll b/llvm/test/CodeGen/X86/domain-reassignment-implicit-def.ll
index d348a135201d8..096b0f0eae5ce 100644
--- a/llvm/test/CodeGen/X86/domain-reassignment-implicit-def.ll
+++ b/llvm/test/CodeGen/X86/domain-reassignment-implicit-def.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
; Check that the X86 Domain Reassignment pass doesn't drop IMPLICIT_DEF nodes,
; which would later cause crashes (e.g. in LiveVariables) - see PR37430
diff --git a/llvm/test/CodeGen/X86/domain-reassignment-test.ll b/llvm/test/CodeGen/X86/domain-reassignment-test.ll
index 77c1ef256cf09..7f28066a35d39 100644
--- a/llvm/test/CodeGen/X86/domain-reassignment-test.ll
+++ b/llvm/test/CodeGen/X86/domain-reassignment-test.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
-; RUN: llc -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | llvm-mc -triple=x86_64-unknown-linux-gnu
+; RUN: llc -combiner-topological-sorting -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=skylake-avx512 -mtriple=x86_64-unknown-linux-gnu %s -o - | llvm-mc -triple=x86_64-unknown-linux-gnu
; Check that the X86 domain reassignment pass doesn't introduce an illegal
; test instruction. See PR37396
diff --git a/llvm/test/CodeGen/X86/dropped_constructor.ll b/llvm/test/CodeGen/X86/dropped_constructor.ll
index b1a8211ec1913..a3a05351e57cd 100644
--- a/llvm/test/CodeGen/X86/dropped_constructor.ll
+++ b/llvm/test/CodeGen/X86/dropped_constructor.ll
@@ -1,7 +1,7 @@
; Test to ensure that a global value that was dropped to a declaration
; (e.g. ThinLTO will drop non-prevailing weak to declarations) does not
; provoke creation of a comdat when it had an initializer.
-; RUN: llc -mtriple x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-linux-gnu < %s | FileCheck %s
; CHECK-NOT: comdat
; ModuleID = 'dropped_constructor.o'
diff --git a/llvm/test/CodeGen/X86/dso_local_equivalent.ll b/llvm/test/CodeGen/X86/dso_local_equivalent.ll
index c609042fad030..4dd274e775cf4 100644
--- a/llvm/test/CodeGen/X86/dso_local_equivalent.ll
+++ b/llvm/test/CodeGen/X86/dso_local_equivalent.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=x86_64-linux-gnu -relocation-model=pic -data-sections -o - %s --asm-verbose=0 | FileCheck %s -check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -relocation-model=pic -data-sections -o - %s --asm-verbose=0 | FileCheck %s -check-prefixes=CHECK
; Just ensure that we can write to an object file without error.
-; RUN: llc -filetype=obj -mtriple=x86_64-linux-gnu -relocation-model=pic -data-sections -o /dev/null %s
+; RUN: llc -combiner-topological-sorting -filetype=obj -mtriple=x86_64-linux-gnu -relocation-model=pic -data-sections -o /dev/null %s
declare void @extern_func()
diff --git a/llvm/test/CodeGen/X86/dso_local_equivalent_errors.ll b/llvm/test/CodeGen/X86/dso_local_equivalent_errors.ll
index c2b7602e248cd..cd5c1a4acea52 100644
--- a/llvm/test/CodeGen/X86/dso_local_equivalent_errors.ll
+++ b/llvm/test/CodeGen/X86/dso_local_equivalent_errors.ll
@@ -1,6 +1,6 @@
; RUN: split-file %s %t
-; RUN: not llc -mtriple=x86_64-linux-gnu -o - %t/undefined_func.ll 2>&1 | FileCheck %s -check-prefix=UNDEFINED
-; RUN: not llc -mtriple=x86_64-linux-gnu -o - %t/invalid_arg.ll 2>&1 | FileCheck %s -check-prefix=INVALID
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -o - %t/undefined_func.ll 2>&1 | FileCheck %s -check-prefix=UNDEFINED
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -o - %t/invalid_arg.ll 2>&1 | FileCheck %s -check-prefix=INVALID
;--- undefined_func.ll
; UNDEFINED: error: unknown function 'undefined_func' referenced by dso_local_equivalent
diff --git a/llvm/test/CodeGen/X86/dtor-priority-coff.ll b/llvm/test/CodeGen/X86/dtor-priority-coff.ll
index 8a7b0379d2373..eca3d031ee23c 100644
--- a/llvm/test/CodeGen/X86/dtor-priority-coff.ll
+++ b/llvm/test/CodeGen/X86/dtor-priority-coff.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Check that we come up with appropriate section names that link.exe sorts
; well.
diff --git a/llvm/test/CodeGen/X86/dup-cost.ll b/llvm/test/CodeGen/X86/dup-cost.ll
index ec9d36aa2a11b..df5f87c2d8862 100644
--- a/llvm/test/CodeGen/X86/dup-cost.ll
+++ b/llvm/test/CodeGen/X86/dup-cost.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; Cold function, %dup should not be duplicated into predecessors.
define i32 @cold(i32 %a, ptr %p, ptr %q) !prof !21 {
diff --git a/llvm/test/CodeGen/X86/dwarf-aranges-available-externally.ll b/llvm/test/CodeGen/X86/dwarf-aranges-available-externally.ll
index 839f462dbdc81..df6e31526e798 100644
--- a/llvm/test/CodeGen/X86/dwarf-aranges-available-externally.ll
+++ b/llvm/test/CodeGen/X86/dwarf-aranges-available-externally.ll
@@ -21,7 +21,7 @@
; $ clang -cc1 -triple=x86_64-unknown-linux-gnu -debug-info-kind=standalone \
; -mllvm -generate-arange-section -std=c++17 foo.cpp
-; RUN: llc --generate-arange-section < %s
+; RUN: llc -combiner-topological-sorting --generate-arange-section < %s
; ModuleID = 'reduced2.cpp'
source_filename = "reduced2.cpp"
diff --git a/llvm/test/CodeGen/X86/dwarf-aranges-zero-size.ll b/llvm/test/CodeGen/X86/dwarf-aranges-zero-size.ll
index 022f6e6faa10d..a3f32d04e4245 100644
--- a/llvm/test/CodeGen/X86/dwarf-aranges-zero-size.ll
+++ b/llvm/test/CodeGen/X86/dwarf-aranges-zero-size.ll
@@ -8,7 +8,7 @@
;
; $ rustc --crate-type=lib --target=x86_64-unknown-linux-gnu --emit=llvm-ir -g dwarf-aranges-zero-size.rs
-; RUN: llc --generate-arange-section < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting --generate-arange-section < %s | FileCheck %s
; CHECK: .section .debug_aranges
; CHECK: .quad _ZN23dwarf_aranges_zero_size7EXAMPLE17h8ab19f2b0c3b238dE
; CHECK-NEXT: .quad 1
diff --git a/llvm/test/CodeGen/X86/dwarf-comp-dir.ll b/llvm/test/CodeGen/X86/dwarf-comp-dir.ll
index f308b890ed333..41090d67dc9df 100644
--- a/llvm/test/CodeGen/X86/dwarf-comp-dir.ll
+++ b/llvm/test/CodeGen/X86/dwarf-comp-dir.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o %t -filetype=obj
+; RUN: llc -combiner-topological-sorting %s -o %t -filetype=obj
; RUN: llvm-dwarfdump -debug-line %t | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/dwarf-headers.ll b/llvm/test/CodeGen/X86/dwarf-headers.ll
index 2d7619512e981..0fae6676500f5 100644
--- a/llvm/test/CodeGen/X86/dwarf-headers.ll
+++ b/llvm/test/CodeGen/X86/dwarf-headers.ll
@@ -1,18 +1,18 @@
-; RUN: llc -dwarf-version=4 -generate-type-units \
+; RUN: llc -combiner-topological-sorting -dwarf-version=4 -generate-type-units \
; RUN: -filetype=obj -O0 -mtriple=x86_64-unknown-linux-gnu < %s \
; RUN: | llvm-dwarfdump -v - | FileCheck %s --check-prefix=SINGLE-4
-; RUN: llc -split-dwarf-file=foo.dwo -split-dwarf-output=%t.dwo \
+; RUN: llc -combiner-topological-sorting -split-dwarf-file=foo.dwo -split-dwarf-output=%t.dwo \
; RUN: -dwarf-version=4 -generate-type-units \
; RUN: -filetype=obj -O0 -mtriple=x86_64-unknown-linux-gnu < %s \
; RUN: | llvm-dwarfdump -v - | FileCheck %s --check-prefix=O-4
; RUN: llvm-dwarfdump -v %t.dwo | FileCheck %s --check-prefix=DWO-4
-; RUN: llc -dwarf-version=5 -generate-type-units \
+; RUN: llc -combiner-topological-sorting -dwarf-version=5 -generate-type-units \
; RUN: -filetype=obj -O0 -mtriple=x86_64-unknown-linux-gnu < %s \
; RUN: | llvm-dwarfdump -v - | FileCheck %s --check-prefix=SINGLE-5
-; RUN: llc -split-dwarf-file=foo.dwo \
+; RUN: llc -combiner-topological-sorting -split-dwarf-file=foo.dwo \
; RUN: -dwarf-version=5 -generate-type-units \
; RUN: -filetype=obj -O0 -mtriple=x86_64-unknown-linux-gnu < %s \
; RUN: | llvm-dwarfdump -v - | FileCheck %s --check-prefix=O-5
diff --git a/llvm/test/CodeGen/X86/dwarf-split-line-1.ll b/llvm/test/CodeGen/X86/dwarf-split-line-1.ll
index d57c0b6d8a4d3..ca649b0d169a3 100644
--- a/llvm/test/CodeGen/X86/dwarf-split-line-1.ll
+++ b/llvm/test/CodeGen/X86/dwarf-split-line-1.ll
@@ -1,7 +1,7 @@
; Verify that split type units with no source locations don't have a
; DW_AT_stmt_list attribute, and the .debug_line.dwo section is suppressed.
-; RUN: llc -split-dwarf-file=foo.dwo -split-dwarf-output=%t.dwo \
+; RUN: llc -combiner-topological-sorting -split-dwarf-file=foo.dwo -split-dwarf-output=%t.dwo \
; RUN: -dwarf-version=5 -generate-type-units \
; RUN: -filetype=obj -O0 -mtriple=x86_64-unknown-linux-gnu < %s
; RUN: llvm-dwarfdump -v %t.dwo | FileCheck %s
diff --git a/llvm/test/CodeGen/X86/dwarf-split-line-2.ll b/llvm/test/CodeGen/X86/dwarf-split-line-2.ll
index d8a2d9b4bc75c..4869833e96561 100644
--- a/llvm/test/CodeGen/X86/dwarf-split-line-2.ll
+++ b/llvm/test/CodeGen/X86/dwarf-split-line-2.ll
@@ -2,7 +2,7 @@
; one without, the one without locations doesn't have a DW_AT_stmt_list
; attribute, but the other one does and the .debug_line.dwo section is present.
-; RUN: llc -split-dwarf-file=foo.dwo -split-dwarf-output=%t.dwo \
+; RUN: llc -combiner-topological-sorting -split-dwarf-file=foo.dwo -split-dwarf-output=%t.dwo \
; RUN: -dwarf-version=5 -generate-type-units \
; RUN: -filetype=obj -O0 -mtriple=x86_64-unknown-linux-gnu < %s
; RUN: llvm-dwarfdump -v %t.dwo | FileCheck %s
diff --git a/llvm/test/CodeGen/X86/dwo-stats.ll b/llvm/test/CodeGen/X86/dwo-stats.ll
index fccfd55029c8b..9d5e387ca386a 100644
--- a/llvm/test/CodeGen/X86/dwo-stats.ll
+++ b/llvm/test/CodeGen/X86/dwo-stats.ll
@@ -1,6 +1,6 @@
; REQUIRES: asserts
-; RUN: llc %s -mtriple=x86_64-linux --split-dwarf-file=%t.dwo --split-dwarf-output=%t.dwo --filetype=obj -o /dev/null -stats 2>&1 | FileCheck %s --check-prefixes=SPLIT,CHECK
-; RUN: llc %s -mtriple=x86_64-linux --filetype=obj -o /dev/null -stats 2>&1 | FileCheck %s --check-prefixes=NOTSPLIT,CHECK
+; RUN: llc -combiner-topological-sorting %s -mtriple=x86_64-linux --split-dwarf-file=%t.dwo --split-dwarf-output=%t.dwo --filetype=obj -o /dev/null -stats 2>&1 | FileCheck %s --check-prefixes=SPLIT,CHECK
+; RUN: llc -combiner-topological-sorting %s -mtriple=x86_64-linux --filetype=obj -o /dev/null -stats 2>&1 | FileCheck %s --check-prefixes=NOTSPLIT,CHECK
; NOTSPLIT-NOT: {{[0-9]+}} elf-object-writer - Total size of sections written to .dwo file
; CHECK-DAG: {{[0-9]+}} elf-object-writer - Total size of debug info sections
diff --git a/llvm/test/CodeGen/X86/dyn-stackalloc.ll b/llvm/test/CodeGen/X86/dyn-stackalloc.ll
index ddf542ca0aa47..be02ea760cf6e 100644
--- a/llvm/test/CodeGen/X86/dyn-stackalloc.ll
+++ b/llvm/test/CodeGen/X86/dyn-stackalloc.ll
@@ -1,8 +1,8 @@
-; RUN: llc < %s -mtriple=i686-linux | FileCheck %s -check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux | FileCheck %s -check-prefix=X32
; X32-NOT: {{$429496728|-7}}
; X32: {{$4294967280|-16}}
; X32-NOT: {{$429496728|-7}}
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
; X64: -16
define void @t() nounwind {
diff --git a/llvm/test/CodeGen/X86/dyn_alloca_aligned.ll b/llvm/test/CodeGen/X86/dyn_alloca_aligned.ll
index 24ae3809a8267..732a355d798f3 100644
--- a/llvm/test/CodeGen/X86/dyn_alloca_aligned.ll
+++ b/llvm/test/CodeGen/X86/dyn_alloca_aligned.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
define i32 @A(i32 %Size) {
; CHECK: subq %rcx, %rax
; CHECK: andq $-128, %rax
diff --git a/llvm/test/CodeGen/X86/dynamic-alloca-in-entry.ll b/llvm/test/CodeGen/X86/dynamic-alloca-in-entry.ll
index 2b5721d7fcf1b..98e606bebec82 100644
--- a/llvm/test/CodeGen/X86/dynamic-alloca-in-entry.ll
+++ b/llvm/test/CodeGen/X86/dynamic-alloca-in-entry.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck %s
; Allocas with unknown size in the entry block are dynamic.
define void @foo(i32 %n) {
diff --git a/llvm/test/CodeGen/X86/dynamic-alloca-lifetime.ll b/llvm/test/CodeGen/X86/dynamic-alloca-lifetime.ll
index abd1d4e7d350c..839719c9ed13e 100644
--- a/llvm/test/CodeGen/X86/dynamic-alloca-lifetime.ll
+++ b/llvm/test/CodeGen/X86/dynamic-alloca-lifetime.ll
@@ -1,4 +1,4 @@
-; RUN: llc -no-stack-coloring=false < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -no-stack-coloring=false < %s | FileCheck %s
; This test crashed in PEI because the stack protector was dead.
; This was due to it being colored, which was in turn due to incorrect
diff --git a/llvm/test/CodeGen/X86/dynamic-allocas-VLAs-stack-align.ll b/llvm/test/CodeGen/X86/dynamic-allocas-VLAs-stack-align.ll
index 70ee7e5e3a6d5..690fca7f59457 100644
--- a/llvm/test/CodeGen/X86/dynamic-allocas-VLAs-stack-align.ll
+++ b/llvm/test/CodeGen/X86/dynamic-allocas-VLAs-stack-align.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -stackrealign -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -stack-symbol-ordering=0 -mcpu=generic -stackrealign -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s
; rdar://11496434
declare void @t1_helper(ptr)
declare void @t3_helper(ptr, ptr)
diff --git a/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll b/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll
index 876dac59eb848..c5c65d79dcc0a 100644
--- a/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll
+++ b/llvm/test/CodeGen/X86/dynamic-allocas-VLAs.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -stack-symbol-ordering=0 -mcpu=generic -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -stack-symbol-ordering=0 -mcpu=generic -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s
; rdar://11496434
; no VLAs or dynamic alignment
diff --git a/llvm/test/CodeGen/X86/dynamic-regmask-preserve-all.ll b/llvm/test/CodeGen/X86/dynamic-regmask-preserve-all.ll
index f92e22d14e22b..13f3ba55bad22 100644
--- a/llvm/test/CodeGen/X86/dynamic-regmask-preserve-all.ll
+++ b/llvm/test/CodeGen/X86/dynamic-regmask-preserve-all.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin -stop-after finalize-isel <%s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -stop-after finalize-isel <%s | FileCheck %s
; Check that the callee excludes the return register (%rax) from the list of
; callee-saved-registers.
diff --git a/llvm/test/CodeGen/X86/dynamic-regmask-preserve-most.ll b/llvm/test/CodeGen/X86/dynamic-regmask-preserve-most.ll
index 75231696ede12..d0bdb0b5ea022 100644
--- a/llvm/test/CodeGen/X86/dynamic-regmask-preserve-most.ll
+++ b/llvm/test/CodeGen/X86/dynamic-regmask-preserve-most.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin -stop-after finalize-isel <%s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -stop-after finalize-isel <%s | FileCheck %s
; Check that the callee excludes the return register (%rax) from the list of
; callee-saved-registers.
diff --git a/llvm/test/CodeGen/X86/dynamic-regmask-preserve-none.ll b/llvm/test/CodeGen/X86/dynamic-regmask-preserve-none.ll
index 281bd98f615f2..238cdec37e997 100644
--- a/llvm/test/CodeGen/X86/dynamic-regmask-preserve-none.ll
+++ b/llvm/test/CodeGen/X86/dynamic-regmask-preserve-none.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin -stop-after finalize-isel <%s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -stop-after finalize-isel <%s | FileCheck %s
; Check that the callee doesn't have calleeSavedRegisters.
define preserve_nonecc i64 @callee1(i64 %a0, i64 %b0, i64 %c0, i64 %d0, i64 %e0) nounwind {
diff --git a/llvm/test/CodeGen/X86/dynamic-regmask.ll b/llvm/test/CodeGen/X86/dynamic-regmask.ll
index dae96f8e42516..9f7d491e007b2 100644
--- a/llvm/test/CodeGen/X86/dynamic-regmask.ll
+++ b/llvm/test/CodeGen/X86/dynamic-regmask.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=x86_64-pc-win32 -stop-after machine-sink %s -o %t.mir
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-win32 -stop-after machine-sink %s -o %t.mir
; RUN: FileCheck %s < %t.mir
-; RUN: llc %t.mir -mtriple=x86_64-pc-win32 -run-pass machine-sink
+; RUN: llc -combiner-topological-sorting %t.mir -mtriple=x86_64-pc-win32 -run-pass machine-sink
; Check that callee saved registers are printed in a format that can then be parsed.
declare x86_regcallcc i32 @callee(i32 %a0, i32 %b0, i32 %c0, i32 %d0, i32 %e0)
diff --git a/llvm/test/CodeGen/X86/early-cfi-sections.ll b/llvm/test/CodeGen/X86/early-cfi-sections.ll
index 8ab0340cadded..870bbb7d72e34 100644
--- a/llvm/test/CodeGen/X86/early-cfi-sections.ll
+++ b/llvm/test/CodeGen/X86/early-cfi-sections.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; CHECK-NOT: .cfi_startproc
; CHECK: .cfi_sections .debug_frame
; CHECK: .cfi_startproc
diff --git a/llvm/test/CodeGen/X86/early-ifcvt-crash.ll b/llvm/test/CodeGen/X86/early-ifcvt-crash.ll
index 28523c4a9d890..3bb71aedb06e8 100644
--- a/llvm/test/CodeGen/X86/early-ifcvt-crash.ll
+++ b/llvm/test/CodeGen/X86/early-ifcvt-crash.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -x86-early-ifcvt -verify-machineinstrs
-; RUN: llc < %s -x86-early-ifcvt -stress-early-ifcvt -verify-machineinstrs
+; RUN: llc -combiner-topological-sorting < %s -x86-early-ifcvt -verify-machineinstrs
+; RUN: llc -combiner-topological-sorting < %s -x86-early-ifcvt -stress-early-ifcvt -verify-machineinstrs
; CPU without a scheduling model:
-; RUN: llc < %s -x86-early-ifcvt -mcpu=k8 -verify-machineinstrs
+; RUN: llc -combiner-topological-sorting < %s -x86-early-ifcvt -mcpu=k8 -verify-machineinstrs
;
; Run these tests with and without -stress-early-ifcvt to exercise heuristics.
;
diff --git a/llvm/test/CodeGen/X86/early-ifcvt-remarks.ll b/llvm/test/CodeGen/X86/early-ifcvt-remarks.ll
index 054485a358066..2c65fff2642e3 100644
--- a/llvm/test/CodeGen/X86/early-ifcvt-remarks.ll
+++ b/llvm/test/CodeGen/X86/early-ifcvt-remarks.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc %s -x86-early-ifcvt -pass-remarks='early-ifcvt' -pass-remarks-missed='early-ifcvt' -mcpu=k8 -o - 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -x86-early-ifcvt -pass-remarks='early-ifcvt' -pass-remarks-missed='early-ifcvt' -mcpu=k8 -o - 2>&1 | FileCheck %s
target triple = "x86_64-none-none"
; CHECK: remark: <unknown>:0:0: performing if-conversion on branch:
diff --git a/llvm/test/CodeGen/X86/early-ifcvt.ll b/llvm/test/CodeGen/X86/early-ifcvt.ll
index d50f7e9e392a8..f928c9ef80d86 100644
--- a/llvm/test/CodeGen/X86/early-ifcvt.ll
+++ b/llvm/test/CodeGen/X86/early-ifcvt.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -x86-early-ifcvt -stress-early-ifcvt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -x86-early-ifcvt -stress-early-ifcvt | FileCheck %s
target triple = "x86_64-apple-macosx10.8.0"
; CHECK: mm2
diff --git a/llvm/test/CodeGen/X86/eh-frame-unreachable.ll b/llvm/test/CodeGen/X86/eh-frame-unreachable.ll
index 4558c7785ca68..8b3368fbc3051 100644
--- a/llvm/test/CodeGen/X86/eh-frame-unreachable.ll
+++ b/llvm/test/CodeGen/X86/eh-frame-unreachable.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; Test that we don't emit a row that extends beyond the FDE's range_size.
;
; CHECK: movq %rsp, %rbp
diff --git a/llvm/test/CodeGen/X86/eh-label.ll b/llvm/test/CodeGen/X86/eh-label.ll
index 78611000e18dd..d91e58f9123d9 100644
--- a/llvm/test/CodeGen/X86/eh-label.ll
+++ b/llvm/test/CodeGen/X86/eh-label.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s
; Test that we don't crashe if the .Lfunc_end0 name is taken.
declare void @g()
diff --git a/llvm/test/CodeGen/X86/eh-nolandingpads.ll b/llvm/test/CodeGen/X86/eh-nolandingpads.ll
index a3f71ca33cf0e..9260755a99ce0 100644
--- a/llvm/test/CodeGen/X86/eh-nolandingpads.ll
+++ b/llvm/test/CodeGen/X86/eh-nolandingpads.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s
; Test that we emit functions with explicitly specified personality,
; even if no landing pads are left.
diff --git a/llvm/test/CodeGen/X86/eh-null-personality.ll b/llvm/test/CodeGen/X86/eh-null-personality.ll
index 8025d93d59641..1a350417142a3 100644
--- a/llvm/test/CodeGen/X86/eh-null-personality.ll
+++ b/llvm/test/CodeGen/X86/eh-null-personality.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
; We should treat non-Function personalities as the unknown personality, which
; is usually Itanium.
diff --git a/llvm/test/CodeGen/X86/eh-unknown.ll b/llvm/test/CodeGen/X86/eh-unknown.ll
index d87655a756409..86573bb5eb45d 100644
--- a/llvm/test/CodeGen/X86/eh-unknown.ll
+++ b/llvm/test/CodeGen/X86/eh-unknown.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc < %s | FileCheck %s
; An unknown personality forces us to emit an Itanium LSDA. Make sure that the
; Itanium call site table actually tells the personality to keep unwinding,
diff --git a/llvm/test/CodeGen/X86/eh_frame.ll b/llvm/test/CodeGen/X86/eh_frame.ll
index adb337170d3af..01f0bcd6363c6 100644
--- a/llvm/test/CodeGen/X86/eh_frame.ll
+++ b/llvm/test/CodeGen/X86/eh_frame.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu | FileCheck -check-prefix=STATIC %s
-; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu -relocation-model=pic | FileCheck -check-prefix=PIC %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-unknown-linux-gnu | FileCheck -check-prefix=STATIC %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-unknown-linux-gnu -relocation-model=pic | FileCheck -check-prefix=PIC %s
@__FRAME_END__ = constant [1 x i32] zeroinitializer, section ".eh_frame"
diff --git a/llvm/test/CodeGen/X86/ehcontguard.ll b/llvm/test/CodeGen/X86/ehcontguard.ll
index e868209babce6..ff5c107e43cb9 100644
--- a/llvm/test/CodeGen/X86/ehcontguard.ll
+++ b/llvm/test/CodeGen/X86/ehcontguard.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s
; EHCont Guard is currently only available on Windows
; CHECK: @feat.00 = 16384
diff --git a/llvm/test/CodeGen/X86/eip-addressing-i386.ll b/llvm/test/CodeGen/X86/eip-addressing-i386.ll
index b686be5727a15..1ec785170b1bf 100644
--- a/llvm/test/CodeGen/X86/eip-addressing-i386.ll
+++ b/llvm/test/CodeGen/X86/eip-addressing-i386.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple i386-apple-- -o /dev/null < %s 2>&1| FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple i386-apple-- -o /dev/null < %s 2>&1| FileCheck %s
; CHECK: <inline asm>:1:13: error: IP-relative addressing requires 64-bit mode
; CHECK-NEXT: jmpl *_foo(%eip)
diff --git a/llvm/test/CodeGen/X86/element-wise-atomic-memory-intrinsics.ll b/llvm/test/CodeGen/X86/element-wise-atomic-memory-intrinsics.ll
index dfbd7278ce432..11cd8781629a8 100644
--- a/llvm/test/CodeGen/X86/element-wise-atomic-memory-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/element-wise-atomic-memory-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define ptr @test_memcpy1_generic(ptr %P, ptr %Q) {
; CHECK-LABEL: test_memcpy1_generic:
diff --git a/llvm/test/CodeGen/X86/elf-associated-discarded.ll b/llvm/test/CodeGen/X86/elf-associated-discarded.ll
index c782996126a90..af31ceb0bd40d 100644
--- a/llvm/test/CodeGen/X86/elf-associated-discarded.ll
+++ b/llvm/test/CodeGen/X86/elf-associated-discarded.ll
@@ -1,7 +1,7 @@
;; Test that we keep SHF_LINK_ORDER but reset sh_link to 0 if the associated
;; symbol is not defined.
-; RUN: llc -mtriple=x86_64 -data-sections=1 < %s | FileCheck %s
-; RUN: llc -filetype=obj -mtriple=x86_64 -data-sections=1 < %s | llvm-readelf -S - | FileCheck --check-prefix=SEC %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -data-sections=1 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -filetype=obj -mtriple=x86_64 -data-sections=1 < %s | llvm-readelf -S - | FileCheck --check-prefix=SEC %s
;; FIXME The assembly output cannot be assembled because foo is not defined.
;; This is difficult to fix because we allow loops (see elf-associated.ll
diff --git a/llvm/test/CodeGen/X86/elf-associated.ll b/llvm/test/CodeGen/X86/elf-associated.ll
index 33e9e43bf8998..a3d5a4a9abff2 100644
--- a/llvm/test/CodeGen/X86/elf-associated.ll
+++ b/llvm/test/CodeGen/X86/elf-associated.ll
@@ -1,5 +1,5 @@
-; RUN: llc -data-sections=1 -mtriple x86_64-pc-linux-gnu < %s | FileCheck %s
-; RUN: llc -data-sections=0 -mtriple x86_64-pc-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -data-sections=1 -mtriple x86_64-pc-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -data-sections=0 -mtriple x86_64-pc-linux-gnu < %s | FileCheck %s
@a = global i32 1
@b = global i32 2, !associated !0
diff --git a/llvm/test/CodeGen/X86/elf-comdat.ll b/llvm/test/CodeGen/X86/elf-comdat.ll
index 10770dd07409d..14aaca47a2d17 100644
--- a/llvm/test/CodeGen/X86/elf-comdat.ll
+++ b/llvm/test/CodeGen/X86/elf-comdat.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-pc-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux-gnu < %s | FileCheck %s
$f = comdat any
@v = global i32 0, comdat($f)
diff --git a/llvm/test/CodeGen/X86/elf-comdat2.ll b/llvm/test/CodeGen/X86/elf-comdat2.ll
index 3e43c43b7d741..1c86ed25eeb24 100644
--- a/llvm/test/CodeGen/X86/elf-comdat2.ll
+++ b/llvm/test/CodeGen/X86/elf-comdat2.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-pc-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux-gnu < %s | FileCheck %s
$foo = comdat any
@bar = global i32 42, comdat($foo)
diff --git a/llvm/test/CodeGen/X86/elf-exclude.ll b/llvm/test/CodeGen/X86/elf-exclude.ll
index 50006dfa8a522..2145461655d53 100644
--- a/llvm/test/CodeGen/X86/elf-exclude.ll
+++ b/llvm/test/CodeGen/X86/elf-exclude.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-pc-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux-gnu < %s | FileCheck %s
@a = global i32 1
@b = global i32 1, !exclude !0
diff --git a/llvm/test/CodeGen/X86/elf-group.ll b/llvm/test/CodeGen/X86/elf-group.ll
index a69ba491be0ff..d693f76687289 100644
--- a/llvm/test/CodeGen/X86/elf-group.ll
+++ b/llvm/test/CodeGen/X86/elf-group.ll
@@ -1,6 +1,6 @@
; Checks that comdat with nodeduplicate kind is lowered to a zero-flag ELF
; section group.
-; RUN: llc < %s -mtriple=x86_64-unknown-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux | FileCheck %s
; CHECK: .section .text.f1,"axG", at progbits,f1{{$}}
; CHECK: .section .text.f2,"axG", at progbits,f1{{$}}
diff --git a/llvm/test/CodeGen/X86/elf-retain.ll b/llvm/test/CodeGen/X86/elf-retain.ll
index 0116c868d4321..9c32785550fd2 100644
--- a/llvm/test/CodeGen/X86/elf-retain.ll
+++ b/llvm/test/CodeGen/X86/elf-retain.ll
@@ -1,12 +1,12 @@
;; Place a global object in the llvm.used list in a unique section with the SHF_GNU_RETAIN flag.
-; RUN: llc -mtriple=x86_64 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64 -data-sections=1 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64 -no-integrated-as -binutils-version=2.36 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64 -no-integrated-as -binutils-version=2.35 < %s | FileCheck %s --check-prefix=OLDGAS
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -data-sections=1 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -no-integrated-as -binutils-version=2.36 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -no-integrated-as -binutils-version=2.35 < %s | FileCheck %s --check-prefix=OLDGAS
;; Solaris uses the equivalent SHF_SUNW_NODISCARD flag, also represented as "R".
-; RUN: llc -mtriple=x86_64-solaris < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-solaris < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64 -data-sections=1 -unique-section-names=0 < %s | FileCheck %s --check-prefix=NOUNIQUE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -data-sections=1 -unique-section-names=0 < %s | FileCheck %s --check-prefix=NOUNIQUE
@llvm.used = appending global [10 x ptr] [
ptr @fa, ptr @fb, ptr @fc,
diff --git a/llvm/test/CodeGen/X86/elf-separate-named-sections.ll b/llvm/test/CodeGen/X86/elf-separate-named-sections.ll
index 18efc20aa9458..25174024aa9c4 100644
--- a/llvm/test/CodeGen/X86/elf-separate-named-sections.ll
+++ b/llvm/test/CodeGen/X86/elf-separate-named-sections.ll
@@ -1,7 +1,7 @@
; Test that global values with explicit sections are placed into unique sections.
-; RUN: llc < %s | FileCheck %s
-; RUN: llc -separate-named-sections < %s | FileCheck %s --check-prefix=SEPARATE
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -separate-named-sections < %s | FileCheck %s --check-prefix=SEPARATE
target triple="x86_64-unknown-unknown-elf"
define i32 @f() section "custom_text" {
diff --git a/llvm/test/CodeGen/X86/elf-unique-sections-by-flags.ll b/llvm/test/CodeGen/X86/elf-unique-sections-by-flags.ll
index 01a113fdd9b2f..26cab34aeffea 100644
--- a/llvm/test/CodeGen/X86/elf-unique-sections-by-flags.ll
+++ b/llvm/test/CodeGen/X86/elf-unique-sections-by-flags.ll
@@ -2,8 +2,8 @@
; sections with different sets of flags, depending on the properties (mutable,
; executable) of the global value.
-; RUN: llc < %s | FileCheck %s
-; RUN: llc -function-sections < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FNSECTIONS
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -function-sections < %s | FileCheck %s --check-prefix=CHECK --check-prefix=FNSECTIONS
target triple="x86_64-unknown-unknown-elf"
; Normal function goes in .text, or in it's own named section with -function-sections.
diff --git a/llvm/test/CodeGen/X86/embed-bitcode.ll b/llvm/test/CodeGen/X86/embed-bitcode.ll
index d4af9544bc1be..72e8317adacf4 100644
--- a/llvm/test/CodeGen/X86/embed-bitcode.ll
+++ b/llvm/test/CodeGen/X86/embed-bitcode.ll
@@ -1,6 +1,6 @@
-; RUN: llc -filetype=obj -mtriple=x86_64 %s -o %t
+; RUN: llc -combiner-topological-sorting -filetype=obj -mtriple=x86_64 %s -o %t
; RUN: llvm-readelf -S %t | FileCheck %s
-; RUN: llc -filetype=obj -mtriple=x86_64-pc-windows-msvc %s -o %t
+; RUN: llc -combiner-topological-sorting -filetype=obj -mtriple=x86_64-pc-windows-msvc %s -o %t
; RUN: llvm-readobj -S %t | FileCheck %s --check-prefix=COFF
; CHECK: .text PROGBITS 0000000000000000 [[#%x,OFF:]] 000000 00 AX 0
diff --git a/llvm/test/CodeGen/X86/emit-big-cst.ll b/llvm/test/CodeGen/X86/emit-big-cst.ll
index ec027bc768dc2..c8df3e711e9af 100644
--- a/llvm/test/CodeGen/X86/emit-big-cst.ll
+++ b/llvm/test/CodeGen/X86/emit-big-cst.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
; Check assembly printing of odd constants.
; CHECK: bigCst:
diff --git a/llvm/test/CodeGen/X86/empty-function.ll b/llvm/test/CodeGen/X86/empty-function.ll
index 7d908311ec8dc..903674b863e75 100644
--- a/llvm/test/CodeGen/X86/empty-function.ll
+++ b/llvm/test/CodeGen/X86/empty-function.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck -check-prefix=CHECK -check-prefix=WIN32 %s
-; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=CHECK -check-prefix=WIN64 %s
-; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck -check-prefix=LINUX %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck -check-prefix=CHECK -check-prefix=WIN32 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=CHECK -check-prefix=WIN64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu | FileCheck -check-prefix=LINUX %s
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i686-pc-windows-msvc18.0.0"
diff --git a/llvm/test/CodeGen/X86/empty-functions.ll b/llvm/test/CodeGen/X86/empty-functions.ll
index faded65ac6dc5..dca4a534eff06 100644
--- a/llvm/test/CodeGen/X86/empty-functions.ll
+++ b/llvm/test/CodeGen/X86/empty-functions.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=CHECK-NO-FP %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -frame-pointer=all | FileCheck -check-prefix=CHECK-FP %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=LINUX-NO-FP %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -frame-pointer=all | FileCheck -check-prefix=LINUX-FP %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=CHECK-NO-FP %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -frame-pointer=all | FileCheck -check-prefix=CHECK-FP %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=LINUX-NO-FP %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -frame-pointer=all | FileCheck -check-prefix=LINUX-FP %s
define void @func() {
entry:
diff --git a/llvm/test/CodeGen/X86/empty-struct-return-type.ll b/llvm/test/CodeGen/X86/empty-struct-return-type.ll
index 98eeeca1ccc65..ffe01f92e6082 100644
--- a/llvm/test/CodeGen/X86/empty-struct-return-type.ll
+++ b/llvm/test/CodeGen/X86/empty-struct-return-type.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; PR4688
; Return types can be empty structs, which can be awkward.
diff --git a/llvm/test/CodeGen/X86/emutls-pic.ll b/llvm/test/CodeGen/X86/emutls-pic.ll
index fc57d9919ed05..67a906180f094 100644
--- a/llvm/test/CodeGen/X86/emutls-pic.ll
+++ b/llvm/test/CodeGen/X86/emutls-pic.ll
@@ -1,15 +1,15 @@
-; RUN: llc < %s -emulated-tls -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -emulated-tls -mtriple=i386-linux-android -relocation-model=pic | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
-
-; RUN: llc < %s -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=NoEMU %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=NoEMU %s
-; RUN: llc < %s -mtriple=x86_64-linux-android29 -relocation-model=pic | FileCheck -check-prefix=NoEMU %s
-; RUN: llc < %s -mtriple=i386-linux-android -relocation-model=pic | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -mtriple=i386-linux-ohos -relocation-model=pic | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -mtriple=x86_64-linux-ohos -relocation-model=pic | FileCheck -check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=i386-linux-android -relocation-model=pic | FileCheck -check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
+
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=NoEMU %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=NoEMU %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-android29 -relocation-model=pic | FileCheck -check-prefix=NoEMU %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-android -relocation-model=pic | FileCheck -check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-ohos -relocation-model=pic | FileCheck -check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-ohos -relocation-model=pic | FileCheck -check-prefix=X64 %s
; NoEMU-NOT: __emutls
diff --git a/llvm/test/CodeGen/X86/emutls-pie.ll b/llvm/test/CodeGen/X86/emutls-pie.ll
index 048c7fb3c83ab..64aaa833fb6d0 100644
--- a/llvm/test/CodeGen/X86/emutls-pie.ll
+++ b/llvm/test/CodeGen/X86/emutls-pie.ll
@@ -1,21 +1,21 @@
-; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-android -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=x86_64-linux-android -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mcpu=generic -mtriple=x86_64-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
; RUN: | FileCheck -check-prefix=NoEMU %s
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
; RUN: | FileCheck -check-prefix=NoEMU %s
-; RUN: llc < %s -mcpu=generic -mtriple=i386-linux-android29 -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i386-linux-android29 -relocation-model=pic \
; RUN: | FileCheck -check-prefix=NoEMU %s
-; RUN: llc < %s -mcpu=generic -mtriple=i386-linux-android -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i386-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-android -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X64 %s
; NoEMU-NOT: __emutls
diff --git a/llvm/test/CodeGen/X86/emutls.ll b/llvm/test/CodeGen/X86/emutls.ll
index a7fbc2d8531d3..581e1fa2136c1 100644
--- a/llvm/test/CodeGen/X86/emutls.ll
+++ b/llvm/test/CodeGen/X86/emutls.ll
@@ -1,12 +1,12 @@
-; RUN: llc < %s -emulated-tls -mtriple=i386-linux-gnu | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -emulated-tls -mtriple=i386-linux-android | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android | FileCheck -check-prefix=X64 %s
-
-; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck -check-prefix=NoEMU %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=NoEMU %s
-; RUN: llc < %s -mtriple=i386-linux-android | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -mtriple=x86_64-linux-android | FileCheck -check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=i386-linux-gnu | FileCheck -check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=i386-linux-android | FileCheck -check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=x86_64-linux-android | FileCheck -check-prefix=X64 %s
+
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu | FileCheck -check-prefix=NoEMU %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=NoEMU %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-android | FileCheck -check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-android | FileCheck -check-prefix=X64 %s
; Copied from tls.ll; emulated TLS model is not implemented
; for *-pc-win32 and *-pc-windows targets yet.
diff --git a/llvm/test/CodeGen/X86/emutls_generic.ll b/llvm/test/CodeGen/X86/emutls_generic.ll
index 997dd707e485d..a1cc611f1bfcb 100644
--- a/llvm/test/CodeGen/X86/emutls_generic.ll
+++ b/llvm/test/CodeGen/X86/emutls_generic.ll
@@ -1,21 +1,21 @@
-; RUN: llc < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X86_32 %s
-; RUN: llc < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X86_32 %s
-; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X86_64 %s
-; RUN: llc < %s -emulated-tls -mtriple=i386-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=i386-linux-gnu -relocation-model=pic \
; RUN: | FileCheck %s
-; RUN: llc < %s -mtriple=i686-linux-android -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X86_32 %s
-; RUN: llc < %s -mtriple=i686-linux-android -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X86_32 %s
-; RUN: llc < %s -mtriple=x86_64-linux-android -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-android -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X86_64 %s
-; RUN: llc < %s -mtriple=i386-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -relocation-model=pic \
; RUN: | FileCheck -check-prefix=NoEMU %s
-; RUN: llc < %s -mtriple=i686-linux-android29 -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-android29 -relocation-model=pic \
; RUN: | FileCheck -check-prefix=NoEMU %s
; NoEMU-NOT: __emutls
diff --git a/llvm/test/CodeGen/X86/enqcmd-intrinsics.ll b/llvm/test/CodeGen/X86/enqcmd-intrinsics.ll
index 0b09c8fc1e74e..28c045a7f49ff 100644
--- a/llvm/test/CodeGen/X86/enqcmd-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/enqcmd-intrinsics.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+enqcmd | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+enqcmd | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -mattr=+enqcmd | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+enqcmd,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+enqcmd | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+enqcmd | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 -mattr=+enqcmd | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+enqcmd,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
define i8 @test_enqcmd(ptr %dst, ptr %src) {
; X64-LABEL: test_enqcmd:
diff --git a/llvm/test/CodeGen/X86/epilogue-cfi-fp.ll b/llvm/test/CodeGen/X86/epilogue-cfi-fp.ll
index 24a1da68f7dea..1fa37dc3acbdc 100644
--- a/llvm/test/CodeGen/X86/epilogue-cfi-fp.ll
+++ b/llvm/test/CodeGen/X86/epilogue-cfi-fp.ll
@@ -1,5 +1,5 @@
-; RUN: llc -O0 %s -o - | FileCheck %s
-; RUN: llc < %s -stop-after=prologepilog | FileCheck %s --check-prefix=PEI
+; RUN: llc -combiner-topological-sorting -O0 %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -stop-after=prologepilog | FileCheck %s --check-prefix=PEI
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i686-pc-linux"
diff --git a/llvm/test/CodeGen/X86/epilogue-cfi-no-fp.ll b/llvm/test/CodeGen/X86/epilogue-cfi-no-fp.ll
index 6ff0604cdba1a..f4e9adf68aacf 100644
--- a/llvm/test/CodeGen/X86/epilogue-cfi-no-fp.ll
+++ b/llvm/test/CodeGen/X86/epilogue-cfi-no-fp.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 < %s | FileCheck %s
target triple = "i686--"
; Function Attrs: noinline nounwind
diff --git a/llvm/test/CodeGen/X86/epilogue.ll b/llvm/test/CodeGen/X86/epilogue.ll
index e1d64b85492ac..af886beee9e1a 100644
--- a/llvm/test/CodeGen/X86/epilogue.ll
+++ b/llvm/test/CodeGen/X86/epilogue.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-- | FileCheck %s
; CHECK-NOT: lea{{.*}}(%esp)
; CHECK: {{(mov.* %ebp, %esp)|(lea.*\(%ebp\), %esp)}}
diff --git a/llvm/test/CodeGen/X86/equiv_with_fndef.ll b/llvm/test/CodeGen/X86/equiv_with_fndef.ll
index a858ec2bf4537..ac41d350a6294 100644
--- a/llvm/test/CodeGen/X86/equiv_with_fndef.ll
+++ b/llvm/test/CodeGen/X86/equiv_with_fndef.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s 2>&1 | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/equiv_with_vardef.ll b/llvm/test/CodeGen/X86/equiv_with_vardef.ll
index 47f03d197fa9e..4fa5782318e36 100644
--- a/llvm/test/CodeGen/X86/equiv_with_vardef.ll
+++ b/llvm/test/CodeGen/X86/equiv_with_vardef.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -filetype=null %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -filetype=null %s 2>&1 | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/exception-label.ll b/llvm/test/CodeGen/X86/exception-label.ll
index aa3f7753ac66e..358e153e809b1 100644
--- a/llvm/test/CodeGen/X86/exception-label.ll
+++ b/llvm/test/CodeGen/X86/exception-label.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s
; Test that we can handle .Lexception0 being defined. We used to crash.
diff --git a/llvm/test/CodeGen/X86/execstack.ll b/llvm/test/CodeGen/X86/execstack.ll
index 4d6e2ce7947bd..b305398992316 100644
--- a/llvm/test/CodeGen/X86/execstack.ll
+++ b/llvm/test/CodeGen/X86/execstack.ll
@@ -1,9 +1,9 @@
;; Check that .note.GNU-stack sections are emitted on Linux, but not on Solaris.
-; RUN: llc < %s -mtriple=i686-linux | FileCheck %s -check-prefix=CHECK-GNUSTACK
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=CHECK-GNUSTACK
-; RUN: llc < %s -mtriple=i386-solaris | FileCheck %s -check-prefix=CHECK-NOGNUSTACK
-; RUN: llc < %s -mtriple=amd64-solaris | FileCheck %s -check-prefix=CHECK-NOGNUSTACK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux | FileCheck %s -check-prefix=CHECK-GNUSTACK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=CHECK-GNUSTACK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-solaris | FileCheck %s -check-prefix=CHECK-NOGNUSTACK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=amd64-solaris | FileCheck %s -check-prefix=CHECK-NOGNUSTACK
; CHECK-GNUSTACK: .section ".note.GNU-stack","", at progbits
; CHECK-NOGNUSTACK-NOT: .section ".note.GNU-stack","", at progbits
diff --git a/llvm/test/CodeGen/X86/exedeps-movq.ll b/llvm/test/CodeGen/X86/exedeps-movq.ll
index abcf669c8c12a..22e478f2c5bc3 100644
--- a/llvm/test/CodeGen/X86/exedeps-movq.ll
+++ b/llvm/test/CodeGen/X86/exedeps-movq.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
; Verify that we select the correct version of the instruction that stores the low 64-bits
; of a 128-bit vector. We want to avoid int/fp domain crossing penalties, so ignore the
diff --git a/llvm/test/CodeGen/X86/exedepsfix-broadcast.ll b/llvm/test/CodeGen/X86/exedepsfix-broadcast.ll
index 8bb5fd5afdda5..c4fb7d6189b5d 100644
--- a/llvm/test/CodeGen/X86/exedepsfix-broadcast.ll
+++ b/llvm/test/CodeGen/X86/exedepsfix-broadcast.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx -mattr=+avx2 | FileCheck %s
; Check that the ExeDepsFix pass correctly fixes the domain for broadcast instructions.
; <rdar://problem/16354675>
diff --git a/llvm/test/CodeGen/X86/exp10-libcall-names.ll b/llvm/test/CodeGen/X86/exp10-libcall-names.ll
index 614658b2be4c6..169b60b17002c 100644
--- a/llvm/test/CodeGen/X86/exp10-libcall-names.ll
+++ b/llvm/test/CodeGen/X86/exp10-libcall-names.ll
@@ -1,17 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=x86_64-linux-gnu < %s | FileCheck -check-prefix=LINUX %s
-; RUN: llc -mtriple=x86_64-apple-macos10.9 < %s | FileCheck -check-prefix=APPLE %s
-; RUN: llc -mtriple=x86_64-apple-ios9.0 < %s | FileCheck -check-prefix=APPLE %s
-; RUN: llc -mtriple=x86_64-apple-tvos9.0 < %s | FileCheck -check-prefix=APPLE %s
-; RUN: llc -mtriple=x86_64-apple-watchos9.0 < %s | FileCheck -check-prefix=APPLE %s
-; RUN: llc -mtriple=x86_64-apple-xros9.0 < %s | FileCheck -check-prefix=APPLE %s
-; RUN: llc -mtriple=x86_64-apple-ios8.0 < %s | FileCheck -check-prefix=APPLE %s
-; RUN: llc -mtriple=x86_64-apple-tvos8.0 < %s | FileCheck -check-prefix=APPLE %s
-; RUN: llc -mtriple=x86_64-apple-xros8.0 < %s | FileCheck -check-prefix=APPLE %s
-; RUN: llc -mtriple=x86_64-apple-driverkit < %s | FileCheck -check-prefix=APPLE %s
-; RUN: llc -mtriple=x86_64-apple-driverkit24.0 < %s | FileCheck -check-prefix=APPLE %s
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=GISEL-X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu < %s | FileCheck -check-prefix=LINUX %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macos10.9 < %s | FileCheck -check-prefix=APPLE %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-ios9.0 < %s | FileCheck -check-prefix=APPLE %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-tvos9.0 < %s | FileCheck -check-prefix=APPLE %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-watchos9.0 < %s | FileCheck -check-prefix=APPLE %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-xros9.0 < %s | FileCheck -check-prefix=APPLE %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-ios8.0 < %s | FileCheck -check-prefix=APPLE %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-tvos8.0 < %s | FileCheck -check-prefix=APPLE %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-xros8.0 < %s | FileCheck -check-prefix=APPLE %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-driverkit < %s | FileCheck -check-prefix=APPLE %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-driverkit24.0 < %s | FileCheck -check-prefix=APPLE %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=GISEL-X64
; Check exp10/exp10f is emitted as __exp10/__exp10f on assorted darwin systems.
diff --git a/llvm/test/CodeGen/X86/exp10-libcall.ll b/llvm/test/CodeGen/X86/exp10-libcall.ll
index 4abf6b360ca34..55afca9b6c2ce 100644
--- a/llvm/test/CodeGen/X86/exp10-libcall.ll
+++ b/llvm/test/CodeGen/X86/exp10-libcall.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
-; RUN: llc < %s -mtriple=i386-pc-win32 | FileCheck %s -check-prefix=CHECK-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-win32 | FileCheck %s -check-prefix=CHECK-WIN
define float @call_exp10f(float %a) nounwind {
; CHECK-LABEL: call_exp10f:
diff --git a/llvm/test/CodeGen/X86/exp10l-libcall-names.ll b/llvm/test/CodeGen/X86/exp10l-libcall-names.ll
index 2e7f9e34f662a..67d4c4b2cb711 100644
--- a/llvm/test/CodeGen/X86/exp10l-libcall-names.ll
+++ b/llvm/test/CodeGen/X86/exp10l-libcall-names.ll
@@ -1,16 +1,16 @@
-; RUN: llc -mtriple=x86_64-linux-gnu < %s | FileCheck -check-prefix=LINUX %s
-; RUN: not llc -mtriple=x86_64-apple-macos10.9 < %s 2>&1 | FileCheck -check-prefix=ERR %s
-; RUN: not llc -mtriple=x86_64-apple-ios9.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
-; RUN: not llc -mtriple=x86_64-apple-tvos9.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
-; RUN: not llc -mtriple=x86_64-apple-watchos9.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
-; RUN: not llc -mtriple=x86_64-apple-xros9.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
-; RUN: not llc -mtriple=x86_64-apple-ios8.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
-; RUN: not llc -mtriple=x86_64-apple-tvos8.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
-; RUN: not llc -mtriple=x86_64-apple-xros8.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
-; RUN: not llc -mtriple=x86_64-apple-driverkit < %s 2>&1 | FileCheck -check-prefix=ERR %s
-; RUN: not llc -mtriple=x86_64-apple-driverkit24.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=GISEL-X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu < %s | FileCheck -check-prefix=LINUX %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-apple-macos10.9 < %s 2>&1 | FileCheck -check-prefix=ERR %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-apple-ios9.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-apple-tvos9.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-apple-watchos9.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-apple-xros9.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-apple-ios8.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-apple-tvos8.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-apple-xros8.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-apple-driverkit < %s 2>&1 | FileCheck -check-prefix=ERR %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-apple-driverkit24.0 < %s 2>&1 | FileCheck -check-prefix=ERR %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=GISEL-X64
; ERR: no libcall available for fexp10
diff --git a/llvm/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll b/llvm/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll
index d0d28db04f444..f69991e07f1b4 100644
--- a/llvm/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll
+++ b/llvm/test/CodeGen/X86/expand-integer-x86_64-intrinsic-error.ll
@@ -1,4 +1,4 @@
-; RUN: not --crash llc < %s -mtriple=i686-unknown-unknown -mattr=sse2 2>&1 | FileCheck %s --check-prefix=CHECK
+; RUN: not --crash llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=sse2 2>&1 | FileCheck %s --check-prefix=CHECK
; Make sure we generate fatal error from the type legalizer for using a 64-bit
; mode intrinsics in 32-bit mode. We used to use an llvm_unreachable.
diff --git a/llvm/test/CodeGen/X86/expand-opaque-const.ll b/llvm/test/CodeGen/X86/expand-opaque-const.ll
index 2db2aa5e1697b..eef5db9ad7773 100644
--- a/llvm/test/CodeGen/X86/expand-opaque-const.ll
+++ b/llvm/test/CodeGen/X86/expand-opaque-const.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=generic -O1 -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=generic -O1 -relocation-model=pic < %s | FileCheck %s
target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
target triple = "i686-apple-darwin"
diff --git a/llvm/test/CodeGen/X86/expand-vp-cast-intrinsics.ll b/llvm/test/CodeGen/X86/expand-vp-cast-intrinsics.ll
index 2609b06361af5..dec1be304aefe 100644
--- a/llvm/test/CodeGen/X86/expand-vp-cast-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/expand-vp-cast-intrinsics.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
declare <4 x ptr> @llvm.vp.inttoptr.v4p0.v4i32(<4 x i32>, <4 x i1>, i32)
define <4 x ptr> @inttoptr_v4p0_v4i32(<4 x i32> %va, <4 x i1> %m, i32 zeroext %evl) {
diff --git a/llvm/test/CodeGen/X86/expand-vp-fp-intrinsics.ll b/llvm/test/CodeGen/X86/expand-vp-fp-intrinsics.ll
index 018b6c2d20f1e..f131fad0ca955 100644
--- a/llvm/test/CodeGen/X86/expand-vp-fp-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/expand-vp-fp-intrinsics.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
define void @vp_fadd_v4f32(<4 x float> %a0, <4 x float> %a1, ptr %out, i32 %vp) nounwind {
; X86-LABEL: vp_fadd_v4f32:
diff --git a/llvm/test/CodeGen/X86/explicit-section-mergeable.ll b/llvm/test/CodeGen/X86/explicit-section-mergeable.ll
index 09995919d9559..9d5f042c4c326 100644
--- a/llvm/test/CodeGen/X86/explicit-section-mergeable.ll
+++ b/llvm/test/CodeGen/X86/explicit-section-mergeable.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64 -unique-section-names=0 -data-sections 2>&1 \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -unique-section-names=0 -data-sections 2>&1 \
; RUN: | FileCheck %s
;; Several sections are created via inline assembly. We add checks
@@ -282,7 +282,7 @@ module asm ".section .asm_nonmergeable2,\22a\22, at progbits"
;; --no-integrated-as avoids the use of ",unique," for compatibility with older binutils.
;; Error if an incompatible symbol is explicitly placed into a mergeable section.
-; RUN: not llc < %s -mtriple=x86_64 --no-integrated-as -binutils-version=2.34 2>&1 \
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64 --no-integrated-as -binutils-version=2.34 2>&1 \
; RUN: | FileCheck %s --check-prefix=NO-I-AS-ERR
; NO-I-AS-ERR: error: Symbol 'explicit_default_1' from module '<stdin>' required a section with entry-size=0 but was placed in section '.rodata.cst16' with entry-size=16: Explicit assignment by pragma or attribute of an incompatible symbol to this section?
; NO-I-AS-ERR: error: Symbol 'explicit_default_4' from module '<stdin>' required a section with entry-size=0 but was placed in section '.debug_str' with entry-size=1: Explicit assignment by pragma or attribute of an incompatible symbol to this section?
@@ -292,11 +292,11 @@ module asm ".section .asm_nonmergeable2,\22a\22, at progbits"
;; For GNU as before 2.35,
;; Don't create mergeable sections for globals with an explicit section name.
; RUN: echo '@explicit = unnamed_addr constant [2 x i16] [i16 1, i16 1], section ".explicit"' > %t.no_i_as.ll
-; RUN: llc < %t.no_i_as.ll -mtriple=x86_64 --no-integrated-as -binutils-version=2.34 2>&1 \
+; RUN: llc -combiner-topological-sorting < %t.no_i_as.ll -mtriple=x86_64 --no-integrated-as -binutils-version=2.34 2>&1 \
; RUN: | FileCheck %s --check-prefix=NO-I-AS-OLD
; NO-I-AS-OLD: .section .explicit,"a", at progbits{{$}}
-; RUN: llc < %t.no_i_as.ll -mtriple=x86_64 --no-integrated-as -binutils-version=2.35 2>&1 \
+; RUN: llc -combiner-topological-sorting < %t.no_i_as.ll -mtriple=x86_64 --no-integrated-as -binutils-version=2.35 2>&1 \
; RUN: | FileCheck %s --check-prefix=NO-I-AS-NEW
-; RUN: llc < %t.no_i_as.ll -mtriple=x86_64 --no-integrated-as -binutils-version=none 2>&1 \
+; RUN: llc -combiner-topological-sorting < %t.no_i_as.ll -mtriple=x86_64 --no-integrated-as -binutils-version=none 2>&1 \
; RUN: | FileCheck %s --check-prefix=NO-I-AS-NEW
; NO-I-AS-NEW: .section .explicit,"aM", at progbits,4,unique,1
diff --git a/llvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll b/llvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll
index 88402c464abeb..ffda42f72f4e8 100644
--- a/llvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll
+++ b/llvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -stop-after=livedebugvalues -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -stop-after=livedebugvalues -o - | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.13.0"
diff --git a/llvm/test/CodeGen/X86/extend.ll b/llvm/test/CodeGen/X86/extend.ll
index ea458c1654f24..ceb31b612d9ed 100644
--- a/llvm/test/CodeGen/X86/extend.ll
+++ b/llvm/test/CodeGen/X86/extend.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s
@G1 = internal global i8 0 ; <ptr> [#uses=1]
@G2 = internal global i8 0 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/extended-fma-contraction.ll b/llvm/test/CodeGen/X86/extended-fma-contraction.ll
index d751c4b8b1b78..0db9718dc0e92 100644
--- a/llvm/test/CodeGen/X86/extended-fma-contraction.ll
+++ b/llvm/test/CodeGen/X86/extended-fma-contraction.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mcpu=bdver2 -mattr=-fma -mtriple=i686-apple-darwin < %s | FileCheck %s
-; RUN: llc -mcpu=bdver2 -mattr=-fma,-fma4 -mtriple=i686-apple-darwin < %s | FileCheck %s --check-prefix=CHECK-NOFMA
+; RUN: llc -combiner-topological-sorting -mcpu=bdver2 -mattr=-fma -mtriple=i686-apple-darwin < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=bdver2 -mattr=-fma,-fma4 -mtriple=i686-apple-darwin < %s | FileCheck %s --check-prefix=CHECK-NOFMA
define <3 x float> @fmafunc(<3 x float> %a, <3 x float> %b, <3 x float> %c) {
; CHECK-LABEL: fmafunc:
diff --git a/llvm/test/CodeGen/X86/extern_weak.ll b/llvm/test/CodeGen/X86/extern_weak.ll
index cd3a454d1ba28..92e869a76a2df 100644
--- a/llvm/test/CodeGen/X86/extern_weak.ll
+++ b/llvm/test/CodeGen/X86/extern_weak.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s --check-prefix=DARWIN
-; RUN: llc < %s -mtriple=i686-windows-msvc | FileCheck %s --check-prefix=WIN32
-; RUN: llc < %s -mtriple=x86_64-windows-msvc | FileCheck %s --check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin | FileCheck %s --check-prefix=DARWIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-windows-msvc | FileCheck %s --check-prefix=WIN32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc | FileCheck %s --check-prefix=WIN64
declare extern_weak void @foo(...)
diff --git a/llvm/test/CodeGen/X86/extmul128.ll b/llvm/test/CodeGen/X86/extmul128.ll
index a7f2959a23c2c..5e280b0ba11cf 100644
--- a/llvm/test/CodeGen/X86/extmul128.ll
+++ b/llvm/test/CodeGen/X86/extmul128.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define i128 @i64_sext_i128(i64 %a, i64 %b) {
; CHECK-LABEL: i64_sext_i128:
diff --git a/llvm/test/CodeGen/X86/extmul64.ll b/llvm/test/CodeGen/X86/extmul64.ll
index 5cf0eee865b28..8521f747552d8 100644
--- a/llvm/test/CodeGen/X86/extmul64.ll
+++ b/llvm/test/CodeGen/X86/extmul64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define i64 @i32_sext_i64(i32 %a, i32 %b) {
; CHECK-LABEL: i32_sext_i64:
diff --git a/llvm/test/CodeGen/X86/extract-combine.ll b/llvm/test/CodeGen/X86/extract-combine.ll
index 7d2ce84c56bae..bfa52aa97fa53 100644
--- a/llvm/test/CodeGen/X86/extract-combine.ll
+++ b/llvm/test/CodeGen/X86/extract-combine.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 | FileCheck %s --implicit-check-not unpcklps
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=core2 | FileCheck %s --implicit-check-not unpcklps
define i32 @foo() nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/extract-extract.ll b/llvm/test/CodeGen/X86/extract-extract.ll
index baf66d75bbff7..ea03644b7a12c 100644
--- a/llvm/test/CodeGen/X86/extract-extract.ll
+++ b/llvm/test/CodeGen/X86/extract-extract.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; PR4699
; Handle this extractvalue-of-extractvalue case without getting in
diff --git a/llvm/test/CodeGen/X86/extract-fp.ll b/llvm/test/CodeGen/X86/extract-fp.ll
index fd4f2171807bf..1d679c61ce561 100644
--- a/llvm/test/CodeGen/X86/extract-fp.ll
+++ b/llvm/test/CodeGen/X86/extract-fp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s
define float @ext_fadd_v4f32(<4 x float> %x) {
; CHECK-LABEL: ext_fadd_v4f32:
diff --git a/llvm/test/CodeGen/X86/extract-store.ll b/llvm/test/CodeGen/X86/extract-store.ll
index 255ea44e520c0..2aa178a1aae4d 100644
--- a/llvm/test/CodeGen/X86/extract-store.ll
+++ b/llvm/test/CodeGen/X86/extract-store.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86,SSE-X86,SSE2-X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64,SSE-X64,SSE2-X64
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=X86,SSE-X86,SSE41-X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=X64,SSE-X64,SSE41-X64
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86,AVX-X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64,AVX-X64
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+sse -enable-legalize-types-checking | FileCheck %s --check-prefixes=X64,SSE-X64,SSE2-X64
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+sse -enable-legalize-types-checking | FileCheck %s --check-prefixes=X64,SSE-X64,SSE2-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86,SSE-X86,SSE2-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64,SSE-X64,SSE2-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=X86,SSE-X86,SSE41-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=X64,SSE-X64,SSE41-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86,AVX-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64,AVX-X64
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-android -mattr=+sse -enable-legalize-types-checking | FileCheck %s --check-prefixes=X64,SSE-X64,SSE2-X64
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+sse -enable-legalize-types-checking | FileCheck %s --check-prefixes=X64,SSE-X64,SSE2-X64
define void @extract_i8_0(ptr nocapture %dst, <16 x i8> %foo) nounwind {
; SSE2-X86-LABEL: extract_i8_0:
diff --git a/llvm/test/CodeGen/X86/extractelement-from-arg.ll b/llvm/test/CodeGen/X86/extractelement-from-arg.ll
index f8a0e258dcab2..5c935b316f8d5 100644
--- a/llvm/test/CodeGen/X86/extractelement-from-arg.ll
+++ b/llvm/test/CodeGen/X86/extractelement-from-arg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2
define void @test(ptr %R, <4 x float> %X) nounwind {
%tmp = extractelement <4 x float> %X, i32 3
diff --git a/llvm/test/CodeGen/X86/extractelement-index.ll b/llvm/test/CodeGen/X86/extractelement-index.ll
index 077351b9718d5..14a23d40f5b07 100644
--- a/llvm/test/CodeGen/X86/extractelement-index.ll
+++ b/llvm/test/CodeGen/X86/extractelement-index.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
;
; ExtractElement - Constant Index
diff --git a/llvm/test/CodeGen/X86/extractelement-legalization-cycle.ll b/llvm/test/CodeGen/X86/extractelement-legalization-cycle.ll
index 71cf02886f766..358a6a4124b41 100644
--- a/llvm/test/CodeGen/X86/extractelement-legalization-cycle.ll
+++ b/llvm/test/CodeGen/X86/extractelement-legalization-cycle.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; When the extractelement is converted to a load the store can be re-used.
; This will, however, introduce a cycle into the selection DAG (the load
diff --git a/llvm/test/CodeGen/X86/extractelement-legalization-store-ordering.ll b/llvm/test/CodeGen/X86/extractelement-legalization-store-ordering.ll
index 0e0cfc64af9ee..44472404378eb 100644
--- a/llvm/test/CodeGen/X86/extractelement-legalization-store-ordering.ll
+++ b/llvm/test/CodeGen/X86/extractelement-legalization-store-ordering.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mcpu=yonah | FileCheck %s
target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
diff --git a/llvm/test/CodeGen/X86/extractps.ll b/llvm/test/CodeGen/X86/extractps.ll
index b9b06575df661..f96f3d31114ac 100644
--- a/llvm/test/CodeGen/X86/extractps.ll
+++ b/llvm/test/CodeGen/X86/extractps.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=penryn | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=penryn | FileCheck %s
; PR2647
@0 = external dso_local global float, align 16 ; <ptr>:0 [#uses=2]
diff --git a/llvm/test/CodeGen/X86/f16c-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/f16c-intrinsics-fast-isel.ll
index c482ba0268f1c..7bfd1f5c282b2 100644
--- a/llvm/test/CodeGen/X86/f16c-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/f16c-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx,+f16c | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx,+f16c | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/f16c-builtins.c
diff --git a/llvm/test/CodeGen/X86/f16c-intrinsics.ll b/llvm/test/CodeGen/X86/f16c-intrinsics.ll
index 307d10e1c3e96..66a64d4bd7864 100644
--- a/llvm/test/CodeGen/X86/f16c-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/f16c-intrinsics.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+f16c -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX,X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX512VL,X86-AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX512VL,X64-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx,+f16c -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX512VL,X86-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -show-mc-encoding -disable-peephole | FileCheck %s --check-prefixes=AVX512VL,X64-AVX512VL
define <8 x i16> @test_x86_vcvtps2ph_128(<4 x float> %a0) {
; AVX-LABEL: test_x86_vcvtps2ph_128:
diff --git a/llvm/test/CodeGen/X86/fabs.ll b/llvm/test/CodeGen/X86/fabs.ll
index 050460b2acefc..8463bb6e595b7 100644
--- a/llvm/test/CodeGen/X86/fabs.ll
+++ b/llvm/test/CodeGen/X86/fabs.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse,-sse2,-sse3 | FileCheck %s --check-prefix=X87
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=-sse,-sse2,-sse3 | FileCheck %s --check-prefix=X87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
declare float @llvm.fabs.f32(float)
declare x86_fp80 @llvm.fabs.f80(x86_fp80)
diff --git a/llvm/test/CodeGen/X86/fadd-combines.ll b/llvm/test/CodeGen/X86/fadd-combines.ll
index a44671c77e653..e0bd7d940a4da 100644
--- a/llvm/test/CodeGen/X86/fadd-combines.ll
+++ b/llvm/test/CodeGen/X86/fadd-combines.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
define float @fadd_zero_f32(float %x) #0 {
; CHECK-LABEL: fadd_zero_f32:
diff --git a/llvm/test/CodeGen/X86/fake-use-fastisel.ll b/llvm/test/CodeGen/X86/fake-use-fastisel.ll
index 51e432d84d308..276458a252a5b 100644
--- a/llvm/test/CodeGen/X86/fake-use-fastisel.ll
+++ b/llvm/test/CodeGen/X86/fake-use-fastisel.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -fast-isel -stop-after=finalize-isel -mtriple=x86_64-unknown-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -stop-after=finalize-isel -mtriple=x86_64-unknown-linux | FileCheck %s
;
; Verify that llvm.fake.use is lowered to FAKE_USE by FastISel.
; This is relevant for compilers (e.g. Flang) that use llvm.fake.use at O0
diff --git a/llvm/test/CodeGen/X86/fake-use-hpfloat.ll b/llvm/test/CodeGen/X86/fake-use-hpfloat.ll
index fd511a6179acf..ae7c1a0ddfc83 100644
--- a/llvm/test/CodeGen/X86/fake-use-hpfloat.ll
+++ b/llvm/test/CodeGen/X86/fake-use-hpfloat.ll
@@ -1,6 +1,6 @@
; assert in DAGlegalizer with fake use of half precision float.
; Changes to half float promotion.
-; RUN: llc -stop-after=finalize-isel -mtriple=x86_64-unknown-linux -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -stop-after=finalize-isel -mtriple=x86_64-unknown-linux -o - %s | FileCheck %s
;
; CHECK: bb.0.entry:
; CHECK-NEXT: %0:fr16 = FsFLD0SH
diff --git a/llvm/test/CodeGen/X86/fake-use-ld.ll b/llvm/test/CodeGen/X86/fake-use-ld.ll
index 86e7235091dd1..703ca3a01b2e2 100644
--- a/llvm/test/CodeGen/X86/fake-use-ld.ll
+++ b/llvm/test/CodeGen/X86/fake-use-ld.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
; Checks that fake uses of the FP stack do not cause a crash.
;
diff --git a/llvm/test/CodeGen/X86/fake-use-simple-tail-call.ll b/llvm/test/CodeGen/X86/fake-use-simple-tail-call.ll
index fb01da9f12c8b..06c349d2c36f0 100644
--- a/llvm/test/CodeGen/X86/fake-use-simple-tail-call.ll
+++ b/llvm/test/CodeGen/X86/fake-use-simple-tail-call.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -O2 -o - \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -O2 -o - \
; RUN: | FileCheck %s --implicit-check-not=TAILCALL
; Generated with: clang -emit-llvm -O2 -S -fextend-variable-liveness test.cpp -o -
; =========== test.cpp ===============
diff --git a/llvm/test/CodeGen/X86/fake-use-suppress-load.ll b/llvm/test/CodeGen/X86/fake-use-suppress-load.ll
index c1b442ebd79ff..4852f1424a9ff 100644
--- a/llvm/test/CodeGen/X86/fake-use-suppress-load.ll
+++ b/llvm/test/CodeGen/X86/fake-use-suppress-load.ll
@@ -1,5 +1,5 @@
; Suppress redundant loads feeding into fake uses.
-; RUN: llc -filetype=asm -o - %s --mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting -filetype=asm -o - %s --mtriple=x86_64-unknown-unknown | FileCheck %s
; Windows ABI works differently, there's no offset.
;
; Look for the spill
diff --git a/llvm/test/CodeGen/X86/fake-use-tailcall.ll b/llvm/test/CodeGen/X86/fake-use-tailcall.ll
index 67c28dcf1301c..24d6bd3f14685 100644
--- a/llvm/test/CodeGen/X86/fake-use-tailcall.ll
+++ b/llvm/test/CodeGen/X86/fake-use-tailcall.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -stop-after=finalize-isel -mtriple=x86_64-unknown-linux - | FileCheck %s --implicit-check-not FAKE_USE
+; RUN: llc -combiner-topological-sorting < %s -stop-after=finalize-isel -mtriple=x86_64-unknown-linux - | FileCheck %s --implicit-check-not FAKE_USE
; Fake uses following tail calls should be pulled in front
; of the TCRETURN instruction. Fake uses using something defined by
; the tail call or after it should be suppressed.
diff --git a/llvm/test/CodeGen/X86/fake-use-vector.ll b/llvm/test/CodeGen/X86/fake-use-vector.ll
index 4d6ede3082704..4ffd1e5437683 100644
--- a/llvm/test/CodeGen/X86/fake-use-vector.ll
+++ b/llvm/test/CodeGen/X86/fake-use-vector.ll
@@ -1,5 +1,5 @@
; assert in DAGlegalizer with fake use of 1-element vectors.
-; RUN: llc -stop-after=finalize-isel -mtriple=x86_64-unknown-linux -filetype=asm -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -stop-after=finalize-isel -mtriple=x86_64-unknown-linux -filetype=asm -o - %s | FileCheck %s
;
; ModuleID = 't2.cpp'
; source_filename = "t2.cpp"
diff --git a/llvm/test/CodeGen/X86/fake-use-vector2.ll b/llvm/test/CodeGen/X86/fake-use-vector2.ll
index 190197615775a..52da47bcadf43 100644
--- a/llvm/test/CodeGen/X86/fake-use-vector2.ll
+++ b/llvm/test/CodeGen/X86/fake-use-vector2.ll
@@ -1,4 +1,4 @@
-; RUN: llc -stop-after=finalize-isel -mtriple=x86_64-unknown-linux -filetype=asm -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -stop-after=finalize-isel -mtriple=x86_64-unknown-linux -filetype=asm -o - %s | FileCheck %s
;
; Make sure we can split vectors that are used as operands of FAKE_USE.
diff --git a/llvm/test/CodeGen/X86/fake-use-zero-length.ll b/llvm/test/CodeGen/X86/fake-use-zero-length.ll
index 71cb1029dcad6..db097b4342d0b 100644
--- a/llvm/test/CodeGen/X86/fake-use-zero-length.ll
+++ b/llvm/test/CodeGen/X86/fake-use-zero-length.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -stop-after=finalize-isel -mtriple=x86_64-unknown-linux | FileCheck %s --implicit-check-not=FAKE_USE
+; RUN: llc -combiner-topological-sorting < %s -stop-after=finalize-isel -mtriple=x86_64-unknown-linux | FileCheck %s --implicit-check-not=FAKE_USE
;
; Make sure SelectionDAG does not crash handling fake uses of zero-length arrays
; and structs. Check also that they are not propagated.
diff --git a/llvm/test/CodeGen/X86/fast-cc-callee-pops.ll b/llvm/test/CodeGen/X86/fast-cc-callee-pops.ll
index a0ec6ce25d757..87a60be3972c2 100644
--- a/llvm/test/CodeGen/X86/fast-cc-callee-pops.ll
+++ b/llvm/test/CodeGen/X86/fast-cc-callee-pops.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel -mcpu=yonah | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -x86-asm-syntax=intel -mcpu=yonah | FileCheck %s
; Check that a fastcc function pops its stack variables before returning.
diff --git a/llvm/test/CodeGen/X86/fast-cc-merge-stack-adj.ll b/llvm/test/CodeGen/X86/fast-cc-merge-stack-adj.ll
index 9cedbbd5ac525..84a65d5c4c979 100644
--- a/llvm/test/CodeGen/X86/fast-cc-merge-stack-adj.ll
+++ b/llvm/test/CodeGen/X86/fast-cc-merge-stack-adj.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -x86-asm-syntax=intel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -x86-asm-syntax=intel | FileCheck %s
; CHECK: add esp, 8
target triple = "i686-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/fast-cc-pass-in-regs.ll b/llvm/test/CodeGen/X86/fast-cc-pass-in-regs.ll
index b3a6d909c53e3..f6db54f69bf84 100644
--- a/llvm/test/CodeGen/X86/fast-cc-pass-in-regs.ll
+++ b/llvm/test/CodeGen/X86/fast-cc-pass-in-regs.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s
; check that fastcc is passing stuff in regs.
declare x86_fastcallcc i64 @callee(i64 inreg)
diff --git a/llvm/test/CodeGen/X86/fast-isel-abort-warm.ll b/llvm/test/CodeGen/X86/fast-isel-abort-warm.ll
index 32fb471167463..64bb1a1877acc 100644
--- a/llvm/test/CodeGen/X86/fast-isel-abort-warm.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-abort-warm.ll
@@ -1,4 +1,4 @@
-; RUN: llc -fast-isel -o - %s -fast-isel-report-on-fallback -pass-remarks-missed=isel 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -fast-isel -o - %s -fast-isel-report-on-fallback -pass-remarks-missed=isel 2>&1 | FileCheck %s
; Make sure FastISel report a warming when we asked it to do so.
; Note: This test needs to use whatever is not supported by FastISel.
; Thus, this test may fail because inline asm gets supported in FastISel.
diff --git a/llvm/test/CodeGen/X86/fast-isel-agg-constant.ll b/llvm/test/CodeGen/X86/fast-isel-agg-constant.ll
index d782ec4c51c2b..6aa89bd31a89a 100644
--- a/llvm/test/CodeGen/X86/fast-isel-agg-constant.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-agg-constant.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -O0 | FileCheck %s
; Make sure fast-isel doesn't screw up aggregate constants.
; (Failing out is okay, as long as we don't miscompile.)
diff --git a/llvm/test/CodeGen/X86/fast-isel-args-fail.ll b/llvm/test/CodeGen/X86/fast-isel-args-fail.ll
index f10c9929534f1..ccd0717aa567a 100644
--- a/llvm/test/CodeGen/X86/fast-isel-args-fail.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-args-fail.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-apple-darwin10
-; RUN: llc < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-pc-win32 | FileCheck %s -check-prefix=WIN32
-; RUN: llc < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-pc-win64 | FileCheck %s -check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-apple-darwin10
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-pc-win32 | FileCheck %s -check-prefix=WIN32
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -verify-machineinstrs -mtriple=x86_64-pc-win64 | FileCheck %s -check-prefix=WIN64
; Previously, this would cause an assert.
define i31 @t1(i31 %a, i31 %b, i31 %c) {
diff --git a/llvm/test/CodeGen/X86/fast-isel-args-fail2.ll b/llvm/test/CodeGen/X86/fast-isel-args-fail2.ll
index 74bf052b468b5..6302c89677509 100644
--- a/llvm/test/CodeGen/X86/fast-isel-args-fail2.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-args-fail2.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -fast-isel -fast-isel-abort=2 -mtriple=x86_64-apple-darwin10 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=2 -mtriple=x86_64-apple-darwin10 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: FastISel didn't lower all arguments: ptr (ptr) (in function: args_fail)
diff --git a/llvm/test/CodeGen/X86/fast-isel-args.ll b/llvm/test/CodeGen/X86/fast-isel-args.ll
index bcd41b7a2bfec..1701580c9f2ec 100644
--- a/llvm/test/CodeGen/X86/fast-isel-args.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-args.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -fast-isel -fast-isel-abort=2 -verify-machineinstrs -mtriple=x86_64-apple-darwin10
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=2 -verify-machineinstrs -mtriple=x86_64-apple-darwin10
; Just make sure these don't abort when lowering the arguments.
define i32 @t1(i32 %a, i32 %b, i32 %c) {
diff --git a/llvm/test/CodeGen/X86/fast-isel-atomic.ll b/llvm/test/CodeGen/X86/fast-isel-atomic.ll
index 22e920a759c0f..478d891c858a2 100644
--- a/llvm/test/CodeGen/X86/fast-isel-atomic.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-atomic.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64--
; rdar://8204072
; PR7652
diff --git a/llvm/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll b/llvm/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll
index 4f3444da02a43..f2780f80912df 100644
--- a/llvm/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-avoid-unnecessary-pic-base.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -relocation-model=pic < %s | FileCheck %s
; CHECK-NOT: call
; rdar://8396318
diff --git a/llvm/test/CodeGen/X86/fast-isel-bail.ll b/llvm/test/CodeGen/X86/fast-isel-bail.ll
index 343345160df06..2c9ac4a415694 100644
--- a/llvm/test/CodeGen/X86/fast-isel-bail.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-bail.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -O0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -O0
; This file is for regression tests for cases where FastISel needs
; to gracefully bail out and let SelectionDAGISel take over.
diff --git a/llvm/test/CodeGen/X86/fast-isel-bc.ll b/llvm/test/CodeGen/X86/fast-isel-bc.ll
index 64bdfd6d4f863..a4b84f5ea2df0 100644
--- a/llvm/test/CodeGen/X86/fast-isel-bc.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-bc.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -mtriple=i686-apple-darwin9.8 -mattr=+mmx,+sse2 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -O0 -mtriple=x86_64-apple-darwin9.8 -mattr=+mmx,+sse2 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=i686-apple-darwin9.8 -mattr=+mmx,+sse2 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-apple-darwin9.8 -mattr=+mmx,+sse2 | FileCheck %s --check-prefixes=X64
; PR4684
diff --git a/llvm/test/CodeGen/X86/fast-isel-bitcast-crash.ll b/llvm/test/CodeGen/X86/fast-isel-bitcast-crash.ll
index 716a93a5aca7d..fca5ae4e53237 100644
--- a/llvm/test/CodeGen/X86/fast-isel-bitcast-crash.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-bitcast-crash.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -fast-isel -O1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -fast-isel -O1 | FileCheck %s
; This used to crash due to the bitcast in the entry block reusing the vreg
; from its input. This resulted in known bits being calculated on the v2i64
diff --git a/llvm/test/CodeGen/X86/fast-isel-bitcasts-avx.ll b/llvm/test/CodeGen/X86/fast-isel-bitcasts-avx.ll
index 03cefbc868228..28b5a29f773cb 100644
--- a/llvm/test/CodeGen/X86/fast-isel-bitcasts-avx.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-bitcasts-avx.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -fast-isel -fast-isel-abort=1 -asm-verbose=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -fast-isel -fast-isel-abort=1 -asm-verbose=0 | FileCheck %s
;
; Bitcasts between 256-bit vector types are no-ops since no instruction is
; needed for the conversion.
diff --git a/llvm/test/CodeGen/X86/fast-isel-bitcasts-avx512.ll b/llvm/test/CodeGen/X86/fast-isel-bitcasts-avx512.ll
index 7b81be3fc432c..1b769a56aed0d 100644
--- a/llvm/test/CodeGen/X86/fast-isel-bitcasts-avx512.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-bitcasts-avx512.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw -fast-isel -fast-isel-abort=1 -asm-verbose=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw -fast-isel -fast-isel-abort=1 -asm-verbose=0 | FileCheck %s
;
; Bitcasts between 512-bit vector types are no-ops since no instruction is
; needed for the conversion.
diff --git a/llvm/test/CodeGen/X86/fast-isel-bitcasts.ll b/llvm/test/CodeGen/X86/fast-isel-bitcasts.ll
index 892b517fe873c..ab6057d7247f4 100644
--- a/llvm/test/CodeGen/X86/fast-isel-bitcasts.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-bitcasts.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -fast-isel -fast-isel-abort=1 -asm-verbose=0 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -fast-isel -fast-isel-abort=1 -asm-verbose=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -fast-isel -fast-isel-abort=1 -asm-verbose=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -fast-isel -fast-isel-abort=1 -asm-verbose=0 | FileCheck %s
;
; Bitcasts between 128-bit vector types are no-ops since no instruction is
; needed for the conversion.
diff --git a/llvm/test/CodeGen/X86/fast-isel-branch_weights.ll b/llvm/test/CodeGen/X86/fast-isel-branch_weights.ll
index feb240f058637..805eb1e75fa76 100644
--- a/llvm/test/CodeGen/X86/fast-isel-branch_weights.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-branch_weights.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s
; Test if the BBs are reordred according to their branch weights.
define i64 @branch_weights_test(i64 %a, i64 %b) {
diff --git a/llvm/test/CodeGen/X86/fast-isel-call-bool.ll b/llvm/test/CodeGen/X86/fast-isel-call-bool.ll
index b9a5cecdf6449..572197e7a3e10 100644
--- a/llvm/test/CodeGen/X86/fast-isel-call-bool.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-call-bool.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -fast-isel -mcpu=core2 -mtriple=x86_64-unknown-unknown -O1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mcpu=core2 -mtriple=x86_64-unknown-unknown -O1 | FileCheck %s
; See PR21557
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/fast-isel-call-cleanup.ll b/llvm/test/CodeGen/X86/fast-isel-call-cleanup.ll
index 301d714e4df7d..349b0d925c660 100644
--- a/llvm/test/CodeGen/X86/fast-isel-call-cleanup.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-call-cleanup.ll
@@ -1,4 +1,4 @@
-; RUN: llc -fast-isel -O0 -code-model=large -mcpu=generic -mtriple=x86_64-linux -relocation-model=static < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -fast-isel -O0 -code-model=large -mcpu=generic -mtriple=x86_64-linux -relocation-model=static < %s | FileCheck %s
; Check that fast-isel cleans up when it fails to lower a call instruction.
define void @fastiselcall() {
diff --git a/llvm/test/CodeGen/X86/fast-isel-call.ll b/llvm/test/CodeGen/X86/fast-isel-call.ll
index 84632c65fcc0e..4ea9b8796b05b 100644
--- a/llvm/test/CodeGen/X86/fast-isel-call.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-call.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -O0 -fast-isel-abort=1 -mtriple=i686-apple-darwin8 2>/dev/null | FileCheck %s
-; RUN: llc < %s -O0 -fast-isel-abort=1 -mtriple=i686-apple-darwin8 2>&1 >/dev/null | FileCheck -check-prefix=STDERR -allow-empty %s
-; RUN: llc < %s -O0 -fast-isel-abort=1 -mtriple=i686 2>/dev/null | FileCheck %s --check-prefix=ELF
+; RUN: llc -combiner-topological-sorting < %s -O0 -fast-isel-abort=1 -mtriple=i686-apple-darwin8 2>/dev/null | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -fast-isel-abort=1 -mtriple=i686-apple-darwin8 2>&1 >/dev/null | FileCheck -check-prefix=STDERR -allow-empty %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -fast-isel-abort=1 -mtriple=i686 2>/dev/null | FileCheck %s --check-prefix=ELF
%struct.s = type {i32, i32, i32}
diff --git a/llvm/test/CodeGen/X86/fast-isel-cmp-branch.ll b/llvm/test/CodeGen/X86/fast-isel-cmp-branch.ll
index 4a5cddb30e031..04b4529558581 100644
--- a/llvm/test/CodeGen/X86/fast-isel-cmp-branch.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-cmp-branch.ll
@@ -1,5 +1,5 @@
-; RUN: llc -O0 -mtriple=x86_64-linux -asm-verbose=false -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -O0 -mtriple=x86_64-windows-itanium -asm-verbose=false -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-linux -asm-verbose=false -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-windows-itanium -asm-verbose=false -verify-machineinstrs < %s | FileCheck %s
; Fast-isel mustn't add a block to the MBB successor/predecessor list twice.
; The machine verifier will catch and complain about this case.
diff --git a/llvm/test/CodeGen/X86/fast-isel-constpool.ll b/llvm/test/CodeGen/X86/fast-isel-constpool.ll
index dc746e1daac50..fc9da83d8590d 100644
--- a/llvm/test/CodeGen/X86/fast-isel-constpool.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-constpool.ll
@@ -1,17 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=small < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=medium < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=large < %s | FileCheck %s --check-prefix=LARGE
-; RUN: llc -mtriple=x86_64 -fast-isel -code-model=large -relocation-model=pic < %s | FileCheck %s --check-prefix=LARGE_PIC
-; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=small -mattr=avx < %s | FileCheck %s --check-prefix=AVX
-; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=large -mattr=avx < %s | FileCheck %s --check-prefix=LARGE_AVX
-; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=small -mattr=avx512f < %s | FileCheck %s --check-prefix=AVX
-; RUN: llc -mtriple=x86_64-apple-darwin -fast-isel -code-model=large -mattr=avx512f < %s | FileCheck %s --check-prefix=LARGE_AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -fast-isel -code-model=small < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -fast-isel -code-model=medium < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -fast-isel -code-model=large < %s | FileCheck %s --check-prefix=LARGE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -fast-isel -code-model=large -relocation-model=pic < %s | FileCheck %s --check-prefix=LARGE_PIC
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -fast-isel -code-model=small -mattr=avx < %s | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -fast-isel -code-model=large -mattr=avx < %s | FileCheck %s --check-prefix=LARGE_AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -fast-isel -code-model=small -mattr=avx512f < %s | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -fast-isel -code-model=large -mattr=avx512f < %s | FileCheck %s --check-prefix=LARGE_AVX
; This large code mode shouldn't mean anything on x86 but it used to
; generate 64-bit only instructions and asserted in the encoder.
; -show-mc-encoding here to assert if this breaks again.
-; RUN: llc -mtriple=i686-apple-darwin -fast-isel -code-model=large -mattr=sse2 -show-mc-encoding < %s | FileCheck %s --check-prefix=X86-LARGE
+; RUN: llc -combiner-topological-sorting -mtriple=i686-apple-darwin -fast-isel -code-model=large -mattr=sse2 -show-mc-encoding < %s | FileCheck %s --check-prefix=X86-LARGE
; Make sure fast isel uses rip-relative addressing for the small code model.
define float @constpool_float(float %x) {
diff --git a/llvm/test/CodeGen/X86/fast-isel-constrain-store-indexreg.ll b/llvm/test/CodeGen/X86/fast-isel-constrain-store-indexreg.ll
index c40a38fdca325..1a62107740d19 100644
--- a/llvm/test/CodeGen/X86/fast-isel-constrain-store-indexreg.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-constrain-store-indexreg.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - -verify-machineinstrs | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-unknown"
diff --git a/llvm/test/CodeGen/X86/fast-isel-dbg-value-alloca.ll b/llvm/test/CodeGen/X86/fast-isel-dbg-value-alloca.ll
index 305aa82fbc810..b6984f457a0b4 100644
--- a/llvm/test/CodeGen/X86/fast-isel-dbg-value-alloca.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-dbg-value-alloca.ll
@@ -1,4 +1,4 @@
-; RUN: llc -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-unknown -stop-after=finalize-isel %s -o - | \
+; RUN: llc -combiner-topological-sorting -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-unknown -stop-after=finalize-isel %s -o - | \
; RUN: FileCheck %s
diff --git a/llvm/test/CodeGen/X86/fast-isel-deadcode.ll b/llvm/test/CodeGen/X86/fast-isel-deadcode.ll
index f66ebc9d41c25..b05931b32d59a 100644
--- a/llvm/test/CodeGen/X86/fast-isel-deadcode.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-deadcode.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
;
; Generated with clang -O2 -S -emit-llvm
;
diff --git a/llvm/test/CodeGen/X86/fast-isel-disable-tail-calls.ll b/llvm/test/CodeGen/X86/fast-isel-disable-tail-calls.ll
index c0aac5e1bd316..26bf4dc5f40c4 100644
--- a/llvm/test/CodeGen/X86/fast-isel-disable-tail-calls.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-disable-tail-calls.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -fast-isel -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -fast-isel -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
; CHECK-NOT: retq
; CHECK: jmpq
diff --git a/llvm/test/CodeGen/X86/fast-isel-divrem-x86-64.ll b/llvm/test/CodeGen/X86/fast-isel-divrem-x86-64.ll
index 9c04ea67d5198..9a2876075fb52 100644
--- a/llvm/test/CodeGen/X86/fast-isel-divrem-x86-64.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-divrem-x86-64.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
define i64 @test_sdiv64(i64 %dividend, i64 %divisor) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/fast-isel-divrem.ll b/llvm/test/CodeGen/X86/fast-isel-divrem.ll
index 45b9d6a0776db..316d53219cb12 100644
--- a/llvm/test/CodeGen/X86/fast-isel-divrem.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-divrem.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-none-linux -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s
define i8 @test_sdiv8(i8 %dividend, i8 %divisor) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/fast-isel-emutls.ll b/llvm/test/CodeGen/X86/fast-isel-emutls.ll
index 4ce00f5d16ed8..08c2c47d3f528 100644
--- a/llvm/test/CodeGen/X86/fast-isel-emutls.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-emutls.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -emulated-tls -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | FileCheck %s
-; RUN: llc < %s -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel \
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel \
; RUN: | FileCheck -check-prefix=NoEMU %s
-; RUN: llc < %s -relocation-model=pic -mtriple=i686-linux-android29 -fast-isel \
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -mtriple=i686-linux-android29 -fast-isel \
; RUN: | FileCheck -check-prefix=NoEMU %s
; PR3654
diff --git a/llvm/test/CodeGen/X86/fast-isel-expect.ll b/llvm/test/CodeGen/X86/fast-isel-expect.ll
index e804076304e30..ff8ac7a9ff432 100644
--- a/llvm/test/CodeGen/X86/fast-isel-expect.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-expect.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "i686-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/fast-isel-extract.ll b/llvm/test/CodeGen/X86/fast-isel-extract.ll
index 201c5ea9340d4..fa6d05c6f9e41 100644
--- a/llvm/test/CodeGen/X86/fast-isel-extract.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-extract.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple x86_64-apple-darwin11 -O0 -fast-isel-abort=1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-apple-darwin11 -O0 -fast-isel-abort=1 | FileCheck %s
%struct.x = type { i64, i64 }
declare %struct.x @f()
diff --git a/llvm/test/CodeGen/X86/fast-isel-fcmp.ll b/llvm/test/CodeGen/X86/fast-isel-fcmp.ll
index 2c826658a99b0..beee894bb3e65 100644
--- a/llvm/test/CodeGen/X86/fast-isel-fcmp.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-fcmp.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=SDAG
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=FAST,FAST_NOAVX
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=avx | FileCheck %s --check-prefixes=FAST,FAST_AVX
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=avx512f | FileCheck %s --check-prefixes=FAST,FAST_AVX
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=+zu | FileCheck %s --check-prefix=FAST_SETZUCC
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=+zu,+prefer-legacy-setcc | FileCheck %s --check-prefix=FAST_NO-SETZUCC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=SDAG
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=FAST,FAST_NOAVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=avx | FileCheck %s --check-prefixes=FAST,FAST_AVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=avx512f | FileCheck %s --check-prefixes=FAST,FAST_AVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=+zu | FileCheck %s --check-prefix=FAST_SETZUCC
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=+zu,+prefer-legacy-setcc | FileCheck %s --check-prefix=FAST_NO-SETZUCC
define zeroext i1 @fcmp_oeq(float %x, float %y) {
; SDAG-LABEL: fcmp_oeq:
diff --git a/llvm/test/CodeGen/X86/fast-isel-fold-mem.ll b/llvm/test/CodeGen/X86/fast-isel-fold-mem.ll
index 9bcd745b44cba..41f730f68ce0c 100644
--- a/llvm/test/CodeGen/X86/fast-isel-fold-mem.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-fold-mem.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin | FileCheck %s
define i64 @fold_load(ptr %a, i64 %b) {
; CHECK-LABEL: fold_load:
diff --git a/llvm/test/CodeGen/X86/fast-isel-fptrunc-fpext.ll b/llvm/test/CodeGen/X86/fast-isel-fptrunc-fpext.ll
index 00aa9cd8a27f3..68ca0b5033207 100644
--- a/llvm/test/CodeGen/X86/fast-isel-fptrunc-fpext.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-fptrunc-fpext.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX
;
; Verify that fast-isel doesn't select legacy SSE instructions on targets that
; feature AVX.
diff --git a/llvm/test/CodeGen/X86/fast-isel-freeze.ll b/llvm/test/CodeGen/X86/fast-isel-freeze.ll
index 031bccb018772..58b35d7d5a4d9 100644
--- a/llvm/test/CodeGen/X86/fast-isel-freeze.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-freeze.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=SDAG
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=SDAG
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=FAST
define i32 @freeze(i32 %t) {
; SDAG-LABEL: freeze:
diff --git a/llvm/test/CodeGen/X86/fast-isel-gc-intrinsics.ll b/llvm/test/CodeGen/X86/fast-isel-gc-intrinsics.ll
index fa321fa393c96..5e35f8dbae3d2 100644
--- a/llvm/test/CodeGen/X86/fast-isel-gc-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-gc-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -fast-isel
+; RUN: llc -combiner-topological-sorting < %s -fast-isel
target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/fast-isel-gep.ll b/llvm/test/CodeGen/X86/fast-isel-gep.ll
index 847559443e86d..21d8be2456026 100644
--- a/llvm/test/CodeGen/X86/fast-isel-gep.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-gep.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=x86_64-linux -O0 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-windows-itanium -O0 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686-- -O0 | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -O0 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-itanium -O0 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -O0 | FileCheck %s --check-prefix=X32
; GEP indices are interpreted as signed integers, so they
; should be sign-extended to 64 bits on 64-bit targets.
diff --git a/llvm/test/CodeGen/X86/fast-isel-gv.ll b/llvm/test/CodeGen/X86/fast-isel-gv.ll
index 112f55395c0f6..206611431912e 100644
--- a/llvm/test/CodeGen/X86/fast-isel-gv.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-gv.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -fast-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel | FileCheck %s
; CHECK: _kill at GOTPCREL(%rip)
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/fast-isel-i1.ll b/llvm/test/CodeGen/X86/fast-isel-i1.ll
index f4c658b731dad..5edfd2c10ed4c 100644
--- a/llvm/test/CodeGen/X86/fast-isel-i1.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-i1.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s
declare i32 @test1a(i32)
diff --git a/llvm/test/CodeGen/X86/fast-isel-int-float-conversion-x86-64.ll b/llvm/test/CodeGen/X86/fast-isel-int-float-conversion-x86-64.ll
index 5bf08f1c523d2..de1fbc51644d0 100644
--- a/llvm/test/CodeGen/X86/fast-isel-int-float-conversion-x86-64.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-int-float-conversion-x86-64.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+sse2 -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=SSE2
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+sse2 -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX
define double @long_to_double_rr(i64 %a) {
diff --git a/llvm/test/CodeGen/X86/fast-isel-int-float-conversion.ll b/llvm/test/CodeGen/X86/fast-isel-int-float-conversion.ll
index b39d9a7a3a6d0..b97cbe6ce9f1c 100644
--- a/llvm/test/CodeGen/X86/fast-isel-int-float-conversion.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-int-float-conversion.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+sse2 -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=SSE2
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX
-; RUN: llc -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+sse2 -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=SSE2_X86
-; RUN: llc -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+avx -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX_X86
-; RUN: llc -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX_X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+sse2 -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+sse2 -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=SSE2_X86
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+avx -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX_X86
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX_X86
define double @int_to_double_rr(i32 %a) {
diff --git a/llvm/test/CodeGen/X86/fast-isel-large-object.ll b/llvm/test/CodeGen/X86/fast-isel-large-object.ll
index 9acdfdeaf7cc9..5a4ed0d29ffee 100644
--- a/llvm/test/CodeGen/X86/fast-isel-large-object.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-large-object.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -fast-isel -mtriple=x86_64-unknown-unknown -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -fast-isel -mtriple=x86_64-unknown-unknown -relocation-model=pic < %s | FileCheck %s
@g = external dso_local global i32, code_model "large"
diff --git a/llvm/test/CodeGen/X86/fast-isel-load-bitcast-fold.ll b/llvm/test/CodeGen/X86/fast-isel-load-bitcast-fold.ll
index 74159cb4b7ea4..6bbbd679340b0 100644
--- a/llvm/test/CodeGen/X86/fast-isel-load-bitcast-fold.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-load-bitcast-fold.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 -mtriple=x86_64-- -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-- -verify-machineinstrs < %s | FileCheck %s
define void @repro(ptr %a0, i1 %a1) nounwind {
; CHECK-LABEL: repro:
diff --git a/llvm/test/CodeGen/X86/fast-isel-load-i1.ll b/llvm/test/CodeGen/X86/fast-isel-load-i1.ll
index 34ce8810251e0..43ff518c1e388 100644
--- a/llvm/test/CodeGen/X86/fast-isel-load-i1.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-load-i1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s
define i1 @test_i1(ptr %b) {
; CHECK-LABEL: test_i1:
diff --git a/llvm/test/CodeGen/X86/fast-isel-medium-code-model.ll b/llvm/test/CodeGen/X86/fast-isel-medium-code-model.ll
index 4aa230a209e28..cd094910f0787 100644
--- a/llvm/test/CodeGen/X86/fast-isel-medium-code-model.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-medium-code-model.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=3 -code-model=medium -large-data-threshold=5 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-linux-gnu -fast-isel -code-model=medium -large-data-threshold=3 < %s -o /dev/null \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=3 -code-model=medium -large-data-threshold=5 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -fast-isel -code-model=medium -large-data-threshold=3 < %s -o /dev/null \
; RUN: -pass-remarks-output=- -pass-remarks-filter=sdagisel | FileCheck %s --check-prefix=FALLBACK --implicit-check-not=missed
declare void @foo()
diff --git a/llvm/test/CodeGen/X86/fast-isel-mem.ll b/llvm/test/CodeGen/X86/fast-isel-mem.ll
index 91541713fa4d8..12ee1e49356ee 100644
--- a/llvm/test/CodeGen/X86/fast-isel-mem.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-mem.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -fast-isel -mtriple=i386-apple-darwin -mcpu=generic | FileCheck %s
-; RUN: llc < %s -fast-isel -mtriple=i386-apple-darwin -mcpu=atom | FileCheck -check-prefix=ATOM %s
-; RUN: llc < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64 | FileCheck -check-prefix=ELF64 %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-apple-darwin -mcpu=generic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-apple-darwin -mcpu=atom | FileCheck -check-prefix=ATOM %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=3 -mtriple=x86_64 | FileCheck -check-prefix=ELF64 %s
@src = external dso_preemptable global i32
diff --git a/llvm/test/CodeGen/X86/fast-isel-movsbl-indexreg.ll b/llvm/test/CodeGen/X86/fast-isel-movsbl-indexreg.ll
index 6280c46e69ed8..bda9d7bcbfb7a 100644
--- a/llvm/test/CodeGen/X86/fast-isel-movsbl-indexreg.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-movsbl-indexreg.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - -verify-machineinstrs -fast-isel=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - -verify-machineinstrs -fast-isel=true | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/fast-isel-nontemporal.ll b/llvm/test/CodeGen/X86/fast-isel-nontemporal.ll
index 3b1a8f541b490..0984ad2a40f11 100644
--- a/llvm/test/CodeGen/X86/fast-isel-nontemporal.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-nontemporal.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,SSE,SSE2
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse4a -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,SSE,SSE4A
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse4.1 -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,SSE,SSE41
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,AVX,AVX1
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx2 -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,AVX,AVX2
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx512vl -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,AVX512
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx512f -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,AVX512
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx512bw -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,AVX512
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse4a -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,SSE,SSE4A
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse4.1 -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx2 -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx512vl -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,AVX512
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx512f -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,AVX512
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx512bw -fast-isel -O0 | FileCheck %s --check-prefixes=ALL,AVX512
;
; Scalar Stores
diff --git a/llvm/test/CodeGen/X86/fast-isel-noplt-pic.ll b/llvm/test/CodeGen/X86/fast-isel-noplt-pic.ll
index 575ed365d6569..742a9ed14a645 100644
--- a/llvm/test/CodeGen/X86/fast-isel-noplt-pic.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-noplt-pic.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-unknown-linux-gnu -O0 -fast-isel=true -relocation-model=pic -filetype asm -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-linux-gnu -O0 -fast-isel=true -relocation-model=pic -filetype asm -o - %s | FileCheck %s
declare void @f() local_unnamed_addr #0
diff --git a/llvm/test/CodeGen/X86/fast-isel-prolog-dbgloc.ll b/llvm/test/CodeGen/X86/fast-isel-prolog-dbgloc.ll
index 1b22346b177fa..7bb5d288d5d12 100644
--- a/llvm/test/CodeGen/X86/fast-isel-prolog-dbgloc.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-prolog-dbgloc.ll
@@ -9,7 +9,7 @@
;; c5 = 's'; c6 = 'f'; s = 77;
;; }
-; RUN: llc -mtriple x86_64-- -fast-isel < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-- -fast-isel < %s | FileCheck %s
define dso_local void @call_7i_1f(i8 signext %c1, float %f1, i8 signext %c2, i8 signext %c3, i8 signext %c4, i8 signext %c5, i8 signext %c6, i16 signext %s) !dbg !7 {
entry:
diff --git a/llvm/test/CodeGen/X86/fast-isel-ret-ext.ll b/llvm/test/CodeGen/X86/fast-isel-ret-ext.ll
index 0341694fe826b..30508fe020439 100644
--- a/llvm/test/CodeGen/X86/fast-isel-ret-ext.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-ret-ext.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -O0 -fast-isel-abort=1 -mtriple i686-apple-darwin10 | FileCheck %s
-; RUN: llc < %s -O0 -fast-isel-abort=1 -mtriple x86_64-apple-darwin10 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -fast-isel-abort=1 -mtriple i686-apple-darwin10 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -fast-isel-abort=1 -mtriple x86_64-apple-darwin10 | FileCheck %s
define zeroext i8 @test1(i32 %y) nounwind {
%conv = trunc i32 %y to i8
diff --git a/llvm/test/CodeGen/X86/fast-isel-select-cmov2.ll b/llvm/test/CodeGen/X86/fast-isel-select-cmov2.ll
index 63be4ab25f556..92ebaab523bbe 100644
--- a/llvm/test/CodeGen/X86/fast-isel-select-cmov2.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-select-cmov2.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=CHECK --check-prefix=NOAVX --check-prefix=SDAG
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK --check-prefix=NOAVX --check-prefix=FAST
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mattr=avx | FileCheck %s --check-prefix=CHECK --check-prefix=FAST_AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mattr=avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=FAST_AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mattr=+zu | FileCheck %s --check-prefix=FAST_SETZUCC
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mattr=+zu,+prefer-legacy-setcc | FileCheck %s --check-prefix=FAST_NO-SETZUCC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=CHECK --check-prefix=NOAVX --check-prefix=SDAG
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK --check-prefix=NOAVX --check-prefix=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mattr=avx | FileCheck %s --check-prefix=CHECK --check-prefix=FAST_AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mattr=avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=FAST_AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mattr=+zu | FileCheck %s --check-prefix=FAST_SETZUCC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mattr=+zu,+prefer-legacy-setcc | FileCheck %s --check-prefix=FAST_NO-SETZUCC
; Test all the cmp predicates that can feed an integer conditional move.
diff --git a/llvm/test/CodeGen/X86/fast-isel-select-cmp.ll b/llvm/test/CodeGen/X86/fast-isel-select-cmp.ll
index 4a8e8792f98dc..597b6f1f391c0 100644
--- a/llvm/test/CodeGen/X86/fast-isel-select-cmp.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-select-cmp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -mtriple=x86_64-apple-darwin10 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-apple-darwin10 | FileCheck %s
; Test if we do not fold the cmp into select if the instructions are in
; different basic blocks.
diff --git a/llvm/test/CodeGen/X86/fast-isel-select-pseudo-cmov.ll b/llvm/test/CodeGen/X86/fast-isel-select-pseudo-cmov.ll
index 14f8ab6e41d59..546b09ce933b0 100644
--- a/llvm/test/CodeGen/X86/fast-isel-select-pseudo-cmov.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-select-pseudo-cmov.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=ISEL,SSE
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL,SSE
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=corei7-avx | FileCheck %s --check-prefixes=ISEL,AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mcpu=corei7-avx | FileCheck %s --check-prefixes=FASTISEL,AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=skylake-avx512 -verify-machineinstrs | FileCheck %s --check-prefixes=ISEL,AVX512,AVX512-ISEL
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mcpu=skylake-avx512 -verify-machineinstrs | FileCheck %s --check-prefixes=FASTISEL,AVX512,AVX512-FASTISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=ISEL,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -mcpu=corei7-avx | FileCheck %s --check-prefixes=ISEL,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mcpu=corei7-avx | FileCheck %s --check-prefixes=FASTISEL,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -mcpu=skylake-avx512 -verify-machineinstrs | FileCheck %s --check-prefixes=ISEL,AVX512,AVX512-ISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 -mcpu=skylake-avx512 -verify-machineinstrs | FileCheck %s --check-prefixes=FASTISEL,AVX512,AVX512-FASTISEL
define float @select_fcmp_one_f32(float %a, float %b, float %c, float %d) {
diff --git a/llvm/test/CodeGen/X86/fast-isel-select-sse.ll b/llvm/test/CodeGen/X86/fast-isel-select-sse.ll
index 6f3643436e65d..cc723582c285a 100644
--- a/llvm/test/CodeGen/X86/fast-isel-select-sse.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-select-sse.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -O0 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -O0 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -mattr=avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -mattr=avx512f | FileCheck %s --check-prefix=AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=avx512f | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -O0 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -O0 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -mattr=avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -mattr=avx512f | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=avx512f | FileCheck %s --check-prefix=AVX512
; Test all cmp predicates that can be used with SSE.
diff --git a/llvm/test/CodeGen/X86/fast-isel-select.ll b/llvm/test/CodeGen/X86/fast-isel-select.ll
index 83e8d0a9d418b..2cbf58993e4b8 100644
--- a/llvm/test/CodeGen/X86/fast-isel-select.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-select.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -O0 | FileCheck %s
; Make sure we only use the less significant bit of the value that feeds the
; select. Otherwise, we may account for a non-zero value whereas the
diff --git a/llvm/test/CodeGen/X86/fast-isel-sext-zext.ll b/llvm/test/CodeGen/X86/fast-isel-sext-zext.ll
index 7dae049d8e023..864836ca83efa 100644
--- a/llvm/test/CodeGen/X86/fast-isel-sext-zext.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-sext-zext.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=X64
define i8 @test1(i8 %x) nounwind {
; X32-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/fast-isel-sext.ll b/llvm/test/CodeGen/X86/fast-isel-sext.ll
index 918904a55a477..62ed2782b0bd7 100644
--- a/llvm/test/CodeGen/X86/fast-isel-sext.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-sext.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux -fast-isel -show-mc-encoding < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux -fast-isel -show-mc-encoding < %s | FileCheck %s
; CHECK-LABEL: f:
; CHECK: addl $-2, %eax # encoding: [0x83,0xc0,0xfe]
diff --git a/llvm/test/CodeGen/X86/fast-isel-sse12-fptoint.ll b/llvm/test/CodeGen/X86/fast-isel-sse12-fptoint.ll
index 2fbacbfdeae56..4c245310db40e 100644
--- a/llvm/test/CodeGen/X86/fast-isel-sse12-fptoint.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-sse12-fptoint.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX
define i32 @cvt_test1(float %a) {
; SSE-LABEL: cvt_test1
diff --git a/llvm/test/CodeGen/X86/fast-isel-stackcheck.ll b/llvm/test/CodeGen/X86/fast-isel-stackcheck.ll
index a4e5ae66b1fd8..5f518ff3304f2 100644
--- a/llvm/test/CodeGen/X86/fast-isel-stackcheck.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-stackcheck.ll
@@ -1,4 +1,4 @@
-; RUN: llc -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - %s | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx"
diff --git a/llvm/test/CodeGen/X86/fast-isel-store.ll b/llvm/test/CodeGen/X86/fast-isel-store.ll
index eba538d213392..17d9762f5c54f 100644
--- a/llvm/test/CodeGen/X86/fast-isel-store.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-store.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort=1 -mattr=+sse2 < %s | FileCheck %s --check-prefixes=X86,X86-SSE
-; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort=1 -mattr=+sse2 < %s | FileCheck %s --check-prefixes=X64,X64-SSE
-; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort=1 -mattr=+avx < %s | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX1
-; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort=1 -mattr=+avx < %s | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1
-; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort=1 -mattr=+avx512f < %s | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512
-; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort=1 -mattr=+avx512f < %s | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512
-; RUN: llc -mtriple=i686-none-linux -fast-isel -fast-isel-abort=1 -mattr=+avx512f,+avx512dq,+avx512bw < %s | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512
-; RUN: llc -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort=1 -mattr=+avx512vl,+avx512dq,+avx512bw < %s | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512
+; RUN: llc -combiner-topological-sorting -mtriple=i686-none-linux -fast-isel -fast-isel-abort=1 -mattr=+sse2 < %s | FileCheck %s --check-prefixes=X86,X86-SSE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort=1 -mattr=+sse2 < %s | FileCheck %s --check-prefixes=X64,X64-SSE
+; RUN: llc -combiner-topological-sorting -mtriple=i686-none-linux -fast-isel -fast-isel-abort=1 -mattr=+avx < %s | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX1
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort=1 -mattr=+avx < %s | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1
+; RUN: llc -combiner-topological-sorting -mtriple=i686-none-linux -fast-isel -fast-isel-abort=1 -mattr=+avx512f < %s | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort=1 -mattr=+avx512f < %s | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512
+; RUN: llc -combiner-topological-sorting -mtriple=i686-none-linux -fast-isel -fast-isel-abort=1 -mattr=+avx512f,+avx512dq,+avx512bw < %s | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-none-linux -fast-isel -fast-isel-abort=1 -mattr=+avx512vl,+avx512dq,+avx512bw < %s | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512
define i32 @test_store_32(ptr nocapture %addr, i32 %value) nounwind {
; X86-LABEL: test_store_32:
diff --git a/llvm/test/CodeGen/X86/fast-isel-tailcall.ll b/llvm/test/CodeGen/X86/fast-isel-tailcall.ll
index 018f5b8ab85fc..efb3f3c9e8957 100644
--- a/llvm/test/CodeGen/X86/fast-isel-tailcall.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-tailcall.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -fast-isel -tailcallopt -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -tailcallopt -mtriple=i686-- | FileCheck %s
; CHECK-NOT: add
; PR4154
diff --git a/llvm/test/CodeGen/X86/fast-isel-tls.ll b/llvm/test/CodeGen/X86/fast-isel-tls.ll
index ccd7856997c33..c040ee36b3700 100644
--- a/llvm/test/CodeGen/X86/fast-isel-tls.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-tls.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | FileCheck %s
; PR3654
@v = thread_local global i32 0
diff --git a/llvm/test/CodeGen/X86/fast-isel-trunc-kill-subreg.ll b/llvm/test/CodeGen/X86/fast-isel-trunc-kill-subreg.ll
index 96a1a2dea1790..d364df06c42c9 100644
--- a/llvm/test/CodeGen/X86/fast-isel-trunc-kill-subreg.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-trunc-kill-subreg.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - -fast-isel=true -O1 -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - -fast-isel=true -O1 -verify-machineinstrs | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-unknown"
diff --git a/llvm/test/CodeGen/X86/fast-isel-uint-float-conversion-x86-64.ll b/llvm/test/CodeGen/X86/fast-isel-uint-float-conversion-x86-64.ll
index 77ef9ee5ad2b7..ff0be1c2f0323 100644
--- a/llvm/test/CodeGen/X86/fast-isel-uint-float-conversion-x86-64.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-uint-float-conversion-x86-64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=ALL
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=ALL
define double @long_to_double_rr(i64 %a) {
diff --git a/llvm/test/CodeGen/X86/fast-isel-uint-float-conversion.ll b/llvm/test/CodeGen/X86/fast-isel-uint-float-conversion.ll
index de5765baeb9d5..30033ebd36415 100644
--- a/llvm/test/CodeGen/X86/fast-isel-uint-float-conversion.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-uint-float-conversion.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX
-; RUN: llc -verify-machineinstrs -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX_X86
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i686-unknown-unknown -mcpu=generic -mattr=+avx512f -fast-isel --fast-isel-abort=1 < %s | FileCheck %s --check-prefix=AVX_X86
define double @int_to_double_rr(i32 %a) {
diff --git a/llvm/test/CodeGen/X86/fast-isel-undef-fp.ll b/llvm/test/CodeGen/X86/fast-isel-undef-fp.ll
index f43dc674fa6aa..fa36c628482a9 100644
--- a/llvm/test/CodeGen/X86/fast-isel-undef-fp.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-undef-fp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc %s -o - -verify-machineinstrs -fast-isel=true -mattr=-sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - -verify-machineinstrs -fast-isel=true -mattr=-sse | FileCheck %s
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/fast-isel-vecload.ll b/llvm/test/CodeGen/X86/fast-isel-vecload.ll
index b0be66ed2a6f7..3f0e7003f3ed0 100644
--- a/llvm/test/CodeGen/X86/fast-isel-vecload.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-vecload.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s --check-prefix=SSE
-; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefixes=AVX,AVXONLY
-; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-unknown -mattr=+avx512f < %s | FileCheck %s --check-prefixes=AVX,AVX512
-; RUN: llc -O0 -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512bw,+avx512vl < %s | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting -O0 -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting -O0 -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefixes=AVX,AVXONLY
+; RUN: llc -combiner-topological-sorting -O0 -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-unknown -mattr=+avx512f < %s | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting -O0 -fast-isel -fast-isel-abort=1 -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512bw,+avx512vl < %s | FileCheck %s --check-prefixes=AVX,AVX512
; Verify that fast-isel knows how to select aligned/unaligned vector loads.
; Also verify that the selected load instruction is in the correct domain.
diff --git a/llvm/test/CodeGen/X86/fast-isel-x32.ll b/llvm/test/CodeGen/X86/fast-isel-x32.ll
index e01cebecdbb0a..dee708e11d92c 100644
--- a/llvm/test/CodeGen/X86/fast-isel-x32.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-x32.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -fast-isel -fast-isel-abort=1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 -fast-isel -fast-isel-abort=1 | FileCheck %s
; Test that alloca addresses are materialized with the right size instruction.
diff --git a/llvm/test/CodeGen/X86/fast-isel-x86-64.ll b/llvm/test/CodeGen/X86/fast-isel-x86-64.ll
index 4db7f0ccb4eae..837275d63a9f1 100644
--- a/llvm/test/CodeGen/X86/fast-isel-x86-64.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-x86-64.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mattr=-avx -fast-isel -mcpu=core2 -O0 -regalloc=fast -asm-verbose=0 -fast-isel-abort=1 | FileCheck %s
-; RUN: llc < %s -mattr=-avx -fast-isel -mcpu=core2 -O0 -regalloc=fast -asm-verbose=0 -pass-remarks-missed=isel 2>&1 >/dev/null | FileCheck %s --check-prefix=STDERR --allow-empty
-; RUN: llc < %s -mattr=+avx -fast-isel -mcpu=core2 -O0 -regalloc=fast -asm-verbose=0 -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mattr=-avx -fast-isel -mcpu=core2 -O0 -regalloc=fast -asm-verbose=0 -fast-isel-abort=1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=-avx -fast-isel -mcpu=core2 -O0 -regalloc=fast -asm-verbose=0 -pass-remarks-missed=isel 2>&1 >/dev/null | FileCheck %s --check-prefix=STDERR --allow-empty
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx -fast-isel -mcpu=core2 -O0 -regalloc=fast -asm-verbose=0 -fast-isel-abort=1 | FileCheck %s --check-prefix=AVX
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
diff --git a/llvm/test/CodeGen/X86/fast-isel-x86.ll b/llvm/test/CodeGen/X86/fast-isel-x86.ll
index b076537bfd6da..a6e20a80f7664 100644
--- a/llvm/test/CodeGen/X86/fast-isel-x86.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-x86.ll
@@ -1,5 +1,5 @@
-; RUN: llc -fast-isel -O0 -mcpu=generic -mtriple=i386-apple-darwin10 -relocation-model=pic < %s | FileCheck %s
-; RUN: llc -fast-isel -O0 -mcpu=generic -mtriple=i386-apple-darwin10 -relocation-model=pic < %s -pass-remarks-missed=isel 2>&1 >/dev/null | FileCheck -check-prefix=STDERR -allow-empty %s
+; RUN: llc -combiner-topological-sorting -fast-isel -O0 -mcpu=generic -mtriple=i386-apple-darwin10 -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -fast-isel -O0 -mcpu=generic -mtriple=i386-apple-darwin10 -relocation-model=pic < %s -pass-remarks-missed=isel 2>&1 >/dev/null | FileCheck -check-prefix=STDERR -allow-empty %s
; This should use flds to set the return value.
; CHECK-LABEL: test0:
diff --git a/llvm/test/CodeGen/X86/fast-isel.ll b/llvm/test/CodeGen/X86/fast-isel.ll
index 2a0efaa52e91a..f67df8d265612 100644
--- a/llvm/test/CodeGen/X86/fast-isel.ll
+++ b/llvm/test/CodeGen/X86/fast-isel.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=i686-- -mattr=sse2 -no-integrated-as
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=x86_64-apple-darwin10 -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=i686-- -mattr=sse2 -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -verify-machineinstrs -mtriple=x86_64-apple-darwin10 -no-integrated-as
; This tests very minimal fast-isel functionality.
diff --git a/llvm/test/CodeGen/X86/fastcall-correct-mangling.ll b/llvm/test/CodeGen/X86/fastcall-correct-mangling.ll
index 4840308a5d498..2c730a0278ece 100644
--- a/llvm/test/CodeGen/X86/fastcall-correct-mangling.ll
+++ b/llvm/test/CodeGen/X86/fastcall-correct-mangling.ll
@@ -1,13 +1,13 @@
-; RUN: llc < %s -mtriple=i386-unknown-mingw32 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-mingw32 | \
; RUN: FileCheck --check-prefix=CHECK32 %s
-; RUN: llc < %s -mtriple=i386-unknown-win32 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-win32 | \
; RUN: FileCheck --check-prefix=CHECK32 %s
-; RUN: llc < %s -mtriple=x86_64-unknown-mingw32 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-mingw32 | \
; RUN: FileCheck --check-prefix=CHECK64 %s
-; RUN: llc < %s -mtriple=x86_64-unknown-mingw32 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-mingw32 | \
; RUN: FileCheck --check-prefix=CHECK64 %s
; Check that a fastcall function gets correct mangling
diff --git a/llvm/test/CodeGen/X86/fastcc-2.ll b/llvm/test/CodeGen/X86/fastcc-2.ll
index e11cdd19723aa..e95b080c076c7 100644
--- a/llvm/test/CodeGen/X86/fastcc-2.ll
+++ b/llvm/test/CodeGen/X86/fastcc-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+sse2 | FileCheck %s
; CHECK: movsd
; CHECK-NOT: mov
diff --git a/llvm/test/CodeGen/X86/fastcc-byval.ll b/llvm/test/CodeGen/X86/fastcc-byval.ll
index 920291a73ecd6..5f0293b98fbd0 100644
--- a/llvm/test/CodeGen/X86/fastcc-byval.ll
+++ b/llvm/test/CodeGen/X86/fastcc-byval.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc < %s -tailcallopt=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -tailcallopt=false | FileCheck %s
; PR3122
; rdar://6400815
diff --git a/llvm/test/CodeGen/X86/fastcc-sret.ll b/llvm/test/CodeGen/X86/fastcc-sret.ll
index 25b0d9c5a67da..0071c0a7d0099 100644
--- a/llvm/test/CodeGen/X86/fastcc-sret.ll
+++ b/llvm/test/CodeGen/X86/fastcc-sret.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -tailcallopt=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -tailcallopt=false | FileCheck %s
%struct.foo = type { [4 x i32] }
diff --git a/llvm/test/CodeGen/X86/fastcc.ll b/llvm/test/CodeGen/X86/fastcc.ll
index fb7d34153abee..44b185ebca4ee 100644
--- a/llvm/test/CodeGen/X86/fastcc.ll
+++ b/llvm/test/CodeGen/X86/fastcc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 -post-RA-scheduler=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+sse2 -post-RA-scheduler=false | FileCheck %s
; CHECK: movsd %xmm{{[0-9]}}, 8(%esp)
; CHECK: xorl %eax, %eax
diff --git a/llvm/test/CodeGen/X86/fastcc3struct.ll b/llvm/test/CodeGen/X86/fastcc3struct.ll
index b8e2631248ab6..f70e2345d33f1 100644
--- a/llvm/test/CodeGen/X86/fastcc3struct.ll
+++ b/llvm/test/CodeGen/X86/fastcc3struct.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; CHECK: movl {{.}}12, %eax
; CHECK: movl {{.}}24, %edx
diff --git a/llvm/test/CodeGen/X86/fastisel-gep-promote-before-add.ll b/llvm/test/CodeGen/X86/fastisel-gep-promote-before-add.ll
index b36c8a431cd5c..83a26e5c15cba 100644
--- a/llvm/test/CodeGen/X86/fastisel-gep-promote-before-add.ll
+++ b/llvm/test/CodeGen/X86/fastisel-gep-promote-before-add.ll
@@ -1,6 +1,6 @@
; fastisel should not fold add with non-pointer bitwidth
; sext(a) + sext(b) != sext(a + b)
-; RUN: llc -mtriple=x86_64-apple-darwin %s -O0 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin %s -O0 -o - | FileCheck %s
define zeroext i8 @gep_promotion(ptr %ptr) nounwind uwtable ssp {
entry:
diff --git a/llvm/test/CodeGen/X86/fastisel-memset-flush.ll b/llvm/test/CodeGen/X86/fastisel-memset-flush.ll
index 06feaad13b44b..ac04f985c74b7 100644
--- a/llvm/test/CodeGen/X86/fastisel-memset-flush.ll
+++ b/llvm/test/CodeGen/X86/fastisel-memset-flush.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64 -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -O0 < %s | FileCheck %s
define dso_local void @foo() !dbg !7 {
entry:
diff --git a/llvm/test/CodeGen/X86/fastisel-softfloat.ll b/llvm/test/CodeGen/X86/fastisel-softfloat.ll
index 579637e834466..85d20b8d52732 100644
--- a/llvm/test/CodeGen/X86/fastisel-softfloat.ll
+++ b/llvm/test/CodeGen/X86/fastisel-softfloat.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll b/llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
index 1bc94b106d398..95707f8143a7b 100644
--- a/llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
+++ b/llvm/test/CodeGen/X86/fastmath-float-half-conversion.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+f16c < %s | FileCheck %s --check-prefix=ALL
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix=ALL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+f16c < %s | FileCheck %s --check-prefix=ALL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix=ALL
define zeroext i16 @test1_fast(double %d) #0 {
; ALL-LABEL: test1_fast:
diff --git a/llvm/test/CodeGen/X86/fat-lto-section.ll b/llvm/test/CodeGen/X86/fat-lto-section.ll
index f3ca8436affb4..1e85ef0cd37f1 100644
--- a/llvm/test/CodeGen/X86/fat-lto-section.ll
+++ b/llvm/test/CodeGen/X86/fat-lto-section.ll
@@ -1,6 +1,6 @@
;; Ensure that the .llvm.lto section has SHT_EXCLUDE set.
; RUN: opt --mtriple x86_64-unknown-linux-gnu < %s -passes="embed-bitcode<thinlto;emit-summary>" -S \
-; RUN: | llc --mtriple x86_64-unknown-linux-gnu -filetype=obj \
+; RUN: | llc -combiner-topological-sorting --mtriple x86_64-unknown-linux-gnu -filetype=obj \
; RUN: | llvm-readelf - --sections \
; RUN: | FileCheck %s --check-prefix=EXCLUDE
diff --git a/llvm/test/CodeGen/X86/fcmp-constant.ll b/llvm/test/CodeGen/X86/fcmp-constant.ll
index 335cb28213f92..a5300098213a5 100644
--- a/llvm/test/CodeGen/X86/fcmp-constant.ll
+++ b/llvm/test/CodeGen/X86/fcmp-constant.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
;
; fcmp oeq
diff --git a/llvm/test/CodeGen/X86/fcmp-logic.ll b/llvm/test/CodeGen/X86/fcmp-logic.ll
index 98fa725b2ea3a..7372bf1aed685 100644
--- a/llvm/test/CodeGen/X86/fcmp-logic.ll
+++ b/llvm/test/CodeGen/X86/fcmp-logic.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=sse2 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512f | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=sse2 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx512f | FileCheck %s --check-prefixes=AVX,AVX512
define i1 @olt_ole_and_f32(float %w, float %x, float %y, float %z) {
; SSE2-LABEL: olt_ole_and_f32:
diff --git a/llvm/test/CodeGen/X86/fdiv-combine.ll b/llvm/test/CodeGen/X86/fdiv-combine.ll
index 1abcdc3cca9b7..43c68017239bc 100644
--- a/llvm/test/CodeGen/X86/fdiv-combine.ll
+++ b/llvm/test/CodeGen/X86/fdiv-combine.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s
; More than one 'arcp' division using a single divisor operand
; should be converted into a reciprocal and multiplication.
diff --git a/llvm/test/CodeGen/X86/fentry-ibt.ll b/llvm/test/CodeGen/X86/fentry-ibt.ll
index dc661b61ddfcd..9261282fe8dfc 100644
--- a/llvm/test/CodeGen/X86/fentry-ibt.ll
+++ b/llvm/test/CodeGen/X86/fentry-ibt.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - -verify-machineinstrs -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - -verify-machineinstrs -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define void @test1() #0 {
entry:
diff --git a/llvm/test/CodeGen/X86/fentry-insertion.ll b/llvm/test/CodeGen/X86/fentry-insertion.ll
index 221f052fce681..68cdfe7640bc0 100644
--- a/llvm/test/CodeGen/X86/fentry-insertion.ll
+++ b/llvm/test/CodeGen/X86/fentry-insertion.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - -verify-machineinstrs | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/field-extract-use-trunc.ll b/llvm/test/CodeGen/X86/field-extract-use-trunc.ll
index b9721d2491054..62453c893f49e 100644
--- a/llvm/test/CodeGen/X86/field-extract-use-trunc.ll
+++ b/llvm/test/CodeGen/X86/field-extract-use-trunc.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=i686
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=x86_64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefix=i686
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=x86_64
define i32 @test(i32 %f12) nounwind {
; i686-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/fildll.ll b/llvm/test/CodeGen/X86/fildll.ll
index 43c5525f6068c..f4f57745f5ea4 100644
--- a/llvm/test/CodeGen/X86/fildll.ll
+++ b/llvm/test/CodeGen/X86/fildll.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=att -mattr=-sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -x86-asm-syntax=att -mattr=-sse2 | FileCheck %s
define fastcc double @sint64_to_fp(i64 %X) {
; CHECK-LABEL: sint64_to_fp:
diff --git a/llvm/test/CodeGen/X86/file-directive.ll b/llvm/test/CodeGen/X86/file-directive.ll
index 35a07b0b4f407..1564c7c9df705 100644
--- a/llvm/test/CodeGen/X86/file-directive.ll
+++ b/llvm/test/CodeGen/X86/file-directive.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-linux-gnu -filetype=asm < %s | FileCheck %s --check-prefix=DIRECTIVE
-; RUN: llc -mtriple=x86_64-linux-gnu -filetype=obj < %s | llvm-readobj --symbols - | FileCheck %s --check-prefix=STT-FILE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -filetype=asm < %s | FileCheck %s --check-prefix=DIRECTIVE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -filetype=obj < %s | llvm-readobj --symbols - | FileCheck %s --check-prefix=STT-FILE
; DIRECTIVE: .file "foobar"
; STT-FILE: Name: foobar
diff --git a/llvm/test/CodeGen/X86/file-source-filename.ll b/llvm/test/CodeGen/X86/file-source-filename.ll
index 146da9e16c959..b0976df61d883 100644
--- a/llvm/test/CodeGen/X86/file-source-filename.ll
+++ b/llvm/test/CodeGen/X86/file-source-filename.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu < %s | FileCheck %s
; CHECK: .file "foobar"
source_filename = "foobar"
diff --git a/llvm/test/CodeGen/X86/finite-libcalls.ll b/llvm/test/CodeGen/X86/finite-libcalls.ll
index acc7ddeb9a886..d8c60740c40cb 100644
--- a/llvm/test/CodeGen/X86/finite-libcalls.ll
+++ b/llvm/test/CodeGen/X86/finite-libcalls.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s --check-prefix=GNU
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s --check-prefix=WIN
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefix=MAC
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s --check-prefix=GNU
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s --check-prefix=WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefix=MAC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
; PR35672 - https://bugs.llvm.org/show_bug.cgi?id=35672
; FIXME: We would not need the function-level attributes if FMF were propagated to DAG nodes for this case.
diff --git a/llvm/test/CodeGen/X86/fixed-stack-di-mir.ll b/llvm/test/CodeGen/X86/fixed-stack-di-mir.ll
index a2f6ef025da56..454a474dab10c 100644
--- a/llvm/test/CodeGen/X86/fixed-stack-di-mir.ll
+++ b/llvm/test/CodeGen/X86/fixed-stack-di-mir.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-unknown -stop-before=finalize-isel %s -o - -simplify-mir | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-unknown -stop-before=finalize-isel %s -o - -simplify-mir | FileCheck %s
; The byval argument of the function will be allocated a fixed stack slot. Test
; that we serialize the fixed slot correctly.
diff --git a/llvm/test/CodeGen/X86/fixup-blend.ll b/llvm/test/CodeGen/X86/fixup-blend.ll
index d64dd6d3114a6..9c4da6f5992b4 100644
--- a/llvm/test/CodeGen/X86/fixup-blend.ll
+++ b/llvm/test/CodeGen/X86/fixup-blend.ll
@@ -1,13 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s -check-prefixes=SSE,SSE-MOV,SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s -check-prefixes=SSE,SSE4,SSE4-BLEND
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=slm | FileCheck %s -check-prefixes=SSE,SSE-MOV,SSE4,SSE4-MOV
-
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=sandybridge | FileCheck %s -check-prefixes=AVX,AVX1,AVX-BLEND,AVX1-BLEND
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s -check-prefixes=AVX,AVX1,AVX-MOV,AVX1-MOV
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s -check-prefixes=AVX,AVX2,AVX-BLEND,AVX2-BLEND
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s -check-prefixes=AVX,AVX2,AVX-BLEND,AVX2-BLEND
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=alderlake | FileCheck %s -check-prefixes=AVX,AVX2,AVX-MOV,AVX2-MOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s -check-prefixes=SSE,SSE-MOV,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s -check-prefixes=SSE,SSE4,SSE4-BLEND
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=slm | FileCheck %s -check-prefixes=SSE,SSE-MOV,SSE4,SSE4-MOV
+
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=sandybridge | FileCheck %s -check-prefixes=AVX,AVX1,AVX-BLEND,AVX1-BLEND
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s -check-prefixes=AVX,AVX1,AVX-MOV,AVX1-MOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s -check-prefixes=AVX,AVX2,AVX-BLEND,AVX2-BLEND
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s -check-prefixes=AVX,AVX2,AVX-BLEND,AVX2-BLEND
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=alderlake | FileCheck %s -check-prefixes=AVX,AVX2,AVX-MOV,AVX2-MOV
;
; v2f64 patterns
diff --git a/llvm/test/CodeGen/X86/fixup-bw-copy.ll b/llvm/test/CodeGen/X86/fixup-bw-copy.ll
index 2af90469f4cce..722691556ce41 100644
--- a/llvm/test/CodeGen/X86/fixup-bw-copy.ll
+++ b/llvm/test/CodeGen/X86/fixup-bw-copy.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -fixup-byte-word-insts=1 -mtriple=x86_64-- < %s | FileCheck --check-prefix=X64 %s
-; RUN: llc -verify-machineinstrs -fixup-byte-word-insts=0 -mtriple=x86_64-- < %s | FileCheck --check-prefix=X64 %s
-; RUN: llc -verify-machineinstrs -fixup-byte-word-insts=1 -mtriple=i386-- < %s | FileCheck --check-prefixes=X86,X86-BWON %s
-; RUN: llc -verify-machineinstrs -fixup-byte-word-insts=0 -mtriple=i386-- < %s | FileCheck --check-prefixes=X86,X86-BWOFF %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -fixup-byte-word-insts=1 -mtriple=x86_64-- < %s | FileCheck --check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -fixup-byte-word-insts=0 -mtriple=x86_64-- < %s | FileCheck --check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -fixup-byte-word-insts=1 -mtriple=i386-- < %s | FileCheck --check-prefixes=X86,X86-BWON %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -fixup-byte-word-insts=0 -mtriple=i386-- < %s | FileCheck --check-prefixes=X86,X86-BWOFF %s
target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
diff --git a/llvm/test/CodeGen/X86/fixup-bw-inst.ll b/llvm/test/CodeGen/X86/fixup-bw-inst.ll
index 4301498912003..2e316640fd4a8 100644
--- a/llvm/test/CodeGen/X86/fixup-bw-inst.ll
+++ b/llvm/test/CodeGen/X86/fixup-bw-inst.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -fixup-byte-word-insts=1 < %s | FileCheck %s -check-prefix=BWON
-; RUN: llc -fixup-byte-word-insts=0 < %s | FileCheck %s -check-prefix=BWOFF
+; RUN: llc -combiner-topological-sorting -fixup-byte-word-insts=1 < %s | FileCheck %s -check-prefix=BWON
+; RUN: llc -combiner-topological-sorting -fixup-byte-word-insts=0 < %s | FileCheck %s -check-prefix=BWOFF
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.8.0"
diff --git a/llvm/test/CodeGen/X86/float-asmprint.ll b/llvm/test/CodeGen/X86/float-asmprint.ll
index 879bcf39e5925..e603e097eea70 100644
--- a/llvm/test/CodeGen/X86/float-asmprint.ll
+++ b/llvm/test/CodeGen/X86/float-asmprint.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-none-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-none-linux < %s | FileCheck %s
; Check that all current floating-point types are correctly emitted to assembly
; on a little-endian target.
diff --git a/llvm/test/CodeGen/X86/float-conv-elim.ll b/llvm/test/CodeGen/X86/float-conv-elim.ll
index 2a543df03eb82..d6d4a2541800b 100644
--- a/llvm/test/CodeGen/X86/float-conv-elim.ll
+++ b/llvm/test/CodeGen/X86/float-conv-elim.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-- -mcpu=x86-64 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -mcpu=x86-64 < %s | FileCheck %s
define i32 @u8_f32_s32(i8 %a) {
; CHECK-LABEL: u8_f32_s32:
diff --git a/llvm/test/CodeGen/X86/float-strict-powi-convert.ll b/llvm/test/CodeGen/X86/float-strict-powi-convert.ll
index b39f5ec667cec..46fe0fdeff338 100644
--- a/llvm/test/CodeGen/X86/float-strict-powi-convert.ll
+++ b/llvm/test/CodeGen/X86/float-strict-powi-convert.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-pc-windows-msvc %s -o - | FileCheck %s -check-prefix=WIN
-; RUN: llc -mtriple=x86_64-pc-linux %s -o -| FileCheck %s -check-prefix=UNIX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc %s -o - | FileCheck %s -check-prefix=WIN
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux %s -o -| FileCheck %s -check-prefix=UNIX
declare float @llvm.experimental.constrained.powi.f32(float, i32, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/floor-soft-float.ll b/llvm/test/CodeGen/X86/floor-soft-float.ll
index ad98c34e464ea..62d21ce21230a 100644
--- a/llvm/test/CodeGen/X86/floor-soft-float.ll
+++ b/llvm/test/CodeGen/X86/floor-soft-float.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mattr=+sse4.1,-avx | FileCheck %s --check-prefix=CHECK-HARD-FLOAT
-; RUN: llc < %s -mattr=+sse4.1,-avx,+soft-float | FileCheck %s --check-prefix=CHECK-SOFT-FLOAT
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sse4.1,-avx | FileCheck %s --check-prefix=CHECK-HARD-FLOAT
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sse4.1,-avx,+soft-float | FileCheck %s --check-prefix=CHECK-SOFT-FLOAT
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/flt-rounds.ll b/llvm/test/CodeGen/X86/flt-rounds.ll
index 1d7a8d8456c27..b38020b07d76b 100644
--- a/llvm/test/CodeGen/X86/flt-rounds.ll
+++ b/llvm/test/CodeGen/X86/flt-rounds.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=-sse -verify-machineinstrs < %s | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=-sse2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s --check-prefixes=X64,SDAG-X64
-; RUN: llc -mtriple=i686-unknown-linux-gnu -global-isel=1 -global-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -global-isel=1 -global-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=X64,GISEL-X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=-sse -verify-machineinstrs < %s | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=-sse2 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -global-isel=1 -global-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -global-isel=1 -global-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=X64,GISEL-X64
declare i32 @llvm.get.rounding()
diff --git a/llvm/test/CodeGen/X86/fltused.ll b/llvm/test/CodeGen/X86/fltused.ll
index 3b04491aae83e..7e7c352987be5 100644
--- a/llvm/test/CodeGen/X86/fltused.ll
+++ b/llvm/test/CodeGen/X86/fltused.ll
@@ -1,10 +1,10 @@
; The purpose of this test to verify that the fltused symbol is
; emitted when a floating point call is made on Windows.
-; RUN: llc < %s -mtriple i686-pc-win32 | FileCheck %s --check-prefix WIN32
-; RUN: llc < %s -mtriple x86_64-pc-win32 | FileCheck %s --check-prefix WIN64
-; RUN: llc < %s -O0 -mtriple i686-pc-win32 | FileCheck %s --check-prefix WIN32
-; RUN: llc < %s -O0 -mtriple x86_64-pc-win32 | FileCheck %s --check-prefix WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple i686-pc-win32 | FileCheck %s --check-prefix WIN32
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-pc-win32 | FileCheck %s --check-prefix WIN64
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple i686-pc-win32 | FileCheck %s --check-prefix WIN32
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple x86_64-pc-win32 | FileCheck %s --check-prefix WIN64
@.str = private constant [4 x i8] c"%f\0A\00"
diff --git a/llvm/test/CodeGen/X86/fltused_function_pointer.ll b/llvm/test/CodeGen/X86/fltused_function_pointer.ll
index 61b0bf99f512e..bc378bd1d9bd6 100644
--- a/llvm/test/CodeGen/X86/fltused_function_pointer.ll
+++ b/llvm/test/CodeGen/X86/fltused_function_pointer.ll
@@ -1,10 +1,10 @@
; The purpose of this test to verify that the fltused symbol is
; emitted when a floating point call is made on Windows.
-; RUN: llc < %s -mtriple i686-pc-win32 | FileCheck %s --check-prefix WIN32
-; RUN: llc < %s -mtriple x86_64-pc-win32 | FileCheck %s --check-prefix WIN64
-; RUN: llc < %s -O0 -mtriple i686-pc-win32 | FileCheck %s --check-prefix WIN32
-; RUN: llc < %s -O0 -mtriple x86_64-pc-win32 | FileCheck %s --check-prefix WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple i686-pc-win32 | FileCheck %s --check-prefix WIN32
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-pc-win32 | FileCheck %s --check-prefix WIN64
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple i686-pc-win32 | FileCheck %s --check-prefix WIN32
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple x86_64-pc-win32 | FileCheck %s --check-prefix WIN64
@.str = private constant [4 x i8] c"%f\0A\00"
diff --git a/llvm/test/CodeGen/X86/fltused_math.ll b/llvm/test/CodeGen/X86/fltused_math.ll
index 6f0348e9d3085..ba9834b553906 100644
--- a/llvm/test/CodeGen/X86/fltused_math.ll
+++ b/llvm/test/CodeGen/X86/fltused_math.ll
@@ -1,10 +1,10 @@
; The purpose of this test to verify that the fltused symbol is
; emitted when floating point operations are used on Windows.
-; RUN: llc < %s -mtriple i686-pc-win32 | FileCheck %s --check-prefix WIN32
-; RUN: llc < %s -mtriple x86_64-pc-win32 | FileCheck %s --check-prefix WIN64
-; RUN: llc < %s -O0 -mtriple i686-pc-win32 | FileCheck %s --check-prefix WIN32
-; RUN: llc < %s -O0 -mtriple x86_64-pc-win32 | FileCheck %s --check-prefix WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple i686-pc-win32 | FileCheck %s --check-prefix WIN32
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-pc-win32 | FileCheck %s --check-prefix WIN64
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple i686-pc-win32 | FileCheck %s --check-prefix WIN32
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple x86_64-pc-win32 | FileCheck %s --check-prefix WIN64
define i32 @foo(i32 %a) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/fltused_vec.ll b/llvm/test/CodeGen/X86/fltused_vec.ll
index 6e63e2e7ff891..6f7b8d1f9e4d9 100644
--- a/llvm/test/CodeGen/X86/fltused_vec.ll
+++ b/llvm/test/CodeGen/X86/fltused_vec.ll
@@ -1,8 +1,8 @@
; The purpose of this test to verify that the fltused symbol is
; not emitted when purely vector floating point operations are used on Windows.
-; RUN: llc < %s -mtriple i686-pc-win32 | FileCheck %s
-; RUN: llc < %s -mtriple x86_64-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple i686-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-pc-win32 | FileCheck %s
@foo = external dso_local global [4 x float], align 16
diff --git a/llvm/test/CodeGen/X86/fma-commute-loop.ll b/llvm/test/CodeGen/X86/fma-commute-loop.ll
index ae0efa320f1e4..df6ec6098966c 100644
--- a/llvm/test/CodeGen/X86/fma-commute-loop.ll
+++ b/llvm/test/CodeGen/X86/fma-commute-loop.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=avx512f | FileCheck %s
define void @eggs(ptr %arg, ptr %arg1, ptr %arg2, ptr %arg3, ptr %arg4, ptr %arg5, i64 %arg6, i64 %arg7, i64 %arg8, i64 %arg9, i64 %arg10, i64 %arg11, i64 %arg12, ptr %arg13, ptr %arg14) nounwind {
; CHECK-LABEL: eggs:
diff --git a/llvm/test/CodeGen/X86/fma-commute-x86.ll b/llvm/test/CodeGen/X86/fma-commute-x86.ll
index 21ff30f637271..1fea0f2f7e14f 100644
--- a/llvm/test/CodeGen/X86/fma-commute-x86.ll
+++ b/llvm/test/CodeGen/X86/fma-commute-x86.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-win32 -mcpu=core-avx2 | FileCheck %s --check-prefix=FMA
-; RUN: llc < %s -mtriple=x86_64-pc-win32 -mattr=+fma | FileCheck %s --check-prefix=FMA
-; RUN: llc < %s -mcpu=bdver2 -mtriple=x86_64-pc-win32 -mattr=-fma4 | FileCheck %s --check-prefix=FMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 -mcpu=core-avx2 | FileCheck %s --check-prefix=FMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 -mattr=+fma | FileCheck %s --check-prefix=FMA
+; RUN: llc -combiner-topological-sorting < %s -mcpu=bdver2 -mtriple=x86_64-pc-win32 -mattr=-fma4 | FileCheck %s --check-prefix=FMA
attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/X86/fma-do-not-commute.ll b/llvm/test/CodeGen/X86/fma-do-not-commute.ll
index 1b60c15cf2be0..910c26f67f590 100644
--- a/llvm/test/CodeGen/X86/fma-do-not-commute.ll
+++ b/llvm/test/CodeGen/X86/fma-do-not-commute.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mattr=+fma -disable-cgp < %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mattr=+fma -disable-cgp < %s -o - | FileCheck %s
; Check that the 2nd and 3rd arguments of fmaXXX231 reg1, reg2, mem3 are not commuted.
; <rdar://problem/16800495>
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/fma-fneg-combine-3.ll b/llvm/test/CodeGen/X86/fma-fneg-combine-3.ll
index 27aaba415b290..0eaad76eb7f0a 100644
--- a/llvm/test/CodeGen/X86/fma-fneg-combine-3.ll
+++ b/llvm/test/CodeGen/X86/fma-fneg-combine-3.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver2 | FileCheck %s --check-prefixes=FMA4
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=FMA3
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=FMA3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=bdver2 | FileCheck %s --check-prefixes=FMA4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=FMA3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=FMA3
; PR173172
diff --git a/llvm/test/CodeGen/X86/fma-fneg-combine.ll b/llvm/test/CodeGen/X86/fma-fneg-combine.ll
index fa96093a00f52..60bf9728b5798 100644
--- a/llvm/test/CodeGen/X86/fma-fneg-combine.ll
+++ b/llvm/test/CodeGen/X86/fma-fneg-combine.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512bw -mattr=+avx512vl -mattr=+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f -mattr=+fma | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512bw -mattr=+avx512vl -mattr=+avx512dq | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f -mattr=+fma | FileCheck %s --check-prefix=CHECK --check-prefix=KNL
; This test checks combinations of FNEG and FMA intrinsics on AVX-512 target
; PR28892
diff --git a/llvm/test/CodeGen/X86/fma-intrinsics-canonical.ll b/llvm/test/CodeGen/X86/fma-intrinsics-canonical.ll
index e420215121728..e218963c2ff2d 100644
--- a/llvm/test/CodeGen/X86/fma-intrinsics-canonical.ll
+++ b/llvm/test/CodeGen/X86/fma-intrinsics-canonical.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+fma,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-FMA
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-AVX512VL
-; RUN: llc < %s -mtriple=x86_64-pc-windows -mattr=+fma,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-FMA-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+fma,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-FMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows -mattr=+fma,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-FMA-WIN
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/fma-builtins.c
diff --git a/llvm/test/CodeGen/X86/fma-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/fma-intrinsics-fast-isel.ll
index a886a3c830340..677a2db715fa6 100644
--- a/llvm/test/CodeGen/X86/fma-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/fma-intrinsics-fast-isel.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+fma,-fma4 | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+fma,-fma4 | FileCheck %s --check-prefix=CHECK
define <4 x float> @test_mm_fmadd_ps(<4 x float> %a, <4 x float> %b, <4 x float> %c) {
; CHECK-LABEL: test_mm_fmadd_ps:
diff --git a/llvm/test/CodeGen/X86/fma-intrinsics-phi-213-to-231.ll b/llvm/test/CodeGen/X86/fma-intrinsics-phi-213-to-231.ll
index 5f1c5a5690ef2..1aa9de9909dc0 100644
--- a/llvm/test/CodeGen/X86/fma-intrinsics-phi-213-to-231.ll
+++ b/llvm/test/CodeGen/X86/fma-intrinsics-phi-213-to-231.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fma | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fma | FileCheck %s
define <2 x double> @fmaddsubpd_loop_128(i32 %iter, <2 x double> %a, <2 x double> %b, <2 x double> %c) {
; CHECK-LABEL: fmaddsubpd_loop_128:
diff --git a/llvm/test/CodeGen/X86/fma-intrinsics-x86-upgrade.ll b/llvm/test/CodeGen/X86/fma-intrinsics-x86-upgrade.ll
index 7d99b6a610f67..51fc5aca52d2a 100644
--- a/llvm/test/CodeGen/X86/fma-intrinsics-x86-upgrade.ll
+++ b/llvm/test/CodeGen/X86/fma-intrinsics-x86-upgrade.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+fma,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-FMA
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-AVX512VL
-; RUN: llc < %s -mtriple=x86_64-pc-windows -mattr=+fma,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-FMA-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+fma,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-FMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows -mattr=+fma,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-FMA-WIN
; VFMADD
define <4 x float> @test_x86_fma_vfmadd_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) #0 {
diff --git a/llvm/test/CodeGen/X86/fma-intrinsics-x86.ll b/llvm/test/CodeGen/X86/fma-intrinsics-x86.ll
index 94229c9370e2a..6839990a50878 100644
--- a/llvm/test/CodeGen/X86/fma-intrinsics-x86.ll
+++ b/llvm/test/CodeGen/X86/fma-intrinsics-x86.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+fma,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-FMA
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-AVX512VL
-; RUN: llc < %s -mtriple=x86_64-pc-windows -mattr=+fma,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-FMA-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+fma,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-FMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows -mattr=+fma,-fma4 -show-mc-encoding | FileCheck %s --check-prefix=CHECK-FMA-WIN
; VFMADD
define <4 x float> @test_x86_fma_vfmadd_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) #0 {
diff --git a/llvm/test/CodeGen/X86/fma-phi-213-to-231.ll b/llvm/test/CodeGen/X86/fma-phi-213-to-231.ll
index 78cf1a5a3b70e..ce1f8b34c7c1a 100644
--- a/llvm/test/CodeGen/X86/fma-phi-213-to-231.ll
+++ b/llvm/test/CodeGen/X86/fma-phi-213-to-231.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin10 -mattr=+fma,-fma4 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mattr=+fma,-fma4 | FileCheck %s
-; RUN: llc < %s -mtriple=i686-- -mcpu=bdver2 -mattr=-fma4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10 -mattr=+fma,-fma4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -mattr=+fma,-fma4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=bdver2 -mattr=-fma4 | FileCheck %s
; Test FMA3 variant selection
diff --git a/llvm/test/CodeGen/X86/fma-scalar-combine.ll b/llvm/test/CodeGen/X86/fma-scalar-combine.ll
index 540fd24ea4280..345b821b88832 100644
--- a/llvm/test/CodeGen/X86/fma-scalar-combine.ll
+++ b/llvm/test/CodeGen/X86/fma-scalar-combine.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f -mattr=+fma -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f -mattr=+fma -show-mc-encoding | FileCheck %s
define <2 x double> @combine_scalar_mask_fmadd_f32(<2 x double> %a, i8 zeroext %k, <2 x double> %b, <2 x double> %c) {
; CHECK-LABEL: combine_scalar_mask_fmadd_f32:
diff --git a/llvm/test/CodeGen/X86/fma-scalar-memfold.ll b/llvm/test/CodeGen/X86/fma-scalar-memfold.ll
index e81d80a457928..a2228611f5c6f 100644
--- a/llvm/test/CodeGen/X86/fma-scalar-memfold.ll
+++ b/llvm/test/CodeGen/X86/fma-scalar-memfold.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mcpu=core-avx2 -show-mc-encoding | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -disable-peephole -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mcpu=core-avx2 -show-mc-encoding | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=AVX512
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/fma-signed-zero.ll b/llvm/test/CodeGen/X86/fma-signed-zero.ll
index f9e4e9929c6c4..9cf5e255e63c5 100644
--- a/llvm/test/CodeGen/X86/fma-signed-zero.ll
+++ b/llvm/test/CodeGen/X86/fma-signed-zero.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma | FileCheck %s
; This test checks that (fneg (fma (fneg x), y, (fneg z))) can't be folded to (fma x, y, z)
; without no signed zeros flag (nsz).
diff --git a/llvm/test/CodeGen/X86/fma4-commute-x86.ll b/llvm/test/CodeGen/X86/fma4-commute-x86.ll
index 88deba30c8d33..e5fc45f446140 100644
--- a/llvm/test/CodeGen/X86/fma4-commute-x86.ll
+++ b/llvm/test/CodeGen/X86/fma4-commute-x86.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=bdver2 -mtriple=x86_64-pc-win32 | FileCheck %s --check-prefix=FMA4
+; RUN: llc -combiner-topological-sorting < %s -mcpu=bdver2 -mtriple=x86_64-pc-win32 | FileCheck %s --check-prefix=FMA4
attributes #0 = { nounwind }
diff --git a/llvm/test/CodeGen/X86/fma4-fneg-combine.ll b/llvm/test/CodeGen/X86/fma4-fneg-combine.ll
index 9949c79ed2a42..8e4fe9adf14ae 100644
--- a/llvm/test/CodeGen/X86/fma4-fneg-combine.ll
+++ b/llvm/test/CodeGen/X86/fma4-fneg-combine.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma4,-fma | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma4,+fma | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma4,-fma | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma4,+fma | FileCheck %s
declare <4 x float> @llvm.x86.fma4.vfmadd.ss(<4 x float> %a, <4 x float> %b, <4 x float> %c)
declare <2 x double> @llvm.x86.fma4.vfmadd.sd(<2 x double> %a, <2 x double> %b, <2 x double> %c)
diff --git a/llvm/test/CodeGen/X86/fma4-intrinsics-x86-upgrade.ll b/llvm/test/CodeGen/X86/fma4-intrinsics-x86-upgrade.ll
index 1695902338967..bbecd13904d70 100644
--- a/llvm/test/CodeGen/X86/fma4-intrinsics-x86-upgrade.ll
+++ b/llvm/test/CodeGen/X86/fma4-intrinsics-x86-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+fma4,-fma -show-mc-encoding | FileCheck %s --check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+fma4,+fma -show-mc-encoding | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+fma4,-fma -show-mc-encoding | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+fma4,+fma -show-mc-encoding | FileCheck %s --check-prefix=CHECK
define <4 x float> @test_x86_fma_vfmadd_ps(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) #0 {
; CHECK-LABEL: test_x86_fma_vfmadd_ps:
diff --git a/llvm/test/CodeGen/X86/fma4-intrinsics-x86.ll b/llvm/test/CodeGen/X86/fma4-intrinsics-x86.ll
index 39adb0209c2a9..297cc25ea6e25 100644
--- a/llvm/test/CodeGen/X86/fma4-intrinsics-x86.ll
+++ b/llvm/test/CodeGen/X86/fma4-intrinsics-x86.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+fma4,-fma -show-mc-encoding | FileCheck %s --check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+fma4,+fma -show-mc-encoding | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+fma4,-fma -show-mc-encoding | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+fma4,+fma -show-mc-encoding | FileCheck %s --check-prefix=CHECK
; VFMADD
define <4 x float> @test_x86_fma4_vfmadd_ss(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2) #0 {
diff --git a/llvm/test/CodeGen/X86/fma4-intrinsics-x86_64-folded-load.ll b/llvm/test/CodeGen/X86/fma4-intrinsics-x86_64-folded-load.ll
index 4eadfaa4048af..b3f8aff9ce19c 100644
--- a/llvm/test/CodeGen/X86/fma4-intrinsics-x86_64-folded-load.ll
+++ b/llvm/test/CodeGen/X86/fma4-intrinsics-x86_64-folded-load.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx -mattr=+fma4 -show-mc-encoding | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -mattr=+avx,-fma -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx -mattr=+fma4 -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 -mattr=+avx,-fma -show-mc-encoding | FileCheck %s
; VFMADD
define < 4 x float > @test_x86_fma4_vfmadd_ss_load(< 4 x float > %a0, < 4 x float > %a1, ptr %a2) {
diff --git a/llvm/test/CodeGen/X86/fma4-scalar-memfold.ll b/llvm/test/CodeGen/X86/fma4-scalar-memfold.ll
index 246cd500deaa6..a7f18e001460b 100644
--- a/llvm/test/CodeGen/X86/fma4-scalar-memfold.ll
+++ b/llvm/test/CodeGen/X86/fma4-scalar-memfold.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=fma4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=fma4 | FileCheck %s
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/fmaddsub-combine.ll b/llvm/test/CodeGen/X86/fmaddsub-combine.ll
index 2af219b3cdabb..6fe8153393f62 100644
--- a/llvm/test/CodeGen/X86/fmaddsub-combine.ll
+++ b/llvm/test/CodeGen/X86/fmaddsub-combine.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s -check-prefixes=NOFMA
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma | FileCheck %s -check-prefixes=FMA3,FMA3_256
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma,+avx512f | FileCheck %s -check-prefixes=FMA3,FMA3_512
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma4 | FileCheck %s -check-prefixes=FMA4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s -check-prefixes=NOFMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma | FileCheck %s -check-prefixes=FMA3,FMA3_256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma,+avx512f | FileCheck %s -check-prefixes=FMA3,FMA3_512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma4 | FileCheck %s -check-prefixes=FMA4
; This test checks the fusing of MUL + ADDSUB to FMADDSUB.
diff --git a/llvm/test/CodeGen/X86/fmaxnum.ll b/llvm/test/CodeGen/X86/fmaxnum.ll
index 59d1b5b5232b6..093d62f1f4af8 100644
--- a/llvm/test/CodeGen/X86/fmaxnum.ll
+++ b/llvm/test/CodeGen/X86/fmaxnum.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
declare float @fmaxf(float, float)
declare double @fmax(double, double)
diff --git a/llvm/test/CodeGen/X86/fmf-flags.ll b/llvm/test/CodeGen/X86/fmf-flags.ll
index 16ebf70126f8b..1e1bb63dd422b 100644
--- a/llvm/test/CodeGen/X86/fmf-flags.ll
+++ b/llvm/test/CodeGen/X86/fmf-flags.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86
declare float @llvm.sqrt.f32(float %x);
diff --git a/llvm/test/CodeGen/X86/fmf-propagation.ll b/llvm/test/CodeGen/X86/fmf-propagation.ll
index 07982ae17cf91..48ccf36b12022 100644
--- a/llvm/test/CodeGen/X86/fmf-propagation.ll
+++ b/llvm/test/CodeGen/X86/fmf-propagation.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=avx512f -debug-only=isel < %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=avx512f -debug-only=isel < %s -o /dev/null 2>&1 | FileCheck %s
; This tests the propagation of fast-math-flags from IR instructions to SDNodeFlags.
diff --git a/llvm/test/CodeGen/X86/fmf-reduction.ll b/llvm/test/CodeGen/X86/fmf-reduction.ll
index b15e64f2f068e..1a7184bc4d749 100644
--- a/llvm/test/CodeGen/X86/fmf-reduction.ll
+++ b/llvm/test/CodeGen/X86/fmf-reduction.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=fma | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=fma | FileCheck %s
; Propagation of IR FMF should not drop flags when adding the DAG reduction flag.
; This should include an FMA instruction, not separate FMUL/FADD.
diff --git a/llvm/test/CodeGen/X86/fminimum-fmaximum.ll b/llvm/test/CodeGen/X86/fminimum-fmaximum.ll
index a56758d73165e..8ff0beb5e70fe 100644
--- a/llvm/test/CodeGen/X86/fminimum-fmaximum.ll
+++ b/llvm/test/CodeGen/X86/fminimum-fmaximum.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX,AVX512,AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BF16
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 | FileCheck %s --check-prefixes=AVX10_2
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX,AVX512,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BF16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 | FileCheck %s --check-prefixes=AVX10_2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86
declare float @llvm.maximum.f32(float, float)
declare double @llvm.maximum.f64(double, double)
diff --git a/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll b/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
index 8abd68701676c..9dfccb564e3cf 100644
--- a/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
+++ b/llvm/test/CodeGen/X86/fminimumnum-fmaximumnum.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX,AVX512,AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BF16
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 | FileCheck %s --check-prefixes=AVX10_2
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX,AVX512,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BF16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2 | FileCheck %s --check-prefixes=AVX10_2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86
declare bfloat @llvm.maximumnum.bf16(bfloat, bfloat)
declare float @llvm.maximumnum.f32(float, float)
diff --git a/llvm/test/CodeGen/X86/fminnum.ll b/llvm/test/CodeGen/X86/fminnum.ll
index 112d0f25cbaab..bee53e8d7db71 100644
--- a/llvm/test/CodeGen/X86/fminnum.ll
+++ b/llvm/test/CodeGen/X86/fminnum.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
declare float @fminf(float, float)
declare double @fmin(double, double)
diff --git a/llvm/test/CodeGen/X86/fmsubadd-combine.ll b/llvm/test/CodeGen/X86/fmsubadd-combine.ll
index 3f562dd92e832..a97550bd25bc2 100644
--- a/llvm/test/CodeGen/X86/fmsubadd-combine.ll
+++ b/llvm/test/CodeGen/X86/fmsubadd-combine.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s -check-prefixes=CHECK,NOFMA
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma | FileCheck %s -check-prefixes=CHECK,FMA3,FMA3_256
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma,+avx512f | FileCheck %s -check-prefixes=CHECK,FMA3,FMA3_512
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma4 | FileCheck %s -check-prefixes=CHECK,FMA4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s -check-prefixes=CHECK,NOFMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma | FileCheck %s -check-prefixes=CHECK,FMA3,FMA3_256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma,+avx512f | FileCheck %s -check-prefixes=CHECK,FMA3,FMA3_512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+fma4 | FileCheck %s -check-prefixes=CHECK,FMA4
; This test checks the fusing of MUL + SUB/ADD to FMSUBADD.
diff --git a/llvm/test/CodeGen/X86/fmuladd-soft-float.ll b/llvm/test/CodeGen/X86/fmuladd-soft-float.ll
index cbdfa32ed4627..985a9e361185f 100644
--- a/llvm/test/CodeGen/X86/fmuladd-soft-float.ll
+++ b/llvm/test/CodeGen/X86/fmuladd-soft-float.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=i386 < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32
-; RUN: llc -mtriple=i386 -mattr +fma < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FMA
-; RUN: llc -mtriple=i386 -mattr +fma4 < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FMA4
-; RUN: llc -mtriple=x86_64 < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64
-; RUN: llc -mtriple=x86_64 -mattr +fma < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FMA
-; RUN: llc -mtriple=x86_64 -mattr +fma4 < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FMA4
+; RUN: llc -combiner-topological-sorting -mtriple=i386 < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32
+; RUN: llc -combiner-topological-sorting -mtriple=i386 -mattr +fma < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FMA
+; RUN: llc -combiner-topological-sorting -mtriple=i386 -mattr +fma4 < %s | FileCheck %s -check-prefix=SOFT-FLOAT-32-FMA4
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -mattr +fma < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FMA
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -mattr +fma4 < %s | FileCheck %s -check-prefix=SOFT-FLOAT-64-FMA4
define float @fmuladd_intrinsic_f32(float %a, float %b, float %c) #0 {
; SOFT-FLOAT-32-LABEL: fmuladd_intrinsic_f32:
diff --git a/llvm/test/CodeGen/X86/fnabs.ll b/llvm/test/CodeGen/X86/fnabs.ll
index da5b44944a7ca..b248a1d413e67 100644
--- a/llvm/test/CodeGen/X86/fnabs.ll
+++ b/llvm/test/CodeGen/X86/fnabs.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX512
; Verify that we generate a single OR instruction for a scalar, vec128, and vec256
; FNABS(x) operation -> FNEG (FABS(x)).
diff --git a/llvm/test/CodeGen/X86/fold-add-16.ll b/llvm/test/CodeGen/X86/fold-add-16.ll
index 5c038381eccd5..4a1e1ff70bbad 100644
--- a/llvm/test/CodeGen/X86/fold-add-16.ll
+++ b/llvm/test/CodeGen/X86/fold-add-16.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -mtriple=i386-unknown-code16 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-code16 < %s | FileCheck %s
;; In 16-bit mode, displacements are limited to [-65535,65535] (R_386_16).
;; Test boundary conditions for offset folding.
diff --git a/llvm/test/CodeGen/X86/fold-add-32.ll b/llvm/test/CodeGen/X86/fold-add-32.ll
index 2774a93993153..9458ddab75797 100644
--- a/llvm/test/CodeGen/X86/fold-add-32.ll
+++ b/llvm/test/CodeGen/X86/fold-add-32.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i386 --frame-pointer=all | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386 --frame-pointer=all | FileCheck %s
; ISel will try to fold pointer arithmetic into the address displacement. However, we don't
; want to do that if the offset is very close to the expressible limit because the final frame
diff --git a/llvm/test/CodeGen/X86/fold-add.ll b/llvm/test/CodeGen/X86/fold-add.ll
index 3a4b1e6fcf77f..e7e0ece0a5630 100644
--- a/llvm/test/CodeGen/X86/fold-add.ll
+++ b/llvm/test/CodeGen/X86/fold-add.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64 -relocation-model=static < %s | FileCheck --check-prefixes=STATIC %s
-; RUN: llc -mtriple=x86_64 -relocation-model=pic < %s | FileCheck --check-prefixes=PIC %s
-; RUN: llc -mtriple=x86_64 -code-model=medium -relocation-model=static < %s | FileCheck --check-prefixes=MSTATIC %s
-; RUN: llc -mtriple=x86_64 -code-model=medium -relocation-model=pic < %s | FileCheck --check-prefixes=MPIC %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -relocation-model=static < %s | FileCheck --check-prefixes=STATIC %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -relocation-model=pic < %s | FileCheck --check-prefixes=PIC %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -code-model=medium -relocation-model=static < %s | FileCheck --check-prefixes=MSTATIC %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -code-model=medium -relocation-model=pic < %s | FileCheck --check-prefixes=MPIC %s
@foo = internal global i32 0
diff --git a/llvm/test/CodeGen/X86/fold-and-shift-x86_64.ll b/llvm/test/CodeGen/X86/fold-and-shift-x86_64.ll
index fabf7581e9b3c..371fc6b8c9fb1 100644
--- a/llvm/test/CodeGen/X86/fold-and-shift-x86_64.ll
+++ b/llvm/test/CodeGen/X86/fold-and-shift-x86_64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i8 @t1(ptr %X, i64 %i) {
; CHECK-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/fold-and-shift.ll b/llvm/test/CodeGen/X86/fold-and-shift.ll
index 985d7c6c82f06..44aa11831a51d 100644
--- a/llvm/test/CodeGen/X86/fold-and-shift.ll
+++ b/llvm/test/CodeGen/X86/fold-and-shift.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
define i32 @t1(ptr %X, i32 %i) {
; X86-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/fold-broadcast.ll b/llvm/test/CodeGen/X86/fold-broadcast.ll
index 02c26487136ed..cd5a0963243a7 100644
--- a/llvm/test/CodeGen/X86/fold-broadcast.ll
+++ b/llvm/test/CodeGen/X86/fold-broadcast.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16 < %s | FileCheck %s
define <16 x float> @mm512_dpbf16_ps_broadcast_rhs(<16 x float> noundef %acc, <32 x bfloat> noundef %lhs, ptr nocapture noundef readonly %rhs) {
; CHECK-LABEL: mm512_dpbf16_ps_broadcast_rhs:
diff --git a/llvm/test/CodeGen/X86/fold-call-2.ll b/llvm/test/CodeGen/X86/fold-call-2.ll
index 92b7a766a7a41..ce745a650537f 100644
--- a/llvm/test/CodeGen/X86/fold-call-2.ll
+++ b/llvm/test/CodeGen/X86/fold-call-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin | FileCheck %s
@f = external global ptr ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/fold-call-4.ll b/llvm/test/CodeGen/X86/fold-call-4.ll
index 2c99f2cb62641..a24b0a8b552e2 100644
--- a/llvm/test/CodeGen/X86/fold-call-4.ll
+++ b/llvm/test/CodeGen/X86/fold-call-4.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=LIN
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s --check-prefix=WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s --check-prefix=WIN
; The callee address computation should get folded into the call.
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/fold-call-oper.ll b/llvm/test/CodeGen/X86/fold-call-oper.ll
index 8126c8d04ca28..c326e7c8db503 100644
--- a/llvm/test/CodeGen/X86/fold-call-oper.ll
+++ b/llvm/test/CodeGen/X86/fold-call-oper.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
;
; PR18396: Assertion: MO->isDead "Cannot fold physreg def".
; InlineSpiller::foldMemoryOperand needs to handle undef call operands.
diff --git a/llvm/test/CodeGen/X86/fold-call.ll b/llvm/test/CodeGen/X86/fold-call.ll
index 25b4df778768f..a66af8e177688 100644
--- a/llvm/test/CodeGen/X86/fold-call.ll
+++ b/llvm/test/CodeGen/X86/fold-call.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; CHECK: test1
; CHECK-NOT: mov
diff --git a/llvm/test/CodeGen/X86/fold-imm.ll b/llvm/test/CodeGen/X86/fold-imm.ll
index 024c016c6c2c6..6dbadb5754740 100644
--- a/llvm/test/CodeGen/X86/fold-imm.ll
+++ b/llvm/test/CodeGen/X86/fold-imm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define i32 @test(i32 %X) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/fold-load-binops.ll b/llvm/test/CodeGen/X86/fold-load-binops.ll
index c2b2155069b4d..ab81878ccaf0e 100644
--- a/llvm/test/CodeGen/X86/fold-load-binops.ll
+++ b/llvm/test/CodeGen/X86/fold-load-binops.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s --check-prefix=SSE
-; RUN: llc -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix=AVX
-; RUN: llc -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f < %s | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f < %s | FileCheck %s --check-prefix=AVX
; Verify that we're folding the load into the math instruction.
; This pattern is generated out of the simplest intrinsics usage:
diff --git a/llvm/test/CodeGen/X86/fold-load-unops.ll b/llvm/test/CodeGen/X86/fold-load-unops.ll
index 35e14e5cf8980..01c9fe4351e1b 100644
--- a/llvm/test/CodeGen/X86/fold-load-unops.ll
+++ b/llvm/test/CodeGen/X86/fold-load-unops.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s --check-prefix=SSE
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix=AVX
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx512f < %s | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+avx512f < %s | FileCheck %s --check-prefix=AVX
; Verify we fold loads into unary sse intrinsics only when optimizing for size
diff --git a/llvm/test/CodeGen/X86/fold-load-vec.ll b/llvm/test/CodeGen/X86/fold-load-vec.ll
index 0bf846a0930bb..8df93395cdee4 100644
--- a/llvm/test/CodeGen/X86/fold-load-vec.ll
+++ b/llvm/test/CodeGen/X86/fold-load-vec.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=corei7 -mattr=+sse4.1 | FileCheck %s
; rdar://12721174
; We should not fold movss into pshufd since pshufd expects m128 while movss
diff --git a/llvm/test/CodeGen/X86/fold-load.ll b/llvm/test/CodeGen/X86/fold-load.ll
index 580278c2a06f2..c2d8b352dc42b 100644
--- a/llvm/test/CodeGen/X86/fold-load.ll
+++ b/llvm/test/CodeGen/X86/fold-load.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-- | FileCheck %s
%struct._obstack_chunk = type { ptr, ptr, [4 x i8] }
%struct.obstack = type { i32, ptr, ptr, ptr, ptr, i32, i32, ptr, ptr, ptr, i8 }
@stmt_obstack = external dso_local global %struct.obstack ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/fold-loop-of-urem.ll b/llvm/test/CodeGen/X86/fold-loop-of-urem.ll
index cb1c078ee5129..9b18265216233 100644
--- a/llvm/test/CodeGen/X86/fold-loop-of-urem.ll
+++ b/llvm/test/CodeGen/X86/fold-loop-of-urem.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
declare void @use.i32(i32)
declare void @use.2xi64(<2 x i64>)
diff --git a/llvm/test/CodeGen/X86/fold-mul-lohi.ll b/llvm/test/CodeGen/X86/fold-mul-lohi.ll
index d6c9a60f0aae4..ae44bd92546ca 100644
--- a/llvm/test/CodeGen/X86/fold-mul-lohi.ll
+++ b/llvm/test/CodeGen/X86/fold-mul-lohi.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
; CHECK-NOT: lea
@B = external dso_local global [1000 x i8], align 32
diff --git a/llvm/test/CodeGen/X86/fold-pcmpeqd-1.ll b/llvm/test/CodeGen/X86/fold-pcmpeqd-1.ll
index 0666d8909564e..e055c3af68a01 100644
--- a/llvm/test/CodeGen/X86/fold-pcmpeqd-1.ll
+++ b/llvm/test/CodeGen/X86/fold-pcmpeqd-1.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,-avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2,-avx | FileCheck %s
define <2 x double> @foo() nounwind {
ret <2 x double> bitcast (<2 x i64><i64 -1, i64 -1> to <2 x double>)
diff --git a/llvm/test/CodeGen/X86/fold-pcmpeqd-2.ll b/llvm/test/CodeGen/X86/fold-pcmpeqd-2.ll
index 5dcb1d63207d1..bd247c9110046 100644
--- a/llvm/test/CodeGen/X86/fold-pcmpeqd-2.ll
+++ b/llvm/test/CodeGen/X86/fold-pcmpeqd-2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=yonah -regalloc=basic | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -regalloc=basic | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mcpu=yonah -regalloc=basic | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -regalloc=basic | FileCheck %s --check-prefix=X64
; This testcase should need to spill the -1 value on both x86-32 and x86-64,
; so it shouldn't use pcmpeqd to materialize an all-ones vector; it
diff --git a/llvm/test/CodeGen/X86/fold-push.ll b/llvm/test/CodeGen/X86/fold-push.ll
index c887b835aabd6..0272a00669571 100644
--- a/llvm/test/CodeGen/X86/fold-push.ll
+++ b/llvm/test/CodeGen/X86/fold-push.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-windows | FileCheck %s -check-prefix=CHECK -check-prefix=NORMAL
-; RUN: llc < %s -mtriple=i686-windows -mattr=slow-two-mem-ops | FileCheck %s -check-prefix=CHECK -check-prefix=SLM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-windows | FileCheck %s -check-prefix=CHECK -check-prefix=NORMAL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-windows -mattr=slow-two-mem-ops | FileCheck %s -check-prefix=CHECK -check-prefix=SLM
declare void @foo(i32 %r)
diff --git a/llvm/test/CodeGen/X86/fold-select.ll b/llvm/test/CodeGen/X86/fold-select.ll
index 31afe979a33b3..5969682a6b944 100644
--- a/llvm/test/CodeGen/X86/fold-select.ll
+++ b/llvm/test/CodeGen/X86/fold-select.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=skx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=skx | FileCheck %s
define <8 x float> @select_and_v8i1(<8 x i1> %a, <8 x i1> %b, <8 x i1> %c, <8 x float> %d) {
; CHECK-LABEL: select_and_v8i1:
diff --git a/llvm/test/CodeGen/X86/fold-sext-trunc.ll b/llvm/test/CodeGen/X86/fold-sext-trunc.ll
index ae45f3f0386cb..fba67eee044ef 100644
--- a/llvm/test/CodeGen/X86/fold-sext-trunc.ll
+++ b/llvm/test/CodeGen/X86/fold-sext-trunc.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after livedebugvalues -o - | FileCheck %s -check-prefix=MIR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after livedebugvalues -o - | FileCheck %s -check-prefix=MIR
; PR4050
diff --git a/llvm/test/CodeGen/X86/fold-tied-op.ll b/llvm/test/CodeGen/X86/fold-tied-op.ll
index 3dc083fbd673b..cb94096821413 100644
--- a/llvm/test/CodeGen/X86/fold-tied-op.ll
+++ b/llvm/test/CodeGen/X86/fold-tied-op.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -mtriple=i386--netbsd < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i386--netbsd < %s | FileCheck %s
; Regression test for http://reviews.llvm.org/D5701
diff --git a/llvm/test/CodeGen/X86/fold-vector-bv-crash.ll b/llvm/test/CodeGen/X86/fold-vector-bv-crash.ll
index 7b6fa0beb4e02..1554a07916c6a 100644
--- a/llvm/test/CodeGen/X86/fold-vector-bv-crash.ll
+++ b/llvm/test/CodeGen/X86/fold-vector-bv-crash.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx
;
; llvm-stress generated crash case due to build_vector implicit
diff --git a/llvm/test/CodeGen/X86/fold-vector-sext-crash.ll b/llvm/test/CodeGen/X86/fold-vector-sext-crash.ll
index 06dbf14f8797f..2354e7d49aa1b 100644
--- a/llvm/test/CodeGen/X86/fold-vector-sext-crash.ll
+++ b/llvm/test/CodeGen/X86/fold-vector-sext-crash.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=core-avx-i -mtriple=i386-unknown-linux-gnu -mattr=+avx,+popcnt,+cmov | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core-avx-i -mtriple=i386-unknown-linux-gnu -mattr=+avx,+popcnt,+cmov | FileCheck %s
; Make sure that we don't introduce illegal build_vector dag nodes
; when trying to fold a sign_extend of a constant build_vector.
diff --git a/llvm/test/CodeGen/X86/fold-vector-sext-crash2.ll b/llvm/test/CodeGen/X86/fold-vector-sext-crash2.ll
index 9a955ce5a24cb..a9f6e6089783c 100644
--- a/llvm/test/CodeGen/X86/fold-vector-sext-crash2.ll
+++ b/llvm/test/CodeGen/X86/fold-vector-sext-crash2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
; DAGCombiner crashes during sext folding
diff --git a/llvm/test/CodeGen/X86/fold-vector-sext-zext.ll b/llvm/test/CodeGen/X86/fold-vector-sext-zext.ll
index b8746626d6072..acc6d6f02c6c1 100644
--- a/llvm/test/CodeGen/X86/fold-vector-sext-zext.ll
+++ b/llvm/test/CodeGen/X86/fold-vector-sext-zext.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr=+avx | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -mattr=+avx | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s --check-prefix=X64
; Verify that the backend correctly folds a sign/zero extend of a vector where
; elements are all constant values or UNDEFs.
diff --git a/llvm/test/CodeGen/X86/fold-vector-shl-crash.ll b/llvm/test/CodeGen/X86/fold-vector-shl-crash.ll
index 7837f2552e222..afb3fef7a0218 100644
--- a/llvm/test/CodeGen/X86/fold-vector-shl-crash.ll
+++ b/llvm/test/CodeGen/X86/fold-vector-shl-crash.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
;CHECK-LABEL: test
define <2 x i256> @test() {
diff --git a/llvm/test/CodeGen/X86/fold-vector-shuffle-crash.ll b/llvm/test/CodeGen/X86/fold-vector-shuffle-crash.ll
index 55d9ea90682d6..55ed14b1c709b 100644
--- a/llvm/test/CodeGen/X86/fold-vector-shuffle-crash.ll
+++ b/llvm/test/CodeGen/X86/fold-vector-shuffle-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=corei7
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=corei7
define void @autogen_SD13708(i32, i1 %arg) {
BB:
diff --git a/llvm/test/CodeGen/X86/fold-vector-trunc-sitofp.ll b/llvm/test/CodeGen/X86/fold-vector-trunc-sitofp.ll
index 41989122a01eb..66116a4a538c1 100644
--- a/llvm/test/CodeGen/X86/fold-vector-trunc-sitofp.ll
+++ b/llvm/test/CodeGen/X86/fold-vector-trunc-sitofp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s
; Check that constant integers are correctly being truncated before float conversion
diff --git a/llvm/test/CodeGen/X86/fold-vex.ll b/llvm/test/CodeGen/X86/fold-vex.ll
index d47562d521326..002a8169ca453 100644
--- a/llvm/test/CodeGen/X86/fold-vex.ll
+++ b/llvm/test/CodeGen/X86/fold-vex.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; Use CPU parameters to ensure that a CPU-specific attribute is not overriding the AVX definition.
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-avx | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx -mattr=-avx | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 -mattr=-avx | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-avx | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx -mattr=-avx | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 -mattr=-avx | FileCheck %s --check-prefix=SSE
; No need to load unaligned operand from memory using an explicit instruction with AVX.
; The operand should be folded into the AND instr.
diff --git a/llvm/test/CodeGen/X86/fold-xmm-zero.ll b/llvm/test/CodeGen/X86/fold-xmm-zero.ll
index c92d45c35ae93..23583ba1ef40c 100644
--- a/llvm/test/CodeGen/X86/fold-xmm-zero.ll
+++ b/llvm/test/CodeGen/X86/fold-xmm-zero.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-macosx10.6.7 -mattr=+sse2 -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-macosx10.6.7 -mattr=+sse2 -no-integrated-as | FileCheck %s
; Simple test to make sure folding for special constants (like float zero)
; isn't completely broken.
diff --git a/llvm/test/CodeGen/X86/fold-zext-trunc.ll b/llvm/test/CodeGen/X86/fold-zext-trunc.ll
index a21b8572ccb2e..fc958c6b4b243 100644
--- a/llvm/test/CodeGen/X86/fold-zext-trunc.ll
+++ b/llvm/test/CodeGen/X86/fold-zext-trunc.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s | FileCheck %s -check-prefix=ASM
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after livedebugvalues -o - | FileCheck %s -check-prefix=MIR
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s -check-prefix=ASM
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after livedebugvalues -o - | FileCheck %s -check-prefix=MIR
; PR9055
diff --git a/llvm/test/CodeGen/X86/fold_bitcast_md_range.ll b/llvm/test/CodeGen/X86/fold_bitcast_md_range.ll
index 88eee984477b2..6d4989ed3a981 100644
--- a/llvm/test/CodeGen/X86/fold_bitcast_md_range.ll
+++ b/llvm/test/CodeGen/X86/fold_bitcast_md_range.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64-apple-macosx10.12.0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx10.12.0 < %s | FileCheck %s
; Ensure that when a bitcast is folded into a load, range metadata is invalidated
; if it does not match the new type.
diff --git a/llvm/test/CodeGen/X86/foldimmediate-size.ll b/llvm/test/CodeGen/X86/foldimmediate-size.ll
index 8d4c0a462d02d..93eb9d70bdb65 100644
--- a/llvm/test/CodeGen/X86/foldimmediate-size.ll
+++ b/llvm/test/CodeGen/X86/foldimmediate-size.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s
; When optimize for size, the constant $858993459 is moved into a register,
; and use that register in following two andl instructions.
diff --git a/llvm/test/CodeGen/X86/fops-windows-itanium.ll b/llvm/test/CodeGen/X86/fops-windows-itanium.ll
index e67527f50ab3a..ef0a0d62e6928 100644
--- a/llvm/test/CodeGen/X86/fops-windows-itanium.ll
+++ b/llvm/test/CodeGen/X86/fops-windows-itanium.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple i686-windows-itanium -filetype asm -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple i686-windows-itanium -filetype asm -o - %s | FileCheck %s
declare float @llvm.ceil.f32(float)
declare float @llvm.cos.f32(float)
diff --git a/llvm/test/CodeGen/X86/force-align-stack-alloca.ll b/llvm/test/CodeGen/X86/force-align-stack-alloca.ll
index b9d020e465a2b..7174bdffdf8b8 100644
--- a/llvm/test/CodeGen/X86/force-align-stack-alloca.ll
+++ b/llvm/test/CodeGen/X86/force-align-stack-alloca.ll
@@ -3,7 +3,7 @@
; arbitrarily force alignment up to 32-bytes for i386 hoping that this will
; exceed any ABI provisions.
;
-; RUN: llc < %s -mcpu=generic -stackrealign | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -stackrealign | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
target triple = "i386-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/force-align-stack.ll b/llvm/test/CodeGen/X86/force-align-stack.ll
index 1997a0832bccd..5a79120f02be5 100644
--- a/llvm/test/CodeGen/X86/force-align-stack.ll
+++ b/llvm/test/CodeGen/X86/force-align-stack.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=static -stackrealign | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=static -stackrealign | FileCheck %s
; Tests to make sure that we always align the stack out to the minimum needed -
; in this case 16-bytes.
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
diff --git a/llvm/test/CodeGen/X86/fp-arith.ll b/llvm/test/CodeGen/X86/fp-arith.ll
index 2dd1f05ba3763..6a12691fb3c1c 100644
--- a/llvm/test/CodeGen/X86/fp-arith.ll
+++ b/llvm/test/CodeGen/X86/fp-arith.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
;
; FADD
diff --git a/llvm/test/CodeGen/X86/fp-clobbered-by-eh.ll b/llvm/test/CodeGen/X86/fp-clobbered-by-eh.ll
index 03f227a590d5e..ad8cd8f56e61a 100644
--- a/llvm/test/CodeGen/X86/fp-clobbered-by-eh.ll
+++ b/llvm/test/CodeGen/X86/fp-clobbered-by-eh.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=x86_64-unknown-unknown -stackrealign -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -stackrealign -verify-machineinstrs %s -o - 2>&1 | FileCheck %s
declare ghccc void @may_throw_or_crash()
declare i32 @_except_handler3(...)
diff --git a/llvm/test/CodeGen/X86/fp-cvt.ll b/llvm/test/CodeGen/X86/fp-cvt.ll
index dbeb898572317..11bc20ea04fef 100644
--- a/llvm/test/CodeGen/X86/fp-cvt.ll
+++ b/llvm/test/CodeGen/X86/fp-cvt.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-X87
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=X64,X64-SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-X87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=X64,X64-SSSE3
;
; fptosi
diff --git a/llvm/test/CodeGen/X86/fp-double-rounding.ll b/llvm/test/CodeGen/X86/fp-double-rounding.ll
index 88b20ff0ba8dd..d9d63ef0123f1 100644
--- a/llvm/test/CodeGen/X86/fp-double-rounding.ll
+++ b/llvm/test/CodeGen/X86/fp-double-rounding.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64--"
diff --git a/llvm/test/CodeGen/X86/fp-elim-and-no-fp-elim.ll b/llvm/test/CodeGen/X86/fp-elim-and-no-fp-elim.ll
index 0c9597b970c0a..f252433c5b017 100644
--- a/llvm/test/CodeGen/X86/fp-elim-and-no-fp-elim.ll
+++ b/llvm/test/CodeGen/X86/fp-elim-and-no-fp-elim.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-apple-darwin | FileCheck %s
define void @bar(i32 %argc) #0 {
; CHECK-LABEL: bar:
diff --git a/llvm/test/CodeGen/X86/fp-elim.ll b/llvm/test/CodeGen/X86/fp-elim.ll
index 1b2fc07bbc383..749655631799b 100644
--- a/llvm/test/CodeGen/X86/fp-elim.ll
+++ b/llvm/test/CodeGen/X86/fp-elim.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-- -asm-verbose=false | FileCheck %s --check-prefix=FP-ELIM
-; RUN: llc < %s -mtriple=i686-- -asm-verbose=false -frame-pointer=all | FileCheck %s --check-prefix=NO-ELIM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -asm-verbose=false | FileCheck %s --check-prefix=FP-ELIM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -asm-verbose=false -frame-pointer=all | FileCheck %s --check-prefix=NO-ELIM
; Implement -momit-leaf-frame-pointer
; rdar://7886181
diff --git a/llvm/test/CodeGen/X86/fp-fast.ll b/llvm/test/CodeGen/X86/fp-fast.ll
index fcf479cfea9bd..e1c4d3c6ffda4 100644
--- a/llvm/test/CodeGen/X86/fp-fast.ll
+++ b/llvm/test/CodeGen/X86/fp-fast.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=avx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=avx < %s | FileCheck %s
define float @test1(float %a) #0 {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/fp-fold.ll b/llvm/test/CodeGen/X86/fp-fold.ll
index b86894cadecc4..c5dd8d1fafd1d 100644
--- a/llvm/test/CodeGen/X86/fp-fold.ll
+++ b/llvm/test/CodeGen/X86/fp-fold.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define float @fadd_zero_strict(float %x) {
; CHECK-LABEL: fadd_zero_strict:
diff --git a/llvm/test/CodeGen/X86/fp-i129.ll b/llvm/test/CodeGen/X86/fp-i129.ll
index c55c19abbd9b8..919d946599fc7 100644
--- a/llvm/test/CodeGen/X86/fp-i129.ll
+++ b/llvm/test/CodeGen/X86/fp-i129.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,X64
define i129 @fptosi_float(float %a) nounwind {
; CHECK-LABEL: fptosi_float:
diff --git a/llvm/test/CodeGen/X86/fp-immediate-shorten.ll b/llvm/test/CodeGen/X86/fp-immediate-shorten.ll
index d400419c45b51..216e6d72bf02e 100644
--- a/llvm/test/CodeGen/X86/fp-immediate-shorten.ll
+++ b/llvm/test/CodeGen/X86/fp-immediate-shorten.ll
@@ -1,6 +1,6 @@
;; Test that this FP immediate is stored in the constant pool as a float.
-; RUN: llc < %s -mtriple=i686-- -mattr=-sse2,-sse3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-sse2,-sse3 | FileCheck %s
; CHECK: {{.long.0x42f60000}}
diff --git a/llvm/test/CodeGen/X86/fp-in-intregs.ll b/llvm/test/CodeGen/X86/fp-in-intregs.ll
index 1f5121d271c0e..4068653134119 100644
--- a/llvm/test/CodeGen/X86/fp-in-intregs.ll
+++ b/llvm/test/CodeGen/X86/fp-in-intregs.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-apple-macosx -mcpu=yonah | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-macosx -mcpu=yonah | FileCheck %s
; CHECK-NOT: {{((xor|and)ps|movd)}}
; These operations should be done in integer registers, eliminating constant
diff --git a/llvm/test/CodeGen/X86/fp-int-fp-cvt.ll b/llvm/test/CodeGen/X86/fp-int-fp-cvt.ll
index c49676233f7c6..b86fd06c29242 100644
--- a/llvm/test/CodeGen/X86/fp-int-fp-cvt.ll
+++ b/llvm/test/CodeGen/X86/fp-int-fp-cvt.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512,AVX512-VL
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=x86-64-v4 -mattr=-avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512-NOVL
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512,AVX512-VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=x86-64-v4 -mattr=-avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512-NOVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
;
; fptosi -> sitofp
diff --git a/llvm/test/CodeGen/X86/fp-intrinsics-flags-x86_64.ll b/llvm/test/CodeGen/X86/fp-intrinsics-flags-x86_64.ll
index c2228046d6077..bb0b8f35a69e3 100644
--- a/llvm/test/CodeGen/X86/fp-intrinsics-flags-x86_64.ll
+++ b/llvm/test/CodeGen/X86/fp-intrinsics-flags-x86_64.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O3 -mtriple=x86_64-pc-linux < %s -stop-after=finalize-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -mtriple=x86_64-pc-linux < %s -stop-after=finalize-isel | FileCheck %s
define i32 @f20u(double %x) #0 {
; CHECK-LABEL: name: f20u
diff --git a/llvm/test/CodeGen/X86/fp-intrinsics-flags.ll b/llvm/test/CodeGen/X86/fp-intrinsics-flags.ll
index fc5279d02ab8a..23e309731f74c 100644
--- a/llvm/test/CodeGen/X86/fp-intrinsics-flags.ll
+++ b/llvm/test/CodeGen/X86/fp-intrinsics-flags.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O3 -mtriple=i686-pc-linux -mattr=sse2 -stop-after=finalize-isel < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -mtriple=i686-pc-linux -mattr=sse2 -stop-after=finalize-isel < %s | FileCheck %s
define double @sifdb(i8 %x) #0 {
entry:
diff --git a/llvm/test/CodeGen/X86/fp-intrinsics-fma.ll b/llvm/test/CodeGen/X86/fp-intrinsics-fma.ll
index 71d49481ebb8e..0a49112755a10 100644
--- a/llvm/test/CodeGen/X86/fp-intrinsics-fma.ll
+++ b/llvm/test/CodeGen/X86/fp-intrinsics-fma.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -mtriple=x86_64-pc-linux < %s | FileCheck %s --check-prefix=NOFMA
-; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+fma < %s | FileCheck %s --check-prefixes=FMA,FMA-AVX1
-; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+fma4 < %s | FileCheck %s --check-prefix=FMA4
-; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+avx512f < %s | FileCheck %s --check-prefixes=FMA,FMA-AVX512
+; RUN: llc -combiner-topological-sorting -O3 -mtriple=x86_64-pc-linux < %s | FileCheck %s --check-prefix=NOFMA
+; RUN: llc -combiner-topological-sorting -O3 -mtriple=x86_64-pc-linux -mattr=+fma < %s | FileCheck %s --check-prefixes=FMA,FMA-AVX1
+; RUN: llc -combiner-topological-sorting -O3 -mtriple=x86_64-pc-linux -mattr=+fma4 < %s | FileCheck %s --check-prefix=FMA4
+; RUN: llc -combiner-topological-sorting -O3 -mtriple=x86_64-pc-linux -mattr=+avx512f < %s | FileCheck %s --check-prefixes=FMA,FMA-AVX512
define float @f1(float %0, float %1, float %2) #0 {
; NOFMA-LABEL: f1:
diff --git a/llvm/test/CodeGen/X86/fp-load-trunc.ll b/llvm/test/CodeGen/X86/fp-load-trunc.ll
index 5fcbc78b1c929..6836698b565e1 100644
--- a/llvm/test/CodeGen/X86/fp-load-trunc.ll
+++ b/llvm/test/CodeGen/X86/fp-load-trunc.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=corei7 | FileCheck %s
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=core-avx-i | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -mcpu=core-avx-i | FileCheck %s --check-prefix=AVX
define <1 x float> @test1(ptr %p) nounwind {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/fp-logic-replace.ll b/llvm/test/CodeGen/X86/fp-logic-replace.ll
index c1660ea696f42..0520c739c19ba 100644
--- a/llvm/test/CodeGen/X86/fp-logic-replace.ll
+++ b/llvm/test/CodeGen/X86/fp-logic-replace.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -show-mc-encoding -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -show-mc-encoding -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -show-mc-encoding -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -show-mc-encoding -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -show-mc-encoding -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -show-mc-encoding -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=AVX512DQ
; Test that we can replace "scalar" FP-bitwise-logic with the optimal instruction.
; Scalar x86 FP-logic instructions only exist in your imagination and/or the bowels
diff --git a/llvm/test/CodeGen/X86/fp-round-with-concat-vector-undef-elem.ll b/llvm/test/CodeGen/X86/fp-round-with-concat-vector-undef-elem.ll
index 0cdc5458e71ca..9108c720b2463 100644
--- a/llvm/test/CodeGen/X86/fp-round-with-concat-vector-undef-elem.ll
+++ b/llvm/test/CodeGen/X86/fp-round-with-concat-vector-undef-elem.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64 -mattr=+avx512fp16,+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+avx512fp16,+avx512vl | FileCheck %s
define void @foo(<2 x float> %0) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/fp-round.ll b/llvm/test/CodeGen/X86/fp-round.ll
index 8595b63fc8107..9e79a7252f119 100644
--- a/llvm/test/CodeGen/X86/fp-round.ll
+++ b/llvm/test/CodeGen/X86/fp-round.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-freebsd -mattr=+avx | FileCheck %s --check-prefixes=AVX1
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX512F
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=AVX512FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-freebsd -mattr=+avx | FileCheck %s --check-prefixes=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=AVX512FP16
define half @round_f16(half %h) {
; SSE2-LABEL: round_f16:
diff --git a/llvm/test/CodeGen/X86/fp-roundeven.ll b/llvm/test/CodeGen/X86/fp-roundeven.ll
index ee298fd47f728..392645f38f71e 100644
--- a/llvm/test/CodeGen/X86/fp-roundeven.ll
+++ b/llvm/test/CodeGen/X86/fp-roundeven.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE41
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512FP16
define half @roundeven_f16(half %h) {
; SSE2-LABEL: roundeven_f16:
diff --git a/llvm/test/CodeGen/X86/fp-select-cmp-and.ll b/llvm/test/CodeGen/X86/fp-select-cmp-and.ll
index 1d006f725ca34..4d8d4566e248c 100644
--- a/llvm/test/CodeGen/X86/fp-select-cmp-and.ll
+++ b/llvm/test/CodeGen/X86/fp-select-cmp-and.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.2 | FileCheck %s
define double @test1(double %a, double %b, double %eps) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/fp-stack-2results.ll b/llvm/test/CodeGen/X86/fp-stack-2results.ll
index ef0efa5a5a36a..f2bac750618c1 100644
--- a/llvm/test/CodeGen/X86/fp-stack-2results.ll
+++ b/llvm/test/CodeGen/X86/fp-stack-2results.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=ALL,i686
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s -check-prefixes=ALL,x86_64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=ALL,i686
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s -check-prefixes=ALL,x86_64
%0 = type { x86_fp80, x86_fp80 }
diff --git a/llvm/test/CodeGen/X86/fp-stack-O0-crash.ll b/llvm/test/CodeGen/X86/fp-stack-O0-crash.ll
index 9104a10690015..f41013be52173 100644
--- a/llvm/test/CodeGen/X86/fp-stack-O0-crash.ll
+++ b/llvm/test/CodeGen/X86/fp-stack-O0-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -O0 -fast-isel -regalloc=fast -mcpu=i386 -o -
+; RUN: llc -combiner-topological-sorting %s -O0 -fast-isel -regalloc=fast -mcpu=i386 -o -
; PR4767
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/fp-stack-O0.ll b/llvm/test/CodeGen/X86/fp-stack-O0.ll
index d7b776838feeb..87a545b715d91 100644
--- a/llvm/test/CodeGen/X86/fp-stack-O0.ll
+++ b/llvm/test/CodeGen/X86/fp-stack-O0.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 | FileCheck %s
target triple = "x86_64-apple-macosx"
declare x86_fp80 @x1(i32) nounwind
diff --git a/llvm/test/CodeGen/X86/fp-stack-compare.ll b/llvm/test/CodeGen/X86/fp-stack-compare.ll
index dc2693c8ce68f..3e1636c464b98 100644
--- a/llvm/test/CodeGen/X86/fp-stack-compare.ll
+++ b/llvm/test/CodeGen/X86/fp-stack-compare.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=i386 | FileCheck %s --check-prefix=BASE
-; RUN: llc < %s -mtriple=i686-- -mcpu=pentiumpro | FileCheck %s --check-prefix=CMOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=i386 | FileCheck %s --check-prefix=BASE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=pentiumpro | FileCheck %s --check-prefix=CMOV
; PR6679
define float @foo(ptr %col) {
diff --git a/llvm/test/CodeGen/X86/fp-stack-direct-ret.ll b/llvm/test/CodeGen/X86/fp-stack-direct-ret.ll
index f1bb5adf8e162..06881276ef6e5 100644
--- a/llvm/test/CodeGen/X86/fp-stack-direct-ret.ll
+++ b/llvm/test/CodeGen/X86/fp-stack-direct-ret.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=ALL
-; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s --check-prefix=ALL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefix=ALL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s --check-prefix=ALL
declare double @foo()
diff --git a/llvm/test/CodeGen/X86/fp-stack-ret-conv.ll b/llvm/test/CodeGen/X86/fp-stack-ret-conv.ll
index f4928d068bcf7..4c5d48897f107 100644
--- a/llvm/test/CodeGen/X86/fp-stack-ret-conv.ll
+++ b/llvm/test/CodeGen/X86/fp-stack-ret-conv.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=yonah | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=yonah | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
target triple = "i686-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/fp-stack-ret-store.ll b/llvm/test/CodeGen/X86/fp-stack-ret-store.ll
index 4c88225ea234e..bd88377022708 100644
--- a/llvm/test/CodeGen/X86/fp-stack-ret-store.ll
+++ b/llvm/test/CodeGen/X86/fp-stack-ret-store.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=yonah | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=yonah | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/fp-stack-ret.ll b/llvm/test/CodeGen/X86/fp-stack-ret.ll
index f84844d31ae17..ae82bb808d0cf 100644
--- a/llvm/test/CodeGen/X86/fp-stack-ret.ll
+++ b/llvm/test/CodeGen/X86/fp-stack-ret.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin8 -mcpu=yonah | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin8 -mcpu=yonah | FileCheck %s
; These testcases shouldn't require loading into an XMM register then storing
; to memory, then reloading into an FPStack reg.
diff --git a/llvm/test/CodeGen/X86/fp-stack-retcopy.ll b/llvm/test/CodeGen/X86/fp-stack-retcopy.ll
index 9f3dd39d41644..fcaf9a5d2ab06 100644
--- a/llvm/test/CodeGen/X86/fp-stack-retcopy.ll
+++ b/llvm/test/CodeGen/X86/fp-stack-retcopy.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; This should not copy the result of foo into an xmm register.
-; RUN: llc < %s -mcpu=yonah -mtriple=i686-apple-darwin9 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=yonah -mtriple=i686-apple-darwin9 | FileCheck %s
; rdar://5689903
declare double @foo()
diff --git a/llvm/test/CodeGen/X86/fp-stack-set-st1.ll b/llvm/test/CodeGen/X86/fp-stack-set-st1.ll
index 097c601e4286f..db019b3eb3249 100644
--- a/llvm/test/CodeGen/X86/fp-stack-set-st1.ll
+++ b/llvm/test/CodeGen/X86/fp-stack-set-st1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define i32 @main() nounwind {
; CHECK-LABEL: main:
diff --git a/llvm/test/CodeGen/X86/fp-stack.ll b/llvm/test/CodeGen/X86/fp-stack.ll
index 33a4d594d2bd7..976ad1cd5d114 100644
--- a/llvm/test/CodeGen/X86/fp-stack.ll
+++ b/llvm/test/CodeGen/X86/fp-stack.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - -mcpu=pentium
+; RUN: llc -combiner-topological-sorting %s -o - -mcpu=pentium
; PR6828
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i386-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/fp-strict-libcalls-msvc32.ll b/llvm/test/CodeGen/X86/fp-strict-libcalls-msvc32.ll
index 74291fbb75e81..4fc2f1722b3cb 100644
--- a/llvm/test/CodeGen/X86/fp-strict-libcalls-msvc32.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-libcalls-msvc32.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -mtriple=i686-pc-windows-msvc -mattr=+cmov < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -mtriple=i686-pc-windows-msvc -mattr=+cmov < %s | FileCheck %s
define float @ceil(float %x) #0 {
; CHECK-LABEL: ceil:
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
index 6a6b86e8efa7c..4b4f157be79fa 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp-fp16.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c -O3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X86-FP16
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X64-FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c -O3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X86-FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X64-FP16
define i32 @test_f16_oeq_q(i32 %a, i32 %b, half %f1, half %f2) #0 {
; SSE2-LABEL: test_f16_oeq_q:
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll
index e3e2b6225a7ba..c82b2e94935c0 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-cmp.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefix=SSE-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefix=SSE-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefix=AVX-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefix=AVX-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefix=X87
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse,+cmov -O3 | FileCheck %s --check-prefix=X87-CMOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefix=SSE-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefix=SSE-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefix=AVX-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefix=AVX-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefix=X87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=-sse,+cmov -O3 | FileCheck %s --check-prefix=X87-CMOV
define i32 @test_f32_oeq_q(i32 %a, i32 %b, float %f1, float %f2) #0 {
; SSE-32-LABEL: test_f32_oeq_q:
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
index 61a0c4eda8c72..1c7e59c5f8a0f 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-fp16.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c -O3 | FileCheck %s --check-prefixes=AVX,F16C
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX,AVX512
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c -O3 | FileCheck %s --check-prefixes=AVX,F16C
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X64
declare half @llvm.experimental.constrained.fadd.f16(half, half, metadata, metadata)
declare half @llvm.experimental.constrained.fsub.f16(half, half, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll
index 0498f9b7f9a3d..0c911271c9731 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint-fp16.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c -O3 | FileCheck %s --check-prefixes=AVX,F16C
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX,AVX512
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c -O3 | FileCheck %s --check-prefixes=AVX,F16C
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X64
declare i1 @llvm.experimental.constrained.fptosi.i1.f16(half, metadata)
declare i8 @llvm.experimental.constrained.fptosi.i8.f16(half, metadata)
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint.ll
index ecdc507a882c3..2713c5b9b5f2c 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-fptoint.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX-X86,AVX1-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX-X64,AVX1-X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX-X86,AVX512-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX-X64,AVX512-X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefixes=X87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX-X86,AVX1-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX-X64,AVX1-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX-X86,AVX512-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX-X64,AVX512-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefixes=X87
declare i1 @llvm.experimental.constrained.fptosi.i1.f32(float, metadata)
declare i8 @llvm.experimental.constrained.fptosi.i8.f32(float, metadata)
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll
index 6312a26db9bf4..5e8ae33c383ec 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-inttofp-fp16.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c -O3 | FileCheck %s --check-prefixes=AVX,F16C
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX,AVX512
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c -O3 | FileCheck %s --check-prefixes=AVX,F16C
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X64
declare half @llvm.experimental.constrained.sitofp.f16.i1(i1, metadata, metadata)
declare half @llvm.experimental.constrained.sitofp.f16.i8(i8, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-inttofp.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-inttofp.ll
index f0aa3827ce937..68745d4b7997c 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-inttofp.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-inttofp.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX-X86,AVX1-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX-X64,AVX1-X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX-X86,AVX512-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX-X64,AVX512-X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefixes=X87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX-X86,AVX1-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX-X64,AVX1-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX-X86,AVX512-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX-X64,AVX512-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefixes=X87
declare float @llvm.experimental.constrained.sitofp.f32.i1(i1, metadata, metadata)
declare float @llvm.experimental.constrained.sitofp.f32.i8(i8, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
index 85a43394a1dc8..8a903e9d94c36 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-round-fp16.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c -O3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -O3 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -O3 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c -O3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -O3 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -O3 | FileCheck %s --check-prefixes=X64
declare half @llvm.experimental.constrained.ceil.f16(half, metadata)
declare half @llvm.experimental.constrained.floor.f16(half, metadata)
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar-round.ll b/llvm/test/CodeGen/X86/fp-strict-scalar-round.ll
index 13f890ae6e191..ce8b29be5d579 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar-round.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar-round.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 -O3 | FileCheck %s --check-prefix=SSE41-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 -O3 | FileCheck %s --check-prefix=SSE41-X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefix=AVX-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefix=AVX-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 -O3 | FileCheck %s --check-prefix=SSE41-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 -O3 | FileCheck %s --check-prefix=SSE41-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefix=AVX-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefix=AVX-X64
declare float @llvm.experimental.constrained.ceil.f32(float, metadata)
declare double @llvm.experimental.constrained.ceil.f64(double, metadata)
diff --git a/llvm/test/CodeGen/X86/fp-strict-scalar.ll b/llvm/test/CodeGen/X86/fp-strict-scalar.ll
index f1be74f5c3ac4..948e3fea7863b 100644
--- a/llvm/test/CodeGen/X86/fp-strict-scalar.ll
+++ b/llvm/test/CodeGen/X86/fp-strict-scalar.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+fma -O3 | FileCheck %s --check-prefixes=AVX-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+fma -O3 | FileCheck %s --check-prefixes=AVX-X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX-X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefixes=X87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+fma -O3 | FileCheck %s --check-prefixes=AVX-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+fma -O3 | FileCheck %s --check-prefixes=AVX-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefixes=X87
declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)
declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/fp-trunc.ll b/llvm/test/CodeGen/X86/fp-trunc.ll
index e33548fedfd0d..79d384639aae1 100644
--- a/llvm/test/CodeGen/X86/fp-trunc.ll
+++ b/llvm/test/CodeGen/X86/fp-trunc.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=corei7 | FileCheck %s
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=core-avx-i | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -mcpu=core-avx-i | FileCheck %s --check-prefix=AVX
define <1 x float> @test1(<1 x double> %x) nounwind {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/fp-undef.ll b/llvm/test/CodeGen/X86/fp-undef.ll
index c358085722a9b..a5f06a4501531 100644
--- a/llvm/test/CodeGen/X86/fp-undef.ll
+++ b/llvm/test/CodeGen/X86/fp-undef.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ANY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ANY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ANY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=ANY
; This is duplicated from tests for InstSimplify. If you're
; adding something here, you should probably add it there too.
diff --git a/llvm/test/CodeGen/X86/fp-une-cmp.ll b/llvm/test/CodeGen/X86/fp-une-cmp.ll
index dd32f23d3b9cb..c6c173bc51837 100644
--- a/llvm/test/CodeGen/X86/fp-une-cmp.ll
+++ b/llvm/test/CodeGen/X86/fp-une-cmp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; <rdar://problem/7859988>
diff --git a/llvm/test/CodeGen/X86/fp128-calling-conv.ll b/llvm/test/CodeGen/X86/fp128-calling-conv.ll
index 8dc99a2431dbb..19ba0d89a6253 100644
--- a/llvm/test/CodeGen/X86/fp128-calling-conv.ll
+++ b/llvm/test/CodeGen/X86/fp128-calling-conv.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx | FileCheck %s
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx | FileCheck %s
; __float128 myFP128 = 1.0L; // x86_64-linux-android
@myFP128 = global fp128 0xL00000000000000003FFF000000000000, align 16
diff --git a/llvm/test/CodeGen/X86/fp128-compare.ll b/llvm/test/CodeGen/X86/fp128-compare.ll
index 3851e59a08e35..c17d277237340 100644
--- a/llvm/test/CodeGen/X86/fp128-compare.ll
+++ b/llvm/test/CodeGen/X86/fp128-compare.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx \
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx \
; RUN: -enable-legalize-types-checking | FileCheck %s
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx \
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx \
; RUN: -enable-legalize-types-checking | FileCheck %s
define i32 @TestComp128GT(fp128 %d1, fp128 %d2) {
diff --git a/llvm/test/CodeGen/X86/fp128-extract.ll b/llvm/test/CodeGen/X86/fp128-extract.ll
index bcd0e2900b281..73c177c901d2e 100644
--- a/llvm/test/CodeGen/X86/fp128-extract.ll
+++ b/llvm/test/CodeGen/X86/fp128-extract.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx -enable-legalize-types-checking | FileCheck %s
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx -enable-legalize-types-checking | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx -enable-legalize-types-checking | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx -enable-legalize-types-checking | FileCheck %s
; Test the softened result of extractelement op code.
define fp128 @TestExtract(<2 x double> %x) nounwind {
diff --git a/llvm/test/CodeGen/X86/fp128-g.ll b/llvm/test/CodeGen/X86/fp128-g.ll
index d2b956f816f02..963fb8aeaeac2 100644
--- a/llvm/test/CodeGen/X86/fp128-g.ll
+++ b/llvm/test/CodeGen/X86/fp128-g.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx \
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx \
; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=X64
;
; These cases check if x86_64-linux-android works with -O2 -g,
diff --git a/llvm/test/CodeGen/X86/fp128-i128.ll b/llvm/test/CodeGen/X86/fp128-i128.ll
index 338950ac4c350..46a7152bfb78c 100644
--- a/llvm/test/CodeGen/X86/fp128-i128.ll
+++ b/llvm/test/CodeGen/X86/fp128-i128.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O2 -verify-machineinstrs -mtriple=x86_64-linux-android -mattr=+mmx -enable-legalize-types-checking | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -O2 -verify-machineinstrs -mtriple=x86_64-linux-gnu -mattr=+mmx -enable-legalize-types-checking | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -O2 -verify-machineinstrs -mtriple=x86_64-linux-android -mattr=+mmx,avx2 -enable-legalize-types-checking | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -O2 -verify-machineinstrs -mtriple=x86_64-linux-gnu -mattr=+mmx,avx2 -enable-legalize-types-checking | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -O2 -verify-machineinstrs -mtriple=x86_64-linux-android -mattr=+mmx,avx512vl -enable-legalize-types-checking | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -O2 -verify-machineinstrs -mtriple=x86_64-linux-gnu -mattr=+mmx,avx512vl -enable-legalize-types-checking | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -O2 -verify-machineinstrs -mtriple=x86_64-linux-android -mattr=+mmx -enable-legalize-types-checking | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -O2 -verify-machineinstrs -mtriple=x86_64-linux-gnu -mattr=+mmx -enable-legalize-types-checking | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -O2 -verify-machineinstrs -mtriple=x86_64-linux-android -mattr=+mmx,avx2 -enable-legalize-types-checking | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -O2 -verify-machineinstrs -mtriple=x86_64-linux-gnu -mattr=+mmx,avx2 -enable-legalize-types-checking | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -O2 -verify-machineinstrs -mtriple=x86_64-linux-android -mattr=+mmx,avx512vl -enable-legalize-types-checking | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -O2 -verify-machineinstrs -mtriple=x86_64-linux-gnu -mattr=+mmx,avx512vl -enable-legalize-types-checking | FileCheck %s --check-prefixes=CHECK,AVX
; These tests were generated from simplified libm C code.
; When compiled for the x86_64-linux-android target,
diff --git a/llvm/test/CodeGen/X86/fp128-load.ll b/llvm/test/CodeGen/X86/fp128-load.ll
index 7b106c0d5e728..fd248ac2a77fa 100644
--- a/llvm/test/CodeGen/X86/fp128-load.ll
+++ b/llvm/test/CodeGen/X86/fp128-load.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx \
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx \
; RUN: -enable-legalize-types-checking | FileCheck %s
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx \
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx \
; RUN: -enable-legalize-types-checking | FileCheck %s
; __float128 myFP128 = 1.0L; // x86_64-linux-android
diff --git a/llvm/test/CodeGen/X86/fp128-select.ll b/llvm/test/CodeGen/X86/fp128-select.ll
index 27a651e23f886..55991b49124c3 100644
--- a/llvm/test/CodeGen/X86/fp128-select.ll
+++ b/llvm/test/CodeGen/X86/fp128-select.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+sse \
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-android -mattr=+sse \
; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+sse \
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+sse \
; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=-sse \
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-android -mattr=-sse \
; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=NOSSE
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=-sse \
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-gnu -mattr=-sse \
; RUN: -enable-legalize-types-checking | FileCheck %s --check-prefix=NOSSE
define void @test_select(ptr %p, ptr %q, i1 zeroext %c) nounwind {
diff --git a/llvm/test/CodeGen/X86/fp128-store.ll b/llvm/test/CodeGen/X86/fp128-store.ll
index e93771442b74a..d9e20b4e750b6 100644
--- a/llvm/test/CodeGen/X86/fp128-store.ll
+++ b/llvm/test/CodeGen/X86/fp128-store.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx | FileCheck %s
-; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx | FileCheck %s
; __float128 myFP128 = 1.0L; // x86_64-linux-android
@myFP128 = dso_local global fp128 0xL00000000000000003FFF000000000000, align 16
diff --git a/llvm/test/CodeGen/X86/fp16-libcalls.ll b/llvm/test/CodeGen/X86/fp16-libcalls.ll
index 6abdf9a5ba652..ca3f05177b651 100644
--- a/llvm/test/CodeGen/X86/fp16-libcalls.ll
+++ b/llvm/test/CodeGen/X86/fp16-libcalls.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -enable-legalize-types-checking -mtriple=x86_64-linux-gnu -mattr=+f16c | FileCheck %s --check-prefix=F16C
-; RUN: llc < %s -enable-legalize-types-checking -mtriple=x86_64-linux-gnu -mattr=+avx512fp16 | FileCheck %s --check-prefix=FP16
-; RUN: llc < %s -enable-legalize-types-checking -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -enable-legalize-types-checking -mtriple=i686-linux-gnu -mattr=sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -enable-legalize-types-checking -mtriple=x86_64-linux-gnu -mattr=+f16c | FileCheck %s --check-prefix=F16C
+; RUN: llc -combiner-topological-sorting < %s -enable-legalize-types-checking -mtriple=x86_64-linux-gnu -mattr=+avx512fp16 | FileCheck %s --check-prefix=FP16
+; RUN: llc -combiner-topological-sorting < %s -enable-legalize-types-checking -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -enable-legalize-types-checking -mtriple=i686-linux-gnu -mattr=sse2 | FileCheck %s --check-prefix=X86
; Check all soft floating point library function calls.
diff --git a/llvm/test/CodeGen/X86/fp16-spill.ll b/llvm/test/CodeGen/X86/fp16-spill.ll
index 6161009b6f563..c51b887e5eed9 100644
--- a/llvm/test/CodeGen/X86/fp16-spill.ll
+++ b/llvm/test/CodeGen/X86/fp16-spill.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -verify-machineinstrs | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -verify-machineinstrs | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -verify-machineinstrs | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -verify-machineinstrs | FileCheck %s --check-prefixes=AVX512
define half @test(float %f, ptr %p) nounwind {
; SSE2-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/fp2sint.ll b/llvm/test/CodeGen/X86/fp2sint.ll
index 722a85d852be0..6d3b3289139a3 100644
--- a/llvm/test/CodeGen/X86/fp2sint.ll
+++ b/llvm/test/CodeGen/X86/fp2sint.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
;; LowerFP_TO_SINT should not create a stack object if it's not needed.
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
define i32 @main(i32 %argc, ptr %argv) {
; CHECK-LABEL: main:
diff --git a/llvm/test/CodeGen/X86/fp80-strict-libcalls.ll b/llvm/test/CodeGen/X86/fp80-strict-libcalls.ll
index 8bbc6247dbafd..0a006e759805b 100644
--- a/llvm/test/CodeGen/X86/fp80-strict-libcalls.ll
+++ b/llvm/test/CodeGen/X86/fp80-strict-libcalls.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -O3 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -O3 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -O3 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -O3 | FileCheck %s --check-prefixes=X64
define x86_fp80 @fma(x86_fp80 %x, x86_fp80 %y, x86_fp80 %z) nounwind strictfp {
; X86-LABEL: fma:
diff --git a/llvm/test/CodeGen/X86/fp80-strict-scalar-cmp.ll b/llvm/test/CodeGen/X86/fp80-strict-scalar-cmp.ll
index cb2361fbb8d37..9fbaeaaec0c3f 100644
--- a/llvm/test/CodeGen/X86/fp80-strict-scalar-cmp.ll
+++ b/llvm/test/CodeGen/X86/fp80-strict-scalar-cmp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -O3 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=-sse -O3 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -O3 | FileCheck %s --check-prefixes=X64
define i32 @test_oeq_q(i32 %a, i32 %b, x86_fp80 %f1, x86_fp80 %f2) #0 {
; X86-LABEL: test_oeq_q:
diff --git a/llvm/test/CodeGen/X86/fp80-strict-scalar.ll b/llvm/test/CodeGen/X86/fp80-strict-scalar.ll
index b9b1ae60d479e..6ff0422cf117a 100644
--- a/llvm/test/CodeGen/X86/fp80-strict-scalar.ll
+++ b/llvm/test/CodeGen/X86/fp80-strict-scalar.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -O3 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -O3 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -O3 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -O3 | FileCheck %s --check-prefixes=X64
declare x86_fp80 @llvm.experimental.constrained.fadd.f80(x86_fp80, x86_fp80, metadata, metadata)
declare x86_fp80 @llvm.experimental.constrained.fsub.f80(x86_fp80, x86_fp80, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/fp_constant_op.ll b/llvm/test/CodeGen/X86/fp_constant_op.ll
index 36fc83508e603..57c02efec817f 100644
--- a/llvm/test/CodeGen/X86/fp_constant_op.ll
+++ b/llvm/test/CodeGen/X86/fp_constant_op.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel -mcpu=i486 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -x86-asm-syntax=intel -mcpu=i486 | FileCheck %s
; Test that the load of the constant is folded into the operation.
diff --git a/llvm/test/CodeGen/X86/fp_load_cast_fold.ll b/llvm/test/CodeGen/X86/fp_load_cast_fold.ll
index 310682d945012..808a45ecc5ba2 100644
--- a/llvm/test/CodeGen/X86/fp_load_cast_fold.ll
+++ b/llvm/test/CodeGen/X86/fp_load_cast_fold.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define double @short(ptr %P) {
%V = load i16, ptr %P ; <i16> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/fp_load_fold.ll b/llvm/test/CodeGen/X86/fp_load_fold.ll
index 58d2b686a8697..50f3744bcdc6e 100644
--- a/llvm/test/CodeGen/X86/fp_load_fold.ll
+++ b/llvm/test/CodeGen/X86/fp_load_fold.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s
; Test that the load of the memory location is folded into the operation.
diff --git a/llvm/test/CodeGen/X86/fpcmp-soft-fp.ll b/llvm/test/CodeGen/X86/fpcmp-soft-fp.ll
index 480a47e57f073..f4c97e2a73e55 100644
--- a/llvm/test/CodeGen/X86/fpcmp-soft-fp.ll
+++ b/llvm/test/CodeGen/X86/fpcmp-soft-fp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=pentium -mtriple=i686-linux-gnu -float-abi=soft | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=pentium -mtriple=i686-linux-gnu -float-abi=soft | FileCheck %s
define i1 @test1(double %d) #0 {
entry:
diff --git a/llvm/test/CodeGen/X86/fpenv.ll b/llvm/test/CodeGen/X86/fpenv.ll
index 77eaaa1ca08db..f1f137f16a0ed 100644
--- a/llvm/test/CodeGen/X86/fpenv.ll
+++ b/llvm/test/CodeGen/X86/fpenv.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=-sse -verify-machineinstrs < %s | FileCheck %s -check-prefix=X86-NOSSE
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+sse -verify-machineinstrs < %s | FileCheck %s -check-prefix=X86-SSE
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=-sse -verify-machineinstrs < %s | FileCheck %s -check-prefix=X86-NOSSE
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+sse -verify-machineinstrs < %s | FileCheck %s -check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s -check-prefix=X64
declare void @llvm.set.rounding(i32 %x)
declare i256 @llvm.get.fpenv.i256()
diff --git a/llvm/test/CodeGen/X86/fpstack-debuginstr-kill.ll b/llvm/test/CodeGen/X86/fpstack-debuginstr-kill.ll
index 3bf363b2a009a..fd81d6a148cbc 100644
--- a/llvm/test/CodeGen/X86/fpstack-debuginstr-kill.ll
+++ b/llvm/test/CodeGen/X86/fpstack-debuginstr-kill.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i386-apple-darwin -no-integrated-as
source_filename = "test/CodeGen/X86/fpstack-debuginstr-kill.ll"
diff --git a/llvm/test/CodeGen/X86/fptosi-constant.ll b/llvm/test/CodeGen/X86/fptosi-constant.ll
index 83dac957d9fec..656c79636f512 100644
--- a/llvm/test/CodeGen/X86/fptosi-constant.ll
+++ b/llvm/test/CodeGen/X86/fptosi-constant.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; Check constant FP to signed integer conversions that overflow the integer type.
diff --git a/llvm/test/CodeGen/X86/fptosi-sat-scalar.ll b/llvm/test/CodeGen/X86/fptosi-sat-scalar.ll
index 9b7a43a29a942..8b84881c09330 100644
--- a/llvm/test/CodeGen/X86/fptosi-sat-scalar.ll
+++ b/llvm/test/CodeGen/X86/fptosi-sat-scalar.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux | FileCheck %s --check-prefix=X86-X87
-; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux | FileCheck %s --check-prefix=X86-X87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
;
; 32-bit float to signed integer
diff --git a/llvm/test/CodeGen/X86/fptosi-sat-vector-128.ll b/llvm/test/CodeGen/X86/fptosi-sat-vector-128.ll
index 0183d7a7d0026..166bcc13f63f8 100644
--- a/llvm/test/CodeGen/X86/fptosi-sat-vector-128.ll
+++ b/llvm/test/CodeGen/X86/fptosi-sat-vector-128.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
;
; 32-bit float to signed integer
diff --git a/llvm/test/CodeGen/X86/fptoui-may-overflow.ll b/llvm/test/CodeGen/X86/fptoui-may-overflow.ll
index ec53704289d19..b36b9a70169a6 100644
--- a/llvm/test/CodeGen/X86/fptoui-may-overflow.ll
+++ b/llvm/test/CodeGen/X86/fptoui-may-overflow.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
; @fptoui_zext is legal to optimize to a single vcvttps2dq: if one of the i8
; results of fptoui is poisoned, the corresponding i32 result of the zext is
diff --git a/llvm/test/CodeGen/X86/fptoui-sat-scalar.ll b/llvm/test/CodeGen/X86/fptoui-sat-scalar.ll
index a074c78d512f5..1f4f77c28f8af 100644
--- a/llvm/test/CodeGen/X86/fptoui-sat-scalar.ll
+++ b/llvm/test/CodeGen/X86/fptoui-sat-scalar.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux | FileCheck %s --check-prefix=X86-X87
-; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux | FileCheck %s --check-prefix=X86-X87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
;
; 32-bit float to unsigned integer
diff --git a/llvm/test/CodeGen/X86/fptoui-sat-vector-128.ll b/llvm/test/CodeGen/X86/fptoui-sat-vector-128.ll
index 578eaa06ca7d3..67a657c47e939 100644
--- a/llvm/test/CodeGen/X86/fptoui-sat-vector-128.ll
+++ b/llvm/test/CodeGen/X86/fptoui-sat-vector-128.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
;
; 32-bit float to unsigned integer
diff --git a/llvm/test/CodeGen/X86/frame-base.ll b/llvm/test/CodeGen/X86/frame-base.ll
index 72c062b77a5ee..5ccc345a5036c 100644
--- a/llvm/test/CodeGen/X86/frame-base.ll
+++ b/llvm/test/CodeGen/X86/frame-base.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-macosx -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx -o - %s | FileCheck %s
; The issue here was a conflict between forming a %rip-relative lea and a
; FrameIndex lea. The %rip sanity-checks didn't consider that a base register
diff --git a/llvm/test/CodeGen/X86/frame-lowering-debug-intrinsic-2.ll b/llvm/test/CodeGen/X86/frame-lowering-debug-intrinsic-2.ll
index b3761ff7d7edc..7a59028b8f5c0 100644
--- a/llvm/test/CodeGen/X86/frame-lowering-debug-intrinsic-2.ll
+++ b/llvm/test/CodeGen/X86/frame-lowering-debug-intrinsic-2.ll
@@ -1,6 +1,6 @@
; Test ensuring debug intrinsics do not affect generated function prologue.
;
-; RUN: llc -O1 -mtriple=x86_64-unknown-unknown -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O1 -mtriple=x86_64-unknown-unknown -o - %s | FileCheck %s
@a = local_unnamed_addr global i64 0, align 8
diff --git a/llvm/test/CodeGen/X86/frame-lowering-debug-intrinsic.ll b/llvm/test/CodeGen/X86/frame-lowering-debug-intrinsic.ll
index 053dd3dd672df..12aa53ebcff08 100644
--- a/llvm/test/CodeGen/X86/frame-lowering-debug-intrinsic.ll
+++ b/llvm/test/CodeGen/X86/frame-lowering-debug-intrinsic.ll
@@ -1,6 +1,6 @@
; Test ensuring debug intrinsics do not affect generated function prologue.
;
-; RUN: llc -O1 -mtriple=x86_64-unknown-unknown -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O1 -mtriple=x86_64-unknown-unknown -o - %s | FileCheck %s
define i64 @fn1NoDebug(i64 %a) {
%call = call i64 @fn(i64 %a, i64 0)
diff --git a/llvm/test/CodeGen/X86/frame-order.ll b/llvm/test/CodeGen/X86/frame-order.ll
index f410acfda5c12..b0def027f5de9 100644
--- a/llvm/test/CodeGen/X86/frame-order.ll
+++ b/llvm/test/CodeGen/X86/frame-order.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-linux-gnueabi < %s | FileCheck %s
-; RUN: opt -passes=strip -S < %s | llc -mtriple=x86_64-linux-gnueabi | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnueabi < %s | FileCheck %s
+; RUN: opt -passes=strip -S < %s | llc -combiner-topological-sorting -mtriple=x86_64-linux-gnueabi | FileCheck %s
; This test checks if the code is generated correctly with and without debug info.
diff --git a/llvm/test/CodeGen/X86/frame-pointer-reserved.ll b/llvm/test/CodeGen/X86/frame-pointer-reserved.ll
index bf5887fe50508..6266110808d65 100644
--- a/llvm/test/CodeGen/X86/frame-pointer-reserved.ll
+++ b/llvm/test/CodeGen/X86/frame-pointer-reserved.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
declare void @bar(i32, i32)
diff --git a/llvm/test/CodeGen/X86/frameaddr.ll b/llvm/test/CodeGen/X86/frameaddr.ll
index 33c9e3855c108..3e2250e30471e 100644
--- a/llvm/test/CodeGen/X86/frameaddr.ll
+++ b/llvm/test/CodeGen/X86/frameaddr.ll
@@ -1,10 +1,10 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=CHECK-32
-; RUN: llc < %s -mtriple=i686-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-32
-; RUN: llc < %s -mtriple=x86_64-pc-win32 -fast-isel | FileCheck %s --check-prefix=CHECK-W64
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=CHECK-64
-; RUN: llc < %s -mtriple=x86_64-unknown -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-64
-; RUN: llc < %s -mtriple=x86_64-gnux32 | FileCheck %s --check-prefix=CHECK-X32ABI
-; RUN: llc < %s -mtriple=x86_64-gnux32 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-X32ABI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 -fast-isel | FileCheck %s --check-prefix=CHECK-W64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-gnux32 | FileCheck %s --check-prefix=CHECK-X32ABI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-gnux32 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=CHECK-X32ABI
define ptr @test1() nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/frameregister.ll b/llvm/test/CodeGen/X86/frameregister.ll
index 3d196a3c4a239..c911309fdcc26 100644
--- a/llvm/test/CodeGen/X86/frameregister.ll
+++ b/llvm/test/CodeGen/X86/frameregister.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnueabi | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnueabi | FileCheck %s
; RUN: opt < %s -O3 -S -mtriple=x86_64-linux-gnueabi | FileCheck %s --check-prefix=OPT
define i64 @get_frame() #0 {
diff --git a/llvm/test/CodeGen/X86/freeze-combine.ll b/llvm/test/CodeGen/X86/freeze-combine.ll
index 1cfb8627a4dd4..a4204320a4cf9 100644
--- a/llvm/test/CodeGen/X86/freeze-combine.ll
+++ b/llvm/test/CodeGen/X86/freeze-combine.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc -stop-after=finalize-isel -mtriple=x86_64-unknown < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -stop-after=finalize-isel -mtriple=x86_64-unknown < %s 2>&1 | FileCheck %s
define i32 @const() {
; CHECK-LABEL: name: const
; CHECK: bb.0 (%ir-block.0):
diff --git a/llvm/test/CodeGen/X86/freeze-constant-fold.ll b/llvm/test/CodeGen/X86/freeze-constant-fold.ll
index 6c22d855e79fe..4058f3029c4f0 100644
--- a/llvm/test/CodeGen/X86/freeze-constant-fold.ll
+++ b/llvm/test/CodeGen/X86/freeze-constant-fold.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=CHECK,X64
define i32 @fold_add_freeze_i32() {
; CHECK-LABEL: fold_add_freeze_i32:
diff --git a/llvm/test/CodeGen/X86/freeze-legalize.ll b/llvm/test/CodeGen/X86/freeze-legalize.ll
index 788ce154dfdce..c9aa81dcea561 100644
--- a/llvm/test/CodeGen/X86/freeze-legalize.ll
+++ b/llvm/test/CodeGen/X86/freeze-legalize.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; Make sure that seldag legalization works correctly for freeze instruction.
-; RUN: llc -mtriple=i386-apple-darwin < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-apple-darwin < %s 2>&1 | FileCheck %s
define i64 @expand(i32 %x) {
; CHECK-LABEL: expand:
diff --git a/llvm/test/CodeGen/X86/freeze-unary.ll b/llvm/test/CodeGen/X86/freeze-unary.ll
index bc9e29957c74a..4f85f9fc0d8f1 100644
--- a/llvm/test/CodeGen/X86/freeze-unary.ll
+++ b/llvm/test/CodeGen/X86/freeze-unary.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,X64
define i32 @freeze_sext(i8 %a0) nounwind {
; X86-LABEL: freeze_sext:
diff --git a/llvm/test/CodeGen/X86/frem-libcall.ll b/llvm/test/CodeGen/X86/frem-libcall.ll
index f79b0dc6bd1ab..3fcfb05d8523d 100644
--- a/llvm/test/CodeGen/X86/frem-libcall.ll
+++ b/llvm/test/CodeGen/X86/frem-libcall.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu < %s | FileCheck %s
; Ensure vectorized FREMs are not widened/unrolled such that they get lowered
; into libcalls on undef elements.
diff --git a/llvm/test/CodeGen/X86/frem-msvc32.ll b/llvm/test/CodeGen/X86/frem-msvc32.ll
index 01144eb44de48..57d998c207764 100644
--- a/llvm/test/CodeGen/X86/frem-msvc32.ll
+++ b/llvm/test/CodeGen/X86/frem-msvc32.ll
@@ -2,7 +2,7 @@
; MSVC does not have a 32-bit fmodf function, so it must be promoted to
; a 64-bit fmod rtlib call.
-; RUN: llc -mtriple=i686-pc-windows-msvc -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-pc-windows-msvc -O0 < %s | FileCheck %s
; CHECK: @do_frem32
; CHECK: {{_fmod$}}
diff --git a/llvm/test/CodeGen/X86/fsafdo_probe.ll b/llvm/test/CodeGen/X86/fsafdo_probe.ll
index fa91670306ba1..dbbb8d80c7f00 100644
--- a/llvm/test/CodeGen/X86/fsafdo_probe.ll
+++ b/llvm/test/CodeGen/X86/fsafdo_probe.ll
@@ -1,7 +1,7 @@
; REQUIRES: x86_64-linux
; REQUIRES: asserts
-; RUN: llc -enable-fs-discriminator -improved-fs-discriminator=false --debug-only=mirfs-discriminators < %s -o - 2>&1 | FileCheck %s --check-prefixes=V0
-; RUN: llc -enable-fs-discriminator -improved-fs-discriminator=true --debug-only=mirfs-discriminators < %s -o - 2>&1 | FileCheck %s --check-prefixes=V1
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -improved-fs-discriminator=false --debug-only=mirfs-discriminators < %s -o - 2>&1 | FileCheck %s --check-prefixes=V0
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -improved-fs-discriminator=true --debug-only=mirfs-discriminators < %s -o - 2>&1 | FileCheck %s --check-prefixes=V1
; Check that fs-afdo discriminators are generated.
; V0: foo.c:7:3: add FS discriminator, from 0 -> 11264
diff --git a/llvm/test/CodeGen/X86/fsafdo_probe2.ll b/llvm/test/CodeGen/X86/fsafdo_probe2.ll
index 04e4145abdc0c..6eceb431bec46 100644
--- a/llvm/test/CodeGen/X86/fsafdo_probe2.ll
+++ b/llvm/test/CodeGen/X86/fsafdo_probe2.ll
@@ -1,6 +1,6 @@
; REQUIRES: asserts
; RUN: llvm-profdata merge --sample -profile-isfs --extbinary -o %t.afdo %S/Inputs/fsloader-probe.afdo
-; RUN: llc -enable-fs-discriminator -fs-profile-file=%t.afdo -show-fs-branchprob -disable-ra-fsprofile-loader=false -disable-layout-fsprofile-loader=false < %s 2>&1 | FileCheck %s --check-prefix=LOADER
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -fs-profile-file=%t.afdo -show-fs-branchprob -disable-ra-fsprofile-loader=false -disable-layout-fsprofile-loader=false < %s 2>&1 | FileCheck %s --check-prefix=LOADER
;
;;
;; C source code for the test.
diff --git a/llvm/test/CodeGen/X86/fsafdo_test1.ll b/llvm/test/CodeGen/X86/fsafdo_test1.ll
index e80a7f2f354f2..79965eadb58eb 100644
--- a/llvm/test/CodeGen/X86/fsafdo_test1.ll
+++ b/llvm/test/CodeGen/X86/fsafdo_test1.ll
@@ -1,5 +1,5 @@
-; RUN: llc -enable-fs-discriminator -improved-fs-discriminator=false < %s | FileCheck %s --check-prefixes=V0,V01
-; RUN: llc -enable-fs-discriminator -improved-fs-discriminator=true < %s | FileCheck %s --check-prefixes=V1,V01
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -improved-fs-discriminator=false < %s | FileCheck %s --check-prefixes=V0,V01
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -improved-fs-discriminator=true < %s | FileCheck %s --check-prefixes=V1,V01
;
; Check that fs-afdo discriminators are generated.
; V01: .loc 1 7 3 is_stmt 0 discriminator 2 # foo.c:7:3
diff --git a/llvm/test/CodeGen/X86/fsafdo_test2.ll b/llvm/test/CodeGen/X86/fsafdo_test2.ll
index fc4c1e87dd285..208c5d7cac487 100644
--- a/llvm/test/CodeGen/X86/fsafdo_test2.ll
+++ b/llvm/test/CodeGen/X86/fsafdo_test2.ll
@@ -1,12 +1,12 @@
; REQUIRES: asserts
-; RUN: llc -enable-fs-discriminator -improved-fs-discriminator=false < %s | FileCheck %s --check-prefixes=V0,V01
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -improved-fs-discriminator=false < %s | FileCheck %s --check-prefixes=V0,V01
; RUN: llvm-profdata merge --sample -profile-isfs -o %t0.afdo %S/Inputs/fsloader.afdo
-; RUN: llc -enable-fs-discriminator -improved-fs-discriminator=false -fs-profile-file=%t0.afdo -show-fs-branchprob -disable-ra-fsprofile-loader=false -disable-layout-fsprofile-loader=false < %s 2>&1 | FileCheck %s --check-prefixes=LOADERV0,LOADER
-; RUN: llc -enable-fs-discriminator -improved-fs-discriminator=true < %s | FileCheck %s --check-prefixes=V1,V01
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -improved-fs-discriminator=false -fs-profile-file=%t0.afdo -show-fs-branchprob -disable-ra-fsprofile-loader=false -disable-layout-fsprofile-loader=false < %s 2>&1 | FileCheck %s --check-prefixes=LOADERV0,LOADER
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -improved-fs-discriminator=true < %s | FileCheck %s --check-prefixes=V1,V01
; RUN: llvm-profdata merge --sample -profile-isfs -o %t1.afdo %S/Inputs/fsloader_v1.afdo
-; RUN: llc -enable-fs-discriminator -improved-fs-discriminator=true -fs-profile-file=%t1.afdo -show-fs-branchprob -disable-ra-fsprofile-loader=false -disable-layout-fsprofile-loader=false < %s 2>&1 | FileCheck %s --check-prefixes=LOADERV1,LOADER
-; RUN: llc -enable-fs-discriminator -improved-fs-discriminator=true -fs-profile-file=%S/Inputs/fsloader_v1.afdo -profile-isfs -show-fs-branchprob -disable-ra-fsprofile-loader=false -disable-layout-fsprofile-loader=false < %s 2>&1 | FileCheck %s --check-prefixes=LOADERV1,LOADER
-; RUN: llc -enable-fs-discriminator -improved-fs-discriminator=true -fs-profile-file=%S/Inputs/fsloader_v1.afdo -show-fs-branchprob -disable-ra-fsprofile-loader=false -disable-layout-fsprofile-loader=false < %s 2>&1 | FileCheck %s --check-prefixes=NOLOAD
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -improved-fs-discriminator=true -fs-profile-file=%t1.afdo -show-fs-branchprob -disable-ra-fsprofile-loader=false -disable-layout-fsprofile-loader=false < %s 2>&1 | FileCheck %s --check-prefixes=LOADERV1,LOADER
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -improved-fs-discriminator=true -fs-profile-file=%S/Inputs/fsloader_v1.afdo -profile-isfs -show-fs-branchprob -disable-ra-fsprofile-loader=false -disable-layout-fsprofile-loader=false < %s 2>&1 | FileCheck %s --check-prefixes=LOADERV1,LOADER
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -improved-fs-discriminator=true -fs-profile-file=%S/Inputs/fsloader_v1.afdo -show-fs-branchprob -disable-ra-fsprofile-loader=false -disable-layout-fsprofile-loader=false < %s 2>&1 | FileCheck %s --check-prefixes=NOLOAD
;;
;; C source code for the test (compiler at -O3):
;; // A test case for loop unroll.
diff --git a/llvm/test/CodeGen/X86/fsafdo_test3.ll b/llvm/test/CodeGen/X86/fsafdo_test3.ll
index 79b57fe4f1a32..f361e1683a314 100644
--- a/llvm/test/CodeGen/X86/fsafdo_test3.ll
+++ b/llvm/test/CodeGen/X86/fsafdo_test3.ll
@@ -1,7 +1,7 @@
; RUN: llvm-profdata merge --sample -profile-isfs -o %t0.afdo %S/Inputs/fsloader.afdo
-; RUN: llc -enable-fs-discriminator -improved-fs-discriminator=false -fs-profile-file=%t0.afdo -disable-ra-fsprofile-loader=false -disable-layout-fsprofile-loader=false -print-machine-bfi -print-bfi-func-name=foo -print-before=fs-profile-loader -stop-after=fs-profile-loader < %s 2>&1 | FileCheck %s --check-prefixes=BFI,BFIV0
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -improved-fs-discriminator=false -fs-profile-file=%t0.afdo -disable-ra-fsprofile-loader=false -disable-layout-fsprofile-loader=false -print-machine-bfi -print-bfi-func-name=foo -print-before=fs-profile-loader -stop-after=fs-profile-loader < %s 2>&1 | FileCheck %s --check-prefixes=BFI,BFIV0
; RUN: llvm-profdata merge --sample -profile-isfs -o %t1.afdo %S/Inputs/fsloader_v1.afdo
-; RUN: llc -enable-fs-discriminator -improved-fs-discriminator=true -fs-profile-file=%t1.afdo -disable-ra-fsprofile-loader=false -disable-layout-fsprofile-loader=false -print-machine-bfi -print-bfi-func-name=foo -print-before=fs-profile-loader -stop-after=fs-profile-loader < %s 2>&1 | FileCheck %s --check-prefixes=BFI,BFIV1
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -improved-fs-discriminator=true -fs-profile-file=%t1.afdo -disable-ra-fsprofile-loader=false -disable-layout-fsprofile-loader=false -print-machine-bfi -print-bfi-func-name=foo -print-before=fs-profile-loader -stop-after=fs-profile-loader < %s 2>&1 | FileCheck %s --check-prefixes=BFI,BFIV1
;
;;
;; C source code for the test (compiler at -O3):
diff --git a/llvm/test/CodeGen/X86/fsafdo_test4.ll b/llvm/test/CodeGen/X86/fsafdo_test4.ll
index effc72b44ade8..0a006febd69be 100644
--- a/llvm/test/CodeGen/X86/fsafdo_test4.ll
+++ b/llvm/test/CodeGen/X86/fsafdo_test4.ll
@@ -1,5 +1,5 @@
-; RUN: llc -enable-fs-discriminator -improved-fs-discriminator=false < %s | FileCheck --implicit-check-not=.loc %s
-; RUN: llc -enable-fs-discriminator -improved-fs-discriminator=true < %s | FileCheck --implicit-check-not=.loc %s
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -improved-fs-discriminator=false < %s | FileCheck --implicit-check-not=.loc %s
+; RUN: llc -combiner-topological-sorting -enable-fs-discriminator -improved-fs-discriminator=true < %s | FileCheck --implicit-check-not=.loc %s
;
; Check that fs-afdo discriminators are NOT generated, as debugInfoForProfiling is false (not set).
; CHECK: .loc 1 7 15 prologue_end discriminator 2 # foo.c:7:15
diff --git a/llvm/test/CodeGen/X86/fsetcc.ll b/llvm/test/CodeGen/X86/fsetcc.ll
index 85596b8e5beda..d6034561817f1 100644
--- a/llvm/test/CodeGen/X86/fsetcc.ll
+++ b/llvm/test/CodeGen/X86/fsetcc.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define i8 @PR43088(double, double) nounwind {
; CHECK-LABEL: PR43088:
diff --git a/llvm/test/CodeGen/X86/fsgsbase.ll b/llvm/test/CodeGen/X86/fsgsbase.ll
index 98434ae42c813..d09ffc10905b8 100644
--- a/llvm/test/CodeGen/X86/fsgsbase.ll
+++ b/llvm/test/CodeGen/X86/fsgsbase.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=fsgsbase | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=fsgsbase | FileCheck %s
define i32 @test_x86_rdfsbase_32() {
; CHECK-LABEL: test_x86_rdfsbase_32:
diff --git a/llvm/test/CodeGen/X86/fshl-fshr-constant.ll b/llvm/test/CodeGen/X86/fshl-fshr-constant.ll
index fdc34f5665b2b..c6707afca2960 100644
--- a/llvm/test/CodeGen/X86/fshl-fshr-constant.ll
+++ b/llvm/test/CodeGen/X86/fshl-fshr-constant.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,CHECK-EXPAND
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512vbmi2 | FileCheck %s --check-prefixes=CHECK,CHECK-UNEXPAND
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,CHECK-EXPAND
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512vbmi2 | FileCheck %s --check-prefixes=CHECK,CHECK-UNEXPAND
define <4 x i32> @test_fshl_constants() {
; CHECK-EXPAND-LABEL: test_fshl_constants:
diff --git a/llvm/test/CodeGen/X86/fshl-splat-undef.ll b/llvm/test/CodeGen/X86/fshl-splat-undef.ll
index a2d0345077b87..7e25f4a35f0e6 100644
--- a/llvm/test/CodeGen/X86/fshl-splat-undef.ll
+++ b/llvm/test/CodeGen/X86/fshl-splat-undef.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mcpu=cannonlake | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mcpu=cannonlake | FileCheck %s
; Check the correctness of following test.
; For this case:
diff --git a/llvm/test/CodeGen/X86/fshr.ll b/llvm/test/CodeGen/X86/fshr.ll
index c307833e488c9..00da89ccd60dc 100644
--- a/llvm/test/CodeGen/X86/fshr.ll
+++ b/llvm/test/CodeGen/X86/fshr.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86,X86-FAST
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+slow-shld | FileCheck %s --check-prefixes=X86,X86-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64,X64-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+slow-shld | FileCheck %s --check-prefixes=X64,X64-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86,X86-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+slow-shld | FileCheck %s --check-prefixes=X86,X86-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64,X64-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+slow-shld | FileCheck %s --check-prefixes=X64,X64-SLOW
declare i8 @llvm.fshr.i8(i8, i8, i8) nounwind readnone
declare i16 @llvm.fshr.i16(i16, i16, i16) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/fsxor-alignment.ll b/llvm/test/CodeGen/X86/fsxor-alignment.ll
index 32af5b969b6d5..d84b92c4f49fd 100644
--- a/llvm/test/CodeGen/X86/fsxor-alignment.ll
+++ b/llvm/test/CodeGen/X86/fsxor-alignment.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
; Don't fold the incoming stack arguments into the xorps instructions used
; to do floating-point negations, because the arguments aren't vectors
diff --git a/llvm/test/CodeGen/X86/ftrunc.ll b/llvm/test/CodeGen/X86/ftrunc.ll
index 9095fb1550e70..3fc17dd1f8e9d 100644
--- a/llvm/test/CodeGen/X86/ftrunc.ll
+++ b/llvm/test/CodeGen/X86/ftrunc.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,X64-AVX1
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,X86-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,X86-AVX1
declare i32 @llvm.fptoui.sat.i32.f32(float)
declare i64 @llvm.fptosi.sat.i64.f64(double)
diff --git a/llvm/test/CodeGen/X86/full-lsr.ll b/llvm/test/CodeGen/X86/full-lsr.ll
index 207d0ef40a441..4010fc4baeaf7 100644
--- a/llvm/test/CodeGen/X86/full-lsr.ll
+++ b/llvm/test/CodeGen/X86/full-lsr.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define void @foo(ptr nocapture %A, ptr nocapture %B, ptr nocapture %C, i32 %N) nounwind {
; CHECK: foo
diff --git a/llvm/test/CodeGen/X86/func-sanitizer.ll b/llvm/test/CodeGen/X86/func-sanitizer.ll
index 71f062ae2f8cd..cd8221d509240 100644
--- a/llvm/test/CodeGen/X86/func-sanitizer.ll
+++ b/llvm/test/CodeGen/X86/func-sanitizer.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s --check-prefix=MACHO
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin < %s | FileCheck %s --check-prefix=MACHO
; CHECK: .type _Z3funv, at function
; CHECK-NEXT: .long 3238382334 # 0xc105cafe
diff --git a/llvm/test/CodeGen/X86/funclet-layout.ll b/llvm/test/CodeGen/X86/funclet-layout.ll
index e8bffc4b1f1b4..ea2430fcc5a9b 100644
--- a/llvm/test/CodeGen/X86/funclet-layout.ll
+++ b/llvm/test/CodeGen/X86/funclet-layout.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc < %s | FileCheck %s
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/function-alias.ll b/llvm/test/CodeGen/X86/function-alias.ll
index 9191c0bc27f6e..d1e0d728dba58 100644
--- a/llvm/test/CodeGen/X86/function-alias.ll
+++ b/llvm/test/CodeGen/X86/function-alias.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/function-subtarget-features-2.ll b/llvm/test/CodeGen/X86/function-subtarget-features-2.ll
index df1efab6edf37..fe3b7760605d2 100644
--- a/llvm/test/CodeGen/X86/function-subtarget-features-2.ll
+++ b/llvm/test/CodeGen/X86/function-subtarget-features-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -filetype=obj -o - | llvm-objdump -d - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -filetype=obj -o - | llvm-objdump -d - | FileCheck %s
; This test verifies that we assemble code for different architectures
; based on target-cpu and target-features attributes.
diff --git a/llvm/test/CodeGen/X86/function-subtarget-features.ll b/llvm/test/CodeGen/X86/function-subtarget-features.ll
index e78ce656d88f9..6d62d1d655c39 100644
--- a/llvm/test/CodeGen/X86/function-subtarget-features.ll
+++ b/llvm/test/CodeGen/X86/function-subtarget-features.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -o - | FileCheck %s
; This test verifies that we produce different code for different architectures
; based on target-cpu and target-features attributes.
diff --git a/llvm/test/CodeGen/X86/funnel-shift-i128.ll b/llvm/test/CodeGen/X86/funnel-shift-i128.ll
index cf4dab3831512..cb145ee62b407 100644
--- a/llvm/test/CodeGen/X86/funnel-shift-i128.ll
+++ b/llvm/test/CodeGen/X86/funnel-shift-i128.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s -check-prefixes=CHECK,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s -check-prefixes=CHECK,AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s -check-prefixes=CHECK,AVX,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s -check-prefixes=CHECK,AVX,AVX512,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 -mattr=+avx512vbmi2 | FileCheck %s -check-prefixes=CHECK,AVX,AVX512,AVX512VBMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s -check-prefixes=CHECK,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s -check-prefixes=CHECK,SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s -check-prefixes=CHECK,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s -check-prefixes=CHECK,AVX,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s -check-prefixes=CHECK,AVX,AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 -mattr=+avx512vbmi2 | FileCheck %s -check-prefixes=CHECK,AVX,AVX512,AVX512VBMI
define i128 @fshl_i128(i128 %a0, i128 %a1, i128 %a2) nounwind {
; CHECK-LABEL: fshl_i128:
diff --git a/llvm/test/CodeGen/X86/funnel-shift-logic-fold.ll b/llvm/test/CodeGen/X86/funnel-shift-logic-fold.ll
index fb875837cb836..e6180f41d6ac8 100644
--- a/llvm/test/CodeGen/X86/funnel-shift-logic-fold.ll
+++ b/llvm/test/CodeGen/X86/funnel-shift-logic-fold.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
declare i64 @llvm.fshl.i64(i64, i64, i64) nounwind readnone
declare i64 @llvm.fshr.i64(i64, i64, i64) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/funnel-shift-rot.ll b/llvm/test/CodeGen/X86/funnel-shift-rot.ll
index 7d106fce44555..5cdcc93a65680 100644
--- a/llvm/test/CodeGen/X86/funnel-shift-rot.ll
+++ b/llvm/test/CodeGen/X86/funnel-shift-rot.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=sse2 | FileCheck %s --check-prefixes=CHECK,X86-SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx2 | FileCheck %s --check-prefixes=CHECK,X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=sse2 | FileCheck %s --check-prefixes=CHECK,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx2 | FileCheck %s --check-prefixes=CHECK,X64-AVX2
declare i8 @llvm.fshl.i8(i8, i8, i8)
declare i16 @llvm.fshl.i16(i16, i16, i16)
diff --git a/llvm/test/CodeGen/X86/ga-offset.ll b/llvm/test/CodeGen/X86/ga-offset.ll
index 54d2027527eff..7b07bca25418e 100644
--- a/llvm/test/CodeGen/X86/ga-offset.ll
+++ b/llvm/test/CodeGen/X86/ga-offset.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -relocation-model=static | FileCheck %s
@ptr = dso_local global ptr null
@dst = dso_local global [131072 x i32] zeroinitializer
diff --git a/llvm/test/CodeGen/X86/ga-offset2.ll b/llvm/test/CodeGen/X86/ga-offset2.ll
index f80c339cfae41..e2f985f4eb5b0 100644
--- a/llvm/test/CodeGen/X86/ga-offset2.ll
+++ b/llvm/test/CodeGen/X86/ga-offset2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s
@var = external hidden global i32
@p = external hidden global ptr
diff --git a/llvm/test/CodeGen/X86/gather-addresses.ll b/llvm/test/CodeGen/X86/gather-addresses.ll
index a67ce8f0be5b0..18c31378e27f2 100644
--- a/llvm/test/CodeGen/X86/gather-addresses.ll
+++ b/llvm/test/CodeGen/X86/gather-addresses.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux -mattr=+sse2 < %s | FileCheck %s --check-prefix=LIN-SSE2
-; RUN: llc -mtriple=x86_64-linux -mcpu=nehalem < %s | FileCheck %s --check-prefix=LIN-SSE4
-; RUN: llc -mtriple=x86_64-win32 -mattr=+sse2 < %s | FileCheck %s --check-prefix=WIN-SSE2
-; RUN: llc -mtriple=x86_64-win32 -mcpu=nehalem < %s | FileCheck %s --check-prefix=WIN-SSE4
-; RUN: llc -mtriple=i686-win32 -mcpu=nehalem < %s | FileCheck %s --check-prefix=LIN32
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux -mattr=+sse2 < %s | FileCheck %s --check-prefix=LIN-SSE2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux -mcpu=nehalem < %s | FileCheck %s --check-prefix=LIN-SSE4
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-win32 -mattr=+sse2 < %s | FileCheck %s --check-prefix=WIN-SSE2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-win32 -mcpu=nehalem < %s | FileCheck %s --check-prefix=WIN-SSE4
+; RUN: llc -combiner-topological-sorting -mtriple=i686-win32 -mcpu=nehalem < %s | FileCheck %s --check-prefix=LIN32
; rdar://7398554
; When doing vector gather-scatter index calculation with 32-bit indices,
diff --git a/llvm/test/CodeGen/X86/gather-scatter-opaque-ptr-2.ll b/llvm/test/CodeGen/X86/gather-scatter-opaque-ptr-2.ll
index b88d9d171a5fd..3b067ecc73681 100644
--- a/llvm/test/CodeGen/X86/gather-scatter-opaque-ptr-2.ll
+++ b/llvm/test/CodeGen/X86/gather-scatter-opaque-ptr-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux -mcpu=skylake -mattr=+avx2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux -mcpu=skylake -mattr=+avx2 < %s | FileCheck %s
define <2 x float> @gather_v2f32_scale_512(ptr %result, <2 x i64> %idx, <2 x i1> %mask) {
; CHECK-LABEL: gather_v2f32_scale_512:
diff --git a/llvm/test/CodeGen/X86/gather-scatter-opaque-ptr.ll b/llvm/test/CodeGen/X86/gather-scatter-opaque-ptr.ll
index f989f36d8fa0a..eb0bdc56678b0 100644
--- a/llvm/test/CodeGen/X86/gather-scatter-opaque-ptr.ll
+++ b/llvm/test/CodeGen/X86/gather-scatter-opaque-ptr.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux -mcpu=skylake-avx512 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux -mcpu=skylake-avx512 < %s | FileCheck %s
define void @scatter_scale_512(ptr %result, <4 x i64> %idx, <4 x i1> %mask) {
; CHECK-LABEL: scatter_scale_512:
diff --git a/llvm/test/CodeGen/X86/gc-empty-basic-blocks.ll b/llvm/test/CodeGen/X86/gc-empty-basic-blocks.ll
index 3a0c5f10980ee..3826965e42975 100644
--- a/llvm/test/CodeGen/X86/gc-empty-basic-blocks.ll
+++ b/llvm/test/CodeGen/X86/gc-empty-basic-blocks.ll
@@ -1,6 +1,6 @@
;; This test verifies that -enable-gc-empty-basic-blocks removes regular empty
;; blocks but does not remove empty blocks which have their address taken.
-; RUN: llc < %s -mtriple=x86_64 -O0 -enable-gc-empty-basic-blocks | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -O0 -enable-gc-empty-basic-blocks | FileCheck %s
;; This function has a regular empty block.
define void @foo(i1 zeroext %0) nounwind {
diff --git a/llvm/test/CodeGen/X86/gcc_except_table-multi.ll b/llvm/test/CodeGen/X86/gcc_except_table-multi.ll
index 1eb902ae90795..58cf71bdf0deb 100644
--- a/llvm/test/CodeGen/X86/gcc_except_table-multi.ll
+++ b/llvm/test/CodeGen/X86/gcc_except_table-multi.ll
@@ -1,10 +1,10 @@
-; RUN: llc -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=x86_64 -binutils-version=2.35 | FileCheck %s --check-prefixes=CHECK,NORMAL
-; RUN: llc -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=x86_64 -binutils-version=2.36 | FileCheck %s --check-prefixes=CHECK,NORMAL
-; RUN: llc -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=x86_64 -function-sections -binutils-version=2.35 | FileCheck %s --check-prefixes=CHECK,SEP_BFD
-; RUN: llc -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=x86_64 -function-sections -binutils-version=2.36 | FileCheck %s --check-prefixes=CHECK,SEP
+; RUN: llc -combiner-topological-sorting -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=x86_64 -binutils-version=2.35 | FileCheck %s --check-prefixes=CHECK,NORMAL
+; RUN: llc -combiner-topological-sorting -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=x86_64 -binutils-version=2.36 | FileCheck %s --check-prefixes=CHECK,NORMAL
+; RUN: llc -combiner-topological-sorting -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=x86_64 -function-sections -binutils-version=2.35 | FileCheck %s --check-prefixes=CHECK,SEP_BFD
+; RUN: llc -combiner-topological-sorting -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=x86_64 -function-sections -binutils-version=2.36 | FileCheck %s --check-prefixes=CHECK,SEP
-; RUN: llc -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=x86_64 -function-sections -unique-section-names=false | FileCheck %s --check-prefixes=CHECK,SEP_NOUNIQUE
-; RUN: llc -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=x86_64 -unique-section-names=false | FileCheck %s --check-prefixes=CHECK,NOUNIQUE
+; RUN: llc -combiner-topological-sorting -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=x86_64 -function-sections -unique-section-names=false | FileCheck %s --check-prefixes=CHECK,SEP_NOUNIQUE
+; RUN: llc -combiner-topological-sorting -simplifycfg-require-and-preserve-domtree=1 < %s -mtriple=x86_64 -unique-section-names=false | FileCheck %s --check-prefixes=CHECK,NOUNIQUE
@_ZTIi = external constant ptr
diff --git a/llvm/test/CodeGen/X86/gcc_except_table.ll b/llvm/test/CodeGen/X86/gcc_except_table.ll
index 682098c53a4ad..c72c5d4e8f472 100644
--- a/llvm/test/CodeGen/X86/gcc_except_table.ll
+++ b/llvm/test/CodeGen/X86/gcc_except_table.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple x86_64-apple-darwin %s -o - | FileCheck %s --check-prefix=APPLE
-; RUN: llc -mtriple x86_64-pc-windows-gnu %s -o - | FileCheck %s --check-prefix=MINGW64
-; RUN: llc -mtriple i686-pc-windows-gnu %s -o - | FileCheck %s --check-prefix=MINGW32
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-darwin %s -o - | FileCheck %s --check-prefix=APPLE
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-windows-gnu %s -o - | FileCheck %s --check-prefix=MINGW64
+; RUN: llc -combiner-topological-sorting -mtriple i686-pc-windows-gnu %s -o - | FileCheck %s --check-prefix=MINGW32
@_ZTIi = external constant ptr
define i32 @main() uwtable optsize ssp personality ptr @__gxx_personality_v0 {
diff --git a/llvm/test/CodeGen/X86/gcc_except_table_bb_sections.ll b/llvm/test/CodeGen/X86/gcc_except_table_bb_sections.ll
index d14bb8e03443d..dfe0b7928193e 100644
--- a/llvm/test/CodeGen/X86/gcc_except_table_bb_sections.ll
+++ b/llvm/test/CodeGen/X86/gcc_except_table_bb_sections.ll
@@ -1,11 +1,11 @@
-; RUN: llc -basic-block-sections=all -mtriple x86_64-pc-linux-gnu -code-model=small < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SMALL,CHECK-NON-PIC,CHECK-NON-PIC-SMALL,CHECK-NON-PIC-X64
-; RUN: llc -basic-block-sections=all -mtriple x86_64-pc-linux-gnux32 -code-model=small < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SMALL,CHECK-NON-PIC,CHECK-NON-PIC-SMALL,CHECK-NON-PIC-X32
-; RUN: llc -basic-block-sections=all -mtriple x86_64-pc-linux-gnu -code-model=medium < %s | FileCheck %s --check-prefixes=CHECK,CHECK-MEDIUM,CHECK-NON-PIC,CHECK-NON-PIC-MEDIUM,CHECK-NON-PIC-X64
-; RUN: llc -basic-block-sections=all -mtriple x86_64-pc-linux-gnu -code-model=large < %s | FileCheck %s --check-prefixes=CHECK,CHECK-NON-PIC,CHECK-NON-PIC-LARGE,CHECK-NON-PIC-X64
-; RUN: llc -basic-block-sections=all -mtriple x86_64-pc-linux-gnu -relocation-model=pic -code-model=small < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SMALL,CHECK-PIC,CHECK-PIC-SMALL,CHECK-PIC-X64
-; RUN: llc -basic-block-sections=all -mtriple x86_64-pc-linux-gnux32 -relocation-model=pic -code-model=small < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SMALL,CHECK-PIC,CHECK-PIC-SMALL,CHECK-PIC-X32
-; RUN: llc -basic-block-sections=all -mtriple x86_64-pc-linux-gnu -relocation-model=pic -code-model=medium < %s | FileCheck %s --check-prefixes=CHECK,CHECK-MEDIUM,CHECK-PIC,CHECK-PIC-MEDIUM,CHECK-PIC-X64
-; RUN: llc -basic-block-sections=all -mtriple x86_64-pc-linux-gnu -relocation-model=pic -code-model=large < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PIC,CHECK-PIC-LARGE,CHECK-PIC-X64
+; RUN: llc -combiner-topological-sorting -basic-block-sections=all -mtriple x86_64-pc-linux-gnu -code-model=small < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SMALL,CHECK-NON-PIC,CHECK-NON-PIC-SMALL,CHECK-NON-PIC-X64
+; RUN: llc -combiner-topological-sorting -basic-block-sections=all -mtriple x86_64-pc-linux-gnux32 -code-model=small < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SMALL,CHECK-NON-PIC,CHECK-NON-PIC-SMALL,CHECK-NON-PIC-X32
+; RUN: llc -combiner-topological-sorting -basic-block-sections=all -mtriple x86_64-pc-linux-gnu -code-model=medium < %s | FileCheck %s --check-prefixes=CHECK,CHECK-MEDIUM,CHECK-NON-PIC,CHECK-NON-PIC-MEDIUM,CHECK-NON-PIC-X64
+; RUN: llc -combiner-topological-sorting -basic-block-sections=all -mtriple x86_64-pc-linux-gnu -code-model=large < %s | FileCheck %s --check-prefixes=CHECK,CHECK-NON-PIC,CHECK-NON-PIC-LARGE,CHECK-NON-PIC-X64
+; RUN: llc -combiner-topological-sorting -basic-block-sections=all -mtriple x86_64-pc-linux-gnu -relocation-model=pic -code-model=small < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SMALL,CHECK-PIC,CHECK-PIC-SMALL,CHECK-PIC-X64
+; RUN: llc -combiner-topological-sorting -basic-block-sections=all -mtriple x86_64-pc-linux-gnux32 -relocation-model=pic -code-model=small < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SMALL,CHECK-PIC,CHECK-PIC-SMALL,CHECK-PIC-X32
+; RUN: llc -combiner-topological-sorting -basic-block-sections=all -mtriple x86_64-pc-linux-gnu -relocation-model=pic -code-model=medium < %s | FileCheck %s --check-prefixes=CHECK,CHECK-MEDIUM,CHECK-PIC,CHECK-PIC-MEDIUM,CHECK-PIC-X64
+; RUN: llc -combiner-topological-sorting -basic-block-sections=all -mtriple x86_64-pc-linux-gnu -relocation-model=pic -code-model=large < %s | FileCheck %s --check-prefixes=CHECK,CHECK-PIC,CHECK-PIC-LARGE,CHECK-PIC-X64
@_ZTIi = external constant ptr
define i32 @main() uwtable optsize ssp personality ptr @__gxx_personality_v0 {
diff --git a/llvm/test/CodeGen/X86/gcc_except_table_bb_sections_ehpad_groups_with_cold.ll b/llvm/test/CodeGen/X86/gcc_except_table_bb_sections_ehpad_groups_with_cold.ll
index 82dafecbf3c29..bd15be1b05e0a 100644
--- a/llvm/test/CodeGen/X86/gcc_except_table_bb_sections_ehpad_groups_with_cold.ll
+++ b/llvm/test/CodeGen/X86/gcc_except_table_bb_sections_ehpad_groups_with_cold.ll
@@ -1,7 +1,7 @@
; Check that when all exception handling blocks are cold, they get grouped with the cold bbs.
; RUN: echo '!main' > %t
; RUN: echo '!!0' >> %t
-; RUN: llc -function-sections -basic-block-sections=%t -mtriple x86_64-pc-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -function-sections -basic-block-sections=%t -mtriple x86_64-pc-linux-gnu < %s | FileCheck %s
@_ZTIi = external constant ptr
define i32 @main() uwtable optsize ssp personality ptr @__gxx_personality_v0 {
diff --git a/llvm/test/CodeGen/X86/gcc_except_table_bb_sections_nolpads.ll b/llvm/test/CodeGen/X86/gcc_except_table_bb_sections_nolpads.ll
index 96adffc8e0a6f..76f598d398f3e 100644
--- a/llvm/test/CodeGen/X86/gcc_except_table_bb_sections_nolpads.ll
+++ b/llvm/test/CodeGen/X86/gcc_except_table_bb_sections_nolpads.ll
@@ -1,7 +1,7 @@
;; Verify that @LPStart is omitted when there are no landing pads. This test
;; uses an unkown personality to force emitting the exception table.
-; RUN: llc -basic-block-sections=all -mtriple=x86_64 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -basic-block-sections=all -mtriple=x86_64 < %s | FileCheck %s
declare void @throwit()
declare i32 @__unknown_ehpersonality(...)
diff --git a/llvm/test/CodeGen/X86/gcc_except_table_functions.ll b/llvm/test/CodeGen/X86/gcc_except_table_functions.ll
index 9bb21b18fb2cd..2a95d6dee7835 100644
--- a/llvm/test/CodeGen/X86/gcc_except_table_functions.ll
+++ b/llvm/test/CodeGen/X86/gcc_except_table_functions.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-pc-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux-gnu < %s | FileCheck %s
; This test demonstrates that it is possible to use functions for typeinfo
; instead of global variables. While __gxx_personality_v0 would never know what
diff --git a/llvm/test/CodeGen/X86/gep-expanded-vector.ll b/llvm/test/CodeGen/X86/gep-expanded-vector.ll
index 943cd3610c9d3..023921ce3a7cd 100644
--- a/llvm/test/CodeGen/X86/gep-expanded-vector.ll
+++ b/llvm/test/CodeGen/X86/gep-expanded-vector.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -O2 -mattr=avx512f -mtriple=x86_64-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mattr=avx512f -mtriple=x86_64-unknown | FileCheck %s
%struct.S1 = type { ptr, ptr }
diff --git a/llvm/test/CodeGen/X86/getelementptr.ll b/llvm/test/CodeGen/X86/getelementptr.ll
index 79166cfca77fe..651e85f232835 100644
--- a/llvm/test/CodeGen/X86/getelementptr.ll
+++ b/llvm/test/CodeGen/X86/getelementptr.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -O0 -mtriple=i686--
-; RUN: llc < %s -O0 -mtriple=x86_64--
-; RUN: llc < %s -O2 -mtriple=i686--
-; RUN: llc < %s -O2 -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64--
; Test big index trunc to pointer size:
diff --git a/llvm/test/CodeGen/X86/getmant-false-deps.ll b/llvm/test/CodeGen/X86/getmant-false-deps.ll
index 0f69f7389011a..eba0064a44233 100644
--- a/llvm/test/CodeGen/X86/getmant-false-deps.ll
+++ b/llvm/test/CodeGen/X86/getmant-false-deps.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -mcpu=sapphirerapids -mattr=+false-deps-getmant -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE
-; RUN: llc -verify-machineinstrs -mcpu=sapphirerapids -mattr=-false-deps-getmant -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=sapphirerapids -mattr=+false-deps-getmant -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=sapphirerapids -mattr=-false-deps-getmant -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE
define <4 x float> @getmantps_mem_128(ptr %p0) {
; ENABLE-LABEL: getmantps_mem_128:
diff --git a/llvm/test/CodeGen/X86/gfni-funnel-shifts.ll b/llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
index 52415c212b1aa..bd7e7f7f21f07 100644
--- a/llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
+++ b/llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+gfni | FileCheck %s --check-prefixes=GFNISSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+gfni | FileCheck %s --check-prefixes=GFNISSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512BW
;
; 128 Bit Vector Funnel Shifts
diff --git a/llvm/test/CodeGen/X86/gfni-intrinsics.ll b/llvm/test/CodeGen/X86/gfni-intrinsics.ll
index 76e201e3a4179..60139f5d11903 100644
--- a/llvm/test/CodeGen/X86/gfni-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/gfni-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+gfni -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+gfni -show-mc-encoding | FileCheck %s
declare <16 x i8> @llvm.x86.vgf2p8affineinvqb.128(<16 x i8>, <16 x i8>, i8)
define <16 x i8> @test_gf2p8affineinvqb_128(<16 x i8> %src1, <16 x i8> %src2) {
diff --git a/llvm/test/CodeGen/X86/gfni-lzcnt.ll b/llvm/test/CodeGen/X86/gfni-lzcnt.ll
index 5e7894d821d48..65d0efc9a528c 100644
--- a/llvm/test/CodeGen/X86/gfni-lzcnt.ll
+++ b/llvm/test/CodeGen/X86/gfni-lzcnt.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+gfni | FileCheck %s --check-prefixes=GFNISSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+gfni | FileCheck %s --check-prefixes=GFNISSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512BW
define <16 x i8> @testv16i8(<16 x i8> %in) nounwind {
; GFNISSE-LABEL: testv16i8:
diff --git a/llvm/test/CodeGen/X86/gfni-rotates.ll b/llvm/test/CodeGen/X86/gfni-rotates.ll
index 967f26f70946a..c8868977f51b3 100644
--- a/llvm/test/CodeGen/X86/gfni-rotates.ll
+++ b/llvm/test/CodeGen/X86/gfni-rotates.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+gfni | FileCheck %s --check-prefixes=GFNISSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+gfni | FileCheck %s --check-prefixes=GFNISSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512BW
;
; 128 Bit Vector Rotates
diff --git a/llvm/test/CodeGen/X86/gfni-shifts.ll b/llvm/test/CodeGen/X86/gfni-shifts.ll
index da91752d9deaf..2d02d9bf16f71 100644
--- a/llvm/test/CodeGen/X86/gfni-shifts.ll
+++ b/llvm/test/CodeGen/X86/gfni-shifts.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+gfni | FileCheck %s --check-prefixes=GFNISSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+gfni | FileCheck %s --check-prefixes=GFNISSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512BW
;
; 128 Bit Vector Shifts
diff --git a/llvm/test/CodeGen/X86/gfni-tzcnt.ll b/llvm/test/CodeGen/X86/gfni-tzcnt.ll
index 533243f49250d..14c6557871970 100644
--- a/llvm/test/CodeGen/X86/gfni-tzcnt.ll
+++ b/llvm/test/CodeGen/X86/gfni-tzcnt.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+gfni | FileCheck %s --check-prefixes=GFNISSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+gfni | FileCheck %s --check-prefixes=GFNISSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX1OR2,GFNIAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+gfni | FileCheck %s --check-prefixes=GFNIAVX,GFNIAVX512,GFNIAVX512BW
define <16 x i8> @testv16i8(<16 x i8> %in) nounwind {
; GFNISSE-LABEL: testv16i8:
diff --git a/llvm/test/CodeGen/X86/gfni-xor-fold-avx512.ll b/llvm/test/CodeGen/X86/gfni-xor-fold-avx512.ll
index 414a9a849b4cc..40b0fab224314 100644
--- a/llvm/test/CodeGen/X86/gfni-xor-fold-avx512.ll
+++ b/llvm/test/CodeGen/X86/gfni-xor-fold-avx512.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512bw,+gfni | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512bw,+gfni | FileCheck %s
declare <64 x i8> @llvm.x86.vgf2p8affineqb.512(<64 x i8>, <64 x i8>, i8)
diff --git a/llvm/test/CodeGen/X86/gfni-xor-fold.ll b/llvm/test/CodeGen/X86/gfni-xor-fold.ll
index e907410ae7bab..2ea94c243b437 100644
--- a/llvm/test/CodeGen/X86/gfni-xor-fold.ll
+++ b/llvm/test/CodeGen/X86/gfni-xor-fold.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+gfni,+avx | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl,+gfni,+avx512bw | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+gfni,+avx | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512vl,+gfni,+avx512bw | FileCheck %s --check-prefixes=AVX512
declare <16 x i8> @llvm.x86.vgf2p8affineqb.128(<16 x i8>, <16 x i8>, i8)
declare <32 x i8> @llvm.x86.vgf2p8affineqb.256(<32 x i8>, <32 x i8>, i8)
diff --git a/llvm/test/CodeGen/X86/ghc-cc.ll b/llvm/test/CodeGen/X86/ghc-cc.ll
index 814de5a4a82c6..2584278e4e65f 100644
--- a/llvm/test/CodeGen/X86/ghc-cc.ll
+++ b/llvm/test/CodeGen/X86/ghc-cc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -tailcallopt -mtriple=i686-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -tailcallopt -mtriple=i686-linux-gnu | FileCheck %s
; Test the GHC call convention works (x86-32)
diff --git a/llvm/test/CodeGen/X86/ghc-cc64.ll b/llvm/test/CodeGen/X86/ghc-cc64.ll
index 41559b263c0d3..91f4ca13908af 100644
--- a/llvm/test/CodeGen/X86/ghc-cc64.ll
+++ b/llvm/test/CodeGen/X86/ghc-cc64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -tailcallopt -mtriple=x86_64-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -tailcallopt -mtriple=x86_64-linux-gnu | FileCheck %s
; Check the GHC call convention works (x86-64)
diff --git a/llvm/test/CodeGen/X86/global-access-pie.ll b/llvm/test/CodeGen/X86/global-access-pie.ll
index 2643a2569e0b9..5cb3e796c47a1 100644
--- a/llvm/test/CodeGen/X86/global-access-pie.ll
+++ b/llvm/test/CodeGen/X86/global-access-pie.ll
@@ -1,11 +1,11 @@
-; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X32 %s
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X32 %s
; External Linkage
diff --git a/llvm/test/CodeGen/X86/global-fill.ll b/llvm/test/CodeGen/X86/global-fill.ll
index 41493b2d917fb..6c90fcd101003 100644
--- a/llvm/test/CodeGen/X86/global-fill.ll
+++ b/llvm/test/CodeGen/X86/global-fill.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin < %s | FileCheck %s
@test1 = global [2 x i24] [i24 -1, i24 -1]
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/global-sections-comdat.ll b/llvm/test/CodeGen/X86/global-sections-comdat.ll
index 7b793815f238d..755a47b431a45 100644
--- a/llvm/test/CodeGen/X86/global-sections-comdat.ll
+++ b/llvm/test/CodeGen/X86/global-sections-comdat.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=i386-unknown-linux | FileCheck %s -check-prefix=LINUX
-; RUN: llc < %s -mtriple=i386-unknown-linux -data-sections -function-sections | FileCheck %s -check-prefix=LINUX-SECTIONS
-; RUN: llc < %s -mtriple=i386-unknown-linux -data-sections -function-sections -unique-section-names=false | FileCheck %s -check-prefix=LINUX-SECTIONS-SHORT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux -data-sections -function-sections | FileCheck %s -check-prefix=LINUX-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux -data-sections -function-sections -unique-section-names=false | FileCheck %s -check-prefix=LINUX-SECTIONS-SHORT
$F1 = comdat any
define void @F1(i32 %y) comdat {
diff --git a/llvm/test/CodeGen/X86/global-sections-tls.ll b/llvm/test/CodeGen/X86/global-sections-tls.ll
index d51ff4e577ced..d11344842e992 100644
--- a/llvm/test/CodeGen/X86/global-sections-tls.ll
+++ b/llvm/test/CodeGen/X86/global-sections-tls.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX
; PR4639
@G1 = internal thread_local global i32 0 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/global-sections.ll b/llvm/test/CodeGen/X86/global-sections.ll
index 4199481a1f299..a916fcfabc623 100644
--- a/llvm/test/CodeGen/X86/global-sections.ll
+++ b/llvm/test/CodeGen/X86/global-sections.ll
@@ -1,12 +1,12 @@
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX
-; RUN: llc < %s -mtriple=i386-apple-darwin9.7 | FileCheck %s -check-prefix=DARWIN
-; RUN: llc < %s -mtriple=i386-apple-darwin10 -relocation-model=static | FileCheck %s -check-prefix=DARWIN-STATIC
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=DARWIN64
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -data-sections -function-sections | FileCheck %s -check-prefix=LINUX-SECTIONS
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -function-sections | FileCheck %s -check-prefix=LINUX-FUNC-SECTIONS
-; RUN: llc < %s -mtriple=x86_64-pc-linux -data-sections -function-sections -relocation-model=pic | FileCheck %s -check-prefix=LINUX-SECTIONS-PIC
-; RUN: llc < %s -mtriple=i686-pc-win32 -data-sections -function-sections | FileCheck %s -check-prefix=WIN32-SECTIONS
-; RUN: llc < %s -mtriple=i686-pc-win32 -function-sections | FileCheck %s -check-prefix=WIN32-FUNC-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9.7 | FileCheck %s -check-prefix=DARWIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10 -relocation-model=static | FileCheck %s -check-prefix=DARWIN-STATIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=DARWIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -data-sections -function-sections | FileCheck %s -check-prefix=LINUX-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -function-sections | FileCheck %s -check-prefix=LINUX-FUNC-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -data-sections -function-sections -relocation-model=pic | FileCheck %s -check-prefix=LINUX-SECTIONS-PIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 -data-sections -function-sections | FileCheck %s -check-prefix=WIN32-SECTIONS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 -function-sections | FileCheck %s -check-prefix=WIN32-FUNC-SECTIONS
define void @F1() {
ret void
diff --git a/llvm/test/CodeGen/X86/global-variable-partition-with-dap.ll b/llvm/test/CodeGen/X86/global-variable-partition-with-dap.ll
index 05b3a639a30e5..3eb505cd4fc6e 100644
--- a/llvm/test/CodeGen/X86/global-variable-partition-with-dap.ll
+++ b/llvm/test/CodeGen/X86/global-variable-partition-with-dap.ll
@@ -6,7 +6,7 @@ target triple = "x86_64-unknown-linux-gnu"
; RUN: rm -rf %t && split-file %s %t && cd %t
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic \
; RUN: -partition-static-data-sections=true \
; RUN: -debug-only=static-data-profile-info \
; RUN: -data-sections=true -unique-section-names=false \
@@ -14,14 +14,14 @@ target triple = "x86_64-unknown-linux-gnu"
;; Repeat command above, but with string literals handled in the codegen pass,
;; with -memprof-annotate-string-literal-section-prefix=true.
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic \
; RUN: -partition-static-data-sections=true \
; RUN: -debug-only=static-data-profile-info \
; RUN: -data-sections=true -unique-section-names=false \
; RUN: -memprof-annotate-string-literal-section-prefix=true \
; RUN: input-with-data-access-prof-on.ll -o - 2>&1 | FileCheck %s --check-prefixes=LOGCOMMON,LOGSTR,IRCOMMON,IRSTR
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic \
; RUN: -partition-static-data-sections=true \
; RUN: -debug-only=static-data-profile-info \
; RUN: -data-sections=true -unique-section-names=false \
diff --git a/llvm/test/CodeGen/X86/global-variable-partition.ll b/llvm/test/CodeGen/X86/global-variable-partition.ll
index 604b4fd5a96ed..0c3f918e49943 100644
--- a/llvm/test/CodeGen/X86/global-variable-partition.ll
+++ b/llvm/test/CodeGen/X86/global-variable-partition.ll
@@ -11,20 +11,20 @@ target triple = "x86_64-unknown-linux-gnu"
; This RUN command sets `-data-sections=true -unique-section-names=true` so data
; sections are uniqufied by numbers.
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic \
; RUN: -partition-static-data-sections=true \
; RUN: -data-sections=true -unique-section-names=true \
; RUN: %s -o - 2>&1 | FileCheck %s --check-prefixes=SYM,COMMON --dump-input=always
; This RUN command sets `-data-sections=true -unique-section-names=false` so
; data sections are uniqufied by variable names.
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic \
; RUN: -partition-static-data-sections=true \
; RUN: -data-sections=true -unique-section-names=false \
; RUN: %s -o - 2>&1 | FileCheck %s --check-prefixes=UNIQ,COMMON --dump-input=always
; This RUN command sets `-data-sections=false -unique-section-names=false`.
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic \
; RUN: -partition-static-data-sections=true \
; RUN: -data-sections=false -unique-section-names=false \
; RUN: %s -o - 2>&1 | FileCheck %s --check-prefixes=AGG,COMMON --dump-input=always
diff --git a/llvm/test/CodeGen/X86/global-with-max-align.ll b/llvm/test/CodeGen/X86/global-with-max-align.ll
index 5cd360b55540d..68dd0288805df 100644
--- a/llvm/test/CodeGen/X86/global-with-max-align.ll
+++ b/llvm/test/CodeGen/X86/global-with-max-align.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 < %s | FileCheck %s
; Make sure alignment of 2^32 isn't truncated to zero.
diff --git a/llvm/test/CodeGen/X86/gnu-eh-alternative.ll b/llvm/test/CodeGen/X86/gnu-eh-alternative.ll
index fcad8ec53182f..bdb3063df6971 100644
--- a/llvm/test/CodeGen/X86/gnu-eh-alternative.ll
+++ b/llvm/test/CodeGen/X86/gnu-eh-alternative.ll
@@ -1,8 +1,8 @@
-; RUN: llc -verify-machineinstrs -mtriple x86_64-pc-linux-gnu -filetype=asm < %s | \
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple x86_64-pc-linux-gnu -filetype=asm < %s | \
; RUN: FileCheck --check-prefixes=ASM,ULEB128 %s
-; RUN: llc -verify-machineinstrs -mtriple x86_64-pc-linux-gnu -use-leb128-directives=true -filetype=asm < %s | \
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple x86_64-pc-linux-gnu -use-leb128-directives=true -filetype=asm < %s | \
; RUN: FileCheck --check-prefixes=ASM,ULEB128 %s
-; RUN: llc -verify-machineinstrs -mtriple x86_64-pc-linux-gnu -use-leb128-directives=false -filetype=asm < %s | \
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple x86_64-pc-linux-gnu -use-leb128-directives=false -filetype=asm < %s | \
; RUN: FileCheck --check-prefixes=ASM,NO128 %s
@_ZTIi = external dso_local constant ptr
diff --git a/llvm/test/CodeGen/X86/gnu-seh-nolpads.ll b/llvm/test/CodeGen/X86/gnu-seh-nolpads.ll
index b8670b75642d3..d80af3291936c 100644
--- a/llvm/test/CodeGen/X86/gnu-seh-nolpads.ll
+++ b/llvm/test/CodeGen/X86/gnu-seh-nolpads.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-windows-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-gnu < %s | FileCheck %s
declare void @throwit()
declare void @__gxx_personality_seh0(...)
diff --git a/llvm/test/CodeGen/X86/gpr-to-mask.ll b/llvm/test/CodeGen/X86/gpr-to-mask.ll
index d1513b584887f..e9c83b8144a4c 100644
--- a/llvm/test/CodeGen/X86/gpr-to-mask.ll
+++ b/llvm/test/CodeGen/X86/gpr-to-mask.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq < %s | FileCheck %s --check-prefix=X86-64
-; RUN: llc -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq < %s | FileCheck %s --check-prefix=X86-32
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq < %s | FileCheck %s --check-prefix=X86-64
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq < %s | FileCheck %s --check-prefix=X86-32
define void @test_fcmp_storefloat(i1 %cond, ptr %fptr, float %f1, float %f2, float %f3, float %f4, float %f5, float %f6) {
; X86-64-LABEL: test_fcmp_storefloat:
diff --git a/llvm/test/CodeGen/X86/graalcc.ll b/llvm/test/CodeGen/X86/graalcc.ll
index 3464fadf06a80..e472a533575d5 100644
--- a/llvm/test/CodeGen/X86/graalcc.ll
+++ b/llvm/test/CodeGen/X86/graalcc.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64 -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -o - %s | FileCheck %s
@var = global [30 x i64] zeroinitializer
diff --git a/llvm/test/CodeGen/X86/gs-fold.ll b/llvm/test/CodeGen/X86/gs-fold.ll
index d1356ce750c6d..2a1f66d1f9e2a 100644
--- a/llvm/test/CodeGen/X86/gs-fold.ll
+++ b/llvm/test/CodeGen/X86/gs-fold.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-freebsd | FileCheck %s --check-prefix=CHECK-FBSD
-; RUN: llc < %s -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=CHECK-LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-freebsd | FileCheck %s --check-prefix=CHECK-FBSD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux | FileCheck %s --check-prefix=CHECK-LINUX
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
%struct.thread = type { i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/h-register-addressing-32.ll b/llvm/test/CodeGen/X86/h-register-addressing-32.ll
index eee1fd6d522ce..7cbc49021047f 100644
--- a/llvm/test/CodeGen/X86/h-register-addressing-32.ll
+++ b/llvm/test/CodeGen/X86/h-register-addressing-32.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=-bmi | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-bmi | FileCheck %s
; Use h-register extract and zero-extend.
diff --git a/llvm/test/CodeGen/X86/h-register-addressing-64.ll b/llvm/test/CodeGen/X86/h-register-addressing-64.ll
index b36a9484d8561..094c37ff1cd31 100644
--- a/llvm/test/CodeGen/X86/h-register-addressing-64.ll
+++ b/llvm/test/CodeGen/X86/h-register-addressing-64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-bmi | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-bmi | FileCheck %s
; Use h-register extract and zero-extend.
diff --git a/llvm/test/CodeGen/X86/h-register-store.ll b/llvm/test/CodeGen/X86/h-register-store.ll
index a13b43918b524..d61426ee39d61 100644
--- a/llvm/test/CodeGen/X86/h-register-store.ll
+++ b/llvm/test/CodeGen/X86/h-register-store.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X64
; X64: mov
; X64-NEXT: movb %ah, (%rsi)
; X64: mov
@@ -7,7 +7,7 @@
; X64-NEXT: movb %ah, (%rsi)
; X64-NOT: mov
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=X32
; X32: mov
; X32-NEXT: movb %ah, (%esi)
; X32: mov
@@ -16,7 +16,7 @@
; X32-NEXT: movb %ah, (%esi)
; X32-NOT: mov
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=W64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=W64
; W64-NOT: mov
; W64: movb %ch, (%rdx)
; W64-NOT: mov
@@ -25,7 +25,7 @@
; W64: movb %ch, (%rdx)
; W64-NOT: mov
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s -check-prefix=X86
; X86-NOT: mov
; X86: movb %ah, (%e
; X86-NOT: mov
diff --git a/llvm/test/CodeGen/X86/h-registers-0.ll b/llvm/test/CodeGen/X86/h-registers-0.ll
index 76b0a34643d52..4582e64afe70f 100644
--- a/llvm/test/CodeGen/X86/h-registers-0.ll
+++ b/llvm/test/CodeGen/X86/h-registers-0.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64 -check-prefix=X64
-; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=X86-64 -check-prefix=X32
-; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
-; RUN: llc < %s -mattr=-bmi -mtriple=i686-- | FileCheck %s -check-prefix=X86-32
+; RUN: llc -combiner-topological-sorting < %s -mattr=-bmi -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64 -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mattr=-bmi -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=X86-64 -check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mattr=-bmi -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mattr=-bmi -mtriple=i686-- | FileCheck %s -check-prefix=X86-32
; Use h registers. On x86-64, codegen doesn't support general allocation
; of h registers yet, due to x86 encoding complications.
diff --git a/llvm/test/CodeGen/X86/h-registers-1.ll b/llvm/test/CodeGen/X86/h-registers-1.ll
index 07d85d260a37a..b05dbe8473c36 100644
--- a/llvm/test/CodeGen/X86/h-registers-1.ll
+++ b/llvm/test/CodeGen/X86/h-registers-1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=-bmi | FileCheck %s --check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -mattr=-bmi | FileCheck %s --check-prefix=GNUX32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=-bmi | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 -mattr=-bmi | FileCheck %s --check-prefix=GNUX32
; LLVM creates virtual registers for values live across blocks
; based on the type of the value. Make sure that the extracts
diff --git a/llvm/test/CodeGen/X86/h-registers-2.ll b/llvm/test/CodeGen/X86/h-registers-2.ll
index 5c42c97e7a43e..88ca1d40859af 100644
--- a/llvm/test/CodeGen/X86/h-registers-2.ll
+++ b/llvm/test/CodeGen/X86/h-registers-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; Use an h register, but don't omit the explicit shift for
; non-address use(s).
diff --git a/llvm/test/CodeGen/X86/h-registers-3.ll b/llvm/test/CodeGen/X86/h-registers-3.ll
index 8e14bf3a6ee18..5ccf55e1ae092 100644
--- a/llvm/test/CodeGen/X86/h-registers-3.ll
+++ b/llvm/test/CodeGen/X86/h-registers-3.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s -check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s -check-prefix=X32
define zeroext i8 @foo() nounwind ssp {
; X86-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/haddsub-broadcast.ll b/llvm/test/CodeGen/X86/haddsub-broadcast.ll
index 7b7fd7dec4833..cbeeb5ad6d69a 100644
--- a/llvm/test/CodeGen/X86/haddsub-broadcast.ll
+++ b/llvm/test/CodeGen/X86/haddsub-broadcast.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=avx2 | FileCheck %s
; The broadcast node takes a vector operand as input and changes its length.
diff --git a/llvm/test/CodeGen/X86/haddsub-shuf-undef-operand.ll b/llvm/test/CodeGen/X86/haddsub-shuf-undef-operand.ll
index 7416253647c57..3f7ef29f54e2b 100644
--- a/llvm/test/CodeGen/X86/haddsub-shuf-undef-operand.ll
+++ b/llvm/test/CodeGen/X86/haddsub-shuf-undef-operand.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s
; Eliminating a shuffle means we have to replace an undef operand of a horizontal op.
diff --git a/llvm/test/CodeGen/X86/haddsubsat.ll b/llvm/test/CodeGen/X86/haddsubsat.ll
index 588f3383ec415..bd953c37281d8 100644
--- a/llvm/test/CodeGen/X86/haddsubsat.ll
+++ b/llvm/test/CodeGen/X86/haddsubsat.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s -check-prefix=SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s -check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s -check-prefix=SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s -check-prefix=AVX2
define <8 x i16> @phaddsw_v8i16_intrinsic(<8 x i16> %a, <8 x i16> %b) {
; SSSE3-LABEL: phaddsw_v8i16_intrinsic:
diff --git a/llvm/test/CodeGen/X86/half-constrained.ll b/llvm/test/CodeGen/X86/half-constrained.ll
index d5f2060ca20e3..274bcc4875106 100644
--- a/llvm/test/CodeGen/X86/half-constrained.ll
+++ b/llvm/test/CodeGen/X86/half-constrained.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefix=X86-NOF16C
-; RUN: llc < %s -mtriple=i686-linux-gnu -mattr=f16c | FileCheck %s --check-prefix=X86-F16C
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefix=X64-NOF16C
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mattr=f16c | FileCheck %s --check-prefix=X64-F16C
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefix=X86-NOF16C
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -mattr=f16c | FileCheck %s --check-prefix=X86-F16C
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefix=X64-NOF16C
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mattr=f16c | FileCheck %s --check-prefix=X64-F16C
@a = global half 0xH0000, align 2
@b = global half 0xH0000, align 2
diff --git a/llvm/test/CodeGen/X86/handle-move.ll b/llvm/test/CodeGen/X86/handle-move.ll
index c6da9589ff465..71628393b3cb2 100644
--- a/llvm/test/CodeGen/X86/handle-move.ll
+++ b/llvm/test/CodeGen/X86/handle-move.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-- -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-prera-direction=bottomup -verify-machineinstrs < %s
-; RUN: llc -mtriple=x86_64-- -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-prera-direction=topdown -verify-machineinstrs < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-prera-direction=bottomup -verify-machineinstrs < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -mcpu=core2 -fast-isel -enable-misched -misched=shuffle -misched-prera-direction=topdown -verify-machineinstrs < %s
; REQUIRES: asserts
;
; Test the LiveIntervals::handleMove() function.
diff --git a/llvm/test/CodeGen/X86/hidden-vis-2.ll b/llvm/test/CodeGen/X86/hidden-vis-2.ll
index e98117d99ee1d..24872779bde0c 100644
--- a/llvm/test/CodeGen/X86/hidden-vis-2.ll
+++ b/llvm/test/CodeGen/X86/hidden-vis-2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s --check-prefix=i386-darwin9
-; RUN: llc < %s -mtriple=x86_64-apple-darwin9 | FileCheck %s --check-prefix=x86_64-darwin9
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9 | FileCheck %s --check-prefix=i386-darwin9
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin9 | FileCheck %s --check-prefix=x86_64-darwin9
@x = weak hidden global i32 0 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/hidden-vis-3.ll b/llvm/test/CodeGen/X86/hidden-vis-3.ll
index 85d1be7281ac7..43ccaa5eac875 100644
--- a/llvm/test/CodeGen/X86/hidden-vis-3.ll
+++ b/llvm/test/CodeGen/X86/hidden-vis-3.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s -check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-apple-darwin9 | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9 | FileCheck %s -check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin9 | FileCheck %s -check-prefix=X64
@x = external hidden global i32 ; <ptr> [#uses=1]
@y = extern_weak hidden global i32 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/hidden-vis-4.ll b/llvm/test/CodeGen/X86/hidden-vis-4.ll
index 56e76101b8f7d..727c434106e13 100644
--- a/llvm/test/CodeGen/X86/hidden-vis-4.ll
+++ b/llvm/test/CodeGen/X86/hidden-vis-4.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9 | FileCheck %s
@x = common hidden global i32 0 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/hidden-vis-pic.ll b/llvm/test/CodeGen/X86/hidden-vis-pic.ll
index 9731f57d879a2..216a5762dae50 100644
--- a/llvm/test/CodeGen/X86/hidden-vis-pic.ll
+++ b/llvm/test/CodeGen/X86/hidden-vis-pic.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9 -relocation-model=pic -frame-pointer=all | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9 -relocation-model=pic -frame-pointer=all | FileCheck %s
diff --git a/llvm/test/CodeGen/X86/hidden-vis.ll b/llvm/test/CodeGen/X86/hidden-vis.ll
index 2e681a463a3de..461e1b3f09b36 100644
--- a/llvm/test/CodeGen/X86/hidden-vis.ll
+++ b/llvm/test/CodeGen/X86/hidden-vis.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s -check-prefix=LINUX
-; RUN: llc < %s -mtriple=i686-apple-darwin8 | FileCheck %s -check-prefix=DARWIN
-; RUN: llc < %s -mtriple=x86_64-w64-mingw32 | FileCheck %s -check-prefix=WINDOWS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin8 | FileCheck %s -check-prefix=DARWIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-w64-mingw32 | FileCheck %s -check-prefix=WINDOWS
@a = hidden global i32 0
diff --git a/llvm/test/CodeGen/X86/hipe-cc.ll b/llvm/test/CodeGen/X86/hipe-cc.ll
index a7bcd17b23275..bece03e5bd25c 100644
--- a/llvm/test/CodeGen/X86/hipe-cc.ll
+++ b/llvm/test/CodeGen/X86/hipe-cc.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -code-model=medium -mtriple=i686-linux-gnu -mcpu=pentium | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -stack-symbol-ordering=0 -tailcallopt -code-model=medium -mtriple=i686-linux-gnu -mcpu=pentium | FileCheck %s
; Check the HiPE calling convention works (x86-32)
diff --git a/llvm/test/CodeGen/X86/hipe-cc64.ll b/llvm/test/CodeGen/X86/hipe-cc64.ll
index 4cb033b1a6580..f0347dedd4d82 100644
--- a/llvm/test/CodeGen/X86/hipe-cc64.ll
+++ b/llvm/test/CodeGen/X86/hipe-cc64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -stack-symbol-ordering=0 -tailcallopt -relocation-model=static -code-model=medium -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -stack-symbol-ordering=0 -tailcallopt -relocation-model=static -code-model=medium -mtriple=x86_64-linux-gnu -mcpu=opteron | FileCheck %s
; Check the HiPE calling convention works (x86-64)
diff --git a/llvm/test/CodeGen/X86/hipe-prologue.ll b/llvm/test/CodeGen/X86/hipe-prologue.ll
index 12c7240cb75da..39ad4f84538c5 100644
--- a/llvm/test/CodeGen/X86/hipe-prologue.ll
+++ b/llvm/test/CodeGen/X86/hipe-prologue.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mcpu=generic -mtriple=i686-linux -verify-machineinstrs | FileCheck %s -check-prefix=X32-Linux
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -verify-machineinstrs | FileCheck %s -check-prefix=X64-Linux
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-linux -verify-machineinstrs | FileCheck %s -check-prefix=X32-Linux
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -verify-machineinstrs | FileCheck %s -check-prefix=X64-Linux
; The HiPE compiler (i.e., the native code compiler of the Erlang/OTP system)
; adds a custom assembly prologue in order to efficiently manipulate the stack
diff --git a/llvm/test/CodeGen/X86/hoist-common.ll b/llvm/test/CodeGen/X86/hoist-common.ll
index 65f8340810774..5af4f7a56f62f 100644
--- a/llvm/test/CodeGen/X86/hoist-common.ll
+++ b/llvm/test/CodeGen/X86/hoist-common.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx | FileCheck %s
; This is supposed to be testing BranchFolding's common
; code hoisting logic, but has been erroneously passing due
; to there being a redundant xorl in the entry block
diff --git a/llvm/test/CodeGen/X86/hoist-invariant-load.ll b/llvm/test/CodeGen/X86/hoist-invariant-load.ll
index 68e10c0c98871..47fb322ce776d 100644
--- a/llvm/test/CodeGen/X86/hoist-invariant-load.ll
+++ b/llvm/test/CodeGen/X86/hoist-invariant-load.ll
@@ -2,10 +2,10 @@
; Verify the call site info. If the call site info is not
; in the valid state, an assert should be triggered.
-; RUN: llc < %s -debug-entry-values -stop-after=machineverifier
+; RUN: llc -combiner-topological-sorting < %s -debug-entry-values -stop-after=machineverifier
; REQUIRES: asserts
-; RUN: llc -mcpu=haswell < %s -O2 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=haswell < %s -O2 2>&1 | FileCheck %s
; For test:
; 2 invariant loads, 1 for OBJC_SELECTOR_REFERENCES_
; and 1 for objc_msgSend from the GOT
diff --git a/llvm/test/CodeGen/X86/hoist-spill-lpad.ll b/llvm/test/CodeGen/X86/hoist-spill-lpad.ll
index 19d1ca396d154..1cdb933a1ffad 100644
--- a/llvm/test/CodeGen/X86/hoist-spill-lpad.ll
+++ b/llvm/test/CodeGen/X86/hoist-spill-lpad.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
;
; PR27612. The following spill is hoisted from two locations: the fall
; through succ block and the landingpad block of a call which may throw
diff --git a/llvm/test/CodeGen/X86/hoist-spill.ll b/llvm/test/CodeGen/X86/hoist-spill.ll
index b51609c313b0b..806a65ee6df50 100644
--- a/llvm/test/CodeGen/X86/hoist-spill.ll
+++ b/llvm/test/CodeGen/X86/hoist-spill.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Check no spills to the same stack slot after hoisting.
; CHECK: mov{{.}} %{{.*}}, [[SPOFFSET1:-?[0-9]*]](%rsp)
diff --git a/llvm/test/CodeGen/X86/horizontal-reduce-add.ll b/llvm/test/CodeGen/X86/horizontal-reduce-add.ll
index 873083a0703da..169ba9c2bf8a6 100644
--- a/llvm/test/CodeGen/X86/horizontal-reduce-add.ll
+++ b/llvm/test/CodeGen/X86/horizontal-reduce-add.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSSE3-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3,fast-hops | FileCheck %s --check-prefix=SSSE3-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx,fast-hops | FileCheck %s --check-prefix=AVX1-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSSE3-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ssse3,fast-hops | FileCheck %s --check-prefix=SSSE3-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx,fast-hops | FileCheck %s --check-prefix=AVX1-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
; PR37890 - subvector reduction followed by shuffle reduction
diff --git a/llvm/test/CodeGen/X86/horizontal-shuffle-2.ll b/llvm/test/CodeGen/X86/horizontal-shuffle-2.ll
index 0d6d6c5d4cdd7..359c7a01e6b09 100644
--- a/llvm/test/CodeGen/X86/horizontal-shuffle-2.ll
+++ b/llvm/test/CodeGen/X86/horizontal-shuffle-2.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=AVX
define <4 x float> @test_unpacklo_hadd_v4f32(<4 x float> %0, <4 x float> %1, <4 x float> %2, <4 x float> %3) {
; SSE-LABEL: test_unpacklo_hadd_v4f32:
diff --git a/llvm/test/CodeGen/X86/horizontal-shuffle-3.ll b/llvm/test/CodeGen/X86/horizontal-shuffle-3.ll
index eaa0b965ae143..eda7a442b26bb 100644
--- a/llvm/test/CodeGen/X86/horizontal-shuffle-3.ll
+++ b/llvm/test/CodeGen/X86/horizontal-shuffle-3.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx2 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s
define <8 x float> @test_unpacklo_hadd_v8f32(<8 x float> %0, <8 x float> %1, <8 x float> %2, <8 x float> %3) {
; CHECK-LABEL: test_unpacklo_hadd_v8f32:
diff --git a/llvm/test/CodeGen/X86/horizontal-shuffle-4.ll b/llvm/test/CodeGen/X86/horizontal-shuffle-4.ll
index e9bb75446d589..a3a1e1a1f98f0 100644
--- a/llvm/test/CodeGen/X86/horizontal-shuffle-4.ll
+++ b/llvm/test/CodeGen/X86/horizontal-shuffle-4.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx2 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s
;
; 128-bit Vectors
diff --git a/llvm/test/CodeGen/X86/horizontal-shuffle-demanded.ll b/llvm/test/CodeGen/X86/horizontal-shuffle-demanded.ll
index 54911351e68dc..829fa2733e1cc 100644
--- a/llvm/test/CodeGen/X86/horizontal-shuffle-demanded.ll
+++ b/llvm/test/CodeGen/X86/horizontal-shuffle-demanded.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=X64
;
; 128-bit Vectors
diff --git a/llvm/test/CodeGen/X86/horizontal-shuffle.ll b/llvm/test/CodeGen/X86/horizontal-shuffle.ll
index 9879fa6899ae1..4566c8d82c42a 100644
--- a/llvm/test/CodeGen/X86/horizontal-shuffle.ll
+++ b/llvm/test/CodeGen/X86/horizontal-shuffle.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx2 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s
;
; 128-bit Vectors
diff --git a/llvm/test/CodeGen/X86/hot-unlikely-section-prefix.ll b/llvm/test/CodeGen/X86/hot-unlikely-section-prefix.ll
index 719b40d8574d5..f6b6834f630e1 100644
--- a/llvm/test/CodeGen/X86/hot-unlikely-section-prefix.ll
+++ b/llvm/test/CodeGen/X86/hot-unlikely-section-prefix.ll
@@ -1,5 +1,5 @@
; Test hot or unlikely section postfix based on profile and user annotation.
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: inlinehint norecurse nounwind readnone uwtable
diff --git a/llvm/test/CodeGen/X86/huge-stack-offset.ll b/llvm/test/CodeGen/X86/huge-stack-offset.ll
index d6080cfd3f753..4863432883c80 100644
--- a/llvm/test/CodeGen/X86/huge-stack-offset.ll
+++ b/llvm/test/CodeGen/X86/huge-stack-offset.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=x86_64-linux-unknown -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-64
-; RUN: llc < %s -mtriple=i386-linux-unknown -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-32
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-unknown -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-unknown -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-32
; Test that a large stack offset uses a single add/sub instruction to
; adjust the stack pointer.
diff --git a/llvm/test/CodeGen/X86/huge-stack-offset2.ll b/llvm/test/CodeGen/X86/huge-stack-offset2.ll
index 053643eb3686c..b5d037510f5ca 100644
--- a/llvm/test/CodeGen/X86/huge-stack-offset2.ll
+++ b/llvm/test/CodeGen/X86/huge-stack-offset2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux -verify-machineinstrs | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -verify-machineinstrs | FileCheck %s --check-prefix=CHECK
; Test how we handle pathologically large stack frames when RAX is live through
; the prologue and epilogue.
diff --git a/llvm/test/CodeGen/X86/huge-stack.ll b/llvm/test/CodeGen/X86/huge-stack.ll
index 41b8a0141b63d..c201e5d5488ba 100644
--- a/llvm/test/CodeGen/X86/huge-stack.ll
+++ b/llvm/test/CodeGen/X86/huge-stack.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --version 4
-; RUN: llc -O0 -mtriple=x86_64 -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64 -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK
%large = type [4294967295 x i8]
define void @foo() unnamed_addr #0 {
diff --git a/llvm/test/CodeGen/X86/i1-fast-isel.ll b/llvm/test/CodeGen/X86/i1-fast-isel.ll
index 1f111129de13c..c04ecbdec9492 100644
--- a/llvm/test/CodeGen/X86/i1-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/i1-fast-isel.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc --fast-isel < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting --fast-isel < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i8 @test_direct_call(ptr %f) nounwind {
; CHECK-LABEL: test_direct_call:
diff --git a/llvm/test/CodeGen/X86/i128-and-beyond.ll b/llvm/test/CodeGen/X86/i128-and-beyond.ll
index 9a1386c261672..17f3dfdcabb21 100644
--- a/llvm/test/CodeGen/X86/i128-and-beyond.ll
+++ b/llvm/test/CodeGen/X86/i128-and-beyond.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu | FileCheck %s
; These static initializers are too big to hand off to assemblers
; as monolithic blobs.
diff --git a/llvm/test/CodeGen/X86/i128-fp128-abi.ll b/llvm/test/CodeGen/X86/i128-fp128-abi.ll
index 2174d5056e6ce..61ef8c78602cb 100644
--- a/llvm/test/CodeGen/X86/i128-fp128-abi.ll
+++ b/llvm/test/CodeGen/X86/i128-fp128-abi.ll
@@ -2,18 +2,18 @@
; Combined ABI tests for fp128 and i128
-; RUN: sed 's/PrimTy/fp128/g' %s | sed 's/Prim0/0xL0/g' | llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-X64-F128
-; RUN: sed 's/PrimTy/i128/g' %s | sed 's/Prim0/0/g' | llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-X64-I128
-; RUN: sed 's/PrimTy/fp128/g' %s | sed 's/Prim0/0xL0/g' | llc -mtriple=x86_64-pc-windows-msvc -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MSVC64-F128
-; RUN: sed 's/PrimTy/i128/g' %s | sed 's/Prim0/0/g' | llc -mtriple=x86_64-pc-windows-msvc -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MSVC64-I128
-; RUN: sed 's/PrimTy/fp128/g' %s | sed 's/Prim0/0xL0/g' | llc -mtriple=x86_64-pc-windows-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MINGW-F128
-; RUN: sed 's/PrimTy/i128/g' %s | sed 's/Prim0/0/g' | llc -mtriple=x86_64-pc-windows-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MINGW-I128
+; RUN: sed 's/PrimTy/fp128/g' %s | sed 's/Prim0/0xL0/g' | llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-X64-F128
+; RUN: sed 's/PrimTy/i128/g' %s | sed 's/Prim0/0/g' | llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-X64-I128
+; RUN: sed 's/PrimTy/fp128/g' %s | sed 's/Prim0/0xL0/g' | llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MSVC64-F128
+; RUN: sed 's/PrimTy/i128/g' %s | sed 's/Prim0/0/g' | llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MSVC64-I128
+; RUN: sed 's/PrimTy/fp128/g' %s | sed 's/Prim0/0xL0/g' | llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MINGW-F128
+; RUN: sed 's/PrimTy/i128/g' %s | sed 's/Prim0/0/g' | llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MINGW-I128
;
; Use the same directive for i128 and fp128 on x86-32 since both are passed and returned on the stack.
-; RUN: sed 's/PrimTy/fp128/g' %s | sed 's/Prim0/0xL0/g' | llc -mtriple=i686-unknown-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-X86
-; RUN: sed 's/PrimTy/i128/g' %s | sed 's/Prim0/0/g' | llc -mtriple=i686-unknown-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-X86
-; RUN: sed 's/PrimTy/fp128/g' %s | sed 's/Prim0/0xL0/g' | llc -mtriple=i686-pc-windows-msvc -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MSVC32
-; RUN: sed 's/PrimTy/i128/g' %s | sed 's/Prim0/0/g' | llc -mtriple=i686-pc-windows-msvc -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MSVC32
+; RUN: sed 's/PrimTy/fp128/g' %s | sed 's/Prim0/0xL0/g' | llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-X86
+; RUN: sed 's/PrimTy/i128/g' %s | sed 's/Prim0/0/g' | llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-X86
+; RUN: sed 's/PrimTy/fp128/g' %s | sed 's/Prim0/0xL0/g' | llc -combiner-topological-sorting -mtriple=i686-pc-windows-msvc -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MSVC32
+; RUN: sed 's/PrimTy/i128/g' %s | sed 's/Prim0/0/g' | llc -combiner-topological-sorting -mtriple=i686-pc-windows-msvc -verify-machineinstrs | FileCheck %s --check-prefix=CHECK-MSVC32
define void @store(PrimTy %x, ptr %p) nounwind {
; CHECK-X64-F128-LABEL: store:
diff --git a/llvm/test/CodeGen/X86/i128-fpconv-win64-strict.ll b/llvm/test/CodeGen/X86/i128-fpconv-win64-strict.ll
index 64869da48e6c0..0b7e169b10160 100644
--- a/llvm/test/CodeGen/X86/i128-fpconv-win64-strict.ll
+++ b/llvm/test/CodeGen/X86/i128-fpconv-win64-strict.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
-; RUN: llc < %s -mtriple=x86_64-mingw32 | FileCheck %s -check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-mingw32 | FileCheck %s -check-prefix=WIN64
define i64 @double_to_i128(double %d) nounwind strictfp {
; WIN64-LABEL: double_to_i128:
diff --git a/llvm/test/CodeGen/X86/i128-fpconv-win64.ll b/llvm/test/CodeGen/X86/i128-fpconv-win64.ll
index 414318738baf7..c24e1d75a69ac 100644
--- a/llvm/test/CodeGen/X86/i128-fpconv-win64.ll
+++ b/llvm/test/CodeGen/X86/i128-fpconv-win64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
-; RUN: llc < %s -mtriple=x86_64-mingw32 | FileCheck %s -check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-mingw32 | FileCheck %s -check-prefix=WIN64
define i64 @double_to_i128(double %d) nounwind {
; WIN64-LABEL: double_to_i128:
diff --git a/llvm/test/CodeGen/X86/i128-immediate.ll b/llvm/test/CodeGen/X86/i128-immediate.ll
index 96c05a3a32128..71438743b92ef 100644
--- a/llvm/test/CodeGen/X86/i128-immediate.ll
+++ b/llvm/test/CodeGen/X86/i128-immediate.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define i128 @__addvti3() {
; CHECK-LABEL: __addvti3:
diff --git a/llvm/test/CodeGen/X86/i128-mul.ll b/llvm/test/CodeGen/X86/i128-mul.ll
index cffd88c55bb0a..e28aea2ddef10 100644
--- a/llvm/test/CodeGen/X86/i128-mul.ll
+++ b/llvm/test/CodeGen/X86/i128-mul.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86-NOBMI
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+bmi2 | FileCheck %s --check-prefix=X86-BMI
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64-NOBMI
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi2 | FileCheck %s --check-prefix=X64-BMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86-NOBMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+bmi2 | FileCheck %s --check-prefix=X86-BMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64-NOBMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi2 | FileCheck %s --check-prefix=X64-BMI
; PR1198
diff --git a/llvm/test/CodeGen/X86/i128-ret.ll b/llvm/test/CodeGen/X86/i128-ret.ll
index 6d208bdef4f34..a188b0b6f6979 100644
--- a/llvm/test/CodeGen/X86/i128-ret.ll
+++ b/llvm/test/CodeGen/X86/i128-ret.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s
; CHECK: movq ([[A0:%rdi|%rcx]]), %rax
; CHECK: movq 8([[A0]]), %rdx
diff --git a/llvm/test/CodeGen/X86/i128-sdiv.ll b/llvm/test/CodeGen/X86/i128-sdiv.ll
index f78e34ef60569..97e633745f338 100644
--- a/llvm/test/CodeGen/X86/i128-sdiv.ll
+++ b/llvm/test/CodeGen/X86/i128-sdiv.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
; Make sure none of these crash, and that the power-of-two transformations
; trigger correctly.
diff --git a/llvm/test/CodeGen/X86/i16lshr8pat.ll b/llvm/test/CodeGen/X86/i16lshr8pat.ll
index 5bb0b9f1a73de..50f63f11a4bf6 100644
--- a/llvm/test/CodeGen/X86/i16lshr8pat.ll
+++ b/llvm/test/CodeGen/X86/i16lshr8pat.ll
@@ -1,4 +1,4 @@
-; RUN: llc -stop-after finalize-isel < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -stop-after finalize-isel < %s 2>&1 | FileCheck %s
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i386-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/i1narrowfail.ll b/llvm/test/CodeGen/X86/i1narrowfail.ll
index 0bd091d4a412b..34e2b6a91daec 100644
--- a/llvm/test/CodeGen/X86/i1narrowfail.ll
+++ b/llvm/test/CodeGen/X86/i1narrowfail.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl | FileCheck %s
define void @foo(ptr %ptr) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/i256-add.ll b/llvm/test/CodeGen/X86/i256-add.ll
index bdf34320a4479..10fceb16b806f 100644
--- a/llvm/test/CodeGen/X86/i256-add.ll
+++ b/llvm/test/CodeGen/X86/i256-add.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-gnux32 | FileCheck %s --check-prefixes=X32
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-gnux32 | FileCheck %s --check-prefixes=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define void @add(ptr %p, ptr %q) nounwind {
; X86-LABEL: add:
diff --git a/llvm/test/CodeGen/X86/i2k.ll b/llvm/test/CodeGen/X86/i2k.ll
index 23975a3140614..439a68b60b76d 100644
--- a/llvm/test/CodeGen/X86/i2k.ll
+++ b/llvm/test/CodeGen/X86/i2k.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define void @foo(ptr %x, ptr %y, ptr %p) nounwind {
%a = load i2011, ptr %x
diff --git a/llvm/test/CodeGen/X86/i386-baseptr.ll b/llvm/test/CodeGen/X86/i386-baseptr.ll
index 777eb838b84cc..1fde3e52673c2 100644
--- a/llvm/test/CodeGen/X86/i386-baseptr.ll
+++ b/llvm/test/CodeGen/X86/i386-baseptr.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-pc-linux -stackrealign -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -mtriple=i386-pc-none-elf -stackrealign -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-linux -stackrealign -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-none-elf -stackrealign -verify-machineinstrs < %s | FileCheck %s
declare i32 @helper() nounwind
define void @base() #0 {
diff --git a/llvm/test/CodeGen/X86/i386-setjmp-pic.ll b/llvm/test/CodeGen/X86/i386-setjmp-pic.ll
index 8c7e727214f60..c63f698bfc69c 100644
--- a/llvm/test/CodeGen/X86/i386-setjmp-pic.ll
+++ b/llvm/test/CodeGen/X86/i386-setjmp-pic.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -relocation-model=pic %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -relocation-model=pic %s -o - | FileCheck %s
target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
target triple = "i386-apple-macosx"
diff --git a/llvm/test/CodeGen/X86/i386-shrink-wrapping.ll b/llvm/test/CodeGen/X86/i386-shrink-wrapping.ll
index 4347d626e5838..9666eec9a6420 100644
--- a/llvm/test/CodeGen/X86/i386-shrink-wrapping.ll
+++ b/llvm/test/CodeGen/X86/i386-shrink-wrapping.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc %s -o - -enable-shrink-wrap=true -no-x86-call-frame-opt | FileCheck %s --check-prefix=ENABLE
-; RUN: llc %s -o - -enable-shrink-wrap=false -no-x86-call-frame-opt | FileCheck %s --check-prefix=DISABLE
+; RUN: llc -combiner-topological-sorting %s -o - -enable-shrink-wrap=true -no-x86-call-frame-opt | FileCheck %s --check-prefix=ENABLE
+; RUN: llc -combiner-topological-sorting %s -o - -enable-shrink-wrap=false -no-x86-call-frame-opt | FileCheck %s --check-prefix=DISABLE
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i386-apple-macosx10.5"
diff --git a/llvm/test/CodeGen/X86/i386-tlscall-fastregalloc.ll b/llvm/test/CodeGen/X86/i386-tlscall-fastregalloc.ll
index 5ac08195a0556..a33158a863831 100644
--- a/llvm/test/CodeGen/X86/i386-tlscall-fastregalloc.ll
+++ b/llvm/test/CodeGen/X86/i386-tlscall-fastregalloc.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - -O0 -regalloc=fast | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - -O0 -regalloc=fast | FileCheck %s
target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
target triple = "i386-apple-macosx10.10"
diff --git a/llvm/test/CodeGen/X86/i486-fence-loop.ll b/llvm/test/CodeGen/X86/i486-fence-loop.ll
index 287638e0272a6..4850cfa77f53c 100644
--- a/llvm/test/CodeGen/X86/i486-fence-loop.ll
+++ b/llvm/test/CodeGen/X86/i486-fence-loop.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-- -mcpu=i486 -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -mcpu=i486 -o - %s | FileCheck %s
; Main test here was that ISelDAG could cope with a MachineNode in the chain
; from the first load to the "X86ISD::SUB". Previously it thought that meant no
diff --git a/llvm/test/CodeGen/X86/i64-mem-copy.ll b/llvm/test/CodeGen/X86/i64-mem-copy.ll
index 4cdb079d43993..19850180ebb04 100644
--- a/llvm/test/CodeGen/X86/i64-mem-copy.ll
+++ b/llvm/test/CodeGen/X86/i64-mem-copy.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=X86AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=X86AVX
; Use movq or movsd to load / store i64 values if sse2 is available.
; rdar://6659858
diff --git a/llvm/test/CodeGen/X86/i64-to-float.ll b/llvm/test/CodeGen/X86/i64-to-float.ll
index 0a9da87642884..dc03aced823eb 100644
--- a/llvm/test/CodeGen/X86/i64-to-float.ll
+++ b/llvm/test/CodeGen/X86/i64-to-float.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X86-AVX
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=X86-AVX512F
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefix=X86-AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=X64-AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64-AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=X86-AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefix=X86-AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=X64-AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64-AVX512DQ
;PR29078
diff --git a/llvm/test/CodeGen/X86/i686-win-shrink-wrapping.ll b/llvm/test/CodeGen/X86/i686-win-shrink-wrapping.ll
index 5cb1b8f4a89e4..9cd99e46c43ae 100644
--- a/llvm/test/CodeGen/X86/i686-win-shrink-wrapping.ll
+++ b/llvm/test/CodeGen/X86/i686-win-shrink-wrapping.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc %s -o - -enable-shrink-wrap=true | FileCheck --check-prefix=SHRINK-WRAP %s
-; RUN: llc %s -o - -enable-shrink-wrap=false | FileCheck --check-prefix=NO-SHRINK-WRAP %s
+; RUN: llc -combiner-topological-sorting %s -o - -enable-shrink-wrap=true | FileCheck --check-prefix=SHRINK-WRAP %s
+; RUN: llc -combiner-topological-sorting %s -o - -enable-shrink-wrap=false | FileCheck --check-prefix=NO-SHRINK-WRAP %s
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i686-pc-windows-msvc18.0.0"
diff --git a/llvm/test/CodeGen/X86/icall-branch-funnel.ll b/llvm/test/CodeGen/X86/icall-branch-funnel.ll
index b6294e93835f9..6fec231e76ceb 100644
--- a/llvm/test/CodeGen/X86/icall-branch-funnel.ll
+++ b/llvm/test/CodeGen/X86/icall-branch-funnel.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux < %s | FileCheck %s
@g = external global i8
diff --git a/llvm/test/CodeGen/X86/icmp-abs-C-vec.ll b/llvm/test/CodeGen/X86/icmp-abs-C-vec.ll
index 23dcf334124c0..693518945c6ac 100644
--- a/llvm/test/CodeGen/X86/icmp-abs-C-vec.ll
+++ b/llvm/test/CodeGen/X86/icmp-abs-C-vec.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX512
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE41
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2
declare <4 x i64> @llvm.abs.v4i64(<4 x i64>, i1)
declare <4 x i32> @llvm.abs.v4i32(<4 x i32>, i1)
diff --git a/llvm/test/CodeGen/X86/icmp-opt.ll b/llvm/test/CodeGen/X86/icmp-opt.ll
index b7cc53fcf577d..3fffcc20dab10 100644
--- a/llvm/test/CodeGen/X86/icmp-opt.ll
+++ b/llvm/test/CodeGen/X86/icmp-opt.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=-bmi < %s | FileCheck %s --check-prefix=CHECK-NOBMI
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefix=CHECK-BMI
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=-bmi < %s | FileCheck %s --check-prefix=CHECK-NOBMI
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefix=CHECK-BMI
; Optimize (x > -1) to (x >= 0) etc.
; Optimize (cmp (add / sub), 0): eliminate the subs used to update flag
diff --git a/llvm/test/CodeGen/X86/icmp-pow2-diff.ll b/llvm/test/CodeGen/X86/icmp-pow2-diff.ll
index dada1726be424..9e7e0d3252043 100644
--- a/llvm/test/CodeGen/X86/icmp-pow2-diff.ll
+++ b/llvm/test/CodeGen/X86/icmp-pow2-diff.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
; Todo: Support logic for non-splat vectors
define <4 x i1> @andnot_eq_v4i32_todo_no_splat(<4 x i32> %x) nounwind {
diff --git a/llvm/test/CodeGen/X86/icmp-pow2-mask.ll b/llvm/test/CodeGen/X86/icmp-pow2-mask.ll
index 9dd52fe6b7f44..6df23077ab4e2 100644
--- a/llvm/test/CodeGen/X86/icmp-pow2-mask.ll
+++ b/llvm/test/CodeGen/X86/icmp-pow2-mask.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
define <8 x i16> @pow2_mask_v16i8(i8 zeroext %0) {
; SSE2-LABEL: pow2_mask_v16i8:
diff --git a/llvm/test/CodeGen/X86/ident-metadata.ll b/llvm/test/CodeGen/X86/ident-metadata.ll
index e08738f47df75..fc1f81d40b645 100644
--- a/llvm/test/CodeGen/X86/ident-metadata.ll
+++ b/llvm/test/CodeGen/X86/ident-metadata.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
; Verify that llvm.ident metadata is emitted as .ident
; directives in assembly files, and in the .comment section in ELF object files.
diff --git a/llvm/test/CodeGen/X86/ifunc-asm.ll b/llvm/test/CodeGen/X86/ifunc-asm.ll
index bc8e7e3d7d05b..33dabc17c9626 100644
--- a/llvm/test/CodeGen/X86/ifunc-asm.ll
+++ b/llvm/test/CodeGen/X86/ifunc-asm.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefixes=ELF
-; RUN: llc -mtriple=x86_64-apple-darwin %s -o - | FileCheck %s --check-prefixes=MACHO
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefixes=ELF
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin %s -o - | FileCheck %s --check-prefixes=MACHO
define internal ptr @foo_resolver() {
entry:
diff --git a/llvm/test/CodeGen/X86/illegal-insert.ll b/llvm/test/CodeGen/X86/illegal-insert.ll
index 55ec5cbde0f9d..4537baa160b65 100644
--- a/llvm/test/CodeGen/X86/illegal-insert.ll
+++ b/llvm/test/CodeGen/X86/illegal-insert.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define <4 x double> @foo0(<4 x double> %t) {
; CHECK-LABEL: foo0:
diff --git a/llvm/test/CodeGen/X86/illegal-vector-args-return.ll b/llvm/test/CodeGen/X86/illegal-vector-args-return.ll
index a31e94aff6865..2159b4d9b69d6 100644
--- a/llvm/test/CodeGen/X86/illegal-vector-args-return.ll
+++ b/llvm/test/CodeGen/X86/illegal-vector-args-return.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=+sse2 -mcpu=nehalem | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sse2 -mcpu=nehalem | FileCheck %s
target triple = "i686-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/immediate_merging.ll b/llvm/test/CodeGen/X86/immediate_merging.ll
index 348f3a3be38ae..1b0b95ca489ac 100644
--- a/llvm/test/CodeGen/X86/immediate_merging.ll
+++ b/llvm/test/CodeGen/X86/immediate_merging.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64
@a = common dso_local global i32 0, align 4
@b = common dso_local global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/immediate_merging64.ll b/llvm/test/CodeGen/X86/immediate_merging64.ll
index 527f49a47edc1..0eae1f4c4955f 100644
--- a/llvm/test/CodeGen/X86/immediate_merging64.ll
+++ b/llvm/test/CodeGen/X86/immediate_merging64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; Check that multiple instances of 64-bit constants encodable as
; 32-bit immediates are merged for code size savings.
diff --git a/llvm/test/CodeGen/X86/implicit-faultmap.ll b/llvm/test/CodeGen/X86/implicit-faultmap.ll
index ec80ea764599a..39d532b44f8e0 100644
--- a/llvm/test/CodeGen/X86/implicit-faultmap.ll
+++ b/llvm/test/CodeGen/X86/implicit-faultmap.ll
@@ -1,11 +1,11 @@
-; RUN: llc -verify-machineinstrs -O3 -mtriple=x86_64-apple-macosx -enable-implicit-null-checks < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -O3 -mtriple=x86_64-apple-macosx -enable-implicit-null-checks < %s | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-macosx -enable-implicit-null-checks \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx -enable-implicit-null-checks \
; RUN: | llvm-mc -triple x86_64-apple-macosx -filetype=obj -o - \
; RUN: | llvm-objdump --triple=x86_64-apple-macosx --fault-map-section - \
; RUN: | FileCheck %s -check-prefix OBJDUMP
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -enable-implicit-null-checks \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -enable-implicit-null-checks \
; RUN: | llvm-mc -triple x86_64-unknown-linux-gnu -filetype=obj -o - \
; RUN: | llvm-objdump --triple=x86_64-unknown-linux-gnu --fault-map-section - \
; RUN: | FileCheck %s -check-prefix OBJDUMP
diff --git a/llvm/test/CodeGen/X86/implicit-null-check-negative.ll b/llvm/test/CodeGen/X86/implicit-null-check-negative.ll
index 59e4f17bb0a3c..ce3a3a0c4b164 100644
--- a/llvm/test/CodeGen/X86/implicit-null-check-negative.ll
+++ b/llvm/test/CodeGen/X86/implicit-null-check-negative.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-macosx -O3 -debug-only=faultmaps -enable-implicit-null-checks < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx -O3 -debug-only=faultmaps -enable-implicit-null-checks < %s 2>&1 | FileCheck %s
; REQUIRES: asserts
; List cases where we should *not* be emitting implicit null checks.
diff --git a/llvm/test/CodeGen/X86/implicit-null-check.ll b/llvm/test/CodeGen/X86/implicit-null-check.ll
index de63c9ae209df..de535cd3846da 100644
--- a/llvm/test/CodeGen/X86/implicit-null-check.ll
+++ b/llvm/test/CodeGen/X86/implicit-null-check.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -verify-machineinstrs -O3 -mtriple=x86_64-apple-macosx -enable-implicit-null-checks < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -O3 -mtriple=x86_64-apple-macosx -enable-implicit-null-checks < %s | FileCheck %s
define i32 @imp_null_check_load(ptr %x) {
; CHECK-LABEL: imp_null_check_load:
diff --git a/llvm/test/CodeGen/X86/imul-lea-2.ll b/llvm/test/CodeGen/X86/imul-lea-2.ll
index d1de25d02ef15..7a5714af290ff 100644
--- a/llvm/test/CodeGen/X86/imul-lea-2.ll
+++ b/llvm/test/CodeGen/X86/imul-lea-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i64 @t1(i64 %a) nounwind readnone {
diff --git a/llvm/test/CodeGen/X86/imul-lea.ll b/llvm/test/CodeGen/X86/imul-lea.ll
index 9d27794e9c4e2..3eb4434226f84 100644
--- a/llvm/test/CodeGen/X86/imul-lea.ll
+++ b/llvm/test/CodeGen/X86/imul-lea.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s
declare i32 @foo()
diff --git a/llvm/test/CodeGen/X86/imul.ll b/llvm/test/CodeGen/X86/imul.ll
index 9131688c4efcc..39bbe76c2237c 100644
--- a/llvm/test/CodeGen/X86/imul.ll
+++ b/llvm/test/CodeGen/X86/imul.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686-pc-linux | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnux32 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux | FileCheck %s --check-prefix=X86
; At least one of the test cases in here crashed when linearizing the DAG.
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -pre-RA-sched=linearize | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu -pre-RA-sched=linearize | FileCheck %s --check-prefix=X64
define i32 @mul4_32(i32 %A) {
; X64-LABEL: mul4_32:
diff --git a/llvm/test/CodeGen/X86/inalloca-ctor.ll b/llvm/test/CodeGen/X86/inalloca-ctor.ll
index fbb6557e39bdf..16a1504117a86 100644
--- a/llvm/test/CodeGen/X86/inalloca-ctor.ll
+++ b/llvm/test/CodeGen/X86/inalloca-ctor.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck %s
%Foo = type { i32, i32 }
diff --git a/llvm/test/CodeGen/X86/inalloca-invoke.ll b/llvm/test/CodeGen/X86/inalloca-invoke.ll
index 68cb24dece0a9..91f00c08665f9 100644
--- a/llvm/test/CodeGen/X86/inalloca-invoke.ll
+++ b/llvm/test/CodeGen/X86/inalloca-invoke.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck %s
%Iter = type { i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/inalloca-regparm.ll b/llvm/test/CodeGen/X86/inalloca-regparm.ll
index 5465be8f3734f..ab9bef8e09466 100644
--- a/llvm/test/CodeGen/X86/inalloca-regparm.ll
+++ b/llvm/test/CodeGen/X86/inalloca-regparm.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i686-windows-msvc < %s -o /dev/null
-; RUN: not --crash llc -mtriple=x86_64-windows-msvc %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-windows-msvc < %s -o /dev/null
+; RUN: not --crash llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc %s -o /dev/null 2>&1 | FileCheck %s
; This will compile successfully on x86 but not x86_64, because %b will become a
; register parameter.
diff --git a/llvm/test/CodeGen/X86/inalloca-stdcall.ll b/llvm/test/CodeGen/X86/inalloca-stdcall.ll
index d18976ee2ddf5..d8929e1d808a8 100644
--- a/llvm/test/CodeGen/X86/inalloca-stdcall.ll
+++ b/llvm/test/CodeGen/X86/inalloca-stdcall.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck %s
%Foo = type { i32, i32 }
diff --git a/llvm/test/CodeGen/X86/inalloca.ll b/llvm/test/CodeGen/X86/inalloca.ll
index fafc7d97eb5c0..baac1d260c624 100644
--- a/llvm/test/CodeGen/X86/inalloca.ll
+++ b/llvm/test/CodeGen/X86/inalloca.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck %s
%Foo = type { i32, i32 }
diff --git a/llvm/test/CodeGen/X86/inc-of-add.ll b/llvm/test/CodeGen/X86/inc-of-add.ll
index a899660031d45..2280da379f1cc 100644
--- a/llvm/test/CodeGen/X86/inc-of-add.ll
+++ b/llvm/test/CodeGen/X86/inc-of-add.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse,+sse2,+slow-lea,+slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X86,X86-SLOWLEA
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse,+sse2,-slow-lea,-slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X86,X86-FASTLEA
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse,+sse2,+slow-lea,+slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse,+sse2,-slow-lea,-slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse,+sse2,+slow-lea,+slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X86,X86-SLOWLEA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse,+sse2,-slow-lea,-slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X86,X86-FASTLEA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse,+sse2,+slow-lea,+slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse,+sse2,-slow-lea,-slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X64
; These two forms are equivalent:
; sub %y, (xor %x, -1)
diff --git a/llvm/test/CodeGen/X86/indirect-branch-tracking-cm-lager.ll b/llvm/test/CodeGen/X86/indirect-branch-tracking-cm-lager.ll
index 48b9855a8ba62..dda4f996f03ef 100644
--- a/llvm/test/CodeGen/X86/indirect-branch-tracking-cm-lager.ll
+++ b/llvm/test/CodeGen/X86/indirect-branch-tracking-cm-lager.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -code-model=large < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -code-model=large < %s | FileCheck %s
; In large code model indirect branches are needed when branching to addresses
; whose offset from the current instruction pointer is unknown.
diff --git a/llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll b/llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll
index 8403d4b754d80..ee9dbd49682f3 100644
--- a/llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll
+++ b/llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefix=X86_64
-; RUN: llc -mtriple=i386-unknown-unknown < %s | FileCheck %s --check-prefix=X86
-; RUN: llc -mtriple i386-windows-gnu -exception-model sjlj -verify-machineinstrs=0 < %s | FileCheck %s --check-prefix=SJLJ
-; RUN: llc -mtriple i386-windows-gnu -exception-model sjlj -verify-machineinstrs=0 < %s | FileCheck %s --check-prefix=NUM
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefix=X86_64
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-unknown < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple i386-windows-gnu -exception-model sjlj -verify-machineinstrs=0 < %s | FileCheck %s --check-prefix=SJLJ
+; RUN: llc -combiner-topological-sorting -mtriple i386-windows-gnu -exception-model sjlj -verify-machineinstrs=0 < %s | FileCheck %s --check-prefix=NUM
; X86_64: test_eh: # @test_eh
; X86_64-NEXT: .Lfunc_begin0:
diff --git a/llvm/test/CodeGen/X86/indirect-branch-tracking-r2.ll b/llvm/test/CodeGen/X86/indirect-branch-tracking-r2.ll
index c9978d64f1c97..517ff8d9cacdb 100644
--- a/llvm/test/CodeGen/X86/indirect-branch-tracking-r2.ll
+++ b/llvm/test/CodeGen/X86/indirect-branch-tracking-r2.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i386-unknown-unknown < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-unknown < %s | FileCheck %s --check-prefix=X86
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; foo
diff --git a/llvm/test/CodeGen/X86/indirect-branch-tracking.ll b/llvm/test/CodeGen/X86/indirect-branch-tracking.ll
index d4b0ed3aae69b..47489cdf765fc 100644
--- a/llvm/test/CodeGen/X86/indirect-branch-tracking.ll
+++ b/llvm/test/CodeGen/X86/indirect-branch-tracking.ll
@@ -1,8 +1,8 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefix=ALL --check-prefix=X86_64
-; RUN: llc -mtriple=x86_64-unknown-unknown-gnux32 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X86_64
-; RUN: llc -mtriple=i386-unknown-unknown < %s | FileCheck %s --check-prefix=ALL --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefix=ALL --check-prefix=X86_64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown-gnux32 < %s | FileCheck %s --check-prefix=ALL --check-prefix=X86_64
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-unknown < %s | FileCheck %s --check-prefix=ALL --check-prefix=X86
; FIXME: Fix machine verifier issues and remove -verify-machineinstrs=0. PR39439.
-; RUN: llc -mtriple i386-windows-gnu -exception-model sjlj -verify-machineinstrs=0 < %s | FileCheck %s --check-prefix=SJLJ
+; RUN: llc -combiner-topological-sorting -mtriple i386-windows-gnu -exception-model sjlj -verify-machineinstrs=0 < %s | FileCheck %s --check-prefix=SJLJ
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Test1
diff --git a/llvm/test/CodeGen/X86/indirect-hidden.ll b/llvm/test/CodeGen/X86/indirect-hidden.ll
index 124c2c4386b59..c75f1744eb153 100644
--- a/llvm/test/CodeGen/X86/indirect-hidden.ll
+++ b/llvm/test/CodeGen/X86/indirect-hidden.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-apple-macosx -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-apple-macosx -o - %s | FileCheck %s
; x86 doesn't normally use indirect symbols, particularly hidden ones, but it
; can be tricked into it for exception-handling typeids.
diff --git a/llvm/test/CodeGen/X86/init-priority.ll b/llvm/test/CodeGen/X86/init-priority.ll
index 5714d0106c3c5..4b6077d6b4b67 100644
--- a/llvm/test/CodeGen/X86/init-priority.ll
+++ b/llvm/test/CodeGen/X86/init-priority.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-netbsd -use-ctors | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-netbsd -use-ctors | FileCheck %s
; Check that our compiler never emits global constructors
; inside the .init_array section when building for a non supported target.
diff --git a/llvm/test/CodeGen/X86/inline-0bh.ll b/llvm/test/CodeGen/X86/inline-0bh.ll
index d1d747fdc5d44..779dde7b10ce1 100644
--- a/llvm/test/CodeGen/X86/inline-0bh.ll
+++ b/llvm/test/CodeGen/X86/inline-0bh.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; Function Attrs: noinline nounwind
define i32 @PR31007() {
diff --git a/llvm/test/CodeGen/X86/inline-asm-2addr.ll b/llvm/test/CodeGen/X86/inline-asm-2addr.ll
index 079f883186fb6..3b19756854704 100644
--- a/llvm/test/CodeGen/X86/inline-asm-2addr.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-2addr.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i64 @t(i64 %a, i64 %b) nounwind ssp {
entry:
diff --git a/llvm/test/CodeGen/X86/inline-asm-A-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-A-constraint.ll
index 11a1f3976102a..32025ebdcb3d5 100644
--- a/llvm/test/CodeGen/X86/inline-asm-A-constraint.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-A-constraint.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-- -early-live-intervals < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -early-live-intervals < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64--"
diff --git a/llvm/test/CodeGen/X86/inline-asm-R-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-R-constraint.ll
index 355d1cd402008..eaf4bb023c45a 100644
--- a/llvm/test/CodeGen/X86/inline-asm-R-constraint.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-R-constraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; 7282062
; ModuleID = '<stdin>'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/inline-asm-Ws-constraint-error.ll b/llvm/test/CodeGen/X86/inline-asm-Ws-constraint-error.ll
index 2929b11d2e58d..8fc5c35ad0d39 100644
--- a/llvm/test/CodeGen/X86/inline-asm-Ws-constraint-error.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-Ws-constraint-error.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=x86_64 < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64 < %s 2>&1 | FileCheck %s
@a = external global [4 x i32], align 16
diff --git a/llvm/test/CodeGen/X86/inline-asm-Ws-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-Ws-constraint.ll
index c10d631e9c434..bddd5fcfbf447 100644
--- a/llvm/test/CodeGen/X86/inline-asm-Ws-constraint.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-Ws-constraint.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 < %s | FileCheck %s
@var = external dso_local global i32, align 4
@a = external global [4 x i32], align 16
diff --git a/llvm/test/CodeGen/X86/inline-asm-assertion.ll b/llvm/test/CodeGen/X86/inline-asm-assertion.ll
index 3b22abf8b691d..bccca98f7ee0d 100644
--- a/llvm/test/CodeGen/X86/inline-asm-assertion.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-assertion.ll
@@ -1,5 +1,5 @@
-; RUN: not llc -verify-machineinstrs -O0 < %s 2>&1 | FileCheck %s
-; RUN: not llc -verify-machineinstrs -O2 < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -verify-machineinstrs -O0 < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -verify-machineinstrs -O2 < %s 2>&1 | FileCheck %s
; CHECK: error: inline assembly requires more registers than available
; CHECK: .size main, .Lfunc_end0-main
diff --git a/llvm/test/CodeGen/X86/inline-asm-avx-v-constraint-32bit.ll b/llvm/test/CodeGen/X86/inline-asm-avx-v-constraint-32bit.ll
index 73fa50a4aebb2..e5d83755c5caf 100644
--- a/llvm/test/CodeGen/X86/inline-asm-avx-v-constraint-32bit.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-avx-v-constraint-32bit.ll
@@ -1,4 +1,4 @@
-; RUN: not llc %s -verify-machineinstrs=0 -mtriple i386-unknown-linux-gnu -mattr +avx -o /dev/null 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting %s -verify-machineinstrs=0 -mtriple i386-unknown-linux-gnu -mattr +avx -o /dev/null 2>&1 | FileCheck %s
define <4 x float> @testxmm_1(<4 x float> %_xmm0, i32 %_l) {
; CHECK: error: inline assembly requires more registers than available
diff --git a/llvm/test/CodeGen/X86/inline-asm-avx-v-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-avx-v-constraint.ll
index b0190642bfadd..526a09dd88f70 100644
--- a/llvm/test/CodeGen/X86/inline-asm-avx-v-constraint.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-avx-v-constraint.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx | FileCheck %s
-; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s
define <4 x float> @testxmm_1(<4 x float> %_xmm0, i64 %_l) {
; CHECK: vmovhlps %xmm1, %xmm0, %xmm0
diff --git a/llvm/test/CodeGen/X86/inline-asm-avx512f-v-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-avx512f-v-constraint.ll
index 967991bbc3428..dcbcf122c551b 100644
--- a/llvm/test/CodeGen/X86/inline-asm-avx512f-v-constraint.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-avx512f-v-constraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s
define <16 x float> @testzmm_1(<16 x float> %_zmm0, <16 x float> %_zmm1) {
entry:
diff --git a/llvm/test/CodeGen/X86/inline-asm-avx512f-x-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-avx512f-x-constraint.ll
index e153387d16e72..72f4d36e7e7ea 100644
--- a/llvm/test/CodeGen/X86/inline-asm-avx512f-x-constraint.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-avx512f-x-constraint.ll
@@ -1,7 +1,7 @@
-; RUN: not llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f -stop-after=finalize-isel > %t 2> %t.err
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f -stop-after=finalize-isel > %t 2> %t.err
; RUN: FileCheck < %t %s
; RUN: FileCheck --check-prefix=CHECK-STDERR < %t.err %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bf16,avx512fp16 -stop-after=finalize-isel | FileCheck --check-prefixes=CHECK,FP16 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bf16,avx512fp16 -stop-after=finalize-isel | FileCheck --check-prefixes=CHECK,FP16 %s
; CHECK-LABEL: name: mask_Yk_i8
; CHECK: %[[REG1:.*]]:vr512_0_15 = COPY %1
diff --git a/llvm/test/CodeGen/X86/inline-asm-avx512vl-v-constraint-32bit.ll b/llvm/test/CodeGen/X86/inline-asm-avx512vl-v-constraint-32bit.ll
index 7ca72a7007a44..2a5c77220b340 100644
--- a/llvm/test/CodeGen/X86/inline-asm-avx512vl-v-constraint-32bit.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-avx512vl-v-constraint-32bit.ll
@@ -1,4 +1,4 @@
-; RUN: not llc %s -verify-machineinstrs=0 -mtriple i386-unknown-linux-gnu -mattr +avx512vl -o /dev/null 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting %s -verify-machineinstrs=0 -mtriple i386-unknown-linux-gnu -mattr +avx512vl -o /dev/null 2>&1 | FileCheck %s
define <4 x float> @testxmm_1(<4 x float> %_xmm0, i64 %_l) {
; CHECK: error: inline assembly requires more registers than available
diff --git a/llvm/test/CodeGen/X86/inline-asm-avx512vl-v-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-avx512vl-v-constraint.ll
index 4b01814b2e200..f005822238de1 100644
--- a/llvm/test/CodeGen/X86/inline-asm-avx512vl-v-constraint.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-avx512vl-v-constraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx512vl | FileCheck %s
define <4 x float> @testxmm_1(<4 x float> %_xmm0, i64 %_l) {
entry:
diff --git a/llvm/test/CodeGen/X86/inline-asm-bad-constraint-n.ll b/llvm/test/CodeGen/X86/inline-asm-bad-constraint-n.ll
index d27a74620013b..cb4b626ff0124 100644
--- a/llvm/test/CodeGen/X86/inline-asm-bad-constraint-n.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-bad-constraint-n.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=i686-- -no-integrated-as < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=i686-- -no-integrated-as < %s 2>&1 | FileCheck %s
@x = global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/inline-asm-default-clobbers.ll b/llvm/test/CodeGen/X86/inline-asm-default-clobbers.ll
index 4a8906af95c45..d96cab7d58906 100644
--- a/llvm/test/CodeGen/X86/inline-asm-default-clobbers.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-default-clobbers.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686 -stop-after=finalize-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -stop-after=finalize-isel | FileCheck %s
; CHECK: INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def early-clobber $eflags
define void @foo() {
diff --git a/llvm/test/CodeGen/X86/inline-asm-duplicated-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-duplicated-constraint.ll
index bbc41a44d7852..79e67eb04934f 100644
--- a/llvm/test/CodeGen/X86/inline-asm-duplicated-constraint.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-duplicated-constraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -no-integrated-as -mtriple=x86_64-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -no-integrated-as -mtriple=x86_64-linux-gnu | FileCheck %s
; CHECK-LABEL: test1:
; CHECK: movl (%rdi), %eax
diff --git a/llvm/test/CodeGen/X86/inline-asm-e-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-e-constraint.ll
index 3b5937f73f3fb..463467ce67b86 100644
--- a/llvm/test/CodeGen/X86/inline-asm-e-constraint.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-e-constraint.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=x86_64-unknown-unknown -no-integrated-as < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -no-integrated-as < %s 2>&1 | FileCheck %s
%struct.s = type { i32, i32 }
diff --git a/llvm/test/CodeGen/X86/inline-asm-error.ll b/llvm/test/CodeGen/X86/inline-asm-error.ll
index a757365e34823..7923c3c544c2e 100644
--- a/llvm/test/CodeGen/X86/inline-asm-error.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-error.ll
@@ -1,6 +1,6 @@
-; RUN: not llc -mtriple=i686-- -regalloc=fast -optimize-regalloc=0 < %s 2> %t1
-; RUN: not llc -mtriple=i686-- -regalloc=basic < %s 2> %t2
-; RUN: not llc -mtriple=i686-- -regalloc=greedy < %s 2> %t3
+; RUN: not llc -combiner-topological-sorting -mtriple=i686-- -regalloc=fast -optimize-regalloc=0 < %s 2> %t1
+; RUN: not llc -combiner-topological-sorting -mtriple=i686-- -regalloc=basic < %s 2> %t2
+; RUN: not llc -combiner-topological-sorting -mtriple=i686-- -regalloc=greedy < %s 2> %t3
; RUN: FileCheck %s < %t1
; RUN: FileCheck %s < %t2
; RUN: FileCheck %s < %t3
diff --git a/llvm/test/CodeGen/X86/inline-asm-flag-clobber.ll b/llvm/test/CodeGen/X86/inline-asm-flag-clobber.ll
index 0538541a6f7ba..358269bc119fe 100644
--- a/llvm/test/CodeGen/X86/inline-asm-flag-clobber.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-flag-clobber.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-- -no-integrated-as < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -no-integrated-as < %s | FileCheck %s
; PR3701
define i64 @t(ptr %arg) nounwind {
diff --git a/llvm/test/CodeGen/X86/inline-asm-flag-output.ll b/llvm/test/CodeGen/X86/inline-asm-flag-output.ll
index 0afdb740233d9..9dd1451fa9e12 100644
--- a/llvm/test/CodeGen/X86/inline-asm-flag-output.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-flag-output.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -no-integrated-as | FileCheck %s -check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-- -no-integrated-as | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -no-integrated-as | FileCheck %s -check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -no-integrated-as | FileCheck %s -check-prefix=X64
define i32 @test_cca(i64 %nr, ptr %addr) nounwind {
; X32-LABEL: test_cca:
diff --git a/llvm/test/CodeGen/X86/inline-asm-fpstack.ll b/llvm/test/CodeGen/X86/inline-asm-fpstack.ll
index af188ef3a2cf8..e533d6c95904b 100644
--- a/llvm/test/CodeGen/X86/inline-asm-fpstack.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-fpstack.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=generic -mtriple=i386-apple-darwin -verify-machineinstrs -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i386-apple-darwin -verify-machineinstrs -no-integrated-as | FileCheck %s
; There should be no stack manipulations between the inline asm and ret.
define x86_fp80 @test1() nounwind {
diff --git a/llvm/test/CodeGen/X86/inline-asm-function-call-pic.ll b/llvm/test/CodeGen/X86/inline-asm-function-call-pic.ll
index d3ca872509ad5..1d55325b972d7 100644
--- a/llvm/test/CodeGen/X86/inline-asm-function-call-pic.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-function-call-pic.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O2 --relocation-model=pic -mtriple=i386-unknown-linux-gnu < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O2 --relocation-model=pic -mtriple=i386-unknown-linux-gnu < %s 2>&1 | FileCheck %s
; List the source code:
; // clang -m32 -fasm-blocks -S t.c -O2 -fpic -emit-llvm
diff --git a/llvm/test/CodeGen/X86/inline-asm-h.ll b/llvm/test/CodeGen/X86/inline-asm-h.ll
index 67a7d067fdd9c..3862df2d3c2da 100644
--- a/llvm/test/CodeGen/X86/inline-asm-h.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-h.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu < %s | FileCheck %s
@foobar = common dso_local global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/inline-asm-i-constraint-i1.ll b/llvm/test/CodeGen/X86/inline-asm-i-constraint-i1.ll
index 02cfec9fdfba6..151d088964a10 100644
--- a/llvm/test/CodeGen/X86/inline-asm-i-constraint-i1.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-i-constraint-i1.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
; Make sure that boolean immediates are properly (zero) extended.
; CHECK: .Ltmp[[N:[0-9]+]]:
diff --git a/llvm/test/CodeGen/X86/inline-asm-imm-out-of-range.ll b/llvm/test/CodeGen/X86/inline-asm-imm-out-of-range.ll
index 9c5177d02a163..329b7610b74ca 100644
--- a/llvm/test/CodeGen/X86/inline-asm-imm-out-of-range.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-imm-out-of-range.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=i686-- -no-integrated-as < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=i686-- -no-integrated-as < %s 2>&1 | FileCheck %s
; CHECK: error: value out of range for constraint 'I'
define void @foo() {
diff --git a/llvm/test/CodeGen/X86/inline-asm-int-to-fp.ll b/llvm/test/CodeGen/X86/inline-asm-int-to-fp.ll
index d2255d9970b12..49c9037cc4fbc 100644
--- a/llvm/test/CodeGen/X86/inline-asm-int-to-fp.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-int-to-fp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr +avx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr +avx < %s | FileCheck %s
; The C source used as a base for generating this test:.
diff --git a/llvm/test/CodeGen/X86/inline-asm-memop.ll b/llvm/test/CodeGen/X86/inline-asm-memop.ll
index 01fe2e4bd99a8..32aa291b63f24 100644
--- a/llvm/test/CodeGen/X86/inline-asm-memop.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-memop.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
; A bug in X86DAGToDAGISel::matchAddressRecursively create a zext SDValue which
; is quickly replaced by other SDValue but already pushed into vector for later
diff --git a/llvm/test/CodeGen/X86/inline-asm-movdir64b-x86_64.ll b/llvm/test/CodeGen/X86/inline-asm-movdir64b-x86_64.ll
index c8724a3960d49..413e5fb0f1c55 100644
--- a/llvm/test/CodeGen/X86/inline-asm-movdir64b-x86_64.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-movdir64b-x86_64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+movdir64b | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+movdir64b | FileCheck %s --check-prefix=X64
define void @test_movdir64b() {
; X64-LABEL: test_movdir64b:
diff --git a/llvm/test/CodeGen/X86/inline-asm-movdir64b.ll b/llvm/test/CodeGen/X86/inline-asm-movdir64b.ll
index 0fe7189de34c6..9e32eebcae2e9 100644
--- a/llvm/test/CodeGen/X86/inline-asm-movdir64b.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-movdir64b.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+movdir64b | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+movdir64b | FileCheck %s --check-prefix=X86
define void @test_movdir64b() {
; X86-LABEL: test_movdir64b:
diff --git a/llvm/test/CodeGen/X86/inline-asm-mrv.ll b/llvm/test/CodeGen/X86/inline-asm-mrv.ll
index 28a7e2c799388..89e73c7b359ad 100644
--- a/llvm/test/CodeGen/X86/inline-asm-mrv.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-mrv.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -no-integrated-as | FileCheck %s
; PR2094
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/inline-asm-multilevel-gep.ll b/llvm/test/CodeGen/X86/inline-asm-multilevel-gep.ll
index ac6192219ad21..8c06b32c17aa6 100644
--- a/llvm/test/CodeGen/X86/inline-asm-multilevel-gep.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-multilevel-gep.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple x86_64-gnu-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-gnu-linux | FileCheck %s
; @foo is a 2d array of i32s, ex.
; i32 foo [2][2]
diff --git a/llvm/test/CodeGen/X86/inline-asm-n-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-n-constraint.ll
index 4774d43ee333f..742100fd93c52 100644
--- a/llvm/test/CodeGen/X86/inline-asm-n-constraint.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-n-constraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -no-integrated-as < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -no-integrated-as < %s 2>&1 | FileCheck %s
@x = global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/inline-asm-out-regs.ll b/llvm/test/CodeGen/X86/inline-asm-out-regs.ll
index 298c6e2fd2603..7d6b742666b32 100644
--- a/llvm/test/CodeGen/X86/inline-asm-out-regs.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-out-regs.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu
; PR3391
@pci_indirect = external dso_local global { } ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/inline-asm-p-constraint.ll b/llvm/test/CodeGen/X86/inline-asm-p-constraint.ll
index ce354f93fb02b..a6150a3033bc9 100644
--- a/llvm/test/CodeGen/X86/inline-asm-p-constraint.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-p-constraint.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -no-integrated-as < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -no-integrated-as < %s 2>&1 | FileCheck %s
define ptr @foo(ptr %Ptr) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/inline-asm-pic.ll b/llvm/test/CodeGen/X86/inline-asm-pic.ll
index 54300a946ec3d..dba3220ebf9cd 100644
--- a/llvm/test/CodeGen/X86/inline-asm-pic.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-pic.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -relocation-model=pic | FileCheck %s
@main_q = internal global ptr null ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/inline-asm-ptr-cast.ll b/llvm/test/CodeGen/X86/inline-asm-ptr-cast.ll
index 7bdb2491c6dff..02642f7071118 100644
--- a/llvm/test/CodeGen/X86/inline-asm-ptr-cast.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-ptr-cast.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s
; ModuleID = 'bug.c'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/inline-asm-q-regs.ll b/llvm/test/CodeGen/X86/inline-asm-q-regs.ll
index dd67bd645ee9e..78b3a8c55d488 100644
--- a/llvm/test/CodeGen/X86/inline-asm-q-regs.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-q-regs.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx -no-integrated-as
; rdar://7066579
%0 = type { i64, i64, i64, i64, i64 } ; type %0
diff --git a/llvm/test/CodeGen/X86/inline-asm-sp-clobber-memcpy.ll b/llvm/test/CodeGen/X86/inline-asm-sp-clobber-memcpy.ll
index 7c4a0196d5e8d..95676463c223a 100644
--- a/llvm/test/CodeGen/X86/inline-asm-sp-clobber-memcpy.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-sp-clobber-memcpy.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -stackrealign -mtriple i386-apple-darwin -mcpu=i486 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -stackrealign -mtriple i386-apple-darwin -mcpu=i486 | FileCheck %s
%struct.foo = type { [88 x i8] }
diff --git a/llvm/test/CodeGen/X86/inline-asm-stack-realign.ll b/llvm/test/CodeGen/X86/inline-asm-stack-realign.ll
index 67f4e44e19023..dd613b370b1f0 100644
--- a/llvm/test/CodeGen/X86/inline-asm-stack-realign.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-stack-realign.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=i686-pc-win32 < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=i686-pc-win32 < %s 2>&1 | FileCheck %s
; FIXME: This is miscompiled due to our unconditional use of esi as the base
; pointer.
diff --git a/llvm/test/CodeGen/X86/inline-asm-stack-realign2.ll b/llvm/test/CodeGen/X86/inline-asm-stack-realign2.ll
index 7980888be9783..1866928651103 100644
--- a/llvm/test/CodeGen/X86/inline-asm-stack-realign2.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-stack-realign2.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=i686-pc-win32 < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=i686-pc-win32 < %s 2>&1 | FileCheck %s
; FIXME: This is miscompiled due to our unconditional use of ESI as the base
; pointer.
diff --git a/llvm/test/CodeGen/X86/inline-asm-stack-realign3.ll b/llvm/test/CodeGen/X86/inline-asm-stack-realign3.ll
index 58b4f1f313fba..b12898e4309b2 100644
--- a/llvm/test/CodeGen/X86/inline-asm-stack-realign3.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-stack-realign3.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-- -no-integrated-as < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -no-integrated-as < %s | FileCheck %s
declare void @bar(ptr %junk)
diff --git a/llvm/test/CodeGen/X86/inline-asm-tied.ll b/llvm/test/CodeGen/X86/inline-asm-tied.ll
index 7363e613a56e7..a5ede984f080e 100644
--- a/llvm/test/CodeGen/X86/inline-asm-tied.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-tied.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -optimize-regalloc -regalloc=basic -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9 -O0 -optimize-regalloc -regalloc=basic -no-integrated-as | FileCheck %s
; rdar://6992609
target triple = "i386-apple-darwin9.0"
diff --git a/llvm/test/CodeGen/X86/inline-asm-x-i128.ll b/llvm/test/CodeGen/X86/inline-asm-x-i128.ll
index 7aee1d175494e..82a10d4f76af4 100644
--- a/llvm/test/CodeGen/X86/inline-asm-x-i128.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-x-i128.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnux32 | FileCheck %s
-; RUN: not llc < %s -mtriple=i386-unknown-linux-gnu 2>&1 | FileCheck %s --check-prefix=ERROR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnux32 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu 2>&1 | FileCheck %s --check-prefix=ERROR
; For 32-bit we still error since __int128 isn't supported in the frontend.
; ERROR: error: couldn't allocate output register for constraint 'x'
diff --git a/llvm/test/CodeGen/X86/inline-asm-x-scalar.ll b/llvm/test/CodeGen/X86/inline-asm-x-scalar.ll
index a33734af93f9f..42cb86a47997b 100644
--- a/llvm/test/CodeGen/X86/inline-asm-x-scalar.ll
+++ b/llvm/test/CodeGen/X86/inline-asm-x-scalar.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=yonah -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=yonah -no-integrated-as
define void @test1() {
tail call void asm sideeffect "ucomiss $0", "x"( float 0x41E0000000000000)
diff --git a/llvm/test/CodeGen/X86/inline-asm.ll b/llvm/test/CodeGen/X86/inline-asm.ll
index adf331b8eb7f7..253080cd8da77 100644
--- a/llvm/test/CodeGen/X86/inline-asm.ll
+++ b/llvm/test/CodeGen/X86/inline-asm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -no-integrated-as
define i32 @test1() nounwind {
; Dest is AX, dest type = i32.
diff --git a/llvm/test/CodeGen/X86/inline-spiller-impdef-on-implicit-def-regression.ll b/llvm/test/CodeGen/X86/inline-spiller-impdef-on-implicit-def-regression.ll
index f42c2f8f14476..9bd37d0b8e9d1 100644
--- a/llvm/test/CodeGen/X86/inline-spiller-impdef-on-implicit-def-regression.ll
+++ b/llvm/test/CodeGen/X86/inline-spiller-impdef-on-implicit-def-regression.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
; Make sure there's no assert on an implicit-def with implicit operands
; during register allocation.
diff --git a/llvm/test/CodeGen/X86/inline-sse.ll b/llvm/test/CodeGen/X86/inline-sse.ll
index 87aa882a1f498..75c2948e6949c 100644
--- a/llvm/test/CodeGen/X86/inline-sse.ll
+++ b/llvm/test/CodeGen/X86/inline-sse.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
; PR16133 - we must treat XMM registers as v4f32 as SSE1 targets don't permit other vector types.
diff --git a/llvm/test/CodeGen/X86/inlineasm-sched-bug.ll b/llvm/test/CodeGen/X86/inlineasm-sched-bug.ll
index be4d1c29332f7..29f8f11c4761f 100644
--- a/llvm/test/CodeGen/X86/inlineasm-sched-bug.ll
+++ b/llvm/test/CodeGen/X86/inlineasm-sched-bug.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
; PR13504
-; RUN: llc -mtriple=i686-- -mcpu=atom < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -mcpu=atom < %s | FileCheck %s
; Check that treemap is read before the asm statement.
define i32 @foo(i32 %treemap) nounwind {
diff --git a/llvm/test/CodeGen/X86/innermost-loop-alignment.ll b/llvm/test/CodeGen/X86/innermost-loop-alignment.ll
index 482c8141b97ba..df1ff8dbe6192 100644
--- a/llvm/test/CodeGen/X86/innermost-loop-alignment.ll
+++ b/llvm/test/CodeGen/X86/innermost-loop-alignment.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s -check-prefix=DEFAULT
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -x86-experimental-pref-innermost-loop-alignment=5 | FileCheck %s -check-prefix=ALIGN32
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -align-loops=32 -x86-experimental-pref-innermost-loop-alignment=6 | FileCheck %s -check-prefix=ALIGN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu | FileCheck %s -check-prefix=DEFAULT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -x86-experimental-pref-innermost-loop-alignment=5 | FileCheck %s -check-prefix=ALIGN32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -align-loops=32 -x86-experimental-pref-innermost-loop-alignment=6 | FileCheck %s -check-prefix=ALIGN64
declare void @foo()
diff --git a/llvm/test/CodeGen/X86/inreg.ll b/llvm/test/CodeGen/X86/inreg.ll
index 4937c5c0e3f7f..f476188239108 100644
--- a/llvm/test/CodeGen/X86/inreg.ll
+++ b/llvm/test/CodeGen/X86/inreg.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-pc-linux -mcpu=corei7 | FileCheck --check-prefix=DAG %s
-; RUN: llc < %s -mtriple=i686-pc-linux -mcpu=corei7 -O0 | FileCheck --check-prefix=FAST %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux -mcpu=corei7 | FileCheck --check-prefix=DAG %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux -mcpu=corei7 -O0 | FileCheck --check-prefix=FAST %s
%struct.s1 = type { double, float }
diff --git a/llvm/test/CodeGen/X86/ins_split_regalloc.ll b/llvm/test/CodeGen/X86/ins_split_regalloc.ll
index 83e6da5c5a071..e4e3180674b69 100644
--- a/llvm/test/CodeGen/X86/ins_split_regalloc.ll
+++ b/llvm/test/CodeGen/X86/ins_split_regalloc.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O1 -regalloc=greedy -mtriple=x86_64-apple-macosx < %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O1 -regalloc=greedy -mtriple=x86_64-apple-macosx < %s -o - | FileCheck %s
; Check that last chance split (RAGreedy::tryInstructonSplit) just split
; when this is beneficial, otherwise we end up with uncoalesced copies.
; <rdar://problem/15570057>
diff --git a/llvm/test/CodeGen/X86/ins_subreg_coalesce-1.ll b/llvm/test/CodeGen/X86/ins_subreg_coalesce-1.ll
index 64c79b1eba87e..98a0c77fe8257 100644
--- a/llvm/test/CodeGen/X86/ins_subreg_coalesce-1.ll
+++ b/llvm/test/CodeGen/X86/ins_subreg_coalesce-1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=-bmi | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-bmi | FileCheck %s
; TODO: This might not be testing the original issue anymore? Should the movl still be removed?
define fastcc i32 @t() nounwind {
diff --git a/llvm/test/CodeGen/X86/ins_subreg_coalesce-2.ll b/llvm/test/CodeGen/X86/ins_subreg_coalesce-2.ll
index 1866796c7c8c0..395bd3de98424 100644
--- a/llvm/test/CodeGen/X86/ins_subreg_coalesce-2.ll
+++ b/llvm/test/CodeGen/X86/ins_subreg_coalesce-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define i16 @test5(i16 %f12) nounwind {
; CHECK-LABEL: test5:
diff --git a/llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll b/llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll
index eccb32346a403..92b8407980c5c 100644
--- a/llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll
+++ b/llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -disable-cgp-delete-phis | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -disable-cgp-delete-phis | FileCheck %s
%struct.COMPOSITE = type { i8, i16, i16 }
%struct.FILE = type { ptr, i32, i32, i16, i16, %struct.__sbuf, i32, ptr, ptr, ptr, ptr, ptr, %struct.__sbuf, ptr, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 }
diff --git a/llvm/test/CodeGen/X86/insert-into-constant-vector.ll b/llvm/test/CodeGen/X86/insert-into-constant-vector.ll
index c44945ac2d929..c4f234c12e5dc 100644
--- a/llvm/test/CodeGen/X86/insert-into-constant-vector.ll
+++ b/llvm/test/CodeGen/X86/insert-into-constant-vector.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE,X86-SSE2
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE2
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=X86-SSE,X86-SSE4
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE4
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86-AVX,X86-AVX1
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64-AVX,X64-AVX1
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X86-AVX,X86-AVX2
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X64-AVX,X64-AVX2
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=X86-AVX,X86-AVX512F
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=X64-AVX,X64-AVX512F
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE2
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=X86-SSE,X86-SSE4
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE4
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86-AVX,X86-AVX1
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64-AVX,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X86-AVX,X86-AVX2
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X64-AVX,X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=X86-AVX,X86-AVX512F
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=X64-AVX,X64-AVX512F
define <16 x i8> @elt0_v16i8(i8 %x) {
; X86-SSE2-LABEL: elt0_v16i8:
diff --git a/llvm/test/CodeGen/X86/insert-into-vector-through-stack-no-stack-realign.ll b/llvm/test/CodeGen/X86/insert-into-vector-through-stack-no-stack-realign.ll
index 8006263762152..faae82fc64225 100644
--- a/llvm/test/CodeGen/X86/insert-into-vector-through-stack-no-stack-realign.ll
+++ b/llvm/test/CodeGen/X86/insert-into-vector-through-stack-no-stack-realign.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s
define <8 x i32> @foo(<8 x i32> %arg1, i32 %n) #0 {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/insert-loaded-scalar.ll b/llvm/test/CodeGen/X86/insert-loaded-scalar.ll
index 32e6b36eda50f..7af8f72e41d4c 100644
--- a/llvm/test/CodeGen/X86/insert-loaded-scalar.ll
+++ b/llvm/test/CodeGen/X86/insert-loaded-scalar.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
define <16 x i8> @load8_ins_elt0_v16i8(ptr %p) nounwind {
; SSE-LABEL: load8_ins_elt0_v16i8:
diff --git a/llvm/test/CodeGen/X86/insert-positions.ll b/llvm/test/CodeGen/X86/insert-positions.ll
index dab2b51a60852..a9be785804404 100644
--- a/llvm/test/CodeGen/X86/insert-positions.ll
+++ b/llvm/test/CodeGen/X86/insert-positions.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- >/dev/null
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- >/dev/null
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
diff --git a/llvm/test/CodeGen/X86/insert-subvector-broadcast.ll b/llvm/test/CodeGen/X86/insert-subvector-broadcast.ll
index 0717a01ac2abc..061c1ef2f2190 100644
--- a/llvm/test/CodeGen/X86/insert-subvector-broadcast.ll
+++ b/llvm/test/CodeGen/X86/insert-subvector-broadcast.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=skx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=skx | FileCheck %s
define void @insert_subvector_broadcast_as_blend() {
; CHECK-LABEL: insert_subvector_broadcast_as_blend:
diff --git a/llvm/test/CodeGen/X86/insert.ll b/llvm/test/CodeGen/X86/insert.ll
index 381de2ecaa164..ac1afd520f14f 100644
--- a/llvm/test/CodeGen/X86/insert.ll
+++ b/llvm/test/CodeGen/X86/insert.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=i386-unknown-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
define i64 @sub8(i64 noundef %res, ptr %byte) {
; X86-LABEL: sub8:
diff --git a/llvm/test/CodeGen/X86/insertelement-copytoregs.ll b/llvm/test/CodeGen/X86/insertelement-copytoregs.ll
index aabf412011f94..c5040c0cce559 100644
--- a/llvm/test/CodeGen/X86/insertelement-copytoregs.ll
+++ b/llvm/test/CodeGen/X86/insertelement-copytoregs.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --implicit-check-not IMPLICIT_DEF
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --implicit-check-not IMPLICIT_DEF
define void @foo(ptr %p) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/insertelement-duplicates.ll b/llvm/test/CodeGen/X86/insertelement-duplicates.ll
index 435ea61412b73..01ba13afde151 100644
--- a/llvm/test/CodeGen/X86/insertelement-duplicates.ll
+++ b/llvm/test/CodeGen/X86/insertelement-duplicates.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX-64
define void @PR15298(ptr nocapture %source, ptr nocapture %dest) nounwind noinline {
; SSE-32-LABEL: PR15298:
diff --git a/llvm/test/CodeGen/X86/insertelement-legalize.ll b/llvm/test/CodeGen/X86/insertelement-legalize.ll
index 67f824ff8412d..859500e331df6 100644
--- a/llvm/test/CodeGen/X86/insertelement-legalize.ll
+++ b/llvm/test/CodeGen/X86/insertelement-legalize.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; Test to check that we properly legalize an insert vector element
define void @test(<2 x i64> %val, ptr %dst, i64 %x) nounwind {
diff --git a/llvm/test/CodeGen/X86/insertelement-shuffle.ll b/llvm/test/CodeGen/X86/insertelement-shuffle.ll
index e2defdc370543..5359883c00376 100644
--- a/llvm/test/CodeGen/X86/insertelement-shuffle.ll
+++ b/llvm/test/CodeGen/X86/insertelement-shuffle.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=X86,X86_AVX256
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=X64,X64_AVX256
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86_AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64,X64_AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=X86,X86_AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=X64,X64_AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86_AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64,X64_AVX512
define <8 x float> @insert_subvector_256(i16 %x0, i16 %x1, <8 x float> %v) nounwind {
; X86-LABEL: insert_subvector_256:
diff --git a/llvm/test/CodeGen/X86/insertps-O0-bug.ll b/llvm/test/CodeGen/X86/insertps-O0-bug.ll
index ca518325ee57a..f69c211cdefce 100644
--- a/llvm/test/CodeGen/X86/insertps-O0-bug.ll
+++ b/llvm/test/CodeGen/X86/insertps-O0-bug.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 -O0 < %s | FileCheck %s
; Check that at -O0, the backend doesn't attempt to canonicalize a vector load
; used by an INSERTPS into a scalar load plus scalar_to_vector.
diff --git a/llvm/test/CodeGen/X86/insertps-combine.ll b/llvm/test/CodeGen/X86/insertps-combine.ll
index 18edc83b7edcf..4970185433544 100644
--- a/llvm/test/CodeGen/X86/insertps-combine.ll
+++ b/llvm/test/CodeGen/X86/insertps-combine.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_mem_shuffle
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX
define <4 x float> @shuffle_v4f32_0z27(<4 x float> %x, <4 x float> %a) {
; SSE-LABEL: shuffle_v4f32_0z27:
diff --git a/llvm/test/CodeGen/X86/insertps-from-constantpool.ll b/llvm/test/CodeGen/X86/insertps-from-constantpool.ll
index f03df634dc1de..be9694cf88feb 100644
--- a/llvm/test/CodeGen/X86/insertps-from-constantpool.ll
+++ b/llvm/test/CodeGen/X86/insertps-from-constantpool.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_mem_shuffle --version 4
-; RUN: llc -mtriple=i686-unknown-unknown -mattr=+sse4.1 < %s | FileCheck %s --check-prefix=X86
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown -mattr=+sse4.1 < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 < %s | FileCheck %s --check-prefix=X64
; Test for case where insertps folds the load of an insertion element from a constant pool.
diff --git a/llvm/test/CodeGen/X86/insertps-unfold-load-bug.ll b/llvm/test/CodeGen/X86/insertps-unfold-load-bug.ll
index 93b60c27255f3..364f77403dca4 100644
--- a/llvm/test/CodeGen/X86/insertps-unfold-load-bug.ll
+++ b/llvm/test/CodeGen/X86/insertps-unfold-load-bug.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i686-unknown-unknown -mattr=+sse4.1 < %s | FileCheck %s -check-prefix=X32
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 < %s | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown -mattr=+sse4.1 < %s | FileCheck %s -check-prefix=X32
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 < %s | FileCheck %s -check-prefix=X64
; Test for case where insertps was folding the load of the insertion element, but a later optimization
; was then manipulating the load.
diff --git a/llvm/test/CodeGen/X86/instrument-function-inlined.ll b/llvm/test/CodeGen/X86/instrument-function-inlined.ll
index 5255639a511b0..8561014c9f418 100644
--- a/llvm/test/CodeGen/X86/instrument-function-inlined.ll
+++ b/llvm/test/CodeGen/X86/instrument-function-inlined.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=x86_64-- -O0 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-- -O1 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-- -O2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O1 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O2 < %s | FileCheck %s
; The codegen should insert post-inlining instrumentation calls and should not
; insert pre-inlining instrumentation.
diff --git a/llvm/test/CodeGen/X86/int-intrinsic.ll b/llvm/test/CodeGen/X86/int-intrinsic.ll
index ca7ceb24b4248..a3bdbeb733249 100644
--- a/llvm/test/CodeGen/X86/int-intrinsic.ll
+++ b/llvm/test/CodeGen/X86/int-intrinsic.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
declare void @llvm.x86.int(i8) nounwind
diff --git a/llvm/test/CodeGen/X86/int-to-fp-demanded.ll b/llvm/test/CodeGen/X86/int-to-fp-demanded.ll
index 54e4db33e5f22..9599b5d979be8 100644
--- a/llvm/test/CodeGen/X86/int-to-fp-demanded.ll
+++ b/llvm/test/CodeGen/X86/int-to-fp-demanded.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
declare void @use.i1(i1)
declare void @use.i32(i32)
diff --git a/llvm/test/CodeGen/X86/int8-to-fp.ll b/llvm/test/CodeGen/X86/int8-to-fp.ll
index 72c3e94832d91..d7db22223eee4 100644
--- a/llvm/test/CodeGen/X86/int8-to-fp.ll
+++ b/llvm/test/CodeGen/X86/int8-to-fp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-macosx -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-macosx -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx -mattr=+sse2 | FileCheck %s --check-prefix=X64
; We get this right for x86-64, but on x86-32 the code is less optimal.
; See: https://github.com/llvm/llvm-project/issues/64174
diff --git a/llvm/test/CodeGen/X86/interleave-load-fold.ll b/llvm/test/CodeGen/X86/interleave-load-fold.ll
index e2430ff5e1c03..e8982d89b969d 100644
--- a/llvm/test/CodeGen/X86/interleave-load-fold.ll
+++ b/llvm/test/CodeGen/X86/interleave-load-fold.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -mtriple=x86_64-unknown-unknown -O2 -mcpu=skylake-avx512 < %s -o - | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -O2 -mcpu=skylake-avx512 < %s -o - | FileCheck %s --check-prefixes=X64
define <16 x i8> @interleave_masked_select(ptr %mask, ptr %src) nounwind {
; X64-LABEL: interleave_masked_select:
diff --git a/llvm/test/CodeGen/X86/intersect-fma-fmf.ll b/llvm/test/CodeGen/X86/intersect-fma-fmf.ll
index 601b4c4541875..ca72d03b93ed9 100644
--- a/llvm/test/CodeGen/X86/intersect-fma-fmf.ll
+++ b/llvm/test/CodeGen/X86/intersect-fma-fmf.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-unknown -mattr=+avx512f < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown -mattr=+avx512f < %s | FileCheck %s
define float @test_x86_fma_intersection_fmf(float %a, float %b) nounwind {
; CHECK-LABEL: test_x86_fma_intersection_fmf:
diff --git a/llvm/test/CodeGen/X86/interval-update-remat.ll b/llvm/test/CodeGen/X86/interval-update-remat.ll
index 91fde2ba018b8..46778a240cf9e 100644
--- a/llvm/test/CodeGen/X86/interval-update-remat.ll
+++ b/llvm/test/CodeGen/X86/interval-update-remat.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-regalloc -verify-machineinstrs < %s
+; RUN: llc -combiner-topological-sorting -verify-regalloc -verify-machineinstrs < %s
; PR27275: When enabling remat for vreg defined by PHIs, make sure the update
; of the live range removes dead phi. Otherwise, we may end up with PHIs with
; incorrect operands and that will trigger assertions or verifier failures
diff --git a/llvm/test/CodeGen/X86/intrinsic-cttz-elts.ll b/llvm/test/CodeGen/X86/intrinsic-cttz-elts.ll
index 7c124324302c5..c6191d06115c6 100644
--- a/llvm/test/CodeGen/X86/intrinsic-cttz-elts.ll
+++ b/llvm/test/CodeGen/X86/intrinsic-cttz-elts.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
define i8 @ctz_v8i16(<8 x i16> %a) {
; CHECK-LABEL: .LCPI0_0:
diff --git a/llvm/test/CodeGen/X86/invalid-operand-bundle-call.ll b/llvm/test/CodeGen/X86/invalid-operand-bundle-call.ll
index 17065a4a61c2c..b0ddc685a8daa 100644
--- a/llvm/test/CodeGen/X86/invalid-operand-bundle-call.ll
+++ b/llvm/test/CodeGen/X86/invalid-operand-bundle-call.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=x86_64-unknown-linux-gnu < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: cannot lower calls with arbitrary operand bundles: foo, bar, baz
diff --git a/llvm/test/CodeGen/X86/invalid-operand-bundle-callbr.ll b/llvm/test/CodeGen/X86/invalid-operand-bundle-callbr.ll
index 79bddc0755415..d0e09cb867622 100644
--- a/llvm/test/CodeGen/X86/invalid-operand-bundle-callbr.ll
+++ b/llvm/test/CodeGen/X86/invalid-operand-bundle-callbr.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=x86_64-unknown-linux-gnu < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: cannot lower callbrs with arbitrary operand bundles: foo
diff --git a/llvm/test/CodeGen/X86/invalid-operand-bundle-invoke.ll b/llvm/test/CodeGen/X86/invalid-operand-bundle-invoke.ll
index 1da41aeab68b9..ca025536bb212 100644
--- a/llvm/test/CodeGen/X86/invalid-operand-bundle-invoke.ll
+++ b/llvm/test/CodeGen/X86/invalid-operand-bundle-invoke.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=x86_64-unknown-linux-gnu < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: cannot lower invokes with arbitrary operand bundles: foo
diff --git a/llvm/test/CodeGen/X86/invalid-shift-immediate.ll b/llvm/test/CodeGen/X86/invalid-shift-immediate.ll
index 32100c0206fc1..f6323335f1d4e 100644
--- a/llvm/test/CodeGen/X86/invalid-shift-immediate.ll
+++ b/llvm/test/CodeGen/X86/invalid-shift-immediate.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR2098
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/invpcid-intrinsic.ll b/llvm/test/CodeGen/X86/invpcid-intrinsic.ll
index 66f7855239c06..c9bfd4ac0ffdc 100644
--- a/llvm/test/CodeGen/X86/invpcid-intrinsic.ll
+++ b/llvm/test/CodeGen/X86/invpcid-intrinsic.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+invpcid | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+invpcid --show-mc-encoding | FileCheck %s --check-prefix=X86_64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+invpcid,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+invpcid | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+invpcid --show-mc-encoding | FileCheck %s --check-prefix=X86_64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+invpcid,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
define void @test_invpcid(i32 %type, ptr %descriptor) {
; X86-LABEL: test_invpcid:
diff --git a/llvm/test/CodeGen/X86/ipra-inline-asm.ll b/llvm/test/CodeGen/X86/ipra-inline-asm.ll
index 09b8bdd790091..2c15e39987735 100644
--- a/llvm/test/CodeGen/X86/ipra-inline-asm.ll
+++ b/llvm/test/CodeGen/X86/ipra-inline-asm.ll
@@ -1,7 +1,7 @@
-; RUN: llc -enable-ipra -print-regusage -o /dev/null 2>&1 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -enable-ipra -print-regusage -o /dev/null 2>&1 < %s | FileCheck %s
-; RUN: llc --stop-after=prologepilog -o - %s \
-; RUN: | llc -x=mir -enable-ipra -passes="module(require<reg-usage>,function(machine-function(reg-usage-collector)),print<reg-usage>)" -o /dev/null 2>&1 \
+; RUN: llc -combiner-topological-sorting --stop-after=prologepilog -o - %s \
+; RUN: | llc -combiner-topological-sorting -x=mir -enable-ipra -passes="module(require<reg-usage>,function(machine-function(reg-usage-collector)),print<reg-usage>)" -o /dev/null 2>&1 \
; RUN: | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/ipra-local-linkage-2.ll b/llvm/test/CodeGen/X86/ipra-local-linkage-2.ll
index 05d3f70820fb0..b536f5bbb6396 100644
--- a/llvm/test/CodeGen/X86/ipra-local-linkage-2.ll
+++ b/llvm/test/CodeGen/X86/ipra-local-linkage-2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc --mtriple=x86_64-- < %s | FileCheck --check-prefix=X64 %s
-; RUN: llc --mtriple=i386-- < %s | FileCheck --check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting --mtriple=x86_64-- < %s | FileCheck --check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting --mtriple=i386-- < %s | FileCheck --check-prefix=X86 %s
; This test is to ensure rbp/rbx/ebp/esi is correctly saved/restored before clobbered when enable ipra.
diff --git a/llvm/test/CodeGen/X86/ipra-local-linkage.ll b/llvm/test/CodeGen/X86/ipra-local-linkage.ll
index 787b16f0d5b35..c31b719e2f688 100644
--- a/llvm/test/CodeGen/X86/ipra-local-linkage.ll
+++ b/llvm/test/CodeGen/X86/ipra-local-linkage.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s | FileCheck %s -check-prefix=NOIPRA
-; RUN: llc -enable-ipra < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s -check-prefix=NOIPRA
+; RUN: llc -combiner-topological-sorting -enable-ipra < %s | FileCheck %s
target triple = "x86_64--"
diff --git a/llvm/test/CodeGen/X86/ipra-reg-alias.ll b/llvm/test/CodeGen/X86/ipra-reg-alias.ll
index 29b2111bf34ac..f17e1ee92976a 100644
--- a/llvm/test/CodeGen/X86/ipra-reg-alias.ll
+++ b/llvm/test/CodeGen/X86/ipra-reg-alias.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-- -enable-ipra -o - < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -enable-ipra -o - < %s | FileCheck %s
define i8 @main(i8 %X) {
; CHECK-LABEL: main:
diff --git a/llvm/test/CodeGen/X86/ipra-reg-usage.ll b/llvm/test/CodeGen/X86/ipra-reg-usage.ll
index f270f8fc741aa..7bde00373095b 100644
--- a/llvm/test/CodeGen/X86/ipra-reg-usage.ll
+++ b/llvm/test/CodeGen/X86/ipra-reg-usage.ll
@@ -1,7 +1,7 @@
-; RUN: llc -enable-ipra -print-regusage -o /dev/null 2>&1 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -enable-ipra -print-regusage -o /dev/null 2>&1 < %s | FileCheck %s
-; RUN: llc -stop-after=prologepilog -o - %s \
-; RUN: | llc -x=mir -enable-ipra -passes="module(require<reg-usage>,function(machine-function(reg-usage-collector)),print<reg-usage>)" -o /dev/null 2>&1 \
+; RUN: llc -combiner-topological-sorting -stop-after=prologepilog -o - %s \
+; RUN: | llc -combiner-topological-sorting -x=mir -enable-ipra -passes="module(require<reg-usage>,function(machine-function(reg-usage-collector)),print<reg-usage>)" -o /dev/null 2>&1 \
; RUN: | FileCheck %s
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/ipra-transform.ll b/llvm/test/CodeGen/X86/ipra-transform.ll
index fc94865c4d29a..8b95edbd207d5 100644
--- a/llvm/test/CodeGen/X86/ipra-transform.ll
+++ b/llvm/test/CodeGen/X86/ipra-transform.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s | FileCheck %s -check-prefix=NOIPRA
-; RUN: llc -enable-ipra < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s -check-prefix=NOIPRA
+; RUN: llc -combiner-topological-sorting -enable-ipra < %s | FileCheck %s
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/isel-and.ll b/llvm/test/CodeGen/X86/isel-and.ll
index 3fda0e1d86391..465f5f6a0b093 100644
--- a/llvm/test/CodeGen/X86/isel-and.ll
+++ b/llvm/test/CodeGen/X86/isel-and.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=i686-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86
-; RUN: llc < %s -mtriple=i686-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,SDAG-X64
-; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
-; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,GISEL-X64
define i1 @and_i1(i1 %a, i1 %b) {
; SDAG-X86-LABEL: and_i1:
diff --git a/llvm/test/CodeGen/X86/isel-arg-attrs.ll b/llvm/test/CodeGen/X86/isel-arg-attrs.ll
index 3afee76715d6d..2dd08c6ad3bb1 100644
--- a/llvm/test/CodeGen/X86/isel-arg-attrs.ll
+++ b/llvm/test/CodeGen/X86/isel-arg-attrs.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64
; The src array should be in R10 or ECX register due to nest attribute
define i32 @nest_arg(ptr nest %src) {
diff --git a/llvm/test/CodeGen/X86/isel-blendi-gettargetconstant.ll b/llvm/test/CodeGen/X86/isel-blendi-gettargetconstant.ll
index fb7efc2200c67..39b2c0d59c6dc 100644
--- a/llvm/test/CodeGen/X86/isel-blendi-gettargetconstant.ll
+++ b/llvm/test/CodeGen/X86/isel-blendi-gettargetconstant.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mattr=sse4.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mattr=sse4.2 | FileCheck %s
define void @csrot_(ptr %0) {
; CHECK-LABEL: csrot_:
diff --git a/llvm/test/CodeGen/X86/isel-br.ll b/llvm/test/CodeGen/X86/isel-br.ll
index 5388c89e18199..8431c2cc98690 100644
--- a/llvm/test/CodeGen/X86/isel-br.ll
+++ b/llvm/test/CodeGen/X86/isel-br.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -O0 -mtriple=i686-linux-gnu -global-isel=0 -verify-machineinstrs | FileCheck %s --check-prefix=DAG
-; RUN: llc < %s -O0 -mtriple=i686-linux-gnu -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=DAG
-; RUN: llc < %s -O0 -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 -verify-machineinstrs | FileCheck %s --check-prefix=GISEL
-; RUN: llc < %s -O0 -mtriple=x86_64-linux-gnu -global-isel=0 | FileCheck %s --check-prefix=DAG
-; RUN: llc < %s -O0 -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=DAG
-; RUN: llc < %s -O0 -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=GISEL
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=i686-linux-gnu -global-isel=0 -verify-machineinstrs | FileCheck %s --check-prefix=DAG
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=i686-linux-gnu -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=DAG
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 -verify-machineinstrs | FileCheck %s --check-prefix=GISEL
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-linux-gnu -global-isel=0 | FileCheck %s --check-prefix=DAG
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=DAG
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=GISEL
define void @uncondbr() {
; DAG-LABEL: uncondbr:
diff --git a/llvm/test/CodeGen/X86/isel-brcond-fcmp.ll b/llvm/test/CodeGen/X86/isel-brcond-fcmp.ll
index c08b85488ff49..13f086403f436 100644
--- a/llvm/test/CodeGen/X86/isel-brcond-fcmp.ll
+++ b/llvm/test/CodeGen/X86/isel-brcond-fcmp.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -global-isel=0 -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=X64,SDAG-X64
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel=0 -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=GISEL-X64
define i32 @fcmp_oeq(float %x, float %y) {
; X64-LABEL: fcmp_oeq:
diff --git a/llvm/test/CodeGen/X86/isel-brcond-icmp.ll b/llvm/test/CodeGen/X86/isel-brcond-icmp.ll
index 675ae02d79ba2..2e727b5486749 100644
--- a/llvm/test/CodeGen/X86/isel-brcond-icmp.ll
+++ b/llvm/test/CodeGen/X86/isel-brcond-icmp.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -global-isel=0 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=X64,SDAG
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=X64,FASTISEL
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s -global-isel=0 -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=X86,SDAG,SDAG-X86
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=X86,FASTISEL,FASTISEL-X86
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -global-isel=0 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=X64,SDAG
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=X64,FASTISEL
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel=0 -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=X86,SDAG,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=X86,FASTISEL,FASTISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X86
define i32 @icmp_eq_2(i32 %x, i32 %y) {
; X64-LABEL: icmp_eq_2:
diff --git a/llvm/test/CodeGen/X86/isel-buildvector-avx.ll b/llvm/test/CodeGen/X86/isel-buildvector-avx.ll
index a9297f016521d..57cc8f110b514 100644
--- a/llvm/test/CodeGen/X86/isel-buildvector-avx.ll
+++ b/llvm/test/CodeGen/X86/isel-buildvector-avx.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx %s -o - | FileCheck %s --check-prefixes AVX-ALL,AVX
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -fast-isel %s -o - | FileCheck %s --check-prefixes AVX-ALL,AVX
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -global-isel -global-isel-abort=1 %s -o - | FileCheck %s --check-prefixes AVX-ALL,AVX
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f %s -o - | FileCheck %s --check-prefixes AVX-ALL,AVX512
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -fast-isel %s -o - | FileCheck %s --check-prefixes AVX-ALL,AVX512
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -global-isel -global-isel-abort=1 %s -o - | FileCheck %s --check-prefixes AVX-ALL,AVX512
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+avx %s -o - | FileCheck %s --check-prefixes AVX-ALL,AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+avx -fast-isel %s -o - | FileCheck %s --check-prefixes AVX-ALL,AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+avx -global-isel -global-isel-abort=1 %s -o - | FileCheck %s --check-prefixes AVX-ALL,AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+avx512f %s -o - | FileCheck %s --check-prefixes AVX-ALL,AVX512
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+avx512f -fast-isel %s -o - | FileCheck %s --check-prefixes AVX-ALL,AVX512
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+avx512f -global-isel -global-isel-abort=1 %s -o - | FileCheck %s --check-prefixes AVX-ALL,AVX512
;
; 256 bit vectors
diff --git a/llvm/test/CodeGen/X86/isel-buildvector-sse.ll b/llvm/test/CodeGen/X86/isel-buildvector-sse.ll
index 7f53e36188ec3..238304803a463 100644
--- a/llvm/test/CodeGen/X86/isel-buildvector-sse.ll
+++ b/llvm/test/CodeGen/X86/isel-buildvector-sse.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse,-sse2 %s -o - | FileCheck %s --check-prefixes SSE-X64
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse,-sse2 -fast-isel %s -o - | FileCheck %s --check-prefixes SSE-X64
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+sse,-sse2 -global-isel -global-isel-abort=1 %s -o - | FileCheck %s --check-prefixes SSE-X64-GISEL
-; RUN: llc -mtriple=i686-linux-gnu -mattr=+sse,-sse2 %s -o - | FileCheck %s --check-prefixes SSE-X86
-; RUN: llc -mtriple=i686-linux-gnu -mattr=+sse,-sse2 -fast-isel %s -o - | FileCheck %s --check-prefixes SSE-X86
-; RUN: llc -mtriple=i686-linux-gnu -mattr=+sse,-sse2 -global-isel -global-isel-abort=1 %s -o - | FileCheck %s --check-prefixes SSE-X86-GISEL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+sse,-sse2 %s -o - | FileCheck %s --check-prefixes SSE-X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+sse,-sse2 -fast-isel %s -o - | FileCheck %s --check-prefixes SSE-X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+sse,-sse2 -global-isel -global-isel-abort=1 %s -o - | FileCheck %s --check-prefixes SSE-X64-GISEL
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-gnu -mattr=+sse,-sse2 %s -o - | FileCheck %s --check-prefixes SSE-X86
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-gnu -mattr=+sse,-sse2 -fast-isel %s -o - | FileCheck %s --check-prefixes SSE-X86
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-gnu -mattr=+sse,-sse2 -global-isel -global-isel-abort=1 %s -o - | FileCheck %s --check-prefixes SSE-X86-GISEL
define <8 x i32> @test_vector_v8i32() {
; SSE-X64-LABEL: test_vector_v8i32:
diff --git a/llvm/test/CodeGen/X86/isel-ceil.ll b/llvm/test/CodeGen/X86/isel-ceil.ll
index 5721752331b5e..e0fc6d47646e5 100644
--- a/llvm/test/CodeGen/X86/isel-ceil.ll
+++ b/llvm/test/CodeGen/X86/isel-ceil.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
define float @ceil_f32(float %a) nounwind readnone {
; DAG-X64-LABEL: ceil_f32:
diff --git a/llvm/test/CodeGen/X86/isel-extract-subvector-non-pow2-elems.ll b/llvm/test/CodeGen/X86/isel-extract-subvector-non-pow2-elems.ll
index d699b1a182845..60b813525a148 100644
--- a/llvm/test/CodeGen/X86/isel-extract-subvector-non-pow2-elems.ll
+++ b/llvm/test/CodeGen/X86/isel-extract-subvector-non-pow2-elems.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; Ensure assertion is not hit when folding concat of two contiguous extract_subvector operations
; from a source with a non-power-of-two vector length.
-; RUN: llc -mtriple=x86_64 -mattr=+avx2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -mattr=+avx2 < %s | FileCheck %s
define void @foo(ptr %pDst) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/isel-fabs-x87.ll b/llvm/test/CodeGen/X86/isel-fabs-x87.ll
index 1ea92a6bef06f..9b61b64e8c2ed 100644
--- a/llvm/test/CodeGen/X86/isel-fabs-x87.ll
+++ b/llvm/test/CodeGen/X86/isel-fabs-x87.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X64,SDAG-X64-ISEL
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -fast-isel | FileCheck %s --check-prefixes=X64,FAST-X64-ISEL
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,GISEL-X64-ISEL
-; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86,SDAG-X86-ISEL
-; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel | FileCheck %s --check-prefixes=X86,FAST-X86-ISEL
-; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=0 | FileCheck %s --check-prefixes=X86,GISEL-X86-ISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X64,SDAG-X64-ISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -fast-isel | FileCheck %s --check-prefixes=X64,FAST-X64-ISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,GISEL-X64-ISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse | FileCheck %s --check-prefixes=X86,SDAG-X86-ISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -fast-isel | FileCheck %s --check-prefixes=X86,FAST-X86-ISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+x87,-sse2,-sse -global-isel -global-isel-abort=0 | FileCheck %s --check-prefixes=X86,GISEL-X86-ISEL
define void @test_float_abs(ptr %argptr) {
; SDAG-X64-ISEL-LABEL: test_float_abs:
diff --git a/llvm/test/CodeGen/X86/isel-fabs.ll b/llvm/test/CodeGen/X86/isel-fabs.ll
index c2d29248e49ba..526a0b1099ef6 100644
--- a/llvm/test/CodeGen/X86/isel-fabs.ll
+++ b/llvm/test/CodeGen/X86/isel-fabs.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,+sse,+sse2 | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,+sse,+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,+sse,+sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse,+sse2 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse,+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86
-; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse,+sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-x87,+sse,+sse2 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-x87,+sse,+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-x87,+sse,+sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-x87,+sse,+sse2 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-x87,+sse,+sse2 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=FASTISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-x87,+sse,+sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
define float @test_float_abs(float %arg) nounwind {
; X64-LABEL: test_float_abs:
diff --git a/llvm/test/CodeGen/X86/isel-fcmp-x87.ll b/llvm/test/CodeGen/X86/isel-fcmp-x87.ll
index 84c9750bc326d..60815a4dfe1a7 100644
--- a/llvm/test/CodeGen/X86/isel-fcmp-x87.ll
+++ b/llvm/test/CodeGen/X86/isel-fcmp-x87.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mattr=+x87,-sse,-sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=X64,SDAG-X64
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=+x87,-sse,-sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=X64,FAST-X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=+x87,-sse,-sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s -mtriple=i686-apple-darwin10 -mattr=+x87,-sse,-sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -mattr=+x87,-sse,-sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=+x87,-sse,-sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=X64,FAST-X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=+x87,-sse,-sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin10 -mattr=+x87,-sse,-sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=X86,SDAG-X86
; Allow fast-isel to fallback to selection dag on x86
-; RUN: llc < %s -fast-isel -mtriple=i686-apple-darwin10 -mattr=+x87,-sse,-sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=X86,FAST-X86
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 -mattr=+x87,-sse,-sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i686-apple-darwin10 -mattr=+x87,-sse,-sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=X86,FAST-X86
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 -mattr=+x87,-sse,-sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X86
define i1 @fcmp_x86_fp80_oeq(x86_fp80 %x, x86_fp80 %y) nounwind {
; X64-LABEL: fcmp_x86_fp80_oeq:
diff --git a/llvm/test/CodeGen/X86/isel-fcmp.ll b/llvm/test/CodeGen/X86/isel-fcmp.ll
index 4a223aaa4149b..c67c8b520165a 100644
--- a/llvm/test/CodeGen/X86/isel-fcmp.ll
+++ b/llvm/test/CodeGen/X86/isel-fcmp.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mattr=+sse,+sse2,-x87 -verify-machineinstrs | FileCheck %s --check-prefixes=X64,SDAG-X64
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=+sse,+sse2,-x87 -verify-machineinstrs | FileCheck %s --check-prefixes=X64,FAST-X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=+sse,+sse2,-x87 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -mattr=+sse,+sse2,-x87 -verify-machineinstrs | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=+sse,+sse2,-x87 -verify-machineinstrs | FileCheck %s --check-prefixes=X64,FAST-X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 -mattr=+sse,+sse2,-x87 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X64
; i686 with 64 bit store is issue.
-; RUN: llc < %s -mtriple=i686-apple-darwin10 -mattr=-sse,-sse2,+x87 -verify-machineinstrs | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin10 -mattr=-sse,-sse2,+x87 -verify-machineinstrs | FileCheck %s --check-prefixes=X86,SDAG-X86
; Allow fast-isel to fallback to selection dag on x86
-; RUN: llc < %s -fast-isel -mtriple=i686-apple-darwin10 -mattr=-sse,-sse2,+x87 -verify-machineinstrs | FileCheck %s --check-prefixes=X86,FAST-X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i686-apple-darwin10 -mattr=-sse,-sse2,+x87 -verify-machineinstrs | FileCheck %s --check-prefixes=X86,FAST-X86
; llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 -mattr=-sse,-sse2,+x87 -verify-machineinstrs | FileCheck %s --check-prefixes=GISEL-X86
define i1 @fcmp_float_oeq(float %x, float %y) nounwind {
diff --git a/llvm/test/CodeGen/X86/isel-floor.ll b/llvm/test/CodeGen/X86/isel-floor.ll
index acae9b12ce7fc..a061647ee1a0e 100644
--- a/llvm/test/CodeGen/X86/isel-floor.ll
+++ b/llvm/test/CodeGen/X86/isel-floor.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
define float @floor_f32(float %a) nounwind readnone {
; DAG-X64-LABEL: floor_f32:
diff --git a/llvm/test/CodeGen/X86/isel-fneg.ll b/llvm/test/CodeGen/X86/isel-fneg.ll
index 77b3f263213a9..c08fad63af8c9 100644
--- a/llvm/test/CodeGen/X86/isel-fneg.ll
+++ b/llvm/test/CodeGen/X86/isel-fneg.ll
@@ -1,13 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
; DISABLED: llc < %s -mtriple=i686-linux-gnu -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel -mattr=+sse | FileCheck %s --check-prefixes=X86,SSE-X86,FASTISEL-SSE-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 -mattr=+sse | FileCheck %s --check-prefixes=X86,SSE-X86,SDAG-SSE-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -fast-isel -mattr=+sse | FileCheck %s --check-prefixes=X86,SSE-X86,FASTISEL-SSE-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 -mattr=+sse | FileCheck %s --check-prefixes=X86,SSE-X86,SDAG-SSE-X86
; DISABLED: llc < %s -mtriple=i686-linux-gnu -global-isel=1 -global-isel-abort=2 -mattr=+sse | FileCheck %s --check-prefixes=X86,SSE-X86,GISEL-SSE-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel -mattr=+sse | FileCheck %s --check-prefixes=X64,SSE-X64,FASTISEL-SSE-X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel=0 -fast-isel=0 -mattr=+sse | FileCheck %s --check-prefixes=X64,SSE-X64,SDAG-SSE-X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel=1 -global-isel-abort=2 -mattr=+sse | FileCheck %s --check-prefixes=X64,SSE-X64,GISEL-SSE-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -fast-isel -mattr=+sse | FileCheck %s --check-prefixes=X64,SSE-X64,FASTISEL-SSE-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel=0 -fast-isel=0 -mattr=+sse | FileCheck %s --check-prefixes=X64,SSE-X64,SDAG-SSE-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel=1 -global-isel-abort=2 -mattr=+sse | FileCheck %s --check-prefixes=X64,SSE-X64,GISEL-SSE-X64
define double @fneg_f64(double %x) nounwind {
; X86-LABEL: fneg_f64:
diff --git a/llvm/test/CodeGen/X86/isel-fp-to-int.ll b/llvm/test/CodeGen/X86/isel-fp-to-int.ll
index fae3db6ad0afa..61f5a16dedbdf 100644
--- a/llvm/test/CodeGen/X86/isel-fp-to-int.ll
+++ b/llvm/test/CodeGen/X86/isel-fp-to-int.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes X64,SDAG-X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes X64,GISEL-X64
-; RUN: llc < %s -mattr=+avx512f -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes AVX512,SDAG-AVX512
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mattr=+avx512f -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes AVX512,GISEL-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes X64,SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes X64,GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx512f -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes AVX512,SDAG-AVX512
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mattr=+avx512f -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes AVX512,GISEL-AVX512
define i64 @test_double_to_ui64(double %x) {
; SDAG-X64-LABEL: test_double_to_ui64:
diff --git a/llvm/test/CodeGen/X86/isel-fp-to-sint-x87.ll b/llvm/test/CodeGen/X86/isel-fp-to-sint-x87.ll
index 49e33141701fb..6c62a25ad0e23 100644
--- a/llvm/test/CodeGen/X86/isel-fp-to-sint-x87.ll
+++ b/llvm/test/CodeGen/X86/isel-fp-to-sint-x87.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; NOTE: Fast Isel is not added because it does not support x87 stores.
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel=0 | FileCheck %s --check-prefixes X64,SDAG-X64
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes X64,GISEL-X64
-; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel=0 | FileCheck %s --check-prefixes X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel=0 | FileCheck %s --check-prefixes X64,SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes X64,GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel=0 | FileCheck %s --check-prefixes X86,SDAG-X86
; TODO: The last RUN line fails GISEL for f64/double cases and will fallback to DAG due to lack of support for
; loads/stores in X86 mode, support is expected soon enough, for this reason the isel-fp64-to-sint-x86.mir test is added.
-; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes X86,GISEL-X86
define i8 @test_float_to_int8(float %input) nounwind {
; SDAG-X64-LABEL: test_float_to_int8:
diff --git a/llvm/test/CodeGen/X86/isel-fpclass.ll b/llvm/test/CodeGen/X86/isel-fpclass.ll
index cfc3cc2f07d21..da2001c26ac92 100644
--- a/llvm/test/CodeGen/X86/isel-fpclass.ll
+++ b/llvm/test/CodeGen/X86/isel-fpclass.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i686-linux | FileCheck %s -check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefixes=X64,X64-SDAGISEL
-; RUN: llc < %s -mtriple=i686-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X86-FASTISEL
-; RUN: llc < %s -mtriple=x86_64-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X64,X64-FASTISEL
-; RUN: llc < %s -mtriple=x86_64-linux -global-isel -global-isel-abort=1 | FileCheck %s -check-prefixes=X64-GISEL
-; RUN: llc < %s -mtriple=i686-linux -global-isel -global-isel-abort=2 | FileCheck %s -check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux | FileCheck %s -check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s -check-prefixes=X64,X64-SDAGISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X86-FASTISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefixes=X64,X64-FASTISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -global-isel -global-isel-abort=1 | FileCheck %s -check-prefixes=X64-GISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -global-isel -global-isel-abort=2 | FileCheck %s -check-prefixes=X86
define i1 @isnone_f(float %x) nounwind {
; X86-LABEL: isnone_f:
diff --git a/llvm/test/CodeGen/X86/isel-ftrunc.ll b/llvm/test/CodeGen/X86/isel-ftrunc.ll
index c2be47ca04567..0cb6a976aff70 100644
--- a/llvm/test/CodeGen/X86/isel-ftrunc.ll
+++ b/llvm/test/CodeGen/X86/isel-ftrunc.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
define float @trunc_f32(float %a) nounwind readnone {
; DAG-X64-LABEL: trunc_f32:
diff --git a/llvm/test/CodeGen/X86/isel-icmp.ll b/llvm/test/CodeGen/X86/isel-icmp.ll
index ce4aba5d14e4d..9a5dcb5605be2 100644
--- a/llvm/test/CodeGen/X86/isel-icmp.ll
+++ b/llvm/test/CodeGen/X86/isel-icmp.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=SDAG-X64
; Allow fast-isel to fallback to selection dag on x86 for i96 type.
-; RUN: llc < %s -fast-isel -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=FAST-X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s -mtriple=i686-apple-darwin10 | FileCheck %s --check-prefixes=SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=FAST-X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin10 | FileCheck %s --check-prefixes=SDAG-X86
; Allow fast-isel to fallback to selection dag on x86
-; RUN: llc < %s -fast-isel -mtriple=i686-apple-darwin10 | FileCheck %s --check-prefixes=FAST-X86
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i686-apple-darwin10 | FileCheck %s --check-prefixes=FAST-X86
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 | FileCheck %s --check-prefixes=GISEL-X86
define i32 @test_icmp_eq_i8(i8 %a, i8 %b) {
; SDAG-X64-LABEL: test_icmp_eq_i8:
diff --git a/llvm/test/CodeGen/X86/isel-int-to-fp.ll b/llvm/test/CodeGen/X86/isel-int-to-fp.ll
index 5884944e41986..ee2488a489402 100644
--- a/llvm/test/CodeGen/X86/isel-int-to-fp.ll
+++ b/llvm/test/CodeGen/X86/isel-int-to-fp.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes X64,SDAG-X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes X64,GISEL-X64
-; RUN: llc < %s -mattr=+avx512f -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes AVX512,SDAG-AVX512
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mattr=+avx512f -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes AVX512,GISEL-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes X64,SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes X64,GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx512f -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes AVX512,SDAG-AVX512
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mattr=+avx512f -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s --check-prefixes AVX512,GISEL-AVX512
define double @test_ui64_to_double(i64 %x) {
; SDAG-X64-LABEL: test_ui64_to_double:
diff --git a/llvm/test/CodeGen/X86/isel-llvm.acos.ll b/llvm/test/CodeGen/X86/isel-llvm.acos.ll
index 9fc63ffeed8d5..ef74a535d4ec3 100644
--- a/llvm/test/CodeGen/X86/isel-llvm.acos.ll
+++ b/llvm/test/CodeGen/X86/isel-llvm.acos.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define float @use_acosf32(float %a) nounwind {
; SDAG-X86-LABEL: use_acosf32:
diff --git a/llvm/test/CodeGen/X86/isel-llvm.asin.ll b/llvm/test/CodeGen/X86/isel-llvm.asin.ll
index 111303b0e9058..356673d5e5d03 100644
--- a/llvm/test/CodeGen/X86/isel-llvm.asin.ll
+++ b/llvm/test/CodeGen/X86/isel-llvm.asin.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define float @use_asinf32(float %a) nounwind {
; SDAG-X86-LABEL: use_asinf32:
diff --git a/llvm/test/CodeGen/X86/isel-llvm.atan.ll b/llvm/test/CodeGen/X86/isel-llvm.atan.ll
index 910b58393e186..24c8370aa13c4 100644
--- a/llvm/test/CodeGen/X86/isel-llvm.atan.ll
+++ b/llvm/test/CodeGen/X86/isel-llvm.atan.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define float @use_atanf32(float %a) nounwind {
; SDAG-X86-LABEL: use_atanf32:
diff --git a/llvm/test/CodeGen/X86/isel-llvm.atan2.ll b/llvm/test/CodeGen/X86/isel-llvm.atan2.ll
index 2f43cd001b122..f1f533c34614c 100644
--- a/llvm/test/CodeGen/X86/isel-llvm.atan2.ll
+++ b/llvm/test/CodeGen/X86/isel-llvm.atan2.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define float @use_atan2f32(float %a, float %b) nounwind {
; SDAG-X86-LABEL: use_atan2f32:
diff --git a/llvm/test/CodeGen/X86/isel-llvm.cos.ll b/llvm/test/CodeGen/X86/isel-llvm.cos.ll
index 0abaaec87699f..b296140081f14 100644
--- a/llvm/test/CodeGen/X86/isel-llvm.cos.ll
+++ b/llvm/test/CodeGen/X86/isel-llvm.cos.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define float @test_cos_f32(float %Val) nounwind {
; SDAG-X86-LABEL: test_cos_f32:
diff --git a/llvm/test/CodeGen/X86/isel-llvm.cosh.ll b/llvm/test/CodeGen/X86/isel-llvm.cosh.ll
index c665f84bf1377..ca61a47f78e3a 100644
--- a/llvm/test/CodeGen/X86/isel-llvm.cosh.ll
+++ b/llvm/test/CodeGen/X86/isel-llvm.cosh.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define float @use_coshf32(float %a) nounwind {
; SDAG-X86-LABEL: use_coshf32:
diff --git a/llvm/test/CodeGen/X86/isel-llvm.sin.ll b/llvm/test/CodeGen/X86/isel-llvm.sin.ll
index 559a104863928..af49cecb072da 100644
--- a/llvm/test/CodeGen/X86/isel-llvm.sin.ll
+++ b/llvm/test/CodeGen/X86/isel-llvm.sin.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define float @test_sin_f32(float %Val) nounwind {
; SDAG-X86-LABEL: test_sin_f32:
diff --git a/llvm/test/CodeGen/X86/isel-llvm.sincos.ll b/llvm/test/CodeGen/X86/isel-llvm.sincos.ll
index 8576f8f149e9a..4b637741663ab 100644
--- a/llvm/test/CodeGen/X86/isel-llvm.sincos.ll
+++ b/llvm/test/CodeGen/X86/isel-llvm.sincos.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.9.0 -mcpu=core2 | FileCheck %s --check-prefix=MACOS-SINCOS-STRET
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core2 | FileCheck %s --check-prefix=MACOS-NOSINCOS-STRET
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.9.0 -mcpu=core2 | FileCheck %s --check-prefix=MACOS-SINCOS-STRET
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core2 | FileCheck %s --check-prefix=MACOS-NOSINCOS-STRET
; TODO: The below RUN line will fails GISEL selection and will fallback to DAG selection due to lack of support for loads/stores in i686 mode, support is expected soon enough, for this reason the llvm/test/CodeGen/X86/GlobalISel/llvm.sincos.mir test is added for now because of the lack of support for i686 in GlobalISel.
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefixes=GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel=1 -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=1 -global-isel-abort=2 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel=1 -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define { float, float } @test_sincos_f32(float %Val) nounwind {
; X86-LABEL: test_sincos_f32:
diff --git a/llvm/test/CodeGen/X86/isel-llvm.sinh.ll b/llvm/test/CodeGen/X86/isel-llvm.sinh.ll
index 6bd7cfbb301cb..e1c3e15b9e493 100644
--- a/llvm/test/CodeGen/X86/isel-llvm.sinh.ll
+++ b/llvm/test/CodeGen/X86/isel-llvm.sinh.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define float @use_sinhf32(float %a) nounwind {
; SDAG-X86-LABEL: use_sinhf32:
diff --git a/llvm/test/CodeGen/X86/isel-llvm.tan.ll b/llvm/test/CodeGen/X86/isel-llvm.tan.ll
index 4b51d208bfadd..769e9ef448fd2 100644
--- a/llvm/test/CodeGen/X86/isel-llvm.tan.ll
+++ b/llvm/test/CodeGen/X86/isel-llvm.tan.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define float @use_tanf32(float %a) nounwind {
; SDAG-X86-LABEL: use_tanf32:
diff --git a/llvm/test/CodeGen/X86/isel-llvm.tanh.ll b/llvm/test/CodeGen/X86/isel-llvm.tanh.ll
index 29a7cbfb99af5..42de10cec8940 100644
--- a/llvm/test/CodeGen/X86/isel-llvm.tanh.ll
+++ b/llvm/test/CodeGen/X86/isel-llvm.tanh.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define float @use_tanhf32(float %a) nounwind {
; SDAG-X86-LABEL: use_tanhf32:
diff --git a/llvm/test/CodeGen/X86/isel-optnone.ll b/llvm/test/CodeGen/X86/isel-optnone.ll
index cc7e854629943..72f812e6d5b10 100644
--- a/llvm/test/CodeGen/X86/isel-optnone.ll
+++ b/llvm/test/CodeGen/X86/isel-optnone.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O2 -mtriple=i686-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O2 -mtriple=i686-- < %s | FileCheck %s
define ptr @fooOptnone(ptr %p, ptr %q, ptr %z) #0 {
entry:
diff --git a/llvm/test/CodeGen/X86/isel-or.ll b/llvm/test/CodeGen/X86/isel-or.ll
index 8b191c007675c..77fd0e49b3e9d 100644
--- a/llvm/test/CodeGen/X86/isel-or.ll
+++ b/llvm/test/CodeGen/X86/isel-or.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=i686-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86
-; RUN: llc < %s -mtriple=i686-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,SDAG-X64
-; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
-; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,GISEL-X64
define i1 @or_i1(i1 %a, i1 %b) {
; SDAG-X86-LABEL: or_i1:
diff --git a/llvm/test/CodeGen/X86/isel-phi.ll b/llvm/test/CodeGen/X86/isel-phi.ll
index ee2039492abfd..6b35109f29bce 100644
--- a/llvm/test/CodeGen/X86/isel-phi.ll
+++ b/llvm/test/CodeGen/X86/isel-phi.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-linux-gnu -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=X86
-; RUN: llc -mtriple=i686-linux-gnu -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-gnu -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-gnu -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=X86
; TODO: enable when x87 is supported
; llc -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=X86,GLOBAL-X86
-; RUN: llc -mtriple=x86_64-linux-gnu -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=X64,DAG-X64
-; RUN: llc -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=X64,DAG-X64
-; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=X64,GLOBAL-X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=X64,DAG-X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=X64,DAG-X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 -verify-machineinstrs < %s -o - | FileCheck %s --check-prefixes=X64,GLOBAL-X64
define i1 @test_i1(i1 %a, i1 %b, i1 %c, i1 %pred0, i1 %pred1) {
; X86-LABEL: test_i1:
diff --git a/llvm/test/CodeGen/X86/isel-postprocessing-test-fold-memop.ll b/llvm/test/CodeGen/X86/isel-postprocessing-test-fold-memop.ll
index 794946113f002..b8a8abf23f0d9 100644
--- a/llvm/test/CodeGen/X86/isel-postprocessing-test-fold-memop.ll
+++ b/llvm/test/CodeGen/X86/isel-postprocessing-test-fold-memop.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O2 -mtriple=x86_64-- -stop-after=finalize-isel < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O2 -mtriple=x86_64-- -stop-after=finalize-isel < %s | FileCheck %s
define i1 @fold_test(ptr %x, i64 %l) {
entry:
diff --git a/llvm/test/CodeGen/X86/isel-sdiv.ll b/llvm/test/CodeGen/X86/isel-sdiv.ll
index 1aca8d1035664..ad09dfcdfe696 100644
--- a/llvm/test/CodeGen/X86/isel-sdiv.ll
+++ b/llvm/test/CodeGen/X86/isel-sdiv.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -global-isel=0 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -global-isel=0 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -global-isel=0 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel=0 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,GISEL-X86
define i8 @test_sdiv_i8(i8 %arg1, i8 %arg2) nounwind {
; X64-LABEL: test_sdiv_i8:
diff --git a/llvm/test/CodeGen/X86/isel-select-cmov.ll b/llvm/test/CodeGen/X86/isel-select-cmov.ll
index d013ad2c7fbff..19a6c94df8419 100644
--- a/llvm/test/CodeGen/X86/isel-select-cmov.ll
+++ b/llvm/test/CodeGen/X86/isel-select-cmov.ll
@@ -1,19 +1,19 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=SDAG-X64
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -verify-machineinstrs -mattr=+avx512f | FileCheck %s --check-prefix=SDAG-X64
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=FAST-X64
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs -mattr=+avx512f | FileCheck %s --check-prefix=FAST-X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=GISEL-X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs -mattr=+avx512f | FileCheck %s --check-prefix=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -verify-machineinstrs -mattr=+avx512f | FileCheck %s --check-prefix=SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=FAST-X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs -mattr=+avx512f | FileCheck %s --check-prefix=FAST-X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs -mattr=+avx512f | FileCheck %s --check-prefix=GISEL-X64
-; RUN: llc < %s -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=SDAG-X86
-; RUN: llc < %s -mtriple=i686-apple-darwin10 -verify-machineinstrs -mattr=+cmov | FileCheck %s --check-prefix=SDAG-X86-CMOV
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=FAST-X86
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs -mattr=+cmov | FileCheck %s --check-prefix=FAST-X86-CMOV
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=GISEL-X86
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs -mattr=+cmov | FileCheck %s --check-prefix=GISEL-X86-CMOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin10 -verify-machineinstrs -mattr=+cmov | FileCheck %s --check-prefix=SDAG-X86-CMOV
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=FAST-X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs -mattr=+cmov | FileCheck %s --check-prefix=FAST-X86-CMOV
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs | FileCheck %s --check-prefix=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=i686-apple-darwin10 -verify-machineinstrs -mattr=+cmov | FileCheck %s --check-prefix=GISEL-X86-CMOV
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs -mattr=+ndd | FileCheck %s --check-prefix=NDD
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-apple-darwin10 -verify-machineinstrs -mattr=+ndd | FileCheck %s --check-prefix=NDD
; Test conditional move for the supported types (i16, i32, and i32) and
; conditon input (argument or cmp).
diff --git a/llvm/test/CodeGen/X86/isel-select-fcmov.ll b/llvm/test/CodeGen/X86/isel-select-fcmov.ll
index cb441b860bb56..2181c34f3916d 100644
--- a/llvm/test/CodeGen/X86/isel-select-fcmov.ll
+++ b/llvm/test/CodeGen/X86/isel-select-fcmov.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i686-linux-gnu -mattr=+cmov -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -mattr=+cmov -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=X86-GISEL
-; RUN: llc < %s -mtriple=i686-linux-gnu -mattr=+cmov -fast-isel=0 -global-isel=0 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=X64-GISEL
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel=0 -global-isel=0 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -mattr=+cmov -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -mattr=+cmov -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=X86-GISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -mattr=+cmov -fast-isel=0 -global-isel=0 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefix=X64-GISEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -fast-isel=0 -global-isel=0 | FileCheck %s --check-prefix=X64
; Test that we can generate an fcmove, and also that it passes verification.
diff --git a/llvm/test/CodeGen/X86/isel-set-invalid-rounding.ll b/llvm/test/CodeGen/X86/isel-set-invalid-rounding.ll
index 9fed9945532a0..7b09e6e63d6d9 100644
--- a/llvm/test/CodeGen/X86/isel-set-invalid-rounding.ll
+++ b/llvm/test/CodeGen/X86/isel-set-invalid-rounding.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: not llc < %s -mtriple=i686-- -fast-isel -filetype=null 2>&1 | FileCheck %s --check-prefixes=ERROR
-; RUN: not llc < %s -mtriple=i686-- -global-isel=0 -fast-isel=0 -filetype=null 2>&1 | FileCheck %s --check-prefixes=ERROR
-; RUN: not llc < %s -mtriple=i686-- -global-isel -global-isel-abort=1 -filetype=null 2>&1 | FileCheck %s --check-prefixes=ERROR
-; RUN: not llc < %s -mtriple=x86_64-- -fast-isel -filetype=null 2>&1 | FileCheck %s --check-prefixes=ERROR
-; RUN: not llc < %s -mtriple=x86_64-- -global-isel=0 -fast-isel=0 -filetype=null 2>&1 | FileCheck %s --check-prefixes=ERROR
-; RUN: not llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 -filetype=null 2>&1 | FileCheck %s --check-prefixes=ERROR
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=i686-- -fast-isel -filetype=null 2>&1 | FileCheck %s --check-prefixes=ERROR
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=i686-- -global-isel=0 -fast-isel=0 -filetype=null 2>&1 | FileCheck %s --check-prefixes=ERROR
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=i686-- -global-isel -global-isel-abort=1 -filetype=null 2>&1 | FileCheck %s --check-prefixes=ERROR
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64-- -fast-isel -filetype=null 2>&1 | FileCheck %s --check-prefixes=ERROR
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64-- -global-isel=0 -fast-isel=0 -filetype=null 2>&1 | FileCheck %s --check-prefixes=ERROR
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 -filetype=null 2>&1 | FileCheck %s --check-prefixes=ERROR
; ERROR: error: isel-set-invalid-rounding:3:3: in function foo void (): rounding mode is not supported by X86 hardware
diff --git a/llvm/test/CodeGen/X86/isel-shift.ll b/llvm/test/CodeGen/X86/isel-shift.ll
index 476dcf04dbaa2..64e062b51904e 100644
--- a/llvm/test/CodeGen/X86/isel-shift.ll
+++ b/llvm/test/CodeGen/X86/isel-shift.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin10 | FileCheck %s --check-prefixes=X86,SDAG,SDAG-X86
-; RUN: llc < %s -mtriple=i686-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin10 | FileCheck %s --check-prefixes=X86,SDAG,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86
; TODO: llc < %s -mtriple=i686-apple-darwin10 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=X64,SDAG,SDAG-X64
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefixes=X64,SDAG,SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,GISEL-X64
define i8 @shl_i8(i8 %a, i8 %b) {
; X86-LABEL: shl_i8:
diff --git a/llvm/test/CodeGen/X86/isel-sink.ll b/llvm/test/CodeGen/X86/isel-sink.ll
index e8bf5ee7b12f9..8bf3d1e7eb38b 100644
--- a/llvm/test/CodeGen/X86/isel-sink.ll
+++ b/llvm/test/CodeGen/X86/isel-sink.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define i32 @test(ptr %X, i32 %B) {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/isel-sink2.ll b/llvm/test/CodeGen/X86/isel-sink2.ll
index 46ff70a746434..c925b8a7a4d9c 100644
--- a/llvm/test/CodeGen/X86/isel-sink2.ll
+++ b/llvm/test/CodeGen/X86/isel-sink2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define i8 @test(ptr%P) nounwind {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/isel-sink3.ll b/llvm/test/CodeGen/X86/isel-sink3.ll
index de6317a2f019f..a51900d9ce6e7 100644
--- a/llvm/test/CodeGen/X86/isel-sink3.ll
+++ b/llvm/test/CodeGen/X86/isel-sink3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; this should not sink %1 into bb1, that would increase reg pressure.
; rdar://6399178
diff --git a/llvm/test/CodeGen/X86/isel-sint-to-fp-x87.ll b/llvm/test/CodeGen/X86/isel-sint-to-fp-x87.ll
index 98fa3c9541faa..51f0e25aecf01 100644
--- a/llvm/test/CodeGen/X86/isel-sint-to-fp-x87.ll
+++ b/llvm/test/CodeGen/X86/isel-sint-to-fp-x87.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; NOTE: Fast Isel is not added because it does not support x87 stores.
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel=0 | FileCheck %s --check-prefixes X64,SDAG-X64
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes X64,GISEL-X64
-; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel=0 | FileCheck %s --check-prefixes X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel=0 | FileCheck %s --check-prefixes X64,SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes X64,GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel=0 | FileCheck %s --check-prefixes X86,SDAG-X86
; TODO: The last RUN line fails GISEL for f64/double cases and will fallback to DAG due to lack of support for
; loads/stores in X86 mode, support is expected soon enough, for this reason the isel-sint-to-fp64-x86.mir test is added.
-; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes X86,GISEL-X86
define void @test_int8_to_float(i8 %x, ptr %p) nounwind {
; SDAG-X64-LABEL: test_int8_to_float:
diff --git a/llvm/test/CodeGen/X86/isel-smax.ll b/llvm/test/CodeGen/X86/isel-smax.ll
index 1ce0a8006bb74..0ef3ea3df2e90 100644
--- a/llvm/test/CodeGen/X86/isel-smax.ll
+++ b/llvm/test/CodeGen/X86/isel-smax.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
define i8 @smax_i8(i8 %a, i8 %b) nounwind readnone {
; DAG-X64-LABEL: smax_i8:
diff --git a/llvm/test/CodeGen/X86/isel-smin.ll b/llvm/test/CodeGen/X86/isel-smin.ll
index bbed3c356cb3b..c0eed3d7e713f 100644
--- a/llvm/test/CodeGen/X86/isel-smin.ll
+++ b/llvm/test/CodeGen/X86/isel-smin.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
define i8 @smin_i8(i8 %a, i8 %b) nounwind readnone {
; DAG-X64-LABEL: smin_i8:
diff --git a/llvm/test/CodeGen/X86/isel-sqrt.ll b/llvm/test/CodeGen/X86/isel-sqrt.ll
index 45ac3bdb2e40b..120f0a9f54c6e 100644
--- a/llvm/test/CodeGen/X86/isel-sqrt.ll
+++ b/llvm/test/CodeGen/X86/isel-sqrt.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 | FileCheck %s --check-prefixes=X64,SSE2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -fast-isel | FileCheck %s --check-prefixes=X64,SSE2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,SSE2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx | FileCheck %s --check-prefixes=X64,AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -fast-isel | FileCheck %s --check-prefixes=X64,AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,AVX
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 | FileCheck %s --check-prefixes=X64,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -fast-isel | FileCheck %s --check-prefixes=X64,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx | FileCheck %s --check-prefixes=X64,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -fast-isel | FileCheck %s --check-prefixes=X64,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=-avx2,+avx -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
; TODO: The last RUN line will fails GISEL selection and will fallback to DAG selection due to lack of support for loads/stores in i686 mode, support is expected soon enough, for this reason the llvm/test/CodeGen/X86/GlobalISel/sqrt.mir test is added for now because of the lack of support for i686 in GlobalISel.
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=2 | FileCheck %s --check-prefixes=X86,GISEL-X86
define float @test_sqrt_f32(float %a) {
; SSE2-LABEL: test_sqrt_f32:
diff --git a/llvm/test/CodeGen/X86/isel-srem.ll b/llvm/test/CodeGen/X86/isel-srem.ll
index 1dabf4175c852..4dcdf02242f17 100644
--- a/llvm/test/CodeGen/X86/isel-srem.ll
+++ b/llvm/test/CodeGen/X86/isel-srem.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -global-isel=0 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,SDAG-X64
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,FAST-X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,GISEL-X64
-; RUN: llc < %s -global-isel=0 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86,SDAG-X86
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86,FAST-X86
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -global-isel=0 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,FAST-X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel=0 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86,FAST-X86
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,GISEL-X86
define i8 @test_srem_i8(i8 %arg1, i8 %arg2) nounwind {
; SDAG-X64-LABEL: test_srem_i8:
diff --git a/llvm/test/CodeGen/X86/isel-traps.ll b/llvm/test/CodeGen/X86/isel-traps.ll
index de02779046a5e..70b00650b1d58 100644
--- a/llvm/test/CodeGen/X86/isel-traps.ll
+++ b/llvm/test/CodeGen/X86/isel-traps.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=ALL,X64
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=ALL,X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=ALL,GISEL-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=ALL,X86
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=ALL,X86
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=ALL,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=ALL,X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=ALL,X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=ALL,GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=ALL,X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=ALL,X86
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=ALL,GISEL-X86
declare void @llvm.trap()
diff --git a/llvm/test/CodeGen/X86/isel-udiv.ll b/llvm/test/CodeGen/X86/isel-udiv.ll
index b123b3c7780fa..d9b8ad51c7a8b 100644
--- a/llvm/test/CodeGen/X86/isel-udiv.ll
+++ b/llvm/test/CodeGen/X86/isel-udiv.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -global-isel=0 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -global-isel=0 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -global-isel=0 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel=0 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,GISEL-X86
define i8 @test_udiv_i8(i8 %arg1, i8 %arg2) nounwind {
; X64-LABEL: test_udiv_i8:
diff --git a/llvm/test/CodeGen/X86/isel-umax.ll b/llvm/test/CodeGen/X86/isel-umax.ll
index 990af262065af..0c0abbad564e1 100644
--- a/llvm/test/CodeGen/X86/isel-umax.ll
+++ b/llvm/test/CodeGen/X86/isel-umax.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
define i8 @umax_i8(i8 %a, i8 %b) nounwind readnone {
; DAG-X64-LABEL: umax_i8:
diff --git a/llvm/test/CodeGen/X86/isel-umin.ll b/llvm/test/CodeGen/X86/isel-umin.ll
index 1710b9fbfa059..690f0a9dc3dac 100644
--- a/llvm/test/CodeGen/X86/isel-umin.ll
+++ b/llvm/test/CodeGen/X86/isel-umin.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
-; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,DAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=X86,FASTISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
define i8 @umin_i8(i8 %a, i8 %b) nounwind readnone {
; DAG-X64-LABEL: umin_i8:
diff --git a/llvm/test/CodeGen/X86/isel-urem.ll b/llvm/test/CodeGen/X86/isel-urem.ll
index 386f08151ad9c..1423f970b0504 100644
--- a/llvm/test/CodeGen/X86/isel-urem.ll
+++ b/llvm/test/CodeGen/X86/isel-urem.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -global-isel=0 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,SDAG-X64
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,FAST-X64
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,GISEL-X64
-; RUN: llc < %s -global-isel=0 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86,SDAG-X86
-; RUN: llc < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86,FAST-X86
-; RUN: llc < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -global-isel=0 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,FAST-X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=X64,GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -global-isel=0 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -fast-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,DAG-X86,FAST-X86
+; RUN: llc -combiner-topological-sorting < %s -global-isel -global-isel-abort=1 -mtriple=i686-linux-gnu | FileCheck %s --check-prefixes=X86,GISEL-X86
define i8 @test_urem_i8(i8 %arg1, i8 %arg2) nounwind {
; SDAG-X64-LABEL: test_urem_i8:
diff --git a/llvm/test/CodeGen/X86/isel-x87.ll b/llvm/test/CodeGen/X86/isel-x87.ll
index 492faaa19cd66..8cbd2927fa897 100644
--- a/llvm/test/CodeGen/X86/isel-x87.ll
+++ b/llvm/test/CodeGen/X86/isel-x87.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel | FileCheck %s --check-prefixes=CHECK-32,GISEL_X86
-; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 | FileCheck %s --check-prefixes=CHECK-32,SDAG_X86
-; RUN: llc < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -fast-isel=true | FileCheck %s --check-prefixes=CHECK-32,SDAG_X86,FAST_X86
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel | FileCheck %s --check-prefixes=CHECK-64,GISEL_X64
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 | FileCheck %s --check-prefixes=CHECK-64,SDAG_X64
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -fast-isel=true | FileCheck %s --check-prefixes=CHECK-64,SDAG_X64,FAST_X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -global-isel | FileCheck %s --check-prefixes=CHECK-32,GISEL_X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 | FileCheck %s --check-prefixes=CHECK-32,SDAG_X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+x87,-sse,-sse2 -fast-isel=true | FileCheck %s --check-prefixes=CHECK-32,SDAG_X86,FAST_X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -global-isel | FileCheck %s --check-prefixes=CHECK-64,GISEL_X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 | FileCheck %s --check-prefixes=CHECK-64,SDAG_X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+x87,-sse,-sse2 -fast-isel=true | FileCheck %s --check-prefixes=CHECK-64,SDAG_X64,FAST_X64
define x86_fp80 @f0(x86_fp80 noundef %a) nounwind {
; GISEL_X86-LABEL: f0:
diff --git a/llvm/test/CodeGen/X86/isel-xor.ll b/llvm/test/CodeGen/X86/isel-xor.ll
index 0549a6436a1a4..68004e6ff814b 100644
--- a/llvm/test/CodeGen/X86/isel-xor.ll
+++ b/llvm/test/CodeGen/X86/isel-xor.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86,SDAG-X86
-; RUN: llc < %s -mtriple=i686-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86
-; RUN: llc < %s -mtriple=i686-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,SDAG-X64
-; RUN: llc < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
-; RUN: llc < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86,SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X86,FASTISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X86,GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefixes=X64,FASTISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=X64,GISEL-X64
define i1 @xor_i1(i1 %a, i1 %b) {
; SDAG-X86-LABEL: xor_i1:
diff --git a/llvm/test/CodeGen/X86/isint.ll b/llvm/test/CodeGen/X86/isint.ll
index 778cfdf9e8351..03ae0e93779fa 100644
--- a/llvm/test/CodeGen/X86/isint.ll
+++ b/llvm/test/CodeGen/X86/isint.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-unknown -mattr=+sse2 | FileCheck %s -check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-pc-unknown -mcpu=x86-64 | FileCheck %s -check-prefixes=X64-SSE2
-; RUN: llc < %s -mtriple=x86_64-pc-unknown -mcpu=x86-64-v2 | FileCheck %s -check-prefixes=X64-SSE42
-; RUN: llc < %s -mtriple=x86_64-pc-unknown -mcpu=x86-64-v3 | FileCheck %s -check-prefixes=X64-AVX,X64-AVX2
-; RUN: llc < %s -mtriple=x86_64-pc-unknown -mcpu=x86-64-v4 | FileCheck %s -check-prefixes=X64-AVX,X64-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-unknown -mattr=+sse2 | FileCheck %s -check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-unknown -mcpu=x86-64 | FileCheck %s -check-prefixes=X64-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-unknown -mcpu=x86-64-v2 | FileCheck %s -check-prefixes=X64-SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-unknown -mcpu=x86-64-v3 | FileCheck %s -check-prefixes=X64-AVX,X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-unknown -mcpu=x86-64-v4 | FileCheck %s -check-prefixes=X64-AVX,X64-AVX512
; PR19059
diff --git a/llvm/test/CodeGen/X86/isnan.ll b/llvm/test/CodeGen/X86/isnan.ll
index d46aa279e6068..998b6897aeedf 100644
--- a/llvm/test/CodeGen/X86/isnan.ll
+++ b/llvm/test/CodeGen/X86/isnan.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
declare i1 @llvm.isunordered.f64(double)
diff --git a/llvm/test/CodeGen/X86/isnan2.ll b/llvm/test/CodeGen/X86/isnan2.ll
index fd8229d6c129d..50977486818e2 100644
--- a/llvm/test/CodeGen/X86/isnan2.ll
+++ b/llvm/test/CodeGen/X86/isnan2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
; This should not need to materialize 0.0 to evaluate the condition.
diff --git a/llvm/test/CodeGen/X86/ispositive.ll b/llvm/test/CodeGen/X86/ispositive.ll
index 4129546624c55..2fe1d4f2a65ac 100644
--- a/llvm/test/CodeGen/X86/ispositive.ll
+++ b/llvm/test/CodeGen/X86/ispositive.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define i32 @test1(i32 %X) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/ispow2.ll b/llvm/test/CodeGen/X86/ispow2.ll
index badfd1af940ca..591ecdb68d8d0 100644
--- a/llvm/test/CodeGen/X86/ispow2.ll
+++ b/llvm/test/CodeGen/X86/ispow2.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,CHECK-NOBMI
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+bmi2,+bmi | FileCheck %s --check-prefixes=CHECK,CHECK-BMI2,CHECK-AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512vpopcntdq,+bmi2,+bmi | FileCheck %s --check-prefixes=CHECK,CHECK-BMI2,CHECK-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,CHECK-NOBMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+bmi2,+bmi | FileCheck %s --check-prefixes=CHECK,CHECK-BMI2,CHECK-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512vpopcntdq,+bmi2,+bmi | FileCheck %s --check-prefixes=CHECK,CHECK-BMI2,CHECK-AVX512
declare i32 @llvm.ctpop.i32(i32)
declare <4 x i64> @llvm.ctpop.v4i64(<4 x i64>)
diff --git a/llvm/test/CodeGen/X86/issue56055.ll b/llvm/test/CodeGen/X86/issue56055.ll
index 27eaf13e3b00b..e1a03b0f483a6 100644
--- a/llvm/test/CodeGen/X86/issue56055.ll
+++ b/llvm/test/CodeGen/X86/issue56055.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -fast-isel < %s | FileCheck -check-prefixes=CHECK,FASTISEL %s
-; RUN: llc < %s | FileCheck -check-prefixes=CHECK,SDAG %s
+; RUN: llc -combiner-topological-sorting -fast-isel < %s | FileCheck -check-prefixes=CHECK,FASTISEL %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck -check-prefixes=CHECK,SDAG %s
target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/issue64826-switferror-eh.ll b/llvm/test/CodeGen/X86/issue64826-switferror-eh.ll
index 83b6fb11bc985..c36a4f9ddc439 100644
--- a/llvm/test/CodeGen/X86/issue64826-switferror-eh.ll
+++ b/llvm/test/CodeGen/X86/issue64826-switferror-eh.ll
@@ -1,5 +1,5 @@
-; RUN: llc %s -filetype=obj -o - | llvm-readobj -r - | FileCheck %s --check-prefix=RELOC
-; RUN: llc %s -o - | FileCheck %s --check-prefix=ASM
+; RUN: llc -combiner-topological-sorting %s -filetype=obj -o - | llvm-readobj -r - | FileCheck %s --check-prefix=RELOC
+; RUN: llc -combiner-topological-sorting %s -o - | FileCheck %s --check-prefix=ASM
target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx"
diff --git a/llvm/test/CodeGen/X86/jcc-indirect-thunk-kernel.ll b/llvm/test/CodeGen/X86/jcc-indirect-thunk-kernel.ll
index d04ae31a9cb3f..09f03f5bc6764 100644
--- a/llvm/test/CodeGen/X86/jcc-indirect-thunk-kernel.ll
+++ b/llvm/test/CodeGen/X86/jcc-indirect-thunk-kernel.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O2 --code-model=kernel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O2 --code-model=kernel | FileCheck %s
; The intent of the test is that we do not generate conditional
; tail calls to the thunk.
diff --git a/llvm/test/CodeGen/X86/jump-table-partition.ll b/llvm/test/CodeGen/X86/jump-table-partition.ll
index 40dbc8131e22b..74f0f9a4e7b7c 100644
--- a/llvm/test/CodeGen/X86/jump-table-partition.ll
+++ b/llvm/test/CodeGen/X86/jump-table-partition.ll
@@ -3,8 +3,8 @@
; Stop after 'finalize-isel' for simpler MIR, and lower the minimum number of
; jump table entries so 'switch' needs fewer cases to generate a jump table.
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -stop-after=finalize-isel -min-jump-table-entries=2 %s -o %t.mir
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu --run-pass=static-data-splitter -stats -x mir %t.mir -o - 2>&1 | FileCheck %s --check-prefix=STAT
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -stop-after=finalize-isel -min-jump-table-entries=2 %s -o %t.mir
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu --run-pass=static-data-splitter -stats -x mir %t.mir -o - 2>&1 | FileCheck %s --check-prefix=STAT
; @foo has 2 hot and 2 cold jump tables.
; The two jump tables with unknown hotness come from @func_without_profile and
@@ -13,17 +13,17 @@
; STAT: 2 static-data-splitter - Number of hot jump tables seen
; STAT: 2 static-data-splitter - Number of jump tables with unknown hotness
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -partition-static-data-sections \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -partition-static-data-sections \
; RUN: -function-sections -unique-section-names=false \
; RUN: -min-jump-table-entries=2 \
; RUN: %s -o - 2>&1 | FileCheck %s --check-prefixes=NUM,JT
; Section names will optionally have `.<func>` if -function-sections is enabled.
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -partition-static-data-sections \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -partition-static-data-sections \
; RUN: -function-sections -min-jump-table-entries=2 \
; RUN: %s -o - 2>&1 | FileCheck %s --check-prefixes=FUNC,JT
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -partition-static-data-sections \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -partition-static-data-sections \
; RUN: -function-sections=false -min-jump-table-entries=2 \
; RUN: %s -o - 2>&1 | FileCheck %s --check-prefixes=FUNCLESS,JT
diff --git a/llvm/test/CodeGen/X86/jump-table-size-section.ll b/llvm/test/CodeGen/X86/jump-table-size-section.ll
index c0b57e96d56b0..31c70c6b932e5 100644
--- a/llvm/test/CodeGen/X86/jump-table-size-section.ll
+++ b/llvm/test/CodeGen/X86/jump-table-size-section.ll
@@ -1,14 +1,14 @@
-; RUN: llc %s -o - -mtriple x86_64-sie-ps5 -emit-jump-table-sizes-section -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=PS5-CHECK %s
-; RUN: llc %s -o - -mtriple x86_64-sie-ps5 -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=NOFLAG %s
-; RUN: llc %s -o - -mtriple x86_64-sie-ps5 -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=NOTABLE %s
+; RUN: llc -combiner-topological-sorting %s -o - -mtriple x86_64-sie-ps5 -emit-jump-table-sizes-section -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=PS5-CHECK %s
+; RUN: llc -combiner-topological-sorting %s -o - -mtriple x86_64-sie-ps5 -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=NOFLAG %s
+; RUN: llc -combiner-topological-sorting %s -o - -mtriple x86_64-sie-ps5 -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=NOTABLE %s
-; RUN: llc %s -o - -mtriple x86_64-unknown-linux-gnu -emit-jump-table-sizes-section -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=ELF-CHECK %s
-; RUN: llc %s -o - -mtriple x86_64-unknown-linux-gnu -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=NOFLAG %s
-; RUN: llc %s -o - -mtriple x86_64-unknown-linux-gnu -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=NOTABLE %s
+; RUN: llc -combiner-topological-sorting %s -o - -mtriple x86_64-unknown-linux-gnu -emit-jump-table-sizes-section -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=ELF-CHECK %s
+; RUN: llc -combiner-topological-sorting %s -o - -mtriple x86_64-unknown-linux-gnu -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=NOFLAG %s
+; RUN: llc -combiner-topological-sorting %s -o - -mtriple x86_64-unknown-linux-gnu -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=NOTABLE %s
-; RUN: llc %s -o - -mtriple x86_64-pc-windows-msvc -emit-jump-table-sizes-section -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=COFF-CHECK %s
-; RUN: llc %s -o - -mtriple x86_64-pc-windows-msvc -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=NOFLAG %s
-; RUN: llc %s -o - -mtriple x86_64-pc-windows-msvc -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=NOTABLE %s
+; RUN: llc -combiner-topological-sorting %s -o - -mtriple x86_64-pc-windows-msvc -emit-jump-table-sizes-section -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=COFF-CHECK %s
+; RUN: llc -combiner-topological-sorting %s -o - -mtriple x86_64-pc-windows-msvc -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=NOFLAG %s
+; RUN: llc -combiner-topological-sorting %s -o - -mtriple x86_64-pc-windows-msvc -verify-machineinstrs --relocation-model=pic | FileCheck --check-prefix=NOTABLE %s
; This test verifies the jump table size section. Currently only enabled by default on the PS5 target.
diff --git a/llvm/test/CodeGen/X86/kcfi-arity.ll b/llvm/test/CodeGen/X86/kcfi-arity.ll
index 5a19bcd7835ea..aa44bd4a42154 100644
--- a/llvm/test/CodeGen/X86/kcfi-arity.ll
+++ b/llvm/test/CodeGen/X86/kcfi-arity.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s --check-prefix=ASM
-; RUN: llc -mtriple=x86_64-unknown-none -verify-machineinstrs < %s | FileCheck %s --check-prefix=ASM
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -stop-after=finalize-isel < %s | FileCheck %s --check-prefixes=MIR,ISEL
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -stop-after=kcfi < %s | FileCheck %s --check-prefixes=MIR,KCFI
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s --check-prefix=ASM
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-none -verify-machineinstrs < %s | FileCheck %s --check-prefix=ASM
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -stop-after=finalize-isel < %s | FileCheck %s --check-prefixes=MIR,ISEL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -stop-after=kcfi < %s | FileCheck %s --check-prefixes=MIR,KCFI
; ASM: .p2align 4
; ASM: .type __cfi_f1, at function
diff --git a/llvm/test/CodeGen/X86/kcfi-patchable-function-prefix.ll b/llvm/test/CodeGen/X86/kcfi-patchable-function-prefix.ll
index 1b7bd7835e890..578df2a0c5b05 100644
--- a/llvm/test/CodeGen/X86/kcfi-patchable-function-prefix.ll
+++ b/llvm/test/CodeGen/X86/kcfi-patchable-function-prefix.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s
; CHECK: .p2align 4
; CHECK-LABEL: __cfi_f1:
diff --git a/llvm/test/CodeGen/X86/kcfi.ll b/llvm/test/CodeGen/X86/kcfi.ll
index fd93b8e3d4188..1133a7715a271 100644
--- a/llvm/test/CodeGen/X86/kcfi.ll
+++ b/llvm/test/CodeGen/X86/kcfi.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s --check-prefix=ASM
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -stop-after=finalize-isel < %s | FileCheck %s --check-prefixes=MIR,ISEL
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -stop-after=kcfi < %s | FileCheck %s --check-prefixes=MIR,KCFI
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs < %s | FileCheck %s --check-prefix=ASM
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -stop-after=finalize-isel < %s | FileCheck %s --check-prefixes=MIR,ISEL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs -stop-after=kcfi < %s | FileCheck %s --check-prefixes=MIR,KCFI
; ASM: .p2align 4
; ASM: .type __cfi_f1, at function
diff --git a/llvm/test/CodeGen/X86/keylocker-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/keylocker-intrinsics-fast-isel.ll
index 5ae1b06b072ff..adc4e9d36e155 100644
--- a/llvm/test/CodeGen/X86/keylocker-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/keylocker-intrinsics-fast-isel.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+kl,+widekl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+kl,+widekl | FileCheck %s
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/X86/keylocker-builtins.c
diff --git a/llvm/test/CodeGen/X86/keylocker-intrinsics.ll b/llvm/test/CodeGen/X86/keylocker-intrinsics.ll
index f01411c64acb0..0343bd3d37df9 100644
--- a/llvm/test/CodeGen/X86/keylocker-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/keylocker-intrinsics.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unkown-unknown -mattr=+kl,widekl | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i386-unkown-unknown -mattr=+kl,widekl -mattr=+avx2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unkown-unknown -mattr=+widekl | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i386-unkown-unknown -mattr=+widekl -mattr=+avx2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unkown-unknown -mattr=+kl,widekl | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i386-unkown-unknown -mattr=+kl,widekl -mattr=+avx2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unkown-unknown -mattr=+widekl | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i386-unkown-unknown -mattr=+widekl -mattr=+avx2 | FileCheck %s --check-prefix=X86
declare void @llvm.x86.loadiwkey(<2 x i64>, <2 x i64>, <2 x i64>, i32)
declare { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.encodekey128(i32, <2 x i64>)
diff --git a/llvm/test/CodeGen/X86/kmov.ll b/llvm/test/CodeGen/X86/kmov.ll
index 5d216a218cf9b..3739b7c1c9ad2 100644
--- a/llvm/test/CodeGen/X86/kmov.ll
+++ b/llvm/test/CodeGen/X86/kmov.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=X64-AVX512
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=X64-KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=X64-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=X64-KNL
define <2 x i1> @i8_mask_extract2(i8 %mask) {
; X64-AVX512-LABEL: i8_mask_extract2:
diff --git a/llvm/test/CodeGen/X86/known-fpclass.ll b/llvm/test/CodeGen/X86/known-fpclass.ll
index 020f0dd5f59d4..1764d9aefe150 100644
--- a/llvm/test/CodeGen/X86/known-fpclass.ll
+++ b/llvm/test/CodeGen/X86/known-fpclass.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s
define i1 @sqrt_neginf_f32(float %a0) {
; CHECK-LABEL: sqrt_neginf_f32:
diff --git a/llvm/test/CodeGen/X86/knownbits-div.ll b/llvm/test/CodeGen/X86/knownbits-div.ll
index 02e20a9010cc6..d07e91d1d590b 100644
--- a/llvm/test/CodeGen/X86/knownbits-div.ll
+++ b/llvm/test/CodeGen/X86/knownbits-div.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s
define i8 @sdiv_neg_neg_high_bits(i8 %x, i8 %y) {
; CHECK-LABEL: sdiv_neg_neg_high_bits:
diff --git a/llvm/test/CodeGen/X86/knownbits-vpmadd52.ll b/llvm/test/CodeGen/X86/knownbits-vpmadd52.ll
index 829ef4b94982c..84b12f643100a 100644
--- a/llvm/test/CodeGen/X86/knownbits-vpmadd52.ll
+++ b/llvm/test/CodeGen/X86/knownbits-vpmadd52.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl | FileCheck %s --check-prefixes=AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avxifma | FileCheck %s --check-prefixes=AVXIFMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl | FileCheck %s --check-prefixes=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avxifma | FileCheck %s --check-prefixes=AVXIFMA
; High-52 path
diff --git a/llvm/test/CodeGen/X86/kshift.ll b/llvm/test/CodeGen/X86/kshift.ll
index a3b5d8aee03c1..477d00ce23081 100644
--- a/llvm/test/CodeGen/X86/kshift.ll
+++ b/llvm/test/CodeGen/X86/kshift.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefix=KNL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512vl,avx512dq,avx512bw | FileCheck %s --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefix=KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512vl,avx512dq,avx512bw | FileCheck %s --check-prefix=SKX
define i8 @kshiftl_v8i1_1(<8 x i64> %x, <8 x i64> %y) {
; KNL-LABEL: kshiftl_v8i1_1:
diff --git a/llvm/test/CodeGen/X86/label-annotation.ll b/llvm/test/CodeGen/X86/label-annotation.ll
index 05e4e87ea21b2..239c48b20f4fd 100644
--- a/llvm/test/CodeGen/X86/label-annotation.ll
+++ b/llvm/test/CodeGen/X86/label-annotation.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-windows-msvc -O0 < %s | FileCheck %s
-; RUN: llc -mtriple=i686-windows-msvc < %s | FileCheck %s
-; RUN: llc -mtriple=i686-windows-msvc -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-windows-msvc -O0 < %s | FileCheck %s
; Source to regenerate:
; $ clang --target=x86_64-windows-msvc -S annotation.c -g -gcodeview -o t.ll \
diff --git a/llvm/test/CodeGen/X86/label-heapallocsite.ll b/llvm/test/CodeGen/X86/label-heapallocsite.ll
index 72834be6cadeb..d9bc441eaf472 100644
--- a/llvm/test/CodeGen/X86/label-heapallocsite.ll
+++ b/llvm/test/CodeGen/X86/label-heapallocsite.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s | FileCheck --check-prefixes=CHECK %s
-; RUN: llc -O0 < %s | FileCheck --check-prefixes=CHECK %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck --check-prefixes=CHECK %s
+; RUN: llc -combiner-topological-sorting -O0 < %s | FileCheck --check-prefixes=CHECK %s
; Source to regenerate:
diff --git a/llvm/test/CodeGen/X86/label-redefinition.ll b/llvm/test/CodeGen/X86/label-redefinition.ll
index fa6d8f4722d92..1241078cbc54a 100644
--- a/llvm/test/CodeGen/X86/label-redefinition.ll
+++ b/llvm/test/CodeGen/X86/label-redefinition.ll
@@ -1,5 +1,5 @@
; PR7054
-; RUN: not llc %s -o - 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting %s -o - 2>&1 | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
target triple = "i386-apple-darwin10.0.0"
diff --git a/llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll b/llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll
index 7bef94cca0d35..0ebd702f7ce8e 100644
--- a/llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll
+++ b/llvm/test/CodeGen/X86/lack-of-signed-truncation-check.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X64
; https://bugs.llvm.org/show_bug.cgi?id=38149
diff --git a/llvm/test/CodeGen/X86/lakemont.ll b/llvm/test/CodeGen/X86/lakemont.ll
index 49946890822f6..bced30b84bea3 100644
--- a/llvm/test/CodeGen/X86/lakemont.ll
+++ b/llvm/test/CodeGen/X86/lakemont.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=lakemont | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=lakemont | FileCheck %s
; Make sure -mcpu=lakemont implies soft floats.
define float @test(float %a, float %b) nounwind readnone {
diff --git a/llvm/test/CodeGen/X86/large-code-model-isel.ll b/llvm/test/CodeGen/X86/large-code-model-isel.ll
index 2d093eba99046..d453fbbb34f19 100644
--- a/llvm/test/CodeGen/X86/large-code-model-isel.ll
+++ b/llvm/test/CodeGen/X86/large-code-model-isel.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -code-model=large -mcpu=core2 -mtriple=x86_64-- -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -code-model=large -mcpu=core2 -mtriple=x86_64-- -O0 | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/large-code-model-sext-small-symbol.ll b/llvm/test/CodeGen/X86/large-code-model-sext-small-symbol.ll
index 0a4b3d3cff903..8e74fab7f0044 100644
--- a/llvm/test/CodeGen/X86/large-code-model-sext-small-symbol.ll
+++ b/llvm/test/CodeGen/X86/large-code-model-sext-small-symbol.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -verify-machineinstrs < %s -relocation-model=pic -code-model=large | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=pic -code-model=large | FileCheck %s
; ensure that emitted relocations are valid
-; RUN: llc -verify-machineinstrs < %s -relocation-model=pic -code-model=large -filetype=obj
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -relocation-model=pic -code-model=large -filetype=obj
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/large-constants-x32.ll b/llvm/test/CodeGen/X86/large-constants-x32.ll
index 5fe641aac1415..d06bd5f93a1d5 100644
--- a/llvm/test/CodeGen/X86/large-constants-x32.ll
+++ b/llvm/test/CodeGen/X86/large-constants-x32.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
define void @constant_expressions() {
; CHECK-LABEL: constant_expressions:
diff --git a/llvm/test/CodeGen/X86/large-constants.ll b/llvm/test/CodeGen/X86/large-constants.ll
index ee5b7017900dc..a6c2f34bf2038 100644
--- a/llvm/test/CodeGen/X86/large-constants.ll
+++ b/llvm/test/CodeGen/X86/large-constants.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-darwin -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-darwin -mcpu=corei7 | FileCheck %s
define i64 @constant_hoisting(i64 %o0, i64 %o1, i64 %o2, i64 %o3, i64 %o4, i64 %o5) {
; CHECK-LABEL: constant_hoisting:
diff --git a/llvm/test/CodeGen/X86/large-displacements-fastisel.ll b/llvm/test/CodeGen/X86/large-displacements-fastisel.ll
index 362b1b5da092d..879182c7a04f3 100644
--- a/llvm/test/CodeGen/X86/large-displacements-fastisel.ll
+++ b/llvm/test/CodeGen/X86/large-displacements-fastisel.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64 -O=0 -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -O=0 -verify-machineinstrs | FileCheck %s
@G = global i8 0
; Regression test for PR113856 - incorrect FastISel assert
diff --git a/llvm/test/CodeGen/X86/large-displacements.ll b/llvm/test/CodeGen/X86/large-displacements.ll
index d7085a56edbb9..eeb07c53c3426 100644
--- a/llvm/test/CodeGen/X86/large-displacements.ll
+++ b/llvm/test/CodeGen/X86/large-displacements.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple=i686 -filetype=null -verify-machineinstrs 2>&1 | FileCheck %s -check-prefix=ERR-i686
-; RUN: llc < %s -mtriple=x86_64 -verify-machineinstrs | FileCheck %s -check-prefix=x86_64
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=i686 -filetype=null -verify-machineinstrs 2>&1 | FileCheck %s -check-prefix=ERR-i686
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -verify-machineinstrs | FileCheck %s -check-prefix=x86_64
; Regression test for #121932, #113856, #106352, #69365, #25051 which are caused by
; an incorrectly written assertion for 64-bit offsets when compiling for 32-bit X86.
diff --git a/llvm/test/CodeGen/X86/large-gep-chain.ll b/llvm/test/CodeGen/X86/large-gep-chain.ll
index c752440c1ca65..c6a49180031f1 100644
--- a/llvm/test/CodeGen/X86/large-gep-chain.ll
+++ b/llvm/test/CodeGen/X86/large-gep-chain.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O0 -mtriple=i686-- -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=i686-- -o /dev/null
; <rdar://problem/12445434>
%0 = type { i32, ptr }
diff --git a/llvm/test/CodeGen/X86/large-gep-scale.ll b/llvm/test/CodeGen/X86/large-gep-scale.ll
index 7b672c9a36767..e6a1c006733f7 100644
--- a/llvm/test/CodeGen/X86/large-gep-scale.ll
+++ b/llvm/test/CodeGen/X86/large-gep-scale.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; PR5281
; After scaling, this type doesn't fit in memory. Codegen should generate
diff --git a/llvm/test/CodeGen/X86/large-global.ll b/llvm/test/CodeGen/X86/large-global.ll
index 7cb974b21e739..03a538c0e1345 100644
--- a/llvm/test/CodeGen/X86/large-global.ll
+++ b/llvm/test/CodeGen/X86/large-global.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx | FileCheck %s
; rdar://11729134
; EmitZerofill was incorrectly expecting a 32-bit "size" so 26214400000
diff --git a/llvm/test/CodeGen/X86/large-pic-jump-table.ll b/llvm/test/CodeGen/X86/large-pic-jump-table.ll
index 89e8521e700a0..7d4079753b4d8 100644
--- a/llvm/test/CodeGen/X86/large-pic-jump-table.ll
+++ b/llvm/test/CodeGen/X86/large-pic-jump-table.ll
@@ -1,4 +1,4 @@
-; RUN: llc -code-model=large -relocation-model=pic %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -code-model=large -relocation-model=pic %s -o - | FileCheck %s
target triple = "x86_64-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/large-pic-string.ll b/llvm/test/CodeGen/X86/large-pic-string.ll
index 5e7cdbb93dc88..2701d834cd559 100644
--- a/llvm/test/CodeGen/X86/large-pic-string.ll
+++ b/llvm/test/CodeGen/X86/large-pic-string.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s -code-model=large -relocation-model=pic -mtriple=x86_64--linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -code-model=large -relocation-model=pic -mtriple=x86_64--linux | FileCheck %s
@.str = private unnamed_addr constant [2 x i8] c"a\00", align 1
diff --git a/llvm/test/CodeGen/X86/late-address-taken.ll b/llvm/test/CodeGen/X86/late-address-taken.ll
index e44b072ad2379..031cf367bdeed 100644
--- a/llvm/test/CodeGen/X86/late-address-taken.ll
+++ b/llvm/test/CodeGen/X86/late-address-taken.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=x86_64-pc-windows-msvc < %s -enable-shrink-wrap=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc < %s -enable-shrink-wrap=false | FileCheck %s
; Make sure shrink-wrapping does not break the lowering of exception handling.
-; RUN: llc -mtriple=x86_64-pc-windows-msvc < %s -enable-shrink-wrap=true -pass-remarks-output=%t | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc < %s -enable-shrink-wrap=true -pass-remarks-output=%t | FileCheck %s
; RUN: cat %t | FileCheck %s --check-prefix=REMARKS
; Repro cases from PR25168
diff --git a/llvm/test/CodeGen/X86/ldexp-avx512.ll b/llvm/test/CodeGen/X86/ldexp-avx512.ll
index bb6dc3162eb1f..7bbe85c92a18e 100644
--- a/llvm/test/CodeGen/X86/ldexp-avx512.ll
+++ b/llvm/test/CodeGen/X86/ldexp-avx512.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512fp16 | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512FP16
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX512VLF
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl,+avx512fp16 | FileCheck %s --check-prefixes=CHECK,AVX512VLFP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512fp16 | FileCheck %s --check-prefixes=CHECK,AVX512,AVX512FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX512VLF
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512vl,+avx512fp16 | FileCheck %s --check-prefixes=CHECK,AVX512VLFP16
define half @test_half(half %x, i32 %exp) nounwind {
; AVX512F-LABEL: test_half:
diff --git a/llvm/test/CodeGen/X86/ldexp-f80.ll b/llvm/test/CodeGen/X86/ldexp-f80.ll
index 84d18d5888cf5..b41059f1a4aa1 100644
--- a/llvm/test/CodeGen/X86/ldexp-f80.ll
+++ b/llvm/test/CodeGen/X86/ldexp-f80.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck -check-prefixes=X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck -check-prefixes=X64 %s
; FIXME: Expansion without libcall
; XUN: llc -mtriple=i386-pc-win32 < %s | FileCheck -check-prefix=WIN32 %s
diff --git a/llvm/test/CodeGen/X86/ldexp-libcall.ll b/llvm/test/CodeGen/X86/ldexp-libcall.ll
index 74256c801d029..42136164548f8 100644
--- a/llvm/test/CodeGen/X86/ldexp-libcall.ll
+++ b/llvm/test/CodeGen/X86/ldexp-libcall.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
-; RUN: llc < %s -mtriple=i386-pc-win32 | FileCheck %s -check-prefix=CHECK-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-win32 | FileCheck %s -check-prefix=CHECK-WIN
define float @call_ldexpf(float %a, i32 %b) nounwind {
; CHECK-LABEL: call_ldexpf:
diff --git a/llvm/test/CodeGen/X86/ldexp-not-readonly.ll b/llvm/test/CodeGen/X86/ldexp-not-readonly.ll
index 9a67cf8b31714..349eb0d44ac40 100644
--- a/llvm/test/CodeGen/X86/ldexp-not-readonly.ll
+++ b/llvm/test/CodeGen/X86/ldexp-not-readonly.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
-; RUN: llc < %s -mtriple=i386-pc-win32 | FileCheck %s -check-prefix=CHECK-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-win32 | FileCheck %s -check-prefix=CHECK-WIN
define float @call_ldexpf(float %a, i32 %b) nounwind {
; CHECK-LABEL: call_ldexpf:
diff --git a/llvm/test/CodeGen/X86/ldexp-strict.ll b/llvm/test/CodeGen/X86/ldexp-strict.ll
index f13c59da46c23..1d29a59176973 100644
--- a/llvm/test/CodeGen/X86/ldexp-strict.ll
+++ b/llvm/test/CodeGen/X86/ldexp-strict.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck -check-prefixes=X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck -check-prefixes=X64 %s
; XUN: llc -mtriple=i386-pc-win32 < %s | FileCheck -check-prefix=WIN32 %s
; FIXME: Expansion support without libcalls
diff --git a/llvm/test/CodeGen/X86/ldexp-wrong-signature.ll b/llvm/test/CodeGen/X86/ldexp-wrong-signature.ll
index b4ba53f80ad5b..9e2c0451eba0e 100644
--- a/llvm/test/CodeGen/X86/ldexp-wrong-signature.ll
+++ b/llvm/test/CodeGen/X86/ldexp-wrong-signature.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
-; RUN: llc < %s -mtriple=i386-pc-win32 | FileCheck %s -check-prefix=CHECK-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-win32 | FileCheck %s -check-prefix=CHECK-WIN
define float @ldexpf_too_many_args(float %a, i32 %b, i32 %c) nounwind {
; CHECK-LABEL: ldexpf_too_many_args:
diff --git a/llvm/test/CodeGen/X86/ldexp-wrong-signature2.ll b/llvm/test/CodeGen/X86/ldexp-wrong-signature2.ll
index d48c1c2e0a9a7..4c5623c7b3390 100644
--- a/llvm/test/CodeGen/X86/ldexp-wrong-signature2.ll
+++ b/llvm/test/CodeGen/X86/ldexp-wrong-signature2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
-; RUN: llc < %s -mtriple=i386-pc-win32 | FileCheck %s -check-prefix=CHECK-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-win32 | FileCheck %s -check-prefix=CHECK-WIN
define i32 @ldexpf_not_fp(i32 %a, i32 %b) nounwind {
; CHECK-LABEL: ldexpf_not_fp:
diff --git a/llvm/test/CodeGen/X86/ldexp.ll b/llvm/test/CodeGen/X86/ldexp.ll
index 59ec7bfcaa910..1692a730e94dc 100644
--- a/llvm/test/CodeGen/X86/ldexp.ll
+++ b/llvm/test/CodeGen/X86/ldexp.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -mtriple=x86_64-unknown-unknown -verify-machineinstrs < %s | FileCheck -check-prefixes=X64 %s
-; RUN: llc -mtriple=x86_64-pc-win32 -verify-machineinstrs < %s | FileCheck -check-prefixes=WIN64 %s
-; RUN: llc -mtriple=i386-pc-win32 -verify-machineinstrs < %s | FileCheck -check-prefix=WIN32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -verify-machineinstrs < %s | FileCheck -check-prefixes=X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-win32 -verify-machineinstrs < %s | FileCheck -check-prefixes=WIN64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-win32 -verify-machineinstrs < %s | FileCheck -check-prefix=WIN32 %s
define float @ldexp_f32(i8 zeroext %x) nounwind {
; X64-LABEL: ldexp_f32:
diff --git a/llvm/test/CodeGen/X86/ldzero.ll b/llvm/test/CodeGen/X86/ldzero.ll
index e4385af17fe4f..ea5e97ff577fc 100644
--- a/llvm/test/CodeGen/X86/ldzero.ll
+++ b/llvm/test/CodeGen/X86/ldzero.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; verify PR 1700 is still fixed
; ModuleID = 'hh.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/lea-16bit.ll b/llvm/test/CodeGen/X86/lea-16bit.ll
index 40da01d9ab8f3..c840938f12427 100644
--- a/llvm/test/CodeGen/X86/lea-16bit.ll
+++ b/llvm/test/CodeGen/X86/lea-16bit.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=NO-NDD
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+ndd | FileCheck %s --check-prefix=NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=NO-NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+ndd | FileCheck %s --check-prefix=NDD
define i16 @lea16bit(i16 %in) {
; NO-NDD-LABEL: lea16bit:
diff --git a/llvm/test/CodeGen/X86/lea-2.ll b/llvm/test/CodeGen/X86/lea-2.ll
index 0883a8e726e25..c06571837f205 100644
--- a/llvm/test/CodeGen/X86/lea-2.ll
+++ b/llvm/test/CodeGen/X86/lea-2.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s --check-prefix=X64
; The computation of %t4 should match a single lea, without using actual add instructions.
diff --git a/llvm/test/CodeGen/X86/lea-3.ll b/llvm/test/CodeGen/X86/lea-3.ll
index 2cbefc0689c11..d04c929229617 100644
--- a/llvm/test/CodeGen/X86/lea-3.ll
+++ b/llvm/test/CodeGen/X86/lea-3.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=WIN32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=WIN32
define i64 @test2(i64 %a) {
; CHECK-LABEL: test2:
diff --git a/llvm/test/CodeGen/X86/lea-4.ll b/llvm/test/CodeGen/X86/lea-4.ll
index c33697e0abf3d..1a9be48befddf 100644
--- a/llvm/test/CodeGen/X86/lea-4.ll
+++ b/llvm/test/CodeGen/X86/lea-4.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
define zeroext i16 @t1(i32 %on_off) nounwind {
; CHECK-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/lea-5.ll b/llvm/test/CodeGen/X86/lea-5.ll
index 39051eac45d7d..0320ce1f39810 100644
--- a/llvm/test/CodeGen/X86/lea-5.ll
+++ b/llvm/test/CodeGen/X86/lea-5.ll
@@ -2,8 +2,8 @@
; in loop optimized cases.
; See also http://llvm.org/bugs/show_bug.cgi?id=20016
-; RUN: llc < %s -mtriple=x86_64-linux -O2 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -O2 | FileCheck %s -check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -O2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 -O2 | FileCheck %s -check-prefix=X32
; Function Attrs: nounwind readnone uwtable
define void @foo(i32 %x, i32 %d) #0 {
diff --git a/llvm/test/CodeGen/X86/lea-8bit.ll b/llvm/test/CodeGen/X86/lea-8bit.ll
index fc295f75e23c7..4b4d02bf55c4a 100644
--- a/llvm/test/CodeGen/X86/lea-8bit.ll
+++ b/llvm/test/CodeGen/X86/lea-8bit.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=NO-NDD
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+ndd | FileCheck %s --check-prefix=NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=NO-NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+ndd | FileCheck %s --check-prefix=NDD
define i8 @lea8bit(i8 %in) {
; NO-NDD-LABEL: lea8bit:
diff --git a/llvm/test/CodeGen/X86/lea-dagdag.ll b/llvm/test/CodeGen/X86/lea-dagdag.ll
index f81851a92d8de..e6e9cd36c237b 100644
--- a/llvm/test/CodeGen/X86/lea-dagdag.ll
+++ b/llvm/test/CodeGen/X86/lea-dagdag.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+slow-3ops-lea | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-slow-3ops-lea | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+slow-3ops-lea | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-slow-3ops-lea | FileCheck %s
define i16 @and_i8_zext_shl_add_i16(i16 %t0, i8 %t1) {
; CHECK-LABEL: and_i8_zext_shl_add_i16:
diff --git a/llvm/test/CodeGen/X86/lea-opt-cse1.ll b/llvm/test/CodeGen/X86/lea-opt-cse1.ll
index 5ceca9fbd9b5f..16fbab2789ddf 100644
--- a/llvm/test/CodeGen/X86/lea-opt-cse1.ll
+++ b/llvm/test/CodeGen/X86/lea-opt-cse1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86
%struct.SA = type { i32 , i32 , i32 , i32 ,i32 }
diff --git a/llvm/test/CodeGen/X86/lea-opt-cse2.ll b/llvm/test/CodeGen/X86/lea-opt-cse2.ll
index e39d01f1447f8..af382a576724c 100644
--- a/llvm/test/CodeGen/X86/lea-opt-cse2.ll
+++ b/llvm/test/CodeGen/X86/lea-opt-cse2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86
%struct.SA = type { i32 , i32 , i32 , i32 , i32};
diff --git a/llvm/test/CodeGen/X86/lea-opt-cse3.ll b/llvm/test/CodeGen/X86/lea-opt-cse3.ll
index 93e4fa77b5629..c8e7a241b01be 100644
--- a/llvm/test/CodeGen/X86/lea-opt-cse3.ll
+++ b/llvm/test/CodeGen/X86/lea-opt-cse3.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86
define i32 @foo(i32 %a, i32 %b) local_unnamed_addr #0 {
; X64-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/lea-opt-cse4.ll b/llvm/test/CodeGen/X86/lea-opt-cse4.ll
index 4fa9acd99bb2f..213af9bad979a 100644
--- a/llvm/test/CodeGen/X86/lea-opt-cse4.ll
+++ b/llvm/test/CodeGen/X86/lea-opt-cse4.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s -check-prefix=X86
%struct.SA = type { i32 , i32 , i32 , i32 , i32};
diff --git a/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll b/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll
index 96780af0d0fd1..6e9f834abacbb 100644
--- a/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll
+++ b/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck %s
; PR26575
; Assertion `(Disp->isImm() || Disp->isGlobal()) && (Other.Disp->isImm() || Other.Disp->isGlobal()) && "Address displacement operand is always an immediate or a global"' failed.
diff --git a/llvm/test/CodeGen/X86/lea-opt-memop-check-2.ll b/llvm/test/CodeGen/X86/lea-opt-memop-check-2.ll
index eed26c0901a49..bc76e0a24bb1e 100644
--- a/llvm/test/CodeGen/X86/lea-opt-memop-check-2.ll
+++ b/llvm/test/CodeGen/X86/lea-opt-memop-check-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7 -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=corei7 -relocation-model=pic | FileCheck %s
; PR27502
; UNREACHABLE: "Invalid address displacement operand"
diff --git a/llvm/test/CodeGen/X86/lea-opt.ll b/llvm/test/CodeGen/X86/lea-opt.ll
index 88712328e54a7..80b7cfbea89da 100644
--- a/llvm/test/CodeGen/X86/lea-opt.ll
+++ b/llvm/test/CodeGen/X86/lea-opt.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=CHECK -check-prefix=ENABLED
-; RUN: llc --disable-x86-lea-opt < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=CHECK -check-prefix=DISABLED
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=CHECK -check-prefix=ENABLED
+; RUN: llc -combiner-topological-sorting --disable-x86-lea-opt < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=CHECK -check-prefix=DISABLED
%struct.anon1 = type { i32, i32, i32 }
%struct.anon2 = type { i32, [32 x i32], i32 }
diff --git a/llvm/test/CodeGen/X86/lea-opt2.ll b/llvm/test/CodeGen/X86/lea-opt2.ll
index f7588577a3e9a..e403161f50b4f 100644
--- a/llvm/test/CodeGen/X86/lea-opt2.ll
+++ b/llvm/test/CodeGen/X86/lea-opt2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -verify-machineinstrs | FileCheck %s
; This file tests following optimization
;
diff --git a/llvm/test/CodeGen/X86/lea.ll b/llvm/test/CodeGen/X86/lea.ll
index 28c66b94a69eb..0ff021975a63e 100644
--- a/llvm/test/CodeGen/X86/lea.ll
+++ b/llvm/test/CodeGen/X86/lea.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=LINUX
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefixes=WIN
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s --check-prefixes=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefixes=WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s --check-prefixes=LINUX
define i32 @test1(i32 %x) nounwind {
; LINUX-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/leaf-fp-elim.ll b/llvm/test/CodeGen/X86/leaf-fp-elim.ll
index c8472331c97e4..01e8b467ca168 100644
--- a/llvm/test/CodeGen/X86/leaf-fp-elim.ll
+++ b/llvm/test/CodeGen/X86/leaf-fp-elim.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=pic -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -mtriple=x86_64-apple-darwin | FileCheck %s
; <rdar://problem/8170192>
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin11.0"
diff --git a/llvm/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll b/llvm/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll
index 0906773145beb..f6154e7d32a23 100644
--- a/llvm/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll
+++ b/llvm/test/CodeGen/X86/legalize-fmp-oeq-vector-select.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-- -enable-legalize-types-checking < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -enable-legalize-types-checking < %s
; PR5092
define <4 x float> @bug(float %a) nounwind {
diff --git a/llvm/test/CodeGen/X86/legalize-ins-ext-vec-elt.ll b/llvm/test/CodeGen/X86/legalize-ins-ext-vec-elt.ll
index 7b517c2ca574f..1011d4c05bd37 100644
--- a/llvm/test/CodeGen/X86/legalize-ins-ext-vec-elt.ll
+++ b/llvm/test/CodeGen/X86/legalize-ins-ext-vec-elt.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64-- -o - %s| FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -o - %s| FileCheck %s
; Verify that we support non byte-sized elements, together with variable index.
diff --git a/llvm/test/CodeGen/X86/legalize-libcalls.ll b/llvm/test/CodeGen/X86/legalize-libcalls.ll
index de8285b0dc235..5079652d24207 100644
--- a/llvm/test/CodeGen/X86/legalize-libcalls.ll
+++ b/llvm/test/CodeGen/X86/legalize-libcalls.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i686-- < %s
-; RUN: llc -mtriple=x86_64-- < %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"
diff --git a/llvm/test/CodeGen/X86/legalize-shift-64.ll b/llvm/test/CodeGen/X86/legalize-shift-64.ll
index 53208de7ea27e..d192263263ba4 100644
--- a/llvm/test/CodeGen/X86/legalize-shift-64.ll
+++ b/llvm/test/CodeGen/X86/legalize-shift-64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s
define i64 @test1(i32 %xx, i32 %test) nounwind {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/legalize-shl-vec.ll b/llvm/test/CodeGen/X86/legalize-shl-vec.ll
index 4cfb050958abb..f0f235143fe9d 100644
--- a/llvm/test/CodeGen/X86/legalize-shl-vec.ll
+++ b/llvm/test/CodeGen/X86/legalize-shl-vec.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
define <2 x i256> @test_shl(<2 x i256> %In) nounwind {
; X86-LABEL: test_shl:
diff --git a/llvm/test/CodeGen/X86/legalize-sub-zero-2.ll b/llvm/test/CodeGen/X86/legalize-sub-zero-2.ll
index 1d00764beaa81..6243c6892fc7e 100644
--- a/llvm/test/CodeGen/X86/legalize-sub-zero-2.ll
+++ b/llvm/test/CodeGen/X86/legalize-sub-zero-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin
define fastcc void @foo(i32 %type, i1 %arg) nounwind optsize {
entry:
diff --git a/llvm/test/CodeGen/X86/legalize-sub-zero.ll b/llvm/test/CodeGen/X86/legalize-sub-zero.ll
index 296ae3f9e8823..e07f93faf4a35 100644
--- a/llvm/test/CodeGen/X86/legalize-sub-zero.ll
+++ b/llvm/test/CodeGen/X86/legalize-sub-zero.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck %s
;target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
;target triple = "i686-pc-win32"
diff --git a/llvm/test/CodeGen/X86/legalize-types-remapid.ll b/llvm/test/CodeGen/X86/legalize-types-remapid.ll
index 81f14b34d0283..39fa73e48bd3a 100644
--- a/llvm/test/CodeGen/X86/legalize-types-remapid.ll
+++ b/llvm/test/CodeGen/X86/legalize-types-remapid.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i386 -mcpu=generic -O0 -o /dev/null %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386 -mcpu=generic -O0 -o /dev/null %s
@c = global i32 0
@d = global <2 x i64> zeroinitializer
diff --git a/llvm/test/CodeGen/X86/legalize-vec-assertzext.ll b/llvm/test/CodeGen/X86/legalize-vec-assertzext.ll
index 1799dd3832aad..d458762382007 100644
--- a/llvm/test/CodeGen/X86/legalize-vec-assertzext.ll
+++ b/llvm/test/CodeGen/X86/legalize-vec-assertzext.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s
define i64 @split_assertzext(ptr %x) nounwind {
; CHECK-LABEL: split_assertzext:
diff --git a/llvm/test/CodeGen/X86/legalizedag_vec.ll b/llvm/test/CodeGen/X86/legalizedag_vec.ll
index e15e39c5c0ba2..0a63b890898f7 100644
--- a/llvm/test/CodeGen/X86/legalizedag_vec.ll
+++ b/llvm/test/CodeGen/X86/legalizedag_vec.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=sse2 | FileCheck %s
; Test case for r63760 where we generate a legalization assert that an illegal
diff --git a/llvm/test/CodeGen/X86/licm-dominance.ll b/llvm/test/CodeGen/X86/licm-dominance.ll
index 42a1533115049..b1c9a9bbf5720 100644
--- a/llvm/test/CodeGen/X86/licm-dominance.ll
+++ b/llvm/test/CodeGen/X86/licm-dominance.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --force-update
-; RUN: llc -asm-verbose=true < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -asm-verbose=true < %s | FileCheck %s
; MachineLICM should check dominance before hoisting instructions.
; only the load of a0 is guaranteed to execute, so only it can be hoisted.
diff --git a/llvm/test/CodeGen/X86/licm-nested.ll b/llvm/test/CodeGen/X86/licm-nested.ll
index fe50249e87495..75097648d2609 100644
--- a/llvm/test/CodeGen/X86/licm-nested.ll
+++ b/llvm/test/CodeGen/X86/licm-nested.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc -mtriple=x86_64-apple-darwin < %s -o /dev/null -stats -info-output-file - | grep "hoisted out of loops" | grep 3
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin < %s -o /dev/null -stats -info-output-file - | grep "hoisted out of loops" | grep 3
; MachineLICM should be able to hoist the symbolic addresses out of
; the inner loops.
diff --git a/llvm/test/CodeGen/X86/licm-regpressure.ll b/llvm/test/CodeGen/X86/licm-regpressure.ll
index 26ed2a37fb647..1135575651653 100644
--- a/llvm/test/CodeGen/X86/licm-regpressure.ll
+++ b/llvm/test/CodeGen/X86/licm-regpressure.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-linux -stop-after=early-machinelicm -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -stop-after=early-machinelicm -o - | FileCheck %s
; FIXME: MachineLICM does not compute register pressure correctly and we end up
; emitting too many ADD64ri32s. More details: llvm.org/PR23143
diff --git a/llvm/test/CodeGen/X86/licm-symbol.ll b/llvm/test/CodeGen/X86/licm-symbol.ll
index 4e33d000c56da..17be388fafe70 100644
--- a/llvm/test/CodeGen/X86/licm-symbol.ll
+++ b/llvm/test/CodeGen/X86/licm-symbol.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; MachineLICM should be able to hoist the sF reference out of the loop.
diff --git a/llvm/test/CodeGen/X86/limited-prec.ll b/llvm/test/CodeGen/X86/limited-prec.ll
index b2b722841eff3..c426a6f3c1f7f 100644
--- a/llvm/test/CodeGen/X86/limited-prec.ll
+++ b/llvm/test/CodeGen/X86/limited-prec.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -limit-float-precision=6 -mtriple=i686-- | FileCheck %s --check-prefix=precision6
-; RUN: llc < %s -limit-float-precision=12 -mtriple=i686-- | FileCheck %s --check-prefix=precision12
-; RUN: llc < %s -limit-float-precision=18 -mtriple=i686-- | FileCheck %s --check-prefix=precision18
+; RUN: llc -combiner-topological-sorting < %s -limit-float-precision=6 -mtriple=i686-- | FileCheck %s --check-prefix=precision6
+; RUN: llc -combiner-topological-sorting < %s -limit-float-precision=12 -mtriple=i686-- | FileCheck %s --check-prefix=precision12
+; RUN: llc -combiner-topological-sorting < %s -limit-float-precision=18 -mtriple=i686-- | FileCheck %s --check-prefix=precision18
define float @f1(float %x) nounwind noinline {
; precision6-LABEL: f1:
diff --git a/llvm/test/CodeGen/X86/line-zero-prologue-end.ll b/llvm/test/CodeGen/X86/line-zero-prologue-end.ll
index c15751b488002..39978123c30b0 100644
--- a/llvm/test/CodeGen/X86/line-zero-prologue-end.ll
+++ b/llvm/test/CodeGen/X86/line-zero-prologue-end.ll
@@ -1,4 +1,4 @@
-; RUN: llc -filetype=asm -mtriple=x86_64-apple-macosx12.0.0 -O0 %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -filetype=asm -mtriple=x86_64-apple-macosx12.0.0 -O0 %s -o - | FileCheck %s
; CHECK: Lfunc_begin0:
; CHECK-NEXT: .file{{.+}}
; CHECK-NEXT: .loc 1 2 0 ## test/test.c:2:0{{$}}
diff --git a/llvm/test/CodeGen/X86/linux-preemption.ll b/llvm/test/CodeGen/X86/linux-preemption.ll
index dc06a34e1c692..46b2c5c17c5f0 100644
--- a/llvm/test/CodeGen/X86/linux-preemption.ll
+++ b/llvm/test/CodeGen/X86/linux-preemption.ll
@@ -1,13 +1,13 @@
-; RUN: llc -mtriple x86_64-pc-linux -relocation-model=static < %s | \
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux -relocation-model=static < %s | \
; RUN: FileCheck --check-prefixes=COMMON,STATIC %s
-; RUN: llc -mtriple x86_64-pc-linux -relocation-model=pic < %s | \
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux -relocation-model=pic < %s | \
; RUN: FileCheck --check-prefixes=COMMON,CHECK %s
-; RUN: llc -mtriple x86_64-pc-linux -relocation-model=dynamic-no-pic < %s | \
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux -relocation-model=dynamic-no-pic < %s | \
; RUN: FileCheck --check-prefixes=COMMON,CHECK %s
; 32 bits
-; RUN: llc -mtriple i386-pc-linux \
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-linux \
; RUN: -relocation-model=pic < %s | FileCheck --check-prefix=CHECK32 %s
; globals
diff --git a/llvm/test/CodeGen/X86/live-out-reg-info.ll b/llvm/test/CodeGen/X86/live-out-reg-info.ll
index f56397e88fd34..20c34a2934620 100644
--- a/llvm/test/CodeGen/X86/live-out-reg-info.ll
+++ b/llvm/test/CodeGen/X86/live-out-reg-info.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; Make sure dagcombine doesn't eliminate the comparison due
; to an off-by-one bug with computeKnownBits information.
diff --git a/llvm/test/CodeGen/X86/live-range-nosubreg.ll b/llvm/test/CodeGen/X86/live-range-nosubreg.ll
index 6e6f18082f830..46ba5b7157909 100644
--- a/llvm/test/CodeGen/X86/live-range-nosubreg.ll
+++ b/llvm/test/CodeGen/X86/live-range-nosubreg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; This testcase used to crash. See PR29132.
diff --git a/llvm/test/CodeGen/X86/live-vars.ll b/llvm/test/CodeGen/X86/live-vars.ll
index aa2448989059b..5a5341d339081 100644
--- a/llvm/test/CodeGen/X86/live-vars.ll
+++ b/llvm/test/CodeGen/X86/live-vars.ll
@@ -1,4 +1,4 @@
-; RUN: llc -enable-new-pm -mtriple=x86_64-unknown -stop-after=x86-isel %s -o - | llc -passes='print<live-vars>' -x mir 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -enable-new-pm -mtriple=x86_64-unknown -stop-after=x86-isel %s -o - | llc -combiner-topological-sorting -passes='print<live-vars>' -x mir 2>&1 | FileCheck %s
define i32 @foo(i32 noundef %0) local_unnamed_addr {
%2 = icmp eq i32 %0, 0
diff --git a/llvm/test/CodeGen/X86/liveness-local-regalloc.ll b/llvm/test/CodeGen/X86/liveness-local-regalloc.ll
index c4293ec42a578..7504262d65e4f 100644
--- a/llvm/test/CodeGen/X86/liveness-local-regalloc.ll
+++ b/llvm/test/CodeGen/X86/liveness-local-regalloc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs -mtriple=x86_64-apple-darwin10
+; RUN: llc -combiner-topological-sorting < %s -regalloc=fast -optimize-regalloc=0 -verify-machineinstrs -mtriple=x86_64-apple-darwin10
; <rdar://problem/7755473>
; PR12821
diff --git a/llvm/test/CodeGen/X86/llc-accept-avx10-512.ll b/llvm/test/CodeGen/X86/llc-accept-avx10-512.ll
index b5c9895fefd98..f0878dd2de8a5 100644
--- a/llvm/test/CodeGen/X86/llc-accept-avx10-512.ll
+++ b/llvm/test/CodeGen/X86/llc-accept-avx10-512.ll
@@ -2,9 +2,9 @@
; avx10.x-512 is just avx10.x -- 512 is kept for compatibility purposes.
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.1-512 2>&1 | FileCheck --check-prefixes=CHECK-AVX10_1 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.1-512 2>&1 | FileCheck --check-prefixes=CHECK-AVX10_1 %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2-512 2>&1 | FileCheck --check-prefixes=CHECK-AVX10_2 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx10.2-512 2>&1 | FileCheck --check-prefixes=CHECK-AVX10_2 %s
; CHECK-AVX10_1-NOT: is not recognizable
; CHECK-AVX10_2-NOT: is not recognizable
diff --git a/llvm/test/CodeGen/X86/llc-fp-contract-warning.ll b/llvm/test/CodeGen/X86/llc-fp-contract-warning.ll
index 2802593c733e0..5829a876cf0e7 100644
--- a/llvm/test/CodeGen/X86/llc-fp-contract-warning.ll
+++ b/llvm/test/CodeGen/X86/llc-fp-contract-warning.ll
@@ -1,9 +1,9 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown --fp-contract=fast 2>&1 | grep "X86 backend ignores --fp-contract"
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown --fp-contract=fast 2>&1 | grep "X86 backend ignores --fp-contract"
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown --fp-contract=off 2>&1 | grep "X86 backend ignores --fp-contract"
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown --fp-contract=off 2>&1 | grep "X86 backend ignores --fp-contract"
; on, as a default setting that's passed to backend when no --fp-contract option is specified, is not diagnosed.
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown --fp-contract=on 2>&1 | grep -v "X86 backend ignores --fp-contract"
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown --fp-contract=on 2>&1 | grep -v "X86 backend ignores --fp-contract"
define float @foo(float %f) {
%res = fadd float %f, %f
diff --git a/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll b/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll
index 7bed0802a51d4..230ca718606aa 100644
--- a/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll
+++ b/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=broadwell | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=broadwell | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s
; Check that llc can set function attributes target-cpu and target-features
; using command line options -mcpu and -mattr.
diff --git a/llvm/test/CodeGen/X86/llc-pipeline-npm.ll b/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
index c4b886d7ff170..286149a81f192 100644
--- a/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+++ b/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
@@ -1,13 +1,13 @@
-; RUN: llc -enable-new-pm -mtriple=x86_64 -O0 -print-pipeline-passes < %s 2>&1 \
+; RUN: llc -combiner-topological-sorting -enable-new-pm -mtriple=x86_64 -O0 -print-pipeline-passes < %s 2>&1 \
; RUN: | tr ',' '\n' | FileCheck -check-prefix=O0 %s
-; RUN: llc -enable-new-pm -mtriple=x86_64 -O2 -print-pipeline-passes < %s 2>&1 \
+; RUN: llc -combiner-topological-sorting -enable-new-pm -mtriple=x86_64 -O2 -print-pipeline-passes < %s 2>&1 \
; RUN: | tr ',' '\n' | FileCheck -check-prefix=O2 %s
-; RUN: llc -enable-new-pm -mtriple=x86_64-windows -O0 -print-pipeline-passes < %s 2>&1 \
+; RUN: llc -combiner-topological-sorting -enable-new-pm -mtriple=x86_64-windows -O0 -print-pipeline-passes < %s 2>&1 \
; RUN: | tr ',' '\n' | FileCheck -check-prefix=O0-WINDOWS %s
-; RUN: llc -enable-new-pm -mtriple=x86_64-windows -O3 -print-pipeline-passes < %s 2>&1 \
+; RUN: llc -combiner-topological-sorting -enable-new-pm -mtriple=x86_64-windows -O3 -print-pipeline-passes < %s 2>&1 \
; RUN: | tr ',' '\n' | FileCheck -check-prefix=O3-WINDOWS %s
; O0: require<MachineModuleAnalysis>
diff --git a/llvm/test/CodeGen/X86/llc-start-stop-instance.ll b/llvm/test/CodeGen/X86/llc-start-stop-instance.ll
index 89a77fc44f3e9..54156ab41e415 100644
--- a/llvm/test/CodeGen/X86/llc-start-stop-instance.ll
+++ b/llvm/test/CodeGen/X86/llc-start-stop-instance.ll
@@ -1,18 +1,18 @@
-; RUN: llc -mtriple=x86_64-- -debug-pass=Structure -stop-after=dead-mi-elimination,1 %s -o /dev/null 2>&1 \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -debug-pass=Structure -stop-after=dead-mi-elimination,1 %s -o /dev/null 2>&1 \
; RUN: | FileCheck -check-prefix=STOP-AFTER-DEAD1 %s
-; RUN: llc -mtriple=x86_64-- -debug-pass=Structure -stop-after=dead-mi-elimination,0 %s -o /dev/null 2>&1 \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -debug-pass=Structure -stop-after=dead-mi-elimination,0 %s -o /dev/null 2>&1 \
; RUN: | FileCheck -check-prefix=STOP-AFTER-DEAD0 %s
-; RUN: llc -mtriple=x86_64-- -debug-pass=Structure -stop-before=dead-mi-elimination,1 %s -o /dev/null 2>&1 \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -debug-pass=Structure -stop-before=dead-mi-elimination,1 %s -o /dev/null 2>&1 \
; RUN: | FileCheck -check-prefix=STOP-BEFORE-DEAD1 %s
-; RUN: llc -mtriple=x86_64-- -debug-pass=Structure -start-before=dead-mi-elimination,1 %s -o /dev/null 2>&1 \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -debug-pass=Structure -start-before=dead-mi-elimination,1 %s -o /dev/null 2>&1 \
; RUN: | FileCheck -check-prefix=START-BEFORE-DEAD1 %s
-; RUN: llc -mtriple=x86_64-- -debug-pass=Structure -start-after=dead-mi-elimination,1 %s -o /dev/null 2>&1 \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -debug-pass=Structure -start-after=dead-mi-elimination,1 %s -o /dev/null 2>&1 \
; RUN: | FileCheck -check-prefix=START-AFTER-DEAD1 %s
diff --git a/llvm/test/CodeGen/X86/llrint-conv.ll b/llvm/test/CodeGen/X86/llrint-conv.ll
index 01551030d938a..0d7099d0bbabd 100644
--- a/llvm/test/CodeGen/X86/llrint-conv.ll
+++ b/llvm/test/CodeGen/X86/llrint-conv.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
-; RUN: llc < %s -mtriple=i686-unknown -mattr=-x87 | FileCheck %s --check-prefixes=X86-NOX87
-; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
-; RUN: llc < %s -mtriple=i686-unknown -mattr=avx | FileCheck %s --check-prefixes=X86,X86-AVX
-; RUN: llc < %s -mtriple=i686-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=X64,X64-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64,X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=-x87 | FileCheck %s --check-prefixes=X86-NOX87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=avx | FileCheck %s --check-prefixes=X86,X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=X64,X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64,X64-AVX
define i64 @test_llrint_i64_f16(half %x) nounwind {
; X86-NOSSE-LABEL: test_llrint_i64_f16:
diff --git a/llvm/test/CodeGen/X86/llround-conv.ll b/llvm/test/CodeGen/X86/llround-conv.ll
index 93fec71b6eccc..8c778daf9e116 100644
--- a/llvm/test/CodeGen/X86/llround-conv.ll
+++ b/llvm/test/CodeGen/X86/llround-conv.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
-; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define i64 @test_llround_f16(half %x) nounwind {
; X86-NOSSE-LABEL: test_llround_f16:
diff --git a/llvm/test/CodeGen/X86/llvm.frexp.f80.ll b/llvm/test/CodeGen/X86/llvm.frexp.f80.ll
index 61e2bba822017..7ab3c888a9055 100644
--- a/llvm/test/CodeGen/X86/llvm.frexp.f80.ll
+++ b/llvm/test/CodeGen/X86/llvm.frexp.f80.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; FIXME: Expansion for f80
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck -check-prefixes=X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck -check-prefixes=X64 %s
; XUN: llc -mtriple=i386-pc-win32 < %s | FileCheck -check-prefix=X64 %s
define { x86_fp80, i32 } @test_frexp_f80_i32(x86_fp80 %a) nounwind {
diff --git a/llvm/test/CodeGen/X86/llvm.modf-win32.ll b/llvm/test/CodeGen/X86/llvm.modf-win32.ll
index 70ce773dda482..fa4736ac47315 100644
--- a/llvm/test/CodeGen/X86/llvm.modf-win32.ll
+++ b/llvm/test/CodeGen/X86/llvm.modf-win32.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=i386-pc-win32 < %s | FileCheck -check-prefix=WIN32 %s
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck -check-prefixes=X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-win32 < %s | FileCheck -check-prefix=WIN32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck -check-prefixes=X64 %s
; On 32-bit windows this should be promoted to a call to modf (not modff).
define { float, float } @test_modf_f32(float %a) {
diff --git a/llvm/test/CodeGen/X86/llvm.sincos.vec.ll b/llvm/test/CodeGen/X86/llvm.sincos.vec.ll
index 9b02438952035..19a4c1adef71a 100644
--- a/llvm/test/CodeGen/X86/llvm.sincos.vec.ll
+++ b/llvm/test/CodeGen/X86/llvm.sincos.vec.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --version 5
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.9.0 | FileCheck --check-prefix=MACOS-SINCOS-STRET %s
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.8.0 | FileCheck --check-prefix=MACOS-NOSINCOS-STRET %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu | FileCheck -check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck -check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.9.0 | FileCheck --check-prefix=MACOS-SINCOS-STRET %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.8.0 | FileCheck --check-prefix=MACOS-NOSINCOS-STRET %s
define void @test_sincos_v4f32(<4 x float> %x, ptr noalias %out_sin, ptr noalias %out_cos) nounwind {
; X86-LABEL: test_sincos_v4f32:
diff --git a/llvm/test/CodeGen/X86/llvm.sincospi.ll b/llvm/test/CodeGen/X86/llvm.sincospi.ll
index 5546c66deba30..e15507690de39 100644
--- a/llvm/test/CodeGen/X86/llvm.sincospi.ll
+++ b/llvm/test/CodeGen/X86/llvm.sincospi.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -mtriple=x86_64-apple-macosx10.9 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx10.9 < %s | FileCheck %s
define { half, half } @test_sincospi_f16(half %a) #0 {
; CHECK-LABEL: test_sincospi_f16:
diff --git a/llvm/test/CodeGen/X86/load-combine-dbg.ll b/llvm/test/CodeGen/X86/load-combine-dbg.ll
index c3885f60ab4de..4865c90b9852a 100644
--- a/llvm/test/CodeGen/X86/load-combine-dbg.ll
+++ b/llvm/test/CodeGen/X86/load-combine-dbg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 < %s -mtriple=x86_64-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 < %s -mtriple=x86_64-unknown | FileCheck %s
; This was extracted from a swift debugger stepping testcase and checks that the
; fold (zext (load x)) -> (zext (truncate (zextload x)))
; rule propagates the SDLoc of the load to the zextload.
diff --git a/llvm/test/CodeGen/X86/load-local-v4i5.ll b/llvm/test/CodeGen/X86/load-local-v4i5.ll
index 1d119b1dfefc2..b57c824676155 100644
--- a/llvm/test/CodeGen/X86/load-local-v4i5.ll
+++ b/llvm/test/CodeGen/X86/load-local-v4i5.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
@0 = internal unnamed_addr constant [4 x i5] [i5 2, i5 0, i5 2, i5 -1], align 1
; Function Attrs: nobuiltin nounwind
diff --git a/llvm/test/CodeGen/X86/load-partial-dot-product.ll b/llvm/test/CodeGen/X86/load-partial-dot-product.ll
index e74e7012942c1..cb3f0a3bf59f9 100644
--- a/llvm/test/CodeGen/X86/load-partial-dot-product.ll
+++ b/llvm/test/CodeGen/X86/load-partial-dot-product.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
; Partial load dot product patterns based off PR51075
diff --git a/llvm/test/CodeGen/X86/load-sample-profile-2.ll b/llvm/test/CodeGen/X86/load-sample-profile-2.ll
index f608d22843d56..65865d0a319fe 100644
--- a/llvm/test/CodeGen/X86/load-sample-profile-2.ll
+++ b/llvm/test/CodeGen/X86/load-sample-profile-2.ll
@@ -1,5 +1,5 @@
;;; MFS with sample profile fails when no -enable-fs-discriminator=true.
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -fs-profile-file=%S/Inputs/fsloader-mfs.afdo -split-machine-functions -enable-fs-discriminator=false 2>&1 | FileCheck %s --check-prefix=NODISCRIMINATOR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -fs-profile-file=%S/Inputs/fsloader-mfs.afdo -split-machine-functions -enable-fs-discriminator=false 2>&1 | FileCheck %s --check-prefix=NODISCRIMINATOR
; NODISCRIMINATOR: warning: Using AutoFDO without FSDiscriminator for MFS may regress performance.
define void @foo4(i1 zeroext %0, i1 zeroext %1) nounwind {
diff --git a/llvm/test/CodeGen/X86/load-sample-profile.ll b/llvm/test/CodeGen/X86/load-sample-profile.ll
index 2e3f8809d3882..7baae1cd5861a 100644
--- a/llvm/test/CodeGen/X86/load-sample-profile.ll
+++ b/llvm/test/CodeGen/X86/load-sample-profile.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -debug-pass=Structure -enable-fs-discriminator=true -improved-fs-discriminator=true 2>&1 | FileCheck %s --check-prefix=NOPROFILE
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -debug-pass=Structure -fs-profile-file=%S/Inputs/fsloader-mfs.afdo -enable-fs-discriminator=true -improved-fs-discriminator=true 2>&1 | FileCheck %s --check-prefix=PROFILE-NOMFS
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -debug-pass=Structure -fs-profile-file=%S/Inputs/fsloader-mfs.afdo -split-machine-functions -enable-fs-discriminator=true -improved-fs-discriminator=true 2>&1 | FileCheck %s --check-prefix=PROFILE-MFS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -debug-pass=Structure -enable-fs-discriminator=true -improved-fs-discriminator=true 2>&1 | FileCheck %s --check-prefix=NOPROFILE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -debug-pass=Structure -fs-profile-file=%S/Inputs/fsloader-mfs.afdo -enable-fs-discriminator=true -improved-fs-discriminator=true 2>&1 | FileCheck %s --check-prefix=PROFILE-NOMFS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -debug-pass=Structure -fs-profile-file=%S/Inputs/fsloader-mfs.afdo -split-machine-functions -enable-fs-discriminator=true -improved-fs-discriminator=true 2>&1 | FileCheck %s --check-prefix=PROFILE-MFS
;; No profile is specified, no load passes.
; NOPROFILE: Add FS discriminators in MIR
diff --git a/llvm/test/CodeGen/X86/load-slice.ll b/llvm/test/CodeGen/X86/load-slice.ll
index b6925f526965f..ab329c1bdb2f9 100644
--- a/llvm/test/CodeGen/X86/load-slice.ll
+++ b/llvm/test/CodeGen/X86/load-slice.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple x86_64-apple-macosx -mcpu=corei7-avx -combiner-stress-load-slicing < %s -o - | FileCheck %s --check-prefix=STRESS
-; RUN: llc -mtriple x86_64-apple-macosx -mcpu=corei7-avx < %s -o - | FileCheck %s --check-prefix=REGULAR
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-macosx -mcpu=corei7-avx -combiner-stress-load-slicing < %s -o - | FileCheck %s --check-prefix=STRESS
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-macosx -mcpu=corei7-avx < %s -o - | FileCheck %s --check-prefix=REGULAR
;
; <rdar://problem/14477220>
diff --git a/llvm/test/CodeGen/X86/loc-remat.ll b/llvm/test/CodeGen/X86/loc-remat.ll
index 4af3e2c0d876c..fda0ae19c100e 100644
--- a/llvm/test/CodeGen/X86/loc-remat.ll
+++ b/llvm/test/CodeGen/X86/loc-remat.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/local-sym-storage-class.ll b/llvm/test/CodeGen/X86/local-sym-storage-class.ll
index 25df0c5a97779..fc6923c4cc4f4 100644
--- a/llvm/test/CodeGen/X86/local-sym-storage-class.ll
+++ b/llvm/test/CodeGen/X86/local-sym-storage-class.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-unknown-windows-msvc %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-windows-msvc %s -o - | FileCheck %s
define internal void @internal() {
ret void
diff --git a/llvm/test/CodeGen/X86/local_stack_symbol_ordering.ll b/llvm/test/CodeGen/X86/local_stack_symbol_ordering.ll
index f95153bf29108..2513c9bc5f623 100644
--- a/llvm/test/CodeGen/X86/local_stack_symbol_ordering.ll
+++ b/llvm/test/CodeGen/X86/local_stack_symbol_ordering.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s -check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s -check-prefix=X32
; CHECK-LABEL: foo
diff --git a/llvm/test/CodeGen/X86/localescape.ll b/llvm/test/CodeGen/X86/localescape.ll
index 57369be489af3..f2f7cac5db25a 100644
--- a/llvm/test/CodeGen/X86/localescape.ll
+++ b/llvm/test/CodeGen/X86/localescape.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i686-windows-msvc < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-windows-msvc < %s | FileCheck %s --check-prefix=X86
declare ptr @llvm.frameaddress(i32)
declare void @llvm.localescape(...)
diff --git a/llvm/test/CodeGen/X86/log2_not_readnone.ll b/llvm/test/CodeGen/X86/log2_not_readnone.ll
index 5620835d7baf6..42266d0db87f6 100644
--- a/llvm/test/CodeGen/X86/log2_not_readnone.ll
+++ b/llvm/test/CodeGen/X86/log2_not_readnone.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i386-linux-gnueabi %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnueabi %s -o - | FileCheck %s
; Log2 and exp2 are string-matched to intrinsics. If they are not declared
; readnone, they can't be changed to intrinsics (because they can change errno).
diff --git a/llvm/test/CodeGen/X86/logic-shift.ll b/llvm/test/CodeGen/X86/logic-shift.ll
index 104151c76bc5d..4c03d9b321fef 100644
--- a/llvm/test/CodeGen/X86/logic-shift.ll
+++ b/llvm/test/CodeGen/X86/logic-shift.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx2 | FileCheck %s
define i8 @or_lshr_commute0(i8 %x0, i8 %x1, i8 %y, i8 %z) {
; CHECK-LABEL: or_lshr_commute0:
diff --git a/llvm/test/CodeGen/X86/logical-load-fold.ll b/llvm/test/CodeGen/X86/logical-load-fold.ll
index 1c3f209fc1e66..2e57e1d4a8353 100644
--- a/llvm/test/CodeGen/X86/logical-load-fold.ll
+++ b/llvm/test/CodeGen/X86/logical-load-fold.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2,sse-unaligned-mem | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse2,sse-unaligned-mem | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
; Although we have the ability to fold an unaligned load with AVX
; and under special conditions with some SSE implementations, we
diff --git a/llvm/test/CodeGen/X86/long-double-abi-align.ll b/llvm/test/CodeGen/X86/long-double-abi-align.ll
index 02d68ada9a8d4..0139c97233b45 100644
--- a/llvm/test/CodeGen/X86/long-double-abi-align.ll
+++ b/llvm/test/CodeGen/X86/long-double-abi-align.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --no_x86_scrub_mem_shuffle
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc | FileCheck %s --check-prefix=MSVC
-; RUN: llc < %s -mtriple=i386-pc-mingw32 | FileCheck %s --check-prefix=MINGW
-; RUN: llc < %s -mtriple=i386-pc-linux-gnu | FileCheck %s --check-prefix=LINUX
-; RUN: llc < %s -mtriple=i386--apple-darwin | FileCheck %s --check-prefix=DARWIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc | FileCheck %s --check-prefix=MSVC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-mingw32 | FileCheck %s --check-prefix=MINGW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux-gnu | FileCheck %s --check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386--apple-darwin | FileCheck %s --check-prefix=DARWIN
define void @foo(i32 %0, x86_fp80 %1, i32 %2) nounwind {
; MSVC-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/long-setcc.ll b/llvm/test/CodeGen/X86/long-setcc.ll
index 9436891e9ccb2..a11e255b1b266 100644
--- a/llvm/test/CodeGen/X86/long-setcc.ll
+++ b/llvm/test/CodeGen/X86/long-setcc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define i1 @t1(i64 %x) nounwind {
%B = icmp slt i64 %x, 0
diff --git a/llvm/test/CodeGen/X86/longlong-deadload.ll b/llvm/test/CodeGen/X86/longlong-deadload.ll
index 35b2f43cd8e77..1c3ae12b8d8f1 100644
--- a/llvm/test/CodeGen/X86/longlong-deadload.ll
+++ b/llvm/test/CodeGen/X86/longlong-deadload.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu | FileCheck %s
; FIXME: This should not load or store the top part of *P.
define void @test(ptr %P) nounwind {
diff --git a/llvm/test/CodeGen/X86/loop-blocks.ll b/llvm/test/CodeGen/X86/loop-blocks.ll
index e970061c0cf70..3fef604c92775 100644
--- a/llvm/test/CodeGen/X86/loop-blocks.ll
+++ b/llvm/test/CodeGen/X86/loop-blocks.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -asm-verbose=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -asm-verbose=false | FileCheck %s
; These tests check for loop branching structure, and that the loop align
; directive is placed in the expected place.
diff --git a/llvm/test/CodeGen/X86/loop-hoist.ll b/llvm/test/CodeGen/X86/loop-hoist.ll
index 455191308c71a..1d9030f14b149 100644
--- a/llvm/test/CodeGen/X86/loop-hoist.ll
+++ b/llvm/test/CodeGen/X86/loop-hoist.ll
@@ -1,6 +1,6 @@
; LSR should hoist the load from the "Arr" stub out of the loop.
-; RUN: llc < %s -relocation-model=dynamic-no-pic -mtriple=i686-apple-darwin8.7.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=dynamic-no-pic -mtriple=i686-apple-darwin8.7.2 | FileCheck %s
; CHECK: _foo:
; CHECK: L_Arr$non_lazy_ptr
diff --git a/llvm/test/CodeGen/X86/loop-rotate.ll b/llvm/test/CodeGen/X86/loop-rotate.ll
index 3f0a390e7c1bb..1433d5c7e3b67 100644
--- a/llvm/test/CodeGen/X86/loop-rotate.ll
+++ b/llvm/test/CodeGen/X86/loop-rotate.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux < %s | FileCheck %s
; Don't rotate the loop if the number of fall through to exit is not larger
; than the number of fall through to header.
diff --git a/llvm/test/CodeGen/X86/loop-search.ll b/llvm/test/CodeGen/X86/loop-search.ll
index 0d5f97d21fb3a..7d3c045cc6c2d 100644
--- a/llvm/test/CodeGen/X86/loop-search.ll
+++ b/llvm/test/CodeGen/X86/loop-search.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; This test comes from PR27136
; We should hoist loop constant invariant
diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce-2.ll b/llvm/test/CodeGen/X86/loop-strength-reduce-2.ll
index d7390299c7b10..b55dd8f77ce51 100644
--- a/llvm/test/CodeGen/X86/loop-strength-reduce-2.ll
+++ b/llvm/test/CodeGen/X86/loop-strength-reduce-2.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-- -relocation-model=pic | FileCheck %s -check-prefix=PIC
-; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s -check-prefix=STATIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -relocation-model=pic | FileCheck %s -check-prefix=PIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -relocation-model=static | FileCheck %s -check-prefix=STATIC
;
; Make sure the common loop invariant A is hoisted up to preheader,
; since too many registers are needed to subsume it into the addressing modes.
diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce-3.ll b/llvm/test/CodeGen/X86/loop-strength-reduce-3.ll
index 558a4e9fb0864..7f70c1dfcebcc 100644
--- a/llvm/test/CodeGen/X86/loop-strength-reduce-3.ll
+++ b/llvm/test/CodeGen/X86/loop-strength-reduce-3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -relocation-model=dynamic-no-pic | FileCheck %s
; CHECK: align
; CHECK: movl $4, -4(%ecx)
diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce.ll b/llvm/test/CodeGen/X86/loop-strength-reduce.ll
index a8c28b7d16dce..2f18494a76311 100644
--- a/llvm/test/CodeGen/X86/loop-strength-reduce.ll
+++ b/llvm/test/CodeGen/X86/loop-strength-reduce.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -relocation-model=static | FileCheck %s
; CHECK: align
; CHECK: movl $4, -4(%ecx)
diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce2.ll b/llvm/test/CodeGen/X86/loop-strength-reduce2.ll
index 2941271ab1f2f..15ca59fd5f4e4 100644
--- a/llvm/test/CodeGen/X86/loop-strength-reduce2.ll
+++ b/llvm/test/CodeGen/X86/loop-strength-reduce2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -relocation-model=pic | FileCheck %s
;
; Make sure the PIC label flags2-"L1$pb" is not moved up to the preheader.
; CHECK: mov{{.}} {{.*}}$pb
diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce4.ll b/llvm/test/CodeGen/X86/loop-strength-reduce4.ll
index 4bb1150bf702a..e6b2462c23405 100644
--- a/llvm/test/CodeGen/X86/loop-strength-reduce4.ll
+++ b/llvm/test/CodeGen/X86/loop-strength-reduce4.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=static | FileCheck %s -check-prefix=STATIC
-; RUN: llc < %s -mtriple=i686-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=PIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -relocation-model=static | FileCheck %s -check-prefix=STATIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -relocation-model=pic | FileCheck %s -check-prefix=PIC
; By starting the IV at -64 instead of 0, a cmp is eliminated,
; as the flags from the add can be used directly.
diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce5.ll b/llvm/test/CodeGen/X86/loop-strength-reduce5.ll
index 08003739b55d0..45ecd5cb81aee 100644
--- a/llvm/test/CodeGen/X86/loop-strength-reduce5.ll
+++ b/llvm/test/CodeGen/X86/loop-strength-reduce5.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
@X = weak global i16 0 ; <ptr> [#uses=1]
@Y = weak global i16 0 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce6.ll b/llvm/test/CodeGen/X86/loop-strength-reduce6.ll
index eaf0a7448662e..f34cb74bd4c71 100644
--- a/llvm/test/CodeGen/X86/loop-strength-reduce6.ll
+++ b/llvm/test/CodeGen/X86/loop-strength-reduce6.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define fastcc i32 @decodeMP3(i32 %isize, ptr %done) nounwind {
; CHECK-LABEL: decodeMP3:
diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce7.ll b/llvm/test/CodeGen/X86/loop-strength-reduce7.ll
index 11473bacc56cf..622f81092cefb 100644
--- a/llvm/test/CodeGen/X86/loop-strength-reduce7.ll
+++ b/llvm/test/CodeGen/X86/loop-strength-reduce7.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target triple = "i386-apple-darwin9.6"
%struct.III_psy_xmin = type { [22 x double], [13 x [3 x double]] }
diff --git a/llvm/test/CodeGen/X86/loop-strength-reduce8.ll b/llvm/test/CodeGen/X86/loop-strength-reduce8.ll
index 9b76034916824..9ce6e814fdbd2 100644
--- a/llvm/test/CodeGen/X86/loop-strength-reduce8.ll
+++ b/llvm/test/CodeGen/X86/loop-strength-reduce8.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin | FileCheck %s
; FIXME: The first two instructions, movl and addl, should have been combined to
; "leal 16(%eax), %edx" by the backend (PR20776).
diff --git a/llvm/test/CodeGen/X86/lower-bitcast.ll b/llvm/test/CodeGen/X86/lower-bitcast.ll
index 7aebf591a2743..ca8d21fc26976 100644
--- a/llvm/test/CodeGen/X86/lower-bitcast.ll
+++ b/llvm/test/CodeGen/X86/lower-bitcast.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=core2 -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=core2 -mattr=+sse2 | FileCheck %s
; FIXME: Ideally we should be able to fold the entire body of @test1 into a
; single paddd instruction. At the moment we produce the sequence
diff --git a/llvm/test/CodeGen/X86/lower-ptrmask.ll b/llvm/test/CodeGen/X86/lower-ptrmask.ll
index 406241ecfff02..a1d94fdf1083e 100644
--- a/llvm/test/CodeGen/X86/lower-ptrmask.ll
+++ b/llvm/test/CodeGen/X86/lower-ptrmask.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-macosx -stop-after=finalize-isel %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx -stop-after=finalize-isel %s -o - | FileCheck %s
declare ptr @llvm.ptrmask.p0.i64(ptr , i64)
diff --git a/llvm/test/CodeGen/X86/lower-vec-shift-2.ll b/llvm/test/CodeGen/X86/lower-vec-shift-2.ll
index 8ca9df887095c..e494025dd8e26 100644
--- a/llvm/test/CodeGen/X86/lower-vec-shift-2.ll
+++ b/llvm/test/CodeGen/X86/lower-vec-shift-2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s --check-prefix=SSE2
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+sse2 < %s | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefix=AVX
define <8 x i16> @test1(<8 x i16> %A, <8 x i16> %B) {
; SSE2-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/lower-vec-shift.ll b/llvm/test/CodeGen/X86/lower-vec-shift.ll
index 9ba6f00f532b2..88b34062aef0f 100644
--- a/llvm/test/CodeGen/X86/lower-vec-shift.ll
+++ b/llvm/test/CodeGen/X86/lower-vec-shift.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+ssse3 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+ssse3 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
; Verify that the following shifts are lowered into a sequence of two shifts plus
; a blend. On pre-avx2 targets, instead of scalarizing logical and arithmetic
diff --git a/llvm/test/CodeGen/X86/lower-vec-shuffle-bug.ll b/llvm/test/CodeGen/X86/lower-vec-shuffle-bug.ll
index 0ae2fc1faba3a..4133b24799f6a 100644
--- a/llvm/test/CodeGen/X86/lower-vec-shuffle-bug.ll
+++ b/llvm/test/CodeGen/X86/lower-vec-shuffle-bug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
define <4 x double> @test1(<4 x double> %A, <4 x double> %B) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/lrint-conv-i32.ll b/llvm/test/CodeGen/X86/lrint-conv-i32.ll
index f4cb0d3ff87e6..dd9385a3af0e6 100644
--- a/llvm/test/CodeGen/X86/lrint-conv-i32.ll
+++ b/llvm/test/CodeGen/X86/lrint-conv-i32.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
-; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
-; RUN: llc < %s -mtriple=i686-unknown -mattr=avx | FileCheck %s --check-prefixes=X86,X86-AVX
-; RUN: llc < %s -mtriple=i686-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=X64,X64-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64,X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=avx | FileCheck %s --check-prefixes=X86,X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=X64,X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64,X64-AVX
define i32 @test_lrint_i32_f16(half %x) nounwind {
; X86-NOSSE-LABEL: test_lrint_i32_f16:
diff --git a/llvm/test/CodeGen/X86/lrint-conv-i64.ll b/llvm/test/CodeGen/X86/lrint-conv-i64.ll
index c45918ea4d5ee..e0152d79dfb42 100644
--- a/llvm/test/CodeGen/X86/lrint-conv-i64.ll
+++ b/llvm/test/CodeGen/X86/lrint-conv-i64.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
-; RUN: llc < %s -mtriple=i686-unknown -mattr=-x87 | FileCheck %s --check-prefixes=X86-NOX87
-; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=-x87 | FileCheck %s --check-prefixes=X86-NOX87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=CHECK,AVX
define i64 @test_lrint_i64_f16(half %x) nounwind {
; X86-NOSSE-LABEL: test_lrint_i64_f16:
diff --git a/llvm/test/CodeGen/X86/lround-conv-i32.ll b/llvm/test/CodeGen/X86/lround-conv-i32.ll
index 4e95da14b45a1..f6d2c0aee9bbb 100644
--- a/llvm/test/CodeGen/X86/lround-conv-i32.ll
+++ b/llvm/test/CodeGen/X86/lround-conv-i32.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
-; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define i32 @test_lround_i32_f16(half %x) nounwind {
; X86-NOSSE-LABEL: test_lround_i32_f16:
diff --git a/llvm/test/CodeGen/X86/lround-conv-i64.ll b/llvm/test/CodeGen/X86/lround-conv-i64.ll
index 0002bb8936d5d..e0dfb575d62c0 100644
--- a/llvm/test/CodeGen/X86/lround-conv-i64.ll
+++ b/llvm/test/CodeGen/X86/lround-conv-i64.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
-; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define i64 @test_lround_i64_f16(half %x) nounwind {
; X86-NOSSE-LABEL: test_lround_i64_f16:
diff --git a/llvm/test/CodeGen/X86/lrshrink-debug.ll b/llvm/test/CodeGen/X86/lrshrink-debug.ll
index dd52968529902..58c0b6eba4d99 100755
--- a/llvm/test/CodeGen/X86/lrshrink-debug.ll
+++ b/llvm/test/CodeGen/X86/lrshrink-debug.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - | FileCheck %s
target triple = "i686-unknown-linux-gnu"
define noundef i32 @test(i1 %tobool1.not, i32 %sh.012, i1 %cmp, i64 %sh_prom, i64 %shl) {
diff --git a/llvm/test/CodeGen/X86/lrshrink-ehpad-phis.ll b/llvm/test/CodeGen/X86/lrshrink-ehpad-phis.ll
index b9afb99697354..12908feb332e8 100755
--- a/llvm/test/CodeGen/X86/lrshrink-ehpad-phis.ll
+++ b/llvm/test/CodeGen/X86/lrshrink-ehpad-phis.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple x86_64-unknown-linux-gnu %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-linux-gnu %s -o - | FileCheck %s
declare i32 @__gxx_personality_v0(...)
declare void @maythrow()
diff --git a/llvm/test/CodeGen/X86/lrshrink.ll b/llvm/test/CodeGen/X86/lrshrink.ll
index b72a5a413c573..b60404b35a9bb 100644
--- a/llvm/test/CodeGen/X86/lrshrink.ll
+++ b/llvm/test/CodeGen/X86/lrshrink.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell | FileCheck %s
; Checks if "%7 = add nuw nsw i64 %4, %2" is moved before the last call
; to minimize live-range.
diff --git a/llvm/test/CodeGen/X86/lsr-addrecloops.ll b/llvm/test/CodeGen/X86/lsr-addrecloops.ll
index 98c8f587784c2..47ebc82cf9d1a 100644
--- a/llvm/test/CodeGen/X86/lsr-addrecloops.ll
+++ b/llvm/test/CodeGen/X86/lsr-addrecloops.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Check that the SCEVs produced from the multiple loops don't attempt to get
; combines in invalid ways. The LSR filtering could attempt to combine addrecs
diff --git a/llvm/test/CodeGen/X86/lsr-crash-empty-uses.ll b/llvm/test/CodeGen/X86/lsr-crash-empty-uses.ll
index cf434419bb978..a885fa98941a9 100644
--- a/llvm/test/CodeGen/X86/lsr-crash-empty-uses.ll
+++ b/llvm/test/CodeGen/X86/lsr-crash-empty-uses.ll
@@ -1,4 +1,4 @@
-; RUN: llc --start-before loop-reduce --stop-after loop-reduce %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting --start-before loop-reduce --stop-after loop-reduce %s -o - | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-n32-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/lsr-delayed-fold.ll b/llvm/test/CodeGen/X86/lsr-delayed-fold.ll
index a35015d09a4fc..74576ce0da48d 100644
--- a/llvm/test/CodeGen/X86/lsr-delayed-fold.ll
+++ b/llvm/test/CodeGen/X86/lsr-delayed-fold.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s > /dev/null
+; RUN: llc -combiner-topological-sorting < %s > /dev/null
; ScalarEvolution misses an opportunity to fold ((trunc x) + (trunc -x) + y),
; but LSR should tolerate this.
diff --git a/llvm/test/CodeGen/X86/lsr-i386.ll b/llvm/test/CodeGen/X86/lsr-i386.ll
index 443ec3f32dd86..8a34130ab4d54 100644
--- a/llvm/test/CodeGen/X86/lsr-i386.ll
+++ b/llvm/test/CodeGen/X86/lsr-i386.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i386-pc-linux-gnu"
; PR7651
diff --git a/llvm/test/CodeGen/X86/lsr-interesting-step.ll b/llvm/test/CodeGen/X86/lsr-interesting-step.ll
index 049d2640d25db..2688dd7d0ebb5 100644
--- a/llvm/test/CodeGen/X86/lsr-interesting-step.ll
+++ b/llvm/test/CodeGen/X86/lsr-interesting-step.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -relocation-model=static -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=static -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; The inner loop should require only one add (and no leas either).
; rdar://8100380
diff --git a/llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll b/llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll
index 4cd206adc31de..f917d1887ebf6 100644
--- a/llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll
+++ b/llvm/test/CodeGen/X86/lsr-loop-exit-cond.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-darwin | FileCheck %s --check-prefix=GENERIC
-; RUN: llc < %s -mtriple=x86_64-darwin -mcpu=atom | FileCheck %s --check-prefix=ATOM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-darwin | FileCheck %s --check-prefix=GENERIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-darwin -mcpu=atom | FileCheck %s --check-prefix=ATOM
@Te0 = external global [256 x i32] ; <[256 x i32]*> [#uses=5]
@Te1 = external global [256 x i32] ; <[256 x i32]*> [#uses=4]
diff --git a/llvm/test/CodeGen/X86/lsr-negative-stride.ll b/llvm/test/CodeGen/X86/lsr-negative-stride.ll
index 1d5e208f3a326..ff003d1a687df 100644
--- a/llvm/test/CodeGen/X86/lsr-negative-stride.ll
+++ b/llvm/test/CodeGen/X86/lsr-negative-stride.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; This corresponds to:
;int t(int a, int b) {
diff --git a/llvm/test/CodeGen/X86/lsr-nonaffine.ll b/llvm/test/CodeGen/X86/lsr-nonaffine.ll
index 3449c976583fd..13967e2897ef1 100644
--- a/llvm/test/CodeGen/X86/lsr-nonaffine.ll
+++ b/llvm/test/CodeGen/X86/lsr-nonaffine.ll
@@ -1,4 +1,4 @@
-; RUN: llc -asm-verbose=false -mtriple=x86_64-apple-darwin -o - < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -asm-verbose=false -mtriple=x86_64-apple-darwin -o - < %s | FileCheck %s
; LSR should leave non-affine expressions alone because it currently
; doesn't know how to do anything with them, and when it tries, it
diff --git a/llvm/test/CodeGen/X86/lsr-normalization.ll b/llvm/test/CodeGen/X86/lsr-normalization.ll
index 50c8bd5bd958e..2d5d61f8a578b 100644
--- a/llvm/test/CodeGen/X86/lsr-normalization.ll
+++ b/llvm/test/CodeGen/X86/lsr-normalization.ll
@@ -1,6 +1,6 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=ASM
-; RUN: llc -debug -o /dev/null < %s -mtriple=x86_64-- 2>&1 | FileCheck %s --check-prefix=DBG
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=ASM
+; RUN: llc -combiner-topological-sorting -debug -o /dev/null < %s -mtriple=x86_64-- 2>&1 | FileCheck %s --check-prefix=DBG
; rdar://8168938
; This testcase involves SCEV normalization with the exit value from
diff --git a/llvm/test/CodeGen/X86/lsr-overflow.ll b/llvm/test/CodeGen/X86/lsr-overflow.ll
index def57c542adc1..d3463f029e41e 100644
--- a/llvm/test/CodeGen/X86/lsr-overflow.ll
+++ b/llvm/test/CodeGen/X86/lsr-overflow.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s
; The comparison uses the pre-inc value, which could lead LSR to
; try to compute -INT64_MIN.
diff --git a/llvm/test/CodeGen/X86/lsr-quadratic-expand.ll b/llvm/test/CodeGen/X86/lsr-quadratic-expand.ll
index 37858b00fe3fa..157c1617e13e3 100644
--- a/llvm/test/CodeGen/X86/lsr-quadratic-expand.ll
+++ b/llvm/test/CodeGen/X86/lsr-quadratic-expand.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-- < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s
define void @dw2102_i2c_transfer() nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/lsr-redundant-addressing.ll b/llvm/test/CodeGen/X86/lsr-redundant-addressing.ll
index 1db7d5d8bd73c..4503de69c45d0 100644
--- a/llvm/test/CodeGen/X86/lsr-redundant-addressing.ll
+++ b/llvm/test/CodeGen/X86/lsr-redundant-addressing.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s | FileCheck %s
; rdar://9081094
; LSR shouldn't create lots of redundant address computations.
diff --git a/llvm/test/CodeGen/X86/lsr-reuse-trunc.ll b/llvm/test/CodeGen/X86/lsr-reuse-trunc.ll
index 4d65acf3b80dd..b2c637ad8b2b2 100644
--- a/llvm/test/CodeGen/X86/lsr-reuse-trunc.ll
+++ b/llvm/test/CodeGen/X86/lsr-reuse-trunc.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=nehalem | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=nehalem | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=nehalem | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mcpu=nehalem | FileCheck %s
; Full strength reduction wouldn't reduce register pressure, so LSR should
; stick with indexing here.
diff --git a/llvm/test/CodeGen/X86/lsr-reuse.ll b/llvm/test/CodeGen/X86/lsr-reuse.ll
index a6bc826d6edbe..c628f1e66342d 100644
--- a/llvm/test/CodeGen/X86/lsr-reuse.ll
+++ b/llvm/test/CodeGen/X86/lsr-reuse.ll
@@ -1,6 +1,6 @@
; XFAIL: *
; ...should pass. See PR12324: misched bringup
-; RUN: llc < %s -O3 -asm-verbose=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O3 -asm-verbose=false | FileCheck %s
target datalayout = "e-p:64:64:64"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/lsr-sort.ll b/llvm/test/CodeGen/X86/lsr-sort.ll
index 37cb6f996d34f..85df8366d7aa0 100644
--- a/llvm/test/CodeGen/X86/lsr-sort.ll
+++ b/llvm/test/CodeGen/X86/lsr-sort.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
@X = common dso_local global i16 0 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/lsr-static-addr.ll b/llvm/test/CodeGen/X86/lsr-static-addr.ll
index c67ac7d909fa7..50edbdbf0a2b7 100644
--- a/llvm/test/CodeGen/X86/lsr-static-addr.ll
+++ b/llvm/test/CodeGen/X86/lsr-static-addr.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -relocation-model=static < %s | FileCheck %s --check-prefix=CHECK
-; RUN: llc -mcpu=atom -mtriple=x86_64-unknown-linux-gnu -relocation-model=static < %s | FileCheck %s --check-prefix=ATOM
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -relocation-model=static < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mcpu=atom -mtriple=x86_64-unknown-linux-gnu -relocation-model=static < %s | FileCheck %s --check-prefix=ATOM
@A = external dso_local global [0 x double]
diff --git a/llvm/test/CodeGen/X86/lsr-wrap.ll b/llvm/test/CodeGen/X86/lsr-wrap.ll
index 7c87696be0507..3ca350ad731e0 100644
--- a/llvm/test/CodeGen/X86/lsr-wrap.ll
+++ b/llvm/test/CodeGen/X86/lsr-wrap.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s | FileCheck %s
; LSR would like to use a single IV for both of these, however it's
; not safe due to wraparound.
diff --git a/llvm/test/CodeGen/X86/lvi-hardening-gadget-graph.ll b/llvm/test/CodeGen/X86/lvi-hardening-gadget-graph.ll
index ec67467d07014..4c33f7bb05043 100644
--- a/llvm/test/CodeGen/X86/lvi-hardening-gadget-graph.ll
+++ b/llvm/test/CodeGen/X86/lvi-hardening-gadget-graph.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown -x86-lvi-load-dot-verify -o %t < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown -x86-lvi-load-dot-verify -o %t < %s | FileCheck %s
; Function Attrs: noinline nounwind optnone uwtable
define dso_local i32 @test(ptr %untrusted_user_ptr, ptr %secret, i32 %secret_size) #0 {
diff --git a/llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll b/llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll
index b6e6e61c73b16..35c4437fa407c 100644
--- a/llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll
+++ b/llvm/test/CodeGen/X86/lvi-hardening-indirectbr.ll
@@ -1,5 +1,5 @@
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown -mattr=+lvi-cfi < %s | FileCheck %s --check-prefix=X64
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown -mattr=+lvi-cfi -O0 < %s | FileCheck %s --check-prefix=X64FAST
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown -mattr=+lvi-cfi < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown -mattr=+lvi-cfi -O0 < %s | FileCheck %s --check-prefix=X64FAST
;
; Note that a lot of this code was lifted from retpoline.ll.
diff --git a/llvm/test/CodeGen/X86/lvi-hardening-inline-asm.ll b/llvm/test/CodeGen/X86/lvi-hardening-inline-asm.ll
index f88976ec841b1..3c205bdb505d8 100644
--- a/llvm/test/CodeGen/X86/lvi-hardening-inline-asm.ll
+++ b/llvm/test/CodeGen/X86/lvi-hardening-inline-asm.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown -mattr=+lvi-load-hardening -mattr=+lvi-cfi -x86-experimental-lvi-inline-asm-hardening < %s -o %t.out 2> %t.err
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown -mattr=+lvi-load-hardening -mattr=+lvi-cfi -x86-experimental-lvi-inline-asm-hardening < %s -o %t.out 2> %t.err
; RUN: FileCheck %s --check-prefix=X86 < %t.out
; RUN: FileCheck %s --check-prefix=WARN < %t.err
diff --git a/llvm/test/CodeGen/X86/lvi-hardening-loads.ll b/llvm/test/CodeGen/X86/lvi-hardening-loads.ll
index 4ecb1bc31f2a8..2c591cd78dd26 100644
--- a/llvm/test/CodeGen/X86/lvi-hardening-loads.ll
+++ b/llvm/test/CodeGen/X86/lvi-hardening-loads.ll
@@ -1,6 +1,6 @@
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown < %s | FileCheck %s --check-prefix=X64 --check-prefix=X64-ALL
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown --x86-lvi-load-no-cbranch < %s | FileCheck %s --check-prefix=X64
-; RUN: llc -O0 -verify-machineinstrs -mtriple=x86_64-unknown < %s | FileCheck %s --check-prefix=X64-NOOPT
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown < %s | FileCheck %s --check-prefix=X64 --check-prefix=X64-ALL
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown --x86-lvi-load-no-cbranch < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -O0 -verify-machineinstrs -mtriple=x86_64-unknown < %s | FileCheck %s --check-prefix=X64-NOOPT
; Function Attrs: noinline nounwind optnone uwtable
define dso_local i32 @test(ptr %secret, i32 %secret_size) #0 {
diff --git a/llvm/test/CodeGen/X86/lvi-hardening-ret.ll b/llvm/test/CodeGen/X86/lvi-hardening-ret.ll
index 954985a3798b7..33d968e62a0fc 100644
--- a/llvm/test/CodeGen/X86/lvi-hardening-ret.ll
+++ b/llvm/test/CodeGen/X86/lvi-hardening-ret.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown < %s | FileCheck %s
define dso_local void @one_instruction() #0 {
; CHECK-LABEL: one_instruction:
diff --git a/llvm/test/CodeGen/X86/lwp-intrinsics-x86_64.ll b/llvm/test/CodeGen/X86/lwp-intrinsics-x86_64.ll
index dbe6df8bfd033..3508329b0c6f3 100644
--- a/llvm/test/CodeGen/X86/lwp-intrinsics-x86_64.ll
+++ b/llvm/test/CodeGen/X86/lwp-intrinsics-x86_64.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+lwp | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver1 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver3 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver4 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+lwp | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=bdver1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=bdver2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=bdver3 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=bdver4 | FileCheck %s --check-prefix=X64
define i8 @test_lwpins64_rri(i64 %a0, i32 %a1) nounwind {
; X64-LABEL: test_lwpins64_rri:
diff --git a/llvm/test/CodeGen/X86/lwp-intrinsics.ll b/llvm/test/CodeGen/X86/lwp-intrinsics.ll
index 6f32b09c838f0..7dc8558374b8b 100644
--- a/llvm/test/CodeGen/X86/lwp-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/lwp-intrinsics.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+lwp | FileCheck %s --check-prefixes=X86,X86_LWP
-; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver1 | FileCheck %s --check-prefixes=X86,X86_BDVER
-; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver2 | FileCheck %s --check-prefixes=X86,X86_BDVER
-; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver3 | FileCheck %s --check-prefixes=X86,X86_BDVER
-; RUN: llc < %s -mtriple=i686-unknown -mcpu=bdver4 | FileCheck %s --check-prefixes=X86,X86_BDVER
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+lwp | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver1 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver3 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver4 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+lwp | FileCheck %s --check-prefixes=X86,X86_LWP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mcpu=bdver1 | FileCheck %s --check-prefixes=X86,X86_BDVER
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mcpu=bdver2 | FileCheck %s --check-prefixes=X86,X86_BDVER
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mcpu=bdver3 | FileCheck %s --check-prefixes=X86,X86_BDVER
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mcpu=bdver4 | FileCheck %s --check-prefixes=X86,X86_BDVER
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+lwp | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=bdver1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=bdver2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=bdver3 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=bdver4 | FileCheck %s --check-prefix=X64
define void @test_llwpcb(ptr%a0) nounwind {
; X86-LABEL: test_llwpcb:
diff --git a/llvm/test/CodeGen/X86/lzcnt-tzcnt.ll b/llvm/test/CodeGen/X86/lzcnt-tzcnt.ll
index bced63e1cf853..90161bb0f0a26 100644
--- a/llvm/test/CodeGen/X86/lzcnt-tzcnt.ll
+++ b/llvm/test/CodeGen/X86/lzcnt-tzcnt.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+bmi,+lzcnt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mattr=+bmi,+lzcnt | FileCheck %s
; LZCNT and TZCNT will always produce the operand size when the input operand
; is zero. This test is to verify that we efficiently select LZCNT/TZCNT
diff --git a/llvm/test/CodeGen/X86/lzcnt-zext-cmp.ll b/llvm/test/CodeGen/X86/lzcnt-zext-cmp.ll
index 43bac05988e29..968dce72d3bfa 100644
--- a/llvm/test/CodeGen/X86/lzcnt-zext-cmp.ll
+++ b/llvm/test/CodeGen/X86/lzcnt-zext-cmp.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; Test patterns which generates lzcnt instructions.
; Eg: zext(or(setcc(cmp), setcc(cmp))) -> shr(or(lzcnt, lzcnt))
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=btver2 | FileCheck --check-prefix=ALL --check-prefix=FASTLZCNT %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=btver2 -mattr=-fast-lzcnt | FileCheck --check-prefix=ALL --check-prefix=NOFASTLZCNT %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=znver1 | FileCheck --check-prefix=ALL --check-prefix=FASTLZCNT %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=znver1 -mattr=-fast-lzcnt | FileCheck --check-prefix=ALL --check-prefix=NOFASTLZCNT %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=znver2 | FileCheck --check-prefix=ALL --check-prefix=FASTLZCNT %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=znver2 -mattr=-fast-lzcnt | FileCheck --check-prefix=ALL --check-prefix=NOFASTLZCNT %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=btver2 | FileCheck --check-prefix=ALL --check-prefix=FASTLZCNT %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=btver2 -mattr=-fast-lzcnt | FileCheck --check-prefix=ALL --check-prefix=NOFASTLZCNT %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=znver1 | FileCheck --check-prefix=ALL --check-prefix=FASTLZCNT %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=znver1 -mattr=-fast-lzcnt | FileCheck --check-prefix=ALL --check-prefix=NOFASTLZCNT %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=znver2 | FileCheck --check-prefix=ALL --check-prefix=FASTLZCNT %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=znver2 -mattr=-fast-lzcnt | FileCheck --check-prefix=ALL --check-prefix=NOFASTLZCNT %s
; Test one 32-bit input, output is 32-bit, no transformations expected.
define i32 @test_zext_cmp0(i32 %a) {
diff --git a/llvm/test/CodeGen/X86/lzcnt.ll b/llvm/test/CodeGen/X86/lzcnt.ll
index b000401973416..43f1c05291a70 100644
--- a/llvm/test/CodeGen/X86/lzcnt.ll
+++ b/llvm/test/CodeGen/X86/lzcnt.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=i686-- -mattr=+lzcnt | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -mattr=+lzcnt | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+lzcnt | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+lzcnt | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 -mattr=+lzcnt | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+lzcnt | FileCheck %s --check-prefix=X64
declare i8 @llvm.ctlz.i8(i8, i1) nounwind readnone
declare i16 @llvm.ctlz.i16(i16, i1) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/macCatalyst.ll b/llvm/test/CodeGen/X86/macCatalyst.ll
index fbf3af54771b0..3a4c865d2e36e 100644
--- a/llvm/test/CodeGen/X86/macCatalyst.ll
+++ b/llvm/test/CodeGen/X86/macCatalyst.ll
@@ -1,3 +1,3 @@
-; RUN: llc %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - | FileCheck %s
target triple="x86_64-apple-ios13.0-macabi"
; CHECK: .build_version macCatalyst, 13, 0
diff --git a/llvm/test/CodeGen/X86/machine-combiner-int-vec.ll b/llvm/test/CodeGen/X86/machine-combiner-int-vec.ll
index ee42cb8126f74..a33ff276cfd9a 100644
--- a/llvm/test/CodeGen/X86/machine-combiner-int-vec.ll
+++ b/llvm/test/CodeGen/X86/machine-combiner-int-vec.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse2 -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefix=SSE
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx2 -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx512vl,avx512bw -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse2 -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx2 -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx512vl,avx512bw -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefix=AVX --check-prefix=AVX512
; Verify that 128-bit vector logical ops are reassociated.
diff --git a/llvm/test/CodeGen/X86/machine-combiner-int.ll b/llvm/test/CodeGen/X86/machine-combiner-int.ll
index 2d1fbb472176d..b1b4b6ed40d25 100644
--- a/llvm/test/CodeGen/X86/machine-combiner-int.ll
+++ b/llvm/test/CodeGen/X86/machine-combiner-int.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -machine-combiner-verify-pattern-order=true | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after machine-combiner -machine-combiner-verify-pattern-order=true -o - | FileCheck %s --check-prefix=DEAD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -machine-combiner-verify-pattern-order=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after machine-combiner -machine-combiner-verify-pattern-order=true -o - | FileCheck %s --check-prefix=DEAD
; Verify that integer multiplies are reassociated. The first multiply in
; each test should be independent of the result of the preceding add (lea).
diff --git a/llvm/test/CodeGen/X86/machine-combiner.ll b/llvm/test/CodeGen/X86/machine-combiner.ll
index dca825c5605cd..292635fff378b 100644
--- a/llvm/test/CodeGen/X86/machine-combiner.ll
+++ b/llvm/test/CodeGen/X86/machine-combiner.ll
@@ -1,13 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefix=SSE
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx512vl -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx512vl -machine-combiner-verify-pattern-order=true < %s | FileCheck %s --check-prefixes=AVX,AVX512
; Incremental updates of the instruction depths should be enough for this test
; case.
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse -machine-combiner-inc-threshold=0 < %s | FileCheck %s --check-prefix=SSE
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx -machine-combiner-inc-threshold=0 < %s | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx512vl -machine-combiner-inc-threshold=0 < %s | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse -machine-combiner-inc-threshold=0 < %s | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx -machine-combiner-inc-threshold=0 < %s | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=avx512vl -machine-combiner-inc-threshold=0 < %s | FileCheck %s --check-prefixes=AVX,AVX512
; Verify that the first two adds are independent regardless of how the inputs are
; commuted. The destination registers are used as source registers for the third add.
diff --git a/llvm/test/CodeGen/X86/machine-cp.ll b/llvm/test/CodeGen/X86/machine-cp.ll
index c84a1159ad56a..5b415d929c12c 100644
--- a/llvm/test/CodeGen/X86/machine-cp.ll
+++ b/llvm/test/CodeGen/X86/machine-cp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+sse2 -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx -mattr=+sse2 -verify-machineinstrs | FileCheck %s
; After tail duplication, two copies in an early exit BB can be cancelled out.
; rdar://10640363
diff --git a/llvm/test/CodeGen/X86/machine-cse.ll b/llvm/test/CodeGen/X86/machine-cse.ll
index e953f67651d55..6fcdd8b60a457 100644
--- a/llvm/test/CodeGen/X86/machine-cse.ll
+++ b/llvm/test/CodeGen/X86/machine-cse.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-unknown-unknown -early-live-intervals < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -early-live-intervals < %s | FileCheck %s
; rdar://7610418
%ptr = type { ptr }
diff --git a/llvm/test/CodeGen/X86/machine-loops.ll b/llvm/test/CodeGen/X86/machine-loops.ll
index ef0ba4dbf8a88..2f57d263fc8d9 100644
--- a/llvm/test/CodeGen/X86/machine-loops.ll
+++ b/llvm/test/CodeGen/X86/machine-loops.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux-gnu -stop-after=x86-isel %s -o - | llc --passes='print<machine-loops>' -x mir -o - 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -stop-after=x86-isel %s -o - | llc -combiner-topological-sorting --passes='print<machine-loops>' -x mir -o - 2>&1 | FileCheck %s
; Function Attrs: noinline nounwind optnone ssp uwtable
define i32 @foo(i32 noundef %0) #0 {
diff --git a/llvm/test/CodeGen/X86/machine-outliner-debuginfo.ll b/llvm/test/CodeGen/X86/machine-outliner-debuginfo.ll
index 08ef9a5b759f7..bb6152ece3fc0 100644
--- a/llvm/test/CodeGen/X86/machine-outliner-debuginfo.ll
+++ b/llvm/test/CodeGen/X86/machine-outliner-debuginfo.ll
@@ -1,4 +1,4 @@
-; RUN: llc -enable-machine-outliner -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -enable-machine-outliner -mtriple=x86_64-apple-darwin < %s | FileCheck %s
@x = global i32 0, align 4, !dbg !0
diff --git a/llvm/test/CodeGen/X86/machine-outliner-disubprogram.ll b/llvm/test/CodeGen/X86/machine-outliner-disubprogram.ll
index c5b3c74653db3..73a7358e9f871 100644
--- a/llvm/test/CodeGen/X86/machine-outliner-disubprogram.ll
+++ b/llvm/test/CodeGen/X86/machine-outliner-disubprogram.ll
@@ -2,7 +2,7 @@
; that we correctly emit DISubprograms for those functions.
; Also make sure that the DISubprograms reference the generated unit.
; make sure that if there are two outlined functions in the program,
-; RUN: llc %s -verify-machineinstrs -enable-machine-outliner -mtriple=x86_64-apple-darwin -o /dev/null -print-after=machine-outliner
+; RUN: llc -combiner-topological-sorting %s -verify-machineinstrs -enable-machine-outliner -mtriple=x86_64-apple-darwin -o /dev/null -print-after=machine-outliner
define void @f6() #0 !dbg !8 {
entry:
%dog = alloca i32, align 4
diff --git a/llvm/test/CodeGen/X86/machine-outliner-noredzone.ll b/llvm/test/CodeGen/X86/machine-outliner-noredzone.ll
index 72d75456ce4ce..d476ca093e58e 100644
--- a/llvm/test/CodeGen/X86/machine-outliner-noredzone.ll
+++ b/llvm/test/CodeGen/X86/machine-outliner-noredzone.ll
@@ -1,4 +1,4 @@
-; RUN: llc -enable-machine-outliner -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -enable-machine-outliner -mtriple=x86_64-apple-darwin < %s | FileCheck %s
; Ensure that the outliner doesn't outline from any functions that use a redzone.
declare ptr @llvm.stacksave() #1
diff --git a/llvm/test/CodeGen/X86/machine-outliner-tailcalls.ll b/llvm/test/CodeGen/X86/machine-outliner-tailcalls.ll
index fcd6cde9994f0..9a47c80827d9c 100644
--- a/llvm/test/CodeGen/X86/machine-outliner-tailcalls.ll
+++ b/llvm/test/CodeGen/X86/machine-outliner-tailcalls.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -enable-machine-outliner -mtriple=x86_64-apple-darwin < %s | FileCheck %s
@x = common local_unnamed_addr global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/machine-outliner.ll b/llvm/test/CodeGen/X86/machine-outliner.ll
index d2d0d43e3545e..6e9d67d68fda8 100644
--- a/llvm/test/CodeGen/X86/machine-outliner.ll
+++ b/llvm/test/CodeGen/X86/machine-outliner.ll
@@ -1,4 +1,4 @@
-; RUN: llc -enable-machine-outliner -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -enable-machine-outliner -mtriple=x86_64-apple-darwin < %s | FileCheck %s
@x = global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/machine-sink-and-implicit-null-checks.ll b/llvm/test/CodeGen/X86/machine-sink-and-implicit-null-checks.ll
index 92d0491d6667a..58e3af1fca133 100644
--- a/llvm/test/CodeGen/X86/machine-sink-and-implicit-null-checks.ll
+++ b/llvm/test/CodeGen/X86/machine-sink-and-implicit-null-checks.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-macosx -O3 -enable-implicit-null-checks -o - < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx -O3 -enable-implicit-null-checks -o - < %s 2>&1 | FileCheck %s
declare void @throw0()
declare void @throw1()
diff --git a/llvm/test/CodeGen/X86/machine-sink.ll b/llvm/test/CodeGen/X86/machine-sink.ll
index 7e2b113a36bdc..8290796be11af 100644
--- a/llvm/test/CodeGen/X86/machine-sink.ll
+++ b/llvm/test/CodeGen/X86/machine-sink.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux -check-bfi-unknown-block-queries=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -check-bfi-unknown-block-queries=true | FileCheck %s
; Checks if movl $1 is sinked to critical edge.
; CHECK-NOT: movl $1
diff --git a/llvm/test/CodeGen/X86/machine-trace-metrics-crash.ll b/llvm/test/CodeGen/X86/machine-trace-metrics-crash.ll
index bd997d1647766..58019cc8e35f5 100644
--- a/llvm/test/CodeGen/X86/machine-trace-metrics-crash.ll
+++ b/llvm/test/CodeGen/X86/machine-trace-metrics-crash.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=sse < %s | FileCheck %s
; The debug info in this test case was causing a crash because machine trace metrics
; did not correctly ignore debug instructions. The check lines ensure that the
diff --git a/llvm/test/CodeGen/X86/machine-trace-metrics-entryBB-critpath.ll b/llvm/test/CodeGen/X86/machine-trace-metrics-entryBB-critpath.ll
index 6e15d0294fda4..b56a95fd78cd2 100644
--- a/llvm/test/CodeGen/X86/machine-trace-metrics-entryBB-critpath.ll
+++ b/llvm/test/CodeGen/X86/machine-trace-metrics-entryBB-critpath.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -x86-early-ifcvt -debug-only=early-ifcvt < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -x86-early-ifcvt -debug-only=early-ifcvt < %s 2>&1 | FileCheck %s
; REQUIRES: asserts
; This test case ensures that machine trace metrics properly calculates
diff --git a/llvm/test/CodeGen/X86/machinesink-merge-debuginfo.ll b/llvm/test/CodeGen/X86/machinesink-merge-debuginfo.ll
index 8775154d4873a..150b8bda7805f 100644
--- a/llvm/test/CodeGen/X86/machinesink-merge-debuginfo.ll
+++ b/llvm/test/CodeGen/X86/machinesink-merge-debuginfo.ll
@@ -1,4 +1,4 @@
-; RUN: llc -simplify-mir -stop-after=machine-sink < %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -simplify-mir -stop-after=machine-sink < %s -o - | FileCheck %s
; ModuleID = 'test-sink-debug.cpp'
source_filename = "test-sink-debug.cpp"
diff --git a/llvm/test/CodeGen/X86/machinesink-null-debuginfo.ll b/llvm/test/CodeGen/X86/machinesink-null-debuginfo.ll
index bb63d6f8ccd87..e2a62df7381cb 100644
--- a/llvm/test/CodeGen/X86/machinesink-null-debuginfo.ll
+++ b/llvm/test/CodeGen/X86/machinesink-null-debuginfo.ll
@@ -1,4 +1,4 @@
-; RUN: llc -simplify-mir -stop-after=machine-sink < %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -simplify-mir -stop-after=machine-sink < %s -o - | FileCheck %s
; ModuleID = 'test-sink-debug.cpp'
source_filename = "test-sink-debug.cpp"
diff --git a/llvm/test/CodeGen/X86/macho-comdat.ll b/llvm/test/CodeGen/X86/macho-comdat.ll
index c96212127dba1..4914a3d69e3c0 100644
--- a/llvm/test/CodeGen/X86/macho-comdat.ll
+++ b/llvm/test/CodeGen/X86/macho-comdat.ll
@@ -1,4 +1,4 @@
-; RUN: not --crash llc -mtriple x86_64-apple-darwin < %s 2> %t
+; RUN: not --crash llc -combiner-topological-sorting -mtriple x86_64-apple-darwin < %s 2> %t
; RUN: FileCheck < %t %s
$f = comdat any
diff --git a/llvm/test/CodeGen/X86/macho-trap.ll b/llvm/test/CodeGen/X86/macho-trap.ll
index 630f5b38ca335..730abb83b3512 100644
--- a/llvm/test/CodeGen/X86/macho-trap.ll
+++ b/llvm/test/CodeGen/X86/macho-trap.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-macosx10.11 %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx10.11 %s -o - | FileCheck %s
define void @test_unreachable() {
; CHECK-LABEL: test_unreachable:
diff --git a/llvm/test/CodeGen/X86/mangle-question-mark.ll b/llvm/test/CodeGen/X86/mangle-question-mark.ll
index 67b2a50988d0a..42b6e16fb238f 100644
--- a/llvm/test/CodeGen/X86/mangle-question-mark.ll
+++ b/llvm/test/CodeGen/X86/mangle-question-mark.ll
@@ -1,10 +1,10 @@
; Test that symbols starting with '?' are not affected by IR mangling.
-; RUN: llc -mtriple i686-pc-win32 < %s | FileCheck %s --check-prefix=COFF
-; RUN: llc -mtriple x86_64-pc-win32 < %s | FileCheck %s --check-prefix=COFF64
-; RUN: llc -mtriple x86_64-uefi < %s | FileCheck %s --check-prefix=COFF64
-; RUN: llc -mtriple i686-linux-gnu < %s | FileCheck %s --check-prefix=ELF
-; RUN: llc -mtriple i686-apple-darwin < %s | FileCheck %s --check-prefix=MACHO
+; RUN: llc -combiner-topological-sorting -mtriple i686-pc-win32 < %s | FileCheck %s --check-prefix=COFF
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-win32 < %s | FileCheck %s --check-prefix=COFF64
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-uefi < %s | FileCheck %s --check-prefix=COFF64
+; RUN: llc -combiner-topological-sorting -mtriple i686-linux-gnu < %s | FileCheck %s --check-prefix=ELF
+; RUN: llc -combiner-topological-sorting -mtriple i686-apple-darwin < %s | FileCheck %s --check-prefix=MACHO
; Currently all object files allow escaping private symbols, but eventually we
; might want to reject that.
diff --git a/llvm/test/CodeGen/X86/masked-iv-safe.ll b/llvm/test/CodeGen/X86/masked-iv-safe.ll
index a4f5e52a27d8a..99ebb2b20b178 100644
--- a/llvm/test/CodeGen/X86/masked-iv-safe.ll
+++ b/llvm/test/CodeGen/X86/masked-iv-safe.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --implicit-check-not '{{and|movz|sar|shl}}'
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --implicit-check-not '{{and|movz|sar|shl}}'
; Optimize away zext-inreg and sext-inreg on the loop induction
; variable using trip-count information.
diff --git a/llvm/test/CodeGen/X86/masked-iv-unsafe.ll b/llvm/test/CodeGen/X86/masked-iv-unsafe.ll
index 42bd6e9b75447..9f09ace41fba6 100644
--- a/llvm/test/CodeGen/X86/masked-iv-unsafe.ll
+++ b/llvm/test/CodeGen/X86/masked-iv-unsafe.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; Don't optimize away zext-inreg and sext-inreg on the loop induction
; variable, because it isn't safe to do so in these cases.
diff --git a/llvm/test/CodeGen/X86/masked_compressstore_isel.ll b/llvm/test/CodeGen/X86/masked_compressstore_isel.ll
index b944712e4863d..de59823b5595b 100644
--- a/llvm/test/CodeGen/X86/masked_compressstore_isel.ll
+++ b/llvm/test/CodeGen/X86/masked_compressstore_isel.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -start-after=codegenprepare -stop-before finalize-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -start-after=codegenprepare -stop-before finalize-isel | FileCheck %s
define void @_Z3fooiPiPs(<8 x i32> %gepload, <8 x i1> %0) #0 {
; CHECK-LABEL: name: _Z3fooiPiPs
diff --git a/llvm/test/CodeGen/X86/masked_expandload_isel.ll b/llvm/test/CodeGen/X86/masked_expandload_isel.ll
index 72323bc2d28bd..f5d6db1e7729d 100644
--- a/llvm/test/CodeGen/X86/masked_expandload_isel.ll
+++ b/llvm/test/CodeGen/X86/masked_expandload_isel.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -start-after=codegenprepare -stop-before finalize-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -start-after=codegenprepare -stop-before finalize-isel | FileCheck %s
define <8 x i16> @_Z3fooiPiPs(<8 x i16> %src, <8 x i1> %mask) #0 {
; CHECK-LABEL: name: _Z3fooiPiPs
diff --git a/llvm/test/CodeGen/X86/masked_loadstore_split.ll b/llvm/test/CodeGen/X86/masked_loadstore_split.ll
index 0e689a597a72b..848e3a3073819 100644
--- a/llvm/test/CodeGen/X86/masked_loadstore_split.ll
+++ b/llvm/test/CodeGen/X86/masked_loadstore_split.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=avx2 -stop-after=finalize-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=avx2 -stop-after=finalize-isel | FileCheck %s
define void @split_masked_store(ptr %0) {
; CHECK-LABEL: name: split_masked_store
diff --git a/llvm/test/CodeGen/X86/masked_packss.ll b/llvm/test/CodeGen/X86/masked_packss.ll
index f4e9063a7baff..261697c5fad58 100644
--- a/llvm/test/CodeGen/X86/masked_packss.ll
+++ b/llvm/test/CodeGen/X86/masked_packss.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,avx512vl | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,avx512vl | FileCheck %s --check-prefixes=AVX512
define <16 x i8> @_mm_mask_packss_epi16_manual(<16 x i8> %src, i16 noundef %k, <8 x i16> %a, <8 x i16> %b) nounwind {
; AVX2-LABEL: _mm_mask_packss_epi16_manual:
diff --git a/llvm/test/CodeGen/X86/masked_packus.ll b/llvm/test/CodeGen/X86/masked_packus.ll
index c0cb978f3a0dc..b7d562e1fb94c 100644
--- a/llvm/test/CodeGen/X86/masked_packus.ll
+++ b/llvm/test/CodeGen/X86/masked_packus.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,avx512vl | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,avx512vl | FileCheck %s --check-prefixes=AVX512
define <16 x i8> @_mm_mask_packus_epi16_manual(<16 x i8> %src, i16 noundef %k, <8 x i16> %a, <8 x i16> %b) nounwind {
; AVX2-LABEL: _mm_mask_packus_epi16_manual:
diff --git a/llvm/test/CodeGen/X86/maskmovdqu.ll b/llvm/test/CodeGen/X86/maskmovdqu.ll
index 6627ef78ec1ae..1aaa8f9f803f2 100644
--- a/llvm/test/CodeGen/X86/maskmovdqu.ll
+++ b/llvm/test/CodeGen/X86/maskmovdqu.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,-avx | FileCheck %s --check-prefix=i686_SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,-avx | FileCheck %s --check-prefix=x86_64_SSE2
-; RUN: llc < %s -mtriple=x86_64--gnux32 -mattr=+sse2,-avx | FileCheck %s --check-prefix=x86_x32_SSE2
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefix=i686_AVX
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=x86_64_AVX
-; RUN: llc < %s -mtriple=x86_64--gnux32 -mattr=+avx | FileCheck %s --check-prefix=x86_x32_AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2,-avx | FileCheck %s --check-prefix=i686_SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2,-avx | FileCheck %s --check-prefix=x86_64_SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--gnux32 -mattr=+sse2,-avx | FileCheck %s --check-prefix=x86_x32_SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefix=i686_AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=x86_64_AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--gnux32 -mattr=+avx | FileCheck %s --check-prefix=x86_x32_AVX
; rdar://6573467
define void @test(<16 x i8> %a, <16 x i8> %b, i32 %dummy, ptr %c) nounwind {
diff --git a/llvm/test/CodeGen/X86/materialize.ll b/llvm/test/CodeGen/X86/materialize.ll
index 045e8daa7597b..b4ba8862cad16 100644
--- a/llvm/test/CodeGen/X86/materialize.ll
+++ b/llvm/test/CodeGen/X86/materialize.ll
@@ -1,11 +1,11 @@
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+cmov %s -o - | FileCheck %s --check-prefix=CHECK32
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+cmov %s -o - | FileCheck %s --check-prefix=CHECK64
-; RUN: llc -mtriple=x86_64-pc-win32 -mattr=+cmov %s -o - | FileCheck %s --check-prefix=CHECKWIN64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+cmov %s -o - | FileCheck %s --check-prefix=CHECK32
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+cmov %s -o - | FileCheck %s --check-prefix=CHECK64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-win32 -mattr=+cmov %s -o - | FileCheck %s --check-prefix=CHECKWIN64
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+cmov %s -o /dev/null \
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+cmov %s -o /dev/null \
; RUN: -print-after postrapseudos -filter-print-funcs pr26023 2>&1 \
; RUN: | FileCheck %s --check-prefix=OPERAND32
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+cmov %s -o /dev/null \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+cmov %s -o /dev/null \
; RUN: -print-after postrapseudos -filter-print-funcs one64_minsize 2>&1 \
; RUN: | FileCheck %s --check-prefix=OPERAND64
diff --git a/llvm/test/CodeGen/X86/mature-mc-support.ll b/llvm/test/CodeGen/X86/mature-mc-support.ll
index fefd456966caa..a440742ece85f 100644
--- a/llvm/test/CodeGen/X86/mature-mc-support.ll
+++ b/llvm/test/CodeGen/X86/mature-mc-support.ll
@@ -1,16 +1,16 @@
; Test that inline assembly is parsed by the MC layer when MC support is mature
; (even when the output is assembly).
-; RUN: not llc -mtriple=i686-- < %s > /dev/null 2> %t1
+; RUN: not llc -combiner-topological-sorting -mtriple=i686-- < %s > /dev/null 2> %t1
; RUN: FileCheck %s < %t1
-; RUN: not llc -mtriple=i686-- -filetype=obj < %s > /dev/null 2> %t2
+; RUN: not llc -combiner-topological-sorting -mtriple=i686-- -filetype=obj < %s > /dev/null 2> %t2
; RUN: FileCheck %s < %t2
-; RUN: not llc -mtriple=x86_64-- < %s > /dev/null 2> %t3
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-- < %s > /dev/null 2> %t3
; RUN: FileCheck %s < %t3
-; RUN: not llc -mtriple=x86_64-- -filetype=obj < %s > /dev/null 2> %t4
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-- -filetype=obj < %s > /dev/null 2> %t4
; RUN: FileCheck %s < %t4
module asm " .this_directive_is_very_unlikely_to_exist"
diff --git a/llvm/test/CodeGen/X86/mbp-false-cfg-break.ll b/llvm/test/CodeGen/X86/mbp-false-cfg-break.ll
index fc2549153321e..62fb5c4ec947a 100644
--- a/llvm/test/CodeGen/X86/mbp-false-cfg-break.ll
+++ b/llvm/test/CodeGen/X86/mbp-false-cfg-break.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define void @test(i1 %cnd) !prof !{!"function_entry_count", i64 1024} {
; CHECK-LABEL: @test
diff --git a/llvm/test/CodeGen/X86/mcinst-avx-lowering.ll b/llvm/test/CodeGen/X86/mcinst-avx-lowering.ll
index db72e0871c8e2..66a33fd8c966e 100644
--- a/llvm/test/CodeGen/X86/mcinst-avx-lowering.ll
+++ b/llvm/test/CodeGen/X86/mcinst-avx-lowering.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-macosx10 -mattr=avx -show-mc-encoding < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx10 -mattr=avx -show-mc-encoding < %s | FileCheck %s
define i64 @t1(double %d_ivar) nounwind uwtable ssp {
entry:
diff --git a/llvm/test/CodeGen/X86/mcinst-lowering.ll b/llvm/test/CodeGen/X86/mcinst-lowering.ll
index 1b46fcf0ffa04..ac671566b49e1 100644
--- a/llvm/test/CodeGen/X86/mcinst-lowering.ll
+++ b/llvm/test/CodeGen/X86/mcinst-lowering.ll
@@ -1,4 +1,4 @@
-; RUN: llc --show-mc-encoding < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting --show-mc-encoding < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.0.0"
diff --git a/llvm/test/CodeGen/X86/mcu-abi.ll b/llvm/test/CodeGen/X86/mcu-abi.ll
index 53c228943d914..73d955908f7c7 100644
--- a/llvm/test/CodeGen/X86/mcu-abi.ll
+++ b/llvm/test/CodeGen/X86/mcu-abi.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-elfiamcu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-elfiamcu | FileCheck %s
%struct.st12_t = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/mem-intrin-base-reg.ll b/llvm/test/CodeGen/X86/mem-intrin-base-reg.ll
index 0360b03f95215..9fde5a7741f2a 100644
--- a/llvm/test/CodeGen/X86/mem-intrin-base-reg.ll
+++ b/llvm/test/CodeGen/X86/mem-intrin-base-reg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-windows -mattr=+sse2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-windows -mattr=+sse2 < %s | FileCheck %s
target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32"
target triple = "i686-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/mem-promote-integers.ll b/llvm/test/CodeGen/X86/mem-promote-integers.ll
index e96d5d2767af2..d8621d9a57afc 100644
--- a/llvm/test/CodeGen/X86/mem-promote-integers.ll
+++ b/llvm/test/CodeGen/X86/mem-promote-integers.ll
@@ -1,8 +1,8 @@
; Test the basic functionality of integer element promotions of different types.
; This tests checks passing of arguments, loading and storing to memory and
; basic arithmetic.
-; RUN: llc -mtriple=i686-- < %s > /dev/null
-; RUN: llc -mtriple=x86_64-- < %s > /dev/null
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- < %s > /dev/null
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s > /dev/null
define <1 x i8> @test_1xi8(<1 x i8> %x, ptr %b) {
%bb = load <1 x i8>, ptr %b
diff --git a/llvm/test/CodeGen/X86/membarrier.ll b/llvm/test/CodeGen/X86/membarrier.ll
index 2773f01f7ab82..8b3c507bae89a 100644
--- a/llvm/test/CodeGen/X86/membarrier.ll
+++ b/llvm/test/CodeGen/X86/membarrier.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-sse -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-sse -O0 | FileCheck %s
; PR9675
define i32 @t() {
diff --git a/llvm/test/CodeGen/X86/memcmp-constant.ll b/llvm/test/CodeGen/X86/memcmp-constant.ll
index 2059b8f804082..c890717264dfa 100644
--- a/llvm/test/CodeGen/X86/memcmp-constant.ll
+++ b/llvm/test/CodeGen/X86/memcmp-constant.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
@.str1 = private constant [4 x i8] c"\00\00\00\00", align 1
@.str2 = private constant [4 x i8] c"\ff\ff\ff\ff", align 1
diff --git a/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll b/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll
index c16e2adb7a078..64b08109f7039 100644
--- a/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll
+++ b/llvm/test/CodeGen/X86/memcmp-mergeexpand.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
; This tests interaction between MergeICmp and ExpandMemCmp.
diff --git a/llvm/test/CodeGen/X86/memcmp-minsize-x32.ll b/llvm/test/CodeGen/X86/memcmp-minsize-x32.ll
index 200a8184d4bd1..1010e66112ce9 100644
--- a/llvm/test/CodeGen/X86/memcmp-minsize-x32.ll
+++ b/llvm/test/CodeGen/X86/memcmp-minsize-x32.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=cmov | FileCheck %s --check-prefixes=X86,X86-NOSSE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=cmov | FileCheck %s --check-prefixes=X86,X86-NOSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
; This tests codegen time inlining/optimization of memcmp
; rdar://6480398
diff --git a/llvm/test/CodeGen/X86/memcmp-minsize.ll b/llvm/test/CodeGen/X86/memcmp-minsize.ll
index 9c20f3e0cdef8..53eb8d3f04a0c 100644
--- a/llvm/test/CodeGen/X86/memcmp-minsize.ll
+++ b/llvm/test/CodeGen/X86/memcmp-minsize.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64,X64-SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64,X64-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX2
; This tests codegen time inlining/optimization of memcmp
; rdar://6480398
diff --git a/llvm/test/CodeGen/X86/memcpy-2.ll b/llvm/test/CodeGen/X86/memcpy-2.ll
index 25d2753480131..958f7b0da4167 100644
--- a/llvm/test/CodeGen/X86/memcpy-2.ll
+++ b/llvm/test/CodeGen/X86/memcpy-2.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=+sse2 -mtriple=i686-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=SSE2-Darwin
-; RUN: llc < %s -mattr=+sse2 -mtriple=i686-pc-mingw32 -mcpu=core2 | FileCheck %s -check-prefix=SSE2-Mingw32
-; RUN: llc < %s -mattr=+sse,-sse2 -mtriple=i686-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=SSE1
-; RUN: llc < %s -mattr=-sse -mtriple=i686-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=NOSSE
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=X86-64
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=nehalem | FileCheck %s -check-prefix=NHM_64
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sse2 -mtriple=i686-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=SSE2-Darwin
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sse2 -mtriple=i686-pc-mingw32 -mcpu=core2 | FileCheck %s -check-prefix=SSE2-Mingw32
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sse,-sse2 -mtriple=i686-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=SSE1
+; RUN: llc -combiner-topological-sorting < %s -mattr=-sse -mtriple=i686-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=NOSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=X86-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=nehalem | FileCheck %s -check-prefix=NHM_64
@.str = internal constant [25 x i8] c"image\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00\00"
@.str2 = internal constant [30 x i8] c"xxxxxxxxxxxxxxxxxxxxxxxxxxxxx\00", align 4
diff --git a/llvm/test/CodeGen/X86/memcpy-from-string.ll b/llvm/test/CodeGen/X86/memcpy-from-string.ll
index 96cb9b5f875a6..43c3e28c471a3 100644
--- a/llvm/test/CodeGen/X86/memcpy-from-string.ll
+++ b/llvm/test/CodeGen/X86/memcpy-from-string.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s --check-prefix=X86
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/memcpy-inline-fsrm.ll b/llvm/test/CodeGen/X86/memcpy-inline-fsrm.ll
index 8d15e04a8b466..afb8ddf4b42b7 100644
--- a/llvm/test/CodeGen/X86/memcpy-inline-fsrm.ll
+++ b/llvm/test/CodeGen/X86/memcpy-inline-fsrm.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy -mattr=-fsrm < %s -o - | FileCheck %s --check-prefix=NOFSRM
-; RUN: llc -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy -mattr=+fsrm < %s -o - | FileCheck %s --check-prefix=FSRM
-; RUN: llc -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy -mcpu=haswell < %s | FileCheck %s --check-prefix=NOFSRM
-; RUN: llc -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy -mcpu=icelake-client < %s | FileCheck %s --check-prefix=FSRM
-; RUN: llc -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy -mcpu=icelake-server < %s | FileCheck %s --check-prefix=FSRM
-; RUN: llc -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy -mcpu=znver3 < %s | FileCheck %s --check-prefix=FSRM
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy -mattr=-fsrm < %s -o - | FileCheck %s --check-prefix=NOFSRM
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy -mattr=+fsrm < %s -o - | FileCheck %s --check-prefix=FSRM
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy -mcpu=haswell < %s | FileCheck %s --check-prefix=NOFSRM
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy -mcpu=icelake-client < %s | FileCheck %s --check-prefix=FSRM
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy -mcpu=icelake-server < %s | FileCheck %s --check-prefix=FSRM
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -x86-use-fsrm-for-memcpy -mcpu=znver3 < %s | FileCheck %s --check-prefix=FSRM
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
diff --git a/llvm/test/CodeGen/X86/memcpy-inline.ll b/llvm/test/CodeGen/X86/memcpy-inline.ll
index 82d6b0062e681..a9a3834bdeff6 100644
--- a/llvm/test/CodeGen/X86/memcpy-inline.ll
+++ b/llvm/test/CodeGen/X86/memcpy-inline.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 | FileCheck %s
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
declare void @llvm.memcpy.inline.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
diff --git a/llvm/test/CodeGen/X86/memcpy-light-avx.ll b/llvm/test/CodeGen/X86/memcpy-light-avx.ll
index 248dc9310eb1f..14e9b35f75712 100644
--- a/llvm/test/CodeGen/X86/memcpy-light-avx.ll
+++ b/llvm/test/CodeGen/X86/memcpy-light-avx.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell -mattr=prefer-128-bit | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=znver1 -mattr=prefer-128-bit | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx2,+prefer-128-bit,+allow-light-256-bit | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx2,+prefer-128-bit,-allow-light-256-bit | FileCheck %s --check-prefixes=NO256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell -mattr=prefer-128-bit | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=znver1 -mattr=prefer-128-bit | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx2,+prefer-128-bit,+allow-light-256-bit | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx2,+prefer-128-bit,-allow-light-256-bit | FileCheck %s --check-prefixes=NO256
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
diff --git a/llvm/test/CodeGen/X86/memcpy-struct-by-value.ll b/llvm/test/CodeGen/X86/memcpy-struct-by-value.ll
index f6b1e48700097..3f1c5b6ec7e30 100644
--- a/llvm/test/CodeGen/X86/memcpy-struct-by-value.ll
+++ b/llvm/test/CodeGen/X86/memcpy-struct-by-value.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-linux-gnu -mattr=-ermsb < %s -o - | FileCheck %s --check-prefix=NOFAST32
-; RUN: llc -mtriple=i686-linux-gnu -mattr=+ermsb < %s -o - | FileCheck %s --check-prefix=FAST32
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=-ermsb < %s -o - | FileCheck %s --check-prefix=NOFAST
-; RUN: llc -mtriple=x86_64-linux-gnu -mattr=+ermsb < %s -o - | FileCheck %s --check-prefix=FAST
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=generic < %s -o - | FileCheck %s --check-prefix=NOFAST
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=haswell < %s -o - | FileCheck %s --check-prefix=FAST
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=skylake < %s -o - | FileCheck %s --check-prefix=FAST
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-gnu -mattr=-ermsb < %s -o - | FileCheck %s --check-prefix=NOFAST32
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-gnu -mattr=+ermsb < %s -o - | FileCheck %s --check-prefix=FAST32
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=-ermsb < %s -o - | FileCheck %s --check-prefix=NOFAST
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mattr=+ermsb < %s -o - | FileCheck %s --check-prefix=FAST
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mcpu=generic < %s -o - | FileCheck %s --check-prefix=NOFAST
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mcpu=haswell < %s -o - | FileCheck %s --check-prefix=FAST
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mcpu=skylake < %s -o - | FileCheck %s --check-prefix=FAST
; FIXME: The documentation states that ivybridge has ermsb, but this is not
; enabled right now since I could not confirm by testing.
-; RUN: llc -mtriple=x86_64-linux-gnu -mcpu=ivybridge < %s -o - | FileCheck %s --check-prefix=NOFAST
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -mcpu=ivybridge < %s -o - | FileCheck %s --check-prefix=NOFAST
%struct.large = type { [4096 x i8] }
diff --git a/llvm/test/CodeGen/X86/memcpy.ll b/llvm/test/CodeGen/X86/memcpy.ll
index ff026b142ecf3..002f5e7801541 100644
--- a/llvm/test/CodeGen/X86/memcpy.ll
+++ b/llvm/test/CodeGen/X86/memcpy.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=DARWIN
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 | FileCheck %s -check-prefix=LINUX
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake | FileCheck %s -check-prefix=LINUX-SKL
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skx | FileCheck %s -check-prefix=LINUX-SKX
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=knl | FileCheck %s -check-prefix=LINUX-KNL
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx512bw | FileCheck %s -check-prefix=LINUX-AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s -check-prefix=DARWIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake | FileCheck %s -check-prefix=LINUX-SKL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=skx | FileCheck %s -check-prefix=LINUX-SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=knl | FileCheck %s -check-prefix=LINUX-KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx512bw | FileCheck %s -check-prefix=LINUX-AVX512BW
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
declare void @llvm.memcpy.p256.p256.i64(ptr addrspace(256) nocapture, ptr addrspace(256) nocapture, i64, i1) nounwind
diff --git a/llvm/test/CodeGen/X86/memfold-mov32r0.ll b/llvm/test/CodeGen/X86/memfold-mov32r0.ll
index f7cbf6c33c94c..5c89ce321df94 100644
--- a/llvm/test/CodeGen/X86/memfold-mov32r0.ll
+++ b/llvm/test/CodeGen/X86/memfold-mov32r0.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 | FileCheck %s
; CHECK: movq $0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill
define i32 @test() nounwind {
diff --git a/llvm/test/CodeGen/X86/memset-2.ll b/llvm/test/CodeGen/X86/memset-2.ll
index a4fbbc5700470..41af0a79d4860 100644
--- a/llvm/test/CodeGen/X86/memset-2.ll
+++ b/llvm/test/CodeGen/X86/memset-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-apple-darwin9 -mcpu=yonah < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-apple-darwin9 -mcpu=yonah < %s | FileCheck %s
define fastcc void @t1(ptr nocapture %s) nounwind {
; CHECK-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/memset-3.ll b/llvm/test/CodeGen/X86/memset-3.ll
index a4e517bc0376f..33a0286a34b9f 100644
--- a/llvm/test/CodeGen/X86/memset-3.ll
+++ b/llvm/test/CodeGen/X86/memset-3.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-apple-darwin < %s | FileCheck %s --implicit-check-not memset
+; RUN: llc -combiner-topological-sorting -mtriple=i386-apple-darwin < %s | FileCheck %s --implicit-check-not memset
; PR6767
define void @t() nounwind ssp {
diff --git a/llvm/test/CodeGen/X86/memset-inline.ll b/llvm/test/CodeGen/X86/memset-inline.ll
index d3999c01a5d71..cc85b036927c6 100644
--- a/llvm/test/CodeGen/X86/memset-inline.ll
+++ b/llvm/test/CodeGen/X86/memset-inline.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=sse2,-sse4.2 | FileCheck %s --check-prefixes=GPR,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=sse4.2,-avx | FileCheck %s --check-prefixes=GPR,SSE4
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx,-avx512f | FileCheck %s --check-prefixes=GPR,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx512f | FileCheck %s --check-prefixes=GPR,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=sse2,-sse4.2 | FileCheck %s --check-prefixes=GPR,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=sse4.2,-avx | FileCheck %s --check-prefixes=GPR,SSE4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx,-avx512f | FileCheck %s --check-prefixes=GPR,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx512f | FileCheck %s --check-prefixes=GPR,AVX512
declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) nounwind
declare void @llvm.memset.inline.p0.i64(ptr nocapture, i8, i64, i1) nounwind
diff --git a/llvm/test/CodeGen/X86/memset-minsize.ll b/llvm/test/CodeGen/X86/memset-minsize.ll
index d66500ea31a0d..9c80210fb7a7b 100644
--- a/llvm/test/CodeGen/X86/memset-minsize.ll
+++ b/llvm/test/CodeGen/X86/memset-minsize.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define void @tiny_memset_to_rep_stos(ptr %ptr) minsize nounwind {
; CHECK-LABEL: tiny_memset_to_rep_stos:
diff --git a/llvm/test/CodeGen/X86/memset-nonzero.ll b/llvm/test/CodeGen/X86/memset-nonzero.ll
index d07b0f64d68c1..ca861a0cf959f 100644
--- a/llvm/test/CodeGen/X86/memset-nonzero.ll
+++ b/llvm/test/CodeGen/X86/memset-nonzero.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s -mattr=sse | FileCheck %s --check-prefix=SSE
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s -mattr=sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s -mattr=sse2,-slow-unaligned-mem-16 | FileCheck %s --check-prefix=SSE2FAST
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s -mattr=avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s -mattr=avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s -mattr=avx512f -mattr=+prefer-256-bit | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s -mattr=avx512bw -mattr=+prefer-256-bit | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s -mattr=avx512dq -mattr=+prefer-256-bit | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s -mattr=avx512f -mattr=-prefer-256-bit | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s -mattr=avx512bw -mattr=-prefer-256-bit | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s -mattr=sse | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s -mattr=sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s -mattr=sse2,-slow-unaligned-mem-16 | FileCheck %s --check-prefix=SSE2FAST
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s -mattr=avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s -mattr=avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s -mattr=avx512f -mattr=+prefer-256-bit | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s -mattr=avx512bw -mattr=+prefer-256-bit | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s -mattr=avx512dq -mattr=+prefer-256-bit | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s -mattr=avx512f -mattr=-prefer-256-bit | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s -mattr=avx512bw -mattr=-prefer-256-bit | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW
; https://llvm.org/bugs/show_bug.cgi?id=27100
diff --git a/llvm/test/CodeGen/X86/memset-sse-stack-realignment.ll b/llvm/test/CodeGen/X86/memset-sse-stack-realignment.ll
index a5ecdab880a6a..be805cdfe097d 100644
--- a/llvm/test/CodeGen/X86/memset-sse-stack-realignment.ll
+++ b/llvm/test/CodeGen/X86/memset-sse-stack-realignment.ll
@@ -2,11 +2,11 @@
; Make sure that we realign the stack. Mingw32 uses 4 byte stack alignment, we
; need 16 bytes for SSE and 32 bytes for AVX.
-; RUN: llc < %s -mtriple=i386-pc-mingw32 -mcpu=pentium2 | FileCheck %s --check-prefix=NOSSE
-; RUN: llc < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=pentium3 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=yonah | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=corei7-avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=core-avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-mingw32 -mcpu=pentium2 | FileCheck %s --check-prefix=NOSSE
+; RUN: llc -combiner-topological-sorting < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=pentium3 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=yonah | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=corei7-avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -stackrealign -mtriple=i386-pc-mingw32 -mcpu=core-avx2 | FileCheck %s --check-prefix=AVX
define void @test1(i32 %t) nounwind {
; NOSSE-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/memset-vs-memset-inline.ll b/llvm/test/CodeGen/X86/memset-vs-memset-inline.ll
index e34682aa0fcb4..47ccc2f1ef574 100644
--- a/llvm/test/CodeGen/X86/memset-vs-memset-inline.ll
+++ b/llvm/test/CodeGen/X86/memset-vs-memset-inline.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 | FileCheck %s
declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) nounwind
declare void @llvm.memset.inline.p0.i64(ptr nocapture, i8, i64, i1) nounwind
diff --git a/llvm/test/CodeGen/X86/memset.ll b/llvm/test/CodeGen/X86/memset.ll
index 910c73a5097e9..2ef5aef1e3296 100644
--- a/llvm/test/CodeGen/X86/memset.ll
+++ b/llvm/test/CodeGen/X86/memset.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=pentium2 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mcpu=pentium3 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=XMM
-; RUN: llc < %s -mcpu=bdver1 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=YMM
+; RUN: llc -combiner-topological-sorting < %s -mcpu=pentium2 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mcpu=pentium3 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=XMM
+; RUN: llc -combiner-topological-sorting < %s -mcpu=bdver1 -mtriple=i686-apple-darwin8.8.0 | FileCheck %s --check-prefix=YMM
%struct.x = type { i16, i16 }
diff --git a/llvm/test/CodeGen/X86/memset64-on-x86-32.ll b/llvm/test/CodeGen/X86/memset64-on-x86-32.ll
index 480a0970bd39d..f05ea1a350bef 100644
--- a/llvm/test/CodeGen/X86/memset64-on-x86-32.ll
+++ b/llvm/test/CodeGen/X86/memset64-on-x86-32.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=sse4.2 | FileCheck %s --check-prefix=FAST
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=ssse3 | FileCheck %s --check-prefix=SLOW_32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=ssse3 | FileCheck %s --check-prefix=SLOW_64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=sse4.2 | FileCheck %s --check-prefix=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=ssse3 | FileCheck %s --check-prefix=SLOW_32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=ssse3 | FileCheck %s --check-prefix=SLOW_64
define void @bork(ptr nocapture align 4 %dst) nounwind {
; FAST-LABEL: bork:
diff --git a/llvm/test/CodeGen/X86/merge-consecutive-stores-i1.ll b/llvm/test/CodeGen/X86/merge-consecutive-stores-i1.ll
index 95ff7752c1cad..32b4f36579099 100644
--- a/llvm/test/CodeGen/X86/merge-consecutive-stores-i1.ll
+++ b/llvm/test/CodeGen/X86/merge-consecutive-stores-i1.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-- < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s
; Ensure that MergeConsecutiveStores doesn't crash when dealing with
; i1 operands.
diff --git a/llvm/test/CodeGen/X86/merge-consecutive-stores.ll b/llvm/test/CodeGen/X86/merge-consecutive-stores.ll
index ff9b349da6375..f26994e3b8476 100644
--- a/llvm/test/CodeGen/X86/merge-consecutive-stores.ll
+++ b/llvm/test/CodeGen/X86/merge-consecutive-stores.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s
; Make sure that we are zeroing one memory location at a time using xorl and
; not both using XMM registers.
diff --git a/llvm/test/CodeGen/X86/merge-huge-sp-updates.ll b/llvm/test/CodeGen/X86/merge-huge-sp-updates.ll
index 6920e74d3ec5a..c4ad70c3f8e3f 100644
--- a/llvm/test/CodeGen/X86/merge-huge-sp-updates.ll
+++ b/llvm/test/CodeGen/X86/merge-huge-sp-updates.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux-unknown -verify-machineinstrs -o %t.s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-unknown -verify-machineinstrs -o %t.s
; RUN: FileCheck --input-file=%t.s %s
; Double-check that we are able to assemble the generated '.s'. A symptom of the
diff --git a/llvm/test/CodeGen/X86/merge-sp-update-lea.ll b/llvm/test/CodeGen/X86/merge-sp-update-lea.ll
index 28cbd33ef0972..a60703674e542 100644
--- a/llvm/test/CodeGen/X86/merge-sp-update-lea.ll
+++ b/llvm/test/CodeGen/X86/merge-sp-update-lea.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - | FileCheck %s
target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
target triple = "i386-apple-macosx10.5"
diff --git a/llvm/test/CodeGen/X86/merge-sp-updates-cfi.ll b/llvm/test/CodeGen/X86/merge-sp-updates-cfi.ll
index dc758cf321235..cb300af6ba761 100644
--- a/llvm/test/CodeGen/X86/merge-sp-updates-cfi.ll
+++ b/llvm/test/CodeGen/X86/merge-sp-updates-cfi.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux | FileCheck %s
; Function Attrs: optsize
diff --git a/llvm/test/CodeGen/X86/merge-store-dependency.ll b/llvm/test/CodeGen/X86/merge-store-dependency.ll
index 1e1802b1d50b3..d6ff77742aee1 100644
--- a/llvm/test/CodeGen/X86/merge-store-dependency.ll
+++ b/llvm/test/CodeGen/X86/merge-store-dependency.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-linux-android24 -verify-machineinstrs \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-android24 -verify-machineinstrs \
; RUN: -debug-only=machine-scheduler -o - 2>&1 | FileCheck %s
; REQUIRES: asserts
diff --git a/llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll b/llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll
index c1fdd71c04948..5901d0fb37708 100644
--- a/llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll
+++ b/llvm/test/CodeGen/X86/merge-store-partially-alias-loads.ll
@@ -1,6 +1,6 @@
; REQUIRES: asserts
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck -check-prefix=X86 %s
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -debug-only=isel < %s -o /dev/null 2>&1 | FileCheck -check-prefix=DBGDAG %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck -check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -debug-only=isel < %s -o /dev/null 2>&1 | FileCheck -check-prefix=DBGDAG %s
; It's OK to merge the load / store of the first 2 components, but
; they must not be placed on the same chain after merging.
diff --git a/llvm/test/CodeGen/X86/merge-vector-stores-scale-idx-crash.ll b/llvm/test/CodeGen/X86/merge-vector-stores-scale-idx-crash.ll
index 206d453ad87d5..45f6665d72d33 100644
--- a/llvm/test/CodeGen/X86/merge-vector-stores-scale-idx-crash.ll
+++ b/llvm/test/CodeGen/X86/merge-vector-stores-scale-idx-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-osx10.14 -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-osx10.14 -mattr=+avx2 | FileCheck %s
; Check that we don't crash due creating invalid extract_subvector indices in store merging.
; CHECK-LABEL: testfn
diff --git a/llvm/test/CodeGen/X86/merge_store.ll b/llvm/test/CodeGen/X86/merge_store.ll
index afe0ef969a40e..91e594b9b267e 100644
--- a/llvm/test/CodeGen/X86/merge_store.ll
+++ b/llvm/test/CodeGen/X86/merge_store.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define void @merge_store(ptr nocapture %a) {
; CHECK-LABEL: merge_store:
diff --git a/llvm/test/CodeGen/X86/merge_store_duplicated_loads.ll b/llvm/test/CodeGen/X86/merge_store_duplicated_loads.ll
index 70c3e804f1216..4d72872eb3857 100644
--- a/llvm/test/CodeGen/X86/merge_store_duplicated_loads.ll
+++ b/llvm/test/CodeGen/X86/merge_store_duplicated_loads.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 -o - | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/mfence.ll b/llvm/test/CodeGen/X86/mfence.ll
index f2d3bc8217b1d..db39c15150b3e 100644
--- a/llvm/test/CodeGen/X86/mfence.ll
+++ b/llvm/test/CodeGen/X86/mfence.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefixes=CHECK,X64
; It doesn't matter if an x86-64 target has specified "no-sse2"; we still can use mfence.
diff --git a/llvm/test/CodeGen/X86/mingw-alloca.ll b/llvm/test/CodeGen/X86/mingw-alloca.ll
index fe60f103a9587..d61e5f524852a 100644
--- a/llvm/test/CodeGen/X86/mingw-alloca.ll
+++ b/llvm/test/CodeGen/X86/mingw-alloca.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-pc-mingw32 | FileCheck %s -check-prefix=COFF
-; RUN: llc < %s -mtriple=i386-pc-mingw32-elf | FileCheck %s -check-prefix=ELF
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-mingw32 | FileCheck %s -check-prefix=COFF
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-mingw32-elf | FileCheck %s -check-prefix=ELF
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
diff --git a/llvm/test/CodeGen/X86/mingw-comdats-xdata.ll b/llvm/test/CodeGen/X86/mingw-comdats-xdata.ll
index 0e914a89aee76..7d94084758163 100644
--- a/llvm/test/CodeGen/X86/mingw-comdats-xdata.ll
+++ b/llvm/test/CodeGen/X86/mingw-comdats-xdata.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=x86_64-w64-windows-gnu < %s | FileCheck %s --check-prefix=GNU
-; RUN: llc -mtriple=x86_64-pc-cygwin < %s | FileCheck %s --check-prefix=GNU
-; RUN: llc -mtriple=x86_64-w64-windows-gnu < %s -filetype=obj | llvm-objdump - --headers | FileCheck %s --check-prefix=GNUOBJ
-; RUN: llc -mtriple=x86_64-pc-cygwin < %s -filetype=obj | llvm-objdump - --headers | FileCheck %s --check-prefix=GNUOBJ
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-w64-windows-gnu < %s | FileCheck %s --check-prefix=GNU
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-cygwin < %s | FileCheck %s --check-prefix=GNU
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-w64-windows-gnu < %s -filetype=obj | llvm-objdump - --headers | FileCheck %s --check-prefix=GNUOBJ
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-cygwin < %s -filetype=obj | llvm-objdump - --headers | FileCheck %s --check-prefix=GNUOBJ
; When doing GCC style comdats for MinGW, the .xdata sections don't have a normal comdat
; symbol attached, which requires a bit of adjustments for the assembler output.
diff --git a/llvm/test/CodeGen/X86/mingw-comdats.ll b/llvm/test/CodeGen/X86/mingw-comdats.ll
index 71e9503bdeb61..f28f5fdf1f4e6 100644
--- a/llvm/test/CodeGen/X86/mingw-comdats.ll
+++ b/llvm/test/CodeGen/X86/mingw-comdats.ll
@@ -1,11 +1,11 @@
-; RUN: llc -function-sections -mtriple=x86_64-windows-itanium < %s | FileCheck %s
-; RUN: llc -function-sections -mtriple=x86_64-windows-msvc < %s | FileCheck %s
-; RUN: llc -function-sections -mtriple=x86_64-w64-windows-gnu < %s | FileCheck %s --check-prefix=GNU
-; RUN: llc -function-sections -mtriple=x86_64-pc-cygwin < %s | FileCheck %s --check-prefix=GNU
-; RUN: llc -function-sections -mtriple=i686-w64-windows-gnu < %s | FileCheck %s --check-prefix=GNU32
-; RUN: llc -function-sections -mtriple=i686-pc-cygwin < %s | FileCheck %s --check-prefix=GNU32
-; RUN: llc -function-sections -mtriple=x86_64-w64-windows-gnu < %s -filetype=obj | llvm-objdump - --headers | FileCheck %s --check-prefix=GNUOBJ
-; RUN: llc -function-sections -mtriple=x86_64-pc-cygwin < %s -filetype=obj | llvm-objdump - --headers | FileCheck %s --check-prefix=GNUOBJ
+; RUN: llc -combiner-topological-sorting -function-sections -mtriple=x86_64-windows-itanium < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -function-sections -mtriple=x86_64-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -function-sections -mtriple=x86_64-w64-windows-gnu < %s | FileCheck %s --check-prefix=GNU
+; RUN: llc -combiner-topological-sorting -function-sections -mtriple=x86_64-pc-cygwin < %s | FileCheck %s --check-prefix=GNU
+; RUN: llc -combiner-topological-sorting -function-sections -mtriple=i686-w64-windows-gnu < %s | FileCheck %s --check-prefix=GNU32
+; RUN: llc -combiner-topological-sorting -function-sections -mtriple=i686-pc-cygwin < %s | FileCheck %s --check-prefix=GNU32
+; RUN: llc -combiner-topological-sorting -function-sections -mtriple=x86_64-w64-windows-gnu < %s -filetype=obj | llvm-objdump - --headers | FileCheck %s --check-prefix=GNUOBJ
+; RUN: llc -combiner-topological-sorting -function-sections -mtriple=x86_64-pc-cygwin < %s -filetype=obj | llvm-objdump - --headers | FileCheck %s --check-prefix=GNUOBJ
; GCC and MSVC handle comdats completely differently. Make sure we do the right
; thing for each.
diff --git a/llvm/test/CodeGen/X86/mingw-hidden.ll b/llvm/test/CodeGen/X86/mingw-hidden.ll
index 8958458c55b6e..b98ffe364a0a4 100644
--- a/llvm/test/CodeGen/X86/mingw-hidden.ll
+++ b/llvm/test/CodeGen/X86/mingw-hidden.ll
@@ -1,8 +1,8 @@
-; RUN: llc -mtriple i386-pc-win32 < %s \
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-win32 < %s \
; RUN: | FileCheck --check-prefixes=CHECK,CHECK-MSVC %s
-; RUN: llc -mtriple i386-pc-mingw32 < %s \
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-mingw32 < %s \
; RUN: | FileCheck --check-prefixes=CHECK,CHECK-MINGW %s
-; RUN: llc -mtriple i386-pc-mingw32 < %s \
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-mingw32 < %s \
; RUN: | FileCheck --check-prefix=NOTEXPORTED %s
; CHECK: .text
diff --git a/llvm/test/CodeGen/X86/mingw-refptr.ll b/llvm/test/CodeGen/X86/mingw-refptr.ll
index 82a90aba38654..095a297e286cf 100644
--- a/llvm/test/CodeGen/X86/mingw-refptr.ll
+++ b/llvm/test/CodeGen/X86/mingw-refptr.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=x86_64-w64-mingw32 | FileCheck %s -check-prefix=CHECK-X64
-; RUN: llc < %s -mtriple=x86_64-pc-cygwin | FileCheck %s -check-prefix=CHECK-X64
-; RUN: llc < %s -mtriple=i686-w64-mingw32 | FileCheck %s -check-prefix=CHECK-X86
-; RUN: llc < %s -mtriple=i686-w64-mingw32-none-elf | FileCheck %s -check-prefix=CHECK-X86-ELF
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-w64-mingw32 | FileCheck %s -check-prefix=CHECK-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-cygwin | FileCheck %s -check-prefix=CHECK-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-w64-mingw32 | FileCheck %s -check-prefix=CHECK-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-w64-mingw32-none-elf | FileCheck %s -check-prefix=CHECK-X86-ELF
@var = external local_unnamed_addr global i32, align 4
@dsolocalvar = external dso_local local_unnamed_addr global i32, align 4
diff --git a/llvm/test/CodeGen/X86/misaligned-memset.ll b/llvm/test/CodeGen/X86/misaligned-memset.ll
index 000ed5198bf79..7f3459964aa83 100644
--- a/llvm/test/CodeGen/X86/misaligned-memset.ll
+++ b/llvm/test/CodeGen/X86/misaligned-memset.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=nehalem < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=nehalem < %s | FileCheck %s
@a = common global [3 x i64] zeroinitializer, align 16
diff --git a/llvm/test/CodeGen/X86/misched-aa-colored.ll b/llvm/test/CodeGen/X86/misched-aa-colored.ll
index 3504e555cd9ca..7e5e07b4871ad 100644
--- a/llvm/test/CodeGen/X86/misched-aa-colored.ll
+++ b/llvm/test/CodeGen/X86/misched-aa-colored.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=x86-64 -enable-misched -misched-prera-direction=bidirectional -misched=shuffle -enable-aa-sched-mi | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=x86-64 -enable-misched -misched-prera-direction=bidirectional -misched=shuffle -enable-aa-sched-mi | FileCheck %s
; REQUIRES: asserts
; -misched=shuffle is NDEBUG only!
diff --git a/llvm/test/CodeGen/X86/misched-aa-mmos.ll b/llvm/test/CodeGen/X86/misched-aa-mmos.ll
index 956c39011ef9e..063d1e6e7c488 100644
--- a/llvm/test/CodeGen/X86/misched-aa-mmos.ll
+++ b/llvm/test/CodeGen/X86/misched-aa-mmos.ll
@@ -1,4 +1,4 @@
-; RUN: llc -enable-misched -enable-aa-sched-mi < %s
+; RUN: llc -combiner-topological-sorting -enable-misched -enable-aa-sched-mi < %s
; This generates a decw instruction, which has two MMOs, and an alias SU edge
; query involving that instruction. Make sure this does not crash.
diff --git a/llvm/test/CodeGen/X86/misched-balance.ll b/llvm/test/CodeGen/X86/misched-balance.ll
index 02d1425360159..3478cda9804d8 100644
--- a/llvm/test/CodeGen/X86/misched-balance.ll
+++ b/llvm/test/CodeGen/X86/misched-balance.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s
;
; Verify that misched resource/latency balancy heuristics are sane.
diff --git a/llvm/test/CodeGen/X86/misched-code-difference-with-debug.ll b/llvm/test/CodeGen/X86/misched-code-difference-with-debug.ll
index be183cd9851bd..0a6aedf754617 100644
--- a/llvm/test/CodeGen/X86/misched-code-difference-with-debug.ll
+++ b/llvm/test/CodeGen/X86/misched-code-difference-with-debug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s
; Both functions should produce the same code. The presence of debug values
; should not affect the scheduling strategy.
; Generated from:
diff --git a/llvm/test/CodeGen/X86/misched-copy.ll b/llvm/test/CodeGen/X86/misched-copy.ll
index e3ceddf685fd9..914c44ae7f727 100644
--- a/llvm/test/CodeGen/X86/misched-copy.ll
+++ b/llvm/test/CodeGen/X86/misched-copy.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-- -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-- -mcpu=core2 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=machine-scheduler -o - 2>&1 > /dev/null | FileCheck %s
;
; Test scheduling of copy instructions.
;
diff --git a/llvm/test/CodeGen/X86/misched-crash.ll b/llvm/test/CodeGen/X86/misched-crash.ll
index a421faba95f7e..0f0afeae7c36c 100644
--- a/llvm/test/CodeGen/X86/misched-crash.ll
+++ b/llvm/test/CodeGen/X86/misched-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-machineinstrs -enable-misched -verify-misched
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -enable-misched -verify-misched
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10"
diff --git a/llvm/test/CodeGen/X86/misched-critical-path.ll b/llvm/test/CodeGen/X86/misched-critical-path.ll
index 2a95aaa46d4a4..3c115360a7505 100644
--- a/llvm/test/CodeGen/X86/misched-critical-path.ll
+++ b/llvm/test/CodeGen/X86/misched-critical-path.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin8 -misched-print-dags -o - 2>&1 > /dev/null | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin8 -misched-print-dags -o - 2>&1 > /dev/null | FileCheck %s
; REQUIRES: asserts
@sc = common global i8 0
diff --git a/llvm/test/CodeGen/X86/misched-fusion.ll b/llvm/test/CodeGen/X86/misched-fusion.ll
index 3ddc1ba1a76e4..7ca3201c6ea31 100644
--- a/llvm/test/CodeGen/X86/misched-fusion.ll
+++ b/llvm/test/CodeGen/X86/misched-fusion.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx -mattr=-slow-incdec -disable-lsr -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7-avx -mattr=-slow-incdec -disable-lsr -pre-RA-sched=source -enable-misched -verify-machineinstrs | FileCheck %s
; Verify that TEST+JE are scheduled together.
; CHECK: test_je
diff --git a/llvm/test/CodeGen/X86/misched-ilp.ll b/llvm/test/CodeGen/X86/misched-ilp.ll
index 2babae25ea499..c7222d49cd2e7 100644
--- a/llvm/test/CodeGen/X86/misched-ilp.ll
+++ b/llvm/test/CodeGen/X86/misched-ilp.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+sse2 -enable-misched -misched=ilpmax | FileCheck -check-prefix=MAX %s
-; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+sse2 -enable-misched -misched=ilpmin | FileCheck -check-prefix=MIN %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx -mattr=+sse2 -enable-misched -misched=ilpmax | FileCheck -check-prefix=MAX %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx -mattr=+sse2 -enable-misched -misched=ilpmin | FileCheck -check-prefix=MIN %s
;
; Basic verification of the ScheduleDAGILP metric.
;
diff --git a/llvm/test/CodeGen/X86/misched-matmul.ll b/llvm/test/CodeGen/X86/misched-matmul.ll
index 9029167d107db..47170a5ebf2ea 100644
--- a/llvm/test/CodeGen/X86/misched-matmul.ll
+++ b/llvm/test/CodeGen/X86/misched-matmul.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -pre-RA-sched=source -enable-misched -stats 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=core2 -pre-RA-sched=source -enable-misched -stats 2>&1 | FileCheck %s
;
; Verify that register pressure heuristics are working in MachineScheduler.
;
diff --git a/llvm/test/CodeGen/X86/misched-matrix.ll b/llvm/test/CodeGen/X86/misched-matrix.ll
index f44bf39e76f6f..82fd2f363bcbf 100644
--- a/llvm/test/CodeGen/X86/misched-matrix.ll
+++ b/llvm/test/CodeGen/X86/misched-matrix.ll
@@ -1,10 +1,10 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=generic -pre-RA-sched=source -enable-misched \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=generic -pre-RA-sched=source -enable-misched \
; RUN: -misched-prera-direction=topdown -verify-machineinstrs \
; RUN: | FileCheck %s -check-prefix=TOPDOWN
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=generic -pre-RA-sched=source -enable-misched \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=generic -pre-RA-sched=source -enable-misched \
; RUN: -misched=ilpmin -verify-machineinstrs \
; RUN: | FileCheck %s -check-prefix=ILPMIN
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=generic -pre-RA-sched=source -enable-misched \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=generic -pre-RA-sched=source -enable-misched \
; RUN: -misched=ilpmax -verify-machineinstrs \
; RUN: | FileCheck %s -check-prefix=ILPMAX
;
diff --git a/llvm/test/CodeGen/X86/misched-new.ll b/llvm/test/CodeGen/X86/misched-new.ll
index d7b3604ceefc4..2ee19941a2bb2 100644
--- a/llvm/test/CodeGen/X86/misched-new.ll
+++ b/llvm/test/CodeGen/X86/misched-new.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -x86-early-ifcvt -enable-misched \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=core2 -x86-early-ifcvt -enable-misched \
; RUN: -misched=shuffle -misched-prera-direction=bottomup -verify-machineinstrs \
; RUN: | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=core2 -x86-early-ifcvt -enable-misched \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=core2 -x86-early-ifcvt -enable-misched \
; RUN: -misched=shuffle -misched-prera-direction=topdown -verify-machineinstrs \
; RUN: | FileCheck %s --check-prefix TOPDOWN
; REQUIRES: asserts
diff --git a/llvm/test/CodeGen/X86/misched_phys_reg_assign_order.ll b/llvm/test/CodeGen/X86/misched_phys_reg_assign_order.ll
index 2e2ba29da8646..e3c29809637cd 100644
--- a/llvm/test/CodeGen/X86/misched_phys_reg_assign_order.ll
+++ b/llvm/test/CodeGen/X86/misched_phys_reg_assign_order.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc %s -O2 -mtriple=i686-unknown-linux-gnu -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -O2 -mtriple=i686-unknown-linux-gnu -o - | FileCheck %s
@f = global ptr zeroinitializer
diff --git a/llvm/test/CodeGen/X86/mixed-ptr-sizes-i686.ll b/llvm/test/CodeGen/X86/mixed-ptr-sizes-i686.ll
index c997d314a50ae..6d81d4c78acb6 100644
--- a/llvm/test/CodeGen/X86/mixed-ptr-sizes-i686.ll
+++ b/llvm/test/CodeGen/X86/mixed-ptr-sizes-i686.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s --check-prefixes=ALL,CHECK
-; RUN: llc -O0 < %s | FileCheck %s --check-prefixes=ALL,CHECK-O0
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s --check-prefixes=ALL,CHECK
+; RUN: llc -combiner-topological-sorting -O0 < %s | FileCheck %s --check-prefixes=ALL,CHECK-O0
; Source to regenerate:
; struct Foo {
diff --git a/llvm/test/CodeGen/X86/mixed-ptr-sizes.ll b/llvm/test/CodeGen/X86/mixed-ptr-sizes.ll
index 48d0ea49b70e6..c09c0b55edc72 100644
--- a/llvm/test/CodeGen/X86/mixed-ptr-sizes.ll
+++ b/llvm/test/CodeGen/X86/mixed-ptr-sizes.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s --check-prefixes=ALL,CHECK
-; RUN: llc -O0 < %s | FileCheck %s --check-prefixes=ALL,CHECK-O0
-; RUN: llc --fast-isel < %s | FileCheck %s --check-prefixes=ALL,CHECK
-; RUN: llc --global-isel --global-isel-abort=2 < %s | FileCheck %s --check-prefixes=ALL,CHECK
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s --check-prefixes=ALL,CHECK
+; RUN: llc -combiner-topological-sorting -O0 < %s | FileCheck %s --check-prefixes=ALL,CHECK-O0
+; RUN: llc -combiner-topological-sorting --fast-isel < %s | FileCheck %s --check-prefixes=ALL,CHECK
+; RUN: llc -combiner-topological-sorting --global-isel --global-isel-abort=2 < %s | FileCheck %s --check-prefixes=ALL,CHECK
; Source to regenerate:
; struct Foo {
diff --git a/llvm/test/CodeGen/X86/mmx-arg-passing-x86-64.ll b/llvm/test/CodeGen/X86/mmx-arg-passing-x86-64.ll
index 439d7efc2d755..81e099bdf8968 100644
--- a/llvm/test/CodeGen/X86/mmx-arg-passing-x86-64.ll
+++ b/llvm/test/CodeGen/X86/mmx-arg-passing-x86-64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86-64
;
; On Darwin x86-64, v8i8, v4i16, v2i32 values are passed in XMM[0-7].
; On Darwin x86-64, v1i64 values are passed in 64-bit GPRs.
diff --git a/llvm/test/CodeGen/X86/mmx-arg-passing.ll b/llvm/test/CodeGen/X86/mmx-arg-passing.ll
index d933149c5e027..78c6c93d96985 100644
--- a/llvm/test/CodeGen/X86/mmx-arg-passing.ll
+++ b/llvm/test/CodeGen/X86/mmx-arg-passing.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | FileCheck %s --check-prefix=X86-32
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+mmx | FileCheck %s --check-prefix=X86-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86-64
;
; On Darwin x86-32, v8i8, v4i16, v2i32 values are passed in MM[0-2].
; On Darwin x86-32, v1i64 values are passed in memory. In this example, they
diff --git a/llvm/test/CodeGen/X86/mmx-bitcast.ll b/llvm/test/CodeGen/X86/mmx-bitcast.ll
index 5e5be820dd5b4..a3cc5fe3ca59e 100644
--- a/llvm/test/CodeGen/X86/mmx-bitcast.ll
+++ b/llvm/test/CodeGen/X86/mmx-bitcast.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse2 | FileCheck %s
define i64 @t0(ptr %p) {
; CHECK-LABEL: t0:
diff --git a/llvm/test/CodeGen/X86/mmx-build-vector.ll b/llvm/test/CodeGen/X86/mmx-build-vector.ll
index d8a010bacc683..b70d4fdd2006e 100644
--- a/llvm/test/CodeGen/X86/mmx-build-vector.ll
+++ b/llvm/test/CodeGen/X86/mmx-build-vector.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+mmx | FileCheck %s --check-prefixes=X86,X86-MMX
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefixes=X86,X86-SSE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+ssse3 | FileCheck %s --check-prefixes=X86,X86-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+ssse3 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx512f | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+mmx | FileCheck %s --check-prefixes=X86,X86-MMX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefixes=X86,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+ssse3 | FileCheck %s --check-prefixes=X86,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+ssse3 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx512f | FileCheck %s --check-prefix=X64
declare <1 x i64> @llvm.x86.mmx.padd.d(<1 x i64>, <1 x i64>)
diff --git a/llvm/test/CodeGen/X86/mmx-coalescing.ll b/llvm/test/CodeGen/X86/mmx-coalescing.ll
index 589f5af4bb4d6..1caff9a764c73 100644
--- a/llvm/test/CodeGen/X86/mmx-coalescing.ll
+++ b/llvm/test/CodeGen/X86/mmx-coalescing.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s
%SA = type <{ %union.anon, i32, [4 x i8], ptr, ptr, ptr, i32, [4 x i8] }>
%union.anon = type { <1 x i64> }
diff --git a/llvm/test/CodeGen/X86/mmx-copy-gprs.ll b/llvm/test/CodeGen/X86/mmx-copy-gprs.ll
index c251d10f20675..b4fffd0495953 100644
--- a/llvm/test/CodeGen/X86/mmx-copy-gprs.ll
+++ b/llvm/test/CodeGen/X86/mmx-copy-gprs.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
-; RUN: llc < %s -mtriple=i686-- -mattr=-sse2 | FileCheck %s
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
; This test should use GPRs to copy the mmx value, not MMX regs. Using mmx regs,
; increases the places that need to use emms.
diff --git a/llvm/test/CodeGen/X86/mmx-fold-load.ll b/llvm/test/CodeGen/X86/mmx-fold-load.ll
index 6fe3bc4973185..6565598124ced 100644
--- a/llvm/test/CodeGen/X86/mmx-fold-load.ll
+++ b/llvm/test/CodeGen/X86/mmx-fold-load.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X64
define i64 @t0(ptr %a, ptr %b) nounwind {
; X86-LABEL: t0:
diff --git a/llvm/test/CodeGen/X86/mmx-inlineasm.ll b/llvm/test/CodeGen/X86/mmx-inlineasm.ll
index 86fca9051dab4..5af6c535c36de 100644
--- a/llvm/test/CodeGen/X86/mmx-inlineasm.ll
+++ b/llvm/test/CodeGen/X86/mmx-inlineasm.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx | FileCheck %s
;; Verify that the mmx 'y' constraint works with arbitrary IR types.
define <2 x i32> @test_mmx_asm(<2 x i32> %a) nounwind {
diff --git a/llvm/test/CodeGen/X86/mmx-only.ll b/llvm/test/CodeGen/X86/mmx-only.ll
index 8a87350a79429..2071d4c95efd0 100644
--- a/llvm/test/CodeGen/X86/mmx-only.ll
+++ b/llvm/test/CodeGen/X86/mmx-only.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+mmx | FileCheck %s
-; RUN: llc < %s -mtriple=i686-- -mattr=+mmx,-sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+mmx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+mmx,-sse | FileCheck %s
; Test that turning off sse doesn't turn off mmx.
diff --git a/llvm/test/CodeGen/X86/morestack-decl.ll b/llvm/test/CodeGen/X86/morestack-decl.ll
index d3b44137da5ba..3a95ab9b99c67 100644
--- a/llvm/test/CodeGen/X86/morestack-decl.ll
+++ b/llvm/test/CodeGen/X86/morestack-decl.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=generic -mtriple=x86_64-linux -code-model=large < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=generic -mtriple=x86_64-linux -code-model=large < %s | FileCheck %s
; Check what happens if we have an existing declaration of __morestack_addr
diff --git a/llvm/test/CodeGen/X86/mov-zero-to-xor.ll b/llvm/test/CodeGen/X86/mov-zero-to-xor.ll
index 9a34f073199ca..5a2fe007233c0 100644
--- a/llvm/test/CodeGen/X86/mov-zero-to-xor.ll
+++ b/llvm/test/CodeGen/X86/mov-zero-to-xor.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
declare dso_local void @foo(i64, i64, i64, i64, i64, i64)
declare dso_local void @bar(i32, i32, i32, i32, i32)
diff --git a/llvm/test/CodeGen/X86/movbe.ll b/llvm/test/CodeGen/X86/movbe.ll
index 379cb8f31c3de..4162f7a4b45ca 100644
--- a/llvm/test/CodeGen/X86/movbe.ll
+++ b/llvm/test/CodeGen/X86/movbe.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=x86_64-linux -mcpu=atom < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-linux -mcpu=slm < %s | FileCheck %s -check-prefix=SLM
-; RUN: llc -mtriple=x86_64-linux -mattr=+egpr,+ndd,+prefer-ndd-mem,+movbe < %s | FileCheck %s -check-prefix=EGPR
-; RUN: llc -mtriple=x86_64-linux -mattr=+egpr,+ndd,-prefer-ndd-mem,+movbe < %s | FileCheck %s -check-prefix=EGPR
-; RUN: llc -mtriple=x86_64-linux -mattr=+egpr,+ndd,+prefer-ndd-mem --show-mc-encoding < %s | FileCheck %s -check-prefix=NOMOVBE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux -mcpu=atom < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux -mcpu=slm < %s | FileCheck %s -check-prefix=SLM
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux -mattr=+egpr,+ndd,+prefer-ndd-mem,+movbe < %s | FileCheck %s -check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux -mattr=+egpr,+ndd,-prefer-ndd-mem,+movbe < %s | FileCheck %s -check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux -mattr=+egpr,+ndd,+prefer-ndd-mem --show-mc-encoding < %s | FileCheck %s -check-prefix=NOMOVBE
declare i16 @llvm.bswap.i16(i16) nounwind readnone
declare i32 @llvm.bswap.i32(i32) nounwind readnone
declare i64 @llvm.bswap.i64(i64) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/movddup-load-fold.ll b/llvm/test/CodeGen/X86/movddup-load-fold.ll
index 79a744f65a00a..e8b9f47d7c0b9 100644
--- a/llvm/test/CodeGen/X86/movddup-load-fold.ll
+++ b/llvm/test/CodeGen/X86/movddup-load-fold.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx2 | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx512vl | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+avx512vl | FileCheck %s --check-prefix=AVX
; Test an isel pattern for a splatted VZLOAD.
diff --git a/llvm/test/CodeGen/X86/movdir-intrinsic-x86.ll b/llvm/test/CodeGen/X86/movdir-intrinsic-x86.ll
index 023dfb110502b..d27cb87783f9e 100644
--- a/llvm/test/CodeGen/X86/movdir-intrinsic-x86.ll
+++ b/llvm/test/CodeGen/X86/movdir-intrinsic-x86.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+movdiri -mattr=+movdir64b | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+movdiri -mattr=+movdir64b --show-mc-encoding | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+movdiri -mattr=+movdir64b,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+movdiri -mattr=+movdir64b | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+movdiri -mattr=+movdir64b --show-mc-encoding | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+movdiri -mattr=+movdir64b,+egpr --show-mc-encoding | FileCheck %s --check-prefix=EGPR
define void @test_movdiri(ptr %p, i32 %v) {
; X32-LABEL: test_movdiri:
diff --git a/llvm/test/CodeGen/X86/movdir-intrinsic-x86_64.ll b/llvm/test/CodeGen/X86/movdir-intrinsic-x86_64.ll
index e3736e29a582c..ffff263685660 100644
--- a/llvm/test/CodeGen/X86/movdir-intrinsic-x86_64.ll
+++ b/llvm/test/CodeGen/X86/movdir-intrinsic-x86_64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+movdiri --show-mc-encoding | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+movdiri,+egpr --show-mc-encoding | FileCheck %s -check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+movdiri --show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+movdiri,+egpr --show-mc-encoding | FileCheck %s -check-prefix=EGPR
define void @test_movdiri(ptr %p, i64 %v) {
; CHECK-LABEL: test_movdiri:
diff --git a/llvm/test/CodeGen/X86/move_latch_to_loop_top.ll b/llvm/test/CodeGen/X86/move_latch_to_loop_top.ll
index 6c59a514b3a9f..2e2f6e3bfd833 100644
--- a/llvm/test/CodeGen/X86/move_latch_to_loop_top.ll
+++ b/llvm/test/CodeGen/X86/move_latch_to_loop_top.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux < %s | FileCheck %s
; The block latch should be moved before header.
;CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/movfs.ll b/llvm/test/CodeGen/X86/movfs.ll
index 6ac108b50001e..d4bde58d8cbd7 100644
--- a/llvm/test/CodeGen/X86/movfs.ll
+++ b/llvm/test/CodeGen/X86/movfs.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define i32 @foo() nounwind readonly {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/movgs.ll b/llvm/test/CodeGen/X86/movgs.ll
index 542c4cf30d874..49a0ebdd95485 100644
--- a/llvm/test/CodeGen/X86/movgs.ll
+++ b/llvm/test/CodeGen/X86/movgs.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=i386-linux-gnu -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mcpu=penryn -mattr=sse4.1 | FileCheck %s --check-prefix=X64
define i32 @test1() nounwind readonly {
; X32-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/movmsk-bittest.ll b/llvm/test/CodeGen/X86/movmsk-bittest.ll
index b67e70e71c3d5..2fab52d5b64ed 100644
--- a/llvm/test/CodeGen/X86/movmsk-bittest.ll
+++ b/llvm/test/CodeGen/X86/movmsk-bittest.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
; PR66191 - movmsk msb bit extraction
diff --git a/llvm/test/CodeGen/X86/movmsk.ll b/llvm/test/CodeGen/X86/movmsk.ll
index 685c07454c5e1..ff6dca9a3c177 100644
--- a/llvm/test/CodeGen/X86/movmsk.ll
+++ b/llvm/test/CodeGen/X86/movmsk.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.6.6 -mattr=+sse4.1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.6.6 -mattr=+sse4.1 | FileCheck %s
%0 = type { double }
%union.anon = type { float }
diff --git a/llvm/test/CodeGen/X86/movntdq-no-avx.ll b/llvm/test/CodeGen/X86/movntdq-no-avx.ll
index 75d71453f1428..a0d4baa6cc2c1 100644
--- a/llvm/test/CodeGen/X86/movntdq-no-avx.ll
+++ b/llvm/test/CodeGen/X86/movntdq-no-avx.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; Test that we produce a movntdq, not a vmovntdq
; CHECK-NOT: vmovntdq
diff --git a/llvm/test/CodeGen/X86/movpc32-check.ll b/llvm/test/CodeGen/X86/movpc32-check.ll
index 4585dcb577c44..ec22e55d07a0a 100644
--- a/llvm/test/CodeGen/X86/movpc32-check.ll
+++ b/llvm/test/CodeGen/X86/movpc32-check.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux -relocation-model=pic | FileCheck %s
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i686-pc-linux"
diff --git a/llvm/test/CodeGen/X86/movrs-avx10.2-512-intrinsics.ll b/llvm/test/CodeGen/X86/movrs-avx10.2-512-intrinsics.ll
index a478577155f16..75accf5aad218 100644
--- a/llvm/test/CodeGen/X86/movrs-avx10.2-512-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/movrs-avx10.2-512-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+movrs,+avx10.2 -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+movrs,+avx10.2 -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK
declare <64 x i8> @llvm.x86.avx10.vmovrsb512(ptr)
declare <16 x i32> @llvm.x86.avx10.vmovrsd512(ptr)
diff --git a/llvm/test/CodeGen/X86/movrs-avx10.2-intrinsics.ll b/llvm/test/CodeGen/X86/movrs-avx10.2-intrinsics.ll
index 62613d773a360..2191e612d3a81 100644
--- a/llvm/test/CodeGen/X86/movrs-avx10.2-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/movrs-avx10.2-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+movrs,+avx10.2 -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+movrs,+avx10.2 -verify-machineinstrs --show-mc-encoding | FileCheck %s --check-prefixes=CHECK
define <2 x i64> @test_mm_movrsb_epu8(ptr %__A) {
; CHECK-LABEL: test_mm_movrsb_epu8:
diff --git a/llvm/test/CodeGen/X86/movrs-builtins.ll b/llvm/test/CodeGen/X86/movrs-builtins.ll
index ccf0833e53990..27495ea73370f 100644
--- a/llvm/test/CodeGen/X86/movrs-builtins.ll
+++ b/llvm/test/CodeGen/X86/movrs-builtins.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+movrs | FileCheck %s
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+movrs,+egpr | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+movrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+movrs,+egpr | FileCheck %s --check-prefix=EGPR
define i8 @test_movrs_si8(ptr %__A) {
; CHECK-LABEL: test_movrs_si8:
diff --git a/llvm/test/CodeGen/X86/movrs-prefetch-builtins.ll b/llvm/test/CodeGen/X86/movrs-prefetch-builtins.ll
index e1c726348ec0e..ac7f1b68d215e 100644
--- a/llvm/test/CodeGen/X86/movrs-prefetch-builtins.ll
+++ b/llvm/test/CodeGen/X86/movrs-prefetch-builtins.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse,+prfchw,+movrs | FileCheck %s
-; RUN: llc < %s -mtriple=i686-- -mattr=-sse,+prfchw,+movrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse,+prfchw,+movrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-sse,+prfchw,+movrs | FileCheck %s
define void @t(ptr %ptr) nounwind {
; CHECK-LABEL: t:
diff --git a/llvm/test/CodeGen/X86/movtopush-stack-align.ll b/llvm/test/CodeGen/X86/movtopush-stack-align.ll
index 1924a5715daf7..160989677d098 100644
--- a/llvm/test/CodeGen/X86/movtopush-stack-align.ll
+++ b/llvm/test/CodeGen/X86/movtopush-stack-align.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-windows -stackrealign | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-windows -stackrealign | FileCheck %s
declare void @good(i32 %a, i32 %b, i32 %c, i32 %d)
declare void @oneparam(i32 %a)
diff --git a/llvm/test/CodeGen/X86/movtopush.ll b/llvm/test/CodeGen/X86/movtopush.ll
index 22929fa4b8a17..58f473f10185f 100644
--- a/llvm/test/CodeGen/X86/movtopush.ll
+++ b/llvm/test/CodeGen/X86/movtopush.ll
@@ -1,8 +1,8 @@
-; RUN: llc < %s -mtriple=i686-windows | FileCheck %s -check-prefix=NORMAL
-; RUN: llc < %s -mtriple=i686-windows -no-x86-call-frame-opt | FileCheck %s -check-prefix=NOPUSH
-; RUN: llc < %s -mtriple=x86_64-windows | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=i686-pc-linux | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-windows | FileCheck %s -check-prefix=NORMAL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-windows -no-x86-call-frame-opt | FileCheck %s -check-prefix=NOPUSH
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux | FileCheck %s -check-prefix=LINUX
%class.Class = type { i32 }
%struct.s = type { i64 }
diff --git a/llvm/test/CodeGen/X86/movtopush64.ll b/llvm/test/CodeGen/X86/movtopush64.ll
index ddaf199fb2588..038d63c54ca2d 100644
--- a/llvm/test/CodeGen/X86/movtopush64.ll
+++ b/llvm/test/CodeGen/X86/movtopush64.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s -check-prefix=NORMAL -check-prefix=NORMALFP
-; RUN: llc < %s -mtriple=x86_64-windows | FileCheck %s -check-prefix=NOPUSH
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=NOPUSH -check-prefix=NORMALFP
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -no-x86-call-frame-opt | FileCheck %s -check-prefix=NOPUSH
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s -check-prefix=NORMAL -check-prefix=NORMALFP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows | FileCheck %s -check-prefix=NOPUSH
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=NOPUSH -check-prefix=NORMALFP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -no-x86-call-frame-opt | FileCheck %s -check-prefix=NOPUSH
declare void @seven_params(i32 %a, i64 %b, i32 %c, i64 %d, i32 %e, i64 %f, i32 %g)
declare void @eightparams(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h)
diff --git a/llvm/test/CodeGen/X86/ms-inline-asm-PR44272.ll b/llvm/test/CodeGen/X86/ms-inline-asm-PR44272.ll
index 0f0e909fb0fac..e8a23e6b6e0b0 100644
--- a/llvm/test/CodeGen/X86/ms-inline-asm-PR44272.ll
+++ b/llvm/test/CodeGen/X86/ms-inline-asm-PR44272.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define dso_local void @func() {
entry:
diff --git a/llvm/test/CodeGen/X86/ms-inline-asm-array.ll b/llvm/test/CodeGen/X86/ms-inline-asm-array.ll
index 1ae63ea9a09e4..5ca8d4e539a3f 100644
--- a/llvm/test/CodeGen/X86/ms-inline-asm-array.ll
+++ b/llvm/test/CodeGen/X86/ms-inline-asm-array.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
@arr = internal global [10 x i32] zeroinitializer, align 16
diff --git a/llvm/test/CodeGen/X86/ms-inline-asm-avx512.ll b/llvm/test/CodeGen/X86/ms-inline-asm-avx512.ll
index 04db25bc5308f..d45a4a661cc3e 100644
--- a/llvm/test/CodeGen/X86/ms-inline-asm-avx512.ll
+++ b/llvm/test/CodeGen/X86/ms-inline-asm-avx512.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Generated from clang/test/CodeGen/ms-inline-asm-avx512.c
diff --git a/llvm/test/CodeGen/X86/ms-inline-asm-functions.ll b/llvm/test/CodeGen/X86/ms-inline-asm-functions.ll
index c7cc7056c85cc..1131c64685541 100644
--- a/llvm/test/CodeGen/X86/ms-inline-asm-functions.ll
+++ b/llvm/test/CodeGen/X86/ms-inline-asm-functions.ll
@@ -1,6 +1,6 @@
;; Check that the generated memory references do not contain the `offset`
;; operator. Use `-no-integrated-as` to disable AsmParser formatting.
-; RUN: llc -no-integrated-as -x86-asm-syntax=intel < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -no-integrated-as -x86-asm-syntax=intel < %s | FileCheck %s
;; This file was compiled from clang/test/CodeGen/ms-inline-asm-functions.c,
;; using the following command line:
diff --git a/llvm/test/CodeGen/X86/ms-inline-asm-redundant-clobber.ll b/llvm/test/CodeGen/X86/ms-inline-asm-redundant-clobber.ll
index 9e11c03e28456..466e38a61edea 100644
--- a/llvm/test/CodeGen/X86/ms-inline-asm-redundant-clobber.ll
+++ b/llvm/test/CodeGen/X86/ms-inline-asm-redundant-clobber.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; This used to crash due to Live Variable analysis removing the redundant eax
; and edx clobbers, but not removing the inline asm flag operands that proceed
diff --git a/llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-1-reg.ll b/llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-1-reg.ll
index 3865562e73723..e6a35e63feda8 100644
--- a/llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-1-reg.ll
+++ b/llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-1-reg.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -relocation-model=pic %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -relocation-model=pic %s -o - | FileCheck %s
; Tests come from "clang/test/CodeGen/ms-inline-asm-variables.c"
; int gVar;
diff --git a/llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-2-regs.ll b/llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-2-regs.ll
index 676d88d739dda..c314ffdf50c86 100644
--- a/llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-2-regs.ll
+++ b/llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-2-regs.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=x86_64-unknown-unknown -relocation-model=pic %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -relocation-model=pic %s -o /dev/null 2>&1 | FileCheck %s
; Tests come from "clang/test/CodeGen/ms-inline-asm-variables.c"
;
diff --git a/llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-nopic.ll b/llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-nopic.ll
index be8c794a848ae..7a34d6589b9f4 100644
--- a/llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-nopic.ll
+++ b/llvm/test/CodeGen/X86/ms-inline-asm-variables-x64-nopic.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown %s -o - | FileCheck %s
; Tests similar with "clang/test/CodeGen/ms-inline-asm-variables.c"
; // clang -fasm-blocks -target x86_64-unknown-unknown -S
diff --git a/llvm/test/CodeGen/X86/ms-inline-asm-variables-x86-1-reg.ll b/llvm/test/CodeGen/X86/ms-inline-asm-variables-x86-1-reg.ll
index 1ce43a108e1fe..dd9fa1cca6c2f 100644
--- a/llvm/test/CodeGen/X86/ms-inline-asm-variables-x86-1-reg.ll
+++ b/llvm/test/CodeGen/X86/ms-inline-asm-variables-x86-1-reg.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-unknown-unknown %s -o - | FileCheck --check-prefix=X86 %s
-; RUN: llc -mtriple=i386-unknown-unknown -relocation-model=pic %s -o -| FileCheck --check-prefix=X86PIC %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-unknown %s -o - | FileCheck --check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-unknown -relocation-model=pic %s -o -| FileCheck --check-prefix=X86PIC %s
; Tests come from clang/test/CodeGen/ms-inline-asm-variables.c
;
diff --git a/llvm/test/CodeGen/X86/ms-inline-asm-variables-x86-2-regs.ll b/llvm/test/CodeGen/X86/ms-inline-asm-variables-x86-2-regs.ll
index 5ab2f6f25d386..9fe7ca52f5f6d 100644
--- a/llvm/test/CodeGen/X86/ms-inline-asm-variables-x86-2-regs.ll
+++ b/llvm/test/CodeGen/X86/ms-inline-asm-variables-x86-2-regs.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-unknown-unknown %s -o - | FileCheck --check-prefix=X86 %s
-; RUN: not llc -mtriple=i386-unknown-unknown -relocation-model=pic %s -o /dev/null 2>&1 | FileCheck --check-prefix=X86PIC %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-unknown %s -o - | FileCheck --check-prefix=X86 %s
+; RUN: not llc -combiner-topological-sorting -mtriple=i386-unknown-unknown -relocation-model=pic %s -o /dev/null 2>&1 | FileCheck --check-prefix=X86PIC %s
; Tests come from "clang/test/CodeGen/ms-inline-asm-variables.c"
;
diff --git a/llvm/test/CodeGen/X86/ms-inline-asm.ll b/llvm/test/CodeGen/X86/ms-inline-asm.ll
index ab4f4d540dbe3..04356febf9922 100644
--- a/llvm/test/CodeGen/X86/ms-inline-asm.ll
+++ b/llvm/test/CodeGen/X86/ms-inline-asm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=core2 -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=core2 -no-integrated-as | FileCheck %s
define i32 @t1() nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/ms-secure-hotpatch-attr.ll b/llvm/test/CodeGen/X86/ms-secure-hotpatch-attr.ll
index 7e60e6a047507..b29795c17c29e 100644
--- a/llvm/test/CodeGen/X86/ms-secure-hotpatch-attr.ll
+++ b/llvm/test/CodeGen/X86/ms-secure-hotpatch-attr.ll
@@ -1,6 +1,6 @@
; This tests directly annotating a function with marked_for_windows_hot_patching.
;
-; RUN: llc -mtriple=x86_64-windows < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows < %s | FileCheck %s
source_filename = ".\\ms-secure-hotpatch-attr.ll"
target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/ms-secure-hotpatch-bad-file.ll b/llvm/test/CodeGen/X86/ms-secure-hotpatch-bad-file.ll
index 5fec1c48495a2..00673c416580b 100644
--- a/llvm/test/CodeGen/X86/ms-secure-hotpatch-bad-file.ll
+++ b/llvm/test/CodeGen/X86/ms-secure-hotpatch-bad-file.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=x86_64-windows --ms-secure-hotpatch-functions-file=%S/this-file-is-intentionally-missing-do-not-create-it.txt < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-windows --ms-secure-hotpatch-functions-file=%S/this-file-is-intentionally-missing-do-not-create-it.txt < %s 2>&1 | FileCheck %s
; CHECK: failed to open hotpatch functions file
source_filename = ".\\ms-secure-hotpatch.ll"
diff --git a/llvm/test/CodeGen/X86/ms-secure-hotpatch-direct-global-access.ll b/llvm/test/CodeGen/X86/ms-secure-hotpatch-direct-global-access.ll
index 5606b03760be1..6297999cad3a2 100644
--- a/llvm/test/CodeGen/X86/ms-secure-hotpatch-direct-global-access.ll
+++ b/llvm/test/CodeGen/X86/ms-secure-hotpatch-direct-global-access.ll
@@ -1,6 +1,6 @@
; This tests hotpatching functions that bypass double-indirection for global variables.
;
-; RUN: llc -mtriple=x86_64-windows < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows < %s | FileCheck %s
source_filename = ".\\ms-secure-hotpatch-direct-global-access.ll"
target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/ms-secure-hotpatch-functions-file.ll b/llvm/test/CodeGen/X86/ms-secure-hotpatch-functions-file.ll
index bb79e08683aa7..a2a74111716c1 100644
--- a/llvm/test/CodeGen/X86/ms-secure-hotpatch-functions-file.ll
+++ b/llvm/test/CodeGen/X86/ms-secure-hotpatch-functions-file.ll
@@ -1,7 +1,7 @@
; This tests annotating a function with marked_for_windows_hot_patching by using --ms-hotpatch-functions-file.
;
; RUN: echo this_gets_hotpatched > %t.patch-functions.txt
-; RUN: llc -mtriple=x86_64-windows --ms-secure-hotpatch-functions-file=%t.patch-functions.txt < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows --ms-secure-hotpatch-functions-file=%t.patch-functions.txt < %s | FileCheck %s
source_filename = ".\\ms-secure-hotpatch-functions-file.ll"
target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/ms-secure-hotpatch-functions-list.ll b/llvm/test/CodeGen/X86/ms-secure-hotpatch-functions-list.ll
index b1da1a2db66dc..2cc75e55351db 100644
--- a/llvm/test/CodeGen/X86/ms-secure-hotpatch-functions-list.ll
+++ b/llvm/test/CodeGen/X86/ms-secure-hotpatch-functions-list.ll
@@ -1,6 +1,6 @@
; This tests annotating a function with marked_for_windows_hot_patching by using --ms-hotpatch-functions-list.
;
-; RUN: llc -mtriple=x86_64-windows --ms-secure-hotpatch-functions-list=this_gets_hotpatched < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows --ms-secure-hotpatch-functions-list=this_gets_hotpatched < %s | FileCheck %s
source_filename = ".\\ms-secure-hotpatch-functions-list.ll"
target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/mul-cmp.ll b/llvm/test/CodeGen/X86/mul-cmp.ll
index 0ee4601acf694..5914847623111 100644
--- a/llvm/test/CodeGen/X86/mul-cmp.ll
+++ b/llvm/test/CodeGen/X86/mul-cmp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=sse | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=sse | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s --check-prefixes=CHECK,AVX
; With no-wrap:
; (X * Y) == 0 --> (X == 0) || (Y == 0)
diff --git a/llvm/test/CodeGen/X86/mul-constant-i16.ll b/llvm/test/CodeGen/X86/mul-constant-i16.ll
index a663f6a1dd376..284dae2c0db07 100644
--- a/llvm/test/CodeGen/X86/mul-constant-i16.ll
+++ b/llvm/test/CodeGen/X86/mul-constant-i16.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define i16 @test_mul_by_1(i16 %x) {
; X86-LABEL: test_mul_by_1:
diff --git a/llvm/test/CodeGen/X86/mul-constant-i32.ll b/llvm/test/CodeGen/X86/mul-constant-i32.ll
index 4129b44ed3ddc..5c40c8adccfb2 100644
--- a/llvm/test/CodeGen/X86/mul-constant-i32.ll
+++ b/llvm/test/CodeGen/X86/mul-constant-i32.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=haswell | FileCheck %s --check-prefixes=X64,X64-HSW
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=btver2 | FileCheck %s --check-prefixes=X64,X64-JAG
-; RUN: llc < %s -mtriple=i686-unknown -mul-constant-optimization=false | FileCheck %s --check-prefix=X86-NOOPT
-; RUN: llc < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -mcpu=haswell | FileCheck %s --check-prefixes=X64-NOOPT,HSW-NOOPT
-; RUN: llc < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -mcpu=btver2 | FileCheck %s --check-prefixes=X64-NOOPT,JAG-NOOPT
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=slm | FileCheck %s --check-prefixes=X64,X64-SLM
-; RUN: llc < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -mcpu=slm | FileCheck %s --check-prefixes=X64-NOOPT,SLM-NOOPT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=haswell | FileCheck %s --check-prefixes=X64,X64-HSW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=btver2 | FileCheck %s --check-prefixes=X64,X64-JAG
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mul-constant-optimization=false | FileCheck %s --check-prefix=X86-NOOPT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -mcpu=haswell | FileCheck %s --check-prefixes=X64-NOOPT,HSW-NOOPT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -mcpu=btver2 | FileCheck %s --check-prefixes=X64-NOOPT,JAG-NOOPT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=slm | FileCheck %s --check-prefixes=X64,X64-SLM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -mcpu=slm | FileCheck %s --check-prefixes=X64-NOOPT,SLM-NOOPT
define i32 @test_mul_by_1(i32 %x) {
; X86-LABEL: test_mul_by_1:
diff --git a/llvm/test/CodeGen/X86/mul-constant-i64.ll b/llvm/test/CodeGen/X86/mul-constant-i64.ll
index 40d591f8d1be8..92376f1cac22f 100644
--- a/llvm/test/CodeGen/X86/mul-constant-i64.ll
+++ b/llvm/test/CodeGen/X86/mul-constant-i64.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=i686-unknown -mul-constant-optimization=false | FileCheck %s --check-prefixes=X86-NOOPT
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=haswell | FileCheck %s --check-prefixes=X64,X64-OPT,X64-HSW
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=btver2 | FileCheck %s --check-prefixes=X64,X64-OPT,X64-JAG
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=slm | FileCheck %s --check-prefixes=X64,X64-OPT,X64-SLM
-; RUN: llc < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -mcpu=haswell | FileCheck %s --check-prefixes=X64,X64-NOOPT,X64-HSW-NOOPT
-; RUN: llc < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -mcpu=btver2 | FileCheck %s --check-prefixes=X64,X64-NOOPT,X64-JAG-NOOPT
-; RUN: llc < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -mcpu=slm | FileCheck %s --check-prefixes=X64,X64-NOOPT,X64-SLM-NOOPT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mul-constant-optimization=false | FileCheck %s --check-prefixes=X86-NOOPT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=haswell | FileCheck %s --check-prefixes=X64,X64-OPT,X64-HSW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=btver2 | FileCheck %s --check-prefixes=X64,X64-OPT,X64-JAG
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=slm | FileCheck %s --check-prefixes=X64,X64-OPT,X64-SLM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -mcpu=haswell | FileCheck %s --check-prefixes=X64,X64-NOOPT,X64-HSW-NOOPT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -mcpu=btver2 | FileCheck %s --check-prefixes=X64,X64-NOOPT,X64-JAG-NOOPT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mul-constant-optimization=false -mcpu=slm | FileCheck %s --check-prefixes=X64,X64-NOOPT,X64-SLM-NOOPT
define i64 @test_mul_by_1(i64 %x) nounwind {
; X86-LABEL: test_mul_by_1:
diff --git a/llvm/test/CodeGen/X86/mul-constant-i8.ll b/llvm/test/CodeGen/X86/mul-constant-i8.ll
index b488653655728..7f90cabb0c162 100644
--- a/llvm/test/CodeGen/X86/mul-constant-i8.ll
+++ b/llvm/test/CodeGen/X86/mul-constant-i8.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
define i8 @test_mul_by_1(i8 %x) {
; X64-LABEL: test_mul_by_1:
diff --git a/llvm/test/CodeGen/X86/mul-constant-result.ll b/llvm/test/CodeGen/X86/mul-constant-result.ll
index 1f9e7a93ad0b9..3217ac4dc1dd3 100644
--- a/llvm/test/CodeGen/X86/mul-constant-result.ll
+++ b/llvm/test/CodeGen/X86/mul-constant-result.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
; Incremental updates of the instruction depths should be enough for this test
; case.
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=haswell -machine-combiner-inc-threshold=0| FileCheck %s --check-prefix=X64-HSW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=haswell -machine-combiner-inc-threshold=0| FileCheck %s --check-prefix=X64-HSW
; Function Attrs: norecurse nounwind readnone uwtable
define i32 @mult(i32, i32) local_unnamed_addr #0 {
diff --git a/llvm/test/CodeGen/X86/mul-demand.ll b/llvm/test/CodeGen/X86/mul-demand.ll
index 3454a84c45b08..c5ce7130d0dbf 100644
--- a/llvm/test/CodeGen/X86/mul-demand.ll
+++ b/llvm/test/CodeGen/X86/mul-demand.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define i64 @muladd_demand(i64 %x, i64 %y) {
; CHECK-LABEL: muladd_demand:
diff --git a/llvm/test/CodeGen/X86/mul-i1024.ll b/llvm/test/CodeGen/X86/mul-i1024.ll
index bb93e34fda7c4..9010a81a321cf 100644
--- a/llvm/test/CodeGen/X86/mul-i1024.ll
+++ b/llvm/test/CodeGen/X86/mul-i1024.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define void @test_1024(ptr %a, ptr %b, ptr %out) nounwind {
; X86-LABEL: test_1024:
diff --git a/llvm/test/CodeGen/X86/mul-i256.ll b/llvm/test/CodeGen/X86/mul-i256.ll
index 2d7737bfdd3c2..6f4a88a09eeb5 100644
--- a/llvm/test/CodeGen/X86/mul-i256.ll
+++ b/llvm/test/CodeGen/X86/mul-i256.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/mul-i512.ll b/llvm/test/CodeGen/X86/mul-i512.ll
index 2421aabdbcd99..b8ec80b6197a8 100644
--- a/llvm/test/CodeGen/X86/mul-i512.ll
+++ b/llvm/test/CodeGen/X86/mul-i512.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define void @test_512(ptr %a, ptr %b, ptr %out) nounwind {
; X86-LABEL: test_512:
diff --git a/llvm/test/CodeGen/X86/mul-legalize.ll b/llvm/test/CodeGen/X86/mul-legalize.ll
index 372186f0e5547..2e280c0375b9d 100644
--- a/llvm/test/CodeGen/X86/mul-legalize.ll
+++ b/llvm/test/CodeGen/X86/mul-legalize.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; PR2135
; CHECK: 24576
diff --git a/llvm/test/CodeGen/X86/mul-lohi-no-implicit-copy.ll b/llvm/test/CodeGen/X86/mul-lohi-no-implicit-copy.ll
index 0135ec230cf28..e79ae179daad3 100644
--- a/llvm/test/CodeGen/X86/mul-lohi-no-implicit-copy.ll
+++ b/llvm/test/CodeGen/X86/mul-lohi-no-implicit-copy.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=-bmi2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=-bmi2 | FileCheck %s
;
; For UMUL_LOHI lowering without BMI2, MUL/IMUL use RAX as an implicit source.
; If one operand already lives in RAX (e.g. call result), avoid shuffling it out
diff --git a/llvm/test/CodeGen/X86/mul-remat.ll b/llvm/test/CodeGen/X86/mul-remat.ll
index 1a5d88aba8d40..506aa41f7ebf8 100644
--- a/llvm/test/CodeGen/X86/mul-remat.ll
+++ b/llvm/test/CodeGen/X86/mul-remat.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; PR1874
define i32 @test(i32 %a, i32 %b) {
diff --git a/llvm/test/CodeGen/X86/mul-shift-reassoc.ll b/llvm/test/CodeGen/X86/mul-shift-reassoc.ll
index fbbd11af7f676..08a6fe43dde5f 100644
--- a/llvm/test/CodeGen/X86/mul-shift-reassoc.ll
+++ b/llvm/test/CodeGen/X86/mul-shift-reassoc.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
-; RUN: llc < %s -mtriple=i686-- -early-live-intervals -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -early-live-intervals -verify-machineinstrs | FileCheck %s
define i32 @test(i32 %X, i32 %Y) {
; Push the shl through the mul to allow an LEA to be formed, instead
diff --git a/llvm/test/CodeGen/X86/mul128_sext_loop.ll b/llvm/test/CodeGen/X86/mul128_sext_loop.ll
index 40a50d5edd52e..a8b07f92abe2a 100644
--- a/llvm/test/CodeGen/X86/mul128_sext_loop.ll
+++ b/llvm/test/CodeGen/X86/mul128_sext_loop.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define void @test(ptr nocapture %arr, i64 %arrsize, i64 %factor) nounwind uwtable {
%1 = icmp sgt i64 %arrsize, 0
diff --git a/llvm/test/CodeGen/X86/mul64.ll b/llvm/test/CodeGen/X86/mul64.ll
index 25d10b06402d2..3f555d96dfcc6 100644
--- a/llvm/test/CodeGen/X86/mul64.ll
+++ b/llvm/test/CodeGen/X86/mul64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define i64 @foo(i64 %t, i64 %u) nounwind {
; X86-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/mulc-false-deps.ll b/llvm/test/CodeGen/X86/mulc-false-deps.ll
index 3c41db469574c..9cbe4c95ca405 100644
--- a/llvm/test/CodeGen/X86/mulc-false-deps.ll
+++ b/llvm/test/CodeGen/X86/mulc-false-deps.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -mcpu=sapphirerapids -mattr=+false-deps-mulc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE
-; RUN: llc -verify-machineinstrs -mcpu=sapphirerapids -mattr=-false-deps-mulc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=sapphirerapids -mattr=+false-deps-mulc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=sapphirerapids -mattr=-false-deps-mulc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE
define <16 x float> @fmulcph(<16 x float> %a0, <16 x float> %a1) {
; ENABLE-LABEL: fmulcph:
diff --git a/llvm/test/CodeGen/X86/mulfix_combine.ll b/llvm/test/CodeGen/X86/mulfix_combine.ll
index 81a0135ceaaea..e955e22117ca2 100644
--- a/llvm/test/CodeGen/X86/mulfix_combine.ll
+++ b/llvm/test/CodeGen/X86/mulfix_combine.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -o - | FileCheck %s
declare i32 @llvm.smul.fix.i32(i32, i32, i32 immarg)
declare i32 @llvm.umul.fix.i32(i32, i32, i32 immarg)
diff --git a/llvm/test/CodeGen/X86/mulo-pow2.ll b/llvm/test/CodeGen/X86/mulo-pow2.ll
index de7dc5673274f..b58a5692fbff0 100644
--- a/llvm/test/CodeGen/X86/mulo-pow2.ll
+++ b/llvm/test/CodeGen/X86/mulo-pow2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
declare { <4 x i32>, <4 x i1> } @llvm.umul.with.overflow.v4i32(<4 x i32>, <4 x i32>)
declare { <4 x i32>, <4 x i1> } @llvm.smul.with.overflow.v4i32(<4 x i32>, <4 x i32>)
diff --git a/llvm/test/CodeGen/X86/muloti.ll b/llvm/test/CodeGen/X86/muloti.ll
index e101c702e6409..8dcce1523e57d 100644
--- a/llvm/test/CodeGen/X86/muloti.ll
+++ b/llvm/test/CodeGen/X86/muloti.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
%0 = type { i64, i64 }
%1 = type { i128, i1 }
diff --git a/llvm/test/CodeGen/X86/mult-alt-generic-i686.ll b/llvm/test/CodeGen/X86/mult-alt-generic-i686.ll
index b8c782810dfda..cda76e4876942 100644
--- a/llvm/test/CodeGen/X86/mult-alt-generic-i686.ll
+++ b/llvm/test/CodeGen/X86/mult-alt-generic-i686.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -no-integrated-as
; ModuleID = 'mult-alt-generic.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i686"
diff --git a/llvm/test/CodeGen/X86/mult-alt-generic-x86_64.ll b/llvm/test/CodeGen/X86/mult-alt-generic-x86_64.ll
index 2807682766f85..8dfe80184e81c 100644
--- a/llvm/test/CodeGen/X86/mult-alt-generic-x86_64.ll
+++ b/llvm/test/CodeGen/X86/mult-alt-generic-x86_64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -no-integrated-as
; ModuleID = 'mult-alt-generic.c'
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64"
diff --git a/llvm/test/CodeGen/X86/mult-alt-x86.ll b/llvm/test/CodeGen/X86/mult-alt-x86.ll
index d896a58832ccd..14091be194e1d 100644
--- a/llvm/test/CodeGen/X86/mult-alt-x86.ll
+++ b/llvm/test/CodeGen/X86/mult-alt-x86.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mattr=+mmx,+sse2 -no-integrated-as
+; RUN: llc -combiner-topological-sorting < %s -mattr=+mmx,+sse2 -no-integrated-as
; ModuleID = 'mult-alt-x86.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
target triple = "i686-pc-win32"
diff --git a/llvm/test/CodeGen/X86/multiple-loop-post-inc.ll b/llvm/test/CodeGen/X86/multiple-loop-post-inc.ll
index c76f70cac5682..3aa91082cff46 100644
--- a/llvm/test/CodeGen/X86/multiple-loop-post-inc.ll
+++ b/llvm/test/CodeGen/X86/multiple-loop-post-inc.ll
@@ -1,4 +1,4 @@
-; RUN: llc -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -mtriple=x86_64-- -mcpu=nehalem -no-integrated-as < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -asm-verbose=false -disable-branch-fold -disable-block-placement -disable-tail-duplicate -mtriple=x86_64-- -mcpu=nehalem -no-integrated-as < %s | FileCheck %s
; rdar://7236213
;
; The scheduler's 2-address hack has been disabled, so there is
diff --git a/llvm/test/CodeGen/X86/multiple-return-values-cross-block.ll b/llvm/test/CodeGen/X86/multiple-return-values-cross-block.ll
index 87a00dc3409cd..e7d92484ffea0 100644
--- a/llvm/test/CodeGen/X86/multiple-return-values-cross-block.ll
+++ b/llvm/test/CodeGen/X86/multiple-return-values-cross-block.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
declare {x86_fp80, x86_fp80} @test()
diff --git a/llvm/test/CodeGen/X86/mulx32.ll b/llvm/test/CodeGen/X86/mulx32.ll
index bc135f6305f72..f46a73e89108a 100644
--- a/llvm/test/CodeGen/X86/mulx32.ll
+++ b/llvm/test/CodeGen/X86/mulx32.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+bmi2 | FileCheck %s
-; RUN: llc < %s -mtriple=i686-unknown -mcpu=core-avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+bmi2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mcpu=core-avx2 | FileCheck %s
define i64 @f1(i32 %a, i32 %b) {
; CHECK-LABEL: f1:
diff --git a/llvm/test/CodeGen/X86/mulx64-no-implicit-copy.ll b/llvm/test/CodeGen/X86/mulx64-no-implicit-copy.ll
index 60f8309440f29..4e76960fc2203 100644
--- a/llvm/test/CodeGen/X86/mulx64-no-implicit-copy.ll
+++ b/llvm/test/CodeGen/X86/mulx64-no-implicit-copy.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+bmi2 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+bmi2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s
;
; When a MULX operand already lives in RDX (the implicit source register) at
; function entry, no register-copy preamble should be emitted before the MULX.
diff --git a/llvm/test/CodeGen/X86/mulx64.ll b/llvm/test/CodeGen/X86/mulx64.ll
index 199fa55c42382..e6c84437b7b5c 100644
--- a/llvm/test/CodeGen/X86/mulx64.ll
+++ b/llvm/test/CodeGen/X86/mulx64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+bmi2 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+bmi2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s
define i128 @f1(i64 %a, i64 %b) {
; CHECK-LABEL: f1:
diff --git a/llvm/test/CodeGen/X86/musttail-fastcall.ll b/llvm/test/CodeGen/X86/musttail-fastcall.ll
index 77c13e0ae2102..a1b7b92a05bfd 100644
--- a/llvm/test/CodeGen/X86/musttail-fastcall.ll
+++ b/llvm/test/CodeGen/X86/musttail-fastcall.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=i686-pc-win32 -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE2
-; RUN: llc < %s -mtriple=i686-pc-win32 -mattr=+sse2,+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX
-; RUN: llc < %s -mtriple=i686-pc-win32 -mattr=+sse2,+avx,+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=i686-pc-win32 -mattr=+sse2,+avx,+avx512vl | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 -mattr=+sse2,+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 -mattr=+sse2,+avx,+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 -mattr=+sse2,+avx,+avx512vl | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512VL
; While we don't support varargs with fastcall, we do support forwarding.
diff --git a/llvm/test/CodeGen/X86/musttail-inalloca.ll b/llvm/test/CodeGen/X86/musttail-inalloca.ll
index ab6159520d925..1663bf64d5fe3 100644
--- a/llvm/test/CodeGen/X86/musttail-inalloca.ll
+++ b/llvm/test/CodeGen/X86/musttail-inalloca.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - | FileCheck %s
; Previously, we would accidentally leave behind SP adjustments to setup a call
; frame for the musttail call target, and SP adjustments would end up
diff --git a/llvm/test/CodeGen/X86/musttail-indirect.ll b/llvm/test/CodeGen/X86/musttail-indirect.ll
index 092f0cea02d19..1b7d188cce038 100644
--- a/llvm/test/CodeGen/X86/musttail-indirect.ll
+++ b/llvm/test/CodeGen/X86/musttail-indirect.ll
@@ -1,5 +1,5 @@
-; RUN: llc -verify-machineinstrs < %s -mtriple=i686-win32 | FileCheck %s
-; RUN: llc -verify-machineinstrs < %s -mtriple=i686-win32 -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=i686-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=i686-win32 -O0 | FileCheck %s
; IR simplified from the following C++ snippet compiled for i686-windows-msvc:
diff --git a/llvm/test/CodeGen/X86/musttail-tailcc.ll b/llvm/test/CodeGen/X86/musttail-tailcc.ll
index f1ffbcb1142c5..4a8e5ed450704 100644
--- a/llvm/test/CodeGen/X86/musttail-tailcc.ll
+++ b/llvm/test/CodeGen/X86/musttail-tailcc.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X86
; tailcc will turn all of these musttail calls into tail calls.
diff --git a/llvm/test/CodeGen/X86/musttail-thiscall.ll b/llvm/test/CodeGen/X86/musttail-thiscall.ll
index 7e85eca12ae5b..dab8bc8520e80 100644
--- a/llvm/test/CodeGen/X86/musttail-thiscall.ll
+++ b/llvm/test/CodeGen/X86/musttail-thiscall.ll
@@ -1,5 +1,5 @@
-; RUN: llc -verify-machineinstrs -mtriple=i686-- < %s | FileCheck %s
-; RUN: llc -verify-machineinstrs -mtriple=i686-- -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i686-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i686-- -O0 < %s | FileCheck %s
; CHECK-LABEL: t1:
; CHECK: jmp {{_?}}t1_callee
diff --git a/llvm/test/CodeGen/X86/musttail.ll b/llvm/test/CodeGen/X86/musttail.ll
index 9e02585a3ffdc..ea3c39be95579 100644
--- a/llvm/test/CodeGen/X86/musttail.ll
+++ b/llvm/test/CodeGen/X86/musttail.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=i686-- < %s | FileCheck %s
-; RUN: llc -mtriple=i686-- -O0 < %s | FileCheck %s
-; RUN: llc -mtriple=i686-- -disable-tail-calls < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -disable-tail-calls < %s | FileCheck %s
declare void @t1_callee(ptr)
define void @t1(ptr %a) {
diff --git a/llvm/test/CodeGen/X86/mwaitx.ll b/llvm/test/CodeGen/X86/mwaitx.ll
index 98779783f5425..bb06900ed1bda 100644
--- a/llvm/test/CodeGen/X86/mwaitx.ll
+++ b/llvm/test/CodeGen/X86/mwaitx.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+mwaitx | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+mwaitx | FileCheck %s -check-prefix=WIN64
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=bdver4 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 -mcpu=bdver4 | FileCheck %s -check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+mwaitx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mattr=+mwaitx | FileCheck %s -check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=bdver4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mcpu=bdver4 | FileCheck %s -check-prefix=WIN64
define void @foo(ptr %P, i32 %E, i32 %H) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/mxcsr-reg-usage.ll b/llvm/test/CodeGen/X86/mxcsr-reg-usage.ll
index 6bb564c4b757e..7eb7e20d48c5f 100644
--- a/llvm/test/CodeGen/X86/mxcsr-reg-usage.ll
+++ b/llvm/test/CodeGen/X86/mxcsr-reg-usage.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+mmx,+fma,+f16c,+avx512f -stop-after finalize-isel -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+mmx,+fma,+f16c,+avx512f -stop-after finalize-isel -o - %s | FileCheck %s
; This test ensures that the MXCSR is implicitly used by MMX FP instructions.
define <1 x i64> @mxcsr_mmx(<4 x float> %a0) {
diff --git a/llvm/test/CodeGen/X86/naked-fn-with-frame-pointer.ll b/llvm/test/CodeGen/X86/naked-fn-with-frame-pointer.ll
index 37756009fa7d8..3efd07711dfff 100644
--- a/llvm/test/CodeGen/X86/naked-fn-with-frame-pointer.ll
+++ b/llvm/test/CodeGen/X86/naked-fn-with-frame-pointer.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple i386 | FileCheck %s -check-prefixes=CHECK-32
-; RUN: llc < %s -mtriple x86_64 | FileCheck %s -check-prefixes=CHECK-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple i386 | FileCheck %s -check-prefixes=CHECK-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64 | FileCheck %s -check-prefixes=CHECK-64
declare dso_local void @main()
diff --git a/llvm/test/CodeGen/X86/naked-fn-with-unreachable-trap.ll b/llvm/test/CodeGen/X86/naked-fn-with-unreachable-trap.ll
index 94274fcb1c160..4fc8e840a0813 100644
--- a/llvm/test/CodeGen/X86/naked-fn-with-unreachable-trap.ll
+++ b/llvm/test/CodeGen/X86/naked-fn-with-unreachable-trap.ll
@@ -1,5 +1,5 @@
-; RUN: llc -o - %s -mtriple=x86_64-linux-gnu -trap-unreachable | FileCheck %s
-; RUN: llc -o - %s -mtriple=x86_64-linux-gnu -trap-unreachable -fast-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-linux-gnu -trap-unreachable | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-linux-gnu -trap-unreachable -fast-isel | FileCheck %s
define dso_local void @foo() #0 {
entry:
diff --git a/llvm/test/CodeGen/X86/named-reg-alloc.ll b/llvm/test/CodeGen/X86/named-reg-alloc.ll
index 464c5e8801398..2a9e2dd9fb6bb 100644
--- a/llvm/test/CodeGen/X86/named-reg-alloc.ll
+++ b/llvm/test/CodeGen/X86/named-reg-alloc.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_stack() nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/named-reg-notareg.ll b/llvm/test/CodeGen/X86/named-reg-notareg.ll
index cb3736df9ce55..17f4a553c2e29 100644
--- a/llvm/test/CodeGen/X86/named-reg-notareg.ll
+++ b/llvm/test/CodeGen/X86/named-reg-notareg.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s
-; RUN: not llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_stack() nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/named-vector-shuffle-reverse.ll b/llvm/test/CodeGen/X86/named-vector-shuffle-reverse.ll
index 2a5e834f0ac7c..f856bce9d7ecc 100644
--- a/llvm/test/CodeGen/X86/named-vector-shuffle-reverse.ll
+++ b/llvm/test/CodeGen/X86/named-vector-shuffle-reverse.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/narrow-add-i64.ll b/llvm/test/CodeGen/X86/narrow-add-i64.ll
index a7a54fd57413b..da505eb20578e 100644
--- a/llvm/test/CodeGen/X86/narrow-add-i64.ll
+++ b/llvm/test/CodeGen/X86/narrow-add-i64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
define i64 @test_add_i64_i16_const(i16 %a) nounwind {
; X86-LABEL: test_add_i64_i16_const:
diff --git a/llvm/test/CodeGen/X86/narrow-load-metadata.ll b/llvm/test/CodeGen/X86/narrow-load-metadata.ll
index 10aa5b8530a95..b619623b4173c 100644
--- a/llvm/test/CodeGen/X86/narrow-load-metadata.ll
+++ b/llvm/test/CodeGen/X86/narrow-load-metadata.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
;
; This test case is reduced from RangeConstraintManager.cpp in a ASan build.
; It crashes reduceLoadWidth in DAGCombiner.cpp. Preservation of range
diff --git a/llvm/test/CodeGen/X86/narrow-shl-cst.ll b/llvm/test/CodeGen/X86/narrow-shl-cst.ll
index 296ef52c3bff9..7d634c92eea79 100644
--- a/llvm/test/CodeGen/X86/narrow-shl-cst.ll
+++ b/llvm/test/CodeGen/X86/narrow-shl-cst.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; PR5039
define i32 @test1(i32 %x) nounwind {
diff --git a/llvm/test/CodeGen/X86/narrow-shl-load.ll b/llvm/test/CodeGen/X86/narrow-shl-load.ll
index b1aa546e3f608..45035a186edc1 100644
--- a/llvm/test/CodeGen/X86/narrow-shl-load.ll
+++ b/llvm/test/CodeGen/X86/narrow-shl-load.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/narrow_op-1.ll b/llvm/test/CodeGen/X86/narrow_op-1.ll
index 484fd0e33af88..a56c4bb87d828 100644
--- a/llvm/test/CodeGen/X86/narrow_op-1.ll
+++ b/llvm/test/CodeGen/X86/narrow_op-1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
%struct.bf = type { i64, i16, i16, i32 }
@bfi = common dso_local global %struct.bf zeroinitializer, align 16
diff --git a/llvm/test/CodeGen/X86/neg-of-3ops-lea.ll b/llvm/test/CodeGen/X86/neg-of-3ops-lea.ll
index a39dadf3f64b1..68ee948a1bed4 100644
--- a/llvm/test/CodeGen/X86/neg-of-3ops-lea.ll
+++ b/llvm/test/CodeGen/X86/neg-of-3ops-lea.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+slow-3ops-lea | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=i686-- -mattr=-slow-3ops-lea | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+slow-3ops-lea | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-slow-3ops-lea | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+slow-3ops-lea | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-slow-3ops-lea | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+slow-3ops-lea | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-slow-3ops-lea | FileCheck %s --check-prefix=X64
; )32-a)-b --> 32-(a+b) --> -(a+b)+32 --> -((a+b)-32) -> -(a+b+(-32))
diff --git a/llvm/test/CodeGen/X86/neg-shl-add.ll b/llvm/test/CodeGen/X86/neg-shl-add.ll
index 9a4bde0743254..595961479d6cd 100644
--- a/llvm/test/CodeGen/X86/neg-shl-add.ll
+++ b/llvm/test/CodeGen/X86/neg-shl-add.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s | FileCheck %s
; These sequences don't need neg instructions; they can be done with
; a single shift and sub each.
diff --git a/llvm/test/CodeGen/X86/neg_cmp.ll b/llvm/test/CodeGen/X86/neg_cmp.ll
index f7745b04751e7..8a25a032a9ae7 100644
--- a/llvm/test/CodeGen/X86/neg_cmp.ll
+++ b/llvm/test/CodeGen/X86/neg_cmp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; rdar://11245199
; PR12545
diff --git a/llvm/test/CodeGen/X86/negate-add-zero.ll b/llvm/test/CodeGen/X86/negate-add-zero.ll
index 4884832a91a52..7ca3e26d8bbab 100644
--- a/llvm/test/CodeGen/X86/negate-add-zero.ll
+++ b/llvm/test/CodeGen/X86/negate-add-zero.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; PR3374
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/negate-i1.ll b/llvm/test/CodeGen/X86/negate-i1.ll
index 0ed3fa94f5b8f..0f6182d931ee2 100644
--- a/llvm/test/CodeGen/X86/negate-i1.ll
+++ b/llvm/test/CodeGen/X86/negate-i1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i386-unknown-unknown | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown | FileCheck %s --check-prefix=X32
define i8 @select_i8_neg1_or_0(i1 %a) {
; X64-LABEL: select_i8_neg1_or_0:
diff --git a/llvm/test/CodeGen/X86/negate-shift.ll b/llvm/test/CodeGen/X86/negate-shift.ll
index 25cb1e74bac45..345b217ab187e 100644
--- a/llvm/test/CodeGen/X86/negate-shift.ll
+++ b/llvm/test/CodeGen/X86/negate-shift.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
define i32 @neg_lshr_signbit(i32 %x) {
; X64-LABEL: neg_lshr_signbit:
diff --git a/llvm/test/CodeGen/X86/negate.ll b/llvm/test/CodeGen/X86/negate.ll
index 38751d954b05e..9cd9f86eea864 100644
--- a/llvm/test/CodeGen/X86/negate.ll
+++ b/llvm/test/CodeGen/X86/negate.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i32 @negate_nuw(i32 %x) {
; CHECK-LABEL: negate_nuw:
diff --git a/llvm/test/CodeGen/X86/negative-offset.ll b/llvm/test/CodeGen/X86/negative-offset.ll
index 5e3f09afb4048..bf17232b84e8e 100644
--- a/llvm/test/CodeGen/X86/negative-offset.ll
+++ b/llvm/test/CodeGen/X86/negative-offset.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/negative-sin.ll b/llvm/test/CodeGen/X86/negative-sin.ll
index 4836da2ad7797..1cb0eaa9c1760 100644
--- a/llvm/test/CodeGen/X86/negative-sin.ll
+++ b/llvm/test/CodeGen/X86/negative-sin.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
declare double @sin(double %f)
diff --git a/llvm/test/CodeGen/X86/negative-stride-fptosi-user.ll b/llvm/test/CodeGen/X86/negative-stride-fptosi-user.ll
index 96080d2d87cdf..5100bdc17cb24 100644
--- a/llvm/test/CodeGen/X86/negative-stride-fptosi-user.ll
+++ b/llvm/test/CodeGen/X86/negative-stride-fptosi-user.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; LSR previously eliminated the sitofp by introducing an induction
; variable which stepped by a bogus ((double)UINT32_C(-1)). It's theoretically
diff --git a/llvm/test/CodeGen/X86/negative-subscript.ll b/llvm/test/CodeGen/X86/negative-subscript.ll
index 1528f08751178..0d7a1c6022699 100644
--- a/llvm/test/CodeGen/X86/negative-subscript.ll
+++ b/llvm/test/CodeGen/X86/negative-subscript.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; rdar://6559995
@a = external dso_local global [255 x ptr], align 32
diff --git a/llvm/test/CodeGen/X86/negative_zero.ll b/llvm/test/CodeGen/X86/negative_zero.ll
index 534cfc67eea76..8ea2885a22c08 100644
--- a/llvm/test/CodeGen/X86/negative_zero.ll
+++ b/llvm/test/CodeGen/X86/negative_zero.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=-sse2,-sse3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-sse2,-sse3 | FileCheck %s
; CHECK: fchs
diff --git a/llvm/test/CodeGen/X86/new-remat.ll b/llvm/test/CodeGen/X86/new-remat.ll
index 21f2ac6650120..acd64d98e4ed0 100644
--- a/llvm/test/CodeGen/X86/new-remat.ll
+++ b/llvm/test/CodeGen/X86/new-remat.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-regalloc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-regalloc < %s | FileCheck %s
; Check all spills are rematerialized.
; CHECK-NOT: Spill
diff --git a/llvm/test/CodeGen/X86/newline-and-quote.ll b/llvm/test/CodeGen/X86/newline-and-quote.ll
index 9206e9f398eb3..12918cd4c287b 100644
--- a/llvm/test/CodeGen/X86/newline-and-quote.ll
+++ b/llvm/test/CodeGen/X86/newline-and-quote.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s
@"foo\22bar" = global i32 42
; CHECK: .globl "foo\"bar"
diff --git a/llvm/test/CodeGen/X86/no-and8ri8.ll b/llvm/test/CodeGen/X86/no-and8ri8.ll
index 57f33226602ef..d42b53aca30fc 100644
--- a/llvm/test/CodeGen/X86/no-and8ri8.ll
+++ b/llvm/test/CodeGen/X86/no-and8ri8.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux -mattr=+avx512f --show-mc-encoding < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -mattr=+avx512f --show-mc-encoding < %s | FileCheck %s
declare i1 @bar()
diff --git a/llvm/test/CodeGen/X86/no-cmov.ll b/llvm/test/CodeGen/X86/no-cmov.ll
index 4f3b1cfa1c722..a08c4dd99af87 100644
--- a/llvm/test/CodeGen/X86/no-cmov.ll
+++ b/llvm/test/CodeGen/X86/no-cmov.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-- -mcpu=i486 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -mcpu=i486 < %s | FileCheck %s
define i32 @test1(i32 %g, ptr %j) {
%tobool = icmp eq i32 %g, 0
diff --git a/llvm/test/CodeGen/X86/no-dup-cv-directive.ll b/llvm/test/CodeGen/X86/no-dup-cv-directive.ll
index 98ee9cff10d1c..c94dbdb6c33d0 100644
--- a/llvm/test/CodeGen/X86/no-dup-cv-directive.ll
+++ b/llvm/test/CodeGen/X86/no-dup-cv-directive.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O3 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 < %s | FileCheck %s
; Regression test for https://github.com/llvm/llvm-project/pull/110889#issuecomment-2393405613
; Marking x64 SEH instructions as meta led to cv directives being duplicated, which caused
diff --git a/llvm/test/CodeGen/X86/no-non-zero-debug-loc-prologue.ll b/llvm/test/CodeGen/X86/no-non-zero-debug-loc-prologue.ll
index 6ea373b67bad4..947027b819bb0 100644
--- a/llvm/test/CodeGen/X86/no-non-zero-debug-loc-prologue.ll
+++ b/llvm/test/CodeGen/X86/no-non-zero-debug-loc-prologue.ll
@@ -1,4 +1,4 @@
-; RUN: llc -filetype=asm -mtriple=x86_64-apple-macosx12.0.0 -O0 %s -o - | FileCheck %s --implicit-check-not=prologue_end
+; RUN: llc -combiner-topological-sorting -filetype=asm -mtriple=x86_64-apple-macosx12.0.0 -O0 %s -o - | FileCheck %s --implicit-check-not=prologue_end
; CHECK: Lfunc_begin0:
; CHECK-NEXT: .file{{.+}}
; CHECK-NEXT: .loc 1 1 0 ## test-small.c:1:0{{$}}
diff --git a/llvm/test/CodeGen/X86/no-plt.ll b/llvm/test/CodeGen/X86/no-plt.ll
index 4fa0c3879fc65..f751e1b90cef6 100644
--- a/llvm/test/CodeGen/X86/no-plt.ll
+++ b/llvm/test/CodeGen/X86/no-plt.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic \
; RUN: | FileCheck -check-prefix=X64 --check-prefix=PIC %s
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnu \
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux-gnu \
; RUN: | FileCheck -check-prefix=X64 --check-prefix=STATIC %s
define i32 @fp_weakfunc() {
diff --git a/llvm/test/CodeGen/X86/no-prolog-kill.ll b/llvm/test/CodeGen/X86/no-prolog-kill.ll
index 4f799f91ed446..acd1d5160220d 100644
--- a/llvm/test/CodeGen/X86/no-prolog-kill.ll
+++ b/llvm/test/CodeGen/X86/no-prolog-kill.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -o - %s | FileCheck %s
target triple = "x86_64--"
; This function gets a AL live-in and at same time saves+restores RAX. We must
diff --git a/llvm/test/CodeGen/X86/no-ret-in-x87-reg.ll b/llvm/test/CodeGen/X86/no-ret-in-x87-reg.ll
index 19554e652e4cc..5e89f650c164c 100644
--- a/llvm/test/CodeGen/X86/no-ret-in-x87-reg.ll
+++ b/llvm/test/CodeGen/X86/no-ret-in-x87-reg.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s -check-prefix=X87
-; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s -check-prefixes=NOX87,NOSSE-NOX87
-; RUN: llc < %s -mtriple=i686-- -mattr=-x87,-sse2 | FileCheck %s -check-prefixes=NOX87,NOSSE-NOX87
-; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse2 | FileCheck %s -check-prefixes=NOX87,SSE-NOX87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s -check-prefix=X87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s -check-prefixes=NOX87,NOSSE-NOX87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-x87,-sse2 | FileCheck %s -check-prefixes=NOX87,NOSSE-NOX87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-x87,+sse2 | FileCheck %s -check-prefixes=NOX87,SSE-NOX87
define float @f1(float %a, float %b) nounwind {
; X87-LABEL: f1:
diff --git a/llvm/test/CodeGen/X86/no-split-size.ll b/llvm/test/CodeGen/X86/no-split-size.ll
index c1f93acd77dee..210d473aebd12 100644
--- a/llvm/test/CodeGen/X86/no-split-size.ll
+++ b/llvm/test/CodeGen/X86/no-split-size.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
; @foo is optimized for size. Variables %p2, %p3, %p4, %p5 and %p6 are not split
; in cold blocks.
diff --git a/llvm/test/CodeGen/X86/no-sse-win64.ll b/llvm/test/CodeGen/X86/no-sse-win64.ll
index 4ee2fc6514879..749241d51a2f0 100644
--- a/llvm/test/CodeGen/X86/no-sse-win64.ll
+++ b/llvm/test/CodeGen/X86/no-sse-win64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-windows-msvc < %s -mattr=-sse | FileCheck %s
-; RUN: llc -mtriple=x86_64-windows-gnu < %s -mattr=-sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc < %s -mattr=-sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-gnu < %s -mattr=-sse | FileCheck %s
define void @recv_double(double %v, ptr %p) {
; CHECK-LABEL: recv_double:
diff --git a/llvm/test/CodeGen/X86/no-sse-x86.ll b/llvm/test/CodeGen/X86/no-sse-x86.ll
index e91a6c2ae2b9a..258d21349ded2 100644
--- a/llvm/test/CodeGen/X86/no-sse-x86.ll
+++ b/llvm/test/CodeGen/X86/no-sse-x86.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=i686 -mattr=+sse | FileCheck %s
-; RUN: llc < %s -mcpu=i686 -mattr=-sse 2>&1 | FileCheck --check-prefix NOSSE %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=i686 -mattr=+sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=i686 -mattr=-sse 2>&1 | FileCheck --check-prefix NOSSE %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
target triple = "i386-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/no-sse2-avg.ll b/llvm/test/CodeGen/X86/no-sse2-avg.ll
index 21528f7032758..70a4100c60104 100644
--- a/llvm/test/CodeGen/X86/no-sse2-avg.ll
+++ b/llvm/test/CodeGen/X86/no-sse2-avg.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s
define <16 x i8> @PR27973() {
; CHECK-LABEL: PR27973:
diff --git a/llvm/test/CodeGen/X86/no-stack-arg-probe.ll b/llvm/test/CodeGen/X86/no-stack-arg-probe.ll
index 7639996636dfc..cfb2bd57f6b9f 100644
--- a/llvm/test/CodeGen/X86/no-stack-arg-probe.ll
+++ b/llvm/test/CodeGen/X86/no-stack-arg-probe.ll
@@ -1,7 +1,7 @@
; This test is attempting to detect that the compiler disables stack
; probe calls when the corresponding option is specified.
;
-; RUN: llc -mtriple=i686-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-windows-msvc < %s | FileCheck %s
target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32"
diff --git a/llvm/test/CodeGen/X86/no-trap-after-noreturn-fastisel.ll b/llvm/test/CodeGen/X86/no-trap-after-noreturn-fastisel.ll
index 5149209f79d15..629f1113bdab2 100644
--- a/llvm/test/CodeGen/X86/no-trap-after-noreturn-fastisel.ll
+++ b/llvm/test/CodeGen/X86/no-trap-after-noreturn-fastisel.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -O0 -trap-unreachable -no-trap-after-noreturn -fast-isel-abort=3 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -O0 -trap-unreachable -no-trap-after-noreturn -fast-isel-abort=3 < %s | FileCheck %s
declare void @foo()
diff --git a/llvm/test/CodeGen/X86/nobt.ll b/llvm/test/CodeGen/X86/nobt.ll
index b915e45c1c8a4..1a38a55ce1cfc 100644
--- a/llvm/test/CodeGen/X86/nobt.ll
+++ b/llvm/test/CodeGen/X86/nobt.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; This tests some cases where BT must not be generated. See also bt.ll.
; Fixes 20040709-[12].c in gcc testsuite.
diff --git a/llvm/test/CodeGen/X86/nocf_check.ll b/llvm/test/CodeGen/X86/nocf_check.ll
index 742b07db766e8..e33dc37d7e615 100644
--- a/llvm/test/CodeGen/X86/nocf_check.ll
+++ b/llvm/test/CodeGen/X86/nocf_check.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -x86-indirect-branch-tracking < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -x86-indirect-branch-tracking < %s | FileCheck %s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; This test verify the handling of ''nocf_check'' attribute by the backend. ;;
diff --git a/llvm/test/CodeGen/X86/nocf_check_musttail.ll b/llvm/test/CodeGen/X86/nocf_check_musttail.ll
index 97058d56ce0a8..b974ef75d4513 100644
--- a/llvm/test/CodeGen/X86/nocf_check_musttail.ll
+++ b/llvm/test/CodeGen/X86/nocf_check_musttail.ll
@@ -1,4 +1,4 @@
-; RUN: not --crash llc -mtriple=x86_64-unknown-unknown -x86-indirect-branch-tracking < %s 2>&1 | FileCheck %s
+; RUN: not --crash llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -x86-indirect-branch-tracking < %s 2>&1 | FileCheck %s
; NOTRACK tail call is not implemented, so nocf_check just disables tail call.
define void @NoCfCheckTail(ptr %p) #1 {
diff --git a/llvm/test/CodeGen/X86/nocfivalue.ll b/llvm/test/CodeGen/X86/nocfivalue.ll
index 4678242905ad7..8349532bed851 100644
--- a/llvm/test/CodeGen/X86/nocfivalue.ll
+++ b/llvm/test/CodeGen/X86/nocfivalue.ll
@@ -1,4 +1,4 @@
-; RUN: opt -S -passes=lowertypetests %s | llc -asm-verbose=false | FileCheck %s
+; RUN: opt -S -passes=lowertypetests %s | llc -combiner-topological-sorting -asm-verbose=false | FileCheck %s
target datalayout = "e-p:64:64"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/nofpclass.ll b/llvm/test/CodeGen/X86/nofpclass.ll
index 2795035981e01..f4d5bbacb2d2f 100644
--- a/llvm/test/CodeGen/X86/nofpclass.ll
+++ b/llvm/test/CodeGen/X86/nofpclass.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2,-sse | FileCheck %s --check-prefix=NOSSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2,-sse | FileCheck %s --check-prefix=NOSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE
@gf = global { float, float } zeroinitializer, align 8
diff --git a/llvm/test/CodeGen/X86/nomerge.ll b/llvm/test/CodeGen/X86/nomerge.ll
index f0aedcb90c4ad..313da9aab01ae 100644
--- a/llvm/test/CodeGen/X86/nomerge.ll
+++ b/llvm/test/CodeGen/X86/nomerge.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -o - | FileCheck %s
define void @foo(i32 %i) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/nomovtopush.ll b/llvm/test/CodeGen/X86/nomovtopush.ll
index ac21ae5d66cb4..84ab03fee5d86 100644
--- a/llvm/test/CodeGen/X86/nomovtopush.ll
+++ b/llvm/test/CodeGen/X86/nomovtopush.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc | FileCheck %s
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i386-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/non-lazy-bind.ll b/llvm/test/CodeGen/X86/non-lazy-bind.ll
index 546a1365f26ab..d38abb3d8b411 100644
--- a/llvm/test/CodeGen/X86/non-lazy-bind.ll
+++ b/llvm/test/CodeGen/X86/non-lazy-bind.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin < %s | FileCheck %s
declare void @lazy() nonlazybind
declare void @not()
diff --git a/llvm/test/CodeGen/X86/non-unique-sections.ll b/llvm/test/CodeGen/X86/non-unique-sections.ll
index e588b9dda98d4..876f24f5b2370 100644
--- a/llvm/test/CodeGen/X86/non-unique-sections.ll
+++ b/llvm/test/CodeGen/X86/non-unique-sections.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux -function-sections -unique-section-names=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -function-sections -unique-section-names=false | FileCheck %s
; CHECK: .section .text,"ax", at progbits,unique
; CHECK-NOT: section
diff --git a/llvm/test/CodeGen/X86/nontemporal-2.ll b/llvm/test/CodeGen/X86/nontemporal-2.ll
index e5f217301956a..586db5b0d2138 100644
--- a/llvm/test/CodeGen/X86/nontemporal-2.ll
+++ b/llvm/test/CodeGen/X86/nontemporal-2.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefix=SSE --check-prefix=SSE4A
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=VLX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefix=SSE --check-prefix=SSE4A
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=VLX
; Make sure that we generate non-temporal stores for the test cases below.
; We use xorps for zeroing, so domain information isn't available anymore.
diff --git a/llvm/test/CodeGen/X86/nontemporal-3.ll b/llvm/test/CodeGen/X86/nontemporal-3.ll
index f9872b10097a1..b21f83bff723f 100644
--- a/llvm/test/CodeGen/X86/nontemporal-3.ll
+++ b/llvm/test/CodeGen/X86/nontemporal-3.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefixes=CHECK,SSE,SSE4A
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefixes=CHECK,SSE,SSE4A
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
; Test codegen for under aligned nontemporal vector stores
diff --git a/llvm/test/CodeGen/X86/nontemporal-4.ll b/llvm/test/CodeGen/X86/nontemporal-4.ll
index 3d86174e45103..eb135e04c8a71 100644
--- a/llvm/test/CodeGen/X86/nontemporal-4.ll
+++ b/llvm/test/CodeGen/X86/nontemporal-4.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefixes=CHECK,SSE,SSE4A
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefixes=CHECK,SSE,SSE4A
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX512
; Test codegen for under aligned nontemporal vector stores
diff --git a/llvm/test/CodeGen/X86/nontemporal-loads-2.ll b/llvm/test/CodeGen/X86/nontemporal-loads-2.ll
index 28ddfe5ab62dc..8f804e7b8eda6 100644
--- a/llvm/test/CodeGen/X86/nontemporal-loads-2.ll
+++ b/llvm/test/CodeGen/X86/nontemporal-loads-2.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
; Test codegen for under aligned nontemporal vector loads
diff --git a/llvm/test/CodeGen/X86/nontemporal.ll b/llvm/test/CodeGen/X86/nontemporal.ll
index 3b6ffacb0b230..69dd939132269 100644
--- a/llvm/test/CodeGen/X86/nontemporal.ll
+++ b/llvm/test/CodeGen/X86/nontemporal.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefixes=X86,X86-SSE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+avx | FileCheck %s --check-prefixes=X86,X86-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefixes=X64,X64-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx | FileCheck %s --check-prefixes=X64,X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefixes=X86,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+mmx,+avx | FileCheck %s --check-prefixes=X86,X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefixes=X64,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+avx | FileCheck %s --check-prefixes=X64,X64-AVX
define i32 @f(<4 x float> %A, ptr %B, <2 x double> %C, i32 %D, <2 x i64> %E, <4 x i32> %F, <8 x i16> %G, <16 x i8> %H, i64 %I, ptr %loadptr) nounwind {
; X86-SSE-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/noreturn-call-linux.ll b/llvm/test/CodeGen/X86/noreturn-call-linux.ll
index e81ff43f5a493..6f3c27751d80f 100644
--- a/llvm/test/CodeGen/X86/noreturn-call-linux.ll
+++ b/llvm/test/CodeGen/X86/noreturn-call-linux.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s
; PR43155, we used to emit dead stack adjustments for noreturn calls with stack
; arguments.
diff --git a/llvm/test/CodeGen/X86/noreturn-call-win64.ll b/llvm/test/CodeGen/X86/noreturn-call-win64.ll
index 13be1f13cf3dc..22158afb001f8 100644
--- a/llvm/test/CodeGen/X86/noreturn-call-win64.ll
+++ b/llvm/test/CodeGen/X86/noreturn-call-win64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-windows-msvc | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc | FileCheck %s
%struct.MakeCleanup = type { i8 }
%eh.ThrowInfo = type { i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/noreturn-call.ll b/llvm/test/CodeGen/X86/noreturn-call.ll
index 2e4c2a26c5793..27753c7156483 100644
--- a/llvm/test/CodeGen/X86/noreturn-call.ll
+++ b/llvm/test/CodeGen/X86/noreturn-call.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck %s
define void @test1(i32 %c) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/norex-subreg.ll b/llvm/test/CodeGen/X86/norex-subreg.ll
index 616194abd26a0..7a74e25c5dca7 100644
--- a/llvm/test/CodeGen/X86/norex-subreg.ll
+++ b/llvm/test/CodeGen/X86/norex-subreg.ll
@@ -1,5 +1,5 @@
-; RUN: llc -O0 < %s -verify-machineinstrs
-; RUN: llc < %s -verify-machineinstrs
+; RUN: llc -combiner-topological-sorting -O0 < %s -verify-machineinstrs
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs
target triple = "x86_64-apple-macosx10.7"
; This test case extracts a sub_8bit_hi sub-register:
diff --git a/llvm/test/CodeGen/X86/nosse-error1.ll b/llvm/test/CodeGen/X86/nosse-error1.ll
index 264bf8c4d54aa..df827ceed0296 100644
--- a/llvm/test/CodeGen/X86/nosse-error1.ll
+++ b/llvm/test/CodeGen/X86/nosse-error1.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mattr=-sse 2>&1 | FileCheck --check-prefix NOSSE %s
-; RUN: llc < %s | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mattr=-sse 2>&1 | FileCheck --check-prefix NOSSE %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; NOSSE: {{SSE register return with SSE disabled}}
diff --git a/llvm/test/CodeGen/X86/nosse-varargs.ll b/llvm/test/CodeGen/X86/nosse-varargs.ll
index a81ffa53b26cc..ab574556bf666 100644
--- a/llvm/test/CodeGen/X86/nosse-varargs.ll
+++ b/llvm/test/CodeGen/X86/nosse-varargs.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mattr=-sse | FileCheck %s -check-prefix=NOSSE
-; RUN: llc < %s | FileCheck %s -check-prefix=YESSSE
+; RUN: llc -combiner-topological-sorting < %s -mattr=-sse | FileCheck %s -check-prefix=NOSSE
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s -check-prefix=YESSSE
; PR3403
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/nosse-vector.ll b/llvm/test/CodeGen/X86/nosse-vector.ll
index 9807d1b09d8ef..d75374af92597 100644
--- a/llvm/test/CodeGen/X86/nosse-vector.ll
+++ b/llvm/test/CodeGen/X86/nosse-vector.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2,-sse | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2,-sse | FileCheck %s --check-prefix=X64
define void @fadd_2f64_mem(ptr %p0, ptr %p1, ptr %p2) nounwind {
; X32-LABEL: fadd_2f64_mem:
diff --git a/llvm/test/CodeGen/X86/not-and-simplify.ll b/llvm/test/CodeGen/X86/not-and-simplify.ll
index 35d7fa6c56599..5efeddde28f3d 100644
--- a/llvm/test/CodeGen/X86/not-and-simplify.ll
+++ b/llvm/test/CodeGen/X86/not-and-simplify.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-bmi | FileCheck %s --check-prefix=ALL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefix=ALL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-bmi | FileCheck %s --check-prefix=ALL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefix=ALL
; Clear high bits via shift, set them with xor (not), then mask them off.
diff --git a/llvm/test/CodeGen/X86/not-of-dec.ll b/llvm/test/CodeGen/X86/not-of-dec.ll
index 29461619ac805..896f02b0e6e53 100644
--- a/llvm/test/CodeGen/X86/not-of-dec.ll
+++ b/llvm/test/CodeGen/X86/not-of-dec.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X86
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=X64
; Fold
; ~(X - 1)
diff --git a/llvm/test/CodeGen/X86/not-shift.ll b/llvm/test/CodeGen/X86/not-shift.ll
index 840210cddbba1..af5d2d08b7444 100644
--- a/llvm/test/CodeGen/X86/not-shift.ll
+++ b/llvm/test/CodeGen/X86/not-shift.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=-bmi,-bmi2 < %s | FileCheck %s --check-prefixes=X86-NOBMI2
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+bmi,-bmi2 < %s | FileCheck %s --check-prefixes=X86-NOBMI2
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+bmi,+bmi2 < %s | FileCheck %s --check-prefixes=X86-BMI2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=-bmi,-bmi2 < %s | FileCheck %s --check-prefixes=X64-NOBMI2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,-bmi2 < %s | FileCheck %s --check-prefixes=X64-NOBMI2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,+bmi2 < %s | FileCheck %s --check-prefixes=X64-BMI2
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=-bmi,-bmi2 < %s | FileCheck %s --check-prefixes=X86-NOBMI2
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+bmi,-bmi2 < %s | FileCheck %s --check-prefixes=X86-NOBMI2
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+bmi,+bmi2 < %s | FileCheck %s --check-prefixes=X86-BMI2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=-bmi,-bmi2 < %s | FileCheck %s --check-prefixes=X64-NOBMI2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,-bmi2 < %s | FileCheck %s --check-prefixes=X64-NOBMI2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi,+bmi2 < %s | FileCheck %s --check-prefixes=X64-BMI2
diff --git a/llvm/test/CodeGen/X86/note-cet-property-inlineasm.ll b/llvm/test/CodeGen/X86/note-cet-property-inlineasm.ll
index a0e5b4add1b38..de5ca27d04926 100644
--- a/llvm/test/CodeGen/X86/note-cet-property-inlineasm.ll
+++ b/llvm/test/CodeGen/X86/note-cet-property-inlineasm.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-unknown-linux-gnu %s -o %t.o -filetype=obj
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-linux-gnu %s -o %t.o -filetype=obj
; RUN: llvm-readobj -n %t.o | FileCheck %s
module asm ".pushsection \22.note.gnu.property\22,\22a\22, at note"
diff --git a/llvm/test/CodeGen/X86/note-cet-property.ll b/llvm/test/CodeGen/X86/note-cet-property.ll
index fe4a9c7e7e742..3fe562d568606 100644
--- a/llvm/test/CodeGen/X86/note-cet-property.ll
+++ b/llvm/test/CodeGen/X86/note-cet-property.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple i686-pc-linux < %s | FileCheck %s --check-prefix=X86
-; RUN: llc -mtriple x86_64-pc-linux < %s | FileCheck %s --check-prefix=X86_64
-; RUN: llc -mtriple x86_64-pc-linux-gnux32 < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple i686-pc-linux < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux < %s | FileCheck %s --check-prefix=X86_64
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux-gnux32 < %s | FileCheck %s --check-prefix=X86
; This test checks that the compiler emits a .note.gnu.property section for
; modules with "cf-protection" module flags.
diff --git a/llvm/test/CodeGen/X86/note-sections.ll b/llvm/test/CodeGen/X86/note-sections.ll
index d8a3d931419d8..1717ab161946f 100644
--- a/llvm/test/CodeGen/X86/note-sections.ll
+++ b/llvm/test/CodeGen/X86/note-sections.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-pc-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux < %s | FileCheck %s
%struct.note = type { %struct.Elf32_Nhdr, [7 x i8], %struct.payload }
%struct.Elf32_Nhdr = type { i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/npm-asmprint.ll b/llvm/test/CodeGen/X86/npm-asmprint.ll
index 4ee2730f61136..c5a0ad1751d59 100644
--- a/llvm/test/CodeGen/X86/npm-asmprint.ll
+++ b/llvm/test/CodeGen/X86/npm-asmprint.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -mtriple x86_64-unknown-linux-gnu -enable-new-pm -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-linux-gnu -enable-new-pm -o - %s | FileCheck %s
define void @test() {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/null-mcstreamer.ll b/llvm/test/CodeGen/X86/null-mcstreamer.ll
index e464ac6c25dc5..36f7ac85b7280 100644
--- a/llvm/test/CodeGen/X86/null-mcstreamer.ll
+++ b/llvm/test/CodeGen/X86/null-mcstreamer.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i386-pc-windows-msvc -filetype=null %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-windows-msvc -filetype=null %s
define void @foo() !dbg !6 {
entry:
diff --git a/llvm/test/CodeGen/X86/null-streamer.ll b/llvm/test/CodeGen/X86/null-streamer.ll
index 3d5f682f75c22..50a40a001b95c 100644
--- a/llvm/test/CodeGen/X86/null-streamer.ll
+++ b/llvm/test/CodeGen/X86/null-streamer.ll
@@ -1,7 +1,7 @@
; Check the MCNullStreamer operates correctly, at least on a minimal test case.
;
; RUN: rm -f %t
-; RUN: llc -filetype=null -o %t -mtriple=i686-- %s
+; RUN: llc -combiner-topological-sorting -filetype=null -o %t -mtriple=i686-- %s
; RUN: ls %t
source_filename = "test/CodeGen/X86/null-streamer.ll"
diff --git a/llvm/test/CodeGen/X86/objc-gc-module-flags.ll b/llvm/test/CodeGen/X86/objc-gc-module-flags.ll
index f197510f22074..357929e44e8f4 100644
--- a/llvm/test/CodeGen/X86/objc-gc-module-flags.ll
+++ b/llvm/test/CodeGen/X86/objc-gc-module-flags.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; CHECK: .section __DATA,__objc_imageinfo,regular,no_dead_strip
; CHECK-NEXT: L_OBJC_IMAGE_INFO:
diff --git a/llvm/test/CodeGen/X86/offload_sections.ll b/llvm/test/CodeGen/X86/offload_sections.ll
index e912dc42dff07..e8fecafbfccb5 100644
--- a/llvm/test/CodeGen/X86/offload_sections.ll
+++ b/llvm/test/CodeGen/X86/offload_sections.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=CHECK-ELF
-; RUN: llc < %s -mtriple=x86_64-win32-gnu | FileCheck %s --check-prefix=CHECK-COFF
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=CHECK-ELF
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32-gnu | FileCheck %s --check-prefix=CHECK-COFF
@llvm.embedded.object = private constant [1 x i8] c"\00", section ".llvm.offloading", align 8, !exclude !0
@llvm.compiler.used = appending global [1 x ptr] [ptr @llvm.embedded.object], section "llvm.metadata"
diff --git a/llvm/test/CodeGen/X86/offset-operator.ll b/llvm/test/CodeGen/X86/offset-operator.ll
index 1c03eea927e4d..97f3fdbeabb26 100644
--- a/llvm/test/CodeGen/X86/offset-operator.ll
+++ b/llvm/test/CodeGen/X86/offset-operator.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-asm-syntax=intel -relocation-model=static < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -x86-asm-syntax=intel -relocation-model=static < %s | FileCheck %s
; Test we are emitting the 'offset' operator upon an immediate reference of a label:
; The emitted 'att-equivalent' of this one is "movl $.L.str, %eax"
diff --git a/llvm/test/CodeGen/X86/opaque-constant-asm.ll b/llvm/test/CodeGen/X86/opaque-constant-asm.ll
index 0fee3b2e4dab0..18364f4a5335e 100644
--- a/llvm/test/CodeGen/X86/opaque-constant-asm.ll
+++ b/llvm/test/CodeGen/X86/opaque-constant-asm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
; This tests makes sure that we not mistake the bitcast inside the asm statement
; as an opaque constant. If we do, then the compilation will simply fail.
diff --git a/llvm/test/CodeGen/X86/opaque-ptr.ll b/llvm/test/CodeGen/X86/opaque-ptr.ll
index 6e9bdba00fb9e..9f3f98456558d 100644
--- a/llvm/test/CodeGen/X86/opaque-ptr.ll
+++ b/llvm/test/CodeGen/X86/opaque-ptr.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
define void @okay(ptr %p, i32 %x) nounwind {
; CHECK-LABEL: okay:
diff --git a/llvm/test/CodeGen/X86/opt-ext-uses.ll b/llvm/test/CodeGen/X86/opt-ext-uses.ll
index a165d53a74f68..de17ee1d3d91f 100644
--- a/llvm/test/CodeGen/X86/opt-ext-uses.ll
+++ b/llvm/test/CodeGen/X86/opt-ext-uses.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; This test should get one and only one register to register mov.
; CHECK-LABEL: t:
diff --git a/llvm/test/CodeGen/X86/opt-pipeline.ll b/llvm/test/CodeGen/X86/opt-pipeline.ll
index 81c2f62b1d3dc..0041e6f121725 100644
--- a/llvm/test/CodeGen/X86/opt-pipeline.ll
+++ b/llvm/test/CodeGen/X86/opt-pipeline.ll
@@ -1,12 +1,12 @@
; When EXPENSIVE_CHECKS are enabled, the machine verifier appears between each
; pass. Ignore it with 'grep -v'.
-; RUN: llc -mtriple=x86_64-- -O1 -debug-pass=Structure < %s -o /dev/null 2>&1 \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O1 -debug-pass=Structure < %s -o /dev/null 2>&1 \
; RUN: | grep -v 'Verify generated machine code' | FileCheck %s
-; RUN: llc -mtriple=x86_64-- -O2 -debug-pass=Structure < %s -o /dev/null 2>&1 \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O2 -debug-pass=Structure < %s -o /dev/null 2>&1 \
; RUN: | grep -v 'Verify generated machine code' | FileCheck %s
-; RUN: llc -mtriple=x86_64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 \
; RUN: | grep -v 'Verify generated machine code' | FileCheck %s
-; RUN: llc -mtriple=x86_64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O3 -debug-pass=Structure < %s -o /dev/null 2>&1 \
; RUN: | FileCheck %s --check-prefix=FPM
; REQUIRES: asserts
diff --git a/llvm/test/CodeGen/X86/opt-shuff-tstore.ll b/llvm/test/CodeGen/X86/opt-shuff-tstore.ll
index c331f8ffb3694..f2f026e5fe780 100644
--- a/llvm/test/CodeGen/X86/opt-shuff-tstore.ll
+++ b/llvm/test/CodeGen/X86/opt-shuff-tstore.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mcpu=corei7 -mtriple=x86_64-linux < %s -mattr=+sse2,+sse4.1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -mtriple=x86_64-linux < %s -mattr=+sse2,+sse4.1 | FileCheck %s
; A single memory write
define void @func_4_8(<4 x i8> %param, ptr %p) {
diff --git a/llvm/test/CodeGen/X86/optimize-max-0.ll b/llvm/test/CodeGen/X86/optimize-max-0.ll
index b6af7e1641a9c..6f6145b852032 100644
--- a/llvm/test/CodeGen/X86/optimize-max-0.ll
+++ b/llvm/test/CodeGen/X86/optimize-max-0.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; LSR should be able to eliminate the max computations by
; making the loops use slt/ult comparisons instead of ne comparisons.
diff --git a/llvm/test/CodeGen/X86/optimize-max-1.ll b/llvm/test/CodeGen/X86/optimize-max-1.ll
index 1ac48586bf900..8d88aea42a5a2 100644
--- a/llvm/test/CodeGen/X86/optimize-max-1.ll
+++ b/llvm/test/CodeGen/X86/optimize-max-1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; LSR should be able to eliminate both smax and umax expressions
; in loop trip counts.
diff --git a/llvm/test/CodeGen/X86/optimize-max-2.ll b/llvm/test/CodeGen/X86/optimize-max-2.ll
index 3533bfbc61e6d..d926de0ad76a0 100644
--- a/llvm/test/CodeGen/X86/optimize-max-2.ll
+++ b/llvm/test/CodeGen/X86/optimize-max-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; LSR's OptimizeMax function shouldn't try to eliminate this max, because
; it has three operands.
diff --git a/llvm/test/CodeGen/X86/optimize-max-3.ll b/llvm/test/CodeGen/X86/optimize-max-3.ll
index e2b1478a05599..b9029fd3e9af9 100644
--- a/llvm/test/CodeGen/X86/optimize-max-3.ll
+++ b/llvm/test/CodeGen/X86/optimize-max-3.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux -asm-verbose=false | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 -asm-verbose=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -asm-verbose=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -asm-verbose=false | FileCheck %s
; LSR's OptimizeMax should eliminate the select (max).
diff --git a/llvm/test/CodeGen/X86/or-address.ll b/llvm/test/CodeGen/X86/or-address.ll
index 6e59d3f70c332..85852c3045f4d 100644
--- a/llvm/test/CodeGen/X86/or-address.ll
+++ b/llvm/test/CodeGen/X86/or-address.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
; PR1135
-; RUN: llc %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin10.3"
diff --git a/llvm/test/CodeGen/X86/or-branch.ll b/llvm/test/CodeGen/X86/or-branch.ll
index c6df237393e4a..44e9ca19b3239 100644
--- a/llvm/test/CodeGen/X86/or-branch.ll
+++ b/llvm/test/CodeGen/X86/or-branch.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -jump-is-expensive=0 | FileCheck %s --check-prefix=JUMP2
-; RUN: llc < %s -mtriple=i386-unknown-unknown -jump-is-expensive=1 | FileCheck %s --check-prefix=JUMP1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -jump-is-expensive=0 | FileCheck %s --check-prefix=JUMP2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -jump-is-expensive=1 | FileCheck %s --check-prefix=JUMP1
define void @foo(i32 %X, i32 %Y, i32 %Z) nounwind {
; JUMP2-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/or-lea.ll b/llvm/test/CodeGen/X86/or-lea.ll
index 616ab99437892..01ad88915d44c 100644
--- a/llvm/test/CodeGen/X86/or-lea.ll
+++ b/llvm/test/CodeGen/X86/or-lea.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64,NOBMI
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefixes=X64,BMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64,NOBMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefixes=X64,BMI
; InstCombine and DAGCombiner transform an 'add' into an 'or'
; if there are no common bits from the incoming operands.
diff --git a/llvm/test/CodeGen/X86/or-with-overflow.ll b/llvm/test/CodeGen/X86/or-with-overflow.ll
index b3ffa209bc700..8f90030342057 100644
--- a/llvm/test/CodeGen/X86/or-with-overflow.ll
+++ b/llvm/test/CodeGen/X86/or-with-overflow.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=X64
;
; PR48768 - 'or' clears the overflow flag, so we don't need a separate 'test'.
diff --git a/llvm/test/CodeGen/X86/oss-fuzz-25184.ll b/llvm/test/CodeGen/X86/oss-fuzz-25184.ll
index 87e20e566ae77..0abc0a8e6118e 100644
--- a/llvm/test/CodeGen/X86/oss-fuzz-25184.ll
+++ b/llvm/test/CodeGen/X86/oss-fuzz-25184.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin19.5.0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin19.5.0 | FileCheck %s
; OSS fuzz: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=25184
diff --git a/llvm/test/CodeGen/X86/osx-private-labels.ll b/llvm/test/CodeGen/X86/osx-private-labels.ll
index 3ad06a25a0174..8dc3161b3dafe 100644
--- a/llvm/test/CodeGen/X86/osx-private-labels.ll
+++ b/llvm/test/CodeGen/X86/osx-private-labels.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; Test all the cases where a L label is safe. Removing any entry from
; isSectionAtomizableBySymbols should cause this to fail.
; We also test some noteworthy cases that require an l label.
diff --git a/llvm/test/CodeGen/X86/overflow-intrinsic-optimizations.ll b/llvm/test/CodeGen/X86/overflow-intrinsic-optimizations.ll
index 9fc6ccdefc5ea..602d94878b45f 100644
--- a/llvm/test/CodeGen/X86/overflow-intrinsic-optimizations.ll
+++ b/llvm/test/CodeGen/X86/overflow-intrinsic-optimizations.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -mtriple=i386 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -mtriple=i386 -o - | FileCheck %s
define i1 @no__mulodi4(i32 %a, i64 %b, ptr %c) {
; CHECK-LABEL: no__mulodi4:
diff --git a/llvm/test/CodeGen/X86/overflow-intrinsic-setcc-fold.ll b/llvm/test/CodeGen/X86/overflow-intrinsic-setcc-fold.ll
index 1f26933e24bcf..9bef473b65fb9 100644
--- a/llvm/test/CodeGen/X86/overflow-intrinsic-setcc-fold.ll
+++ b/llvm/test/CodeGen/X86/overflow-intrinsic-setcc-fold.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -verify-machineinstrs | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -verify-machineinstrs | FileCheck %s --check-prefix=CHECK
define i1 @saddo_not_i32(i32 %v1, i32 %v2) {
; CHECK-LABEL: saddo_not_i32:
diff --git a/llvm/test/CodeGen/X86/overflowing-iv-codegen.ll b/llvm/test/CodeGen/X86/overflowing-iv-codegen.ll
index e5dd5b23bea96..840b2c5a25ae8 100644
--- a/llvm/test/CodeGen/X86/overflowing-iv-codegen.ll
+++ b/llvm/test/CodeGen/X86/overflowing-iv-codegen.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
; No overflow flags, same type width.
define i32 @test_01(ptr %p, i64 %len, i32 %x) {
diff --git a/llvm/test/CodeGen/X86/overlap-shift.ll b/llvm/test/CodeGen/X86/overlap-shift.ll
index fefe53c699a99..62c7db05162ff 100644
--- a/llvm/test/CodeGen/X86/overlap-shift.ll
+++ b/llvm/test/CodeGen/X86/overlap-shift.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s
;; X's live range extends beyond the shift, so the register allocator
;; cannot coalesce it with Y. Because of this, a copy needs to be
diff --git a/llvm/test/CodeGen/X86/packed_struct.ll b/llvm/test/CodeGen/X86/packed_struct.ll
index af9f31b717084..6d5f789588c92 100644
--- a/llvm/test/CodeGen/X86/packed_struct.ll
+++ b/llvm/test/CodeGen/X86/packed_struct.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; make sure we compute the correct offset for a packed structure
diff --git a/llvm/test/CodeGen/X86/paddus.ll b/llvm/test/CodeGen/X86/paddus.ll
index 26c55d6371b51..d3bf0161c140b 100644
--- a/llvm/test/CodeGen/X86/paddus.ll
+++ b/llvm/test/CodeGen/X86/paddus.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512
; FIXME: should be paddusb
define <16 x i8> @test1(<16 x i8> %x) {
diff --git a/llvm/test/CodeGen/X86/palignr.ll b/llvm/test/CodeGen/X86/palignr.ll
index 37dd99fff5bc6..9631bad84b810 100644
--- a/llvm/test/CodeGen/X86/palignr.ll
+++ b/llvm/test/CodeGen/X86/palignr.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK-SSE,CHECK-SSE2
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK-SSE,CHECK-SSSE3
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK-SSE,CHECK-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK-SSE,CHECK-SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=CHECK-AVX
define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind {
; CHECK-SSE-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/parity.ll b/llvm/test/CodeGen/X86/parity.ll
index 31a7f1125150b..f9a6798f6319a 100644
--- a/llvm/test/CodeGen/X86/parity.ll
+++ b/llvm/test/CodeGen/X86/parity.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-popcnt | FileCheck %s --check-prefixes=X86,X86-NOPOPCNT
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-popcnt | FileCheck %s --check-prefixes=X64,X64-NOPOPCNT
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+popcnt | FileCheck %s --check-prefixes=X86,X86-POPCNT
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+popcnt | FileCheck %s --check-prefixes=X64,X64-POPCNT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=-popcnt | FileCheck %s --check-prefixes=X86,X86-NOPOPCNT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-popcnt | FileCheck %s --check-prefixes=X64,X64-NOPOPCNT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+popcnt | FileCheck %s --check-prefixes=X86,X86-POPCNT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+popcnt | FileCheck %s --check-prefixes=X64,X64-POPCNT
define i4 @parity_4(i4 %x) {
; X86-LABEL: parity_4:
diff --git a/llvm/test/CodeGen/X86/partial-fold32.ll b/llvm/test/CodeGen/X86/partial-fold32.ll
index 7fc1ed3521e9d..d7ad6d17289dc 100644
--- a/llvm/test/CodeGen/X86/partial-fold32.ll
+++ b/llvm/test/CodeGen/X86/partial-fold32.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-unknown-linux-gnu -enable-misched=false < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -enable-misched=false < %s | FileCheck %s
define fastcc i8 @fold32to8(i32 %add, i8 %spill) {
; CHECK-LABEL: fold32to8:
diff --git a/llvm/test/CodeGen/X86/partial-fold64.ll b/llvm/test/CodeGen/X86/partial-fold64.ll
index 15c9d194be41a..2a6468e71c311 100644
--- a/llvm/test/CodeGen/X86/partial-fold64.ll
+++ b/llvm/test/CodeGen/X86/partial-fold64.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -enable-misched=false < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -enable-misched=false < %s | FileCheck %s
define i32 @fold64to32(i64 %add, i32 %spill) {
; CHECK-LABEL: fold64to32:
diff --git a/llvm/test/CodeGen/X86/partial-tail-dup.ll b/llvm/test/CodeGen/X86/partial-tail-dup.ll
index 691f3e70c286c..c09577b4e133e 100644
--- a/llvm/test/CodeGen/X86/partial-tail-dup.ll
+++ b/llvm/test/CodeGen/X86/partial-tail-dup.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
@gvar = external global i32
diff --git a/llvm/test/CodeGen/X86/partition.ll b/llvm/test/CodeGen/X86/partition.ll
index 77ef5c3dff5cc..c2155a7adbc8c 100644
--- a/llvm/test/CodeGen/X86/partition.ll
+++ b/llvm/test/CodeGen/X86/partition.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux | FileCheck %s
; CHECK: .section .llvm_sympart,"", at llvm_sympart,unique,1
; CHECK-NEXT: .ascii "part1"
diff --git a/llvm/test/CodeGen/X86/pass-three.ll b/llvm/test/CodeGen/X86/pass-three.ll
index 38260b85d5682..e455106ab72e3 100644
--- a/llvm/test/CodeGen/X86/pass-three.ll
+++ b/llvm/test/CodeGen/X86/pass-three.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:64:64:64-S128-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f16:16:16-f32:32:32-f64:64:64-f128:128:128-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin11.3.0"
diff --git a/llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll b/llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
index bcb1106de749e..5b169e367ec81 100644
--- a/llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
+++ b/llvm/test/CodeGen/X86/patchable-function-entry-ibt.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i686 %s -o - | FileCheck --check-prefixes=CHECK,X86 %s
-; RUN: llc -mtriple=x86_64 %s -o - | FileCheck --check-prefixes=CHECK,X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686 %s -o - | FileCheck --check-prefixes=CHECK,X86 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 %s -o - | FileCheck --check-prefixes=CHECK,X64 %s
;; -fpatchable-function-entry=0 -fcf-protection=branch
define void @f0() "patchable-function-entry"="0" {
diff --git a/llvm/test/CodeGen/X86/patchable-function-entry.ll b/llvm/test/CodeGen/X86/patchable-function-entry.ll
index d6dfe00c74991..49d7e1bed0b03 100644
--- a/llvm/test/CodeGen/X86/patchable-function-entry.ll
+++ b/llvm/test/CodeGen/X86/patchable-function-entry.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=i386 %s -o - | FileCheck --check-prefixes=CHECK,X86 %s
-; RUN: llc -mtriple=x86_64 %s -o - | FileCheck --check-prefixes=CHECK,X64 %s
-; RUN: llc -mtriple=x86_64 -function-sections %s -o - | FileCheck --check-prefixes=CHECK,X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386 %s -o - | FileCheck --check-prefixes=CHECK,X86 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 %s -o - | FileCheck --check-prefixes=CHECK,X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -function-sections %s -o - | FileCheck --check-prefixes=CHECK,X64 %s
define void @f0() "patchable-function-entry"="0" {
; CHECK-LABEL: f0:
diff --git a/llvm/test/CodeGen/X86/patchable-prologue-debuginfo.ll b/llvm/test/CodeGen/X86/patchable-prologue-debuginfo.ll
index 8802f97d958fa..640d19c17e4c0 100644
--- a/llvm/test/CodeGen/X86/patchable-prologue-debuginfo.ll
+++ b/llvm/test/CodeGen/X86/patchable-prologue-debuginfo.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK
; Regression test for function patching asserting in some cases when debug info activated.
; The code below reproduces this crash.
diff --git a/llvm/test/CodeGen/X86/patchable-prologue-tailcall.ll b/llvm/test/CodeGen/X86/patchable-prologue-tailcall.ll
index 5e55524fecc9a..b191a0d5e17fe 100644
--- a/llvm/test/CodeGen/X86/patchable-prologue-tailcall.ll
+++ b/llvm/test/CodeGen/X86/patchable-prologue-tailcall.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=CHECK
; CHECK: f1:
; CHECK-NEXT: # %bb.0:
diff --git a/llvm/test/CodeGen/X86/patchable-prologue.ll b/llvm/test/CodeGen/X86/patchable-prologue.ll
index a6a6c0d20a1af..e2b5cdaaa1dfb 100644
--- a/llvm/test/CodeGen/X86/patchable-prologue.ll
+++ b/llvm/test/CodeGen/X86/patchable-prologue.ll
@@ -1,10 +1,10 @@
-; RUN: llc -verify-machineinstrs -filetype=obj -o - -mtriple=x86_64-apple-macosx < %s | llvm-objdump --no-print-imm-hex --triple=x86_64-apple-macosx -d - | FileCheck %s
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-macosx < %s | FileCheck %s --check-prefix=CHECK-ALIGN
-; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386 < %s | FileCheck %s --check-prefixes=X86,X86CFI,XCHG
-; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc < %s | FileCheck %s --check-prefixes=X86,MOV
-; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc -mcpu=pentium3 < %s | FileCheck %s --check-prefixes=X86,MOV
-; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc -mcpu=pentium4 < %s | FileCheck %s --check-prefixes=X86,XCHG
-; RUN: llc -verify-machineinstrs -show-mc-encoding -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -filetype=obj -o - -mtriple=x86_64-apple-macosx < %s | llvm-objdump --no-print-imm-hex --triple=x86_64-apple-macosx -d - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-apple-macosx < %s | FileCheck %s --check-prefix=CHECK-ALIGN
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -show-mc-encoding -mtriple=i386 < %s | FileCheck %s --check-prefixes=X86,X86CFI,XCHG
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc < %s | FileCheck %s --check-prefixes=X86,MOV
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc -mcpu=pentium3 < %s | FileCheck %s --check-prefixes=X86,MOV
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -show-mc-encoding -mtriple=i386-windows-msvc -mcpu=pentium4 < %s | FileCheck %s --check-prefixes=X86,XCHG
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -show-mc-encoding -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X64
declare void @callee(ptr)
diff --git a/llvm/test/CodeGen/X86/patchpoint-invoke.ll b/llvm/test/CodeGen/X86/patchpoint-invoke.ll
index 56d690a01b6da..6bddcdb58a703 100644
--- a/llvm/test/CodeGen/X86/patchpoint-invoke.ll
+++ b/llvm/test/CodeGen/X86/patchpoint-invoke.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux -mcpu=corei7 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux -mcpu=corei7 < %s | FileCheck %s
; Test invoking of patchpoints
;
diff --git a/llvm/test/CodeGen/X86/patchpoint.ll b/llvm/test/CodeGen/X86/patchpoint.ll
index 6e53ede4237ec..6a2936db570c6 100644
--- a/llvm/test/CodeGen/X86/patchpoint.ll
+++ b/llvm/test/CodeGen/X86/patchpoint.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=corei7 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 < %s | FileCheck %s
; Trivial patchpoint codegen
;
diff --git a/llvm/test/CodeGen/X86/pause.ll b/llvm/test/CodeGen/X86/pause.ll
index 2bace05e0122d..a015cb319e8f3 100644
--- a/llvm/test/CodeGen/X86/pause.ll
+++ b/llvm/test/CodeGen/X86/pause.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=-sse -show-mc-encoding | FileCheck %s
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=-avx,+sse2 -show-mc-encoding | FileCheck %s
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=-sse -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=-avx,+sse2 -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s
define void @test_x86_sse2_pause() {
; CHECK-LABEL: test_x86_sse2_pause:
diff --git a/llvm/test/CodeGen/X86/pclmulqdq.ll b/llvm/test/CodeGen/X86/pclmulqdq.ll
index 92df2d9987dbe..29b0c57fd16b5 100644
--- a/llvm/test/CodeGen/X86/pclmulqdq.ll
+++ b/llvm/test/CodeGen/X86/pclmulqdq.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+pclmul | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx,+pclmul | FileCheck %s --check-prefixes=AVX,AVX-PCLMUL
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx,+vpclmulqdq | FileCheck %s --check-prefixes=AVX,AVX-VPCLMULQDQ,AVX2-VPCLMULQDQ
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+vpclmulqdq | FileCheck %s --check-prefixes=AVX,AVX-VPCLMULQDQ,AVX512-VPCLMULQDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+pclmul | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx,+pclmul | FileCheck %s --check-prefixes=AVX,AVX-PCLMUL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx,+vpclmulqdq | FileCheck %s --check-prefixes=AVX,AVX-VPCLMULQDQ,AVX2-VPCLMULQDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,+vpclmulqdq | FileCheck %s --check-prefixes=AVX,AVX-VPCLMULQDQ,AVX512-VPCLMULQDQ
; PR176879 - Match PCLMULQDQ codegen with llvm.clmul intrinsic implementations
diff --git a/llvm/test/CodeGen/X86/pcsections-atomics.ll b/llvm/test/CodeGen/X86/pcsections-atomics.ll
index 69ae1f19f3200..ca3d0814aad77 100644
--- a/llvm/test/CodeGen/X86/pcsections-atomics.ll
+++ b/llvm/test/CodeGen/X86/pcsections-atomics.ll
@@ -5,11 +5,11 @@
; access, and end with another non-atomic access; this is to test that the
; !pcsections propagation doesn't accidentally touch adjacent instructions.
;
-; RUN: llc -O0 -mattr=cx16 < %s | FileCheck %s --check-prefixes=O0
-; RUN: llc -O1 -mattr=cx16 < %s | FileCheck %s --check-prefixes=O1
-; RUN: llc -O2 -mattr=cx16 < %s | FileCheck %s --check-prefixes=O2
-; RUN: llc -O3 -mattr=cx16 < %s | FileCheck %s --check-prefixes=O3
-; RUN: llc -O3 -mcpu=haswell -mattr=cx16 < %s | FileCheck %s --check-prefixes=HASWELL-O3
+; RUN: llc -combiner-topological-sorting -O0 -mattr=cx16 < %s | FileCheck %s --check-prefixes=O0
+; RUN: llc -combiner-topological-sorting -O1 -mattr=cx16 < %s | FileCheck %s --check-prefixes=O1
+; RUN: llc -combiner-topological-sorting -O2 -mattr=cx16 < %s | FileCheck %s --check-prefixes=O2
+; RUN: llc -combiner-topological-sorting -O3 -mattr=cx16 < %s | FileCheck %s --check-prefixes=O3
+; RUN: llc -combiner-topological-sorting -O3 -mcpu=haswell -mattr=cx16 < %s | FileCheck %s --check-prefixes=HASWELL-O3
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pcsections-memops.ll b/llvm/test/CodeGen/X86/pcsections-memops.ll
index 3e6acda18422d..3f4ab54508fb4 100644
--- a/llvm/test/CodeGen/X86/pcsections-memops.ll
+++ b/llvm/test/CodeGen/X86/pcsections-memops.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 < %s | FileCheck %s --check-prefixes=O0
-; RUN: llc -O1 < %s | FileCheck %s --check-prefixes=OPT
-; RUN: llc -O2 < %s | FileCheck %s --check-prefixes=OPT
-; RUN: llc -O3 < %s | FileCheck %s --check-prefixes=OPT
+; RUN: llc -combiner-topological-sorting -O0 < %s | FileCheck %s --check-prefixes=O0
+; RUN: llc -combiner-topological-sorting -O1 < %s | FileCheck %s --check-prefixes=OPT
+; RUN: llc -combiner-topological-sorting -O2 < %s | FileCheck %s --check-prefixes=OPT
+; RUN: llc -combiner-topological-sorting -O3 < %s | FileCheck %s --check-prefixes=OPT
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pcsections.ll b/llvm/test/CodeGen/X86/pcsections.ll
index 4fe70d93cf347..893b9b3ea6644 100644
--- a/llvm/test/CodeGen/X86/pcsections.ll
+++ b/llvm/test/CodeGen/X86/pcsections.ll
@@ -2,11 +2,11 @@
; by the AsmPrinter. For tests to check that metadata is propagated to
; assembly, see pcsections-*.ll tests.
-; RUN: llc -O0 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
-; RUN: llc -O1 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
-; RUN: llc -O2 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
-; RUN: llc -O3 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
-; RUN: llc -O1 -code-model=large < %s | FileCheck %s --check-prefixes=CHECK,LARGE
+; RUN: llc -combiner-topological-sorting -O0 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
+; RUN: llc -combiner-topological-sorting -O1 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
+; RUN: llc -combiner-topological-sorting -O2 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
+; RUN: llc -combiner-topological-sorting -O3 < %s | FileCheck %s --check-prefixes=CHECK,DEFCM
+; RUN: llc -combiner-topological-sorting -O1 -code-model=large < %s | FileCheck %s --check-prefixes=CHECK,LARGE
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/peep-setb.ll b/llvm/test/CodeGen/X86/peep-setb.ll
index 944aa4d51ef24..91121031d16de 100644
--- a/llvm/test/CodeGen/X86/peep-setb.ll
+++ b/llvm/test/CodeGen/X86/peep-setb.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
; These tests use cmp+adc/sbb in place of test+set+add/sub. Should this transform
; be enabled by micro-architecture rather than as part of generic lowering/isel?
diff --git a/llvm/test/CodeGen/X86/peep-test-0.ll b/llvm/test/CodeGen/X86/peep-test-0.ll
index 3a0ef86b64ee3..d1c180a6c6e6f 100644
--- a/llvm/test/CodeGen/X86/peep-test-0.ll
+++ b/llvm/test/CodeGen/X86/peep-test-0.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define void @loop(i64 %n, ptr nocapture %d) nounwind {
; CHECK-LABEL: loop:
diff --git a/llvm/test/CodeGen/X86/peep-test-1.ll b/llvm/test/CodeGen/X86/peep-test-1.ll
index 730a7fdccbd7c..1e9891a8dfbff 100644
--- a/llvm/test/CodeGen/X86/peep-test-1.ll
+++ b/llvm/test/CodeGen/X86/peep-test-1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define void @foo(i32 %n, ptr nocapture %p) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/peep-test-2.ll b/llvm/test/CodeGen/X86/peep-test-2.ll
index b471a3fdce5b0..f835477baff1c 100644
--- a/llvm/test/CodeGen/X86/peep-test-2.ll
+++ b/llvm/test/CodeGen/X86/peep-test-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs | FileCheck %s
; It's tempting to eliminate the testl instruction here and just use the
; EFLAGS value from the incl, however it can't be known whether the add
diff --git a/llvm/test/CodeGen/X86/peep-test-3.ll b/llvm/test/CodeGen/X86/peep-test-3.ll
index 1e962169d9b08..1c0fb64fc52bc 100644
--- a/llvm/test/CodeGen/X86/peep-test-3.ll
+++ b/llvm/test/CodeGen/X86/peep-test-3.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=generic -mtriple=i686-- -post-RA-scheduler=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-- -post-RA-scheduler=false | FileCheck %s
; rdar://7226797
; LLVM should omit the testl and use the flags result from the orl.
diff --git a/llvm/test/CodeGen/X86/peep-test-4.ll b/llvm/test/CodeGen/X86/peep-test-4.ll
index bcecb0584179b..9a6825405c6ff 100644
--- a/llvm/test/CodeGen/X86/peep-test-4.ll
+++ b/llvm/test/CodeGen/X86/peep-test-4.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+bmi,+bmi2,+popcnt,+lzcnt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mattr=+bmi,+bmi2,+popcnt,+lzcnt | FileCheck %s
declare dso_local void @foo(i32)
declare dso_local void @foo32(i32)
declare dso_local void @foo64(i64)
diff --git a/llvm/test/CodeGen/X86/peep-test-5.ll b/llvm/test/CodeGen/X86/peep-test-5.ll
index a4af93b810233..35ab0cb1615bf 100644
--- a/llvm/test/CodeGen/X86/peep-test-5.ll
+++ b/llvm/test/CodeGen/X86/peep-test-5.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -o - %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-- | FileCheck %s
; Example of a decref operation with "immortal" objects.
; void decref(long* refcount) {
; long count = *refcount;
diff --git a/llvm/test/CodeGen/X86/peephole-copy.ll b/llvm/test/CodeGen/X86/peephole-copy.ll
index e7ca7c5cc6393..d84517a14fba3 100644
--- a/llvm/test/CodeGen/X86/peephole-copy.ll
+++ b/llvm/test/CodeGen/X86/peephole-copy.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s
; Correctly tracking COPY instructions in peephole should not crash compiler.
diff --git a/llvm/test/CodeGen/X86/peephole-cvt-sse.ll b/llvm/test/CodeGen/X86/peephole-cvt-sse.ll
index 505ccbe789714..654688865b80c 100644
--- a/llvm/test/CodeGen/X86/peephole-cvt-sse.ll
+++ b/llvm/test/CodeGen/X86/peephole-cvt-sse.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-pc-linux -mattr=+sse4.2 < %s | FileCheck %s --check-prefix=X86-64
-; RUN: llc -mtriple=i386-pc-linux -mattr=+sse4.2 < %s | FileCheck %s --check-prefix=I386
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -mattr=+sse4.2 < %s | FileCheck %s --check-prefix=X86-64
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-linux -mattr=+sse4.2 < %s | FileCheck %s --check-prefix=I386
; Check that unaligned loads merge with cvtdq2pd and cvtps2pd.
diff --git a/llvm/test/CodeGen/X86/peephole-fold-movsd.ll b/llvm/test/CodeGen/X86/peephole-fold-movsd.ll
index c0a6e00ec695e..e327788fc83ff 100644
--- a/llvm/test/CodeGen/X86/peephole-fold-movsd.ll
+++ b/llvm/test/CodeGen/X86/peephole-fold-movsd.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-pc-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux < %s | FileCheck %s
;
; Check that x86's peephole optimization doesn't fold a 64-bit load (movsd) into
; addpd.
diff --git a/llvm/test/CodeGen/X86/peephole-multiple-folds.ll b/llvm/test/CodeGen/X86/peephole-multiple-folds.ll
index 4b4578a5294ee..0943d0a52e63f 100644
--- a/llvm/test/CodeGen/X86/peephole-multiple-folds.ll
+++ b/llvm/test/CodeGen/X86/peephole-multiple-folds.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-- -mcpu=core-avx2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -mcpu=core-avx2 < %s | FileCheck %s
;
; Test multiple peephole-time folds in a single basic block.
; <rdar://problem/16478629>
diff --git a/llvm/test/CodeGen/X86/peephole-na-phys-copy-folding.ll b/llvm/test/CodeGen/X86/peephole-na-phys-copy-folding.ll
index f3741dc202dc5..52f7f4d6f325e 100644
--- a/llvm/test/CodeGen/X86/peephole-na-phys-copy-folding.ll
+++ b/llvm/test/CodeGen/X86/peephole-na-phys-copy-folding.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-linux-gnu -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK32
-; RUN: llc -mtriple=x86_64-linux-gnu -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-gnu -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK32
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK64
; The peephole optimizer can elide some physical register copies such as
; EFLAGS. Make sure the flags are used directly, instead of needlessly using
diff --git a/llvm/test/CodeGen/X86/perm.avx2-false-deps.ll b/llvm/test/CodeGen/X86/perm.avx2-false-deps.ll
index ff268ddb0a2e1..ff6a8432da3db 100644
--- a/llvm/test/CodeGen/X86/perm.avx2-false-deps.ll
+++ b/llvm/test/CodeGen/X86/perm.avx2-false-deps.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -mcpu=alderlake -mattr=+false-deps-perm -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE,ENABLE-ADL
-; RUN: llc -verify-machineinstrs -mcpu=sapphirerapids -mattr=+false-deps-perm -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE,ENABLE-SPR
-; RUN: llc -verify-machineinstrs -mcpu=alderlake -mattr=-false-deps-perm -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE,DISABLE-ADL
-; RUN: llc -verify-machineinstrs -mcpu=sapphirerapids -mattr=-false-deps-perm -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE,DISABLE-SPR
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=alderlake -mattr=+false-deps-perm -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE,ENABLE-ADL
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=sapphirerapids -mattr=+false-deps-perm -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE,ENABLE-SPR
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=alderlake -mattr=-false-deps-perm -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE,DISABLE-ADL
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=sapphirerapids -mattr=-false-deps-perm -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE,DISABLE-SPR
define <8 x i32> @permd(<8 x i32> %a0, <8 x i32> %a1) {
; ENABLE-ADL-LABEL: permd:
diff --git a/llvm/test/CodeGen/X86/perm.avx512-false-deps.ll b/llvm/test/CodeGen/X86/perm.avx512-false-deps.ll
index abdc5d33b8137..0a33b1745ced8 100644
--- a/llvm/test/CodeGen/X86/perm.avx512-false-deps.ll
+++ b/llvm/test/CodeGen/X86/perm.avx512-false-deps.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -mcpu=sapphirerapids -mattr=+false-deps-perm -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE
-; RUN: llc -verify-machineinstrs -mcpu=sapphirerapids -mattr=-false-deps-perm -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=sapphirerapids -mattr=+false-deps-perm -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=sapphirerapids -mattr=-false-deps-perm -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE
define <4 x i64> @permq_ri_256(<4 x i64> %a0) {
; ENABLE-LABEL: permq_ri_256:
diff --git a/llvm/test/CodeGen/X86/personality.ll b/llvm/test/CodeGen/X86/personality.ll
index 7717dc55bb2b0..db10de1917480 100644
--- a/llvm/test/CodeGen/X86/personality.ll
+++ b/llvm/test/CodeGen/X86/personality.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin9 | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s -check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin9 | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9 | FileCheck %s -check-prefix=X32
; PR1632
define void @_Z1fv() personality ptr @__gxx_personality_v0 {
diff --git a/llvm/test/CodeGen/X86/personality_size.ll b/llvm/test/CodeGen/X86/personality_size.ll
index 1130d7913e2d4..eb84f4c79798c 100644
--- a/llvm/test/CodeGen/X86/personality_size.ll
+++ b/llvm/test/CodeGen/X86/personality_size.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -relocation-model=pic -mtriple=x86_64-pc-solaris2.11 | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -relocation-model=pic -mtriple=i386-pc-solaris2.11 | FileCheck %s -check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -mtriple=x86_64-pc-solaris2.11 | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -mtriple=i386-pc-solaris2.11 | FileCheck %s -check-prefix=X32
; PR1632
define void @_Z1fv() personality ptr @__gxx_personality_v0 {
diff --git a/llvm/test/CodeGen/X86/pgo-profile-o0.ll b/llvm/test/CodeGen/X86/pgo-profile-o0.ll
index f9704fcf0ec3a..ec90ac8123f19 100644
--- a/llvm/test/CodeGen/X86/pgo-profile-o0.ll
+++ b/llvm/test/CodeGen/X86/pgo-profile-o0.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=x86_64-- -O0 -pgo-kind=pgo-sample-use-pipeline -debug-pass=Structure %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=PASSES
-; RUN: llc -mtriple=x86_64-- -O0 -pgo-kind=pgo-sample-use-pipeline -debug-only=branch-prob %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=BRANCH_PROB
-; RUN: llc -mtriple=x86_64-- -O0 -pgo-kind=pgo-sample-use-pipeline -stop-after=finalize-isel %s -o - | FileCheck %s --check-prefix=MIR
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O0 -pgo-kind=pgo-sample-use-pipeline -debug-pass=Structure %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=PASSES
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O0 -pgo-kind=pgo-sample-use-pipeline -debug-only=branch-prob %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=BRANCH_PROB
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O0 -pgo-kind=pgo-sample-use-pipeline -stop-after=finalize-isel %s -o - | FileCheck %s --check-prefix=MIR
; REQUIRES: asserts
diff --git a/llvm/test/CodeGen/X86/phaddsub-undef.ll b/llvm/test/CodeGen/X86/phaddsub-undef.ll
index 8ecdbe1c40fe3..9d218d8d7b01f 100644
--- a/llvm/test/CodeGen/X86/phaddsub-undef.ll
+++ b/llvm/test/CodeGen/X86/phaddsub-undef.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK,SSE,SSE-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3,fast-hops | FileCheck %s --check-prefixes=CHECK,SSE,SSE-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1,AVX1-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx,fast-hops | FileCheck %s --check-prefixes=CHECK,AVX,AVX1,AVX1-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2,fast-hops | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512vl,fast-hops | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK,SSE,SSE-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ssse3,fast-hops | FileCheck %s --check-prefixes=CHECK,SSE,SSE-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1,AVX1-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx,fast-hops | FileCheck %s --check-prefixes=CHECK,AVX,AVX1,AVX1-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2,fast-hops | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512vl,fast-hops | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
; Verify that we correctly fold horizontal binop even in the presence of UNDEFs.
diff --git a/llvm/test/CodeGen/X86/phi-bit-propagation.ll b/llvm/test/CodeGen/X86/phi-bit-propagation.ll
index 22b3e1682285b..9e09b3f606008 100644
--- a/llvm/test/CodeGen/X86/phi-bit-propagation.ll
+++ b/llvm/test/CodeGen/X86/phi-bit-propagation.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
%"class.std::bitset" = type { [8 x i8] }
diff --git a/llvm/test/CodeGen/X86/phi-immediate-factoring.ll b/llvm/test/CodeGen/X86/phi-immediate-factoring.ll
index e90f66df871c5..b9769b8080f8d 100644
--- a/llvm/test/CodeGen/X86/phi-immediate-factoring.ll
+++ b/llvm/test/CodeGen/X86/phi-immediate-factoring.ll
@@ -1,7 +1,7 @@
; REQUIRES: asserts
-; RUN: llc < %s -disable-preheader-prot=true -stats 2>&1 | grep "Number of blocks eliminated" | grep 3
-; RUN: llc < %s -disable-preheader-prot=true -stats -cgp-freq-ratio-to-skip-merge=10 2>&1 | grep "Number of blocks eliminated" | grep 6
-; RUN: llc < %s -disable-preheader-prot=false -stats 2>&1 | grep "Number of blocks eliminated" | grep 3
+; RUN: llc -combiner-topological-sorting < %s -disable-preheader-prot=true -stats 2>&1 | grep "Number of blocks eliminated" | grep 3
+; RUN: llc -combiner-topological-sorting < %s -disable-preheader-prot=true -stats -cgp-freq-ratio-to-skip-merge=10 2>&1 | grep "Number of blocks eliminated" | grep 6
+; RUN: llc -combiner-topological-sorting < %s -disable-preheader-prot=false -stats 2>&1 | grep "Number of blocks eliminated" | grep 3
; PR1296
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
diff --git a/llvm/test/CodeGen/X86/phielim-split.ll b/llvm/test/CodeGen/X86/phielim-split.ll
index 32c5e765bd859..bdc57873cf449 100644
--- a/llvm/test/CodeGen/X86/phielim-split.ll
+++ b/llvm/test/CodeGen/X86/phielim-split.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-machineinstrs -no-phi-elim-live-out-early-exit | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -no-phi-elim-live-out-early-exit | FileCheck %s
target triple = "x86_64-apple-macosx10.8.0"
; The critical edge from for.cond to if.end2 should be split to avoid injecting
diff --git a/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll b/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll
index a2cd5b4fcda96..b0d74f08ee144 100644
--- a/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll
+++ b/llvm/test/CodeGen/X86/phys-reg-local-regalloc.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck %s
-; RUN: llc -O0 < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -no-x86-call-frame-opt | FileCheck %s
-; RUN: llc < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=atom -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=generic -regalloc=fast -no-x86-call-frame-opt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -stack-symbol-ordering=0 -mtriple=i386-apple-darwin9 -mcpu=atom -regalloc=fast -optimize-regalloc=0 -no-x86-call-frame-opt | FileCheck %s
@.str = private constant [12 x i8] c"x + y = %i\0A\00", align 1 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/phys_subreg_coalesce-2.ll b/llvm/test/CodeGen/X86/phys_subreg_coalesce-2.ll
index 9c329018a136b..a47297b55fc90 100644
--- a/llvm/test/CodeGen/X86/phys_subreg_coalesce-2.ll
+++ b/llvm/test/CodeGen/X86/phys_subreg_coalesce-2.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
-; RUN: llc -no-phi-elim-live-out-early-exit -terminal-rule < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting -no-phi-elim-live-out-early-exit -terminal-rule < %s -mtriple=i686-- | FileCheck %s
; PR2659
define i32 @binomial(i32 %n, i32 %k) nounwind {
diff --git a/llvm/test/CodeGen/X86/phys_subreg_coalesce-3.ll b/llvm/test/CodeGen/X86/phys_subreg_coalesce-3.ll
index eb14270a2aadd..56996439ffd10 100644
--- a/llvm/test/CodeGen/X86/phys_subreg_coalesce-3.ll
+++ b/llvm/test/CodeGen/X86/phys_subreg_coalesce-3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-machineinstrs -mtriple=i386-apple-darwin -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i386-apple-darwin -mcpu=corei7 | FileCheck %s
; rdar://5571034
; This requires physreg joining, %13 is live everywhere:
diff --git a/llvm/test/CodeGen/X86/phys_subreg_coalesce.ll b/llvm/test/CodeGen/X86/phys_subreg_coalesce.ll
index 8b2f61e1e2d26..38a49f5b209a9 100644
--- a/llvm/test/CodeGen/X86/phys_subreg_coalesce.ll
+++ b/llvm/test/CodeGen/X86/phys_subreg_coalesce.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin9 -mattr=+sse2 | FileCheck %s
; CHECK-NOT: movl
diff --git a/llvm/test/CodeGen/X86/physreg-pairs-error.ll b/llvm/test/CodeGen/X86/physreg-pairs-error.ll
index 3ee52023b61c3..fd9f57923bae1 100644
--- a/llvm/test/CodeGen/X86/physreg-pairs-error.ll
+++ b/llvm/test/CodeGen/X86/physreg-pairs-error.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=i386-unknown-linux-gnu -o - %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=i386-unknown-linux-gnu -o - %s 2>&1 | FileCheck %s
; CHECK: error: couldn't allocate input reg for constraint '{esp}'
define dso_local i64 @test_esp(i64 %in) local_unnamed_addr nounwind {
diff --git a/llvm/test/CodeGen/X86/physreg-pairs.ll b/llvm/test/CodeGen/X86/physreg-pairs.ll
index 07ee803709caa..17a814987f52c 100644
--- a/llvm/test/CodeGen/X86/physreg-pairs.ll
+++ b/llvm/test/CodeGen/X86/physreg-pairs.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-unknown-linux-gnu -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-linux-gnu -o - %s | FileCheck %s
; To match GCC's behavior in assigning 64-bit values to a 32-bit
; register, we bind the a subsequence of 2 registers starting with the
diff --git a/llvm/test/CodeGen/X86/pic-load-remat.ll b/llvm/test/CodeGen/X86/pic-load-remat.ll
index 2587b0379a0f7..d87bd74d570ce 100644
--- a/llvm/test/CodeGen/X86/pic-load-remat.ll
+++ b/llvm/test/CodeGen/X86/pic-load-remat.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+sse2 -relocation-model=pic | FileCheck %s
define void @f() nounwind {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/pic.ll b/llvm/test/CodeGen/X86/pic.ll
index ef2849ca0cde6..a2c6eb74fa432 100644
--- a/llvm/test/CodeGen/X86/pic.ll
+++ b/llvm/test/CodeGen/X86/pic.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mcpu=generic -mtriple=i686-pc-linux-gnu -relocation-model=pic -asm-verbose=false -post-RA-scheduler=false -verify-machineinstrs | FileCheck %s -check-prefixes=CHECK,CHECK-I686
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnux32 -relocation-model=pic -asm-verbose=false -post-RA-scheduler=false -verify-machineinstrs | FileCheck %s -check-prefixes=CHECK,CHECK-X32
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnux32 -relocation-model=pic -asm-verbose=false -post-RA-scheduler=false -fast-isel -verify-machineinstrs | FileCheck %s -check-prefixes=CHECK,CHECK-X32
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-pc-linux-gnu -relocation-model=pic -asm-verbose=false -post-RA-scheduler=false -verify-machineinstrs | FileCheck %s -check-prefixes=CHECK,CHECK-I686
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnux32 -relocation-model=pic -asm-verbose=false -post-RA-scheduler=false -verify-machineinstrs | FileCheck %s -check-prefixes=CHECK,CHECK-X32
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnux32 -relocation-model=pic -asm-verbose=false -post-RA-scheduler=false -fast-isel -verify-machineinstrs | FileCheck %s -check-prefixes=CHECK,CHECK-X32
@ptr = external global ptr
@dst = external global i32
diff --git a/llvm/test/CodeGen/X86/pic_jumptable.ll b/llvm/test/CodeGen/X86/pic_jumptable.ll
index 4de4936c5f5d0..526d00196e5b5 100644
--- a/llvm/test/CodeGen/X86/pic_jumptable.ll
+++ b/llvm/test/CodeGen/X86/pic_jumptable.ll
@@ -1,10 +1,10 @@
-; RUN: llc < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false \
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -mtriple=i386-linux-gnu -asm-verbose=false \
; RUN: | FileCheck %s --check-prefix=CHECK-LINUX
-; RUN: llc < %s -relocation-model=pic -mark-data-regions -mtriple=i686-apple-darwin -asm-verbose=false \
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -mark-data-regions -mtriple=i686-apple-darwin -asm-verbose=false \
; RUN: | FileCheck %s --check-prefix=CHECK-DATA
-; RUN: llc < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false \
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -mtriple=i686-apple-darwin -asm-verbose=false \
; RUN: | FileCheck %s --check-prefix=CHECK-DATA
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | not grep 'lJTI'
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | not grep 'lJTI'
; rdar://6971437
; rdar://7738756
diff --git a/llvm/test/CodeGen/X86/pie.ll b/llvm/test/CodeGen/X86/pie.ll
index f557765cf9103..515b58f12be84 100644
--- a/llvm/test/CodeGen/X86/pie.ll
+++ b/llvm/test/CodeGen/X86/pie.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -O0 -mcpu=generic -mtriple=i686-linux-gnu -relocation-model=pic | FileCheck %s
-; RUN: llc < %s -O0 -mcpu=generic -mtriple=i686-linux-gnu -fast-isel -relocation-model=pic | FileCheck %s
-; RUN: llc < %s -O0 -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s
-; RUN: llc < %s -O0 -mcpu=generic -mtriple=x86_64-linux-gnu -fast-isel -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mcpu=generic -mtriple=i686-linux-gnu -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mcpu=generic -mtriple=i686-linux-gnu -fast-isel -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mcpu=generic -mtriple=x86_64-linux-gnu -fast-isel -relocation-model=pic | FileCheck %s
; CHECK-LABEL: bar:
; CHECK: call{{l|q}} foo{{$}}
diff --git a/llvm/test/CodeGen/X86/pku.ll b/llvm/test/CodeGen/X86/pku.ll
index b6b2f98e29996..e2a7a4a2f2bf2 100644
--- a/llvm/test/CodeGen/X86/pku.ll
+++ b/llvm/test/CodeGen/X86/pku.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=knl --show-mc-encoding -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mcpu=knl --show-mc-encoding -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=knl --show-mc-encoding -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,X64
declare i32 @llvm.x86.rdpkru()
declare void @llvm.x86.wrpkru(i32)
diff --git a/llvm/test/CodeGen/X86/pmovext.ll b/llvm/test/CodeGen/X86/pmovext.ll
index d31d845900f58..0244dd4bb8c0a 100644
--- a/llvm/test/CodeGen/X86/pmovext.ll
+++ b/llvm/test/CodeGen/X86/pmovext.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s
; rdar://11897677
diff --git a/llvm/test/CodeGen/X86/pmovsx-inreg.ll b/llvm/test/CodeGen/X86/pmovsx-inreg.ll
index a39ea60331a5e..59964e27f934c 100644
--- a/llvm/test/CodeGen/X86/pmovsx-inreg.ll
+++ b/llvm/test/CodeGen/X86/pmovsx-inreg.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknwon -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknwon -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknwon -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=i686-unknwon -mattr=+avx2 | FileCheck %s --check-prefixes=X86-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknwon -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknwon -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknwon -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknwon -mattr=+avx2 | FileCheck %s --check-prefixes=X86-AVX2
; PR14887
; These tests inject a store into the chain to test the inreg versions of pmovsx
diff --git a/llvm/test/CodeGen/X86/pmulld.ll b/llvm/test/CodeGen/X86/pmulld.ll
index b29c01284c751..5ca59961d87a0 100644
--- a/llvm/test/CodeGen/X86/pmulld.ll
+++ b/llvm/test/CodeGen/X86/pmulld.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse4.1 -asm-verbose=0 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse4.1 -asm-verbose=0 | FileCheck %s -check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+sse4.1 -asm-verbose=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mattr=+sse4.1 -asm-verbose=0 | FileCheck %s -check-prefix=WIN64
define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/pmullq-false-deps.ll b/llvm/test/CodeGen/X86/pmullq-false-deps.ll
index ee0eca3754aef..752adec265cec 100644
--- a/llvm/test/CodeGen/X86/pmullq-false-deps.ll
+++ b/llvm/test/CodeGen/X86/pmullq-false-deps.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -mcpu=sapphirerapids -mattr=+false-deps-mullq -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE
-; RUN: llc -verify-machineinstrs -mcpu=sapphirerapids -mattr=-false-deps-mullq -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=sapphirerapids -mattr=+false-deps-mullq -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=sapphirerapids -mattr=-false-deps-mullq -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE
define <2 x i64> @pmullq_128(<2 x i64> %a0, <2 x i64> %a1) {
; ENABLE-LABEL: pmullq_128:
diff --git a/llvm/test/CodeGen/X86/pointer-vector.ll b/llvm/test/CodeGen/X86/pointer-vector.ll
index aa9b977482fc1..2342bfb3707ff 100644
--- a/llvm/test/CodeGen/X86/pointer-vector.ll
+++ b/llvm/test/CodeGen/X86/pointer-vector.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -mcpu=corei7 | FileCheck %s
; RUN: opt -passes=instsimplify -disable-output < %s
define <8 x ptr> @SHUFF0(<4 x ptr> %ptrv) nounwind {
diff --git a/llvm/test/CodeGen/X86/poison-ops.ll b/llvm/test/CodeGen/X86/poison-ops.ll
index 636a42fd06e26..418ef542f2e4a 100644
--- a/llvm/test/CodeGen/X86/poison-ops.ll
+++ b/llvm/test/CodeGen/X86/poison-ops.ll
@@ -1,5 +1,5 @@
; NOTE: This test case is borrowed from undef-ops.ll
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i32 @add_poison_rhs(i32 %x) {
; CHECK-LABEL: add_poison_rhs:
diff --git a/llvm/test/CodeGen/X86/pop-stack-cleanup-msvc.ll b/llvm/test/CodeGen/X86/pop-stack-cleanup-msvc.ll
index 3e9e6c3ab8dfa..53cbe3534be65 100644
--- a/llvm/test/CodeGen/X86/pop-stack-cleanup-msvc.ll
+++ b/llvm/test/CodeGen/X86/pop-stack-cleanup-msvc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target triple = "i686--windows-msvc"
diff --git a/llvm/test/CodeGen/X86/pop-stack-cleanup.ll b/llvm/test/CodeGen/X86/pop-stack-cleanup.ll
index 050fb41ed218f..8747b02a8a44f 100644
--- a/llvm/test/CodeGen/X86/pop-stack-cleanup.ll
+++ b/llvm/test/CodeGen/X86/pop-stack-cleanup.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-windows | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=LINUX64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-windows | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=LINUX64
declare void @param1(i32 %a)
declare i32 @param2_ret(i32 %a, i32 %b)
diff --git a/llvm/test/CodeGen/X86/popcnt.ll b/llvm/test/CodeGen/X86/popcnt.ll
index 3004b8b72fcc5..ad0a1784c6275 100644
--- a/llvm/test/CodeGen/X86/popcnt.ll
+++ b/llvm/test/CodeGen/X86/popcnt.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-BASE
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+popcnt | FileCheck %s --check-prefixes=X86-POPCNT
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+popcnt | FileCheck %s --check-prefixes=X64-POPCNT
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ndd | FileCheck %s --check-prefixes=X64,X64-NDD
-; RUN: llc < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
-; RUN: llc < %s -mtriple=i686-unknown -mattr=ssse3 | FileCheck %s --check-prefixes=X86,X86-SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86,X86-NOSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64,X64-BASE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+popcnt | FileCheck %s --check-prefixes=X86-POPCNT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+popcnt | FileCheck %s --check-prefixes=X64-POPCNT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ndd | FileCheck %s --check-prefixes=X64,X64-NDD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=ssse3 | FileCheck %s --check-prefixes=X86,X86-SSSE3
define i8 @cnt8(i8 %x) nounwind readnone {
; X86-LABEL: cnt8:
diff --git a/llvm/test/CodeGen/X86/post-ra-sched.ll b/llvm/test/CodeGen/X86/post-ra-sched.ll
index 3cc2598c6a764..bee8c5ed2e618 100644
--- a/llvm/test/CodeGen/X86/post-ra-sched.ll
+++ b/llvm/test/CodeGen/X86/post-ra-sched.ll
@@ -1,8 +1,8 @@
-; RUN: llc < %s -mtriple=i386 -mcpu=pentium4 | FileCheck %s
-; RUN: llc < %s -mtriple=i386 -mcpu=pentium4m | FileCheck %s
-; RUN: llc < %s -mtriple=i386 -mcpu=pentium-m | FileCheck %s
-; RUN: llc < %s -mtriple=i386 -mcpu=prescott | FileCheck %s
-; RUN: llc < %s -mtriple=i386 -mcpu=nocona | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386 -mcpu=pentium4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386 -mcpu=pentium4m | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386 -mcpu=pentium-m | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386 -mcpu=prescott | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386 -mcpu=nocona | FileCheck %s
;
; Verify that scheduling puts some distance between a load feeding into
; the address of another load, and that second load. This currently
diff --git a/llvm/test/CodeGen/X86/postalloc-coalescing.ll b/llvm/test/CodeGen/X86/postalloc-coalescing.ll
index 7430d7a9baf26..44fe55639a18b 100644
--- a/llvm/test/CodeGen/X86/postalloc-coalescing.ll
+++ b/llvm/test/CodeGen/X86/postalloc-coalescing.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define fastcc i32 @_Z18yy_get_next_bufferv() nounwind {
; CHECK-LABEL: _Z18yy_get_next_bufferv:
diff --git a/llvm/test/CodeGen/X86/postra-licm.ll b/llvm/test/CodeGen/X86/postra-licm.ll
index 177162c8343d6..27b99b0d6c21a 100644
--- a/llvm/test/CodeGen/X86/postra-licm.ll
+++ b/llvm/test/CodeGen/X86/postra-licm.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin -relocation-model=pic -frame-pointer=all | FileCheck %s -check-prefix=X86-32
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -frame-pointer=all | FileCheck %s -check-prefix=X86-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -relocation-model=pic -frame-pointer=all | FileCheck %s -check-prefix=X86-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -relocation-model=pic -frame-pointer=all | FileCheck %s -check-prefix=X86-64
; MachineLICM should be able to hoist loop invariant reload out of the loop.
; Only linear scan needs this, -regalloc=greedy sinks the spill instead.
diff --git a/llvm/test/CodeGen/X86/pow-libcall.ll b/llvm/test/CodeGen/X86/pow-libcall.ll
index 2e6ff43240ae5..dc9e28041172f 100644
--- a/llvm/test/CodeGen/X86/pow-libcall.ll
+++ b/llvm/test/CodeGen/X86/pow-libcall.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu < %s | FileCheck %s
; Ensure vectorized FPOWs are not widened/unrolled such that they get lowered
; into libcalls on undef elements.
diff --git a/llvm/test/CodeGen/X86/pow.75.ll b/llvm/test/CodeGen/X86/pow.75.ll
index 9f5adb945ae62..0a233d0098188 100644
--- a/llvm/test/CodeGen/X86/pow.75.ll
+++ b/llvm/test/CodeGen/X86/pow.75.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -debug 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -debug 2>&1 | FileCheck %s
; REQUIRES: asserts
declare float @llvm.pow.f32(float, float)
diff --git a/llvm/test/CodeGen/X86/pow.ll b/llvm/test/CodeGen/X86/pow.ll
index c2f7eb66ab01c..04be8cc1d3076 100644
--- a/llvm/test/CodeGen/X86/pow.ll
+++ b/llvm/test/CodeGen/X86/pow.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s
declare float @llvm.pow.f32(float, float)
declare <4 x float> @llvm.pow.v4f32(<4 x float>, <4 x float>)
diff --git a/llvm/test/CodeGen/X86/powi-const.ll b/llvm/test/CodeGen/X86/powi-const.ll
index 49f0e9a6b1455..190aa8091ff23 100644
--- a/llvm/test/CodeGen/X86/powi-const.ll
+++ b/llvm/test/CodeGen/X86/powi-const.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86-X87
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86-X87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
; Ideally this would compile to 5 multiplies.
diff --git a/llvm/test/CodeGen/X86/powi-int32min.ll b/llvm/test/CodeGen/X86/powi-int32min.ll
index b3093a08c496f..262b4d7ac2f3f 100644
--- a/llvm/test/CodeGen/X86/powi-int32min.ll
+++ b/llvm/test/CodeGen/X86/powi-int32min.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
define float @test_powi(ptr %p) nounwind {
; CHECK-LABEL: test_powi:
diff --git a/llvm/test/CodeGen/X86/powi-windows.ll b/llvm/test/CodeGen/X86/powi-windows.ll
index bc5a8719ae392..a7ee3bc14b02e 100644
--- a/llvm/test/CodeGen/X86/powi-windows.ll
+++ b/llvm/test/CodeGen/X86/powi-windows.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-windows < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-windows < %s | FileCheck %s
declare double @llvm.powi.f64.i32(double, i32)
declare float @llvm.powi.f32.i32(float, i32)
diff --git a/llvm/test/CodeGen/X86/powi.ll b/llvm/test/CodeGen/X86/powi.ll
index 9446cc071c1fc..012ab9d75def3 100644
--- a/llvm/test/CodeGen/X86/powi.ll
+++ b/llvm/test/CodeGen/X86/powi.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=FAST-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=SDAG-X86
-; RUN: llc < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -fast-isel | FileCheck %s --check-prefixes=FAST-X64
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -fast-isel | FileCheck %s --check-prefixes=FAST-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=SDAG-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -fast-isel | FileCheck %s --check-prefixes=FAST-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -global-isel=0 -fast-isel=0 | FileCheck %s --check-prefixes=SDAG-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -global-isel -global-isel-abort=1 | FileCheck %s --check-prefixes=GISEL-X64
define float @test_powi_f32_i32(float %Val, i32 %x) nounwind {
; FAST-X86-LABEL: test_powi_f32_i32:
diff --git a/llvm/test/CodeGen/X86/pr10068.ll b/llvm/test/CodeGen/X86/pr10068.ll
index 7a3da26b23648..1f2c7756db62e 100644
--- a/llvm/test/CodeGen/X86/pr10068.ll
+++ b/llvm/test/CodeGen/X86/pr10068.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
define void @foobar() {
entry:
diff --git a/llvm/test/CodeGen/X86/pr10475.ll b/llvm/test/CodeGen/X86/pr10475.ll
index 4275dc262c378..8e642800ae954 100644
--- a/llvm/test/CodeGen/X86/pr10475.ll
+++ b/llvm/test/CodeGen/X86/pr10475.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7-avx
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=corei7-avx
; No check in a crash test
diff --git a/llvm/test/CodeGen/X86/pr10499.ll b/llvm/test/CodeGen/X86/pr10499.ll
index f9cc747e49a84..84e78f60e7c74 100644
--- a/llvm/test/CodeGen/X86/pr10499.ll
+++ b/llvm/test/CodeGen/X86/pr10499.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7-avx -mattr=-sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=corei7-avx -mattr=-sse2
; No check as PR10499 is a crashing bug.
diff --git a/llvm/test/CodeGen/X86/pr10523.ll b/llvm/test/CodeGen/X86/pr10523.ll
index c5013017ce892..d8b66b36ffbba 100644
--- a/llvm/test/CodeGen/X86/pr10523.ll
+++ b/llvm/test/CodeGen/X86/pr10523.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1
; No check in a crash test
diff --git a/llvm/test/CodeGen/X86/pr10524.ll b/llvm/test/CodeGen/X86/pr10524.ll
index bc720859cd626..6271812bbcc91 100644
--- a/llvm/test/CodeGen/X86/pr10524.ll
+++ b/llvm/test/CodeGen/X86/pr10524.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1
; No check in a crash test
diff --git a/llvm/test/CodeGen/X86/pr10525.ll b/llvm/test/CodeGen/X86/pr10525.ll
index 426f6c8066ca7..b45bbe7168692 100644
--- a/llvm/test/CodeGen/X86/pr10525.ll
+++ b/llvm/test/CodeGen/X86/pr10525.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1
; No check in a crash test
diff --git a/llvm/test/CodeGen/X86/pr10526.ll b/llvm/test/CodeGen/X86/pr10526.ll
index ee0c01704330b..a9542a5798e38 100644
--- a/llvm/test/CodeGen/X86/pr10526.ll
+++ b/llvm/test/CodeGen/X86/pr10526.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2,+sse4.1
; No check in a crash test
diff --git a/llvm/test/CodeGen/X86/pr108728.ll b/llvm/test/CodeGen/X86/pr108728.ll
index 75a661891e726..66d4b9283d32a 100644
--- a/llvm/test/CodeGen/X86/pr108728.ll
+++ b/llvm/test/CodeGen/X86/pr108728.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define i8 @PR108728(i1 %a0) {
; CHECK-LABEL: PR108728:
diff --git a/llvm/test/CodeGen/X86/pr11202.ll b/llvm/test/CodeGen/X86/pr11202.ll
index 6f1da5d642d1c..d72f8a42f830e 100644
--- a/llvm/test/CodeGen/X86/pr11202.ll
+++ b/llvm/test/CodeGen/X86/pr11202.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s
@bb = constant [1 x ptr] [ptr blockaddress(@main, %l2)]
diff --git a/llvm/test/CodeGen/X86/pr11334.ll b/llvm/test/CodeGen/X86/pr11334.ll
index b0aa566a8235f..9af1600b0c50e 100644
--- a/llvm/test/CodeGen/X86/pr11334.ll
+++ b/llvm/test/CodeGen/X86/pr11334.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=core-avx-i | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=corei7 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=core-avx-i | FileCheck %s --check-prefix=AVX
define <2 x double> @v2f2d_ext_vec(<2 x float> %v1) nounwind {
; SSE-LABEL: v2f2d_ext_vec:
diff --git a/llvm/test/CodeGen/X86/pr11415.ll b/llvm/test/CodeGen/X86/pr11415.ll
index ee632189ef9ce..a6871064c37c1 100644
--- a/llvm/test/CodeGen/X86/pr11415.ll
+++ b/llvm/test/CodeGen/X86/pr11415.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux %s -o - -regalloc=fast -optimize-regalloc=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux %s -o - -regalloc=fast -optimize-regalloc=0 | FileCheck %s
; We used to consider the early clobber in the second asm statement as
; defining %0 before it was read. This caused us to omit the
diff --git a/llvm/test/CodeGen/X86/pr114360.ll b/llvm/test/CodeGen/X86/pr114360.ll
index 41cf06a77571d..4b5ab54bcad19 100644
--- a/llvm/test/CodeGen/X86/pr114360.ll
+++ b/llvm/test/CodeGen/X86/pr114360.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -debug-counter=dagcombine=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -debug-counter=dagcombine=0 | FileCheck %s
; BUG: shrinkAndImmediate folds away the AND after the ZEXT has already been folded away to SUBREG_TO_REG losing implicit zext.
define i64 @test() {
diff --git a/llvm/test/CodeGen/X86/pr114520.ll b/llvm/test/CodeGen/X86/pr114520.ll
index 9bd1f49ff67c9..227e7594fa81d 100644
--- a/llvm/test/CodeGen/X86/pr114520.ll
+++ b/llvm/test/CodeGen/X86/pr114520.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-none-unknown-elf -mattr=+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-none-unknown-elf -mattr=+avx512vl | FileCheck %s
define half @test1(half %x) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/pr11468.ll b/llvm/test/CodeGen/X86/pr11468.ll
index e91d387d6aed4..c7475ed0e0dd0 100644
--- a/llvm/test/CodeGen/X86/pr11468.ll
+++ b/llvm/test/CodeGen/X86/pr11468.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -stackrealign -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -stackrealign -mattr=+avx -mtriple=x86_64-apple-darwin10 | FileCheck %s
; PR11468
define void @f(i64 %sz) uwtable {
diff --git a/llvm/test/CodeGen/X86/pr116153.ll b/llvm/test/CodeGen/X86/pr116153.ll
index b4e62a6ec20db..16bff6cb0a8bf 100644
--- a/llvm/test/CodeGen/X86/pr116153.ll
+++ b/llvm/test/CodeGen/X86/pr116153.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define void @_test_func(<16 x half> %0) #0 {
; CHECK-LABEL: _test_func:
diff --git a/llvm/test/CodeGen/X86/pr118934.ll b/llvm/test/CodeGen/X86/pr118934.ll
index b68ed2643d8df..746c2cdf513c5 100644
--- a/llvm/test/CodeGen/X86/pr118934.ll
+++ b/llvm/test/CodeGen/X86/pr118934.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define void @PR118934(i1 %b, ptr %f, ptr %k) {
; X86-LABEL: PR118934:
diff --git a/llvm/test/CodeGen/X86/pr119158.ll b/llvm/test/CodeGen/X86/pr119158.ll
index ca31df802c913..41579a4aaf6d0 100644
--- a/llvm/test/CodeGen/X86/pr119158.ll
+++ b/llvm/test/CodeGen/X86/pr119158.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define dso_local void @foo() #1 {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr11985.ll b/llvm/test/CodeGen/X86/pr11985.ll
index 32bee93fba88b..208fbe19c81e4 100644
--- a/llvm/test/CodeGen/X86/pr11985.ll
+++ b/llvm/test/CodeGen/X86/pr11985.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=nocona | FileCheck %s --check-prefix=PRESCOTT
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=nehalem | FileCheck %s --check-prefix=NEHALEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=nocona | FileCheck %s --check-prefix=PRESCOTT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=nehalem | FileCheck %s --check-prefix=NEHALEM
;;; TODO: (1) Some of the loads and stores are certainly unaligned and (2) the first load and first
;;; store overlap with the second load and second store respectively.
diff --git a/llvm/test/CodeGen/X86/pr11998.ll b/llvm/test/CodeGen/X86/pr11998.ll
index 4b93c20e7c236..d652b15f73551 100644
--- a/llvm/test/CodeGen/X86/pr11998.ll
+++ b/llvm/test/CodeGen/X86/pr11998.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=corei7-avx -mtriple=x86_64-- -mattr=+avx
+; RUN: llc -combiner-topological-sorting < %s -mcpu=corei7-avx -mtriple=x86_64-- -mattr=+avx
define void @autogen_51367_5000(i8, i1 %arg) {
BB:
diff --git a/llvm/test/CodeGen/X86/pr122580.ll b/llvm/test/CodeGen/X86/pr122580.ll
index 509729416cf57..b4fa68d5ccc93 100644
--- a/llvm/test/CodeGen/X86/pr122580.ll
+++ b/llvm/test/CodeGen/X86/pr122580.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s
@g_180 = external global i8
@g_1032 = external global [2 x i32]
diff --git a/llvm/test/CodeGen/X86/pr12360.ll b/llvm/test/CodeGen/X86/pr12360.ll
index 1ef11ebc9794e..7711bf05d3a1c 100644
--- a/llvm/test/CodeGen/X86/pr12360.ll
+++ b/llvm/test/CodeGen/X86/pr12360.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
define zeroext i1 @f1(ptr %x) {
; CHECK-LABEL: f1:
diff --git a/llvm/test/CodeGen/X86/pr124255.ll b/llvm/test/CodeGen/X86/pr124255.ll
index da502442baddb..508c16d338663 100644
--- a/llvm/test/CodeGen/X86/pr124255.ll
+++ b/llvm/test/CodeGen/X86/pr124255.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define <4 x i32> @insert_v2i32_in_v4i32_at_0(<4 x i32> %a, <2 x i32> %b) {
; CHECK-LABEL: insert_v2i32_in_v4i32_at_0:
diff --git a/llvm/test/CodeGen/X86/pr128143.ll b/llvm/test/CodeGen/X86/pr128143.ll
index 2517ad9ebcb6b..c7aff9d95283f 100644
--- a/llvm/test/CodeGen/X86/pr128143.ll
+++ b/llvm/test/CodeGen/X86/pr128143.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
@g_1 = external global i8
@g_2 = external global i8
diff --git a/llvm/test/CodeGen/X86/pr12889.ll b/llvm/test/CodeGen/X86/pr12889.ll
index 17500d3e91e85..5d6e6813a8682 100644
--- a/llvm/test/CodeGen/X86/pr12889.ll
+++ b/llvm/test/CodeGen/X86/pr12889.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "i686-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr131389.ll b/llvm/test/CodeGen/X86/pr131389.ll
index e1a538925b8cf..12b6fb86cdd89 100644
--- a/llvm/test/CodeGen/X86/pr131389.ll
+++ b/llvm/test/CodeGen/X86/pr131389.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -use-constant-fp-for-fixed-length-splat | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -use-constant-fp-for-fixed-length-splat | FileCheck %s
define void @PR131389(ptr %p) {
; CHECK-LABEL: PR131389:
diff --git a/llvm/test/CodeGen/X86/pr13209.ll b/llvm/test/CodeGen/X86/pr13209.ll
index 57cc0e80616a5..d8feb4b9575e9 100644
--- a/llvm/test/CodeGen/X86/pr13209.ll
+++ b/llvm/test/CodeGen/X86/pr13209.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s
; CHECK-LABEL: pr13209:
; CHECK-NOT: mov
diff --git a/llvm/test/CodeGen/X86/pr13220.ll b/llvm/test/CodeGen/X86/pr13220.ll
index d9e915a0974b6..cc5354c000fa3 100644
--- a/llvm/test/CodeGen/X86/pr13220.ll
+++ b/llvm/test/CodeGen/X86/pr13220.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-- < %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- < %s
; PR13220
define <8 x i32> @foo(<8 x i96> %x) {
diff --git a/llvm/test/CodeGen/X86/pr132844.ll b/llvm/test/CodeGen/X86/pr132844.ll
index dc9f006d93d12..10395007eb42c 100644
--- a/llvm/test/CodeGen/X86/pr132844.ll
+++ b/llvm/test/CodeGen/X86/pr132844.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s
define { ptr, i8 } @PR132844(<4 x ptr> %0, <4 x ptr> %1) {
; CHECK-LABEL: PR132844:
diff --git a/llvm/test/CodeGen/X86/pr13458.ll b/llvm/test/CodeGen/X86/pr13458.ll
index 2e337ccebeeb8..81bdcc36decf7 100644
--- a/llvm/test/CodeGen/X86/pr13458.ll
+++ b/llvm/test/CodeGen/X86/pr13458.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-darwin11.4.2"
diff --git a/llvm/test/CodeGen/X86/pr134607.ll b/llvm/test/CodeGen/X86/pr134607.ll
index 2b383fc964298..70101226d4c55 100644
--- a/llvm/test/CodeGen/X86/pr134607.ll
+++ b/llvm/test/CodeGen/X86/pr134607.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse -O3 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2,+sse -O3 | FileCheck %s --check-prefixes=X64-SSE1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2,+sse -O3 | FileCheck %s --check-prefixes=X64-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+sse -O3 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2,+sse -O3 | FileCheck %s --check-prefixes=X64-SSE1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2,+sse -O3 | FileCheck %s --check-prefixes=X64-SSE2
define void @store_v2f32_constant(ptr %v) {
; X86-LABEL: store_v2f32_constant:
diff --git a/llvm/test/CodeGen/X86/pr13577.ll b/llvm/test/CodeGen/X86/pr13577.ll
index 3b8a05ef30f81..6c4a35adc472d 100644
--- a/llvm/test/CodeGen/X86/pr13577.ll
+++ b/llvm/test/CodeGen/X86/pr13577.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-darwin | FileCheck %s
; CHECK-LABEL: LCPI0_0:
; CHECK-NEXT: .long 0xff800000
diff --git a/llvm/test/CodeGen/X86/pr135917.ll b/llvm/test/CodeGen/X86/pr135917.ll
index 2061e3e7cc395..8c43c76b9a55e 100644
--- a/llvm/test/CodeGen/X86/pr135917.ll
+++ b/llvm/test/CodeGen/X86/pr135917.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefix=AVX512
define i32 @PR135917(i1 %a0) {
; CHECK-LABEL: PR135917:
diff --git a/llvm/test/CodeGen/X86/pr13859.ll b/llvm/test/CodeGen/X86/pr13859.ll
index 35466478f289b..7629dfd5ad97d 100644
--- a/llvm/test/CodeGen/X86/pr13859.ll
+++ b/llvm/test/CodeGen/X86/pr13859.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32-S128"
target triple = "i386-apple-macosx10.7.0"
diff --git a/llvm/test/CodeGen/X86/pr138982.ll b/llvm/test/CodeGen/X86/pr138982.ll
index 32346d823a9fe..b11389b92bf7a 100644
--- a/llvm/test/CodeGen/X86/pr138982.ll
+++ b/llvm/test/CodeGen/X86/pr138982.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64 -mattr=+fma | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+fma | FileCheck %s
define <4 x float> @pr138982(<4 x float> %in_vec) {
; CHECK-LABEL: pr138982:
diff --git a/llvm/test/CodeGen/X86/pr13899.ll b/llvm/test/CodeGen/X86/pr13899.ll
index ba8119a1da0ae..87f12327e9f16 100644
--- a/llvm/test/CodeGen/X86/pr13899.ll
+++ b/llvm/test/CodeGen/X86/pr13899.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-pc-win32 -mcpu=corei7 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core-avx2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-win32 -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=core-avx2 | FileCheck %s --check-prefix=X64
; ModuleID = 'a.bc'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32"
diff --git a/llvm/test/CodeGen/X86/pr140491-sincos-lifetimes.ll b/llvm/test/CodeGen/X86/pr140491-sincos-lifetimes.ll
index 58dfd63641d5b..e25e0239cb23f 100644
--- a/llvm/test/CodeGen/X86/pr140491-sincos-lifetimes.ll
+++ b/llvm/test/CodeGen/X86/pr140491-sincos-lifetimes.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; This test is reduced from https://github.com/llvm/llvm-project/issues/140491.
; It checks that when `@llvm.sincos.f32` is expanded to a call to
diff --git a/llvm/test/CodeGen/X86/pr14088.ll b/llvm/test/CodeGen/X86/pr14088.ll
index 83bf13280f94a..79add9b9baeff 100644
--- a/llvm/test/CodeGen/X86/pr14088.ll
+++ b/llvm/test/CodeGen/X86/pr14088.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=core2 -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=core2 -verify-machineinstrs | FileCheck %s
; We were miscompiling this and using %ax instead of %cx in the movw
; in the following sequence:
diff --git a/llvm/test/CodeGen/X86/pr14098.ll b/llvm/test/CodeGen/X86/pr14098.ll
index 6ce2449ab6a63..7b34f0321ec90 100644
--- a/llvm/test/CodeGen/X86/pr14098.ll
+++ b/llvm/test/CodeGen/X86/pr14098.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple i386-unknown-linux-gnu -relocation-model=pic -verify-machineinstrs < %s
+; RUN: llc -combiner-topological-sorting -mtriple i386-unknown-linux-gnu -relocation-model=pic -verify-machineinstrs < %s
; We used to crash on this.
declare void @foo()
diff --git a/llvm/test/CodeGen/X86/pr14161.ll b/llvm/test/CodeGen/X86/pr14161.ll
index cdf3757e05b20..c0b8cd054afdb 100644
--- a/llvm/test/CodeGen/X86/pr14161.ll
+++ b/llvm/test/CodeGen/X86/pr14161.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux-pc -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-pc -mcpu=corei7 | FileCheck %s
declare <4 x i32> @llvm.umin.v4i32(<4 x i32>, <4 x i32>)
diff --git a/llvm/test/CodeGen/X86/pr14204.ll b/llvm/test/CodeGen/X86/pr14204.ll
index 65d5a7f51b424..08a03a9c8aa22 100644
--- a/llvm/test/CodeGen/X86/pr14204.ll
+++ b/llvm/test/CodeGen/X86/pr14204.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s
define <8 x i32> @foo(<8 x i1> %bar) nounwind readnone {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr142513.ll b/llvm/test/CodeGen/X86/pr142513.ll
index fe969104fcf5e..8dce8e85f72b5 100644
--- a/llvm/test/CodeGen/X86/pr142513.ll
+++ b/llvm/test/CodeGen/X86/pr142513.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
define i64 @foo(i64 %x) {
; X86-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr142937.ll b/llvm/test/CodeGen/X86/pr142937.ll
index 675bb9ea52189..bb959ae847ff9 100644
--- a/llvm/test/CodeGen/X86/pr142937.ll
+++ b/llvm/test/CodeGen/X86/pr142937.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: not llc %s -mtriple=i686-- -O0 -filetype=null 2>&1 | FileCheck %s
-; RUN: not llc %s -mtriple=x86_64-- -O0 -filetype=null 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting %s -mtriple=i686-- -O0 -filetype=null 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting %s -mtriple=x86_64-- -O0 -filetype=null 2>&1 | FileCheck %s
; CHECK: must be lowered by the LowerTypeTests pass
diff --git a/llvm/test/CodeGen/X86/pr14314.ll b/llvm/test/CodeGen/X86/pr14314.ll
index bb1608e3cd9b2..0504a0d638738 100644
--- a/llvm/test/CodeGen/X86/pr14314.ll
+++ b/llvm/test/CodeGen/X86/pr14314.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-pc-linux -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux -mcpu=corei7 | FileCheck %s
define i64 @atomicSub(ptr %a, i64 %b) nounwind {
; CHECK-LABEL: atomicSub:
diff --git a/llvm/test/CodeGen/X86/pr14333.ll b/llvm/test/CodeGen/X86/pr14333.ll
index ec8d17421de44..0cded5a13abc4 100644
--- a/llvm/test/CodeGen/X86/pr14333.ll
+++ b/llvm/test/CodeGen/X86/pr14333.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s
%foo = type { i64, i64 }
define void @bar(ptr %zed) {
store i64 0, ptr %zed, align 8
diff --git a/llvm/test/CodeGen/X86/pr14562.ll b/llvm/test/CodeGen/X86/pr14562.ll
index 8507e014f7599..9a419dc96036e 100644
--- a/llvm/test/CodeGen/X86/pr14562.ll
+++ b/llvm/test/CodeGen/X86/pr14562.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
@temp1 = global i64 -77129852189294865, align 8
diff --git a/llvm/test/CodeGen/X86/pr1462.ll b/llvm/test/CodeGen/X86/pr1462.ll
index 3aa18609d4690..721fb8f99c8f1 100644
--- a/llvm/test/CodeGen/X86/pr1462.ll
+++ b/llvm/test/CodeGen/X86/pr1462.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR1462
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
diff --git a/llvm/test/CodeGen/X86/pr147781.ll b/llvm/test/CodeGen/X86/pr147781.ll
index 9f65fd5984e7b..06b1dec0b043a 100644
--- a/llvm/test/CodeGen/X86/pr147781.ll
+++ b/llvm/test/CodeGen/X86/pr147781.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-windows-gnu -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-windows-gnu -verify-machineinstrs | FileCheck %s
; Ensure i64 !range data is stripped when converting to f64 load/store.
define void @test(ptr %p, ptr %p2) #0 {
diff --git a/llvm/test/CodeGen/X86/pr1489.ll b/llvm/test/CodeGen/X86/pr1489.ll
index c870f54798ceb..31fbaa9822255 100644
--- a/llvm/test/CodeGen/X86/pr1489.ll
+++ b/llvm/test/CodeGen/X86/pr1489.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -frame-pointer=all -O0 -mcpu=i486 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -frame-pointer=all -O0 -mcpu=i486 | FileCheck %s
;; magic constants are 3.999f and half of 3.999
; ModuleID = '1489.c'
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
diff --git a/llvm/test/CodeGen/X86/pr149841.ll b/llvm/test/CodeGen/X86/pr149841.ll
index c17a6172dee0c..cf41532e7e533 100644
--- a/llvm/test/CodeGen/X86/pr149841.ll
+++ b/llvm/test/CodeGen/X86/pr149841.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr1505.ll b/llvm/test/CodeGen/X86/pr1505.ll
index df7586f1aabf4..09cd5f89a004b 100644
--- a/llvm/test/CodeGen/X86/pr1505.ll
+++ b/llvm/test/CodeGen/X86/pr1505.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=i486 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=i486 | FileCheck %s
; PR1505
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
diff --git a/llvm/test/CodeGen/X86/pr1505b.ll b/llvm/test/CodeGen/X86/pr1505b.ll
index f547b548eba4a..994194b1fcfd9 100644
--- a/llvm/test/CodeGen/X86/pr1505b.ll
+++ b/llvm/test/CodeGen/X86/pr1505b.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=i486 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=i486 | FileCheck %s
; PR1505
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"
diff --git a/llvm/test/CodeGen/X86/pr152150.ll b/llvm/test/CodeGen/X86/pr152150.ll
index 6db3e555028cc..b6df3747c072a 100644
--- a/llvm/test/CodeGen/X86/pr152150.ll
+++ b/llvm/test/CodeGen/X86/pr152150.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown-eabi-elf | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown-eabi-elf | FileCheck %s
; CHECK-LABEL: conv2d
define dso_local void @conv2d() {
diff --git a/llvm/test/CodeGen/X86/pr15296.ll b/llvm/test/CodeGen/X86/pr15296.ll
index 726887e0a6b6d..0bc1310cc2011 100644
--- a/llvm/test/CodeGen/X86/pr15296.ll
+++ b/llvm/test/CodeGen/X86/pr15296.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-linux -mcpu=corei7-avx | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7-avx | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux -mcpu=corei7-avx | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=corei7-avx | FileCheck %s --check-prefixes=X64
define <8 x i32> @shiftInput___vyuunu(<8 x i32> %input, i32 %shiftval, <8 x i32> %__mask) nounwind {
; X86-LABEL: shiftInput___vyuunu:
diff --git a/llvm/test/CodeGen/X86/pr15309.ll b/llvm/test/CodeGen/X86/pr15309.ll
index da8f68ed637ae..f59cdf41adb25 100644
--- a/llvm/test/CodeGen/X86/pr15309.ll
+++ b/llvm/test/CodeGen/X86/pr15309.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux-pc | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-pc | FileCheck %s
define void @test_convert_float2_ulong2(ptr nocapture %src, ptr nocapture %dest) nounwind {
; CHECK-LABEL: test_convert_float2_ulong2:
diff --git a/llvm/test/CodeGen/X86/pr154492.ll b/llvm/test/CodeGen/X86/pr154492.ll
index 1ba17594976e1..b9f6293655c26 100644
--- a/llvm/test/CodeGen/X86/pr154492.ll
+++ b/llvm/test/CodeGen/X86/pr154492.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512VL
define <16 x i32> @PR154492() {
; AVX512F-LABEL: PR154492:
diff --git a/llvm/test/CodeGen/X86/pr156256.ll b/llvm/test/CodeGen/X86/pr156256.ll
index 13caa6fee5878..edcfef507d07c 100644
--- a/llvm/test/CodeGen/X86/pr156256.ll
+++ b/llvm/test/CodeGen/X86/pr156256.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefix=AVX512
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefix=AVX512VL
define <16 x i16> @PR156256(<16 x i32> %a, <16 x i32> %b) {
; AVX512-LABEL: PR156256:
diff --git a/llvm/test/CodeGen/X86/pr156817.ll b/llvm/test/CodeGen/X86/pr156817.ll
index 80972ecc5abb5..5bfdfd9381224 100644
--- a/llvm/test/CodeGen/X86/pr156817.ll
+++ b/llvm/test/CodeGen/X86/pr156817.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64 -mattr=+egpr | FileCheck %s --check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+egpr | FileCheck %s --check-prefix=EGPR
define coldcc i32 @foo() nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr15705.ll b/llvm/test/CodeGen/X86/pr15705.ll
index 2de9a34f9dcfd..147afc56b8eed 100644
--- a/llvm/test/CodeGen/X86/pr15705.ll
+++ b/llvm/test/CodeGen/X86/pr15705.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
define i32 @PR15705(i32 %x, i32 %a, i32 %b, i32 %c) #0 {
; X86-LABEL: PR15705:
diff --git a/llvm/test/CodeGen/X86/pr159723.ll b/llvm/test/CodeGen/X86/pr159723.ll
index c66b101fff990..606a6c4d768ef 100644
--- a/llvm/test/CodeGen/X86/pr159723.ll
+++ b/llvm/test/CodeGen/X86/pr159723.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl| FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl| FileCheck %s
declare <8 x half> @test_call_8()
diff --git a/llvm/test/CodeGen/X86/pr15981.ll b/llvm/test/CodeGen/X86/pr15981.ll
index 3debce8fd4b1a..5e87cc282974d 100644
--- a/llvm/test/CodeGen/X86/pr15981.ll
+++ b/llvm/test/CodeGen/X86/pr15981.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
@a = external dso_local global i32
@b = external dso_local global i32
diff --git a/llvm/test/CodeGen/X86/pr16031.ll b/llvm/test/CodeGen/X86/pr16031.ll
index db007837e839b..cc886f2ae7307 100644
--- a/llvm/test/CodeGen/X86/pr16031.ll
+++ b/llvm/test/CodeGen/X86/pr16031.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mcpu=corei7-avx -enable-misched=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mcpu=corei7-avx -enable-misched=false | FileCheck %s
define i64 @main(i1 %tobool1) nounwind {
; CHECK-LABEL: main:
diff --git a/llvm/test/CodeGen/X86/pr160612.ll b/llvm/test/CodeGen/X86/pr160612.ll
index 6572c421b7fe6..e70459b46667c 100644
--- a/llvm/test/CodeGen/X86/pr160612.ll
+++ b/llvm/test/CodeGen/X86/pr160612.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -O2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -O2 | FileCheck %s
; Test for issue #160612: OR conditions in branches should use multiple branches
; instead of materializing booleans with SETCC when no special optimizations apply.
diff --git a/llvm/test/CodeGen/X86/pr161693.ll b/llvm/test/CodeGen/X86/pr161693.ll
index de8188f483d24..5c800108d3d3e 100644
--- a/llvm/test/CodeGen/X86/pr161693.ll
+++ b/llvm/test/CodeGen/X86/pr161693.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define void @PR161693() #0 {
; CHECK-LABEL: PR161693:
diff --git a/llvm/test/CodeGen/X86/pr16360.ll b/llvm/test/CodeGen/X86/pr16360.ll
index 6511cf234debd..5aa84391d50a3 100644
--- a/llvm/test/CodeGen/X86/pr16360.ll
+++ b/llvm/test/CodeGen/X86/pr16360.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux | FileCheck %s
define i64 @foo(i32 %sum) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr165755.ll b/llvm/test/CodeGen/X86/pr165755.ll
index 3ab484f676c45..7d15add6a8cf3 100644
--- a/llvm/test/CodeGen/X86/pr165755.ll
+++ b/llvm/test/CodeGen/X86/pr165755.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
define i32 @PR165755(ptr %p0) {
; X86-LABEL: PR165755:
diff --git a/llvm/test/CodeGen/X86/pr166058.ll b/llvm/test/CodeGen/X86/pr166058.ll
index 42d68fd0fad12..0070799837f0a 100644
--- a/llvm/test/CodeGen/X86/pr166058.ll
+++ b/llvm/test/CodeGen/X86/pr166058.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
@out = global i32 0, align 4
define void @bar() {
diff --git a/llvm/test/CodeGen/X86/pr166534.ll b/llvm/test/CodeGen/X86/pr166534.ll
index 162a0c93bfcf4..bc469009429a1 100644
--- a/llvm/test/CodeGen/X86/pr166534.ll
+++ b/llvm/test/CodeGen/X86/pr166534.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE4
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
define void @pr166534(ptr %pa, ptr %pb, ptr %pc, ptr %pd) {
; SSE2-LABEL: pr166534:
diff --git a/llvm/test/CodeGen/X86/pr166744.ll b/llvm/test/CodeGen/X86/pr166744.ll
index 8ecdc064e4dfb..d73cc68873ba6 100644
--- a/llvm/test/CodeGen/X86/pr166744.ll
+++ b/llvm/test/CodeGen/X86/pr166744.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver2 | FileCheck %s --check-prefixes=POSTRA
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=haswell | FileCheck %s --check-prefixes=NOPOSTRA
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=NOPOSTRA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver2 | FileCheck %s --check-prefixes=POSTRA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=haswell | FileCheck %s --check-prefixes=NOPOSTRA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=NOPOSTRA
; Ensure reloads are after narrowed i512 -> i32 store
define i1 @PR166744(ptr %v, i64 %idx, i1 zeroext %b) {
diff --git a/llvm/test/CodeGen/X86/pr16807.ll b/llvm/test/CodeGen/X86/pr16807.ll
index 6d55d99a6ac44..642b0e06f2b70 100644
--- a/llvm/test/CodeGen/X86/pr16807.ll
+++ b/llvm/test/CodeGen/X86/pr16807.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mcpu=core-avx-i | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mcpu=core-avx-i | FileCheck %s
define <16 x i16> @f_fu(<16 x i16> %bf) {
allocas:
diff --git a/llvm/test/CodeGen/X86/pr168594.ll b/llvm/test/CodeGen/X86/pr168594.ll
index 76bb13223d49c..bfcca7d3f8783 100644
--- a/llvm/test/CodeGen/X86/pr168594.ll
+++ b/llvm/test/CodeGen/X86/pr168594.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX
define <8 x i16> @PR168594() {
; SSE-LABEL: PR168594:
diff --git a/llvm/test/CodeGen/X86/pr172046.ll b/llvm/test/CodeGen/X86/pr172046.ll
index 59493115201ae..5503af48dda97 100644
--- a/llvm/test/CodeGen/X86/pr172046.ll
+++ b/llvm/test/CodeGen/X86/pr172046.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
define i32 @shl_nuw_zext(i16 zeroext %x) {
; X86-LABEL: shl_nuw_zext:
diff --git a/llvm/test/CodeGen/X86/pr173794.ll b/llvm/test/CodeGen/X86/pr173794.ll
index 78e35b376ec09..d512f5c711b4b 100644
--- a/llvm/test/CodeGen/X86/pr173794.ll
+++ b/llvm/test/CodeGen/X86/pr173794.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefix=SSE42
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefix=SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefix=AVX512
define <2 x double> @PR173794(<2 x i64> %a0) {
; SSE2-LABEL: PR173794:
diff --git a/llvm/test/CodeGen/X86/pr174871.ll b/llvm/test/CodeGen/X86/pr174871.ll
index 9d671a9a1b8d2..7b04acb1a6e59 100644
--- a/llvm/test/CodeGen/X86/pr174871.ll
+++ b/llvm/test/CodeGen/X86/pr174871.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s
define <16 x i32> @pr174871(<16 x i32> %a, <16 x i1> %__mask) local_unnamed_addr {
; CHECK-LABEL: pr174871:
diff --git a/llvm/test/CodeGen/X86/pr17546.ll b/llvm/test/CodeGen/X86/pr17546.ll
index 174fa5ca3fcfb..15a16854ee059 100644
--- a/llvm/test/CodeGen/X86/pr17546.ll
+++ b/llvm/test/CodeGen/X86/pr17546.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mcpu=core-avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mcpu=core-avx2 | FileCheck %s
define i32 @f_f___un_3C_unf_3E_un_3C_unf_3E_(<8 x i32> %__mask, i64 %BBBB) {
%QQQ = trunc i64 %BBBB to i32
diff --git a/llvm/test/CodeGen/X86/pr17631.ll b/llvm/test/CodeGen/X86/pr17631.ll
index b069afbb80625..a07ddc73274f4 100644
--- a/llvm/test/CodeGen/X86/pr17631.ll
+++ b/llvm/test/CodeGen/X86/pr17631.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=core-avx-i -mtriple=i386-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core-avx-i -mtriple=i386-pc-win32 | FileCheck %s
%struct_type = type { [64 x <8 x float>], <8 x float> }
diff --git a/llvm/test/CodeGen/X86/pr17764.ll b/llvm/test/CodeGen/X86/pr17764.ll
index a262fc20b5425..9a44b13168e21 100644
--- a/llvm/test/CodeGen/X86/pr17764.ll
+++ b/llvm/test/CodeGen/X86/pr17764.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s
define <16 x i16> @foo(<16 x i1> %mask, <16 x i16> %x, <16 x i16> %y) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr178410.ll b/llvm/test/CodeGen/X86/pr178410.ll
index 09be5428001e6..35a1f07051f4e 100644
--- a/llvm/test/CodeGen/X86/pr178410.ll
+++ b/llvm/test/CodeGen/X86/pr178410.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX
define float @PR178410(ptr %p0) nounwind {
; X86-LABEL: PR178410:
diff --git a/llvm/test/CodeGen/X86/pr179100.ll b/llvm/test/CodeGen/X86/pr179100.ll
index 4ab71604db5b6..42f765ad1c274 100644
--- a/llvm/test/CodeGen/X86/pr179100.ll
+++ b/llvm/test/CodeGen/X86/pr179100.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc --fast-isel -mcpu=znver5 < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting --fast-isel -mcpu=znver5 < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define fastcc i16 @test() nounwind {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/pr18014.ll b/llvm/test/CodeGen/X86/pr18014.ll
index c3451f3cc7b69..2503e0cbb3f1f 100644
--- a/llvm/test/CodeGen/X86/pr18014.ll
+++ b/llvm/test/CodeGen/X86/pr18014.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s
; Ensure PSRAD is generated as the condition is consumed by both PADD and
; BLENDVPS. PADD requires all bits setting properly.
diff --git a/llvm/test/CodeGen/X86/pr18054.ll b/llvm/test/CodeGen/X86/pr18054.ll
index 4cf6e885d2d7d..bd55169c5fd0d 100644
--- a/llvm/test/CodeGen/X86/pr18054.ll
+++ b/llvm/test/CodeGen/X86/pr18054.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=penryn | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=penryn | FileCheck %s
define void @foo(ptr %p, <16 x i1> %x) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr18162.ll b/llvm/test/CodeGen/X86/pr18162.ll
index 1b7027a2c0ec7..045f90d781e87 100644
--- a/llvm/test/CodeGen/X86/pr18162.ll
+++ b/llvm/test/CodeGen/X86/pr18162.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; Make sure we are not crashing on this one.
diff --git a/llvm/test/CodeGen/X86/pr18344.ll b/llvm/test/CodeGen/X86/pr18344.ll
index 75a55e6a4bf5e..32d45cd302a6f 100644
--- a/llvm/test/CodeGen/X86/pr18344.ll
+++ b/llvm/test/CodeGen/X86/pr18344.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
%v4_varying_complex = type { <4 x float>, <4 x float> }
diff --git a/llvm/test/CodeGen/X86/pr18846.ll b/llvm/test/CodeGen/X86/pr18846.ll
index 4239f46feba0f..bfa108a61ec56 100644
--- a/llvm/test/CodeGen/X86/pr18846.ll
+++ b/llvm/test/CodeGen/X86/pr18846.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O3 -disable-peephole -mcpu=corei7-avx -mattr=+avx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mcpu=corei7-avx -mattr=+avx < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/pr19049.ll b/llvm/test/CodeGen/X86/pr19049.ll
index 027c9815e0c78..09949940a4c67 100644
--- a/llvm/test/CodeGen/X86/pr19049.ll
+++ b/llvm/test/CodeGen/X86/pr19049.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-pc-linux %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-linux %s -o - | FileCheck %s
module asm ".pushsection foo"
module asm ".popsection"
diff --git a/llvm/test/CodeGen/X86/pr20011.ll b/llvm/test/CodeGen/X86/pr20011.ll
index 4810226b4a756..df7b5f69c6900 100644
--- a/llvm/test/CodeGen/X86/pr20011.ll
+++ b/llvm/test/CodeGen/X86/pr20011.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64
%destTy = type { i2, i2 }
diff --git a/llvm/test/CodeGen/X86/pr20012.ll b/llvm/test/CodeGen/X86/pr20012.ll
index 01e0cbebd3a4f..97c238b79bd2f 100644
--- a/llvm/test/CodeGen/X86/pr20012.ll
+++ b/llvm/test/CodeGen/X86/pr20012.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64
define void @test () {
; X86-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/pr20020.ll b/llvm/test/CodeGen/X86/pr20020.ll
index 9cd9df0ed3ceb..b28eea4d3a5db 100644
--- a/llvm/test/CodeGen/X86/pr20020.ll
+++ b/llvm/test/CodeGen/X86/pr20020.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-macosx -disable-lsr -post-RA-scheduler=1 -break-anti-dependencies=critical | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx -disable-lsr -post-RA-scheduler=1 -break-anti-dependencies=critical | FileCheck %s
; In PR20020, the critical anti-dependency breaker algorithm mistakenly
; changes the register operands of an 'xorl %eax, %eax' to 'xorl %ecx, %ecx'
diff --git a/llvm/test/CodeGen/X86/pr20088.ll b/llvm/test/CodeGen/X86/pr20088.ll
index 75d1959a5af44..2d2a82e424a63 100644
--- a/llvm/test/CodeGen/X86/pr20088.ll
+++ b/llvm/test/CodeGen/X86/pr20088.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s
declare <16 x i8> @llvm.x86.sse41.pblendvb(<16 x i8>, <16 x i8>, <16 x i8>)
diff --git a/llvm/test/CodeGen/X86/pr21099.ll b/llvm/test/CodeGen/X86/pr21099.ll
index 7857e0b2061a0..d502241e78b0a 100644
--- a/llvm/test/CodeGen/X86/pr21099.ll
+++ b/llvm/test/CodeGen/X86/pr21099.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O2 -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O2 -mtriple=x86_64-- -verify-machineinstrs | FileCheck %s
define void @pr21099(ptr %p) {
; CHECK-LABEL: pr21099
diff --git a/llvm/test/CodeGen/X86/pr2177.ll b/llvm/test/CodeGen/X86/pr2177.ll
index fa175cb4bb52e..d87bd9cc6632d 100644
--- a/llvm/test/CodeGen/X86/pr2177.ll
+++ b/llvm/test/CodeGen/X86/pr2177.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR2177
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/pr21792.ll b/llvm/test/CodeGen/X86/pr21792.ll
index af6a616fda3c5..df1648c4a53fc 100644
--- a/llvm/test/CodeGen/X86/pr21792.ll
+++ b/llvm/test/CodeGen/X86/pr21792.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=corei7 | FileCheck %s
; This fixes a missing cases in the MI scheduler's constrainLocalCopy exposed by
; PR21792
diff --git a/llvm/test/CodeGen/X86/pr2182.ll b/llvm/test/CodeGen/X86/pr2182.ll
index 28b10e98df08b..30e02881e00c1 100644
--- a/llvm/test/CodeGen/X86/pr2182.ll
+++ b/llvm/test/CodeGen/X86/pr2182.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; PR2182
target datalayout =
diff --git a/llvm/test/CodeGen/X86/pr22019.ll b/llvm/test/CodeGen/X86/pr22019.ll
index 262ee5fad7375..0c19adbf80c72 100644
--- a/llvm/test/CodeGen/X86/pr22019.ll
+++ b/llvm/test/CodeGen/X86/pr22019.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr22103.ll b/llvm/test/CodeGen/X86/pr22103.ll
index 26c9996d3a9c2..f792b6dba31b3 100644
--- a/llvm/test/CodeGen/X86/pr22103.ll
+++ b/llvm/test/CodeGen/X86/pr22103.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Don't try to emit a direct call through a TLS global.
; This fixes PR22103
diff --git a/llvm/test/CodeGen/X86/pr22473.ll b/llvm/test/CodeGen/X86/pr22473.ll
index 78f5ad8909640..e356ecefff174 100644
--- a/llvm/test/CodeGen/X86/pr22473.ll
+++ b/llvm/test/CodeGen/X86/pr22473.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
define zeroext i1 @PR22473(ptr, i8) {
; X86-LABEL: PR22473:
diff --git a/llvm/test/CodeGen/X86/pr22774.ll b/llvm/test/CodeGen/X86/pr22774.ll
index 5bdccde60b10e..8fc57006c030d 100644
--- a/llvm/test/CodeGen/X86/pr22774.ll
+++ b/llvm/test/CodeGen/X86/pr22774.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -mattr=+avx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -mattr=+avx < %s | FileCheck %s
@in = dso_local global <4 x i64> <i64 -1, i64 -1, i64 -1, i64 -1>, align 32
@out = dso_local global <2 x i64> zeroinitializer, align 16
diff --git a/llvm/test/CodeGen/X86/pr22970.ll b/llvm/test/CodeGen/X86/pr22970.ll
index 28aea0f2af58c..d2efebd4d19f1 100644
--- a/llvm/test/CodeGen/X86/pr22970.ll
+++ b/llvm/test/CodeGen/X86/pr22970.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
define i32 @PR22970_i32(ptr nocapture readonly, i32) {
; X86-LABEL: PR22970_i32:
diff --git a/llvm/test/CodeGen/X86/pr23103.ll b/llvm/test/CodeGen/X86/pr23103.ll
index 2142ae8657aeb..22fad371fc84c 100644
--- a/llvm/test/CodeGen/X86/pr23103.ll
+++ b/llvm/test/CodeGen/X86/pr23103.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mcpu=generic -mattr=+avx < %s | FileCheck %s
; When commuting a VADDSDrr instruction, verify that the 'IsUndef' flag is
; correctly propagated to the operands of the resulting instruction.
diff --git a/llvm/test/CodeGen/X86/pr23246.ll b/llvm/test/CodeGen/X86/pr23246.ll
index da3246a917ea3..03cb392566531 100644
--- a/llvm/test/CodeGen/X86/pr23246.ll
+++ b/llvm/test/CodeGen/X86/pr23246.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple x86_64-unknown-unknown -mattr=mmx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-unknown-unknown -mattr=mmx | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/pr2326.ll b/llvm/test/CodeGen/X86/pr2326.ll
index c53eed31603af..077cc108c3b2b 100644
--- a/llvm/test/CodeGen/X86/pr2326.ll
+++ b/llvm/test/CodeGen/X86/pr2326.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; PR2326
define i32 @func_59(i32 %p_60) nounwind {
diff --git a/llvm/test/CodeGen/X86/pr23273.ll b/llvm/test/CodeGen/X86/pr23273.ll
index f28c2a75b6995..7a675f897ada1 100644
--- a/llvm/test/CodeGen/X86/pr23273.ll
+++ b/llvm/test/CodeGen/X86/pr23273.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i386-unknown-unknown -mcpu=generic -mattr=-sse2 -fast-isel < %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-unknown -mcpu=generic -mattr=-sse2 -fast-isel < %s
; Verify that the backend doesn't crash during fast-isel with an assertion
; failure when selecting a int-to-double conversion. The fast selection routine
diff --git a/llvm/test/CodeGen/X86/pr23603.ll b/llvm/test/CodeGen/X86/pr23603.ll
index 22440c890ba1d..544d4fecdfa71 100644
--- a/llvm/test/CodeGen/X86/pr23603.ll
+++ b/llvm/test/CodeGen/X86/pr23603.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
declare void @free_v()
diff --git a/llvm/test/CodeGen/X86/pr23664.ll b/llvm/test/CodeGen/X86/pr23664.ll
index 8179602b8c2a8..2d8f7ccd0191c 100644
--- a/llvm/test/CodeGen/X86/pr23664.ll
+++ b/llvm/test/CodeGen/X86/pr23664.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s | FileCheck %s
define i2 @f(i32 %arg) {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/pr24139.ll b/llvm/test/CodeGen/X86/pr24139.ll
index ec56345ba6483..ff1d6f238676a 100644
--- a/llvm/test/CodeGen/X86/pr24139.ll
+++ b/llvm/test/CodeGen/X86/pr24139.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
; Check that we do not get excessive spilling from splitting of constant live ranges.
diff --git a/llvm/test/CodeGen/X86/pr24374.ll b/llvm/test/CodeGen/X86/pr24374.ll
index 06281b5f7f53e..93a8fe17263cc 100644
--- a/llvm/test/CodeGen/X86/pr24374.ll
+++ b/llvm/test/CodeGen/X86/pr24374.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-w64-windows-gnu"
diff --git a/llvm/test/CodeGen/X86/pr24602.ll b/llvm/test/CodeGen/X86/pr24602.ll
index 30aeb593f72b9..24a665a158c2d 100644
--- a/llvm/test/CodeGen/X86/pr24602.ll
+++ b/llvm/test/CodeGen/X86/pr24602.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; PR24602: Make sure we don't barf on non-foldable code (with opaque constants).
diff --git a/llvm/test/CodeGen/X86/pr25725.ll b/llvm/test/CodeGen/X86/pr25725.ll
index 1b164139cc460..fb10b96e78b24 100644
--- a/llvm/test/CodeGen/X86/pr25725.ll
+++ b/llvm/test/CodeGen/X86/pr25725.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i386-pc-linux | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux | FileCheck %s --check-prefix=X86
%struct.s = type { [100 x i32] }
diff --git a/llvm/test/CodeGen/X86/pr25828.ll b/llvm/test/CodeGen/X86/pr25828.ll
index 8fbabc7d0c6d1..1169643d74db1 100644
--- a/llvm/test/CodeGen/X86/pr25828.ll
+++ b/llvm/test/CodeGen/X86/pr25828.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-windows-msvc -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-windows-msvc -relocation-model=pic | FileCheck %s
; MOVPC32r should not generate CFI under windows
; CHECK-LABEL: _foo:
diff --git a/llvm/test/CodeGen/X86/pr2585.ll b/llvm/test/CodeGen/X86/pr2585.ll
index 6706051e0508d..790524a2ec8b2 100644
--- a/llvm/test/CodeGen/X86/pr2585.ll
+++ b/llvm/test/CodeGen/X86/pr2585.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
@0 = external dso_local constant <4 x i32> ; <ptr>:0 [#uses=1]
@1 = external dso_local constant <4 x i16> ; <ptr>:1 [#uses=1]
diff --git a/llvm/test/CodeGen/X86/pr26350.ll b/llvm/test/CodeGen/X86/pr26350.ll
index ae9ef0daed8aa..75173d4645a02 100644
--- a/llvm/test/CodeGen/X86/pr26350.ll
+++ b/llvm/test/CodeGen/X86/pr26350.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -disable-constant-hoisting < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -disable-constant-hoisting < %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i386-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr2656.ll b/llvm/test/CodeGen/X86/pr2656.ll
index d3f153be19293..d75eb8ee5ff99 100644
--- a/llvm/test/CodeGen/X86/pr2656.ll
+++ b/llvm/test/CodeGen/X86/pr2656.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sse2 | FileCheck %s
; PR2656
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/pr2659.ll b/llvm/test/CodeGen/X86/pr2659.ll
index 05acbc8e90101..a28d14754c62d 100644
--- a/llvm/test/CodeGen/X86/pr2659.ll
+++ b/llvm/test/CodeGen/X86/pr2659.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin9.4.0 -disable-branch-fold | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin9.4.0 -disable-branch-fold | FileCheck %s
; PR2659
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/pr26625.ll b/llvm/test/CodeGen/X86/pr26625.ll
index 1b2e227bb59a8..9ac5107fd0c7c 100644
--- a/llvm/test/CodeGen/X86/pr26625.ll
+++ b/llvm/test/CodeGen/X86/pr26625.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=i686 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=i686 2>&1 | FileCheck %s
; PR26625
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
diff --git a/llvm/test/CodeGen/X86/pr26652.ll b/llvm/test/CodeGen/X86/pr26652.ll
index 81a2657fc4a79..6005486e9ebdd 100644
--- a/llvm/test/CodeGen/X86/pr26652.ll
+++ b/llvm/test/CodeGen/X86/pr26652.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR26652
define <2 x i32> @test(<4 x i32> %a, <4 x i32> %b) {
diff --git a/llvm/test/CodeGen/X86/pr26757.ll b/llvm/test/CodeGen/X86/pr26757.ll
index a7abeb5bce253..66c90fb51123c 100644
--- a/llvm/test/CodeGen/X86/pr26757.ll
+++ b/llvm/test/CodeGen/X86/pr26757.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i386-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/pr26835.ll b/llvm/test/CodeGen/X86/pr26835.ll
index 4fc73b8857575..96e93ed9fc4c4 100644
--- a/llvm/test/CodeGen/X86/pr26835.ll
+++ b/llvm/test/CodeGen/X86/pr26835.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux"
diff --git a/llvm/test/CodeGen/X86/pr26870.ll b/llvm/test/CodeGen/X86/pr26870.ll
index 303696544d23a..63335b1749398 100644
--- a/llvm/test/CodeGen/X86/pr26870.ll
+++ b/llvm/test/CodeGen/X86/pr26870.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-windows-msvc18.0.0 -mcpu=pentium4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-windows-msvc18.0.0 -mcpu=pentium4
define x86_thiscallcc ptr @fn4(ptr %this, ptr dereferenceable(1) %p1) {
entry:
diff --git a/llvm/test/CodeGen/X86/pr27071.ll b/llvm/test/CodeGen/X86/pr27071.ll
index a7bac0ae7a0b6..c96ef9be2924e 100644
--- a/llvm/test/CodeGen/X86/pr27071.ll
+++ b/llvm/test/CodeGen/X86/pr27071.ll
@@ -1,4 +1,4 @@
-; RUN: llc -relocation-model pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -relocation-model pic < %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i386-unknown-freebsd"
diff --git a/llvm/test/CodeGen/X86/pr27202.ll b/llvm/test/CodeGen/X86/pr27202.ll
index 3bd3be62fb4c8..514f91fd1c564 100644
--- a/llvm/test/CodeGen/X86/pr27202.ll
+++ b/llvm/test/CodeGen/X86/pr27202.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i1 @foo(i32 %i) optsize {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr27501.ll b/llvm/test/CodeGen/X86/pr27501.ll
index dbe9e9dc6882c..2478324cd3473 100644
--- a/llvm/test/CodeGen/X86/pr27501.ll
+++ b/llvm/test/CodeGen/X86/pr27501.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/pr27591.ll b/llvm/test/CodeGen/X86/pr27591.ll
index 4f83c986d826b..9aa8a5e5c26ef 100644
--- a/llvm/test/CodeGen/X86/pr27591.ll
+++ b/llvm/test/CodeGen/X86/pr27591.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -o - -O0 < %s | FileCheck %s
-; RUN: llc -mattr=+zu -o - -O0 < %s | FileCheck %s -check-prefix=SETZUCC
-; RUN: llc -mattr=+zu,+prefer-legacy-setcc -o - -O0 < %s | FileCheck %s -check-prefix=NO-SETZUCC
+; RUN: llc -combiner-topological-sorting -o - -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mattr=+zu -o - -O0 < %s | FileCheck %s -check-prefix=SETZUCC
+; RUN: llc -combiner-topological-sorting -mattr=+zu,+prefer-legacy-setcc -o - -O0 < %s | FileCheck %s -check-prefix=NO-SETZUCC
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr28129.ll b/llvm/test/CodeGen/X86/pr28129.ll
index f86c439ef040a..a4ae85d663eec 100644
--- a/llvm/test/CodeGen/X86/pr28129.ll
+++ b/llvm/test/CodeGen/X86/pr28129.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=X64
define <4 x double> @cmp4f64_domain(<4 x double> %a) {
; X86-LABEL: cmp4f64_domain:
diff --git a/llvm/test/CodeGen/X86/pr28173.ll b/llvm/test/CodeGen/X86/pr28173.ll
index cf4969fa7dae0..0fa41acc29fbb 100644
--- a/llvm/test/CodeGen/X86/pr28173.ll
+++ b/llvm/test/CodeGen/X86/pr28173.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=+avx512f | FileCheck %s
-; RUN: llc < %s -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr28444.ll b/llvm/test/CodeGen/X86/pr28444.ll
index 2e8824f0daca9..a5b30d9b83398 100644
--- a/llvm/test/CodeGen/X86/pr28444.ll
+++ b/llvm/test/CodeGen/X86/pr28444.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 < %s | FileCheck %s
; https://llvm.org/bugs/show_bug.cgi?id=28444
; extract_vector_elt is allowed to have a different result type than
diff --git a/llvm/test/CodeGen/X86/pr2849.ll b/llvm/test/CodeGen/X86/pr2849.ll
index 91b1444a70e2f..4ca656ce889fe 100644
--- a/llvm/test/CodeGen/X86/pr2849.ll
+++ b/llvm/test/CodeGen/X86/pr2849.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR2849
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/pr28515.ll b/llvm/test/CodeGen/X86/pr28515.ll
index bbd80db528b97..696c11d302b4f 100644
--- a/llvm/test/CodeGen/X86/pr28515.ll
+++ b/llvm/test/CodeGen/X86/pr28515.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s
@0 = private constant [8 x i32] zeroinitializer
diff --git a/llvm/test/CodeGen/X86/pr28560.ll b/llvm/test/CodeGen/X86/pr28560.ll
index 4c3b04b82318f..25559eeff70d4 100644
--- a/llvm/test/CodeGen/X86/pr28560.ll
+++ b/llvm/test/CodeGen/X86/pr28560.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-pc-linux -print-after=postrapseudos < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-pc-linux -print-after=postrapseudos < %s 2>&1 | FileCheck %s
; CHECK: MOV8rr ${{[a-d]}}l, implicit $e[[R:[a-d]]]x, implicit-def $e[[R]]x
define i32 @foo(i32 %i, i32 %k, ptr %p) {
diff --git a/llvm/test/CodeGen/X86/pr28824.ll b/llvm/test/CodeGen/X86/pr28824.ll
index 274689527a243..4fed8dad087ad 100644
--- a/llvm/test/CodeGen/X86/pr28824.ll
+++ b/llvm/test/CodeGen/X86/pr28824.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
@d = global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/pr29010.ll b/llvm/test/CodeGen/X86/pr29010.ll
index 070635ba44943..3337b9bb2fb97 100644
--- a/llvm/test/CodeGen/X86/pr29010.ll
+++ b/llvm/test/CodeGen/X86/pr29010.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-linux -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux -mattr=+avx | FileCheck %s
; In i386 there are only 8 XMMs (xmm0-xmm7), make sure we are not creating illegal XMM
define float @only_xmm0_7(i32 %arg) {
diff --git a/llvm/test/CodeGen/X86/pr29022.ll b/llvm/test/CodeGen/X86/pr29022.ll
index 5efdf28aadce4..bf82bf111c90a 100644
--- a/llvm/test/CodeGen/X86/pr29022.ll
+++ b/llvm/test/CodeGen/X86/pr29022.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mcpu=skx -mtriple x86_64-unknown-linux-gnu -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mcpu=skx -mtriple=x86_64-linux-gnux32 -verify-machineinstrs | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mcpu=skx -mtriple x86_64-unknown-linux-gnu -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=skx -mtriple=x86_64-linux-gnux32 -verify-machineinstrs | FileCheck %s --check-prefix=X32
define i32 @A() {
; CHECK: movq %rsp, %rdi
diff --git a/llvm/test/CodeGen/X86/pr29061.ll b/llvm/test/CodeGen/X86/pr29061.ll
index 3b5b4e6621eb9..a6a2ff266a4ee 100644
--- a/llvm/test/CodeGen/X86/pr29061.ll
+++ b/llvm/test/CodeGen/X86/pr29061.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple i386-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple i386-unknown-linux-gnu < %s | FileCheck %s
; Previously, a reference to SIL/DIL was being emitted
; but those aren't available unless on a 64bit mode
diff --git a/llvm/test/CodeGen/X86/pr29112.ll b/llvm/test/CodeGen/X86/pr29112.ll
index 2e5c6f047292c..95a84188f2d5f 100644
--- a/llvm/test/CodeGen/X86/pr29112.ll
+++ b/llvm/test/CodeGen/X86/pr29112.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s
declare <4 x float> @foo(<4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>, <4 x float>)
diff --git a/llvm/test/CodeGen/X86/pr29170.ll b/llvm/test/CodeGen/X86/pr29170.ll
index a27238a8e4f18..7fbb7abb9eca0 100644
--- a/llvm/test/CodeGen/X86/pr29170.ll
+++ b/llvm/test/CodeGen/X86/pr29170.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i386-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr2924.ll b/llvm/test/CodeGen/X86/pr2924.ll
index ce186fb73a443..63754e6b63ffe 100644
--- a/llvm/test/CodeGen/X86/pr2924.ll
+++ b/llvm/test/CodeGen/X86/pr2924.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR2924
target datalayout =
diff --git a/llvm/test/CodeGen/X86/pr2982.ll b/llvm/test/CodeGen/X86/pr2982.ll
index e61d6ea10320f..021b1c442579a 100644
--- a/llvm/test/CodeGen/X86/pr2982.ll
+++ b/llvm/test/CodeGen/X86/pr2982.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR2982
target datalayout =
diff --git a/llvm/test/CodeGen/X86/pr30284.ll b/llvm/test/CodeGen/X86/pr30284.ll
index 708f0f7ee72da..3fca8a335f4f7 100644
--- a/llvm/test/CodeGen/X86/pr30284.ll
+++ b/llvm/test/CodeGen/X86/pr30284.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=avx512dq | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=avx512dq | FileCheck %s
define void @undef_cond() {
; CHECK-LABEL: undef_cond:
diff --git a/llvm/test/CodeGen/X86/pr30290.ll b/llvm/test/CodeGen/X86/pr30290.ll
index 1cf0947e03ec6..02d1e71123d27 100644
--- a/llvm/test/CodeGen/X86/pr30290.ll
+++ b/llvm/test/CodeGen/X86/pr30290.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mcpu=btver2 %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=btver2 %s -o - | FileCheck %s
; Test desc: two functions (foo, bar) with byval arguments, should not have
; reads/writes from/to byval storage re-ordered.
; When broken, five "1" constants are written into the byval %struct.face,
diff --git a/llvm/test/CodeGen/X86/pr30430.ll b/llvm/test/CodeGen/X86/pr30430.ll
index d763cb62de472..a4cace9ca0580 100644
--- a/llvm/test/CodeGen/X86/pr30430.ll
+++ b/llvm/test/CodeGen/X86/pr30430.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f -O0 | FileCheck %s
define <16 x float> @makefloat(float %f1, float %f2, float %f3, float %f4, float %f5, float %f6, float %f7, float %f8, float %f9, float %f10, float %f11, float %f12, float %f13, float %f14, float %f15, float %f16) #0 {
; CHECK-LABEL: makefloat:
diff --git a/llvm/test/CodeGen/X86/pr30511.ll b/llvm/test/CodeGen/X86/pr30511.ll
index 088f3bfef8542..ba7e06346af50 100644
--- a/llvm/test/CodeGen/X86/pr30511.ll
+++ b/llvm/test/CodeGen/X86/pr30511.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr30562.ll b/llvm/test/CodeGen/X86/pr30562.ll
index e05a8672b1f81..3b6ec4d6156bf 100644
--- a/llvm/test/CodeGen/X86/pr30562.ll
+++ b/llvm/test/CodeGen/X86/pr30562.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i32 @foo(ptr nocapture %perm, i32 %n) {
diff --git a/llvm/test/CodeGen/X86/pr30813.ll b/llvm/test/CodeGen/X86/pr30813.ll
index 87c751e74b07d..659b9f527e037 100644
--- a/llvm/test/CodeGen/X86/pr30813.ll
+++ b/llvm/test/CodeGen/X86/pr30813.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux-gnu -O0 %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -O0 %s -o - | FileCheck %s
; CHECK: patatino:
; CHECK: .cfi_startproc
; CHECK: movzwl (%rax), [[REG0:%e[abcd]x]]
diff --git a/llvm/test/CodeGen/X86/pr31088.ll b/llvm/test/CodeGen/X86/pr31088.ll
index 5ecb67ba7ffa6..ed951172ba017 100644
--- a/llvm/test/CodeGen/X86/pr31088.ll
+++ b/llvm/test/CodeGen/X86/pr31088.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c | FileCheck %s --check-prefix=F16C
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c -O0 | FileCheck %s --check-prefix=F16C-O0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c | FileCheck %s --check-prefix=F16C
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+f16c -O0 | FileCheck %s --check-prefix=F16C-O0
define <1 x half> @ir_fadd_v1f16(<1 x half> %arg0, <1 x half> %arg1) nounwind {
; X86-LABEL: ir_fadd_v1f16:
diff --git a/llvm/test/CodeGen/X86/pr31143.ll b/llvm/test/CodeGen/X86/pr31143.ll
index a179179b40d26..b6f7501f393ae 100644
--- a/llvm/test/CodeGen/X86/pr31143.ll
+++ b/llvm/test/CodeGen/X86/pr31143.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -mattr=+sse4.2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -mattr=+sse4.2 < %s | FileCheck %s
; CHECK-LABEL: testss:
; CHECK: movss {{.*}}, %[[XMM0:xmm[0-9]+]]
diff --git a/llvm/test/CodeGen/X86/pr31242.ll b/llvm/test/CodeGen/X86/pr31242.ll
index 273ae76056c24..13ba7739d9060 100644
--- a/llvm/test/CodeGen/X86/pr31242.ll
+++ b/llvm/test/CodeGen/X86/pr31242.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
declare void @raf(i32, ...)
diff --git a/llvm/test/CodeGen/X86/pr31271.ll b/llvm/test/CodeGen/X86/pr31271.ll
index 0ac1943a428ef..edc6cb918b0e5 100644
--- a/llvm/test/CodeGen/X86/pr31271.ll
+++ b/llvm/test/CodeGen/X86/pr31271.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-linux-gnu < %s | FileCheck %s
@c = external dso_local global [1 x i32], align 4
diff --git a/llvm/test/CodeGen/X86/pr31323.ll b/llvm/test/CodeGen/X86/pr31323.ll
index e0e1dbe726db2..1aae5a5fbd252 100644
--- a/llvm/test/CodeGen/X86/pr31323.ll
+++ b/llvm/test/CodeGen/X86/pr31323.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
; Reduced test case.
diff --git a/llvm/test/CodeGen/X86/pr3154.ll b/llvm/test/CodeGen/X86/pr3154.ll
index ea0dba83af258..190608c017e1f 100644
--- a/llvm/test/CodeGen/X86/pr3154.ll
+++ b/llvm/test/CodeGen/X86/pr3154.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mattr=+sse2
-; RUN: llc < %s -mtriple=i386-pc-linux-gnu -mattr=+sse2 -relocation-model=pic -frame-pointer=all
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux-gnu -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux-gnu -mattr=+sse2 -relocation-model=pic -frame-pointer=all
; PR3154
define void @ff_flac_compute_autocorr_sse2(ptr %data, i32 %len, i32 %lag, ptr %autoc) nounwind {
diff --git a/llvm/test/CodeGen/X86/pr31593.ll b/llvm/test/CodeGen/X86/pr31593.ll
index 0a1ed958de7a3..51424b8671ca0 100644
--- a/llvm/test/CodeGen/X86/pr31593.ll
+++ b/llvm/test/CodeGen/X86/pr31593.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=sse4.1 -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=sse4.1 -o /dev/null
; Testcase for PR31593.
; Revision r291120 introduced a regression and this test started failing
diff --git a/llvm/test/CodeGen/X86/pr31773.ll b/llvm/test/CodeGen/X86/pr31773.ll
index 68f9e96ce6e6a..38b2f6cad03fe 100644
--- a/llvm/test/CodeGen/X86/pr31773.ll
+++ b/llvm/test/CodeGen/X86/pr31773.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512
; This matter of this test is ensuring that vpackus* is not used for umin+trunc combination, since vpackus* input is a signed number.
diff --git a/llvm/test/CodeGen/X86/pr31956.ll b/llvm/test/CodeGen/X86/pr31956.ll
index 38b55a5c32a61..5ba84682b4dfc 100644
--- a/llvm/test/CodeGen/X86/pr31956.ll
+++ b/llvm/test/CodeGen/X86/pr31956.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mattr=+avx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mattr=+avx < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-scei-ps4"
diff --git a/llvm/test/CodeGen/X86/pr32108.ll b/llvm/test/CodeGen/X86/pr32108.ll
index a50b9a676ae2e..9b2e74bd70c05 100644
--- a/llvm/test/CodeGen/X86/pr32108.ll
+++ b/llvm/test/CodeGen/X86/pr32108.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define void @pr32108() {
; CHECK-LABEL: pr32108:
diff --git a/llvm/test/CodeGen/X86/pr3216.ll b/llvm/test/CodeGen/X86/pr3216.ll
index 09ef4d251c84f..0d62c8ac6a6e7 100644
--- a/llvm/test/CodeGen/X86/pr3216.ll
+++ b/llvm/test/CodeGen/X86/pr3216.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
@foo = global i8 127
diff --git a/llvm/test/CodeGen/X86/pr32241.ll b/llvm/test/CodeGen/X86/pr32241.ll
index 30cd55e6774ee..64b6c5379631b 100644
--- a/llvm/test/CodeGen/X86/pr32241.ll
+++ b/llvm/test/CodeGen/X86/pr32241.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -O0 -mcpu=skx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i686-unknown-unknown -O0 -mcpu=skx | FileCheck %s
define i32 @_Z3foov() {
; CHECK-LABEL: _Z3foov:
diff --git a/llvm/test/CodeGen/X86/pr32256.ll b/llvm/test/CodeGen/X86/pr32256.ll
index 225a3af551a2c..b2eabe6831e6a 100644
--- a/llvm/test/CodeGen/X86/pr32256.ll
+++ b/llvm/test/CodeGen/X86/pr32256.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -O0 -mcpu=skx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i686-unknown-unknown -O0 -mcpu=skx | FileCheck %s
@c = external dso_local global i8, align 1
diff --git a/llvm/test/CodeGen/X86/pr32278.ll b/llvm/test/CodeGen/X86/pr32278.ll
index 1b130c838baef..e2939138722ed 100644
--- a/llvm/test/CodeGen/X86/pr32278.ll
+++ b/llvm/test/CodeGen/X86/pr32278.ll
@@ -1,6 +1,6 @@
; PR32278
-; RUN: llc -mtriple=x86_64-unknown < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown < %s
define i8 @foo_v4i1_0_0_1_1_2_2_3_3(i8 %in) {
%trunc = trunc i8 %in to i4
diff --git a/llvm/test/CodeGen/X86/pr32282.ll b/llvm/test/CodeGen/X86/pr32282.ll
index a5bb7316a9673..404ec71d5c42e 100644
--- a/llvm/test/CodeGen/X86/pr32282.ll
+++ b/llvm/test/CodeGen/X86/pr32282.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=X64
; Check for assert in foldMaskAndShiftToScale due to out of range mask scaling.
diff --git a/llvm/test/CodeGen/X86/pr32329.ll b/llvm/test/CodeGen/X86/pr32329.ll
index d9671aa04f460..62571ab079718 100644
--- a/llvm/test/CodeGen/X86/pr32329.ll
+++ b/llvm/test/CodeGen/X86/pr32329.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s -check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512bw,+avx512vl,+avx512dq | FileCheck %s -check-prefix=X64
; According to https://bugs.llvm.org/show_bug.cgi?id=32329 it checks DAG ISEL failure on SKX target
%struct.AA = type { i24, [4 x i8] }
diff --git a/llvm/test/CodeGen/X86/pr32340.ll b/llvm/test/CodeGen/X86/pr32340.ll
index acd2f32a32ed1..2edf5266c8f50 100644
--- a/llvm/test/CodeGen/X86/pr32340.ll
+++ b/llvm/test/CodeGen/X86/pr32340.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 -mtriple=x86_64-unknown-linux-gnu -fast-isel-abort=1 -o - %s | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-unknown-linux-gnu -fast-isel-abort=1 -o - %s | FileCheck %s -check-prefix=X64
@var_825 = external dso_local global i16, align 2
@var_32 = external dso_local global i16, align 2
diff --git a/llvm/test/CodeGen/X86/pr32368.ll b/llvm/test/CodeGen/X86/pr32368.ll
index 52cf6fb07d672..059f12a24d2c8 100644
--- a/llvm/test/CodeGen/X86/pr32368.ll
+++ b/llvm/test/CodeGen/X86/pr32368.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512
define <4 x float> @PR32368_128(<4 x float>) {
; SSE-LABEL: PR32368_128:
diff --git a/llvm/test/CodeGen/X86/pr3241.ll b/llvm/test/CodeGen/X86/pr3241.ll
index 2f4ddb5e7e679..95a7eabb067eb 100644
--- a/llvm/test/CodeGen/X86/pr3241.ll
+++ b/llvm/test/CodeGen/X86/pr3241.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR3241
@g_620 = external dso_local global i32
diff --git a/llvm/test/CodeGen/X86/pr32420.ll b/llvm/test/CodeGen/X86/pr32420.ll
index 52d42520900d8..e881da8963890 100644
--- a/llvm/test/CodeGen/X86/pr32420.ll
+++ b/llvm/test/CodeGen/X86/pr32420.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.12.0"
diff --git a/llvm/test/CodeGen/X86/pr3243.ll b/llvm/test/CodeGen/X86/pr3243.ll
index f5fad20bf7dfe..ae4ba25fee367 100644
--- a/llvm/test/CodeGen/X86/pr3243.ll
+++ b/llvm/test/CodeGen/X86/pr3243.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR3243
declare signext i16 @safe_mul_func_int16_t_s_s(i16 signext, i32) nounwind readnone optsize
diff --git a/llvm/test/CodeGen/X86/pr3244.ll b/llvm/test/CodeGen/X86/pr3244.ll
index 6bed4ae01a4e7..40003d73f3bd9 100644
--- a/llvm/test/CodeGen/X86/pr3244.ll
+++ b/llvm/test/CodeGen/X86/pr3244.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR3244
@g_62 = external dso_local global i16 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/pr32451.ll b/llvm/test/CodeGen/X86/pr32451.ll
index 0abc87f832ee8..5bd8e80100694 100644
--- a/llvm/test/CodeGen/X86/pr32451.ll
+++ b/llvm/test/CodeGen/X86/pr32451.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -O0 -mcpu=knl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i686-unknown-unknown -O0 -mcpu=knl | FileCheck %s
; ModuleID = 'convert'
source_filename = "convert"
diff --git a/llvm/test/CodeGen/X86/pr32484.ll b/llvm/test/CodeGen/X86/pr32484.ll
index 790211f95d058..69921e82f9165 100644
--- a/llvm/test/CodeGen/X86/pr32484.ll
+++ b/llvm/test/CodeGen/X86/pr32484.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
define void @foo() {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr3250.ll b/llvm/test/CodeGen/X86/pr3250.ll
index ab6af4ef5312a..4887476a37b4a 100644
--- a/llvm/test/CodeGen/X86/pr3250.ll
+++ b/llvm/test/CodeGen/X86/pr3250.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR3250
declare i32 @safe_sub_func_short_u_u(i16 signext, i16 signext) nounwind
diff --git a/llvm/test/CodeGen/X86/pr32515.ll b/llvm/test/CodeGen/X86/pr32515.ll
index 62667eeaeb389..5f5ac35ea5f74 100644
--- a/llvm/test/CodeGen/X86/pr32515.ll
+++ b/llvm/test/CodeGen/X86/pr32515.ll
@@ -1,7 +1,7 @@
-; RUN: llc -O0 -mtriple=x86_64-unknown -mcpu=skx -o - %s
-; RUN: llc -mtriple=x86_64-unknown -mcpu=skx -o - %s
-; RUN: llc -O0 -mtriple=i686-unknown -mcpu=skx -o - %s
-; RUN: llc -mtriple=i686-unknown -mcpu=skx -o - %s
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-unknown -mcpu=skx -o - %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown -mcpu=skx -o - %s
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=i686-unknown -mcpu=skx -o - %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown -mcpu=skx -o - %s
; REQUIRES: asserts
@var_26 = external dso_local global i16, align 2
diff --git a/llvm/test/CodeGen/X86/pr32588.ll b/llvm/test/CodeGen/X86/pr32588.ll
index 2ba2f899f7dd9..b678ce6440b6f 100644
--- a/llvm/test/CodeGen/X86/pr32588.ll
+++ b/llvm/test/CodeGen/X86/pr32588.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
@c = external dso_local local_unnamed_addr global i32, align 4
@b = external dso_local local_unnamed_addr global i32, align 4
diff --git a/llvm/test/CodeGen/X86/pr32610.ll b/llvm/test/CodeGen/X86/pr32610.ll
index 6f3602dcf8d88..12d6cfb473039 100644
--- a/llvm/test/CodeGen/X86/pr32610.ll
+++ b/llvm/test/CodeGen/X86/pr32610.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-apple-macosx10.13.0 -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-apple-macosx10.13.0 -o - %s | FileCheck %s
target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"
diff --git a/llvm/test/CodeGen/X86/pr32659.ll b/llvm/test/CodeGen/X86/pr32659.ll
index c2ce0cd1be86e..52fe1bb4e4bd3 100644
--- a/llvm/test/CodeGen/X86/pr32659.ll
+++ b/llvm/test/CodeGen/X86/pr32659.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - %s | FileCheck %s
target triple = "i386-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr32907.ll b/llvm/test/CodeGen/X86/pr32907.ll
index 43abf1fd9754c..38f0cc9f4c017 100644
--- a/llvm/test/CodeGen/X86/pr32907.ll
+++ b/llvm/test/CodeGen/X86/pr32907.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512
define <2 x i64> @PR32907(<2 x i64> %astype.i, <2 x i64> %astype6.i) {
; SSE2-LABEL: PR32907:
diff --git a/llvm/test/CodeGen/X86/pr33010.ll b/llvm/test/CodeGen/X86/pr33010.ll
index 41e44dbc59b9b..1e6481719bf04 100644
--- a/llvm/test/CodeGen/X86/pr33010.ll
+++ b/llvm/test/CodeGen/X86/pr33010.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-generic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-generic < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/pr3317.ll b/llvm/test/CodeGen/X86/pr3317.ll
index 2da79f4c05fdf..56b8ad83eb47b 100644
--- a/llvm/test/CodeGen/X86/pr3317.ll
+++ b/llvm/test/CodeGen/X86/pr3317.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; PR3317
%VT = type [0 x ptr]
diff --git a/llvm/test/CodeGen/X86/pr33349.ll b/llvm/test/CodeGen/X86/pr33349.ll
index c879cb9867ab2..25a6401c1b892 100644
--- a/llvm/test/CodeGen/X86/pr33349.ll
+++ b/llvm/test/CodeGen/X86/pr33349.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=+avx512f | FileCheck %s --check-prefix=KNL
-; RUN: llc < %s -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx512f | FileCheck %s --check-prefix=KNL
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefix=SKX
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr3366.ll b/llvm/test/CodeGen/X86/pr3366.ll
index 22129839eb2a4..b2cdf4ff8765c 100644
--- a/llvm/test/CodeGen/X86/pr3366.ll
+++ b/llvm/test/CodeGen/X86/pr3366.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -disable-cgp-branch-opts | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -disable-cgp-branch-opts | FileCheck %s
; PR3366
define void @_ada_c34002a() nounwind {
diff --git a/llvm/test/CodeGen/X86/pr33715.ll b/llvm/test/CodeGen/X86/pr33715.ll
index 15432cfdb512c..3719837c850bd 100644
--- a/llvm/test/CodeGen/X86/pr33715.ll
+++ b/llvm/test/CodeGen/X86/pr33715.ll
@@ -1,5 +1,5 @@
; Make sure we don't crash with a build vector of integer constants.
-; RUN: llc %s -o /dev/null
+; RUN: llc -combiner-topological-sorting %s -o /dev/null
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr33747.ll b/llvm/test/CodeGen/X86/pr33747.ll
index f6df42450e187..5db628b2d10b9 100644
--- a/llvm/test/CodeGen/X86/pr33747.ll
+++ b/llvm/test/CodeGen/X86/pr33747.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define void @PR33747(ptr nocapture) {
; CHECK-LABEL: PR33747:
diff --git a/llvm/test/CodeGen/X86/pr33954.ll b/llvm/test/CodeGen/X86/pr33954.ll
index b170ac241070c..a5fa839eeb295 100644
--- a/llvm/test/CodeGen/X86/pr33954.ll
+++ b/llvm/test/CodeGen/X86/pr33954.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux -x86-cmov-converter=true -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -x86-cmov-converter=true -verify-machineinstrs < %s | FileCheck %s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; This test checks that x86-cmov-converter optimization does not transform CMOV
diff --git a/llvm/test/CodeGen/X86/pr33960.ll b/llvm/test/CodeGen/X86/pr33960.ll
index 6ee270e406892..34cfbaad4d156 100644
--- a/llvm/test/CodeGen/X86/pr33960.ll
+++ b/llvm/test/CodeGen/X86/pr33960.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
@b = external dso_local local_unnamed_addr global i32, align 4
diff --git a/llvm/test/CodeGen/X86/pr34080-2.ll b/llvm/test/CodeGen/X86/pr34080-2.ll
index 279373a7aab3f..252628d4e5433 100644
--- a/llvm/test/CodeGen/X86/pr34080-2.ll
+++ b/llvm/test/CodeGen/X86/pr34080-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-openbsd6.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-openbsd6.2 | FileCheck %s
%struct.DateTime = type { i64, i32, i32, i32, i32, i32, double, i8 }
diff --git a/llvm/test/CodeGen/X86/pr34080.ll b/llvm/test/CodeGen/X86/pr34080.ll
index 3b46bd3c57617..82ade46fed7f3 100644
--- a/llvm/test/CodeGen/X86/pr34080.ll
+++ b/llvm/test/CodeGen/X86/pr34080.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 -mcpu=x86-64 | FileCheck %s --check-prefix=SSE2-SCHEDULE
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse3 | FileCheck %s --check-prefix=SSE3
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse3 -mcpu=nocona | FileCheck %s --check-prefix=SSE3
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx -mcpu=sandybridge | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 -mcpu=x86-64 | FileCheck %s --check-prefix=SSE2-SCHEDULE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+sse3 | FileCheck %s --check-prefix=SSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+sse3 -mcpu=nocona | FileCheck %s --check-prefix=SSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx -mcpu=sandybridge | FileCheck %s --check-prefix=AVX
define void @_Z1fe(x86_fp80 %z) local_unnamed_addr #0 {
; SSE2-LABEL: _Z1fe:
diff --git a/llvm/test/CodeGen/X86/pr34088.ll b/llvm/test/CodeGen/X86/pr34088.ll
index 4462a4a5ec070..db5ab87bba720 100644
--- a/llvm/test/CodeGen/X86/pr34088.ll
+++ b/llvm/test/CodeGen/X86/pr34088.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mcpu=pentium4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mcpu=pentium4 | FileCheck %s
%struct.Foo = type { i32, %struct.Bar }
%struct.Bar = type { i32, %struct.Buffer, i32 }
diff --git a/llvm/test/CodeGen/X86/pr34139.ll b/llvm/test/CodeGen/X86/pr34139.ll
index 93427e2e6cce2..ca9118a63e454 100644
--- a/llvm/test/CodeGen/X86/pr34139.ll
+++ b/llvm/test/CodeGen/X86/pr34139.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=knl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=knl | FileCheck %s
define void @f_f(ptr %ptr) {
; CHECK-LABEL: f_f:
diff --git a/llvm/test/CodeGen/X86/pr34149.ll b/llvm/test/CodeGen/X86/pr34149.ll
index fc2dfff5da0c1..878fbd5935e2b 100644
--- a/llvm/test/CodeGen/X86/pr34149.ll
+++ b/llvm/test/CodeGen/X86/pr34149.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell | FileCheck %s
declare <4 x double> @llvm.minnum.v4f64(<4 x double> %x, <4 x double> %y)
declare <4 x double> @llvm.maxnum.v4f64(<4 x double> %x, <4 x double> %y)
diff --git a/llvm/test/CodeGen/X86/pr34177.ll b/llvm/test/CodeGen/X86/pr34177.ll
index 5b2431eb21495..a6db15d4451ac 100644
--- a/llvm/test/CodeGen/X86/pr34177.ll
+++ b/llvm/test/CodeGen/X86/pr34177.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefix=AVX512VL
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr34271-1.ll b/llvm/test/CodeGen/X86/pr34271-1.ll
index 25ce12fa7cd58..ead74567b1efa 100644
--- a/llvm/test/CodeGen/X86/pr34271-1.ll
+++ b/llvm/test/CodeGen/X86/pr34271-1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx512vl,avx512bw | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx512vl,avx512bw | FileCheck %s
define <16 x i16> @foo(<16 x i32> %i) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr34271.ll b/llvm/test/CodeGen/X86/pr34271.ll
index 49f6173197eff..24fd53e1ba290 100644
--- a/llvm/test/CodeGen/X86/pr34271.ll
+++ b/llvm/test/CodeGen/X86/pr34271.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; CHECK: .LCPI0_0:
; CHECK-NEXT: .zero 16,1
diff --git a/llvm/test/CodeGen/X86/pr34292.ll b/llvm/test/CodeGen/X86/pr34292.ll
index b9cc84c338efb..1b54e5f81e610 100644
--- a/llvm/test/CodeGen/X86/pr34292.ll
+++ b/llvm/test/CodeGen/X86/pr34292.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+adx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+adx | FileCheck %s
; PR34292
@_ZL1c = external dso_local global i8
diff --git a/llvm/test/CodeGen/X86/pr34397.ll b/llvm/test/CodeGen/X86/pr34397.ll
index 15f36a18479f3..b670a5fdbab18 100644
--- a/llvm/test/CodeGen/X86/pr34397.ll
+++ b/llvm/test/CodeGen/X86/pr34397.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell %s -o - > /dev/null
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell %s -o - > /dev/null
; Fix PR34397
diff --git a/llvm/test/CodeGen/X86/pr34421.ll b/llvm/test/CodeGen/X86/pr34421.ll
index 5ae71bd905504..fdd47e1ea6867 100644
--- a/llvm/test/CodeGen/X86/pr34421.ll
+++ b/llvm/test/CodeGen/X86/pr34421.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-macosx10.13.0 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.13.0 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-macosx10.13.0 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.13.0 | FileCheck %s --check-prefix=X64
define void @thread_selfcounts() noimplicitfloat noredzone nounwind {
; X86-LABEL: thread_selfcounts:
diff --git a/llvm/test/CodeGen/X86/pr3457.ll b/llvm/test/CodeGen/X86/pr3457.ll
index 4f11bc949b772..1bedba7cf840a 100644
--- a/llvm/test/CodeGen/X86/pr3457.ll
+++ b/llvm/test/CodeGen/X86/pr3457.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mcpu=corei7 | FileCheck %s
; PR3457
; rdar://6548010
diff --git a/llvm/test/CodeGen/X86/pr34605.ll b/llvm/test/CodeGen/X86/pr34605.ll
index 25dd6a7436a8a..402406c55f5f6 100644
--- a/llvm/test/CodeGen/X86/pr34605.ll
+++ b/llvm/test/CodeGen/X86/pr34605.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=avx512bw,avx512vl,avx512dq | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=avx512bw,avx512vl,avx512dq | FileCheck %s
define void @pr34605(ptr nocapture %s, i32 %p) {
; CHECK-LABEL: pr34605:
diff --git a/llvm/test/CodeGen/X86/pr34629.ll b/llvm/test/CodeGen/X86/pr34629.ll
index f7747b1820b65..f1949c87a5598 100644
--- a/llvm/test/CodeGen/X86/pr34629.ll
+++ b/llvm/test/CodeGen/X86/pr34629.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr34634.ll b/llvm/test/CodeGen/X86/pr34634.ll
index 980961a511160..8208fea215c82 100644
--- a/llvm/test/CodeGen/X86/pr34634.ll
+++ b/llvm/test/CodeGen/X86/pr34634.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr34653.ll b/llvm/test/CodeGen/X86/pr34653.ll
index d46cd2091856e..c6a865ad7e8e5 100644
--- a/llvm/test/CodeGen/X86/pr34653.ll
+++ b/llvm/test/CodeGen/X86/pr34653.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+avx512f -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -O0 -mtriple=x86_64-unknown-unknown -mattr=+avx512f -o - | FileCheck %s
declare fastcc <38 x double> @test()
diff --git a/llvm/test/CodeGen/X86/pr34657.ll b/llvm/test/CodeGen/X86/pr34657.ll
index 8bbf3b87cbf58..4071bea1ec3ac 100644
--- a/llvm/test/CodeGen/X86/pr34657.ll
+++ b/llvm/test/CodeGen/X86/pr34657.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s
define <112 x i8> @pr34657(ptr %src) local_unnamed_addr {
; CHECK-LABEL: pr34657:
diff --git a/llvm/test/CodeGen/X86/pr34855.ll b/llvm/test/CodeGen/X86/pr34855.ll
index 1a22b85ef761b..e5cb3693aca00 100644
--- a/llvm/test/CodeGen/X86/pr34855.ll
+++ b/llvm/test/CodeGen/X86/pr34855.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
define void @PR34855(ptr%p0, ptr%p1, ptr%p2) {
; X86-LABEL: PR34855:
diff --git a/llvm/test/CodeGen/X86/pr3522.ll b/llvm/test/CodeGen/X86/pr3522.ll
index 1300ede617f25..c22612665a741 100644
--- a/llvm/test/CodeGen/X86/pr3522.ll
+++ b/llvm/test/CodeGen/X86/pr3522.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -stats 2>&1 | not grep "instructions sunk"
+; RUN: llc -combiner-topological-sorting < %s -stats 2>&1 | not grep "instructions sunk"
; PR3522
target triple = "i386-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/pr35272.ll b/llvm/test/CodeGen/X86/pr35272.ll
index 0b832d5631075..41e1bc1389c1b 100644
--- a/llvm/test/CodeGen/X86/pr35272.ll
+++ b/llvm/test/CodeGen/X86/pr35272.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=skx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=skx | FileCheck %s
define <2 x i48> @PR35272(<2 x i64> %a0, <2 x i48> %a1, <2 x i48> %a2) {
; CHECK-LABEL: PR35272:
diff --git a/llvm/test/CodeGen/X86/pr35399.ll b/llvm/test/CodeGen/X86/pr35399.ll
index 0fda715460698..f1b4c5234b453 100644
--- a/llvm/test/CodeGen/X86/pr35399.ll
+++ b/llvm/test/CodeGen/X86/pr35399.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=lzcnt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=lzcnt | FileCheck %s
; Make sure we emit opoosite setcc instructions.
define i64 @pr35399(i64, ptr, ptr) {
diff --git a/llvm/test/CodeGen/X86/pr35636.ll b/llvm/test/CodeGen/X86/pr35636.ll
index 0b7d64f38c780..4187200d3f214 100644
--- a/llvm/test/CodeGen/X86/pr35636.ll
+++ b/llvm/test/CodeGen/X86/pr35636.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell | FileCheck %s --check-prefix=HSW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver1 | FileCheck %s --check-prefix=ZN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell | FileCheck %s --check-prefix=HSW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver1 | FileCheck %s --check-prefix=ZN
define void @_Z15uint64_to_asciimPc(i64 %arg) {
; HSW-LABEL: _Z15uint64_to_asciimPc:
diff --git a/llvm/test/CodeGen/X86/pr35761.ll b/llvm/test/CodeGen/X86/pr35761.ll
index 5661b6775ab9d..727c7023ba449 100644
--- a/llvm/test/CodeGen/X86/pr35761.ll
+++ b/llvm/test/CodeGen/X86/pr35761.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux %s -o - | FileCheck %s
@x = dso_local global i8 0, align 1
@y = dso_local global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/pr35763.ll b/llvm/test/CodeGen/X86/pr35763.ll
index c10a24cffe5f2..5b372e5be8ce0 100644
--- a/llvm/test/CodeGen/X86/pr35763.ll
+++ b/llvm/test/CodeGen/X86/pr35763.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu %s -o - | FileCheck %s
%struct.S = type <{ i16, i24, [5 x i8], i8, i16, [2 x i8] }>
diff --git a/llvm/test/CodeGen/X86/pr35918.ll b/llvm/test/CodeGen/X86/pr35918.ll
index f57fab3084a9e..a576a53ce763a 100644
--- a/llvm/test/CodeGen/X86/pr35918.ll
+++ b/llvm/test/CodeGen/X86/pr35918.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=skylake | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mcpu=skylake | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefix=X64
define void @fetch_r16g16_snorm_unorm8(ptr, ptr, i32, i32, ptr) nounwind {
; X86-LABEL: fetch_r16g16_snorm_unorm8:
diff --git a/llvm/test/CodeGen/X86/pr35972.ll b/llvm/test/CodeGen/X86/pr35972.ll
index 981c47800c0f3..95feb099544e1 100644
--- a/llvm/test/CodeGen/X86/pr35972.ll
+++ b/llvm/test/CodeGen/X86/pr35972.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-linux-gnu %s -o - -mattr=avx512bw | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu %s -o - -mattr=avx512bw | FileCheck %s
define void @test3(i32 %c, ptr %ptr) {
; CHECK-LABEL: test3:
diff --git a/llvm/test/CodeGen/X86/pr36199.ll b/llvm/test/CodeGen/X86/pr36199.ll
index ec18124faad78..e7b172cbdaef7 100644
--- a/llvm/test/CodeGen/X86/pr36199.ll
+++ b/llvm/test/CodeGen/X86/pr36199.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s
define void @foo(<16 x float> %x) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr36274.ll b/llvm/test/CodeGen/X86/pr36274.ll
index aad2578f271b7..992eaea447a91 100644
--- a/llvm/test/CodeGen/X86/pr36274.ll
+++ b/llvm/test/CodeGen/X86/pr36274.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
; This tests is checking for a case where the x86 load-op-store fusion
; misses a dependence between the fused load and a non-fused operand
diff --git a/llvm/test/CodeGen/X86/pr36312.ll b/llvm/test/CodeGen/X86/pr36312.ll
index c643888b699e5..59b7b6358bf1e 100644
--- a/llvm/test/CodeGen/X86/pr36312.ll
+++ b/llvm/test/CodeGen/X86/pr36312.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
%struct.anon = type { i32, i32 }
diff --git a/llvm/test/CodeGen/X86/pr36553.ll b/llvm/test/CodeGen/X86/pr36553.ll
index b61ec81473081..5a12cf0747e17 100644
--- a/llvm/test/CodeGen/X86/pr36553.ll
+++ b/llvm/test/CodeGen/X86/pr36553.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
; Make sure we don't crash because we negated an fma when we didn't have any fma instructions.
diff --git a/llvm/test/CodeGen/X86/pr36602.ll b/llvm/test/CodeGen/X86/pr36602.ll
index fa2e05e863336..c812aaaf1e0d7 100644
--- a/llvm/test/CodeGen/X86/pr36602.ll
+++ b/llvm/test/CodeGen/X86/pr36602.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define i32 @fn2() {
diff --git a/llvm/test/CodeGen/X86/pr36865.ll b/llvm/test/CodeGen/X86/pr36865.ll
index 35d644027e1b0..e8ea594624214 100644
--- a/llvm/test/CodeGen/X86/pr36865.ll
+++ b/llvm/test/CodeGen/X86/pr36865.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-linux-gnu < %s | FileCheck %s
define void @main() {
; CHECK-LABEL: main:
diff --git a/llvm/test/CodeGen/X86/pr37063.ll b/llvm/test/CodeGen/X86/pr37063.ll
index 1d98ea921b748..ee53f0adc25b6 100644
--- a/llvm/test/CodeGen/X86/pr37063.ll
+++ b/llvm/test/CodeGen/X86/pr37063.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
declare dso_local void @bar()
diff --git a/llvm/test/CodeGen/X86/pr37264.ll b/llvm/test/CodeGen/X86/pr37264.ll
index 8821960d4b748..195af27dbad51 100644
--- a/llvm/test/CodeGen/X86/pr37264.ll
+++ b/llvm/test/CodeGen/X86/pr37264.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
define void @a() local_unnamed_addr #0 {
ret void
diff --git a/llvm/test/CodeGen/X86/pr37359.ll b/llvm/test/CodeGen/X86/pr37359.ll
index 5032855ff3e9d..77257dffdac59 100644
--- a/llvm/test/CodeGen/X86/pr37359.ll
+++ b/llvm/test/CodeGen/X86/pr37359.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -o /dev/null %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -o /dev/null %s 2>&1 | FileCheck %s
target triple = "x86_64--"
@a = global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/pr37499.ll b/llvm/test/CodeGen/X86/pr37499.ll
index 15a7739fd2c7f..9a6bb3b5b5329 100644
--- a/llvm/test/CodeGen/X86/pr37499.ll
+++ b/llvm/test/CodeGen/X86/pr37499.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx512vl | FileCheck %s
define <2 x i64> @undef_tval() {
; CHECK-LABEL: undef_tval:
diff --git a/llvm/test/CodeGen/X86/pr37820.ll b/llvm/test/CodeGen/X86/pr37820.ll
index 3f09dc7fe7523..a80d632cc89c7 100644
--- a/llvm/test/CodeGen/X86/pr37820.ll
+++ b/llvm/test/CodeGen/X86/pr37820.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
@a = external dso_local local_unnamed_addr global i64, align 8
@c = external dso_local local_unnamed_addr global i64, align 8
diff --git a/llvm/test/CodeGen/X86/pr37826.ll b/llvm/test/CodeGen/X86/pr37826.ll
index c22f351a79850..75319e678bf73 100644
--- a/llvm/test/CodeGen/X86/pr37826.ll
+++ b/llvm/test/CodeGen/X86/pr37826.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -o - %s -mtriple=x86_64--unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64--unknown-linux-gnu | FileCheck %s
; When compiled and run this should print zero.
diff --git a/llvm/test/CodeGen/X86/pr37879.ll b/llvm/test/CodeGen/X86/pr37879.ll
index 34cbccca2867b..fb0c94ba9fefd 100644
--- a/llvm/test/CodeGen/X86/pr37879.ll
+++ b/llvm/test/CodeGen/X86/pr37879.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 < %s -mtriple=x86_64-apple-darwin -mattr=+avx512bw | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 < %s -mtriple=x86_64-apple-darwin -mattr=+avx512bw | FileCheck %s
define double @foo(ptr nocapture readonly) #0 {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr37916.ll b/llvm/test/CodeGen/X86/pr37916.ll
index e6639a11ca5ea..a028d1f36a1e6 100644
--- a/llvm/test/CodeGen/X86/pr37916.ll
+++ b/llvm/test/CodeGen/X86/pr37916.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-unknown-linux-gnu %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-linux-gnu %s -o - | FileCheck %s
@f = external dso_local local_unnamed_addr global ptr, align 4
@a = external dso_local global i64, align 8
diff --git a/llvm/test/CodeGen/X86/pr38038.ll b/llvm/test/CodeGen/X86/pr38038.ll
index eaacfedd651c3..83c0e54c63329 100644
--- a/llvm/test/CodeGen/X86/pr38038.ll
+++ b/llvm/test/CodeGen/X86/pr38038.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown
; PR38038
define i8 @crash(half) {
diff --git a/llvm/test/CodeGen/X86/pr38533.ll b/llvm/test/CodeGen/X86/pr38533.ll
index 11db6bfa99207..dbeace617a27f 100644
--- a/llvm/test/CodeGen/X86/pr38533.ll
+++ b/llvm/test/CodeGen/X86/pr38533.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefix=AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx512fp16 | FileCheck %s --check-prefix=AVX512FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=avx512fp16 | FileCheck %s --check-prefix=AVX512FP16
; This test makes sure that a vector that needs to be promoted that is bitcasted to fp16 is legalized correctly without causing a width mismatch.
define void @constant_fold_vector_to_half() {
diff --git a/llvm/test/CodeGen/X86/pr38639.ll b/llvm/test/CodeGen/X86/pr38639.ll
index 8eb3da1190285..a09be07c86491 100644
--- a/llvm/test/CodeGen/X86/pr38639.ll
+++ b/llvm/test/CodeGen/X86/pr38639.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=btver2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=btver2 | FileCheck %s
define <8 x double> @test(<4 x double> %a, <4 x double> %b) {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/pr38738.ll b/llvm/test/CodeGen/X86/pr38738.ll
index 205849e7d05db..e2831ef3e459a 100644
--- a/llvm/test/CodeGen/X86/pr38738.ll
+++ b/llvm/test/CodeGen/X86/pr38738.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -o - -mattr=-x87,+sse,-sse2 %s | FileCheck --check-prefixes=X64SSE %s
-; RUN: llc -mtriple=i686-unknown-linux-gnu -o - -mattr=-x87,+sse,-sse2 %s | FileCheck --check-prefixes=X86SSE %s
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -o - -mattr=-x87,+sse2,-sse3 %s | FileCheck --check-prefixes=X64SSE2 %s
-; RUN: llc -mtriple=i686-unknown-linux-gnu -o - -mattr=-x87,+sse2,-sse3 %s | FileCheck --check-prefixes=X86SSE2 %s
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -o - -mattr=-x87,+avx,-avx2 %s | FileCheck --check-prefixes=X64AVX %s
-; RUN: llc -mtriple=i686-unknown-linux-gnu -o - -mattr=-x87,+avx,-avx2 %s | FileCheck --check-prefixes=X86AVX %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -o - -mattr=-x87,+sse,-sse2 %s | FileCheck --check-prefixes=X64SSE %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -o - -mattr=-x87,+sse,-sse2 %s | FileCheck --check-prefixes=X86SSE %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -o - -mattr=-x87,+sse2,-sse3 %s | FileCheck --check-prefixes=X64SSE2 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -o - -mattr=-x87,+sse2,-sse3 %s | FileCheck --check-prefixes=X86SSE2 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -o - -mattr=-x87,+avx,-avx2 %s | FileCheck --check-prefixes=X64AVX %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -o - -mattr=-x87,+avx,-avx2 %s | FileCheck --check-prefixes=X86AVX %s
%struct.params = type { double, double }
diff --git a/llvm/test/CodeGen/X86/pr38743.ll b/llvm/test/CodeGen/X86/pr38743.ll
index c05310090660d..96be539bbf586 100644
--- a/llvm/test/CodeGen/X86/pr38743.ll
+++ b/llvm/test/CodeGen/X86/pr38743.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
%0 = type { %1 }
%1 = type { %2 }
diff --git a/llvm/test/CodeGen/X86/pr38795.ll b/llvm/test/CodeGen/X86/pr38795.ll
index 6a0c13526ac18..8eef3e06750ac 100644
--- a/llvm/test/CodeGen/X86/pr38795.ll
+++ b/llvm/test/CodeGen/X86/pr38795.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O2 -mtriple=i386-unknown-linux-gnu -verify-machineinstrs -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O2 -mtriple=i386-unknown-linux-gnu -verify-machineinstrs -o - %s | FileCheck %s
@.str = external dso_local unnamed_addr constant [6 x i8], align 1
@a = external dso_local local_unnamed_addr global i32, align 4
@h = external dso_local local_unnamed_addr global i32, align 4
diff --git a/llvm/test/CodeGen/X86/pr38803.ll b/llvm/test/CodeGen/X86/pr38803.ll
index 3efe9f8dfa55d..793a08dcd458f 100644
--- a/llvm/test/CodeGen/X86/pr38803.ll
+++ b/llvm/test/CodeGen/X86/pr38803.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=skylake-avx512 -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=skylake-avx512 -mtriple=x86_64-unknown-unknown | FileCheck %s
@b = dso_local local_unnamed_addr global i32 0, align 4
@c = dso_local local_unnamed_addr global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/pr38819.ll b/llvm/test/CodeGen/X86/pr38819.ll
index e227586400c90..0a3db89c57fa2 100644
--- a/llvm/test/CodeGen/X86/pr38819.ll
+++ b/llvm/test/CodeGen/X86/pr38819.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse,-sse2,-x87 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse,-sse2,-x87 | FileCheck %s
define void @foo(i64 %x, ptr %b) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr38865-2.ll b/llvm/test/CodeGen/X86/pr38865-2.ll
index 3213c985819f4..c80497205ccd4 100644
--- a/llvm/test/CodeGen/X86/pr38865-2.ll
+++ b/llvm/test/CodeGen/X86/pr38865-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -mtriple=x86_64-unknown-linux-gnux32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=x86_64-unknown-linux-gnux32 | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/pr38865-3.ll b/llvm/test/CodeGen/X86/pr38865-3.ll
index bc73a2585c996..78bf71e80e0d1 100644
--- a/llvm/test/CodeGen/X86/pr38865-3.ll
+++ b/llvm/test/CodeGen/X86/pr38865-3.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -show-mc-encoding < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -show-mc-encoding < %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnux32"
diff --git a/llvm/test/CodeGen/X86/pr38865.ll b/llvm/test/CodeGen/X86/pr38865.ll
index 221ec22ecd0b3..69b4aa0e04746 100644
--- a/llvm/test/CodeGen/X86/pr38865.ll
+++ b/llvm/test/CodeGen/X86/pr38865.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -show-mc-encoding < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -show-mc-encoding < %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnux32"
diff --git a/llvm/test/CodeGen/X86/pr39098.ll b/llvm/test/CodeGen/X86/pr39098.ll
index 3db96c3f698c8..33a0acc708eab 100644
--- a/llvm/test/CodeGen/X86/pr39098.ll
+++ b/llvm/test/CodeGen/X86/pr39098.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define dso_local void @test_cancel2(ptr %p1, ptr %p2) {
; CHECK-LABEL: test_cancel2:
diff --git a/llvm/test/CodeGen/X86/pr39733.ll b/llvm/test/CodeGen/X86/pr39733.ll
index d20047dbedc13..faee095bfb274 100644
--- a/llvm/test/CodeGen/X86/pr39733.ll
+++ b/llvm/test/CodeGen/X86/pr39733.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx -O0 | FileCheck %s
; We should not be emitting a sign extend using a %ymm register.
diff --git a/llvm/test/CodeGen/X86/pr39896.ll b/llvm/test/CodeGen/X86/pr39896.ll
index b78d268d10f85..a5bf8f4c9dfbe 100644
--- a/llvm/test/CodeGen/X86/pr39896.ll
+++ b/llvm/test/CodeGen/X86/pr39896.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -start-after=codegenprepare -stop-after=finalize-isel -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -start-after=codegenprepare -stop-after=finalize-isel -o - | FileCheck %s
; PR39896: When code such as %conv below is dropped by SelectionDAG for having
; no users, don't just drop the dbg.value record associated with it. Instead,
diff --git a/llvm/test/CodeGen/X86/pr39926.ll b/llvm/test/CodeGen/X86/pr39926.ll
index 439ee5784416c..2eac6c4c08c9d 100644
--- a/llvm/test/CodeGen/X86/pr39926.ll
+++ b/llvm/test/CodeGen/X86/pr39926.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx | FileCheck %s
define i8 @test_offset(ptr %base) {
; CHECK-LABEL: test_offset:
; CHECK: # %bb.0: # %entry
diff --git a/llvm/test/CodeGen/X86/pr40090.ll b/llvm/test/CodeGen/X86/pr40090.ll
index af933c950e111..0e995cecab670 100644
--- a/llvm/test/CodeGen/X86/pr40090.ll
+++ b/llvm/test/CodeGen/X86/pr40090.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i64 @foo(i64 %x, i64 %y) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr40289-64bit.ll b/llvm/test/CodeGen/X86/pr40289-64bit.ll
index 96c8377eb0f0a..a21513d5bd7d1 100644
--- a/llvm/test/CodeGen/X86/pr40289-64bit.ll
+++ b/llvm/test/CodeGen/X86/pr40289-64bit.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc | FileCheck %s
define cc 92 < 9 x i64 > @clobber() {
%1 = alloca i64
diff --git a/llvm/test/CodeGen/X86/pr40289.ll b/llvm/test/CodeGen/X86/pr40289.ll
index 21e50931b40f2..b9df02766d644 100644
--- a/llvm/test/CodeGen/X86/pr40289.ll
+++ b/llvm/test/CodeGen/X86/pr40289.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-windows-msvc | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-windows-msvc | FileCheck %s
define < 3 x i32 > @clobber() {
%1 = alloca i32
diff --git a/llvm/test/CodeGen/X86/pr40529.ll b/llvm/test/CodeGen/X86/pr40529.ll
index a0ab4b5ffb635..fe2b6810168f3 100644
--- a/llvm/test/CodeGen/X86/pr40529.ll
+++ b/llvm/test/CodeGen/X86/pr40529.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux -mcpu=x86-64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux -mcpu=x86-64 | FileCheck %s
define x86_fp80 @rem_pio2l_min(x86_fp80 %z) {
; CHECK-LABEL: rem_pio2l_min:
diff --git a/llvm/test/CodeGen/X86/pr40539.ll b/llvm/test/CodeGen/X86/pr40539.ll
index a920efbec59ea..4b9b6d3a0d528 100644
--- a/llvm/test/CodeGen/X86/pr40539.ll
+++ b/llvm/test/CodeGen/X86/pr40539.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=pentium4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mcpu=pentium4 | FileCheck %s
@f1 = global float 1.000000e+00, align 4
diff --git a/llvm/test/CodeGen/X86/pr40631_deadstore_elision.ll b/llvm/test/CodeGen/X86/pr40631_deadstore_elision.ll
index 9b8ce83b102bf..6d1042aea53b3 100644
--- a/llvm/test/CodeGen/X86/pr40631_deadstore_elision.ll
+++ b/llvm/test/CodeGen/X86/pr40631_deadstore_elision.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -o - %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
%struct.sk_buff = type { ptr }
%struct.xt_action_param = type { ptr, ptr, ptr, i32, i32, i8 }
diff --git a/llvm/test/CodeGen/X86/pr40737.ll b/llvm/test/CodeGen/X86/pr40737.ll
index 45a448429d42d..771a9c1584fa0 100644
--- a/llvm/test/CodeGen/X86/pr40737.ll
+++ b/llvm/test/CodeGen/X86/pr40737.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
define i8 @_BitScanForward(ptr nocapture %Index, i32 %Mask) {
; CHECK-LABEL: _BitScanForward:
diff --git a/llvm/test/CodeGen/X86/pr40811.ll b/llvm/test/CodeGen/X86/pr40811.ll
index 7851856713e82..4ecfec986cecf 100644
--- a/llvm/test/CodeGen/X86/pr40811.ll
+++ b/llvm/test/CodeGen/X86/pr40811.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -o - -mcpu=btver2 -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -o - -mcpu=btver2 -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define <8 x i32> @_Z6test70v(ptr %id14793) {
; CHECK-LABEL: _Z6test70v:
diff --git a/llvm/test/CodeGen/X86/pr40891.ll b/llvm/test/CodeGen/X86/pr40891.ll
index 1795333ca3f79..f949649f39c94 100644
--- a/llvm/test/CodeGen/X86/pr40891.ll
+++ b/llvm/test/CodeGen/X86/pr40891.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=avx2 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx2 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=avx2 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx2 | FileCheck %s --check-prefixes=X64
; Make sure this sequence doesn't hang in DAG combine.
diff --git a/llvm/test/CodeGen/X86/pr40994.ll b/llvm/test/CodeGen/X86/pr40994.ll
index d11f91fdfa06b..6ad8f12dbc0e3 100644
--- a/llvm/test/CodeGen/X86/pr40994.ll
+++ b/llvm/test/CodeGen/X86/pr40994.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.2 | FileCheck %s
define <8 x i8> @foo(<16 x i8> %a) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr41619.ll b/llvm/test/CodeGen/X86/pr41619.ll
index 5d11f1c960a8c..83cf6e7ed0450 100644
--- a/llvm/test/CodeGen/X86/pr41619.ll
+++ b/llvm/test/CodeGen/X86/pr41619.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.14.0 -mattr=avx2 | FileCheck %s --check-prefixes=CHECK
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.14.0 -mattr=avx512bw | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.14.0 -mattr=avx2 | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.14.0 -mattr=avx512bw | FileCheck %s --check-prefixes=CHECK
define void @foo(double %arg) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr41678.ll b/llvm/test/CodeGen/X86/pr41678.ll
index 36411e42510f4..7b2cbf9150bb5 100644
--- a/llvm/test/CodeGen/X86/pr41678.ll
+++ b/llvm/test/CodeGen/X86/pr41678.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O0 -mtriple=i386-pc-linux-gnu -mattr=avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O0 -mtriple=i386-pc-linux-gnu -mattr=avx512f | FileCheck %s
define void @a() {
; CHECK-LABEL: a:
diff --git a/llvm/test/CodeGen/X86/pr41748.ll b/llvm/test/CodeGen/X86/pr41748.ll
index c6f213fbfc008..bc3b01a77b68a 100644
--- a/llvm/test/CodeGen/X86/pr41748.ll
+++ b/llvm/test/CodeGen/X86/pr41748.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.14.0 -mattr=mmx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.14.0 -mattr=mmx | FileCheck %s
define i32 @foo(i32 %a) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr42064.ll b/llvm/test/CodeGen/X86/pr42064.ll
index 07de2e88db0b0..4802a8adee09d 100644
--- a/llvm/test/CodeGen/X86/pr42064.ll
+++ b/llvm/test/CodeGen/X86/pr42064.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-machineinstrs -stackrealign -mtriple=x86_64-pc-windows-msvc19.11.0 -mattr=+avx,+cx16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -stackrealign -mtriple=x86_64-pc-windows-msvc19.11.0 -mattr=+avx,+cx16 | FileCheck %s
%struct.TestStruct = type { %union.Int128 }
%union.Int128 = type { i128 }
diff --git a/llvm/test/CodeGen/X86/pr42452.ll b/llvm/test/CodeGen/X86/pr42452.ll
index 9bf684b2ba88e..64fa5cc269739 100644
--- a/llvm/test/CodeGen/X86/pr42452.ll
+++ b/llvm/test/CodeGen/X86/pr42452.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -O0 | FileCheck %s
@b = external dso_local global i64, align 8
diff --git a/llvm/test/CodeGen/X86/pr42565.ll b/llvm/test/CodeGen/X86/pr42565.ll
index 10071064057b8..d069f8b738ddd 100644
--- a/llvm/test/CodeGen/X86/pr42565.ll
+++ b/llvm/test/CodeGen/X86/pr42565.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=atom | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=atom -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=atom | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=atom -filetype=obj -o /dev/null
define void @HUF_writeCTable_wksp() {
; CHECK-LABEL: HUF_writeCTable_wksp:
diff --git a/llvm/test/CodeGen/X86/pr42616.ll b/llvm/test/CodeGen/X86/pr42616.ll
index c66e1565e3f99..342350aabb9c8 100644
--- a/llvm/test/CodeGen/X86/pr42616.ll
+++ b/llvm/test/CodeGen/X86/pr42616.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=sse2 | FileCheck %s
define <2 x double> @pr42616(<2 x double> %a0, <2 x double> %a1, ptr %p) {
;CHECK-LABEL: pr42616
diff --git a/llvm/test/CodeGen/X86/pr42870.ll b/llvm/test/CodeGen/X86/pr42870.ll
index 479ac55beb355..9b455da4f2918 100644
--- a/llvm/test/CodeGen/X86/pr42870.ll
+++ b/llvm/test/CodeGen/X86/pr42870.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=sse | FileCheck %s
define i32 @test_load(ptr %a) {
; CHECK-LABEL: test_load:
diff --git a/llvm/test/CodeGen/X86/pr42909.ll b/llvm/test/CodeGen/X86/pr42909.ll
index 8ff7caf463854..8e8b97991c3cf 100644
--- a/llvm/test/CodeGen/X86/pr42909.ll
+++ b/llvm/test/CodeGen/X86/pr42909.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s
define void @autogen_SD31033(ptr %a0) {
; CHECK-LABEL: autogen_SD31033:
diff --git a/llvm/test/CodeGen/X86/pr42992.ll b/llvm/test/CodeGen/X86/pr42992.ll
index f85b5921b1086..f6e34e969d9fd 100644
--- a/llvm/test/CodeGen/X86/pr42992.ll
+++ b/llvm/test/CodeGen/X86/pr42992.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=bmi2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=bmi2 | FileCheck %s
define i32 @hoge(i32 %a) {
; CHECK-LABEL: hoge:
diff --git a/llvm/test/CodeGen/X86/pr42998.ll b/llvm/test/CodeGen/X86/pr42998.ll
index 394088476d771..a7d9f3588099c 100644
--- a/llvm/test/CodeGen/X86/pr42998.ll
+++ b/llvm/test/CodeGen/X86/pr42998.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=CHECK,FAST-INCDEC
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=goldmont | FileCheck %s --check-prefixes=CHECK,SLOW-INCDEC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=CHECK,FAST-INCDEC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=goldmont | FileCheck %s --check-prefixes=CHECK,SLOW-INCDEC
define i64 @imm1_Oz(i32 %x, i32 %y) minsize nounwind {
; CHECK-LABEL: imm1_Oz:
diff --git a/llvm/test/CodeGen/X86/pr43157.ll b/llvm/test/CodeGen/X86/pr43157.ll
index 308a8b91d859e..0064cebd0c334 100644
--- a/llvm/test/CodeGen/X86/pr43157.ll
+++ b/llvm/test/CodeGen/X86/pr43157.ll
@@ -1,5 +1,5 @@
-; RUN: not llc < %s -mtriple=i686-pc-linux -o - -mattr=+sse2 2>&1 | FileCheck %s --check-prefix=ERR
-; RUN: llc < %s -mtriple=x86_64-pc-linux -o - -mattr=+mmx | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux -o - -mattr=+sse2 2>&1 | FileCheck %s --check-prefix=ERR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -o - -mattr=+mmx | FileCheck %s
; ERR: error: couldn't allocate input reg for constraint 'x'
define void @foo(fp128 %x) {
diff --git a/llvm/test/CodeGen/X86/pr43507.ll b/llvm/test/CodeGen/X86/pr43507.ll
index 24c27fbd7f8d3..9fb1cba5f6a22 100644
--- a/llvm/test/CodeGen/X86/pr43507.ll
+++ b/llvm/test/CodeGen/X86/pr43507.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s
define <8 x i1> @ham(i64 %arg) {
; CHECK-LABEL: ham:
diff --git a/llvm/test/CodeGen/X86/pr43509.ll b/llvm/test/CodeGen/X86/pr43509.ll
index a29fe4c6a0465..8604b243df4a8 100644
--- a/llvm/test/CodeGen/X86/pr43509.ll
+++ b/llvm/test/CodeGen/X86/pr43509.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s
define <8 x i8> @foo(<8 x float> %arg) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr43529.ll b/llvm/test/CodeGen/X86/pr43529.ll
index ac5f7c84f82c3..d24e565f69c66 100644
--- a/llvm/test/CodeGen/X86/pr43529.ll
+++ b/llvm/test/CodeGen/X86/pr43529.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
define i32 @a() nounwind {
; CHECK-LABEL: a:
diff --git a/llvm/test/CodeGen/X86/pr43575.ll b/llvm/test/CodeGen/X86/pr43575.ll
index 00c70c6970972..849212f2f65e9 100644
--- a/llvm/test/CodeGen/X86/pr43575.ll
+++ b/llvm/test/CodeGen/X86/pr43575.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.14.0 -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.14.0 -O0 | FileCheck %s
define void @exit(i32 %status)
; CHECK-LABEL: exit:
diff --git a/llvm/test/CodeGen/X86/pr43820.ll b/llvm/test/CodeGen/X86/pr43820.ll
index bf553c02fea3f..4469d33bfab14 100644
--- a/llvm/test/CodeGen/X86/pr43820.ll
+++ b/llvm/test/CodeGen/X86/pr43820.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define i1000 @square(i1000 %A) nounwind {
; CHECK-LABEL: square:
diff --git a/llvm/test/CodeGen/X86/pr43866.ll b/llvm/test/CodeGen/X86/pr43866.ll
index 20eedbc942277..2fb451fec063e 100644
--- a/llvm/test/CodeGen/X86/pr43866.ll
+++ b/llvm/test/CodeGen/X86/pr43866.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s
@v2_0 = dso_local global <2 x i32> zeroinitializer, align 8
diff --git a/llvm/test/CodeGen/X86/pr43952.ll b/llvm/test/CodeGen/X86/pr43952.ll
index 8e1425c281ccb..61703a538b840 100644
--- a/llvm/test/CodeGen/X86/pr43952.ll
+++ b/llvm/test/CodeGen/X86/pr43952.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.14.0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.14.0 | FileCheck %s
define void @x() {
; CHECK-LABEL: x:
diff --git a/llvm/test/CodeGen/X86/pr44140.ll b/llvm/test/CodeGen/X86/pr44140.ll
index 02525d73a786d..e24e8beab3a8d 100644
--- a/llvm/test/CodeGen/X86/pr44140.ll
+++ b/llvm/test/CodeGen/X86/pr44140.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=znver1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=znver1 | FileCheck %s
define win64cc void @opaque() {
; CHECK-LABEL: opaque:
diff --git a/llvm/test/CodeGen/X86/pr44396.ll b/llvm/test/CodeGen/X86/pr44396.ll
index e33c65fb35820..02173cccd6fb5 100644
--- a/llvm/test/CodeGen/X86/pr44396.ll
+++ b/llvm/test/CodeGen/X86/pr44396.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-macosx10.15.0 -mattr=+cmov | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-macosx10.15.0 -mattr=+cmov | FileCheck %s
@b = global i32 0, align 4
@a = global i64 0, align 8
diff --git a/llvm/test/CodeGen/X86/pr44749.ll b/llvm/test/CodeGen/X86/pr44749.ll
index e162015737d99..00d75123a0895 100644
--- a/llvm/test/CodeGen/X86/pr44749.ll
+++ b/llvm/test/CodeGen/X86/pr44749.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.15.0 -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.15.0 -O0 | FileCheck %s
define i32 @a() {
; CHECK-LABEL: a:
diff --git a/llvm/test/CodeGen/X86/pr44812.ll b/llvm/test/CodeGen/X86/pr44812.ll
index 7c4dc67dc9c0e..c8449c0535c5f 100644
--- a/llvm/test/CodeGen/X86/pr44812.ll
+++ b/llvm/test/CodeGen/X86/pr44812.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=cmov | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=cmov | FileCheck %s
define <2 x i32> @foo(<2 x i32> %tmp) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr44915.ll b/llvm/test/CodeGen/X86/pr44915.ll
index 99205ab60ae11..a001b20de1600 100644
--- a/llvm/test/CodeGen/X86/pr44915.ll
+++ b/llvm/test/CodeGen/X86/pr44915.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s --check-prefixes=X64
define i32 @extract3(ptr, i32) nounwind {
; X86-LABEL: extract3:
diff --git a/llvm/test/CodeGen/X86/pr45067.ll b/llvm/test/CodeGen/X86/pr45067.ll
index f8190aaa308f1..1cf34d8ea718b 100644
--- a/llvm/test/CodeGen/X86/pr45067.ll
+++ b/llvm/test/CodeGen/X86/pr45067.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skylake | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=skylake | FileCheck %s
@global = external global i32, align 4
diff --git a/llvm/test/CodeGen/X86/pr45378.ll b/llvm/test/CodeGen/X86/pr45378.ll
index 6a5770a4b4ad3..13ac992e50816 100644
--- a/llvm/test/CodeGen/X86/pr45378.ll
+++ b/llvm/test/CodeGen/X86/pr45378.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefixes=CHECK,AVX
declare i64 @llvm.vector.reduce.or.v2i64(<2 x i64>)
diff --git a/llvm/test/CodeGen/X86/pr45443.ll b/llvm/test/CodeGen/X86/pr45443.ll
index 193df2605c990..c62376bc92795 100644
--- a/llvm/test/CodeGen/X86/pr45443.ll
+++ b/llvm/test/CodeGen/X86/pr45443.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx512f | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s
define <16 x float> @PR45443() {
; CHECK-LABEL: PR45443:
diff --git a/llvm/test/CodeGen/X86/pr45563.ll b/llvm/test/CodeGen/X86/pr45563.ll
index 214ae56b50c01..18fddb79be6a8 100644
--- a/llvm/test/CodeGen/X86/pr45563.ll
+++ b/llvm/test/CodeGen/X86/pr45563.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -mtriple=x86_64-linux-generic -mattr=avx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -mtriple=x86_64-linux-generic -mattr=avx < %s | FileCheck %s
; Bug 45563:
; The LowerMLOAD() method AVX masked load branch should
diff --git a/llvm/test/CodeGen/X86/pr45995-2.ll b/llvm/test/CodeGen/X86/pr45995-2.ll
index 0ecb5137da857..f4853709c5e7c 100644
--- a/llvm/test/CodeGen/X86/pr45995-2.ll
+++ b/llvm/test/CodeGen/X86/pr45995-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 --x86-asm-syntax=intel -mtriple=x86_64 -mcpu=skylake-avx512 -mattr=fma,avx512f < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 --x86-asm-syntax=intel -mtriple=x86_64 -mcpu=skylake-avx512 -mattr=fma,avx512f < %s | FileCheck %s
define <4 x i1> @selecter(i64 %0) {
; CHECK-LABEL: selecter:
diff --git a/llvm/test/CodeGen/X86/pr45995.ll b/llvm/test/CodeGen/X86/pr45995.ll
index 997ad6be84b9d..439c677b677a5 100644
--- a/llvm/test/CodeGen/X86/pr45995.ll
+++ b/llvm/test/CodeGen/X86/pr45995.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 --x86-asm-syntax=intel -mtriple=x86_64 -mattr=avx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 --x86-asm-syntax=intel -mtriple=x86_64 -mattr=avx < %s | FileCheck %s
define void @extracter0([4 x <4 x i1>] %matrix) nounwind {
; CHECK-LABEL: extracter0:
diff --git a/llvm/test/CodeGen/X86/pr46004.ll b/llvm/test/CodeGen/X86/pr46004.ll
index 829d6dfceba3d..0d0eef9813250 100644
--- a/llvm/test/CodeGen/X86/pr46004.ll
+++ b/llvm/test/CodeGen/X86/pr46004.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
; OSS Fuzz: https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=22357
define void @fuzz22357(i128 %a0) {
diff --git a/llvm/test/CodeGen/X86/pr46189.ll b/llvm/test/CodeGen/X86/pr46189.ll
index 40b2738b5e783..6a8b150b6fbf1 100644
--- a/llvm/test/CodeGen/X86/pr46189.ll
+++ b/llvm/test/CodeGen/X86/pr46189.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
define { i64, i64 } @PR46189(double %0, double %1, double %2, double %3, double %4) {
; SSE-LABEL: PR46189:
diff --git a/llvm/test/CodeGen/X86/pr46315.ll b/llvm/test/CodeGen/X86/pr46315.ll
index e42c19fb404b6..8e8321f3d3ad9 100644
--- a/llvm/test/CodeGen/X86/pr46315.ll
+++ b/llvm/test/CodeGen/X86/pr46315.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define void @PR46315() {
; CHECK-LABEL: PR46315:
diff --git a/llvm/test/CodeGen/X86/pr46532.ll b/llvm/test/CodeGen/X86/pr46532.ll
index cbc677229ede6..049d7ab419a83 100644
--- a/llvm/test/CodeGen/X86/pr46532.ll
+++ b/llvm/test/CodeGen/X86/pr46532.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mcpu=haswell | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mcpu=haswell | FileCheck %s
define void @WhileWithLoopInvariantOperation.21() {
; CHECK-LABEL: WhileWithLoopInvariantOperation.21:
diff --git a/llvm/test/CodeGen/X86/pr46585.ll b/llvm/test/CodeGen/X86/pr46585.ll
index 2ddf096683b7b..702985e55f731 100644
--- a/llvm/test/CodeGen/X86/pr46585.ll
+++ b/llvm/test/CodeGen/X86/pr46585.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx | FileCheck %s
@global = external local_unnamed_addr global i8
@global.1 = external local_unnamed_addr global i64
diff --git a/llvm/test/CodeGen/X86/pr46827.ll b/llvm/test/CodeGen/X86/pr46827.ll
index fa3ff064ea115..3db073ab4d27c 100644
--- a/llvm/test/CodeGen/X86/pr46827.ll
+++ b/llvm/test/CodeGen/X86/pr46827.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux -mattr=+rtm -verify-machineinstrs -stop-after=finalize-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux -mattr=+rtm -verify-machineinstrs -stop-after=finalize-isel | FileCheck %s
; CHECK: body: |
; CHECK: bb.0.bb107:
diff --git a/llvm/test/CodeGen/X86/pr47000.ll b/llvm/test/CodeGen/X86/pr47000.ll
index c0cd5a8d7f50c..5c7de23fc1310 100644
--- a/llvm/test/CodeGen/X86/pr47000.ll
+++ b/llvm/test/CodeGen/X86/pr47000.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=pentium4 -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=pentium4 -O0 | FileCheck %s
target datalayout = "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i386-unknown-linux-unknown"
diff --git a/llvm/test/CodeGen/X86/pr47024.ll b/llvm/test/CodeGen/X86/pr47024.ll
index 230c986801621..a0c04a474f1f1 100644
--- a/llvm/test/CodeGen/X86/pr47024.ll
+++ b/llvm/test/CodeGen/X86/pr47024.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define void @_Z4testv() {
; CHECK-LABEL: _Z4testv:
diff --git a/llvm/test/CodeGen/X86/pr47299.ll b/llvm/test/CodeGen/X86/pr47299.ll
index 7cb1112402ebe..1acad94dd77af 100644
--- a/llvm/test/CodeGen/X86/pr47299.ll
+++ b/llvm/test/CodeGen/X86/pr47299.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -x86-asm-syntax=intel -mtriple=x86_64 -mcpu=skylake-avx512 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -x86-asm-syntax=intel -mtriple=x86_64 -mcpu=skylake-avx512 < %s | FileCheck %s
declare <7 x i1> @llvm.get.active.lane.mask.v7i1.i64(i64, i64)
declare <16 x i1> @llvm.get.active.lane.mask.v16i1.i64(i64, i64)
diff --git a/llvm/test/CodeGen/X86/pr47482.ll b/llvm/test/CodeGen/X86/pr47482.ll
index 8fd43d6749964..78052df939ee0 100644
--- a/llvm/test/CodeGen/X86/pr47482.ll
+++ b/llvm/test/CodeGen/X86/pr47482.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=bmi | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=bmi | FileCheck %s
@a = external dso_local local_unnamed_addr global i32, align 4
@f = external dso_local local_unnamed_addr global i32, align 4
diff --git a/llvm/test/CodeGen/X86/pr47857.ll b/llvm/test/CodeGen/X86/pr47857.ll
index 419e839a5d974..36667c2d72a03 100644
--- a/llvm/test/CodeGen/X86/pr47857.ll
+++ b/llvm/test/CodeGen/X86/pr47857.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s
%"struct.std::array" = type { [4 x i64] }
diff --git a/llvm/test/CodeGen/X86/pr47874.ll b/llvm/test/CodeGen/X86/pr47874.ll
index ce3aaca59fae8..a1fce6ea925d9 100644
--- a/llvm/test/CodeGen/X86/pr47874.ll
+++ b/llvm/test/CodeGen/X86/pr47874.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin19.6.0 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin19.6.0 -mattr=avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin19.6.0 -mattr=avx512f | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin19.6.0 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin19.6.0 -mattr=avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin19.6.0 -mattr=avx512f | FileCheck %s --check-prefix=AVX
define void @a(ptr %arg, i32 %arg1) {
; SSE2-LABEL: a:
diff --git a/llvm/test/CodeGen/X86/pr48215.ll b/llvm/test/CodeGen/X86/pr48215.ll
index 8843a0410a9f7..10b5910de8956 100644
--- a/llvm/test/CodeGen/X86/pr48215.ll
+++ b/llvm/test/CodeGen/X86/pr48215.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefixes=AVX1
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefixes=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512vl | FileCheck %s --check-prefixes=AVX512
; FIXME: Ensure when we merge broadcasts to different widths that they come from the same SDValue.
define i32 @PR48215(i32 %a0, i32 %a1) {
diff --git a/llvm/test/CodeGen/X86/pr48458.ll b/llvm/test/CodeGen/X86/pr48458.ll
index 76060d5c62994..863eae91db19c 100644
--- a/llvm/test/CodeGen/X86/pr48458.ll
+++ b/llvm/test/CodeGen/X86/pr48458.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define i1 @foo(ptr %0) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr48727.ll b/llvm/test/CodeGen/X86/pr48727.ll
index 8a8f53c4f5bdb..c54229ab0f3a1 100644
--- a/llvm/test/CodeGen/X86/pr48727.ll
+++ b/llvm/test/CodeGen/X86/pr48727.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=skx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=skx | FileCheck %s
define void @PR48727() {
; CHECK-LABEL: PR48727:
diff --git a/llvm/test/CodeGen/X86/pr48888.ll b/llvm/test/CodeGen/X86/pr48888.ll
index 5e850e5690e0d..f6ddcab7dc0c5 100644
--- a/llvm/test/CodeGen/X86/pr48888.ll
+++ b/llvm/test/CodeGen/X86/pr48888.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define void @test(ptr %p) nounwind {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/pr49028.ll b/llvm/test/CodeGen/X86/pr49028.ll
index 8df070356bb89..9c5643cb943a5 100644
--- a/llvm/test/CodeGen/X86/pr49028.ll
+++ b/llvm/test/CodeGen/X86/pr49028.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define zeroext i16 @PR49028(i16 zeroext %0, ptr %1) {
; X86-LABEL: PR49028:
diff --git a/llvm/test/CodeGen/X86/pr49076.ll b/llvm/test/CodeGen/X86/pr49076.ll
index 38235b8d2dbc4..77bf663a5738f 100644
--- a/llvm/test/CodeGen/X86/pr49076.ll
+++ b/llvm/test/CodeGen/X86/pr49076.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -O0 -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -O0 -mattr=avx | FileCheck %s
define void @foo() {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr49393.ll b/llvm/test/CodeGen/X86/pr49393.ll
index 512177246b5d9..4178b13884302 100644
--- a/llvm/test/CodeGen/X86/pr49393.ll
+++ b/llvm/test/CodeGen/X86/pr49393.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define void @f() {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/pr49467.ll b/llvm/test/CodeGen/X86/pr49467.ll
index 078a47de2f59f..79ab2ad2cadcc 100644
--- a/llvm/test/CodeGen/X86/pr49467.ll
+++ b/llvm/test/CodeGen/X86/pr49467.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 -fast-isel -verify-machineinstrs -mtriple=x86_64 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -fast-isel -verify-machineinstrs -mtriple=x86_64 < %s | FileCheck %s
declare { ptr, i64 } @get()
diff --git a/llvm/test/CodeGen/X86/pr49587.ll b/llvm/test/CodeGen/X86/pr49587.ll
index 7dc54a526608c..8a74d6ba00c71 100644
--- a/llvm/test/CodeGen/X86/pr49587.ll
+++ b/llvm/test/CodeGen/X86/pr49587.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 -fast-isel -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -fast-isel -mtriple=x86_64-- < %s | FileCheck %s
define i32 @test(i64 %arg) nounwind {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/pr50254.ll b/llvm/test/CodeGen/X86/pr50254.ll
index e34c4c0beafe8..fd00b9b336c81 100644
--- a/llvm/test/CodeGen/X86/pr50254.ll
+++ b/llvm/test/CodeGen/X86/pr50254.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
@d.e = external dso_local unnamed_addr global i32, align 4
diff --git a/llvm/test/CodeGen/X86/pr50374.ll b/llvm/test/CodeGen/X86/pr50374.ll
index edb52c6e27bb6..5a3f8371aed08 100644
--- a/llvm/test/CodeGen/X86/pr50374.ll
+++ b/llvm/test/CodeGen/X86/pr50374.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s
define void @PR50374() {
; CHECK-LABEL: PR50374:
diff --git a/llvm/test/CodeGen/X86/pr50709.ll b/llvm/test/CodeGen/X86/pr50709.ll
index cb1b527e84a39..4d0ac78a9bdea 100644
--- a/llvm/test/CodeGen/X86/pr50709.ll
+++ b/llvm/test/CodeGen/X86/pr50709.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define <6 x i32> @foo(<6 x i16> %x, <6 x i16> %y) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr50782.ll b/llvm/test/CodeGen/X86/pr50782.ll
index 591a33446d4e3..3f9d1bc5e899f 100644
--- a/llvm/test/CodeGen/X86/pr50782.ll
+++ b/llvm/test/CodeGen/X86/pr50782.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-w64-windows-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-w64-windows-gnu | FileCheck %s
@a = global i32 0, align 4
@b = global float 0.000000e+00, align 4
diff --git a/llvm/test/CodeGen/X86/pr50823.ll b/llvm/test/CodeGen/X86/pr50823.ll
index d042737e4d6a7..9474f1a28790f 100644
--- a/llvm/test/CodeGen/X86/pr50823.ll
+++ b/llvm/test/CodeGen/X86/pr50823.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s
%v8_uniform_FVector3 = type { float, float, float }
diff --git a/llvm/test/CodeGen/X86/pr50907.ll b/llvm/test/CodeGen/X86/pr50907.ll
index c6af54d5ab8b4..29d5e82eaf663 100644
--- a/llvm/test/CodeGen/X86/pr50907.ll
+++ b/llvm/test/CodeGen/X86/pr50907.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: not llc -o /dev/null %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -o /dev/null %s 2>&1 | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
; CHECK: error: couldn't allocate input reg for constraint 'r'
diff --git a/llvm/test/CodeGen/X86/pr51175.ll b/llvm/test/CodeGen/X86/pr51175.ll
index da0c12be8565a..cc12c13d0fe98 100644
--- a/llvm/test/CodeGen/X86/pr51175.ll
+++ b/llvm/test/CodeGen/X86/pr51175.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; The and with -9 has multiple users which prevents
; SimplifyDemandedBits from touching it. The truncate only
diff --git a/llvm/test/CodeGen/X86/pr51281.ll b/llvm/test/CodeGen/X86/pr51281.ll
index 3812f3fb448cd..aaefe9969bfa4 100644
--- a/llvm/test/CodeGen/X86/pr51281.ll
+++ b/llvm/test/CodeGen/X86/pr51281.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_mem_shuffle
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
; CHECK: .LCPI0_0:
; CHECK-NEXT: .long 0x00000000
diff --git a/llvm/test/CodeGen/X86/pr5145.ll b/llvm/test/CodeGen/X86/pr5145.ll
index 5cb0ac9bc9821..dcd9a9fb6558b 100644
--- a/llvm/test/CodeGen/X86/pr5145.ll
+++ b/llvm/test/CodeGen/X86/pr5145.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s | FileCheck %s
@sc8 = external dso_local global i8
define void @atomic_maxmin_i8() {
diff --git a/llvm/test/CodeGen/X86/pr51878_computeAliasing.ll b/llvm/test/CodeGen/X86/pr51878_computeAliasing.ll
index cf50d0fd5ceef..87e465c9c0694 100644
--- a/llvm/test/CodeGen/X86/pr51878_computeAliasing.ll
+++ b/llvm/test/CodeGen/X86/pr51878_computeAliasing.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O1 -mtriple i686-unknown-linux-gnu -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O1 -mtriple i686-unknown-linux-gnu -o - %s | FileCheck %s
@foo = global i16 0, align 1
@aliasFoo = alias i16, ptr @foo
diff --git a/llvm/test/CodeGen/X86/pr52567.ll b/llvm/test/CodeGen/X86/pr52567.ll
index d2815286f8674..ae5a12e9e8797 100644
--- a/llvm/test/CodeGen/X86/pr52567.ll
+++ b/llvm/test/CodeGen/X86/pr52567.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; The and in the test below discards half the bits from vector icmp result.
; We use a testb after a pmovmskb to examine only 8 bits.
diff --git a/llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll b/llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll
index 333eff8fb0081..b2d74c3175370 100644
--- a/llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll
+++ b/llvm/test/CodeGen/X86/pr53243-tail-call-fastisel.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 -fast-isel -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -fast-isel -mtriple=x86_64-- < %s | FileCheck %s
define void @test() {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/pr53247.ll b/llvm/test/CodeGen/X86/pr53247.ll
index cb5e699c8da5e..01909278a2d73 100644
--- a/llvm/test/CodeGen/X86/pr53247.ll
+++ b/llvm/test/CodeGen/X86/pr53247.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
define i32 @PR53247(){
; SSE-LABEL: PR53247:
diff --git a/llvm/test/CodeGen/X86/pr53990-incorrect-machine-sink.ll b/llvm/test/CodeGen/X86/pr53990-incorrect-machine-sink.ll
index f2f6e6934abeb..c46c3eae8d8c2 100644
--- a/llvm/test/CodeGen/X86/pr53990-incorrect-machine-sink.ll
+++ b/llvm/test/CodeGen/X86/pr53990-incorrect-machine-sink.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s | FileCheck %s
declare void @clobber()
diff --git a/llvm/test/CodeGen/X86/pr54369.ll b/llvm/test/CodeGen/X86/pr54369.ll
index a771cde2253ef..487b9c017d61b 100644
--- a/llvm/test/CodeGen/X86/pr54369.ll
+++ b/llvm/test/CodeGen/X86/pr54369.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-- -O0 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-- -O0 -mattr=+zu < %s | FileCheck %s -check-prefix=SETZUCC
-; RUN: llc -mtriple=x86_64-- -O0 -mattr=+zu,+prefer-legacy-setcc < %s | FileCheck %s -check-prefix=NO-SETZUCC
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O0 -mattr=+zu < %s | FileCheck %s -check-prefix=SETZUCC
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -O0 -mattr=+zu,+prefer-legacy-setcc < %s | FileCheck %s -check-prefix=NO-SETZUCC
define i64 @adder(i64 %lhs, i64 %rhs) {
; CHECK-LABEL: adder:
diff --git a/llvm/test/CodeGen/X86/pr55158.ll b/llvm/test/CodeGen/X86/pr55158.ll
index 472298353d181..3c943feb7da51 100644
--- a/llvm/test/CodeGen/X86/pr55158.ll
+++ b/llvm/test/CodeGen/X86/pr55158.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=ivybridge -mattr=+avx2 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=haswell | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=ivybridge -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=haswell | FileCheck %s
define <2 x i64> @PR55158(ptr %0) {
; CHECK-LABEL: PR55158:
diff --git a/llvm/test/CodeGen/X86/pr55271.ll b/llvm/test/CodeGen/X86/pr55271.ll
index 3ffa6cf4acb80..96ce2ee70d520 100644
--- a/llvm/test/CodeGen/X86/pr55271.ll
+++ b/llvm/test/CodeGen/X86/pr55271.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; abs(undef) should fold to 0 not undef.
diff --git a/llvm/test/CodeGen/X86/pr55648.ll b/llvm/test/CodeGen/X86/pr55648.ll
index da62b07915c86..f86b18e0b71b8 100644
--- a/llvm/test/CodeGen/X86/pr55648.ll
+++ b/llvm/test/CodeGen/X86/pr55648.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define void @PR55648() #0 {
; CHECK-LABEL: PR55648:
diff --git a/llvm/test/CodeGen/X86/pr55846.ll b/llvm/test/CodeGen/X86/pr55846.ll
index 638865ad7b3b3..cde24c73bcb00 100644
--- a/llvm/test/CodeGen/X86/pr55846.ll
+++ b/llvm/test/CodeGen/X86/pr55846.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
; After legalization, this could be: "i8 truncate (i64 AssertZext X, Type: i9)"
; The AssertZext does not add information, so it should be eliminated,
diff --git a/llvm/test/CodeGen/X86/pr56170.ll b/llvm/test/CodeGen/X86/pr56170.ll
index dfd9391cdd54c..2eaf31cce4048 100644
--- a/llvm/test/CodeGen/X86/pr56170.ll
+++ b/llvm/test/CodeGen/X86/pr56170.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-generic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-generic < %s | FileCheck %s
define void @reassociation_gt64bit(i32 %x, i32 %y, ptr %s) {
; CHECK-LABEL: reassociation_gt64bit:
diff --git a/llvm/test/CodeGen/X86/pr56351.ll b/llvm/test/CodeGen/X86/pr56351.ll
index 4ec58f7c1ad1d..7f42bf7f912b2 100644
--- a/llvm/test/CodeGen/X86/pr56351.ll
+++ b/llvm/test/CodeGen/X86/pr56351.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+soft-float | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+soft-float | FileCheck %s
define i1 @foo(ptr %x, ptr %y) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr57283.ll b/llvm/test/CodeGen/X86/pr57283.ll
index 25e5ac72ab70c..598036d4f775a 100644
--- a/llvm/test/CodeGen/X86/pr57283.ll
+++ b/llvm/test/CodeGen/X86/pr57283.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
define void @PR57283() nounwind {
; X86-LABEL: PR57283:
diff --git a/llvm/test/CodeGen/X86/pr57474.ll b/llvm/test/CodeGen/X86/pr57474.ll
index 80f40039eccf0..58a31d77e3523 100644
--- a/llvm/test/CodeGen/X86/pr57474.ll
+++ b/llvm/test/CodeGen/X86/pr57474.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define void @PR57474() nounwind {
; CHECK-LABEL: PR57474:
diff --git a/llvm/test/CodeGen/X86/pr57554.ll b/llvm/test/CodeGen/X86/pr57554.ll
index 0eb40979c3552..b74ba79347ca4 100644
--- a/llvm/test/CodeGen/X86/pr57554.ll
+++ b/llvm/test/CodeGen/X86/pr57554.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
@a = external dso_local local_unnamed_addr global i8, align 1
diff --git a/llvm/test/CodeGen/X86/pr57576.ll b/llvm/test/CodeGen/X86/pr57576.ll
index b44eaf3c041be..2dc78b351f8c0 100644
--- a/llvm/test/CodeGen/X86/pr57576.ll
+++ b/llvm/test/CodeGen/X86/pr57576.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define { i64, i64 } @sub(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3) {
; CHECK-LABEL: sub:
diff --git a/llvm/test/CodeGen/X86/pr57673.ll b/llvm/test/CodeGen/X86/pr57673.ll
index 4cb8450e85c25..7d6a62a632bb4 100644
--- a/llvm/test/CodeGen/X86/pr57673.ll
+++ b/llvm/test/CodeGen/X86/pr57673.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after=x86-optimize-leas -experimental-debug-variable-locations=false < %s \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after=x86-optimize-leas -experimental-debug-variable-locations=false < %s \
; RUN: | FileCheck %s --check-prefix=NORMAL
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after=x86-optimize-leas -experimental-debug-variable-locations < %s \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -stop-after=x86-optimize-leas -experimental-debug-variable-locations < %s \
; RUN: | FileCheck %s --check-prefix=INSTRREF
; The LEA optimization pass used to crash on this testcase.
diff --git a/llvm/test/CodeGen/X86/pr58685.ll b/llvm/test/CodeGen/X86/pr58685.ll
index c63150e6ef608..efda8f2e2666a 100644
--- a/llvm/test/CodeGen/X86/pr58685.ll
+++ b/llvm/test/CodeGen/X86/pr58685.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i1 @lock_add_sete(ptr %0, i32 %1) nounwind {
; CHECK-LABEL: lock_add_sete:
diff --git a/llvm/test/CodeGen/X86/pr59258.ll b/llvm/test/CodeGen/X86/pr59258.ll
index e5f5ca71739df..f4caeb74cf6a4 100644
--- a/llvm/test/CodeGen/X86/pr59258.ll
+++ b/llvm/test/CodeGen/X86/pr59258.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define <8 x half> @cvt_and_clamp2(<8 x float>) nounwind {
; CHECK-LABEL: cvt_and_clamp2:
diff --git a/llvm/test/CodeGen/X86/pr59305.ll b/llvm/test/CodeGen/X86/pr59305.ll
index d8738081842a3..14ade77a01884 100644
--- a/llvm/test/CodeGen/X86/pr59305.ll
+++ b/llvm/test/CodeGen/X86/pr59305.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: sed -e "s/SETROUND/ldmxcsr/g" %s | llc -mtriple=x86_64-pc-linux - | FileCheck %s --check-prefix=X64
-; RUN: sed -e "s/SETROUND/fldcw/g" %s | llc -mtriple=i686-pc-linux - | FileCheck %s --check-prefix=X86
+; RUN: sed -e "s/SETROUND/ldmxcsr/g" %s | llc -combiner-topological-sorting -mtriple=x86_64-pc-linux - | FileCheck %s --check-prefix=X64
+; RUN: sed -e "s/SETROUND/fldcw/g" %s | llc -combiner-topological-sorting -mtriple=i686-pc-linux - | FileCheck %s --check-prefix=X86
define double @foo(double %0) #0 {
; X64-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/pr61038.ll b/llvm/test/CodeGen/X86/pr61038.ll
index 82418cf5946a4..a4a466636a6a9 100644
--- a/llvm/test/CodeGen/X86/pr61038.ll
+++ b/llvm/test/CodeGen/X86/pr61038.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 | FileCheck %s --check-prefix=CHECK-BMI2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefix=CHECK-BMI2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefix=CHECK-BMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 | FileCheck %s --check-prefix=CHECK-BMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefix=CHECK-BMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefix=CHECK-BMI
declare i32 @llvm.cttz.i32(i32, i1 immarg)
define void @test_61038(ptr %tmp_buffer) {
diff --git a/llvm/test/CodeGen/X86/pr61348.ll b/llvm/test/CodeGen/X86/pr61348.ll
index f17cbf3b62583..a06f48ae2a7da 100644
--- a/llvm/test/CodeGen/X86/pr61348.ll
+++ b/llvm/test/CodeGen/X86/pr61348.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define i32 @PR61348() optsize {
; CHECK-LABEL: PR61348:
diff --git a/llvm/test/CodeGen/X86/pr61384.ll b/llvm/test/CodeGen/X86/pr61384.ll
index 1bdb13ca71e69..9a28b13e09c97 100644
--- a/llvm/test/CodeGen/X86/pr61384.ll
+++ b/llvm/test/CodeGen/X86/pr61384.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -show-mc-encoding < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -show-mc-encoding < %s | FileCheck %s
@a = external dso_local global { { i64 } }
diff --git a/llvm/test/CodeGen/X86/pr61524.ll b/llvm/test/CodeGen/X86/pr61524.ll
index 0f4ccd6498fef..21af5aeeb7cb1 100644
--- a/llvm/test/CodeGen/X86/pr61524.ll
+++ b/llvm/test/CodeGen/X86/pr61524.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s --mtriple=x86_64-- -mcpu=cascadelake | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s --mtriple=x86_64-- -mcpu=cascadelake | FileCheck %s
define <3 x i1> @repro(i1 %cond) {
; CHECK-LABEL: repro:
diff --git a/llvm/test/CodeGen/X86/pr61964.ll b/llvm/test/CodeGen/X86/pr61964.ll
index 1949841ea216b..882c55bce52f7 100644
--- a/llvm/test/CodeGen/X86/pr61964.ll
+++ b/llvm/test/CodeGen/X86/pr61964.ll
@@ -1,13 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX1OR2,AVX2OR512VL,AVX2,AVX2-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX1OR2,AVX2OR512VL,AVX2,AVX2-FAST,AVX2-FAST-ALL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX1OR2,AVX2OR512VL,AVX2,AVX2-FAST,AVX2-FAST-PERLANE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX2OR512VL,AVX512VL,AVX512VL-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX2OR512VL,AVX512VL,AVX512VL-FAST,AVX512VL-FAST-CROSSLANE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX2OR512VL,AVX512VL,AVX512VL-FAST,AVX512VL-FAST-PERLANE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=ALL,XOP,XOPAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=ALL,XOP,XOPAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX1OR2,AVX2OR512VL,AVX2,AVX2-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX1OR2,AVX2OR512VL,AVX2,AVX2-FAST,AVX2-FAST-ALL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX1OR2,AVX2OR512VL,AVX2,AVX2-FAST,AVX2-FAST-PERLANE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX2OR512VL,AVX512VL,AVX512VL-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX2OR512VL,AVX512VL,AVX512VL-FAST,AVX512VL-FAST-CROSSLANE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX2OR512VL,AVX512VL,AVX512VL-FAST,AVX512VL-FAST-PERLANE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=ALL,XOP,XOPAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=ALL,XOP,XOPAVX2
define { <8 x i32>, <8 x i32> } @splitTransposeDecode_8_avx2(<16 x i16> %a, <16 x i16> %b) {
; AVX1-LABEL: splitTransposeDecode_8_avx2:
diff --git a/llvm/test/CodeGen/X86/pr62014.ll b/llvm/test/CodeGen/X86/pr62014.ll
index 19a6962731b6a..c9b8692694809 100644
--- a/llvm/test/CodeGen/X86/pr62014.ll
+++ b/llvm/test/CodeGen/X86/pr62014.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE42
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512F
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,avx512vl | FileCheck %s --check-prefixes=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,avx512vl | FileCheck %s --check-prefixes=AVX512VL
define <2 x i64> @select_cast_cond_multiuse_v2i64(<2 x i64> %x, <2 x i64> %y, i2 %m, ptr %o) {
; SSE2-LABEL: select_cast_cond_multiuse_v2i64:
diff --git a/llvm/test/CodeGen/X86/pr62242.ll b/llvm/test/CodeGen/X86/pr62242.ll
index 2753a18bfc122..13445a7592f0e 100644
--- a/llvm/test/CodeGen/X86/pr62242.ll
+++ b/llvm/test/CodeGen/X86/pr62242.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
define <4 x i32> @unpck_permute_canonicalized_mask(<4 x i32> %a, <4 x i32> %b) {
; AVX2-LABEL: unpck_permute_canonicalized_mask:
diff --git a/llvm/test/CodeGen/X86/pr62653.ll b/llvm/test/CodeGen/X86/pr62653.ll
index b6a1bf47983dc..80c3ec1b9532f 100644
--- a/llvm/test/CodeGen/X86/pr62653.ll
+++ b/llvm/test/CodeGen/X86/pr62653.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define <64 x i4> @pr62653(<64 x i4> %a0) nounwind {
; CHECK-LABEL: pr62653:
diff --git a/llvm/test/CodeGen/X86/pr63091.ll b/llvm/test/CodeGen/X86/pr63091.ll
index 3f50be8ab8df9..596e0ae9af0d8 100644
--- a/llvm/test/CodeGen/X86/pr63091.ll
+++ b/llvm/test/CodeGen/X86/pr63091.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
; Ensure canonicalizeShuffleWithBinOps doesn't merge binops with different types
diff --git a/llvm/test/CodeGen/X86/pr63108.ll b/llvm/test/CodeGen/X86/pr63108.ll
index b5b80515fc6d9..33484adbd316d 100644
--- a/llvm/test/CodeGen/X86/pr63108.ll
+++ b/llvm/test/CodeGen/X86/pr63108.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
define i32 @PR63108() {
; SSE-LABEL: PR63108:
diff --git a/llvm/test/CodeGen/X86/pr63430.ll b/llvm/test/CodeGen/X86/pr63430.ll
index 24d650d02be80..21e7c1d53605d 100644
--- a/llvm/test/CodeGen/X86/pr63430.ll
+++ b/llvm/test/CodeGen/X86/pr63430.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --version 2
-; RUN: llc -mtriple=x86_64-unknown-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux < %s | FileCheck %s
; Make sure the argument is read before the stack slot is over-written.
define i1 @test(ptr %a0, ptr %a1, ptr %a2, ptr %a3, ptr %a4, ptr %a5, i128 %x) {
diff --git a/llvm/test/CodeGen/X86/pr63475.ll b/llvm/test/CodeGen/X86/pr63475.ll
index 0052688b5aa13..716dffcf2868e 100644
--- a/llvm/test/CodeGen/X86/pr63475.ll
+++ b/llvm/test/CodeGen/X86/pr63475.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --version 2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
define void @caller() nounwind {
; CHECK-LABEL: caller:
diff --git a/llvm/test/CodeGen/X86/pr63507.ll b/llvm/test/CodeGen/X86/pr63507.ll
index 46f1038db19c6..c5806d30b132b 100644
--- a/llvm/test/CodeGen/X86/pr63507.ll
+++ b/llvm/test/CodeGen/X86/pr63507.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s
define <4 x i32> @PR63507() {
; CHECK-LABEL: PR63507:
diff --git a/llvm/test/CodeGen/X86/pr63645.ll b/llvm/test/CodeGen/X86/pr63645.ll
index 7ee418565ee63..ae2add51ae50f 100644
--- a/llvm/test/CodeGen/X86/pr63645.ll
+++ b/llvm/test/CodeGen/X86/pr63645.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
@p = dso_local local_unnamed_addr global i64 0, align 8
@l = dso_local local_unnamed_addr global ptr null, align 8
diff --git a/llvm/test/CodeGen/X86/pr63692.ll b/llvm/test/CodeGen/X86/pr63692.ll
index 8cbd24240e1d8..d910714faf8f4 100644
--- a/llvm/test/CodeGen/X86/pr63692.ll
+++ b/llvm/test/CodeGen/X86/pr63692.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define void @prefault(ptr noundef %range_start, ptr noundef readnone %range_end) {
; CHECK-LABEL: prefault:
diff --git a/llvm/test/CodeGen/X86/pr63790.ll b/llvm/test/CodeGen/X86/pr63790.ll
index e4e7a3c536d07..f157bb71f04bc 100644
--- a/llvm/test/CodeGen/X86/pr63790.ll
+++ b/llvm/test/CodeGen/X86/pr63790.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 | FileCheck %s
define void @f(ptr %0, i64 %1) {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/pr63975.ll b/llvm/test/CodeGen/X86/pr63975.ll
index 42895cbd8f43c..d022e696bdf1e 100644
--- a/llvm/test/CodeGen/X86/pr63975.ll
+++ b/llvm/test/CodeGen/X86/pr63975.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s
@g = external dso_local local_unnamed_addr global i16, align 2
@l = external dso_local local_unnamed_addr global [1 x i16], align 2
diff --git a/llvm/test/CodeGen/X86/pr64322.ll b/llvm/test/CodeGen/X86/pr64322.ll
index 7289232cff679..9932f6be7afc4 100644
--- a/llvm/test/CodeGen/X86/pr64322.ll
+++ b/llvm/test/CodeGen/X86/pr64322.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s
@G = global <1 x i1> <i1 true>
@G.1 = global i1 false
diff --git a/llvm/test/CodeGen/X86/pr64323.ll b/llvm/test/CodeGen/X86/pr64323.ll
index f9e60f2cabbde..5c6403bf3964e 100644
--- a/llvm/test/CodeGen/X86/pr64323.ll
+++ b/llvm/test/CodeGen/X86/pr64323.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64 -mcpu=icelake-server | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mcpu=icelake-server | FileCheck %s
define <1 x i1> @f(<1 x float> %0) nounwind {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/pr64439.ll b/llvm/test/CodeGen/X86/pr64439.ll
index 6e3d007dd78c9..da470f6013716 100644
--- a/llvm/test/CodeGen/X86/pr64439.ll
+++ b/llvm/test/CodeGen/X86/pr64439.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s
define void @f(ptr %0, <32 x i1> %1, i32 %2) nounwind {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/pr64589.ll b/llvm/test/CodeGen/X86/pr64589.ll
index d93d54f4c31d0..787c237f9bda3 100644
--- a/llvm/test/CodeGen/X86/pr64589.ll
+++ b/llvm/test/CodeGen/X86/pr64589.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s | FileCheck %s
; It's not possible to directly or the two loads together, because this might
; propagate a poison value from the second load (which has !range but not
diff --git a/llvm/test/CodeGen/X86/pr64655.ll b/llvm/test/CodeGen/X86/pr64655.ll
index f2929527c88f2..080d5a6ddfbbd 100644
--- a/llvm/test/CodeGen/X86/pr64655.ll
+++ b/llvm/test/CodeGen/X86/pr64655.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
define void @f(ptr %0) {
; AVX2-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/pr65895.ll b/llvm/test/CodeGen/X86/pr65895.ll
index 0990b10fa936d..974cc8fa5bf68 100644
--- a/llvm/test/CodeGen/X86/pr65895.ll
+++ b/llvm/test/CodeGen/X86/pr65895.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
@a = dso_local local_unnamed_addr global i16 0, align 2
@c = internal unnamed_addr global i1 false, align 1
diff --git a/llvm/test/CodeGen/X86/pr68068.ll b/llvm/test/CodeGen/X86/pr68068.ll
index 774b3e311f18e..8da74346e6fed 100644
--- a/llvm/test/CodeGen/X86/pr68068.ll
+++ b/llvm/test/CodeGen/X86/pr68068.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -fast-isel=1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -fast-isel=1 | FileCheck %s
define float @f() "target-features"="+avx512f" {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/pr68539.ll b/llvm/test/CodeGen/X86/pr68539.ll
index 5e3a7b8dbafb2..fb913a62d52dc 100644
--- a/llvm/test/CodeGen/X86/pr68539.ll
+++ b/llvm/test/CodeGen/X86/pr68539.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define i32 @main(i1 %arg) {
; CHECK-LABEL: main:
diff --git a/llvm/test/CodeGen/X86/pr69080.ll b/llvm/test/CodeGen/X86/pr69080.ll
index 1b27adcb1ae7c..7f4028e08f552 100644
--- a/llvm/test/CodeGen/X86/pr69080.ll
+++ b/llvm/test/CodeGen/X86/pr69080.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX
define { <4 x i1>, <4 x i1> } @uaddo(<4 x i1> %a) {
; SSE-LABEL: uaddo:
diff --git a/llvm/test/CodeGen/X86/pr69965.ll b/llvm/test/CodeGen/X86/pr69965.ll
index 33bea976c7896..6e83f69da19a3 100644
--- a/llvm/test/CodeGen/X86/pr69965.ll
+++ b/llvm/test/CodeGen/X86/pr69965.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
define i64 @PR69965(ptr %input_ptrs, ptr %output_ptrs) {
; X86-LABEL: PR69965:
diff --git a/llvm/test/CodeGen/X86/pr72539.ll b/llvm/test/CodeGen/X86/pr72539.ll
index fb4c98dca8cee..bc8a154d65473 100644
--- a/llvm/test/CodeGen/X86/pr72539.ll
+++ b/llvm/test/CodeGen/X86/pr72539.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX
define void @PR72539(<8 x i32> %insertelement){
; SSE-LABEL: PR72539:
diff --git a/llvm/test/CodeGen/X86/pr78109.ll b/llvm/test/CodeGen/X86/pr78109.ll
index 78b4885319b76..b40f0acf18cc8 100644
--- a/llvm/test/CodeGen/X86/pr78109.ll
+++ b/llvm/test/CodeGen/X86/pr78109.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX
; Check for failure to recognise undef elements in constant foldable splats
define <4 x i32> @PR78109() {
diff --git a/llvm/test/CodeGen/X86/pr7882.ll b/llvm/test/CodeGen/X86/pr7882.ll
index 5202e438b844c..a240bec7de9dc 100644
--- a/llvm/test/CodeGen/X86/pr7882.ll
+++ b/llvm/test/CodeGen/X86/pr7882.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin -pre-RA-sched=fast \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -pre-RA-sched=fast \
; RUN: | FileCheck %s
; make sure scheduler honors the flags clobber. PR 7882.
diff --git a/llvm/test/CodeGen/X86/pr85681.ll b/llvm/test/CodeGen/X86/pr85681.ll
index 3b27a0257ab43..65fd112163b6d 100644
--- a/llvm/test/CodeGen/X86/pr85681.ll
+++ b/llvm/test/CodeGen/X86/pr85681.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=emeraldrapids | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=emeraldrapids | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s
; PR85681 - shift i1/vXi1 X, Y -> X as only Y==0 is defined
diff --git a/llvm/test/CodeGen/X86/pr86305.ll b/llvm/test/CodeGen/X86/pr86305.ll
index 0d2e1abe8e5fc..89f3e380b7dcd 100644
--- a/llvm/test/CodeGen/X86/pr86305.ll
+++ b/llvm/test/CodeGen/X86/pr86305.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mattr=avx512bf16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mattr=avx512bf16 | FileCheck %s
define void @add(ptr %pa, ptr %pb, ptr %pc) nounwind {
; CHECK-LABEL: add:
diff --git a/llvm/test/CodeGen/X86/pr8925.ll b/llvm/test/CodeGen/X86/pr8925.ll
index 674c1bfd09ee3..f0222c377a434 100644
--- a/llvm/test/CodeGen/X86/pr8925.ll
+++ b/llvm/test/CodeGen/X86/pr8925.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
define fastcc i32* @force.ri32(i32* %x) nounwind {
; X86-LABEL: force.ri32:
diff --git a/llvm/test/CodeGen/X86/pr89877.ll b/llvm/test/CodeGen/X86/pr89877.ll
index ed85e7fe9fb60..beed4261fe5d3 100644
--- a/llvm/test/CodeGen/X86/pr89877.ll
+++ b/llvm/test/CodeGen/X86/pr89877.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64
define i32 @sext_known_nonzero(i16 %xx) {
; X86-LABEL: sext_known_nonzero:
diff --git a/llvm/test/CodeGen/X86/pr90668.ll b/llvm/test/CodeGen/X86/pr90668.ll
index e3aa638b850f2..7ad64bd353ac3 100644
--- a/llvm/test/CodeGen/X86/pr90668.ll
+++ b/llvm/test/CodeGen/X86/pr90668.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s
define i64 @off(i8 signext %a) {
; CHECK-LABEL: off:
diff --git a/llvm/test/CodeGen/X86/pr90703.ll b/llvm/test/CodeGen/X86/pr90703.ll
index c02342ffeec17..884de7521b348 100644
--- a/llvm/test/CodeGen/X86/pr90703.ll
+++ b/llvm/test/CodeGen/X86/pr90703.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi | FileCheck %s
define i64 @pr90730(i64 %x, i64 %y, ptr %p) {
; CHECK-LABEL: pr90730:
diff --git a/llvm/test/CodeGen/X86/pr90847.ll b/llvm/test/CodeGen/X86/pr90847.ll
index 11669f321704e..4f7944a6f26c2 100644
--- a/llvm/test/CodeGen/X86/pr90847.ll
+++ b/llvm/test/CodeGen/X86/pr90847.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefixes=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
; PR90847 - failure to peek through FREEZE(SETCC()) results in VPMOVSMSKB(TRUNC()) instead of VMOVMSKPS
diff --git a/llvm/test/CodeGen/X86/pr9127.ll b/llvm/test/CodeGen/X86/pr9127.ll
index 4d21bd790954d..24c4f8a8d206b 100644
--- a/llvm/test/CodeGen/X86/pr9127.ll
+++ b/llvm/test/CodeGen/X86/pr9127.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-win32 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-win32 < %s | FileCheck %s
define i8 @foobar(double %d, ptr %x) {
entry:
diff --git a/llvm/test/CodeGen/X86/pr92569.ll b/llvm/test/CodeGen/X86/pr92569.ll
index 5f306e998398f..6aadcbe4b8d89 100644
--- a/llvm/test/CodeGen/X86/pr92569.ll
+++ b/llvm/test/CodeGen/X86/pr92569.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s
define void @PR92569(i64 %arg, <8 x i8> %arg1) {
; CHECK-LABEL: PR92569:
diff --git a/llvm/test/CodeGen/X86/pr92720.ll b/llvm/test/CodeGen/X86/pr92720.ll
index b2543c08328c7..06bc215afdb23 100644
--- a/llvm/test/CodeGen/X86/pr92720.ll
+++ b/llvm/test/CodeGen/X86/pr92720.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s
; Make sure we don't crash when shrinking the shift amount before legalization.
define i64 @pr92720(i64 %x) {
diff --git a/llvm/test/CodeGen/X86/pr93000.ll b/llvm/test/CodeGen/X86/pr93000.ll
index d55332f81c2ca..348907b3fa5f8 100644
--- a/llvm/test/CodeGen/X86/pr93000.ll
+++ b/llvm/test/CodeGen/X86/pr93000.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=x86_64- -mcpu=x86-64-v4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64- -mcpu=x86-64-v4 | FileCheck %s
define void @PR93000(ptr %a0, ptr %a1, ptr %a2, <32 x i16> %a3) {
; CHECK-LABEL: PR93000:
diff --git a/llvm/test/CodeGen/X86/pr94824.ll b/llvm/test/CodeGen/X86/pr94824.ll
index 7744d00acf3d4..bae139224c2cf 100644
--- a/llvm/test/CodeGen/X86/pr94824.ll
+++ b/llvm/test/CodeGen/X86/pr94824.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s
define i16 @pr94824(i8 %x1) {
; CHECK-LABEL: pr94824:
diff --git a/llvm/test/CodeGen/X86/pr94829.ll b/llvm/test/CodeGen/X86/pr94829.ll
index b858c636cebd8..e78c87546e0b2 100644
--- a/llvm/test/CodeGen/X86/pr94829.ll
+++ b/llvm/test/CodeGen/X86/pr94829.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc --mtriple=x86_64 -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting --mtriple=x86_64 -o - %s | FileCheck %s
define i64 @test(i64 %x, i64 %y, i64 %a, i64 %b) {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/pr9517.ll b/llvm/test/CodeGen/X86/pr9517.ll
index 035133a121630..06cb6a590421b 100644
--- a/llvm/test/CodeGen/X86/pr9517.ll
+++ b/llvm/test/CodeGen/X86/pr9517.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -o - %s -mtriple=x86_64--unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64--unknown-linux-gnu | FileCheck %s
@base = external dso_local local_unnamed_addr global i16, align 2
diff --git a/llvm/test/CodeGen/X86/pr95274.ll b/llvm/test/CodeGen/X86/pr95274.ll
index bc43a47a28538..f9254c8ce30cf 100644
--- a/llvm/test/CodeGen/X86/pr95274.ll
+++ b/llvm/test/CodeGen/X86/pr95274.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=skylake-avx512 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=skylake-avx512 | FileCheck %s
define void @PR95274(ptr %p0) nounwind {
; CHECK-LABEL: PR95274:
diff --git a/llvm/test/CodeGen/X86/pr95278.ll b/llvm/test/CodeGen/X86/pr95278.ll
index 104fc04d68cdb..9ca9f5f949474 100644
--- a/llvm/test/CodeGen/X86/pr95278.ll
+++ b/llvm/test/CodeGen/X86/pr95278.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=skylake-avx512 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=skylake-avx512 | FileCheck %s
define void @PR95278(ptr %p0, ptr %p1) {
; CHECK-LABEL: PR95278:
diff --git a/llvm/test/CodeGen/X86/pr9743.ll b/llvm/test/CodeGen/X86/pr9743.ll
index 976b74972574d..95198ccd4c9dd 100644
--- a/llvm/test/CodeGen/X86/pr9743.ll
+++ b/llvm/test/CodeGen/X86/pr9743.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -frame-pointer=all -asm-verbose=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -frame-pointer=all -asm-verbose=0 | FileCheck %s
define void @f() {
ret void
diff --git a/llvm/test/CodeGen/X86/pr97968.ll b/llvm/test/CodeGen/X86/pr97968.ll
index a539a33e9a281..59ff0114f6d9c 100644
--- a/llvm/test/CodeGen/X86/pr97968.ll
+++ b/llvm/test/CodeGen/X86/pr97968.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver4 | FileCheck %s
define <2 x i32> @PR97968(<16 x i32> %a0) {
; CHECK-LABEL: PR97968:
diff --git a/llvm/test/CodeGen/X86/pr99396.ll b/llvm/test/CodeGen/X86/pr99396.ll
index f534d32038c22..8d647dbe8088d 100644
--- a/llvm/test/CodeGen/X86/pr99396.ll
+++ b/llvm/test/CodeGen/X86/pr99396.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-unknown-freebsd -enable-misched -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-freebsd -enable-misched -relocation-model=pic | FileCheck %s
@c = external local_unnamed_addr global ptr
diff --git a/llvm/test/CodeGen/X86/pre-coalesce-2.ll b/llvm/test/CodeGen/X86/pre-coalesce-2.ll
index 1b1b7c7fdc7d8..a9762db234182 100644
--- a/llvm/test/CodeGen/X86/pre-coalesce-2.ll
+++ b/llvm/test/CodeGen/X86/pre-coalesce-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc -regalloc=greedy -verify-coalescing -mtriple=x86_64-unknown-linux-gnu < %s
+; RUN: llc -combiner-topological-sorting -regalloc=greedy -verify-coalescing -mtriple=x86_64-unknown-linux-gnu < %s
; Check the live range is updated properly after register coalescing.
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/pre-coalesce.ll b/llvm/test/CodeGen/X86/pre-coalesce.ll
index 89b26c29f4934..6eafa71c90efb 100644
--- a/llvm/test/CodeGen/X86/pre-coalesce.ll
+++ b/llvm/test/CodeGen/X86/pre-coalesce.ll
@@ -1,4 +1,4 @@
-; RUN: llc -regalloc=greedy -mtriple=x86_64-unknown-linux-gnu < %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -regalloc=greedy -mtriple=x86_64-unknown-linux-gnu < %s -o - | FileCheck %s
;
; The test is to check no redundent mov as follows will be generated in %while.body loop.
; .LBB0_2:
diff --git a/llvm/test/CodeGen/X86/preallocated-nocall.ll b/llvm/test/CodeGen/X86/preallocated-nocall.ll
index 57c322e4ab231..b1cdb3e11c637 100644
--- a/llvm/test/CodeGen/X86/preallocated-nocall.ll
+++ b/llvm/test/CodeGen/X86/preallocated-nocall.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck %s
; REQUIRES: asserts
; XFAIL: *
diff --git a/llvm/test/CodeGen/X86/preallocated-x64.ll b/llvm/test/CodeGen/X86/preallocated-x64.ll
index 6df2947f7e292..a5095fbf23159 100644
--- a/llvm/test/CodeGen/X86/preallocated-x64.ll
+++ b/llvm/test/CodeGen/X86/preallocated-x64.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -mtriple=x86_64-windows-msvc -o /dev/null 2>&1
+; RUN: llc -combiner-topological-sorting %s -mtriple=x86_64-windows-msvc -o /dev/null 2>&1
; REQUIRES: asserts
; XFAIL: *
diff --git a/llvm/test/CodeGen/X86/preallocated.ll b/llvm/test/CodeGen/X86/preallocated.ll
index 75d4dff946cbe..07ef823c69971 100644
--- a/llvm/test/CodeGen/X86/preallocated.ll
+++ b/llvm/test/CodeGen/X86/preallocated.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck %s
declare token @llvm.call.preallocated.setup(i32)
declare ptr @llvm.call.preallocated.arg(token, i32)
diff --git a/llvm/test/CodeGen/X86/prefalign.ll b/llvm/test/CodeGen/X86/prefalign.ll
index 062cf740eabeb..99f925d7319fa 100644
--- a/llvm/test/CodeGen/X86/prefalign.ll
+++ b/llvm/test/CodeGen/X86/prefalign.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s | FileCheck --check-prefixes=CHECK,NOFS %s
-; RUN: llc -function-sections < %s | FileCheck --check-prefixes=CHECK,FS %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck --check-prefixes=CHECK,NOFS %s
+; RUN: llc -combiner-topological-sorting -function-sections < %s | FileCheck --check-prefixes=CHECK,FS %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/prefer-avx256-lzcnt.ll b/llvm/test/CodeGen/X86/prefer-avx256-lzcnt.ll
index 5f13e97487435..71e148327835a 100644
--- a/llvm/test/CodeGen/X86/prefer-avx256-lzcnt.ll
+++ b/llvm/test/CodeGen/X86/prefer-avx256-lzcnt.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512cd,+prefer-256-bit | FileCheck %s --check-prefix=AVX256
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512cd,-prefer-256-bit | FileCheck %s --check-prefixes=AVX512,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512cd,+prefer-256-bit | FileCheck %s --check-prefixes=AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512cd,-prefer-256-bit | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512cd,+prefer-256-bit | FileCheck %s --check-prefix=AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512cd,-prefer-256-bit | FileCheck %s --check-prefixes=AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512cd,+prefer-256-bit | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512cd,-prefer-256-bit | FileCheck %s --check-prefixes=AVX512,AVX512F
define <8 x i16> @testv8i16(<8 x i16> %in) {
; AVX256-LABEL: testv8i16:
diff --git a/llvm/test/CodeGen/X86/prefer-avx256-mask-extend.ll b/llvm/test/CodeGen/X86/prefer-avx256-mask-extend.ll
index 7e00d679d56b2..5128e66b4f245 100644
--- a/llvm/test/CodeGen/X86/prefer-avx256-mask-extend.ll
+++ b/llvm/test/CodeGen/X86/prefer-avx256-mask-extend.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+prefer-256-bit | FileCheck %s --check-prefix=AVX256
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,-prefer-256-bit | FileCheck %s --check-prefix=AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+prefer-256-bit | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,-prefer-256-bit | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+prefer-256-bit | FileCheck %s --check-prefix=AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,-prefer-256-bit | FileCheck %s --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+prefer-256-bit | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,-prefer-256-bit | FileCheck %s --check-prefix=AVX512F
define <8 x i16> @testv8i1_sext_v8i16(ptr %p) {
; AVX256-LABEL: testv8i1_sext_v8i16:
diff --git a/llvm/test/CodeGen/X86/prefer-avx256-mulo.ll b/llvm/test/CodeGen/X86/prefer-avx256-mulo.ll
index 155ef0faadad8..5803d19c0ce65 100644
--- a/llvm/test/CodeGen/X86/prefer-avx256-mulo.ll
+++ b/llvm/test/CodeGen/X86/prefer-avx256-mulo.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+prefer-256-bit | FileCheck %s --check-prefix=AVX256
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,-prefer-256-bit | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+prefer-256-bit | FileCheck %s --check-prefix=AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,-prefer-256-bit | FileCheck %s --check-prefix=AVX512
define <16 x i1> @smulo_v16i8(<16 x i8> %a0, <16 x i8> %a1, ptr %p2) nounwind {
; AVX256-LABEL: smulo_v16i8:
diff --git a/llvm/test/CodeGen/X86/prefer-avx256-popcnt.ll b/llvm/test/CodeGen/X86/prefer-avx256-popcnt.ll
index 34e32c43ef797..81b771f7f8e6c 100644
--- a/llvm/test/CodeGen/X86/prefer-avx256-popcnt.ll
+++ b/llvm/test/CodeGen/X86/prefer-avx256-popcnt.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512vpopcntdq,+prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX256
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512vpopcntdq,-prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vpopcntdq,+prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vpopcntdq,-prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512vpopcntdq,+prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512vpopcntdq,-prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vpopcntdq,+prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vpopcntdq,-prefer-256-bit | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F
define <8 x i16> @testv8i16(<8 x i16> %in) {
; AVX256-LABEL: testv8i16:
diff --git a/llvm/test/CodeGen/X86/prefer-avx256-shift.ll b/llvm/test/CodeGen/X86/prefer-avx256-shift.ll
index 63bbac12c6255..bf54c931d6c6c 100644
--- a/llvm/test/CodeGen/X86/prefer-avx256-shift.ll
+++ b/llvm/test/CodeGen/X86/prefer-avx256-shift.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+prefer-256-bit | FileCheck %s --check-prefixes=AVX256,AVX256BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,-prefer-256-bit | FileCheck %s --check-prefixes=AVX512BW,AVX512BWVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+prefer-256-bit | FileCheck %s --check-prefixes=AVX256,AVX256VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,-prefer-256-bit | FileCheck %s --check-prefix=AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+prefer-256-bit | FileCheck %s --check-prefixes=AVX512BW,AVX512BWNOVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,-prefer-256-bit | FileCheck %s --check-prefixes=AVX512BW,AVX512BWNOVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+prefer-256-bit | FileCheck %s --check-prefixes=AVX256,AVX256BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,-prefer-256-bit | FileCheck %s --check-prefixes=AVX512BW,AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+prefer-256-bit | FileCheck %s --check-prefixes=AVX256,AVX256VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,-prefer-256-bit | FileCheck %s --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+prefer-256-bit | FileCheck %s --check-prefixes=AVX512BW,AVX512BWNOVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,-prefer-256-bit | FileCheck %s --check-prefixes=AVX512BW,AVX512BWNOVL
define <32 x i8> @var_shl_v32i8(<32 x i8> %a, <32 x i8> %b) {
; AVX256-LABEL: var_shl_v32i8:
diff --git a/llvm/test/CodeGen/X86/prefer-avx256-trunc.ll b/llvm/test/CodeGen/X86/prefer-avx256-trunc.ll
index 6ea480465a764..9caf047eea4c8 100644
--- a/llvm/test/CodeGen/X86/prefer-avx256-trunc.ll
+++ b/llvm/test/CodeGen/X86/prefer-avx256-trunc.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+prefer-256-bit | FileCheck %s --check-prefix=AVX256NOBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,-prefer-256-bit | FileCheck %s --check-prefix=AVX512NOBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+prefer-256-bit | FileCheck %s --check-prefix=AVX512NOBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,-prefer-256-bit | FileCheck %s --check-prefix=AVX512NOBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+prefer-256-bit | FileCheck %s --check-prefix=AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,-prefer-256-bit | FileCheck %s --check-prefix=AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+prefer-256-bit | FileCheck %s --check-prefix=AVX256BWVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,-prefer-256-bit | FileCheck %s --check-prefix=AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+prefer-256-bit | FileCheck %s --check-prefix=AVX256NOBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,-prefer-256-bit | FileCheck %s --check-prefix=AVX512NOBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+prefer-256-bit | FileCheck %s --check-prefix=AVX512NOBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,-prefer-256-bit | FileCheck %s --check-prefix=AVX512NOBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+prefer-256-bit | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,-prefer-256-bit | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+prefer-256-bit | FileCheck %s --check-prefix=AVX256BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,-prefer-256-bit | FileCheck %s --check-prefix=AVX512BWVL
define <16 x i8> @testv16i16_trunc_v16i8(<16 x i16> %x) {
; AVX256NOBW-LABEL: testv16i16_trunc_v16i8:
diff --git a/llvm/test/CodeGen/X86/prefer-avx256-wide-mul.ll b/llvm/test/CodeGen/X86/prefer-avx256-wide-mul.ll
index c9e48f817fb44..2c25e87e6d774 100644
--- a/llvm/test/CodeGen/X86/prefer-avx256-wide-mul.ll
+++ b/llvm/test/CodeGen/X86/prefer-avx256-wide-mul.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw,+prefer-256-bit | FileCheck %s --check-prefix=AVX256BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw,-prefer-256-bit | FileCheck %s --check-prefix=AVX512BWVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+prefer-256-bit | FileCheck %s --check-prefix=AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,-prefer-256-bit | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw,+prefer-256-bit | FileCheck %s --check-prefix=AVX256BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw,-prefer-256-bit | FileCheck %s --check-prefix=AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+prefer-256-bit | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,-prefer-256-bit | FileCheck %s --check-prefix=AVX512BW
define <32 x i8> @test_div7_32i8(<32 x i8> %a) {
; AVX256BW-LABEL: test_div7_32i8:
diff --git a/llvm/test/CodeGen/X86/prefer-fpext-splat.ll b/llvm/test/CodeGen/X86/prefer-fpext-splat.ll
index c3d7b2e15d017..9b80af47ff167 100644
--- a/llvm/test/CodeGen/X86/prefer-fpext-splat.ll
+++ b/llvm/test/CodeGen/X86/prefer-fpext-splat.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512FP16
define <2 x double> @prefer_f32_v2f64(ptr %p) nounwind {
; SSE-LABEL: prefer_f32_v2f64:
diff --git a/llvm/test/CodeGen/X86/prefetch.ll b/llvm/test/CodeGen/X86/prefetch.ll
index d39381f1ced99..f1f7c3f4e4e95 100644
--- a/llvm/test/CodeGen/X86/prefetch.ll
+++ b/llvm/test/CodeGen/X86/prefetch.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse | FileCheck %s --check-prefix=X86-SSE
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefix=X86-SSE
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse,+prfchw | FileCheck %s -check-prefix=X86-PRFCHWSSE
-; RUN: llc < %s -mtriple=i686-- -mattr=+prfchw | FileCheck %s -check-prefix=X86-PRFCHWSSE
-; RUN: llc < %s -mtriple=i686-- -mcpu=slm | FileCheck %s -check-prefix=X86-PRFCHWSSE
-; RUN: llc < %s -mtriple=i686-- -mcpu=btver2 | FileCheck %s -check-prefix=X86-PRFCHWSSE
-; RUN: llc < %s -mtriple=i686-- -mcpu=btver2 -mattr=-prfchw | FileCheck %s -check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse,+prfchw | FileCheck %s -check-prefix=X86-PRFCHWSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+prfchw | FileCheck %s -check-prefix=X86-PRFCHWSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=slm | FileCheck %s -check-prefix=X86-PRFCHWSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=btver2 | FileCheck %s -check-prefix=X86-PRFCHWSSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=btver2 -mattr=-prfchw | FileCheck %s -check-prefix=X86-SSE
; Rules:
; sse provides prefetch0/1/2/nta
diff --git a/llvm/test/CodeGen/X86/prefetchi.ll b/llvm/test/CodeGen/X86/prefetchi.ll
index 442819ea20d04..5167443a13d5a 100644
--- a/llvm/test/CodeGen/X86/prefetchi.ll
+++ b/llvm/test/CodeGen/X86/prefetchi.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+prefetchi | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=NOPREFETCHI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+prefetchi | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=NOPREFETCHI
define dso_local void @t(ptr %ptr) nounwind {
; CHECK-LABEL: t:
diff --git a/llvm/test/CodeGen/X86/prefixdata.ll b/llvm/test/CodeGen/X86/prefixdata.ll
index 20a558c9e03bb..590eec6c6501f 100644
--- a/llvm/test/CodeGen/X86/prefixdata.ll
+++ b/llvm/test/CodeGen/X86/prefixdata.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck --check-prefix=MACHO %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck --check-prefix=ELF %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck --check-prefix=MACHO %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck --check-prefix=ELF %s
@i = linkonce_odr global i32 1
diff --git a/llvm/test/CodeGen/X86/preserve_allcc64-ret-double.ll b/llvm/test/CodeGen/X86/preserve_allcc64-ret-double.ll
index 517d22edb2e61..ba889e06ef0a3 100644
--- a/llvm/test/CodeGen/X86/preserve_allcc64-ret-double.ll
+++ b/llvm/test/CodeGen/X86/preserve_allcc64-ret-double.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL,SSE %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL,AVX %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL,SSE %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL,AVX %s
define preserve_allcc double @preserve_allcc1() nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/preserve_allcc64.ll b/llvm/test/CodeGen/X86/preserve_allcc64.ll
index d8882b0cf173a..8feb433287b71 100644
--- a/llvm/test/CodeGen/X86/preserve_allcc64.ll
+++ b/llvm/test/CodeGen/X86/preserve_allcc64.ll
@@ -1,10 +1,10 @@
-; RUN: sed -e "s/RETTYPE/void/;s/RETVAL//" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL,SSE,VOID %s
-; RUN: sed -e "s/RETTYPE/i32/;s/RETVAL/undef/" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL,SSE,INT %s
-; RUN: sed -e "s/RETTYPE/\{i64\,i64\}/;s/RETVAL/undef/" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL,SSE,INT128 %s
+; RUN: sed -e "s/RETTYPE/void/;s/RETVAL//" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL,SSE,VOID %s
+; RUN: sed -e "s/RETTYPE/i32/;s/RETVAL/undef/" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL,SSE,INT %s
+; RUN: sed -e "s/RETTYPE/\{i64\,i64\}/;s/RETVAL/undef/" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL,SSE,INT128 %s
;
-; RUN: sed -e "s/RETTYPE/void/;s/RETVAL//" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL,AVX,VOID %s
-; RUN: sed -e "s/RETTYPE/i32/;s/RETVAL/undef/" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL,AVX,INT %s
-; RUN: sed -e "s/RETTYPE/\{i64\,i64\}/;s/RETVAL/undef/" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL,AVX,INT128 %s
+; RUN: sed -e "s/RETTYPE/void/;s/RETVAL//" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL,AVX,VOID %s
+; RUN: sed -e "s/RETTYPE/i32/;s/RETVAL/undef/" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL,AVX,INT %s
+; RUN: sed -e "s/RETTYPE/\{i64\,i64\}/;s/RETVAL/undef/" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL,AVX,INT128 %s
define preserve_allcc RETTYPE @preserve_allcc1(i64, i64, double, double) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/preserve_mostcc64-ret-double.ll b/llvm/test/CodeGen/X86/preserve_mostcc64-ret-double.ll
index 99740d3b31c07..960bcd3d4fc3b 100644
--- a/llvm/test/CodeGen/X86/preserve_mostcc64-ret-double.ll
+++ b/llvm/test/CodeGen/X86/preserve_mostcc64-ret-double.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
; Make sure XMM0 (return register) and R11 are saved before the call
declare preserve_mostcc double @foo_double(i64, i64)
diff --git a/llvm/test/CodeGen/X86/preserve_mostcc64-sret.ll b/llvm/test/CodeGen/X86/preserve_mostcc64-sret.ll
index 1444437d807cc..3c94bad4be7d5 100644
--- a/llvm/test/CodeGen/X86/preserve_mostcc64-sret.ll
+++ b/llvm/test/CodeGen/X86/preserve_mostcc64-sret.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
%struct.Large = type { [64 x i32] }
diff --git a/llvm/test/CodeGen/X86/preserve_mostcc64.ll b/llvm/test/CodeGen/X86/preserve_mostcc64.ll
index e998efdbcd63f..4181fca8f3d03 100644
--- a/llvm/test/CodeGen/X86/preserve_mostcc64.ll
+++ b/llvm/test/CodeGen/X86/preserve_mostcc64.ll
@@ -1,6 +1,6 @@
-; RUN: sed -e "s/RETTYPE/void/;s/RETVAL//" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL,VOID %s
-; RUN: sed -e "s/RETTYPE/i32/;s/RETVAL/undef/" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL,INT %s
-; RUN: sed -e "s/RETTYPE/\{i64\,i64\}/;s/RETVAL/undef/" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL,INT128 %s
+; RUN: sed -e "s/RETTYPE/void/;s/RETVAL//" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL,VOID %s
+; RUN: sed -e "s/RETTYPE/i32/;s/RETVAL/undef/" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL,INT %s
+; RUN: sed -e "s/RETTYPE/\{i64\,i64\}/;s/RETVAL/undef/" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL,INT128 %s
; Every GPR should be saved - except r11 and return registers
define preserve_mostcc RETTYPE @preserve_mostcc1(i64, i64, double, double) nounwind {
diff --git a/llvm/test/CodeGen/X86/preserve_mostcc64_win.ll b/llvm/test/CodeGen/X86/preserve_mostcc64_win.ll
index 7042a2e77da1b..b7e549d0f132d 100644
--- a/llvm/test/CodeGen/X86/preserve_mostcc64_win.ll
+++ b/llvm/test/CodeGen/X86/preserve_mostcc64_win.ll
@@ -1,6 +1,6 @@
-; RUN: sed -e "s/RETTYPE/void/;s/RETVAL//" %s | llc -mtriple=x86_64-win32 -mcpu=corei7 | FileCheck --check-prefixes=ALL,VOID %s
-; RUN: sed -e "s/RETTYPE/i32/;s/RETVAL/undef/" %s | llc -mtriple=x86_64-win32 -mcpu=corei7 | FileCheck --check-prefixes=ALL,INT %s
-; RUN: sed -e "s/RETTYPE/\{i64\,i64\}/;s/RETVAL/undef/" %s | llc -mtriple=x86_64-win32 -mcpu=corei7 | FileCheck --check-prefixes=ALL,INT128 %s
+; RUN: sed -e "s/RETTYPE/void/;s/RETVAL//" %s | llc -combiner-topological-sorting -mtriple=x86_64-win32 -mcpu=corei7 | FileCheck --check-prefixes=ALL,VOID %s
+; RUN: sed -e "s/RETTYPE/i32/;s/RETVAL/undef/" %s | llc -combiner-topological-sorting -mtriple=x86_64-win32 -mcpu=corei7 | FileCheck --check-prefixes=ALL,INT %s
+; RUN: sed -e "s/RETTYPE/\{i64\,i64\}/;s/RETVAL/undef/" %s | llc -combiner-topological-sorting -mtriple=x86_64-win32 -mcpu=corei7 | FileCheck --check-prefixes=ALL,INT128 %s
; Every GPR should be saved, except r11 and return registers.
; XMM registers 6-15 should also be saved.
diff --git a/llvm/test/CodeGen/X86/preserve_none_swift.ll b/llvm/test/CodeGen/X86/preserve_none_swift.ll
index 9a1c15190c6a2..5ee701486d4a1 100644
--- a/llvm/test/CodeGen/X86/preserve_none_swift.ll
+++ b/llvm/test/CodeGen/X86/preserve_none_swift.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=x86_64 %s -o - 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64 %s -o - 2>&1 | FileCheck %s
; Swift attributes should not be used with preserve_none.
diff --git a/llvm/test/CodeGen/X86/preserve_nonecc64-ret-double.ll b/llvm/test/CodeGen/X86/preserve_nonecc64-ret-double.ll
index 22f0931a1446e..1237870a02c5e 100644
--- a/llvm/test/CodeGen/X86/preserve_nonecc64-ret-double.ll
+++ b/llvm/test/CodeGen/X86/preserve_nonecc64-ret-double.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL,AVX %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL,AVX %s
; Don't need to preserve registers before using them.
define preserve_nonecc double @preserve_nonecc1() nounwind {
diff --git a/llvm/test/CodeGen/X86/preserve_nonecc64.ll b/llvm/test/CodeGen/X86/preserve_nonecc64.ll
index 9526b4b939f8f..610e3f3876dae 100644
--- a/llvm/test/CodeGen/X86/preserve_nonecc64.ll
+++ b/llvm/test/CodeGen/X86/preserve_nonecc64.ll
@@ -1,10 +1,10 @@
-; RUN: sed -e "s/RETTYPE/void/;s/RETVAL//" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL %s
-; RUN: sed -e "s/RETTYPE/i32/;s/RETVAL/undef/" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL %s
-; RUN: sed -e "s/RETTYPE/\{i64\,i64\}/;s/RETVAL/undef/" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL %s
+; RUN: sed -e "s/RETTYPE/void/;s/RETVAL//" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL %s
+; RUN: sed -e "s/RETTYPE/i32/;s/RETVAL/undef/" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL %s
+; RUN: sed -e "s/RETTYPE/\{i64\,i64\}/;s/RETVAL/undef/" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck --check-prefixes=ALL %s
;
-; RUN: sed -e "s/RETTYPE/void/;s/RETVAL//" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL %s
-; RUN: sed -e "s/RETTYPE/i32/;s/RETVAL/undef/" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL %s
-; RUN: sed -e "s/RETTYPE/\{i64\,i64\}/;s/RETVAL/undef/" %s | llc -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL %s
+; RUN: sed -e "s/RETTYPE/void/;s/RETVAL//" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL %s
+; RUN: sed -e "s/RETTYPE/i32/;s/RETVAL/undef/" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL %s
+; RUN: sed -e "s/RETTYPE/\{i64\,i64\}/;s/RETVAL/undef/" %s | llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck --check-prefixes=ALL %s
; We don't need to save registers before using them inside preserve_none function.
define preserve_nonecc RETTYPE @preserve_nonecc1(i64, i64, double, double) nounwind {
diff --git a/llvm/test/CodeGen/X86/preserve_nonecc_call.ll b/llvm/test/CodeGen/X86/preserve_nonecc_call.ll
index 500ebb139811a..24abe69fae284 100644
--- a/llvm/test/CodeGen/X86/preserve_nonecc_call.ll
+++ b/llvm/test/CodeGen/X86/preserve_nonecc_call.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=corei7 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=corei7 < %s | FileCheck %s
; This test checks various function call behaviors between preserve_none and
; normal calling conventions.
diff --git a/llvm/test/CodeGen/X86/preserve_nonecc_call_win.ll b/llvm/test/CodeGen/X86/preserve_nonecc_call_win.ll
index 8f933fbfd0568..11243644b3721 100644
--- a/llvm/test/CodeGen/X86/preserve_nonecc_call_win.ll
+++ b/llvm/test/CodeGen/X86/preserve_nonecc_call_win.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=x86_64-pc-windows-msvc -mcpu=corei7 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc -mcpu=corei7 < %s | FileCheck %s
; Non-volatile registers are used to pass the first few parameters.
declare void @boring()
diff --git a/llvm/test/CodeGen/X86/preserve_nonecc_musttail.ll b/llvm/test/CodeGen/X86/preserve_nonecc_musttail.ll
index 77f5a8bd75ac8..85cb35f1e3e50 100644
--- a/llvm/test/CodeGen/X86/preserve_nonecc_musttail.ll
+++ b/llvm/test/CodeGen/X86/preserve_nonecc_musttail.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=x86_64-unknown-unknown -mcpu=corei7 %s -o - 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=corei7 %s -o - 2>&1 | FileCheck %s
; Incompatible calling convention causes following error message.
diff --git a/llvm/test/CodeGen/X86/private-2.ll b/llvm/test/CodeGen/X86/private-2.ll
index 69463a006f663..1e21bde10f008 100644
--- a/llvm/test/CodeGen/X86/private-2.ll
+++ b/llvm/test/CodeGen/X86/private-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s
; Quote should be outside of private prefix.
; rdar://6855766x
diff --git a/llvm/test/CodeGen/X86/private.ll b/llvm/test/CodeGen/X86/private.ll
index aeaf0f7ac7ae7..9076bf7715f1d 100644
--- a/llvm/test/CodeGen/X86/private.ll
+++ b/llvm/test/CodeGen/X86/private.ll
@@ -1,6 +1,6 @@
; Test to make sure that the 'private' is used correctly.
;
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s
define private void @foo() {
ret void
diff --git a/llvm/test/CodeGen/X86/probe-stack-eflags.ll b/llvm/test/CodeGen/X86/probe-stack-eflags.ll
index cc1839bba7e89..92ed4a2688919 100644
--- a/llvm/test/CodeGen/X86/probe-stack-eflags.ll
+++ b/llvm/test/CodeGen/X86/probe-stack-eflags.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/probe-stack-x32.ll b/llvm/test/CodeGen/X86/probe-stack-x32.ll
index 07203ee0522d3..d5d5e585f3e29 100644
--- a/llvm/test/CodeGen/X86/probe-stack-x32.ll
+++ b/llvm/test/CodeGen/X86/probe-stack-x32.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnux32 -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnux32 -verify-machineinstrs | FileCheck %s
target datalayout = "e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnux32"
diff --git a/llvm/test/CodeGen/X86/prolog-push-seq.ll b/llvm/test/CodeGen/X86/prolog-push-seq.ll
index 82662adf1ff20..d9c643cf1c2de 100644
--- a/llvm/test/CodeGen/X86/prolog-push-seq.ll
+++ b/llvm/test/CodeGen/X86/prolog-push-seq.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i386-pc-windows-msvc18.0.0"
diff --git a/llvm/test/CodeGen/X86/prologuedata.ll b/llvm/test/CodeGen/X86/prologuedata.ll
index bfc6fe5b0bc48..1204b5bc0d0d4 100644
--- a/llvm/test/CodeGen/X86/prologuedata.ll
+++ b/llvm/test/CodeGen/X86/prologuedata.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
@i = linkonce_odr global i32 1
diff --git a/llvm/test/CodeGen/X86/promote-assert-zext.ll b/llvm/test/CodeGen/X86/promote-assert-zext.ll
index d9e2585262ab7..19ef60e5912e2 100644
--- a/llvm/test/CodeGen/X86/promote-assert-zext.ll
+++ b/llvm/test/CodeGen/X86/promote-assert-zext.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; rdar://8051990
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
diff --git a/llvm/test/CodeGen/X86/promote-cmp.ll b/llvm/test/CodeGen/X86/promote-cmp.ll
index fb0bf5ced3e51..c823130b3b320 100644
--- a/llvm/test/CodeGen/X86/promote-cmp.ll
+++ b/llvm/test/CodeGen/X86/promote-cmp.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE4
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
define <4 x i64> @PR45808(<4 x i64> %0, <4 x i64> %1) {
; SSE2-LABEL: PR45808:
diff --git a/llvm/test/CodeGen/X86/promote-i16.ll b/llvm/test/CodeGen/X86/promote-i16.ll
index 450285d1b80eb..8b1314357581f 100644
--- a/llvm/test/CodeGen/X86/promote-i16.ll
+++ b/llvm/test/CodeGen/X86/promote-i16.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64
define signext i16 @foo(i16 signext %x) nounwind {
; X86-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/promote-sra-by-itself.ll b/llvm/test/CodeGen/X86/promote-sra-by-itself.ll
index d57411f495b69..33a4b3b75629e 100644
--- a/llvm/test/CodeGen/X86/promote-sra-by-itself.ll
+++ b/llvm/test/CodeGen/X86/promote-sra-by-itself.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
declare void @use(<1 x i16>)
diff --git a/llvm/test/CodeGen/X86/promote-trunc.ll b/llvm/test/CodeGen/X86/promote-trunc.ll
index d1c99bf17f313..8c7c0eaa00163 100644
--- a/llvm/test/CodeGen/X86/promote-trunc.ll
+++ b/llvm/test/CodeGen/X86/promote-trunc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
define<4 x i8> @func_8_64() {
%F = load <4 x i64>, ptr undef
diff --git a/llvm/test/CodeGen/X86/promote.ll b/llvm/test/CodeGen/X86/promote.ll
index bac6602c143ef..10d1fa8930ac6 100644
--- a/llvm/test/CodeGen/X86/promote.ll
+++ b/llvm/test/CodeGen/X86/promote.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s --check-prefixes=CHECK,X64
define i32 @mul_f(ptr %A) {
; X86-LABEL: mul_f:
diff --git a/llvm/test/CodeGen/X86/propagate-disjoint-in-shl-or.ll b/llvm/test/CodeGen/X86/propagate-disjoint-in-shl-or.ll
index e38840f3e4610..f3f917232b367 100644
--- a/llvm/test/CodeGen/X86/propagate-disjoint-in-shl-or.ll
+++ b/llvm/test/CodeGen/X86/propagate-disjoint-in-shl-or.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64 %s -start-before=x86-isel -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 %s -start-before=x86-isel -o - | FileCheck %s
define i32 @add_shl_or_disjoint(i32 %x) {
; CHECK-LABEL: add_shl_or_disjoint:
diff --git a/llvm/test/CodeGen/X86/ps4-noreturn.ll b/llvm/test/CodeGen/X86/ps4-noreturn.ll
index 2b9e10d8f7790..8e0bd10c86ed2 100644
--- a/llvm/test/CodeGen/X86/ps4-noreturn.ll
+++ b/llvm/test/CodeGen/X86/ps4-noreturn.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-scei-ps4 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-sie-ps5 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-scei-ps4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-sie-ps5 | FileCheck %s
declare i32 @personality(...)
diff --git a/llvm/test/CodeGen/X86/ps4-ssp-nop.ll b/llvm/test/CodeGen/X86/ps4-ssp-nop.ll
index 11009b7accd6f..6ced7e719de13 100644
--- a/llvm/test/CodeGen/X86/ps4-ssp-nop.ll
+++ b/llvm/test/CodeGen/X86/ps4-ssp-nop.ll
@@ -1,13 +1,13 @@
; Verify that a ud2 is generated after the call to __stack_chk_fail.
-; RUN: llc < %s -mtriple=x86_64-scei-ps4 -enable-selectiondag-sp=false -O0 -o - | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-sie-ps5 -enable-selectiondag-sp=false -O0 -o - | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-scei-ps4 -enable-selectiondag-sp=false -O2 -o - | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-sie-ps5 -enable-selectiondag-sp=false -O2 -o - | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-scei-ps4 -enable-selectiondag-sp=true -O0 -o - | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-sie-ps5 -enable-selectiondag-sp=true -O0 -o - | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-scei-ps4 -enable-selectiondag-sp=true -O2 -o - | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-sie-ps5 -enable-selectiondag-sp=true -O2 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-scei-ps4 -enable-selectiondag-sp=false -O0 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-sie-ps5 -enable-selectiondag-sp=false -O0 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-scei-ps4 -enable-selectiondag-sp=false -O2 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-sie-ps5 -enable-selectiondag-sp=false -O2 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-scei-ps4 -enable-selectiondag-sp=true -O0 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-sie-ps5 -enable-selectiondag-sp=true -O0 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-scei-ps4 -enable-selectiondag-sp=true -O2 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-sie-ps5 -enable-selectiondag-sp=true -O2 -o - | FileCheck %s
; CHECK: check_input:
diff --git a/llvm/test/CodeGen/X86/pseudo-probe-desc-check.ll b/llvm/test/CodeGen/X86/pseudo-probe-desc-check.ll
index 0c2bdfe9adcb1..e41e626267a42 100644
--- a/llvm/test/CodeGen/X86/pseudo-probe-desc-check.ll
+++ b/llvm/test/CodeGen/X86/pseudo-probe-desc-check.ll
@@ -1,6 +1,6 @@
; REQUIRES: asserts
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -pseudo-probe-verify-guid-existence-in-desc < %s -o /dev/null 2>&1 | FileCheck %s
-; RUN: llc -mtriple=x86_64-unknown-windows-msvc -pseudo-probe-verify-guid-existence-in-desc < %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -pseudo-probe-verify-guid-existence-in-desc < %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-windows-msvc -pseudo-probe-verify-guid-existence-in-desc < %s -o /dev/null 2>&1 | FileCheck %s
; CHECK: warning: Guid:8314849053352128226 Name:inlinee does not exist in pseudo probe desc
; CHECK: warning: Guid:6492337042787843907 Name:extract2 does not exist in pseudo probe desc
diff --git a/llvm/test/CodeGen/X86/pseudo_cmov_lower-fp16.ll b/llvm/test/CodeGen/X86/pseudo_cmov_lower-fp16.ll
index a9611fcb55873..a40a071db754c 100644
--- a/llvm/test/CodeGen/X86/pseudo_cmov_lower-fp16.ll
+++ b/llvm/test/CodeGen/X86/pseudo_cmov_lower-fp16.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-linux-gnu -mattr=+avx512fp16 -mattr=+avx512vl -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -mattr=+avx512fp16 -mattr=+avx512vl -o - | FileCheck %s
; This test checks that only a single je gets generated in the final code
; for lowering the CMOV pseudos that get created for this IR.
diff --git a/llvm/test/CodeGen/X86/pseudo_cmov_lower.ll b/llvm/test/CodeGen/X86/pseudo_cmov_lower.ll
index 7d7d72e4c89f6..e261c9e42bfed 100644
--- a/llvm/test/CodeGen/X86/pseudo_cmov_lower.ll
+++ b/llvm/test/CodeGen/X86/pseudo_cmov_lower.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-linux-gnu -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -o - | FileCheck %s
; This test checks that only a single js gets generated in the final code
; for lowering the CMOV pseudos that get created for this IR.
diff --git a/llvm/test/CodeGen/X86/pseudo_cmov_lower1.ll b/llvm/test/CodeGen/X86/pseudo_cmov_lower1.ll
index 4ce131bb86454..f3259f5e9dc96 100644
--- a/llvm/test/CodeGen/X86/pseudo_cmov_lower1.ll
+++ b/llvm/test/CodeGen/X86/pseudo_cmov_lower1.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-linux-gnu -mattr=+sse2 -o - | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -mattr=+sse2 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -o - | FileCheck %s
; This test checks that only a single jae gets generated in the final code
; for lowering the CMOV pseudos that get created for this IR.
diff --git a/llvm/test/CodeGen/X86/pseudo_cmov_lower2.ll b/llvm/test/CodeGen/X86/pseudo_cmov_lower2.ll
index 6091e2bf5bc56..10bd31570e14c 100644
--- a/llvm/test/CodeGen/X86/pseudo_cmov_lower2.ll
+++ b/llvm/test/CodeGen/X86/pseudo_cmov_lower2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -o - | FileCheck %s
; This test checks that only a single jae gets generated in the final code
; for lowering the CMOV pseudos that get created for this IR. The tricky part
diff --git a/llvm/test/CodeGen/X86/pshufb-mask-comments.ll b/llvm/test/CodeGen/X86/pshufb-mask-comments.ll
index b96338984d6f5..8955cebc64f20 100644
--- a/llvm/test/CodeGen/X86/pshufb-mask-comments.ll
+++ b/llvm/test/CodeGen/X86/pshufb-mask-comments.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ssse3 | FileCheck %s
; Test that the pshufb mask comment is correct.
diff --git a/llvm/test/CodeGen/X86/pshufd-combine-crash.ll b/llvm/test/CodeGen/X86/pshufd-combine-crash.ll
index 3f181b43c7810..eb0a829cdbc5f 100644
--- a/llvm/test/CodeGen/X86/pshufd-combine-crash.ll
+++ b/llvm/test/CodeGen/X86/pshufd-combine-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 -debug
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7 -debug
; REQUIRES: asserts
diff --git a/llvm/test/CodeGen/X86/ptest.ll b/llvm/test/CodeGen/X86/ptest.ll
index 9c8fc4f3896b6..60627998fc427 100644
--- a/llvm/test/CodeGen/X86/ptest.ll
+++ b/llvm/test/CodeGen/X86/ptest.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2,-avx | FileCheck %s --check-prefixes=CHECK,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1,-avx | FileCheck %s --check-prefixes=CHECK,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,-avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2,-avx | FileCheck %s --check-prefixes=CHECK,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1,-avx | FileCheck %s --check-prefixes=CHECK,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,-avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
define i32 @veccond128(<4 x i32> %input) {
; SSE2-LABEL: veccond128:
diff --git a/llvm/test/CodeGen/X86/ptr-rotate.ll b/llvm/test/CodeGen/X86/ptr-rotate.ll
index ec4aa3e7c0ece..509f3fe697e32 100644
--- a/llvm/test/CodeGen/X86/ptr-rotate.ll
+++ b/llvm/test/CodeGen/X86/ptr-rotate.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-apple-darwin -mcpu=corei7 -o - < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-apple-darwin -mcpu=corei7 -o - < %s | FileCheck %s
define i32 @func(ptr %A) nounwind readnone {
; CHECK-LABEL: func:
diff --git a/llvm/test/CodeGen/X86/ptrtoaddr-fast-isel.ll b/llvm/test/CodeGen/X86/ptrtoaddr-fast-isel.ll
index c302d41a42ee7..9e994249b9f94 100644
--- a/llvm/test/CodeGen/X86/ptrtoaddr-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/ptrtoaddr-fast-isel.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=1 < %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -fast-isel -fast-isel-abort=1 < %s -o - | FileCheck %s
define i64 @ptrtoaddr(ptr %p) {
; CHECK-LABEL: ptrtoaddr:
diff --git a/llvm/test/CodeGen/X86/ptrtoaddr.ll b/llvm/test/CodeGen/X86/ptrtoaddr.ll
index 24bf9db57d9ec..57e4aa5f65575 100644
--- a/llvm/test/CodeGen/X86/ptrtoaddr.ll
+++ b/llvm/test/CodeGen/X86/ptrtoaddr.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu < %s -o - | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu < %s -o - | FileCheck %s --check-prefix=CHECK
define i1 @ptrtoaddr_1(ptr %p) {
; CHECK-LABEL: ptrtoaddr_1:
diff --git a/llvm/test/CodeGen/X86/ptrtoint-constexpr-invalid.ll b/llvm/test/CodeGen/X86/ptrtoint-constexpr-invalid.ll
index 45f3ab60e9044..8f03b85a494de 100644
--- a/llvm/test/CodeGen/X86/ptrtoint-constexpr-invalid.ll
+++ b/llvm/test/CodeGen/X86/ptrtoint-constexpr-invalid.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -mtriple=i386-linux 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=i386-linux 2>&1 | FileCheck %s
; ptrtoint expressions that cast to a wider integer type are not supported.
; A frontend can achieve a similar result by casting to the correct integer
diff --git a/llvm/test/CodeGen/X86/ptrtoint-constexpr.ll b/llvm/test/CodeGen/X86/ptrtoint-constexpr.ll
index 230c16b0e0bf9..0641032fbdd00 100644
--- a/llvm/test/CodeGen/X86/ptrtoint-constexpr.ll
+++ b/llvm/test/CodeGen/X86/ptrtoint-constexpr.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux | FileCheck %s
%union.x = type { i32 }
; CHECK: .globl r
diff --git a/llvm/test/CodeGen/X86/ptrtoint-narrow.ll b/llvm/test/CodeGen/X86/ptrtoint-narrow.ll
index 9cc56caa48721..f5eb5a8708e2a 100644
--- a/llvm/test/CodeGen/X86/ptrtoint-narrow.ll
+++ b/llvm/test/CodeGen/X86/ptrtoint-narrow.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
@ptr = external global i8, align 1
@ref = constant i32 ptrtoint (ptr @ptr to i32), align 4
diff --git a/llvm/test/CodeGen/X86/ptwrite32-intrinsic.ll b/llvm/test/CodeGen/X86/ptwrite32-intrinsic.ll
index b7de01b5cbd06..03019542ca6f9 100644
--- a/llvm/test/CodeGen/X86/ptwrite32-intrinsic.ll
+++ b/llvm/test/CodeGen/X86/ptwrite32-intrinsic.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+ptwrite | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ptwrite | FileCheck %s --check-prefix=X86_64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+ptwrite | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ptwrite | FileCheck %s --check-prefix=X86_64
define void @test_ptwrite(i32 %value) {
; X86-LABEL: test_ptwrite:
diff --git a/llvm/test/CodeGen/X86/ptwrite64-intrinsic.ll b/llvm/test/CodeGen/X86/ptwrite64-intrinsic.ll
index d5e5021440325..edee6ebb0e8c8 100644
--- a/llvm/test/CodeGen/X86/ptwrite64-intrinsic.ll
+++ b/llvm/test/CodeGen/X86/ptwrite64-intrinsic.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ptwrite | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ptwrite | FileCheck %s
define void @test_ptwrite64(i64 %value) {
; CHECK-LABEL: test_ptwrite64:
diff --git a/llvm/test/CodeGen/X86/pull-conditional-binop-through-shift.ll b/llvm/test/CodeGen/X86/pull-conditional-binop-through-shift.ll
index 8c858e04de2a1..4ac63a80eb7bf 100644
--- a/llvm/test/CodeGen/X86/pull-conditional-binop-through-shift.ll
+++ b/llvm/test/CodeGen/X86/pull-conditional-binop-through-shift.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
; shift left
diff --git a/llvm/test/CodeGen/X86/push-cfi-debug.ll b/llvm/test/CodeGen/X86/push-cfi-debug.ll
index a61f98f666a0d..cc9e7aa9ea8b2 100644
--- a/llvm/test/CodeGen/X86/push-cfi-debug.ll
+++ b/llvm/test/CodeGen/X86/push-cfi-debug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux | FileCheck %s
; Function Attrs: optsize
diff --git a/llvm/test/CodeGen/X86/push-cfi-obj.ll b/llvm/test/CodeGen/X86/push-cfi-obj.ll
index bf05c63f80e7e..163857a6be1ea 100644
--- a/llvm/test/CodeGen/X86/push-cfi-obj.ll
+++ b/llvm/test/CodeGen/X86/push-cfi-obj.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-pc-linux -filetype=obj | llvm-readobj -S --sr --sd - | FileCheck %s -check-prefix=LINUX
-; RUN: llc < %s -mtriple=i686-darwin-macosx10.7 -filetype=obj | llvm-readobj --sections - | FileCheck -check-prefix=DARWIN %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux -filetype=obj | llvm-readobj -S --sr --sd - | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-darwin-macosx10.7 -filetype=obj | llvm-readobj --sections - | FileCheck -check-prefix=DARWIN %s
; On darwin, check that we manage to generate the compact unwind section
; DARWIN: Name: __compact_unwind
diff --git a/llvm/test/CodeGen/X86/push-cfi.ll b/llvm/test/CodeGen/X86/push-cfi.ll
index 7bbd5142e7391..48b620ff7d670 100644
--- a/llvm/test/CodeGen/X86/push-cfi.ll
+++ b/llvm/test/CodeGen/X86/push-cfi.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=i686-pc-linux | FileCheck %s -check-prefix=LINUX -check-prefix=CHECK
-; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s -check-prefix=DARWIN -check-prefix=CHECK
-; RUN: llc < %s -mtriple=i686-pc-linux -stop-after=prologepilog | FileCheck %s --check-prefix=PEI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux | FileCheck %s -check-prefix=LINUX -check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin | FileCheck %s -check-prefix=DARWIN -check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux -stop-after=prologepilog | FileCheck %s --check-prefix=PEI
declare i32 @__gxx_personality_v0(...)
declare void @good(i32 %a, i32 %b, i32 %c, i32 %d)
diff --git a/llvm/test/CodeGen/X86/ragreedy-bug.ll b/llvm/test/CodeGen/X86/ragreedy-bug.ll
index 0d9332ef9cdd1..c4cddbe5d377e 100644
--- a/llvm/test/CodeGen/X86/ragreedy-bug.ll
+++ b/llvm/test/CodeGen/X86/ragreedy-bug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-macosx -regalloc=greedy | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx -regalloc=greedy | FileCheck %s
; This testing case is reduced from 197.parser prune_match function.
; We make sure register copies are not generated on isupper.exit blocks.
diff --git a/llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll b/llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
index c24823538aa14..cdaf7c38b5604 100644
--- a/llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
+++ b/llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx -regalloc=greedy | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx -regalloc=greedy | FileCheck %s
; This testing case is reduced from 254.gap SyFgets function.
; We make sure a spill is hoisted to a cold BB inside the hotter outer loop.
diff --git a/llvm/test/CodeGen/X86/ragreedy-last-chance-recoloring.ll b/llvm/test/CodeGen/X86/ragreedy-last-chance-recoloring.ll
index e4975759c4785..b066bb4e785f7 100644
--- a/llvm/test/CodeGen/X86/ragreedy-last-chance-recoloring.ll
+++ b/llvm/test/CodeGen/X86/ragreedy-last-chance-recoloring.ll
@@ -1,4 +1,4 @@
-; RUN: llc -regalloc=greedy -relocation-model=pic < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -regalloc=greedy -relocation-model=pic < %s 2>&1 | FileCheck %s
; Without the last chance recoloring, this test fails with:
; "ran out of registers".
@@ -10,7 +10,7 @@
; XXX: not llc -regalloc=greedy -relocation-model=pic -lcr-max-interf=1 < %s 2>&1 | FileCheck %s --check-prefix=CHECK-INTERF
; Test whether failure due to cutoff for interference is reported
-; RUN: llc -regalloc=greedy -relocation-model=pic -lcr-max-interf=1 -lcr-max-depth=0 -exhaustive-register-search < %s > %t 2>&1
+; RUN: llc -combiner-topological-sorting -regalloc=greedy -relocation-model=pic -lcr-max-interf=1 -lcr-max-depth=0 -exhaustive-register-search < %s > %t 2>&1
; RUN: FileCheck --input-file=%t %s --check-prefix=CHECK-EXHAUSTIVE
; Test whether exhaustive-register-search can bypass the depth and interference cutoffs of last chance recoloring
diff --git a/llvm/test/CodeGen/X86/range-false-deps.ll b/llvm/test/CodeGen/X86/range-false-deps.ll
index a3f746f3003a6..6c8d1e23aaf8f 100644
--- a/llvm/test/CodeGen/X86/range-false-deps.ll
+++ b/llvm/test/CodeGen/X86/range-false-deps.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --force-update
-; RUN: llc -verify-machineinstrs -mcpu=sapphirerapids -mattr=+false-deps-range -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE
-; RUN: llc -verify-machineinstrs -mcpu=sapphirerapids -mattr=-false-deps-range -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=sapphirerapids -mattr=+false-deps-range -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=ENABLE
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=sapphirerapids -mattr=-false-deps-range -mtriple=x86_64-unknown-unknown < %s | FileCheck %s --check-prefixes=DISABLE
define <4 x float> @rangeps_128(<4 x float> %a0, <4 x float> %a1) {
; ENABLE-LABEL: rangeps_128:
diff --git a/llvm/test/CodeGen/X86/raoint-intrinsics-32.ll b/llvm/test/CodeGen/X86/raoint-intrinsics-32.ll
index 20b27cd43f570..a4ab440dcbb9c 100644
--- a/llvm/test/CodeGen/X86/raoint-intrinsics-32.ll
+++ b/llvm/test/CodeGen/X86/raoint-intrinsics-32.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+raoint | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+raoint | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+raoint,+egpr --show-mc-encoding | FileCheck %s --check-prefixes=EGPR
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+raoint | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+raoint | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+raoint,+egpr --show-mc-encoding | FileCheck %s --check-prefixes=EGPR
define void @test_int_x86_aadd32(ptr %A, i32 %B) {
; X64-LABEL: test_int_x86_aadd32:
diff --git a/llvm/test/CodeGen/X86/raoint-intrinsics-64.ll b/llvm/test/CodeGen/X86/raoint-intrinsics-64.ll
index 6b684615a0261..841bd1e8c39ce 100644
--- a/llvm/test/CodeGen/X86/raoint-intrinsics-64.ll
+++ b/llvm/test/CodeGen/X86/raoint-intrinsics-64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+raoint | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+raoint,+egpr | FileCheck %s --check-prefixes=EGPR
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+raoint | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+raoint,+egpr | FileCheck %s --check-prefixes=EGPR
define void @test_int_x86_aadd64(ptr %A, i64 %B) {
; X64-LABEL: test_int_x86_aadd64:
diff --git a/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll b/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll
index b0f1b2ea73c91..891011d6a5cb9 100644
--- a/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll
+++ b/llvm/test/CodeGen/X86/rd-mod-wr-eflags.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
%struct.obj = type { i64 }
diff --git a/llvm/test/CodeGen/X86/rdpid.ll b/llvm/test/CodeGen/X86/rdpid.ll
index 7a86031ecdf81..5859a79bf48c5 100644
--- a/llvm/test/CodeGen/X86/rdpid.ll
+++ b/llvm/test/CodeGen/X86/rdpid.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=rdpid | FileCheck %s --check-prefix=X86-64
-; RUN: llc < %s -mtriple=i686-- -mattr=rdpid | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=rdpid | FileCheck %s --check-prefix=X86-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=rdpid | FileCheck %s --check-prefix=X86
define i32 @test_builtin_rdpid() {
; X86-64-LABEL: test_builtin_rdpid:
diff --git a/llvm/test/CodeGen/X86/rdpmc.ll b/llvm/test/CodeGen/X86/rdpmc.ll
index f1258a77ea0a2..9fd85958edb02 100644
--- a/llvm/test/CodeGen/X86/rdpmc.ll
+++ b/llvm/test/CodeGen/X86/rdpmc.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X64
; Verify that we correctly lower the "Read Performance-Monitoring Counters"
; x86 builtin.
diff --git a/llvm/test/CodeGen/X86/rdpru.ll b/llvm/test/CodeGen/X86/rdpru.ll
index 067ae31142c39..1e35175ca1eb9 100644
--- a/llvm/test/CodeGen/X86/rdpru.ll
+++ b/llvm/test/CodeGen/X86/rdpru.ll
@@ -1,13 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+rdpru | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=i686-- -mattr=+rdpru -fast-isel | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+rdpru | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+rdpru -fast-isel | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver3 -fast-isel | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver4 -fast-isel | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver5 -fast-isel | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver6 -fast-isel | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+rdpru | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+rdpru -fast-isel | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+rdpru | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+rdpru -fast-isel | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver3 -fast-isel | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver4 -fast-isel | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver5 -fast-isel | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver6 -fast-isel | FileCheck %s --check-prefix=X64
define void @rdpru_asm() {
; X86-LABEL: rdpru_asm:
diff --git a/llvm/test/CodeGen/X86/rdrand-x86_64.ll b/llvm/test/CodeGen/X86/rdrand-x86_64.ll
index e1db7b4747502..6012d7cec5c7b 100644
--- a/llvm/test/CodeGen/X86/rdrand-x86_64.ll
+++ b/llvm/test/CodeGen/X86/rdrand-x86_64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i -mattr=+rdrnd | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i -mattr=+rdrnd | FileCheck %s
declare {i64, i32} @llvm.x86.rdrand.64()
diff --git a/llvm/test/CodeGen/X86/rdrand.ll b/llvm/test/CodeGen/X86/rdrand.ll
index 52f767a4a419c..ecd27ef601051 100644
--- a/llvm/test/CodeGen/X86/rdrand.ll
+++ b/llvm/test/CodeGen/X86/rdrand.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=core-avx-i -mattr=+rdrnd | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i -mattr=+rdrnd | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mcpu=core-avx-i -mattr=+rdrnd | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i -mattr=+rdrnd | FileCheck %s --check-prefix=X64
declare {i16, i32} @llvm.x86.rdrand.16()
declare {i32, i32} @llvm.x86.rdrand.32()
diff --git a/llvm/test/CodeGen/X86/rdseed-x86_64.ll b/llvm/test/CodeGen/X86/rdseed-x86_64.ll
index bcff00ce46c36..525d51b70150c 100644
--- a/llvm/test/CodeGen/X86/rdseed-x86_64.ll
+++ b/llvm/test/CodeGen/X86/rdseed-x86_64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i -mattr=+rdseed | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i -mattr=+rdseed | FileCheck %s
declare {i64, i32} @llvm.x86.rdseed.64()
diff --git a/llvm/test/CodeGen/X86/rdseed.ll b/llvm/test/CodeGen/X86/rdseed.ll
index 5cdd84233cb0f..2d6d2fe48cc30 100644
--- a/llvm/test/CodeGen/X86/rdseed.ll
+++ b/llvm/test/CodeGen/X86/rdseed.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=core-avx-i -mattr=+rdseed | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i -mattr=+rdseed | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mcpu=core-avx-i -mattr=+rdseed | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i -mattr=+rdseed | FileCheck %s --check-prefix=X64
declare {i16, i32} @llvm.x86.rdseed.16()
declare {i32, i32} @llvm.x86.rdseed.32()
diff --git a/llvm/test/CodeGen/X86/rdtsc-upgrade.ll b/llvm/test/CodeGen/X86/rdtsc-upgrade.ll
index adf46bd537576..2c18a72d97e49 100644
--- a/llvm/test/CodeGen/X86/rdtsc-upgrade.ll
+++ b/llvm/test/CodeGen/X86/rdtsc-upgrade.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X64
; Verify upgrading of the old form of the rdtscp intrinsic.
diff --git a/llvm/test/CodeGen/X86/rdtsc.ll b/llvm/test/CodeGen/X86/rdtsc.ll
index 1efdfd126e3ea..0fcfe7d23ee55 100644
--- a/llvm/test/CodeGen/X86/rdtsc.ll
+++ b/llvm/test/CodeGen/X86/rdtsc.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=generic | FileCheck %s --check-prefix=X64
; Verify that we correctly lower ISD::READCYCLECOUNTER.
diff --git a/llvm/test/CodeGen/X86/read-fp-no-frame-pointer.ll b/llvm/test/CodeGen/X86/read-fp-no-frame-pointer.ll
index f59388e450bae..f824d12612cbd 100644
--- a/llvm/test/CodeGen/X86/read-fp-no-frame-pointer.ll
+++ b/llvm/test/CodeGen/X86/read-fp-no-frame-pointer.ll
@@ -1,4 +1,4 @@
-; RUN: not --crash llc < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
+; RUN: not --crash llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnueabi 2>&1 | FileCheck %s
define i32 @get_frame() nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/reassociate-add.ll b/llvm/test/CodeGen/X86/reassociate-add.ll
index a0792e5ccf6df..08c9a0dc52862 100644
--- a/llvm/test/CodeGen/X86/reassociate-add.ll
+++ b/llvm/test/CodeGen/X86/reassociate-add.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=x86-64 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=x86-64 < %s | FileCheck %s
; This file checks the reassociation of ADD instruction.
; The two ADD instructions add v0,v1,t2 together. t2 has a long dependence
diff --git a/llvm/test/CodeGen/X86/recip-fastmath.ll b/llvm/test/CodeGen/X86/recip-fastmath.ll
index f8d28ae260228..b1a000e52e8c4 100644
--- a/llvm/test/CodeGen/X86/recip-fastmath.ll
+++ b/llvm/test/CodeGen/X86/recip-fastmath.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX-RECIP
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma | FileCheck %s --check-prefixes=AVX,FMA-RECIP
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 | FileCheck %s --check-prefixes=AVX,BDVER2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,BTVER2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,SANDY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell | FileCheck %s --check-prefixes=AVX,HASWELL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell -mattr=-fma | FileCheck %s --check-prefixes=AVX,HASWELL-NO-FMA
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512,KNL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=AVX,AVX512,SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX-RECIP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma | FileCheck %s --check-prefixes=AVX,FMA-RECIP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 | FileCheck %s --check-prefixes=AVX,BDVER2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,BTVER2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,SANDY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell | FileCheck %s --check-prefixes=AVX,HASWELL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell -mattr=-fma | FileCheck %s --check-prefixes=AVX,HASWELL-NO-FMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512,KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=AVX,AVX512,SKX
; If the target's divss/divps instructions are substantially
; slower than rcpss/rcpps with a Newton-Raphson refinement,
diff --git a/llvm/test/CodeGen/X86/recip-fastmath2.ll b/llvm/test/CodeGen/X86/recip-fastmath2.ll
index 7fa13cb7105b0..2ade99c94a18e 100644
--- a/llvm/test/CodeGen/X86/recip-fastmath2.ll
+++ b/llvm/test/CodeGen/X86/recip-fastmath2.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX-RECIP
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma | FileCheck %s --check-prefixes=AVX,FMA-RECIP
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 | FileCheck %s --check-prefixes=AVX,BDVER2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,BTVER2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,SANDY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell | FileCheck %s --check-prefixes=AVX,HASWELL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell -mattr=-fma | FileCheck %s --check-prefixes=AVX,HASWELL-NO-FMA
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512,KNL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=AVX,AVX512,SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX-RECIP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma | FileCheck %s --check-prefixes=AVX,FMA-RECIP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver2 | FileCheck %s --check-prefixes=AVX,BDVER2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,BTVER2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge | FileCheck %s --check-prefixes=AVX,SANDY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell | FileCheck %s --check-prefixes=AVX,HASWELL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=haswell -mattr=-fma | FileCheck %s --check-prefixes=AVX,HASWELL-NO-FMA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512,KNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=AVX,AVX512,SKX
; It's the extra tests coverage for recip as discussed on D26855.
diff --git a/llvm/test/CodeGen/X86/recip-pic.ll b/llvm/test/CodeGen/X86/recip-pic.ll
index d2620e7202ee7..85b10660043f1 100644
--- a/llvm/test/CodeGen/X86/recip-pic.ll
+++ b/llvm/test/CodeGen/X86/recip-pic.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mcpu=slm -relocation-model=pic | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mcpu=slm -relocation-model=pic | FileCheck %s --check-prefix=CHECK
define fastcc float @foo(float %x) unnamed_addr #0 {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/red-zone.ll b/llvm/test/CodeGen/X86/red-zone.ll
index f2cdba682e767..10342089fe648 100644
--- a/llvm/test/CodeGen/X86/red-zone.ll
+++ b/llvm/test/CodeGen/X86/red-zone.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
@flags_gv = global i64 0
diff --git a/llvm/test/CodeGen/X86/red-zone2.ll b/llvm/test/CodeGen/X86/red-zone2.ll
index c7e855b011b39..d86134cb4b40b 100644
--- a/llvm/test/CodeGen/X86/red-zone2.ll
+++ b/llvm/test/CodeGen/X86/red-zone2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
; CHECK-LABEL: f0:
; CHECK: subq
; CHECK: addq
diff --git a/llvm/test/CodeGen/X86/reduce-trunc-shl.ll b/llvm/test/CodeGen/X86/reduce-trunc-shl.ll
index 54ba5bb1eae49..fc855f50dac75 100644
--- a/llvm/test/CodeGen/X86/reduce-trunc-shl.ll
+++ b/llvm/test/CodeGen/X86/reduce-trunc-shl.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
define void @trunc_shl_7_v4i32_v4i64(ptr addrspace(1) %out, ptr addrspace(1) %in) {
; SSE2-LABEL: trunc_shl_7_v4i32_v4i64:
diff --git a/llvm/test/CodeGen/X86/regalloc-advanced-split-cost.ll b/llvm/test/CodeGen/X86/regalloc-advanced-split-cost.ll
index ea1ca51908134..8a4a3c68fc64c 100644
--- a/llvm/test/CodeGen/X86/regalloc-advanced-split-cost.ll
+++ b/llvm/test/CodeGen/X86/regalloc-advanced-split-cost.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686 -regalloc=greedy --debug-only=regalloc 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -regalloc=greedy --debug-only=regalloc 2>&1 | FileCheck %s
; REQUIRES: asserts
diff --git a/llvm/test/CodeGen/X86/regalloc-fp.ll b/llvm/test/CodeGen/X86/regalloc-fp.ll
index e89e5ab1d6b59..cf49545128d98 100644
--- a/llvm/test/CodeGen/X86/regalloc-fp.ll
+++ b/llvm/test/CodeGen/X86/regalloc-fp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; Context:
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i32 @check_none() "frame-pointer"="none" {
; CHECK-LABEL: check_none:
; CHECK: # %bb.0: # %entry
diff --git a/llvm/test/CodeGen/X86/regalloc-reconcile-broken-hints.ll b/llvm/test/CodeGen/X86/regalloc-reconcile-broken-hints.ll
index 487391eab2efc..38f0ca6a9a140 100644
--- a/llvm/test/CodeGen/X86/regalloc-reconcile-broken-hints.ll
+++ b/llvm/test/CodeGen/X86/regalloc-reconcile-broken-hints.ll
@@ -1,4 +1,4 @@
-; RUN: llc -lsr-filter-same-scaled-reg=false < %s -o - -mtriple=x86_64-apple-macosx | FileCheck %s
+; RUN: llc -combiner-topological-sorting -lsr-filter-same-scaled-reg=false < %s -o - -mtriple=x86_64-apple-macosx | FileCheck %s
; Test case for the recoloring of broken hints.
; This is tricky to have something reasonably small to kick this optimization since
; it requires that spliting and spilling occur.
diff --git a/llvm/test/CodeGen/X86/regalloc-spill-at-ehpad.ll b/llvm/test/CodeGen/X86/regalloc-spill-at-ehpad.ll
index 2cc67c3dcc64f..123210772cd0a 100644
--- a/llvm/test/CodeGen/X86/regalloc-spill-at-ehpad.ll
+++ b/llvm/test/CodeGen/X86/regalloc-spill-at-ehpad.ll
@@ -1,4 +1,4 @@
-; RUN: llc -regalloc=greedy -mtriple=x86_64-pc-windows-msvc < %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -regalloc=greedy -mtriple=x86_64-pc-windows-msvc < %s -o - | FileCheck %s
; This test checks for proper handling of a condition where the greedy register
; allocator encounters a very short interval that contains no uses but does
diff --git a/llvm/test/CodeGen/X86/regalloc-tight-invoke.ll b/llvm/test/CodeGen/X86/regalloc-tight-invoke.ll
index 6ced8c79aa98b..35389e981239b 100644
--- a/llvm/test/CodeGen/X86/regalloc-tight-invoke.ll
+++ b/llvm/test/CodeGen/X86/regalloc-tight-invoke.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mtriple=x86_64-apple-darwin %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-apple-darwin %s -o - | FileCheck %s
declare void @foo(i32, ...)
declare i32 @__gxx_personality_v0(...)
diff --git a/llvm/test/CodeGen/X86/regcall-no-plt.ll b/llvm/test/CodeGen/X86/regcall-no-plt.ll
index d525448b60ca8..eeed2528a9ddb 100644
--- a/llvm/test/CodeGen/X86/regcall-no-plt.ll
+++ b/llvm/test/CodeGen/X86/regcall-no-plt.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-freebsd -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-freebsd -relocation-model=pic < %s | FileCheck %s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; According to x86-64 psABI, xmm0-xmm7 can be used to pass function parameters.
diff --git a/llvm/test/CodeGen/X86/reghinting.ll b/llvm/test/CodeGen/X86/reghinting.ll
index df54a1e5edfc8..3c86d5931f573 100644
--- a/llvm/test/CodeGen/X86/reghinting.ll
+++ b/llvm/test/CodeGen/X86/reghinting.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-apple-macosx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-apple-macosx | FileCheck %s
; PR10221
;; The registers %x and %y must both spill across the finit call.
diff --git a/llvm/test/CodeGen/X86/regparm.ll b/llvm/test/CodeGen/X86/regparm.ll
index 95009b587cbaf..a45df84a2d724 100644
--- a/llvm/test/CodeGen/X86/regparm.ll
+++ b/llvm/test/CodeGen/X86/regparm.ll
@@ -1,7 +1,7 @@
-; RUN: llc %s -mtriple=i386-pc-linux -o - | FileCheck %s
-; RUN: llc %s -mtriple=i386-pc-win32 -o - | FileCheck -check-prefix=WIN %s
-; RUN: llc %s -mtriple=i386-pc-linux -fast-isel -o - | FileCheck -check-prefix=FAST %s
-; RUN: llc %s -mtriple=i386-pc-win32 -fast-isel -o - | FileCheck -check-prefix=FASTWIN %s
+; RUN: llc -combiner-topological-sorting %s -mtriple=i386-pc-linux -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -mtriple=i386-pc-win32 -o - | FileCheck -check-prefix=WIN %s
+; RUN: llc -combiner-topological-sorting %s -mtriple=i386-pc-linux -fast-isel -o - | FileCheck -check-prefix=FAST %s
+; RUN: llc -combiner-topological-sorting %s -mtriple=i386-pc-win32 -fast-isel -o - | FileCheck -check-prefix=FASTWIN %s
diff --git a/llvm/test/CodeGen/X86/regpressure.ll b/llvm/test/CodeGen/X86/regpressure.ll
index 68e46efec8ee5..ae6645ad91729 100644
--- a/llvm/test/CodeGen/X86/regpressure.ll
+++ b/llvm/test/CodeGen/X86/regpressure.ll
@@ -2,7 +2,7 @@
;; Both functions in this testcase should codegen to the same function, and
;; neither of them should require spilling anything to the stack.
-; RUN: llc < %s -mtriple=i686-- -stats 2>&1 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -stats 2>&1 | \
; RUN: not grep "Number of register spills"
;; This can be compiled to use three registers if the loads are not
diff --git a/llvm/test/CodeGen/X86/relative-reloc-32.ll b/llvm/test/CodeGen/X86/relative-reloc-32.ll
index 7d0b1fd546a00..b6e2b7d03b2cd 100644
--- a/llvm/test/CodeGen/X86/relative-reloc-32.ll
+++ b/llvm/test/CodeGen/X86/relative-reloc-32.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-unknown-linux -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux -o - %s | FileCheck %s
@vtable = constant [4 x i32] [i32 0,
i32 sub (i32 ptrtoint (ptr @fn1 to i32), i32 ptrtoint (ptr getelementptr ([4 x i32], ptr @vtable, i32 0, i32 1) to i32)),
diff --git a/llvm/test/CodeGen/X86/relative-reloc-64.ll b/llvm/test/CodeGen/X86/relative-reloc-64.ll
index 6f88edfa075b8..078f620f52933 100644
--- a/llvm/test/CodeGen/X86/relative-reloc-64.ll
+++ b/llvm/test/CodeGen/X86/relative-reloc-64.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux -o - %s | FileCheck %s
@vtable = constant [5 x i32] [i32 0,
i32 trunc (i64 sub (i64 ptrtoint (ptr @fn1 to i64), i64 ptrtoint (ptr getelementptr ([5 x i32], ptr @vtable, i32 0, i32 1) to i64)) to i32),
diff --git a/llvm/test/CodeGen/X86/relocimm-code-model.ll b/llvm/test/CodeGen/X86/relocimm-code-model.ll
index ceb298fc0e581..00891964526b6 100644
--- a/llvm/test/CodeGen/X86/relocimm-code-model.ll
+++ b/llvm/test/CodeGen/X86/relocimm-code-model.ll
@@ -1,9 +1,9 @@
-; RUN: llc < %s | FileCheck %s --check-prefix=CHECK-SMALL
-; RUN: llc --code-model=medium -large-data-threshold=100 < %s | FileCheck %s --check-prefix=CHECK-SMALL
-; RUN: llc --code-model=medium < %s | FileCheck %s --check-prefix=CHECK-LARGE
-; RUN: llc --code-model=large -large-data-threshold=100 < %s | FileCheck %s --check-prefix=CHECK-LARGE
-; RUN: llc --code-model=large < %s | FileCheck %s --check-prefix=CHECK-LARGE
-; RUN: llc --code-model=kernel < %s | FileCheck %s --check-prefix=CHECK-SMALL
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s --check-prefix=CHECK-SMALL
+; RUN: llc -combiner-topological-sorting --code-model=medium -large-data-threshold=100 < %s | FileCheck %s --check-prefix=CHECK-SMALL
+; RUN: llc -combiner-topological-sorting --code-model=medium < %s | FileCheck %s --check-prefix=CHECK-LARGE
+; RUN: llc -combiner-topological-sorting --code-model=large -large-data-threshold=100 < %s | FileCheck %s --check-prefix=CHECK-LARGE
+; RUN: llc -combiner-topological-sorting --code-model=large < %s | FileCheck %s --check-prefix=CHECK-LARGE
+; RUN: llc -combiner-topological-sorting --code-model=kernel < %s | FileCheck %s --check-prefix=CHECK-SMALL
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/relptr-rodata.ll b/llvm/test/CodeGen/X86/relptr-rodata.ll
index 954ea8f01e747..60247fe6a8cf7 100644
--- a/llvm/test/CodeGen/X86/relptr-rodata.ll
+++ b/llvm/test/CodeGen/X86/relptr-rodata.ll
@@ -1,4 +1,4 @@
-; RUN: llc -relocation-model=pic -data-sections -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -relocation-model=pic -data-sections -o - %s | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/rem.ll b/llvm/test/CodeGen/X86/rem.ll
index 893b49f9a0179..f9f28c8506df1 100644
--- a/llvm/test/CodeGen/X86/rem.ll
+++ b/llvm/test/CodeGen/X86/rem.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+cmov | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+cmov | FileCheck %s
define i32 @test1(i32 %X) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/rem_crash.ll b/llvm/test/CodeGen/X86/rem_crash.ll
index 05a613c8adb80..7b2f788a280f1 100644
--- a/llvm/test/CodeGen/X86/rem_crash.ll
+++ b/llvm/test/CodeGen/X86/rem_crash.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686--
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
define i8 @test_minsize_uu8(i8 %x) minsize optsize {
entry:
diff --git a/llvm/test/CodeGen/X86/remarks-section.ll b/llvm/test/CodeGen/X86/remarks-section.ll
index 2794ea9f205c6..311601aa0fd72 100644
--- a/llvm/test/CodeGen/X86/remarks-section.ll
+++ b/llvm/test/CodeGen/X86/remarks-section.ll
@@ -1,11 +1,11 @@
-; RUN: llc < %s -mtriple=x86_64-darwin -remarks-section -pass-remarks-output=%/t.yaml | FileCheck --check-prefix=CHECK-DARWIN -DPATH=%/t.yaml %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-darwin -remarks-section -pass-remarks-output=%/t.yaml | FileCheck --check-prefix=CHECK-DARWIN -DPATH=%/t.yaml %s
-; RUN: llc < %s -mtriple=x86_64-darwin -pass-remarks-output=%/t.yaml | FileCheck --check-prefix=CHECK-DARWIN-DEFAULT %s
-; RUN: llc < %s -mtriple=x86_64-darwin --pass-remarks-format=bitstream -pass-remarks-output=%/t.yaml | FileCheck --check-prefix=CHECK-DARWIN-DEFAULT-BITSTREAM %s
-; RUN: llc < %s -mtriple=x86_64-darwin --pass-remarks-format=bitstream -remarks-section=false -pass-remarks-output=%/t.yaml | FileCheck --check-prefix=CHECK-DARWIN-OVERRIDE-BITSTREAM %s
-; RUN: llc < %s -mtriple=x86_64-darwin --pass-remarks-format=yaml -remarks-section=true -pass-remarks-output=%/t.yaml | FileCheck --check-prefix=CHECK-DARWIN-OVERRIDE-YAML %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-darwin -pass-remarks-output=%/t.yaml | FileCheck --check-prefix=CHECK-DARWIN-DEFAULT %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-darwin --pass-remarks-format=bitstream -pass-remarks-output=%/t.yaml | FileCheck --check-prefix=CHECK-DARWIN-DEFAULT-BITSTREAM %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-darwin --pass-remarks-format=bitstream -remarks-section=false -pass-remarks-output=%/t.yaml | FileCheck --check-prefix=CHECK-DARWIN-OVERRIDE-BITSTREAM %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-darwin --pass-remarks-format=yaml -remarks-section=true -pass-remarks-output=%/t.yaml | FileCheck --check-prefix=CHECK-DARWIN-OVERRIDE-YAML %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu --pass-remarks-format=bitstream -remarks-section -pass-remarks-output=%/t.yaml 2>&1 | FileCheck --check-prefix=CHECK-LINUX-DEFAULT-BITSTREAM %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu --pass-remarks-format=bitstream -remarks-section -pass-remarks-output=%/t.yaml 2>&1 | FileCheck --check-prefix=CHECK-LINUX-DEFAULT-BITSTREAM %s
; CHECK-DARWIN: .section __LLVM,__remarks,regular,debug
; CHECK-DARWIN-NEXT: .byte
diff --git a/llvm/test/CodeGen/X86/remat-constant.ll b/llvm/test/CodeGen/X86/remat-constant.ll
index 47deb2bf574da..d2fefe1d098f5 100644
--- a/llvm/test/CodeGen/X86/remat-constant.ll
+++ b/llvm/test/CodeGen/X86/remat-constant.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -relocation-model=static | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -relocation-model=static | FileCheck %s
declare void @bar() nounwind
diff --git a/llvm/test/CodeGen/X86/remat-fold-load.ll b/llvm/test/CodeGen/X86/remat-fold-load.ll
index c82aa3b9aa11e..d828d9a56f319 100644
--- a/llvm/test/CodeGen/X86/remat-fold-load.ll
+++ b/llvm/test/CodeGen/X86/remat-fold-load.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -frame-pointer=all -verify-coalescing
+; RUN: llc -combiner-topological-sorting < %s -frame-pointer=all -verify-coalescing
; PR13414
;
; During coalescing, remat triggers DCE which deletes the penultimate use of a
diff --git a/llvm/test/CodeGen/X86/remat-mov-0.ll b/llvm/test/CodeGen/X86/remat-mov-0.ll
index 9e8d8f6650315..f1d5a0d24312f 100644
--- a/llvm/test/CodeGen/X86/remat-mov-0.ll
+++ b/llvm/test/CodeGen/X86/remat-mov-0.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s
; CodeGen should remat the zero instead of spilling it.
diff --git a/llvm/test/CodeGen/X86/remat-phys-dead.ll b/llvm/test/CodeGen/X86/remat-phys-dead.ll
index 9a0a219869353..8110545d365e8 100644
--- a/llvm/test/CodeGen/X86/remat-phys-dead.ll
+++ b/llvm/test/CodeGen/X86/remat-phys-dead.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-darwin -debug -o /dev/null < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-apple-darwin -debug -o /dev/null < %s 2>&1 | FileCheck %s
; We need to make sure that rematerialization into a physical register marks the
; super- or sub-register as dead after this rematerialization since only the
diff --git a/llvm/test/CodeGen/X86/remat-scalar-zero.ll b/llvm/test/CodeGen/X86/remat-scalar-zero.ll
index 7a24f0a5894d4..5cb157d6ec8ce 100644
--- a/llvm/test/CodeGen/X86/remat-scalar-zero.ll
+++ b/llvm/test/CodeGen/X86/remat-scalar-zero.ll
@@ -1,6 +1,6 @@
; XFAIL: *
; ...should pass. See PR12324: misched bringup
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu > %t
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu > %t
; RUN: not grep xor %t
; RUN: not grep movap %t
; RUN: grep "\.quad.*0" %t
diff --git a/llvm/test/CodeGen/X86/replace-load-and-with-bzhi.ll b/llvm/test/CodeGen/X86/replace-load-and-with-bzhi.ll
index a0bd35d5d219b..f36f19c058fc0 100644
--- a/llvm/test/CodeGen/X86/replace-load-and-with-bzhi.ll
+++ b/llvm/test/CodeGen/X86/replace-load-and-with-bzhi.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi2 | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+bmi2 | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi2 | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+bmi2 | FileCheck %s -check-prefix=X86
@fill_table32 = internal unnamed_addr constant [32 x i32] [i32 0, i32 1, i32 3, i32 7, i32 15, i32 31, i32 63, i32 127, i32 255, i32 511, i32 1023, i32 2047, i32 4095, i32 8191, i32 16383, i32 32767, i32 65535, i32 131071, i32 262143, i32 524287, i32 1048575, i32 2097151, i32 4194303, i32 8388607, i32 16777215, i32 33554431, i32 67108863, i32 134217727, i32 268435455, i32 536870911, i32 1073741823, i32 2147483647], align 16
@fill_table32_partial = internal unnamed_addr constant [17 x i32] [i32 0, i32 1, i32 3, i32 7, i32 15, i32 31, i32 63, i32 127, i32 255, i32 511, i32 1023, i32 2047, i32 4095, i32 8191, i32 16383, i32 32767, i32 65535], align 16
diff --git a/llvm/test/CodeGen/X86/replace-thunk-tail-win.ll b/llvm/test/CodeGen/X86/replace-thunk-tail-win.ll
index e1d2a3425886b..e7bca0f5ff3c4 100644
--- a/llvm/test/CodeGen/X86/replace-thunk-tail-win.ll
+++ b/llvm/test/CodeGen/X86/replace-thunk-tail-win.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=64BIT
-; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefix=32BIT
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefix=64BIT
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefix=32BIT
define void @test(ptr %g) #0 {
; 64BIT-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/replace_unsupported_masked_mem_intrin.ll b/llvm/test/CodeGen/X86/replace_unsupported_masked_mem_intrin.ll
index 2299a931c80fb..ee974ab4937ed 100644
--- a/llvm/test/CodeGen/X86/replace_unsupported_masked_mem_intrin.ll
+++ b/llvm/test/CodeGen/X86/replace_unsupported_masked_mem_intrin.ll
@@ -1,7 +1,7 @@
-; RUN: llc -O0 -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,+sse2 < %s -o /dev/null
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,+sse2 < %s -o /dev/null
; pr33001 - Check that llc doesn't crash when running with O0 option.
-; RUN: llc -O2 -opt-bisect-limit=0 -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,+sse2 < %s -o /dev/null
+; RUN: llc -combiner-topological-sorting -O2 -opt-bisect-limit=0 -mtriple=x86_64-unknown-linux-gnu -mattr=+sse,+sse2 < %s -o /dev/null
; Check that llc doesn't crash due to ScalarizeMaskedMemIntring not being run
; because of opt-bisect-limit that in turn causes crash in instruction selection
; for unsupported gather/scatter.
diff --git a/llvm/test/CodeGen/X86/reserveDIreg.ll b/llvm/test/CodeGen/X86/reserveDIreg.ll
index 86ddf5795ca52..0d6456be7b17a 100644
--- a/llvm/test/CodeGen/X86/reserveDIreg.ll
+++ b/llvm/test/CodeGen/X86/reserveDIreg.ll
@@ -2,7 +2,7 @@
;; function prolog/epilog, as per GCC behavior, and that REP MOVS/STOS are not
;; selected when EDI is reserved on x86-32.
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -verify-machineinstrs | FileCheck %s
declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture readonly, i32, i1 immarg)
declare void @llvm.memset.p0.i32(ptr nocapture writeonly, i8, i32, i1 immarg)
diff --git a/llvm/test/CodeGen/X86/reserveRreg.ll b/llvm/test/CodeGen/X86/reserveRreg.ll
index 1a28f10b05681..b1fb818e3c021 100644
--- a/llvm/test/CodeGen/X86/reserveRreg.ll
+++ b/llvm/test/CodeGen/X86/reserveRreg.ll
@@ -1,7 +1,7 @@
;; Check if manually reserved registers are always excluded from being saved by
;; the function prolog/epilog, even for callee-saved ones, as per GCC behavior.
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -verify-machineinstrs | FileCheck %s
define preserve_mostcc void @t8() "target-features"="+reserve-r8" {
; CHECK-LABEL: t8:
diff --git a/llvm/test/CodeGen/X86/ret-addr.ll b/llvm/test/CodeGen/X86/ret-addr.ll
index d899951d4ae91..0a37bc1028112 100644
--- a/llvm/test/CodeGen/X86/ret-addr.ll
+++ b/llvm/test/CodeGen/X86/ret-addr.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -frame-pointer=all -mtriple=i686-- | FileCheck %s --check-prefix=i686
-; RUN: llc < %s -frame-pointer=all -mtriple=x86_64-- | FileCheck %s --check-prefix=x86_64
+; RUN: llc -combiner-topological-sorting < %s -frame-pointer=all -mtriple=i686-- | FileCheck %s --check-prefix=i686
+; RUN: llc -combiner-topological-sorting < %s -frame-pointer=all -mtriple=x86_64-- | FileCheck %s --check-prefix=x86_64
define ptr @h() nounwind readnone optsize {
; i686-LABEL: h:
diff --git a/llvm/test/CodeGen/X86/ret-i64-0.ll b/llvm/test/CodeGen/X86/ret-i64-0.ll
index c281de0a504a4..7fff5005cd321 100644
--- a/llvm/test/CodeGen/X86/ret-i64-0.ll
+++ b/llvm/test/CodeGen/X86/ret-i64-0.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define i64 @foo() nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/ret-mmx.ll b/llvm/test/CodeGen/X86/ret-mmx.ll
index 81dd73363c1fb..2318d77b95107 100644
--- a/llvm/test/CodeGen/X86/ret-mmx.ll
+++ b/llvm/test/CodeGen/X86/ret-mmx.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin11 -mcpu=core2 -mattr=+mmx,+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin11 -mcpu=core2 -mattr=+mmx,+sse2 | FileCheck %s
; rdar://6602459
@g_v1di = external global <1 x i64>
diff --git a/llvm/test/CodeGen/X86/retpoline-external.ll b/llvm/test/CodeGen/X86/retpoline-external.ll
index 8c068bb474782..2f5e0b4474063 100644
--- a/llvm/test/CodeGen/X86/retpoline-external.ll
+++ b/llvm/test/CodeGen/X86/retpoline-external.ll
@@ -1,8 +1,8 @@
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X64
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown -O0 < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X64FAST
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown -O0 < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X64FAST
-; RUN: llc -verify-machineinstrs -mtriple=i686-unknown < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X86
-; RUN: llc -verify-machineinstrs -mtriple=i686-unknown -O0 < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X86FAST
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i686-unknown < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i686-unknown -O0 < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X86FAST
declare dso_local void @bar(i32)
diff --git a/llvm/test/CodeGen/X86/retpoline-regparm.ll b/llvm/test/CodeGen/X86/retpoline-regparm.ll
index aa8d361a522ff..ae4e1782abcdf 100644
--- a/llvm/test/CodeGen/X86/retpoline-regparm.ll
+++ b/llvm/test/CodeGen/X86/retpoline-regparm.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -mtriple=i686-linux < %s | FileCheck --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i686-linux < %s | FileCheck --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" %s
; Test 32-bit retpoline when -mregparm=3 is used. This case is interesting
; because there are no available scratch registers. The Linux kernel builds
diff --git a/llvm/test/CodeGen/X86/retpoline.ll b/llvm/test/CodeGen/X86/retpoline.ll
index ea9c9bc4fae22..d72e2ffd91db1 100644
--- a/llvm/test/CodeGen/X86/retpoline.ll
+++ b/llvm/test/CodeGen/X86/retpoline.ll
@@ -1,8 +1,8 @@
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X64
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown -O0 < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X64FAST
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown -O0 < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X64FAST
-; RUN: llc -verify-machineinstrs -mtriple=i686-unknown < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X86
-; RUN: llc -verify-machineinstrs -mtriple=i686-unknown -O0 < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X86FAST
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i686-unknown < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i686-unknown -O0 < %s | FileCheck %s --implicit-check-not="jmp.*\*" --implicit-check-not="call.*\*" --check-prefix=X86FAST
declare void @bar(i32)
diff --git a/llvm/test/CodeGen/X86/return-ext.ll b/llvm/test/CodeGen/X86/return-ext.ll
index d38284df1f530..1c1274dd2d8db 100644
--- a/llvm/test/CodeGen/X86/return-ext.ll
+++ b/llvm/test/CodeGen/X86/return-ext.ll
@@ -1,14 +1,14 @@
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=0 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=0 | \
; RUN: FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=1 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=1 | \
; RUN: FileCheck -check-prefix=CHECK -check-prefix=BWON %s
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -fixup-byte-word-insts=0 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -fixup-byte-word-insts=0 | \
; RUN: FileCheck -check-prefix=CHECK -check-prefix=BWOFF %s
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=1 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu -fixup-byte-word-insts=1 | \
; RUN: FileCheck -check-prefix=CHECK -check-prefix=BWON %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -fixup-byte-word-insts=0 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -fixup-byte-word-insts=0 | \
; RUN: FileCheck -check-prefix=DARWIN -check-prefix=DARWIN-BWOFF %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -fixup-byte-word-insts=1 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -fixup-byte-word-insts=1 | \
; RUN: FileCheck -check-prefix=DARWIN -check-prefix=DARWIN-BWON %s
diff --git a/llvm/test/CodeGen/X86/return_zeroext_i2.ll b/llvm/test/CodeGen/X86/return_zeroext_i2.ll
index d535b0c41267a..83b880604c709 100644
--- a/llvm/test/CodeGen/X86/return_zeroext_i2.ll
+++ b/llvm/test/CodeGen/X86/return_zeroext_i2.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i386-pc-win32 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-win32 < %s | FileCheck %s
; Check that the testcase does not crash
define zeroext i2 @crash () {
ret i2 0
diff --git a/llvm/test/CodeGen/X86/returned-trunc-tail-calls.ll b/llvm/test/CodeGen/X86/returned-trunc-tail-calls.ll
index 10bd3b673be72..32ff47d427562 100644
--- a/llvm/test/CodeGen/X86/returned-trunc-tail-calls.ll
+++ b/llvm/test/CodeGen/X86/returned-trunc-tail-calls.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 | FileCheck %s
declare i32 @ret32(i32 returned)
declare i64 @ret64(i64 returned)
diff --git a/llvm/test/CodeGen/X86/rev16.ll b/llvm/test/CodeGen/X86/rev16.ll
index ecb1970185c2d..9a66054d4604f 100644
--- a/llvm/test/CodeGen/X86/rev16.ll
+++ b/llvm/test/CodeGen/X86/rev16.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
; 0xff00ff00 = 4278255360
; 0x00ff00ff = 16711935
diff --git a/llvm/test/CodeGen/X86/reverse_branches.ll b/llvm/test/CodeGen/X86/reverse_branches.ll
index 93c82a4524ef9..fd7b2044f8038 100644
--- a/llvm/test/CodeGen/X86/reverse_branches.ll
+++ b/llvm/test/CodeGen/X86/reverse_branches.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
@.str2 = private unnamed_addr constant [7 x i8] c"memchr\00", align 1
@.str3 = private unnamed_addr constant [11 x i8] c"bsd_memchr\00", align 1
diff --git a/llvm/test/CodeGen/X86/rex-profile-test.ll b/llvm/test/CodeGen/X86/rex-profile-test.ll
index 379d8faa4fc45..b8af0becab4d6 100644
--- a/llvm/test/CodeGen/X86/rex-profile-test.ll
+++ b/llvm/test/CodeGen/X86/rex-profile-test.ll
@@ -1,7 +1,7 @@
;; Test that the UEFI and Windows targets set the rex64 correctly.
-; RUN: llc -mtriple x86_64-uefi %s -o - | FileCheck %s -check-prefix=REX
-; RUN: llc -mtriple x86_64-windows-msvc %s -o - | FileCheck %s -check-prefix=REX
-; RUN: llc -mtriple x86_64-unknown-linux %s -o - | FileCheck %s -check-prefix=NOREX
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-uefi %s -o - | FileCheck %s -check-prefix=REX
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-windows-msvc %s -o - | FileCheck %s -check-prefix=REX
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-linux %s -o - | FileCheck %s -check-prefix=NOREX
define void @test_tailjmp(ptr %fptr) {
; REX-LABEL: test_tailjmp: # @test_tailjmp
diff --git a/llvm/test/CodeGen/X86/rint-conv.ll b/llvm/test/CodeGen/X86/rint-conv.ll
index f43a2a9baff02..59d0c7195f4e4 100644
--- a/llvm/test/CodeGen/X86/rint-conv.ll
+++ b/llvm/test/CodeGen/X86/rint-conv.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
define i32 @combine_f32(float %x) nounwind {
; X86-LABEL: combine_f32:
diff --git a/llvm/test/CodeGen/X86/rip-rel-address.ll b/llvm/test/CodeGen/X86/rip-rel-address.ll
index 8266e4e4fa01e..9e49a4574e8a3 100644
--- a/llvm/test/CodeGen/X86/rip-rel-address.ll
+++ b/llvm/test/CodeGen/X86/rip-rel-address.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -relocation-model=pic -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=PIC64
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=STATIC64
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=PIC64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=static | FileCheck %s -check-prefix=STATIC64
; Use %rip-relative addressing even in static mode on x86-64, because
; it has a smaller encoding.
diff --git a/llvm/test/CodeGen/X86/rip-rel-lea.ll b/llvm/test/CodeGen/X86/rip-rel-lea.ll
index 2bcdb0202d76b..3bb44511ee789 100644
--- a/llvm/test/CodeGen/X86/rip-rel-lea.ll
+++ b/llvm/test/CodeGen/X86/rip-rel-lea.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=PIC64
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 -relocation-model=pic | FileCheck %s -check-prefix=PICX32
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=PIC32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=PIC64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnux32 -relocation-model=pic | FileCheck %s -check-prefix=PICX32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic | FileCheck %s -check-prefix=PIC32
; Use %rip-relative addressing even in static mode on x86-64, because
; it has a smaller encoding.
diff --git a/llvm/test/CodeGen/X86/rodata-relocs.ll b/llvm/test/CodeGen/X86/rodata-relocs.ll
index 3283bd7dafd82..22365b5019039 100644
--- a/llvm/test/CodeGen/X86/rodata-relocs.ll
+++ b/llvm/test/CodeGen/X86/rodata-relocs.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -relocation-model=static | FileCheck %s -check-prefix=STATIC
-; RUN: llc < %s -relocation-model=pic | FileCheck %s -check-prefix=PIC
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=static | FileCheck %s -check-prefix=STATIC
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic | FileCheck %s -check-prefix=PIC
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/rot16.ll b/llvm/test/CodeGen/X86/rot16.ll
index c7c2d33d98922..486b355e536c4 100644
--- a/llvm/test/CodeGen/X86/rot16.ll
+++ b/llvm/test/CodeGen/X86/rot16.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86,X86-BASE
-; RUN: llc < %s -mtriple=i686-- -mattr=movbe | FileCheck %s --check-prefixes=X86,X86-MOVBE
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,X64-BASE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=movbe | FileCheck %s --check-prefixes=X64,X64-MOVBE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86,X86-BASE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=movbe | FileCheck %s --check-prefixes=X86,X86-MOVBE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64,X64-BASE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=movbe | FileCheck %s --check-prefixes=X64,X64-MOVBE
define i16 @foo(i16 %x, i16 %y, i16 %z) nounwind {
; X86-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/rot32.ll b/llvm/test/CodeGen/X86/rot32.ll
index 114d558954f4c..636e1c8ad24cc 100644
--- a/llvm/test/CodeGen/X86/rot32.ll
+++ b/llvm/test/CodeGen/X86/rot32.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s --check-prefix=CHECK32 --check-prefix=X86
-; RUN: llc < %s -mtriple=i686-- -mcpu=corei7-avx | FileCheck %s --check-prefix=CHECK32 --check-prefix=SHLD
-; RUN: llc < %s -mtriple=i686-- -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK32 --check-prefix=BMI2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s --check-prefix=CHECK64 --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s --check-prefix=CHECK64 --check-prefix=SHLD64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK64 --check-prefix=BMI264
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s --check-prefix=CHECK32 --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=corei7-avx | FileCheck %s --check-prefix=CHECK32 --check-prefix=SHLD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK32 --check-prefix=BMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s --check-prefix=CHECK64 --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s --check-prefix=CHECK64 --check-prefix=SHLD64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=core-avx2 | FileCheck %s --check-prefix=CHECK64 --check-prefix=BMI264
define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone {
; CHECK32-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/rot64.ll b/llvm/test/CodeGen/X86/rot64.ll
index b53a686038e91..55f041002bda0 100644
--- a/llvm/test/CodeGen/X86/rot64.ll
+++ b/llvm/test/CodeGen/X86/rot64.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s --check-prefix=ALL --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s --check-prefix=ALL --check-prefix=SHLD
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=core-avx2 | FileCheck %s --check-prefix=ALL --check-prefix=BMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7 | FileCheck %s --check-prefix=ALL --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=corei7-avx | FileCheck %s --check-prefix=ALL --check-prefix=SHLD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=core-avx2 | FileCheck %s --check-prefix=ALL --check-prefix=BMI2
define i64 @foo(i64 %x, i64 %y, i64 %z) nounwind readnone {
; ALL-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/rotate-multi.ll b/llvm/test/CodeGen/X86/rotate-multi.ll
index 8b4c852fd7ef7..c7833a4dcb749 100644
--- a/llvm/test/CodeGen/X86/rotate-multi.ll
+++ b/llvm/test/CodeGen/X86/rotate-multi.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s | FileCheck %s
; OR of two rotates of %a0(edi).
define i32 @f0(i32 %a0) #0 {
diff --git a/llvm/test/CodeGen/X86/rotate2.ll b/llvm/test/CodeGen/X86/rotate2.ll
index ac299581dd2f8..d62bfd953c08c 100644
--- a/llvm/test/CodeGen/X86/rotate2.ll
+++ b/llvm/test/CodeGen/X86/rotate2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefixes=X64
define i64 @test1(i64 %x) nounwind {
; X86-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/rotate5.ll b/llvm/test/CodeGen/X86/rotate5.ll
index b1f38f87ec895..321c5e3cfda37 100644
--- a/llvm/test/CodeGen/X86/rotate5.ll
+++ b/llvm/test/CodeGen/X86/rotate5.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
; Ensure that the (pre-extended) shift amount type is wide enough to take any mask.
define void @PR56859() {
diff --git a/llvm/test/CodeGen/X86/rounding-ops.ll b/llvm/test/CodeGen/X86/rounding-ops.ll
index 375dc02528620..c18526760a696 100644
--- a/llvm/test/CodeGen/X86/rounding-ops.ll
+++ b/llvm/test/CodeGen/X86/rounding-ops.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-macosx -mattr=+sse4.1 | FileCheck -check-prefix=CHECK-SSE %s
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-macosx -mattr=+avx | FileCheck -check-prefix=CHECK-AVX %s
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-macosx -mattr=+avx512f | FileCheck -check-prefix=CHECK-AVX512 %s
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-macosx -mattr=+sse4.1 | FileCheck -check-prefix=CHECK-SSE %s
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-macosx -mattr=+avx | FileCheck -check-prefix=CHECK-AVX %s
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-macosx -mattr=+avx512f | FileCheck -check-prefix=CHECK-AVX512 %s
define float @test1(float %x) nounwind {
; CHECK-SSE-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/rrlist-livereg-corrutpion.ll b/llvm/test/CodeGen/X86/rrlist-livereg-corrutpion.ll
index e293bd606d0ba..1b821441e939f 100644
--- a/llvm/test/CodeGen/X86/rrlist-livereg-corrutpion.ll
+++ b/llvm/test/CodeGen/X86/rrlist-livereg-corrutpion.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; CHECK-LABEL: test
define i64 @test(i64 %a, i256 %b, i1 %c) {
diff --git a/llvm/test/CodeGen/X86/rtm.ll b/llvm/test/CodeGen/X86/rtm.ll
index b0589ff101e12..06766905fabea 100644
--- a/llvm/test/CodeGen/X86/rtm.ll
+++ b/llvm/test/CodeGen/X86/rtm.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s -mtriple=i686-unknown-unknown -mattr=+rtm | FileCheck %s --check-prefix=X86
-; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown -mattr=+rtm | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=i686-unknown-unknown -mattr=+rtm | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown -mattr=+rtm | FileCheck %s --check-prefix=X64
declare i32 @llvm.x86.xbegin() nounwind
declare void @llvm.x86.xend() nounwind
diff --git a/llvm/test/CodeGen/X86/saddo-redundant-add.ll b/llvm/test/CodeGen/X86/saddo-redundant-add.ll
index f132ef8baab92..2b734190e98dd 100644
--- a/llvm/test/CodeGen/X86/saddo-redundant-add.ll
+++ b/llvm/test/CodeGen/X86/saddo-redundant-add.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
define void @redundant_add(i64 %n) {
; Check that we don't create two additions for the sadd.with.overflow.
diff --git a/llvm/test/CodeGen/X86/safestack.ll b/llvm/test/CodeGen/X86/safestack.ll
index 124085ce6ff77..bd471ce9d32fa 100644
--- a/llvm/test/CodeGen/X86/safestack.ll
+++ b/llvm/test/CodeGen/X86/safestack.ll
@@ -1,10 +1,10 @@
-; RUN: llc -mtriple=i386-linux < %s -o - | FileCheck --check-prefix=LINUX-I386 %s
-; RUN: llc -mtriple=x86_64-linux < %s -o - | FileCheck --check-prefix=LINUX-X64 %s
-; RUN: llc -mtriple=i386-linux-android < %s -o - | FileCheck --check-prefix=ANDROID-I386 %s
-; RUN: llc -mtriple=x86_64-linux-android < %s -o - | FileCheck --check-prefix=ANDROID-X64 %s
-; RUN: llc -mtriple=x86_64-fuchsia < %s -o - | FileCheck --check-prefix=FUCHSIA-X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux < %s -o - | FileCheck --check-prefix=LINUX-I386 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s -o - | FileCheck --check-prefix=LINUX-X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-android < %s -o - | FileCheck --check-prefix=ANDROID-I386 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-android < %s -o - | FileCheck --check-prefix=ANDROID-X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-fuchsia < %s -o - | FileCheck --check-prefix=FUCHSIA-X64 %s
-; RUN: llc -mtriple=i386-linux -safestack-use-pointer-address < %s -o - | FileCheck --check-prefix=LINUX-I386-PA %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux -safestack-use-pointer-address < %s -o - | FileCheck --check-prefix=LINUX-I386-PA %s
define void @_Z1fv() safestack {
entry:
diff --git a/llvm/test/CodeGen/X86/safestack_inline.ll b/llvm/test/CodeGen/X86/safestack_inline.ll
index 87e7f510e03ca..8afd9289d0eee 100644
--- a/llvm/test/CodeGen/X86/safestack_inline.ll
+++ b/llvm/test/CodeGen/X86/safestack_inline.ll
@@ -1,5 +1,5 @@
-; RUN: sed -e "s/ATTR//" %s | llc -mtriple=x86_64-linux -safestack-use-pointer-address | FileCheck --check-prefix=INLINE %s
-; RUN: sed -e "s/ATTR/noinline/" %s | llc -mtriple=x86_64-linux -safestack-use-pointer-address | FileCheck --check-prefix=CALL %s
+; RUN: sed -e "s/ATTR//" %s | llc -combiner-topological-sorting -mtriple=x86_64-linux -safestack-use-pointer-address | FileCheck --check-prefix=INLINE %s
+; RUN: sed -e "s/ATTR/noinline/" %s | llc -combiner-topological-sorting -mtriple=x86_64-linux -safestack-use-pointer-address | FileCheck --check-prefix=CALL %s
@p = external thread_local global ptr, align 8
diff --git a/llvm/test/CodeGen/X86/safestack_ssp.ll b/llvm/test/CodeGen/X86/safestack_ssp.ll
index 0e3f261acb1ce..82fc277364a01 100644
--- a/llvm/test/CodeGen/X86/safestack_ssp.ll
+++ b/llvm/test/CodeGen/X86/safestack_ssp.ll
@@ -1,7 +1,7 @@
; Test codegen pipeline for SafeStack + StackProtector combination.
-; RUN: llc -mtriple=i386-linux < %s -o - | FileCheck --check-prefix=LINUX-I386 %s
-; RUN: llc -mtriple=x86_64-linux < %s -o - | FileCheck --check-prefix=LINUX-X64 %s
-; RUN: llc -mtriple=x86_64-fuchsia < %s -o - | FileCheck --check-prefix=FUCHSIA-X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux < %s -o - | FileCheck --check-prefix=LINUX-I386 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s -o - | FileCheck --check-prefix=LINUX-X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-fuchsia < %s -o - | FileCheck --check-prefix=FUCHSIA-X64 %s
define void @_Z1fv() safestack sspreq {
entry:
diff --git a/llvm/test/CodeGen/X86/same-align-bytes-with-llasm-llobj.ll b/llvm/test/CodeGen/X86/same-align-bytes-with-llasm-llobj.ll
index 419bf627b39e6..9e5a443dd80b4 100644
--- a/llvm/test/CodeGen/X86/same-align-bytes-with-llasm-llobj.ll
+++ b/llvm/test/CodeGen/X86/same-align-bytes-with-llasm-llobj.ll
@@ -1,6 +1,6 @@
-; RUN: llc %s -o - -filetype=obj --mcpu=znver2 | llvm-objdump -dr - | FileCheck %s
-; RUN: llc %s -o - -filetype=asm --mcpu=znver2 | llvm-mc - -o - --mcpu=znver2 -filetype=obj -triple x86_64-unknown-linux-gnu | llvm-objdump -dr - | FileCheck %s
-; RUN: llc %s -o - -filetype=asm --mcpu=znver2 | FileCheck %s --check-prefix=ASM
+; RUN: llc -combiner-topological-sorting %s -o - -filetype=obj --mcpu=znver2 | llvm-objdump -dr - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - -filetype=asm --mcpu=znver2 | llvm-mc - -o - --mcpu=znver2 -filetype=obj -triple x86_64-unknown-linux-gnu | llvm-objdump -dr - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - -filetype=asm --mcpu=znver2 | FileCheck %s --check-prefix=ASM
;; Check that we produce a push, then an align-to-16-bytes p2align.
;
diff --git a/llvm/test/CodeGen/X86/sandybridge-loads.ll b/llvm/test/CodeGen/X86/sandybridge-loads.ll
index 330f059e51008..2f5116ed32a29 100644
--- a/llvm/test/CodeGen/X86/sandybridge-loads.ll
+++ b/llvm/test/CodeGen/X86/sandybridge-loads.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=corei7-avx | FileCheck %s
define void @wideloads(ptr %a, ptr %b, ptr %c) nounwind {
; CHECK-LABEL: wideloads:
diff --git a/llvm/test/CodeGen/X86/sar_fold64.ll b/llvm/test/CodeGen/X86/sar_fold64.ll
index 245af74c23891..55206bb408a03 100644
--- a/llvm/test/CodeGen/X86/sar_fold64.ll
+++ b/llvm/test/CodeGen/X86/sar_fold64.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2
define i32 @shl48sar47(i64 %a) #0 {
; CHECK-LABEL: shl48sar47:
diff --git a/llvm/test/CodeGen/X86/sat-add.ll b/llvm/test/CodeGen/X86/sat-add.ll
index 69e6ff7770ebe..c9fb9d322ece2 100644
--- a/llvm/test/CodeGen/X86/sat-add.ll
+++ b/llvm/test/CodeGen/X86/sat-add.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=ANY,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=ANY,SSE,SSE4,SSE41
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=ANY,SSE,SSE4,SSE42
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=ANY,AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl | FileCheck %s --check-prefixes=ANY,AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=ANY,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefixes=ANY,SSE,SSE4,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.2 | FileCheck %s --check-prefixes=ANY,SSE,SSE4,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=ANY,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512vl | FileCheck %s --check-prefixes=ANY,AVX,AVX512
; There are at least 3 potential patterns corresponding to an unsigned saturated add: min, cmp with sum, cmp with not.
; Test each of those patterns with i8/i16/i32/i64.
diff --git a/llvm/test/CodeGen/X86/sbb-add-constant.ll b/llvm/test/CodeGen/X86/sbb-add-constant.ll
index 5a4f547ca5894..fdffbefabef14 100644
--- a/llvm/test/CodeGen/X86/sbb-add-constant.ll
+++ b/llvm/test/CodeGen/X86/sbb-add-constant.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
;
; Verify that ADD(SBB(Y,0,flags),C) folds to SBB(Y,-C,flags).
; SBB(Y,0) = Y - CF; adding C gives Y - CF + C = Y - (-C) - CF = SBB(Y,-C).
diff --git a/llvm/test/CodeGen/X86/sbb-false-dep.ll b/llvm/test/CodeGen/X86/sbb-false-dep.ll
index 34a92cb58692b..bb32bcc52babc 100644
--- a/llvm/test/CodeGen/X86/sbb-false-dep.ll
+++ b/llvm/test/CodeGen/X86/sbb-false-dep.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=CHECK
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sbb-dep-breaking | FileCheck %s --check-prefixes=IDIOM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sbb-dep-breaking | FileCheck %s --check-prefixes=IDIOM
%struct.y_s = type { ptr, ptr }
diff --git a/llvm/test/CodeGen/X86/sbb-zero-idiom.ll b/llvm/test/CodeGen/X86/sbb-zero-idiom.ll
index 964e91b6f4a86..a51e616533346 100644
--- a/llvm/test/CodeGen/X86/sbb-zero-idiom.ll
+++ b/llvm/test/CodeGen/X86/sbb-zero-idiom.ll
@@ -2,18 +2,18 @@
; Check the attribute.
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-sbb-dep-breaking | FileCheck %s --check-prefixes=ZERO
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sbb-dep-breaking | FileCheck %s --check-prefixes=IDIOM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-sbb-dep-breaking | FileCheck %s --check-prefixes=ZERO
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sbb-dep-breaking | FileCheck %s --check-prefixes=IDIOM
; And check that CPUs have included the attribute as expected.
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=ZERO
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=sandybridge | FileCheck %s --check-prefixes=ZERO
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=skylake | FileCheck %s --check-prefixes=ZERO
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=k8 | FileCheck %s --check-prefixes=IDIOM
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver1 | FileCheck %s --check-prefixes=IDIOM
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver2 | FileCheck %s --check-prefixes=IDIOM
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver3 | FileCheck %s --check-prefixes=IDIOM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=ZERO
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=sandybridge | FileCheck %s --check-prefixes=ZERO
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=skylake | FileCheck %s --check-prefixes=ZERO
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=k8 | FileCheck %s --check-prefixes=IDIOM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=btver1 | FileCheck %s --check-prefixes=IDIOM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=bdver2 | FileCheck %s --check-prefixes=IDIOM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver3 | FileCheck %s --check-prefixes=IDIOM
define i32 @i32_select_0_or_neg1(i32 %x) {
; ZERO-LABEL: i32_select_0_or_neg1:
diff --git a/llvm/test/CodeGen/X86/sbb.ll b/llvm/test/CodeGen/X86/sbb.ll
index f5a34688d67b5..548c2b24c0896 100644
--- a/llvm/test/CodeGen/X86/sbb.ll
+++ b/llvm/test/CodeGen/X86/sbb.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; Vary the operand sizes for extra coverage, but the transform should be identical in all cases.
diff --git a/llvm/test/CodeGen/X86/scalar-ext-logic.ll b/llvm/test/CodeGen/X86/scalar-ext-logic.ll
index 9926a5be6688c..fbf3aead15e5a 100644
--- a/llvm/test/CodeGen/X86/scalar-ext-logic.ll
+++ b/llvm/test/CodeGen/X86/scalar-ext-logic.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefixes=X64
; Fold and(sextinreg(v0,i5),sextinreg(v1,i5)) -> sextinreg(and(v0,v1),i5)
define i32 @sextinreg_i32(ptr %p0, ptr %p1) {
diff --git a/llvm/test/CodeGen/X86/scalar-extract.ll b/llvm/test/CodeGen/X86/scalar-extract.ll
index f630abb024d69..7eb15f8a15cbe 100644
--- a/llvm/test/CodeGen/X86/scalar-extract.ll
+++ b/llvm/test/CodeGen/X86/scalar-extract.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+mmx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+mmx | FileCheck %s
; Check that widening doesn't introduce a mmx register in this case when
; a simple load/store would suffice.
diff --git a/llvm/test/CodeGen/X86/scalar-fp-to-i32.ll b/llvm/test/CodeGen/X86/scalar-fp-to-i32.ll
index ce9723b3a84bc..43bc1afbe719c 100644
--- a/llvm/test/CodeGen/X86/scalar-fp-to-i32.ll
+++ b/llvm/test/CodeGen/X86/scalar-fp-to-i32.ll
@@ -1,28 +1,28 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X86-AVX512,X86-AVX512-WIN
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X86-AVX512,X86-AVX512-LIN
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-WIN
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-LIN
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X86-AVX512,X86-AVX512-WIN
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X86-AVX512,X86-AVX512-LIN
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-WIN
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-LIN
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc -mattr=+avx512f | FileCheck %s --check-prefixes=X86-AVX512,X86-AVX512-WIN
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=X86-AVX512,X86-AVX512-LIN
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -mattr=+avx512f | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-WIN
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-LIN
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc -mattr=+sse3 | FileCheck %s --check-prefixes=X86-SSE,X86-SSE3,X86-SSE-WIN,X86-SSE3-WIN
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=+sse3 | FileCheck %s --check-prefixes=X86-SSE,X86-SSE3,X86-SSE-LIN,X86-SSE3-LIN
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -mattr=+sse3 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-WIN,X64-SSE3-WIN
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse3 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-LIN,X64-SSE3-LIN
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE,X86-SSE2,X86-SSE-WIN,X86-SSE2-WIN
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE,X86-SSE2,X86-SSE-LIN,X86-SSE2-LIN
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-WIN,X64-SSE2-WIN
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-LIN,X64-SSE2-LIN
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc -mattr=+sse | FileCheck %s --check-prefixes=X86-SSE,X86-SSE1,X86-SSE-WIN,X86-SSE1-WIN
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=+sse | FileCheck %s --check-prefixes=X86-SSE,X86-SSE1,X86-SSE-LIN,X86-SSE1-LIN
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc -mattr=-sse | FileCheck %s --check-prefixes=X87,X87-WIN
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=-sse | FileCheck %s --check-prefixes=X87,X87-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X86-AVX512,X86-AVX512-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X86-AVX512,X86-AVX512-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X86-AVX512,X86-AVX512-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X86-AVX512,X86-AVX512-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc -mattr=+avx512f | FileCheck %s --check-prefixes=X86-AVX512,X86-AVX512-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=X86-AVX512,X86-AVX512-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc -mattr=+avx512f | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc -mattr=+sse3 | FileCheck %s --check-prefixes=X86-SSE,X86-SSE3,X86-SSE-WIN,X86-SSE3-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=+sse3 | FileCheck %s --check-prefixes=X86-SSE,X86-SSE3,X86-SSE-LIN,X86-SSE3-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc -mattr=+sse3 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-WIN,X64-SSE3-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse3 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-LIN,X64-SSE3-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE,X86-SSE2,X86-SSE-WIN,X86-SSE2-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE,X86-SSE2,X86-SSE-LIN,X86-SSE2-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-WIN,X64-SSE2-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-LIN,X64-SSE2-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc -mattr=+sse | FileCheck %s --check-prefixes=X86-SSE,X86-SSE1,X86-SSE-WIN,X86-SSE1-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=+sse | FileCheck %s --check-prefixes=X86-SSE,X86-SSE1,X86-SSE-LIN,X86-SSE1-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc -mattr=-sse | FileCheck %s --check-prefixes=X87,X87-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=-sse | FileCheck %s --check-prefixes=X87,X87-LIN
; Check that scalar FP conversions to signed and unsigned int32 are using
; reasonable sequences, across platforms and target switches.
diff --git a/llvm/test/CodeGen/X86/scalar-fp-to-i64.ll b/llvm/test/CodeGen/X86/scalar-fp-to-i64.ll
index 3287869f2c601..14b6d4b44aae3 100644
--- a/llvm/test/CodeGen/X86/scalar-fp-to-i64.ll
+++ b/llvm/test/CodeGen/X86/scalar-fp-to-i64.ll
@@ -1,26 +1,26 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X86-AVX512DQVL,X86-AVX512-WIN
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X86-AVX512DQVL,X86-AVX512-LIN
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-WIN
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-LIN
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X86-AVX512DQ,X86-AVX512-WIN
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X86-AVX512DQ,X86-AVX512-LIN
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-WIN
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-LIN
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc -mattr=+avx512f | FileCheck %s --check-prefixes=X86-AVX512-WIN,X86-AVX512F-WIN
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=X86-AVX512-LIN,X86-AVX512F-LIN
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -mattr=+avx512f | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-WIN
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-LIN
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc -mattr=+sse3 | FileCheck %s --check-prefixes=X86-SSE-WIN,X86-SSE3-WIN
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=+sse3 | FileCheck %s --check-prefixes=X86-SSE-LIN,X86-SSE3-LIN
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -mattr=+sse3 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-WIN,X64-SSE3-WIN
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse3 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-LIN,X64-SSE3-LIN
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE-WIN,X86-SSE2-WIN
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE-LIN,X86-SSE2-LIN
-; RUN: llc < %s -mtriple=x86_64-pc-windows-msvc -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-WIN,X64-SSE2-WIN
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-LIN,X64-SSE2-LIN
-; RUN: llc < %s -mtriple=i386-pc-windows-msvc -mattr=-sse | FileCheck %s --check-prefix=X87-WIN
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=-sse | FileCheck %s --check-prefix=X87-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X86-AVX512DQVL,X86-AVX512-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X86-AVX512DQVL,X86-AVX512-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X86-AVX512DQ,X86-AVX512-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X86-AVX512DQ,X86-AVX512-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc -mattr=+avx512f | FileCheck %s --check-prefixes=X86-AVX512-WIN,X86-AVX512F-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=X86-AVX512-LIN,X86-AVX512F-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc -mattr=+avx512f | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefixes=X64-AVX512,X64-AVX512-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc -mattr=+sse3 | FileCheck %s --check-prefixes=X86-SSE-WIN,X86-SSE3-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=+sse3 | FileCheck %s --check-prefixes=X86-SSE-LIN,X86-SSE3-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc -mattr=+sse3 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-WIN,X64-SSE3-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse3 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-LIN,X64-SSE3-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE-WIN,X86-SSE2-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE-LIN,X86-SSE2-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-msvc -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-WIN,X64-SSE2-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE,X64-SSE-LIN,X64-SSE2-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-windows-msvc -mattr=-sse | FileCheck %s --check-prefix=X87-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=-sse | FileCheck %s --check-prefix=X87-LIN
; Check that scalar FP conversions to signed and unsigned int64 are using
; reasonable sequences, across platforms and target switches.
diff --git a/llvm/test/CodeGen/X86/scalar-int-to-fp.ll b/llvm/test/CodeGen/X86/scalar-int-to-fp.ll
index 43c1a84f7cd6c..cf52ae02aba2f 100644
--- a/llvm/test/CodeGen/X86/scalar-int-to-fp.ll
+++ b/llvm/test/CodeGen/X86/scalar-int-to-fp.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK32,AVX512_32,AVX512DQVL_32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK64,AVX512_64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=CHECK32,AVX512_32,AVX512DQ_32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=CHECK64,AVX512_64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK32,AVX512_32,AVX512F_32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK64,AVX512_64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK32,SSE_32,SSE2_32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK64,SSE2_64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse | FileCheck %s --check-prefixes=CHECK32,SSE_32,SSE1_32
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=-sse | FileCheck %s --check-prefixes=CHECK32,X87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK32,AVX512_32,AVX512DQVL_32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK64,AVX512_64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=CHECK32,AVX512_32,AVX512DQ_32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=CHECK64,AVX512_64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK32,AVX512_32,AVX512F_32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK64,AVX512_64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK32,SSE_32,SSE2_32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK64,SSE2_64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+sse | FileCheck %s --check-prefixes=CHECK32,SSE_32,SSE1_32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=-sse | FileCheck %s --check-prefixes=CHECK32,X87
; Verify that scalar integer conversions to FP compile successfully
; (at one time long double failed with avx512f), and that reasonable
diff --git a/llvm/test/CodeGen/X86/scalar-min-max-fill-operand.ll b/llvm/test/CodeGen/X86/scalar-min-max-fill-operand.ll
index 2f90932c0ed8f..e7629a61b7c2f 100644
--- a/llvm/test/CodeGen/X86/scalar-min-max-fill-operand.ll
+++ b/llvm/test/CodeGen/X86/scalar-min-max-fill-operand.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
; CHECK-NOT: {{(min|max|mov)}}
; CHECK: mov
; CHECK-NOT: {{(min|max|mov)}}
diff --git a/llvm/test/CodeGen/X86/scalar_sse_minmax.ll b/llvm/test/CodeGen/X86/scalar_sse_minmax.ll
index 6a619f7f2c886..59b964b36e4f1 100644
--- a/llvm/test/CodeGen/X86/scalar_sse_minmax.ll
+++ b/llvm/test/CodeGen/X86/scalar_sse_minmax.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse,+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse,+sse2 | FileCheck %s
define float @min1(float %x, float %y) {
; CHECK-LABEL: min1
diff --git a/llvm/test/CodeGen/X86/scalarize-bitcast.ll b/llvm/test/CodeGen/X86/scalarize-bitcast.ll
index 601496a0e72a0..d39d4856836d4 100644
--- a/llvm/test/CodeGen/X86/scalarize-bitcast.ll
+++ b/llvm/test/CodeGen/X86/scalarize-bitcast.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR3886
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
diff --git a/llvm/test/CodeGen/X86/scalarize-strict-fsetcc.ll b/llvm/test/CodeGen/X86/scalarize-strict-fsetcc.ll
index b4c77a573e859..b1d1520f92222 100644
--- a/llvm/test/CodeGen/X86/scalarize-strict-fsetcc.ll
+++ b/llvm/test/CodeGen/X86/scalarize-strict-fsetcc.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s
define <1 x i1> @test_oeq_q_v1f64(<1 x double> %a, <1 x double> %b) {
; CHECK-LABEL: test_oeq_q_v1f64:
diff --git a/llvm/test/CodeGen/X86/scatter-schedule.ll b/llvm/test/CodeGen/X86/scatter-schedule.ll
index 36bf31395d6d5..f2886399d4fda 100644
--- a/llvm/test/CodeGen/X86/scatter-schedule.ll
+++ b/llvm/test/CodeGen/X86/scatter-schedule.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mcpu=skx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=skx < %s | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/scev-interchange.ll b/llvm/test/CodeGen/X86/scev-interchange.ll
index 10bb1e0c80aee..04f9f6f2a90ba 100644
--- a/llvm/test/CodeGen/X86/scev-interchange.ll
+++ b/llvm/test/CodeGen/X86/scev-interchange.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
%"struct.DataOutBase::GmvFlags" = type { i32 }
diff --git a/llvm/test/CodeGen/X86/sdiv-exact.ll b/llvm/test/CodeGen/X86/sdiv-exact.ll
index 2684f464be3a4..a1157f4b9c4e0 100644
--- a/llvm/test/CodeGen/X86/sdiv-exact.ll
+++ b/llvm/test/CodeGen/X86/sdiv-exact.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64
define i32 @test1(i32 %x) {
; X86-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/sdiv-pow2.ll b/llvm/test/CodeGen/X86/sdiv-pow2.ll
index 66ea291c52d1a..2a7eaf61b3302 100644
--- a/llvm/test/CodeGen/X86/sdiv-pow2.ll
+++ b/llvm/test/CodeGen/X86/sdiv-pow2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- < %s | FileCheck %s
; No attributes, should not use idiv
define i32 @test1(i32 inreg %x) {
diff --git a/llvm/test/CodeGen/X86/section-stats.ll b/llvm/test/CodeGen/X86/section-stats.ll
index 2cab7d18dec06..59dedb5ad4fd3 100644
--- a/llvm/test/CodeGen/X86/section-stats.ll
+++ b/llvm/test/CodeGen/X86/section-stats.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc -o /dev/null -filetype=obj -stats %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o /dev/null -filetype=obj -stats %s 2>&1 | FileCheck %s
; CHECK-DAG: 1 elf-object-writer - Total size of SHF_ALLOC text sections
; CHECK-DAG: 1 elf-object-writer - Total size of SHF_ALLOC read-write sections
diff --git a/llvm/test/CodeGen/X86/section_mergeable_size.ll b/llvm/test/CodeGen/X86/section_mergeable_size.ll
index 73b70c47f036c..566440054cf84 100644
--- a/llvm/test/CodeGen/X86/section_mergeable_size.ll
+++ b/llvm/test/CodeGen/X86/section_mergeable_size.ll
@@ -1,3 +1,3 @@
-; RUN: llc -mtriple x86_64-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-linux-gnu < %s | FileCheck %s
@a = internal unnamed_addr constant [1 x [1 x i32]] zeroinitializer, section ".init.rodata", align 4
; CHECK: .init.rodata,"aM",{{[@%]}}progbits,4
diff --git a/llvm/test/CodeGen/X86/segmented-stacks-dynamic.ll b/llvm/test/CodeGen/X86/segmented-stacks-dynamic.ll
index e8359cb088dc3..793fee4ce06c9 100644
--- a/llvm/test/CodeGen/X86/segmented-stacks-dynamic.ll
+++ b/llvm/test/CodeGen/X86/segmented-stacks-dynamic.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=generic -mtriple=i686-linux -verify-machineinstrs | FileCheck %s -check-prefix=X86
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux -verify-machineinstrs | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnux32 -verify-machineinstrs | FileCheck %s -check-prefix=X32ABI
-; RUN: llc < %s -mcpu=generic -mtriple=i686-linux -filetype=obj
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux -filetype=obj
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnux32 -filetype=obj
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-linux -verify-machineinstrs | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux -verify-machineinstrs | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux-gnux32 -verify-machineinstrs | FileCheck %s -check-prefix=X32ABI
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-linux -filetype=obj
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux -filetype=obj
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux-gnux32 -filetype=obj
; Just to prevent the alloca from being optimized away
declare void @dummy_use(ptr, i32)
diff --git a/llvm/test/CodeGen/X86/segmented-stacks-standalone.ll b/llvm/test/CodeGen/X86/segmented-stacks-standalone.ll
index cbd01229eaa4a..25e6fe32ee0f8 100644
--- a/llvm/test/CodeGen/X86/segmented-stacks-standalone.ll
+++ b/llvm/test/CodeGen/X86/segmented-stacks-standalone.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=generic -mtriple=i686-linux -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-linux -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux -verify-machineinstrs | FileCheck %s
; This test is standalone because segmented-stacks.ll generates
; object-files with both .note.GNU-split-stack (for the split-stack
diff --git a/llvm/test/CodeGen/X86/segmented-stacks.ll b/llvm/test/CodeGen/X86/segmented-stacks.ll
index f8627ff56a1f9..465fc775df097 100644
--- a/llvm/test/CodeGen/X86/segmented-stacks.ll
+++ b/llvm/test/CodeGen/X86/segmented-stacks.ll
@@ -1,31 +1,31 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=generic -mtriple=i686-linux -verify-machineinstrs | FileCheck %s -check-prefix=X86-Linux
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux -verify-machineinstrs | FileCheck %s -check-prefix=X64-Linux
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux -code-model=large -verify-machineinstrs | FileCheck %s -check-prefix=X64-Linux-Large
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnux32 -verify-machineinstrs | FileCheck %s -check-prefix=X32ABI
-; RUN: llc < %s -mcpu=generic -mtriple=i686-darwin -verify-machineinstrs | FileCheck %s -check-prefix=X86-Darwin
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-darwin -verify-machineinstrs | FileCheck %s -check-prefix=X64-Darwin
-; RUN: llc < %s -mcpu=generic -mtriple=i686-mingw32 -verify-machineinstrs | FileCheck %s -check-prefix=X86-MinGW
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-freebsd -verify-machineinstrs | FileCheck %s -check-prefix=X64-FreeBSD
-; RUN: llc < %s -mcpu=generic -mtriple=i686-dragonfly -verify-machineinstrs | FileCheck %s -check-prefix=X86-DFlyBSD
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-dragonfly -verify-machineinstrs | FileCheck %s -check-prefix=X64-DFlyBSD
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-mingw32 -verify-machineinstrs | FileCheck %s -check-prefix=X64-MinGW
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-linux -verify-machineinstrs | FileCheck %s -check-prefix=X86-Linux
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux -verify-machineinstrs | FileCheck %s -check-prefix=X64-Linux
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux -code-model=large -verify-machineinstrs | FileCheck %s -check-prefix=X64-Linux-Large
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux-gnux32 -verify-machineinstrs | FileCheck %s -check-prefix=X32ABI
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-darwin -verify-machineinstrs | FileCheck %s -check-prefix=X86-Darwin
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-darwin -verify-machineinstrs | FileCheck %s -check-prefix=X64-Darwin
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-mingw32 -verify-machineinstrs | FileCheck %s -check-prefix=X86-MinGW
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-freebsd -verify-machineinstrs | FileCheck %s -check-prefix=X64-FreeBSD
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-dragonfly -verify-machineinstrs | FileCheck %s -check-prefix=X86-DFlyBSD
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-dragonfly -verify-machineinstrs | FileCheck %s -check-prefix=X64-DFlyBSD
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-mingw32 -verify-machineinstrs | FileCheck %s -check-prefix=X64-MinGW
; We used to crash with filetype=obj
-; RUN: llc < %s -mcpu=generic -mtriple=i686-linux -filetype=obj -o /dev/null
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux -filetype=obj -o /dev/null
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnux32 -filetype=obj -o /dev/null
-; RUN: llc < %s -mcpu=generic -mtriple=i686-darwin -filetype=obj -o /dev/null
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-darwin -filetype=obj -o /dev/null
-; RUN: llc < %s -mcpu=generic -mtriple=i686-mingw32 -filetype=obj -o /dev/null
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-freebsd -filetype=obj -o /dev/null
-; RUN: llc < %s -mcpu=generic -mtriple=i686-dragonfly -filetype=obj -o /dev/null
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-dragonfly -filetype=obj -o /dev/null
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-mingw32 -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-linux -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux-gnux32 -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-darwin -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-darwin -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-mingw32 -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-freebsd -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-dragonfly -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-dragonfly -filetype=obj -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-mingw32 -filetype=obj -o /dev/null
-; RUN: not --crash llc < %s -mcpu=generic -mtriple=x86_64-solaris 2> %t.log
+; RUN: not --crash llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-solaris 2> %t.log
; RUN: FileCheck %s -input-file=%t.log -check-prefix=X64-Solaris
-; RUN: not --crash llc < %s -mcpu=generic -mtriple=i686-freebsd 2> %t.log
+; RUN: not --crash llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-freebsd 2> %t.log
; RUN: FileCheck %s -input-file=%t.log -check-prefix=X86-FreeBSD
; X64-Solaris: Segmented stacks not supported on this platform
diff --git a/llvm/test/CodeGen/X86/seh-catch-all-win32.ll b/llvm/test/CodeGen/X86/seh-catch-all-win32.ll
index bd51ca76c59d1..c78a6b3393907 100644
--- a/llvm/test/CodeGen/X86/seh-catch-all-win32.ll
+++ b/llvm/test/CodeGen/X86/seh-catch-all-win32.ll
@@ -1,4 +1,4 @@
-; RUN: llc -stack-symbol-ordering=0 -mtriple=i686-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -stack-symbol-ordering=0 -mtriple=i686-windows-msvc < %s | FileCheck %s
; 32-bit catch-all has to use a filter function because that's how it saves the
; exception code.
diff --git a/llvm/test/CodeGen/X86/seh-catch-all.ll b/llvm/test/CodeGen/X86/seh-catch-all.ll
index 4e25aabfeef58..9886587727b96 100644
--- a/llvm/test/CodeGen/X86/seh-catch-all.ll
+++ b/llvm/test/CodeGen/X86/seh-catch-all.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc < %s | FileCheck %s
@str = linkonce_odr unnamed_addr constant [27 x i8] c"GetExceptionCode(): 0x%lx\0A\00", align 1
diff --git a/llvm/test/CodeGen/X86/seh-catchpad.ll b/llvm/test/CodeGen/X86/seh-catchpad.ll
index 85e465b822e1f..0f5b6402be28b 100644
--- a/llvm/test/CodeGen/X86/seh-catchpad.ll
+++ b/llvm/test/CodeGen/X86/seh-catchpad.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Based on the source:
; extern "C" int puts(const char *);
diff --git a/llvm/test/CodeGen/X86/seh-except-finally.ll b/llvm/test/CodeGen/X86/seh-except-finally.ll
index fedb0c46d1ba1..5447c08604a7c 100644
--- a/llvm/test/CodeGen/X86/seh-except-finally.ll
+++ b/llvm/test/CodeGen/X86/seh-except-finally.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Test case based on this source:
; int puts(const char*);
diff --git a/llvm/test/CodeGen/X86/seh-except-restore.ll b/llvm/test/CodeGen/X86/seh-except-restore.ll
index f428a83cc2aef..5887d789a676d 100644
--- a/llvm/test/CodeGen/X86/seh-except-restore.ll
+++ b/llvm/test/CodeGen/X86/seh-except-restore.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; In PR44697, the register allocator inserted loads into the __except block
; before the instructions that restore EBP and ESP back to what they should be.
diff --git a/llvm/test/CodeGen/X86/seh-exception-code.ll b/llvm/test/CodeGen/X86/seh-exception-code.ll
index 5b25bae80cde0..fec5ffd33bf65 100644
--- a/llvm/test/CodeGen/X86/seh-exception-code.ll
+++ b/llvm/test/CodeGen/X86/seh-exception-code.ll
@@ -1,5 +1,5 @@
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
-; RUN: llc -verify-machineinstrs -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -O0 < %s | FileCheck %s
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/seh-filter-no-personality.ll b/llvm/test/CodeGen/X86/seh-filter-no-personality.ll
index 6eff30c51bf72..52743b17113ec 100644
--- a/llvm/test/CodeGen/X86/seh-filter-no-personality.ll
+++ b/llvm/test/CodeGen/X86/seh-filter-no-personality.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-windows-msvc < %s | FileCheck %s
; Mostly make sure that llvm.eh.recoverfp doesn't crash if the parent
; function lacks a personality.
diff --git a/llvm/test/CodeGen/X86/seh-finally.ll b/llvm/test/CodeGen/X86/seh-finally.ll
index 6093e5e437910..74d69deb89c96 100644
--- a/llvm/test/CodeGen/X86/seh-finally.ll
+++ b/llvm/test/CodeGen/X86/seh-finally.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X64
; RUN: sed -e 's/__C_specific_handler/_except_handler3/' %s | \
-; RUN: llc -mtriple=i686-windows-msvc | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=i686-windows-msvc | FileCheck %s --check-prefix=X86
@str_recovered = internal unnamed_addr constant [10 x i8] c"recovered\00", align 1
diff --git a/llvm/test/CodeGen/X86/seh-localaddress.ll b/llvm/test/CodeGen/X86/seh-localaddress.ll
index 7be40d5b6d773..ccd70747a364d 100644
--- a/llvm/test/CodeGen/X86/seh-localaddress.ll
+++ b/llvm/test/CodeGen/X86/seh-localaddress.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-pc-windows-msvc -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-windows-msvc -o - %s | FileCheck %s
; struct S { int x; };
; void foo() {
diff --git a/llvm/test/CodeGen/X86/seh-no-invokes.ll b/llvm/test/CodeGen/X86/seh-no-invokes.ll
index 112031ca5797e..26a959ed20b07 100644
--- a/llvm/test/CodeGen/X86/seh-no-invokes.ll
+++ b/llvm/test/CodeGen/X86/seh-no-invokes.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Generated with this C source:
; static __forceinline void __cpuid() { __asm__(""); }
diff --git a/llvm/test/CodeGen/X86/seh-safe-div-win32.ll b/llvm/test/CodeGen/X86/seh-safe-div-win32.ll
index 7ae100480065e..8d0e1b7c81e01 100644
--- a/llvm/test/CodeGen/X86/seh-safe-div-win32.ll
+++ b/llvm/test/CodeGen/X86/seh-safe-div-win32.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple i686-pc-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple i686-pc-windows-msvc < %s | FileCheck %s
; This test case is also intended to be run manually as a complete functional
; test. It should link, print something, and exit zero rather than crashing.
diff --git a/llvm/test/CodeGen/X86/seh-safe-div.ll b/llvm/test/CodeGen/X86/seh-safe-div.ll
index 20169f868a0bf..482780636db9b 100644
--- a/llvm/test/CodeGen/X86/seh-safe-div.ll
+++ b/llvm/test/CodeGen/X86/seh-safe-div.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-pc-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-windows-msvc < %s | FileCheck %s
; This test case is also intended to be run manually as a complete functional
; test. It should link, print something, and exit zero rather than crashing.
diff --git a/llvm/test/CodeGen/X86/seh-stack-realign.ll b/llvm/test/CodeGen/X86/seh-stack-realign.ll
index ae687343cc504..c60f923c54c68 100644
--- a/llvm/test/CodeGen/X86/seh-stack-realign.ll
+++ b/llvm/test/CodeGen/X86/seh-stack-realign.ll
@@ -1,4 +1,4 @@
-; RUN: llc -stack-symbol-ordering=0 -mtriple=i686-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -stack-symbol-ordering=0 -mtriple=i686-windows-msvc < %s | FileCheck %s
; 32-bit catch-all has to use a filter function because that's how it saves the
; exception code.
diff --git a/llvm/test/CodeGen/X86/seh-unwind-inline-asm-codegen.ll b/llvm/test/CodeGen/X86/seh-unwind-inline-asm-codegen.ll
index e2959718b6068..1e3ac911a797f 100644
--- a/llvm/test/CodeGen/X86/seh-unwind-inline-asm-codegen.ll
+++ b/llvm/test/CodeGen/X86/seh-unwind-inline-asm-codegen.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc19.28.29914"
diff --git a/llvm/test/CodeGen/X86/select-1-or-neg1.ll b/llvm/test/CodeGen/X86/select-1-or-neg1.ll
index 9a4cb55e52bd9..033afc16df733 100644
--- a/llvm/test/CodeGen/X86/select-1-or-neg1.ll
+++ b/llvm/test/CodeGen/X86/select-1-or-neg1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=BASE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=slow-3ops-lea | FileCheck %s --check-prefix=SLOWLEA3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=BASE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=slow-3ops-lea | FileCheck %s --check-prefix=SLOWLEA3
; TODO: Should the 'cmpl' be 'dec' instead?
; TODO: What if 'cmov' is 1 uop and full throughput (Ryzen)?
diff --git a/llvm/test/CodeGen/X86/select-constant-lea.ll b/llvm/test/CodeGen/X86/select-constant-lea.ll
index ab55082d209e3..783315cc73d9a 100644
--- a/llvm/test/CodeGen/X86/select-constant-lea.ll
+++ b/llvm/test/CodeGen/X86/select-constant-lea.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=BASE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=slow-3ops-lea | FileCheck %s --check-prefix=SLOWLEA3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=BASE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=slow-3ops-lea | FileCheck %s --check-prefix=SLOWLEA3
define i32 @select_unsigned_lt_10_8_13(i32 %0) {
; BASE-LABEL: select_unsigned_lt_10_8_13:
diff --git a/llvm/test/CodeGen/X86/select-constant-xor.ll b/llvm/test/CodeGen/X86/select-constant-xor.ll
index efc367d204cf1..478c87f78836c 100644
--- a/llvm/test/CodeGen/X86/select-constant-xor.ll
+++ b/llvm/test/CodeGen/X86/select-constant-xor.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-slow-incdec | FileCheck %s --check-prefixes=X64,X64-FASTINC
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+slow-incdec | FileCheck %s --check-prefixes=X64,X64-SLOWINC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-slow-incdec | FileCheck %s --check-prefixes=X64,X64-FASTINC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+slow-incdec | FileCheck %s --check-prefixes=X64,X64-SLOWINC
define i32 @xori64i32(i64 %a) {
; X86-LABEL: xori64i32:
diff --git a/llvm/test/CodeGen/X86/select-ext.ll b/llvm/test/CodeGen/X86/select-ext.ll
index a259693fcec29..a581104405abd 100644
--- a/llvm/test/CodeGen/X86/select-ext.ll
+++ b/llvm/test/CodeGen/X86/select-ext.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s
; (zext(select c, load1, load2)) -> (select c, zextload1, zextload2)
define i64 @zext_scalar(ptr %p, i1 zeroext %c) {
diff --git a/llvm/test/CodeGen/X86/select-lea.ll b/llvm/test/CodeGen/X86/select-lea.ll
index c3435dad67974..d71ec4397041b 100644
--- a/llvm/test/CodeGen/X86/select-lea.ll
+++ b/llvm/test/CodeGen/X86/select-lea.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefixes=CMOV
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=NOCMOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefixes=CMOV
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=NOCMOV
; PR46809
diff --git a/llvm/test/CodeGen/X86/select-mmx.ll b/llvm/test/CodeGen/X86/select-mmx.ll
index 8a4308a5af64b..50bb29d283ff1 100644
--- a/llvm/test/CodeGen/X86/select-mmx.ll
+++ b/llvm/test/CodeGen/X86/select-mmx.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+mmx < %s | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i686-unknown-unknown -mattr=+mmx < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+mmx < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown -mattr=+mmx < %s | FileCheck %s --check-prefix=X86
; From source: clang -02
diff --git a/llvm/test/CodeGen/X86/select-narrow-int-to-fp.ll b/llvm/test/CodeGen/X86/select-narrow-int-to-fp.ll
index b64bfb38c7a5a..9db0de195a811 100644
--- a/llvm/test/CodeGen/X86/select-narrow-int-to-fp.ll
+++ b/llvm/test/CodeGen/X86/select-narrow-int-to-fp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc -o - %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK-NO_FP16
-; RUN: llc -o - %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 -mattr=+avx512fp16 | FileCheck %s --check-prefixes=CHECK-WITH_FP16
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK-NO_FP16
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 -mattr=+avx512fp16 | FileCheck %s --check-prefixes=CHECK-WITH_FP16
; Note: We could check more configurations, but anything with software
; emulation of fp16 generates a ton of assembly code and is not particularly
diff --git a/llvm/test/CodeGen/X86/select-neg.ll b/llvm/test/CodeGen/X86/select-neg.ll
index 80804a3b1c60a..c5857959104bf 100644
--- a/llvm/test/CodeGen/X86/select-neg.ll
+++ b/llvm/test/CodeGen/X86/select-neg.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown | FileCheck %s
@value1 = external hidden constant i32
diff --git a/llvm/test/CodeGen/X86/select-of-fp-constants.ll b/llvm/test/CodeGen/X86/select-of-fp-constants.ll
index 2cdaa11a22530..d4893097d1ef8 100644
--- a/llvm/test/CodeGen/X86/select-of-fp-constants.ll
+++ b/llvm/test/CodeGen/X86/select-of-fp-constants.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-- -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE
-; RUN: llc < %s -mtriple=i386-- -mattr=sse4.1 | FileCheck %s --check-prefixes=X86,X86-SSE
-; RUN: llc < %s -mtriple=i386-- -mattr=avx2 | FileCheck %s --check-prefixes=X86,X86-AVX2
-; RUN: llc < %s -mtriple=i386-- -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86-AVX512F
-; RUN: llc < %s -mtriple=x86_64-- -mattr=sse2 | FileCheck %s --check-prefix=X64-SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=sse4.1 | FileCheck %s --check-prefix=X64-SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx2 | FileCheck %s --check-prefixes=X64-AVX,X64-AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512f | FileCheck %s --check-prefixes=X64-AVX,X64-AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-- -mattr=sse2 | FileCheck %s --check-prefixes=X86,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-- -mattr=sse4.1 | FileCheck %s --check-prefixes=X86,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-- -mattr=avx2 | FileCheck %s --check-prefixes=X86,X86-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-- -mattr=avx512f | FileCheck %s --check-prefixes=X86,X86-AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=sse2 | FileCheck %s --check-prefix=X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=sse4.1 | FileCheck %s --check-prefix=X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx2 | FileCheck %s --check-prefixes=X64-AVX,X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx512f | FileCheck %s --check-prefixes=X64-AVX,X64-AVX512F
; This should do a single load into the fp stack for the return, not diddle with xmm registers.
diff --git a/llvm/test/CodeGen/X86/select-of-half-constants.ll b/llvm/test/CodeGen/X86/select-of-half-constants.ll
index e3d92eb474968..f59caaa85749f 100644
--- a/llvm/test/CodeGen/X86/select-of-half-constants.ll
+++ b/llvm/test/CodeGen/X86/select-of-half-constants.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512fp16 | FileCheck %s --check-prefixes=X64-AVX512FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512fp16 | FileCheck %s --check-prefixes=X64-AVX512FP16
; This should do a single load into the fp stack for the return, not diddle with xmm registers.
diff --git a/llvm/test/CodeGen/X86/select-phi-s16-fp.ll b/llvm/test/CodeGen/X86/select-phi-s16-fp.ll
index 083f418b6752e..5aec26182fc35 100644
--- a/llvm/test/CodeGen/X86/select-phi-s16-fp.ll
+++ b/llvm/test/CodeGen/X86/select-phi-s16-fp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -global-isel=0 -mcpu=generic -mtriple=x86_64-apple-darwin %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -global-isel=0 -mcpu=generic -mtriple=x86_64-apple-darwin %s -o - | FileCheck %s
; For all these tests we disable optimizations through function attributes
; because the code we are exercising here needs phis and we want to keep the
diff --git a/llvm/test/CodeGen/X86/select-prof-codegen.ll b/llvm/test/CodeGen/X86/select-prof-codegen.ll
index 5ae09afd239ec..0bcc4d7cd11ee 100644
--- a/llvm/test/CodeGen/X86/select-prof-codegen.ll
+++ b/llvm/test/CodeGen/X86/select-prof-codegen.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; Compiling the select should not create 'seta - testb $1 - jump' sequence.
define i32 @f(i32 %x, i32 %y) {
diff --git a/llvm/test/CodeGen/X86/select-testb-volatile-load.ll b/llvm/test/CodeGen/X86/select-testb-volatile-load.ll
index 2490fbdaf614c..a76a553afd973 100644
--- a/llvm/test/CodeGen/X86/select-testb-volatile-load.ll
+++ b/llvm/test/CodeGen/X86/select-testb-volatile-load.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin < %s | FileCheck %s
; This test checks that we don't try to narrow the volatile load by selecting
; the pattern below into a testb instruction.
diff --git a/llvm/test/CodeGen/X86/select-to-and-zext.ll b/llvm/test/CodeGen/X86/select-to-and-zext.ll
index 7dadbd76a5bb1..0566dbfa956ee 100644
--- a/llvm/test/CodeGen/X86/select-to-and-zext.ll
+++ b/llvm/test/CodeGen/X86/select-to-and-zext.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu | FileCheck %s --check-prefix=X64
define i32 @from_cmpeq(i32 %xx, i32 %y) {
; X86-LABEL: from_cmpeq:
diff --git a/llvm/test/CodeGen/X86/select-with-and-or.ll b/llvm/test/CodeGen/X86/select-with-and-or.ll
index 95af0c45e24f4..98fceef79e6a9 100644
--- a/llvm/test/CodeGen/X86/select-with-and-or.ll
+++ b/llvm/test/CodeGen/X86/select-with-and-or.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
define <4 x i32> @test1(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/select.ll b/llvm/test/CodeGen/X86/select.ll
index fe90028aa6aff..525ae46be5b02 100644
--- a/llvm/test/CodeGen/X86/select.ll
+++ b/llvm/test/CodeGen/X86/select.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM
-; RUN: llc < %s -mtriple=i386-apple-darwin10 -mcpu=athlon | FileCheck %s --check-prefix=ATHLON
-; RUN: llc < %s -mtriple=i386-intel-elfiamcu | FileCheck %s --check-prefix=MCU
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 -mcpu=atom | FileCheck %s --check-prefix=CHECK --check-prefix=ATOM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10 -mcpu=athlon | FileCheck %s --check-prefix=ATHLON
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-intel-elfiamcu | FileCheck %s --check-prefix=MCU
; PR5757
%0 = type { i64, i32 }
diff --git a/llvm/test/CodeGen/X86/select_const_i128.ll b/llvm/test/CodeGen/X86/select_const_i128.ll
index f0f0c584a7fc8..6753f8fe4a7a2 100644
--- a/llvm/test/CodeGen/X86/select_const_i128.ll
+++ b/llvm/test/CodeGen/X86/select_const_i128.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 -mattr=+ndd | FileCheck --check-prefix=NDD %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v2 -mattr=+ndd | FileCheck --check-prefix=NDD %s
define i128 @select_eq_i128(ptr %a) {
; CHECK-LABEL: select_eq_i128:
diff --git a/llvm/test/CodeGen/X86/selectcc-to-shiftand.ll b/llvm/test/CodeGen/X86/selectcc-to-shiftand.ll
index 03f4c0f61cdd1..f28c7a6ad936d 100644
--- a/llvm/test/CodeGen/X86/selectcc-to-shiftand.ll
+++ b/llvm/test/CodeGen/X86/selectcc-to-shiftand.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=-bmi < %s | FileCheck %s --check-prefixes=ANY,CHECK-NOBMI
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefixes=ANY,CHECK-BMI
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=-bmi < %s | FileCheck %s --check-prefixes=ANY,CHECK-NOBMI
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefixes=ANY,CHECK-BMI
; Compare if negative and select of constants where one constant is zero.
diff --git a/llvm/test/CodeGen/X86/selection-dag-salvagetrunc.ll b/llvm/test/CodeGen/X86/selection-dag-salvagetrunc.ll
index 95d63577d0242..6a3b5b403e052 100644
--- a/llvm/test/CodeGen/X86/selection-dag-salvagetrunc.ll
+++ b/llvm/test/CodeGen/X86/selection-dag-salvagetrunc.ll
@@ -1,4 +1,4 @@
-; RUN: llc --stop-after=finalize-isel < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting --stop-after=finalize-isel < %s | FileCheck %s
;
; Verify that we can correctly salvage truncate expressions during SelectionDAG.
; Fixes LLVM issue #63076.
diff --git a/llvm/test/CodeGen/X86/selectiondag-crash.ll b/llvm/test/CodeGen/X86/selectiondag-crash.ll
index 99789021a737b..5cb73ebbb52c2 100644
--- a/llvm/test/CodeGen/X86/selectiondag-crash.ll
+++ b/llvm/test/CodeGen/X86/selectiondag-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=corei7 < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=corei7 < %s
; Check that llc doesn't crash in the attempt to fold a shuffle with
; a splat mask into a constant build_vector.
diff --git a/llvm/test/CodeGen/X86/selectiondag-cse.ll b/llvm/test/CodeGen/X86/selectiondag-cse.ll
index dd1ffd226a37a..09101c691ea67 100644
--- a/llvm/test/CodeGen/X86/selectiondag-cse.ll
+++ b/llvm/test/CodeGen/X86/selectiondag-cse.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR12599
;
; This bitcode causes the X86 target to make changes to the DAG during
diff --git a/llvm/test/CodeGen/X86/selectiondag-dbgvalue-null-crash.ll b/llvm/test/CodeGen/X86/selectiondag-dbgvalue-null-crash.ll
index 69b4b7adbc07c..2bcf546273a05 100644
--- a/llvm/test/CodeGen/X86/selectiondag-dbgvalue-null-crash.ll
+++ b/llvm/test/CodeGen/X86/selectiondag-dbgvalue-null-crash.ll
@@ -1,5 +1,5 @@
; Test that the code generation works correctly on Linux
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; Regression test for SelectionDAG::resolveDanglingDebugInfo crash when
; handling aggregate types with nested empty structs.
diff --git a/llvm/test/CodeGen/X86/selectiondag-debug-loc.ll b/llvm/test/CodeGen/X86/selectiondag-debug-loc.ll
index 620b8857148b6..147e6c6abfd81 100644
--- a/llvm/test/CodeGen/X86/selectiondag-debug-loc.ll
+++ b/llvm/test/CodeGen/X86/selectiondag-debug-loc.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -O1 -mtriple=x86_64-unknown-unknown -o /dev/null -debug-only=selectiondag 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O1 -mtriple=x86_64-unknown-unknown -o /dev/null -debug-only=selectiondag 2>&1 | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.13.0"
diff --git a/llvm/test/CodeGen/X86/selectiondag-order.ll b/llvm/test/CodeGen/X86/selectiondag-order.ll
index 163e2cb90b2fe..2956ace785b89 100644
--- a/llvm/test/CodeGen/X86/selectiondag-order.ll
+++ b/llvm/test/CodeGen/X86/selectiondag-order.ll
@@ -1,6 +1,6 @@
; Check that debug intrinsics do not affect code generation.
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck --check-prefix=X86-CHECK %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck --check-prefix=X86-CHECK %s
define i64 @simulate(<2 x i32> %a) {
entry:
diff --git a/llvm/test/CodeGen/X86/selectiondag-patchpoint-legalize.ll b/llvm/test/CodeGen/X86/selectiondag-patchpoint-legalize.ll
index 0bc13ad8c9723..1eea72c678e2f 100644
--- a/llvm/test/CodeGen/X86/selectiondag-patchpoint-legalize.ll
+++ b/llvm/test/CodeGen/X86/selectiondag-patchpoint-legalize.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -enable-patchpoint-liveness=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -enable-patchpoint-liveness=false | FileCheck %s
; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
diff --git a/llvm/test/CodeGen/X86/selectiondag-stackmap-legalize.ll b/llvm/test/CodeGen/X86/selectiondag-stackmap-legalize.ll
index 8bb47a3146b54..8e9501e93a6ae 100644
--- a/llvm/test/CodeGen/X86/selectiondag-stackmap-legalize.ll
+++ b/llvm/test/CodeGen/X86/selectiondag-stackmap-legalize.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -enable-patchpoint-liveness=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -enable-patchpoint-liveness=false | FileCheck %s
; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
diff --git a/llvm/test/CodeGen/X86/semantic-interposition-asm.ll b/llvm/test/CodeGen/X86/semantic-interposition-asm.ll
index b52afc6ac7551..501085b535ef1 100644
--- a/llvm/test/CodeGen/X86/semantic-interposition-asm.ll
+++ b/llvm/test/CodeGen/X86/semantic-interposition-asm.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64 -relocation-model=static < %s | \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -relocation-model=static < %s | \
; RUN: FileCheck --check-prefixes=COMMON,STATIC %s
-; RUN: llc -mtriple=x86_64 -relocation-model=pic < %s | \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -relocation-model=pic < %s | \
; RUN: FileCheck --check-prefixes=COMMON,CHECK %s
;; Test that we use the local alias for dso_local functions in inline assembly.
diff --git a/llvm/test/CodeGen/X86/serialize-intrinsic.ll b/llvm/test/CodeGen/X86/serialize-intrinsic.ll
index 629bb6dabd289..697194063af11 100644
--- a/llvm/test/CodeGen/X86/serialize-intrinsic.ll
+++ b/llvm/test/CodeGen/X86/serialize-intrinsic.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+serialize | FileCheck %s --check-prefix=X86_64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+serialize | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -mattr=+serialize | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+serialize | FileCheck %s --check-prefix=X86_64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+serialize | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 -mattr=+serialize | FileCheck %s --check-prefix=X32
define void @test_serialize() {
; X86_64-LABEL: test_serialize:
diff --git a/llvm/test/CodeGen/X86/setcc-lowering.ll b/llvm/test/CodeGen/X86/setcc-lowering.ll
index 5a72bf3e18bd8..5c7e06f31655b 100644
--- a/llvm/test/CodeGen/X86/setcc-lowering.ll
+++ b/llvm/test/CodeGen/X86/setcc-lowering.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+avx2 < %s | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc -mtriple=i386-unknown-linux-gnu -mcpu=knl < %s | FileCheck %s --check-prefixes=AVX,KNL-32
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+avx2 < %s | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-linux-gnu -mcpu=knl < %s | FileCheck %s --check-prefixes=AVX,KNL-32
; Verify that we don't crash during codegen due to a wrong lowering
diff --git a/llvm/test/CodeGen/X86/setcc-narrowing.ll b/llvm/test/CodeGen/X86/setcc-narrowing.ll
index e0b103196f11c..e2661dbf10809 100644
--- a/llvm/test/CodeGen/X86/setcc-narrowing.ll
+++ b/llvm/test/CodeGen/X86/setcc-narrowing.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin | FileCheck %s
; PR17338
@t1.global = internal global i64 -1, align 8
diff --git a/llvm/test/CodeGen/X86/setcc-non-simple-type.ll b/llvm/test/CodeGen/X86/setcc-non-simple-type.ll
index 2ac2be5545dfd..c9576fa47638f 100644
--- a/llvm/test/CodeGen/X86/setcc-non-simple-type.ll
+++ b/llvm/test/CodeGen/X86/setcc-non-simple-type.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=CHECK-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=CHECK-AVX2
%"class.failing::DataBuffer.2.12.22.41.65.87.96.105.114.123.132.141.186.204.213.222.330.429.438.447.718" = type {
ptr, %"class.failing::TrackedAllocation.1.11.21.40.64.86.95.104.113.122.131.140.185.203.212.221.329.428.437.446.717", i64
diff --git a/llvm/test/CodeGen/X86/setjmp-spills.ll b/llvm/test/CodeGen/X86/setjmp-spills.ll
index 4ed3368a7d9d3..2cc09f08d9649 100644
--- a/llvm/test/CodeGen/X86/setjmp-spills.ll
+++ b/llvm/test/CodeGen/X86/setjmp-spills.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-linux | FileCheck %s -check-prefix=X86-32
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux | FileCheck %s -check-prefix=X86-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64
declare i32 @get_val()
declare void @use_val(i32)
diff --git a/llvm/test/CodeGen/X86/setoeq.ll b/llvm/test/CodeGen/X86/setoeq.ll
index 8aebf8eaa62e7..e598647ac9bf0 100644
--- a/llvm/test/CodeGen/X86/setoeq.ll
+++ b/llvm/test/CodeGen/X86/setoeq.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=i686-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
define zeroext i8 @oeq_f64_i32(double %x) nounwind readnone {
; SSE-LABEL: oeq_f64_i32:
diff --git a/llvm/test/CodeGen/X86/setuge.ll b/llvm/test/CodeGen/X86/setuge.ll
index c04287b7808c2..8febc52d33951 100644
--- a/llvm/test/CodeGen/X86/setuge.ll
+++ b/llvm/test/CodeGen/X86/setuge.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; Test that we ignore -sahf in 32-bit mode rather than asserting.
-; RUN: llc < %s -mtriple=i686-- -mattr=-sahf | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-sahf | FileCheck %s
declare i1 @llvm.isunordered.f32(float, float)
diff --git a/llvm/test/CodeGen/X86/sext-i1.ll b/llvm/test/CodeGen/X86/sext-i1.ll
index 7a906aed1a42e..999b5270bd0a9 100644
--- a/llvm/test/CodeGen/X86/sext-i1.ll
+++ b/llvm/test/CodeGen/X86/sext-i1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -disable-cgp-branch-opts | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -disable-cgp-branch-opts | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -disable-cgp-branch-opts | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -disable-cgp-branch-opts | FileCheck %s --check-prefix=X64
; rdar://7573216
; PR6146
diff --git a/llvm/test/CodeGen/X86/sext-load.ll b/llvm/test/CodeGen/X86/sext-load.ll
index 3e51fc2fc6af3..a2b0fead37e13 100644
--- a/llvm/test/CodeGen/X86/sext-load.ll
+++ b/llvm/test/CodeGen/X86/sext-load.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; When doing sign extension, use the sext-load lowering to take advantage of
; x86's sign extension during loads.
diff --git a/llvm/test/CodeGen/X86/sext-ret-val.ll b/llvm/test/CodeGen/X86/sext-ret-val.ll
index 250d310ebb143..489eca6065131 100644
--- a/llvm/test/CodeGen/X86/sext-ret-val.ll
+++ b/llvm/test/CodeGen/X86/sext-ret-val.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s
; rdar://6699246
define signext i8 @t1(ptr %A) nounwind readnone ssp {
diff --git a/llvm/test/CodeGen/X86/sext-setcc-self.ll b/llvm/test/CodeGen/X86/sext-setcc-self.ll
index 452b600ffb5e5..2710ba3fffe56 100644
--- a/llvm/test/CodeGen/X86/sext-setcc-self.ll
+++ b/llvm/test/CodeGen/X86/sext-setcc-self.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
define <4 x i32> @test_ueq(<4 x float> %in) {
; CHECK-LABEL: test_ueq:
diff --git a/llvm/test/CodeGen/X86/sext-subreg.ll b/llvm/test/CodeGen/X86/sext-subreg.ll
index 20451ff208cc0..324345250c730 100644
--- a/llvm/test/CodeGen/X86/sext-subreg.ll
+++ b/llvm/test/CodeGen/X86/sext-subreg.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; rdar://7529457
define i64 @t(i64 %A, i64 %B, ptr %P, ptr%P2) nounwind {
diff --git a/llvm/test/CodeGen/X86/sext-trunc.ll b/llvm/test/CodeGen/X86/sext-trunc.ll
index c293dcd8efe9c..a9600dde2be35 100644
--- a/llvm/test/CodeGen/X86/sext-trunc.ll
+++ b/llvm/test/CodeGen/X86/sext-trunc.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s
define signext i8 @foo(i16 signext %x) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/sext-vsetcc.ll b/llvm/test/CodeGen/X86/sext-vsetcc.ll
index 0f473bfbe4e47..810763d76cf5a 100644
--- a/llvm/test/CodeGen/X86/sext-vsetcc.ll
+++ b/llvm/test/CodeGen/X86/sext-vsetcc.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
declare void @use_v8i1(<8 x i1>)
declare void @use_v8i8(<8 x i8>)
diff --git a/llvm/test/CodeGen/X86/sha.ll b/llvm/test/CodeGen/X86/sha.ll
index f0bca34511cde..c4870129ba25e 100644
--- a/llvm/test/CodeGen/X86/sha.ll
+++ b/llvm/test/CodeGen/X86/sha.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=+sha -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK --check-prefix=SSE
-; RUN: llc < %s -mattr=+sha,+avx2 -mtriple=x86_64-unknown-unknown --show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sha -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sha,+avx2 -mtriple=x86_64-unknown-unknown --show-mc-encoding | FileCheck %s --check-prefix=CHECK --check-prefix=AVX
declare <4 x i32> @llvm.x86.sha1rnds4(<4 x i32>, <4 x i32>, i8) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/sha512-intrinsics.ll b/llvm/test/CodeGen/X86/sha512-intrinsics.ll
index bd2e4559f09b5..b1b378ec86dc9 100644
--- a/llvm/test/CodeGen/X86/sha512-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/sha512-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+sha512 | FileCheck %s
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+sha512 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+sha512 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+sha512 | FileCheck %s
define <4 x i64> @test_int_x86_vsha512msg1(<4 x i64> %A, <2 x i64> %B) {
; CHECK-LABEL: test_int_x86_vsha512msg1:
diff --git a/llvm/test/CodeGen/X86/shadow-stack.ll b/llvm/test/CodeGen/X86/shadow-stack.ll
index bf0a00732b88a..5a4f793997c72 100644
--- a/llvm/test/CodeGen/X86/shadow-stack.ll
+++ b/llvm/test/CodeGen/X86/shadow-stack.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple x86_64-apple-macosx10.13.0 < %s | FileCheck %s --check-prefix=X86_64
-; RUN: llc -mtriple i386-apple-macosx10.13.0 < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-macosx10.13.0 < %s | FileCheck %s --check-prefix=X86_64
+; RUN: llc -combiner-topological-sorting -mtriple i386-apple-macosx10.13.0 < %s | FileCheck %s --check-prefix=X86
; The MacOS tripples are used to get trapping behavior on the "unreachable" IR
; instruction, so that the placement of the ud2 instruction could be verified.
diff --git a/llvm/test/CodeGen/X86/shift-and-x86_64.ll b/llvm/test/CodeGen/X86/shift-and-x86_64.ll
index 9dd7974d0ff4d..15ebc591ced29 100644
--- a/llvm/test/CodeGen/X86/shift-and-x86_64.ll
+++ b/llvm/test/CodeGen/X86/shift-and-x86_64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define { i64, i64 } @PR36721_u8(i64, i64, i8 zeroext) nounwind {
; CHECK-LABEL: PR36721_u8:
diff --git a/llvm/test/CodeGen/X86/shift-avx2-crash.ll b/llvm/test/CodeGen/X86/shift-avx2-crash.ll
index 290ec73320760..5d74447dcb57e 100644
--- a/llvm/test/CodeGen/X86/shift-avx2-crash.ll
+++ b/llvm/test/CodeGen/X86/shift-avx2-crash.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=core-avx2 > /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core-avx2 > /dev/null
; This test crashed on variable shift creation on AVX2
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
diff --git a/llvm/test/CodeGen/X86/shift-bmi2.ll b/llvm/test/CodeGen/X86/shift-bmi2.ll
index bb0213891c976..2597eb5280cdd 100644
--- a/llvm/test/CodeGen/X86/shift-bmi2.ll
+++ b/llvm/test/CodeGen/X86/shift-bmi2.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-unknown-unknown -mcpu=core-avx2 < %s | FileCheck --check-prefix=BMI2 %s
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 < %s | FileCheck --check-prefix=BMI264 %s
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 -mattr=+egpr --show-mc-encoding < %s | FileCheck --check-prefix=EGPR %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-unknown -mcpu=core-avx2 < %s | FileCheck --check-prefix=BMI2 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 < %s | FileCheck --check-prefix=BMI264 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 -mattr=+egpr --show-mc-encoding < %s | FileCheck --check-prefix=EGPR %s
define i32 @shl32(i32 %x, i32 %shamt) nounwind uwtable readnone {
; BMI2-LABEL: shl32:
diff --git a/llvm/test/CodeGen/X86/shift-coalesce.ll b/llvm/test/CodeGen/X86/shift-coalesce.ll
index e01f56d643df0..f999acd7f0a64 100644
--- a/llvm/test/CodeGen/X86/shift-coalesce.ll
+++ b/llvm/test/CodeGen/X86/shift-coalesce.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -x86-asm-syntax=intel | FileCheck %s
; PR687
diff --git a/llvm/test/CodeGen/X86/shift-codegen.ll b/llvm/test/CodeGen/X86/shift-codegen.ll
index e8a80cf81e936..55f89bd9b6e63 100644
--- a/llvm/test/CodeGen/X86/shift-codegen.ll
+++ b/llvm/test/CodeGen/X86/shift-codegen.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -relocation-model=static -mtriple=i686-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=static -mtriple=i686-unknown-unknown | FileCheck %s
; This should produce two shll instructions, not any lea's.
diff --git a/llvm/test/CodeGen/X86/shift-combine-crash.ll b/llvm/test/CodeGen/X86/shift-combine-crash.ll
index 5db2ac978042d..697716eb668f4 100644
--- a/llvm/test/CodeGen/X86/shift-combine-crash.ll
+++ b/llvm/test/CodeGen/X86/shift-combine-crash.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 > /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 > /dev/null
; Verify that DAGCombiner doesn't crash with an assertion failure in the
; attempt to cast a ISD::UNDEF node to a ConstantSDNode.
diff --git a/llvm/test/CodeGen/X86/shift-double-x86_64.ll b/llvm/test/CodeGen/X86/shift-double-x86_64.ll
index 7a086ba364742..8a0d71340bb02 100644
--- a/llvm/test/CodeGen/X86/shift-double-x86_64.ll
+++ b/llvm/test/CodeGen/X86/shift-double-x86_64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s
; SHLD/SHRD manual shifts
diff --git a/llvm/test/CodeGen/X86/shift-double.ll b/llvm/test/CodeGen/X86/shift-double.ll
index 5a2028216033c..b0ba55cfbea43 100644
--- a/llvm/test/CodeGen/X86/shift-double.ll
+++ b/llvm/test/CodeGen/X86/shift-double.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
; Shift i64 integers on 32-bit target
diff --git a/llvm/test/CodeGen/X86/shift-eflags.ll b/llvm/test/CodeGen/X86/shift-eflags.ll
index 6eddf50ce5c9d..5105dabc9124f 100644
--- a/llvm/test/CodeGen/X86/shift-eflags.ll
+++ b/llvm/test/CodeGen/X86/shift-eflags.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; PR33879 - use shift eflags result when it won't cause stalls
diff --git a/llvm/test/CodeGen/X86/shift-folding.ll b/llvm/test/CodeGen/X86/shift-folding.ll
index c4be7d990cbaa..7a77c3a1ddb1c 100644
--- a/llvm/test/CodeGen/X86/shift-folding.ll
+++ b/llvm/test/CodeGen/X86/shift-folding.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -verify-coalescing | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -verify-coalescing | FileCheck %s
define ptr @test1(ptr %P, i32 %X) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/shift-logic.ll b/llvm/test/CodeGen/X86/shift-logic.ll
index 6c96cc4e78f97..333d1f9edb6b9 100644
--- a/llvm/test/CodeGen/X86/shift-logic.ll
+++ b/llvm/test/CodeGen/X86/shift-logic.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define i8 @shl_and(i8 %x, i8 %y) nounwind {
; CHECK-LABEL: shl_and:
diff --git a/llvm/test/CodeGen/X86/shift-one.ll b/llvm/test/CodeGen/X86/shift-one.ll
index f3903555267b4..9bd4b6cc4fb50 100644
--- a/llvm/test/CodeGen/X86/shift-one.ll
+++ b/llvm/test/CodeGen/X86/shift-one.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
@x = external dso_local global i32 ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/shift-pair.ll b/llvm/test/CodeGen/X86/shift-pair.ll
index d809f9fcbfcc6..ff2e41f086a1d 100644
--- a/llvm/test/CodeGen/X86/shift-pair.ll
+++ b/llvm/test/CodeGen/X86/shift-pair.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define i64 @test(i64 %A) {
; CHECK-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/shift-pcmp.ll b/llvm/test/CodeGen/X86/shift-pcmp.ll
index 11e9a05484734..7a3557babb566 100644
--- a/llvm/test/CodeGen/X86/shift-pcmp.ll
+++ b/llvm/test/CodeGen/X86/shift-pcmp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -o - -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -o - -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -o - -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -o - -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
define <8 x i16> @foo(<8 x i16> %a, <8 x i16> %b) {
; SSE-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/shift_minsize.ll b/llvm/test/CodeGen/X86/shift_minsize.ll
index 5da4b9c29005f..c29a0b1832fdf 100644
--- a/llvm/test/CodeGen/X86/shift_minsize.ll
+++ b/llvm/test/CodeGen/X86/shift_minsize.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64--windows-msvc | FileCheck %s -check-prefix=CHECK-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--windows-msvc | FileCheck %s -check-prefix=CHECK-WIN
; The Windows runtime doesn't have these.
; CHECK-WIN-NOT: __ashlti3
diff --git a/llvm/test/CodeGen/X86/shl-anyext.ll b/llvm/test/CodeGen/X86/shl-anyext.ll
index decf950a77bca..d5fcc40e0339e 100644
--- a/llvm/test/CodeGen/X86/shl-anyext.ll
+++ b/llvm/test/CodeGen/X86/shl-anyext.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s | FileCheck %s
; Codegen should be able to use a 32-bit shift instead of a 64-bit shift.
; CHECK: shll $16
diff --git a/llvm/test/CodeGen/X86/shl-i64.ll b/llvm/test/CodeGen/X86/shl-i64.ll
index 7b56d1f625953..e8386aef68570 100644
--- a/llvm/test/CodeGen/X86/shl-i64.ll
+++ b/llvm/test/CodeGen/X86/shl-i64.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-- -mattr=+sse2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -mattr=+sse2 < %s | FileCheck %s
; Make sure that we don't generate an illegal i64 extract after LegalizeType.
; CHECK: shll
diff --git a/llvm/test/CodeGen/X86/shl_undef.ll b/llvm/test/CodeGen/X86/shl_undef.ll
index 0079479c30eaf..e3ddd542bb3f6 100644
--- a/llvm/test/CodeGen/X86/shl_undef.ll
+++ b/llvm/test/CodeGen/X86/shl_undef.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O1 -mtriple=i386-apple-darwin -x86-asm-syntax=intel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O1 -mtriple=i386-apple-darwin -x86-asm-syntax=intel | FileCheck %s
;
; Interesting test case where %tmp1220 = xor i32 %tmp862, %tmp592 and
; %tmp1676 = xor i32 %tmp1634, %tmp1530 have zero demanded bits after
diff --git a/llvm/test/CodeGen/X86/shrink-compare-pgso.ll b/llvm/test/CodeGen/X86/shrink-compare-pgso.ll
index 5a15ee36c0726..19717608c34eb 100644
--- a/llvm/test/CodeGen/X86/shrink-compare-pgso.ll
+++ b/llvm/test/CodeGen/X86/shrink-compare-pgso.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
declare dso_local void @bar()
diff --git a/llvm/test/CodeGen/X86/shrink-compare.ll b/llvm/test/CodeGen/X86/shrink-compare.ll
index 1a61451c26a03..47e4dcff4df34 100644
--- a/llvm/test/CodeGen/X86/shrink-compare.ll
+++ b/llvm/test/CodeGen/X86/shrink-compare.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
declare dso_local void @bar()
diff --git a/llvm/test/CodeGen/X86/shrink-const.ll b/llvm/test/CodeGen/X86/shrink-const.ll
index a071e543e0dde..2164fb04781a9 100644
--- a/llvm/test/CodeGen/X86/shrink-const.ll
+++ b/llvm/test/CodeGen/X86/shrink-const.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefix=AVX
; If targetShrinkDemandedConstant extends xor/or constants ensure it extends from the msb of the active bits
define <4 x i32> @sext_vector_constants(<4 x i32> %a0) {
diff --git a/llvm/test/CodeGen/X86/shrink-fp-const1.ll b/llvm/test/CodeGen/X86/shrink-fp-const1.ll
index 25fe46ba837b1..d618dbaac0e0f 100644
--- a/llvm/test/CodeGen/X86/shrink-fp-const1.ll
+++ b/llvm/test/CodeGen/X86/shrink-fp-const1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s
; PR1264
define double @foo(double %x) {
diff --git a/llvm/test/CodeGen/X86/shrink-fp-const2.ll b/llvm/test/CodeGen/X86/shrink-fp-const2.ll
index 8a2a3e3f185e6..2fa3d5980b73e 100644
--- a/llvm/test/CodeGen/X86/shrink-fp-const2.ll
+++ b/llvm/test/CodeGen/X86/shrink-fp-const2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; This should be a flds, not fldt.
define x86_fp80 @test2() nounwind {
; CHECK-LABEL: test2:
diff --git a/llvm/test/CodeGen/X86/shrink-wrap-chkstk-x86_64.ll b/llvm/test/CodeGen/X86/shrink-wrap-chkstk-x86_64.ll
index 0793c33d2e8eb..bd07bc38ba832 100644
--- a/llvm/test/CodeGen/X86/shrink-wrap-chkstk-x86_64.ll
+++ b/llvm/test/CodeGen/X86/shrink-wrap-chkstk-x86_64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-windows-gnu -exception-model=dwarf < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-gnu -exception-model=dwarf < %s | FileCheck %s
%struct.A = type { [4096 x i8] }
diff --git a/llvm/test/CodeGen/X86/shrink-wrap-chkstk.ll b/llvm/test/CodeGen/X86/shrink-wrap-chkstk.ll
index abcac2c6505fa..0d40ddcbeb973 100644
--- a/llvm/test/CodeGen/X86/shrink-wrap-chkstk.ll
+++ b/llvm/test/CodeGen/X86/shrink-wrap-chkstk.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -enable-shrink-wrap=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -enable-shrink-wrap=true | FileCheck %s
; TODO: add preallocated versions of tests
; we don't yet support conditionally called preallocated calls after the setup
diff --git a/llvm/test/CodeGen/X86/shrink-wrapping-vla.ll b/llvm/test/CodeGen/X86/shrink-wrapping-vla.ll
index d5b131984af56..2f665559dcdbe 100644
--- a/llvm/test/CodeGen/X86/shrink-wrapping-vla.ll
+++ b/llvm/test/CodeGen/X86/shrink-wrapping-vla.ll
@@ -13,7 +13,7 @@
; x[i] = a[i] + 1;
; }
;
-; RUN: llc -mtriple x86_64-linux %s -o - | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-linux %s -o - | FileCheck %s --check-prefix=CHECK
define dso_local void @f(i32 %n, ptr nocapture %x) {
entry:
diff --git a/llvm/test/CodeGen/X86/shrink_vmul_sse.ll b/llvm/test/CodeGen/X86/shrink_vmul_sse.ll
index 2812447e44417..1fde0df723b23 100644
--- a/llvm/test/CodeGen/X86/shrink_vmul_sse.ll
+++ b/llvm/test/CodeGen/X86/shrink_vmul_sse.ll
@@ -3,7 +3,7 @@
; PR30298: Check if the target doesn't have SSE2, compiler will not crash
; or generate incorrect code because of vector mul width shrinking optimization.
;
-; RUN: llc -mtriple=i386-pc-linux-gnu -mattr=+sse < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-linux-gnu -mattr=+sse < %s | FileCheck %s
@c = external dso_local global ptr, align 8
diff --git a/llvm/test/CodeGen/X86/shrinkwrap-callbr.ll b/llvm/test/CodeGen/X86/shrinkwrap-callbr.ll
index 66bd957b89c40..5a9904e7f2fce 100644
--- a/llvm/test/CodeGen/X86/shrinkwrap-callbr.ll
+++ b/llvm/test/CodeGen/X86/shrinkwrap-callbr.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -enable-shrink-wrap=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -enable-shrink-wrap=true | FileCheck %s
;; Ensure that shrink-wrapping understands that INLINEASM_BR may exit
;; the block before the end, and you cannot simply place stack
diff --git a/llvm/test/CodeGen/X86/shrinkwrap-hang.ll b/llvm/test/CodeGen/X86/shrinkwrap-hang.ll
index 7e98b8aa1da23..b9563cefecf77 100644
--- a/llvm/test/CodeGen/X86/shrinkwrap-hang.ll
+++ b/llvm/test/CodeGen/X86/shrinkwrap-hang.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - -enable-shrink-wrap=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - -enable-shrink-wrap=true | FileCheck %s
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i686-pc-linux"
diff --git a/llvm/test/CodeGen/X86/shuffle-as-shifts.ll b/llvm/test/CodeGen/X86/shuffle-as-shifts.ll
index 021f8d6fb971d..63fc54e6b078d 100644
--- a/llvm/test/CodeGen/X86/shuffle-as-shifts.ll
+++ b/llvm/test/CodeGen/X86/shuffle-as-shifts.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 | FileCheck %s --check-prefixes=CHECK,CHECK-SKX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-V4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver4 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver5 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver6 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 | FileCheck %s --check-prefixes=CHECK,CHECK-SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-V4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver4 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver5 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver6 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
define <4 x i32> @shuf_rot_v4i32_1032(<4 x i32> %x) {
diff --git a/llvm/test/CodeGen/X86/shuffle-blendw.ll b/llvm/test/CodeGen/X86/shuffle-blendw.ll
index 9f90657dc64d1..5c9e227bdde64 100644
--- a/llvm/test/CodeGen/X86/shuffle-blendw.ll
+++ b/llvm/test/CodeGen/X86/shuffle-blendw.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86-SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64-SSE41
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X86-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X86-AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64-AVX2
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefix=X86-AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86-SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64-SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X86-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefix=X86-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefix=X64-AVX512
define <16 x i16> @blendw_to_blendd_32(<16 x i16> %x, <16 x i16> %y, <16 x i16> %z) nounwind {
; X86-SSE41-LABEL: blendw_to_blendd_32:
diff --git a/llvm/test/CodeGen/X86/shuffle-combine-crash-2.ll b/llvm/test/CodeGen/X86/shuffle-combine-crash-2.ll
index c449ec5d3f10b..da2145464f7ac 100644
--- a/llvm/test/CodeGen/X86/shuffle-combine-crash-2.ll
+++ b/llvm/test/CodeGen/X86/shuffle-combine-crash-2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
define <4 x i64> @fold_movsd_zero() {
; X86-LABEL: fold_movsd_zero:
diff --git a/llvm/test/CodeGen/X86/shuffle-combine-crash-3.ll b/llvm/test/CodeGen/X86/shuffle-combine-crash-3.ll
index 854a36489dfab..965e77ceef55a 100644
--- a/llvm/test/CodeGen/X86/shuffle-combine-crash-3.ll
+++ b/llvm/test/CodeGen/X86/shuffle-combine-crash-3.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; Verify that we don't crash when compiling this. We used to hit an
; assert like this
diff --git a/llvm/test/CodeGen/X86/shuffle-combine-crash-4.ll b/llvm/test/CodeGen/X86/shuffle-combine-crash-4.ll
index 8ea99b313838a..b9fc1a6283e64 100644
--- a/llvm/test/CodeGen/X86/shuffle-combine-crash-4.ll
+++ b/llvm/test/CodeGen/X86/shuffle-combine-crash-4.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s
; Make sure that we do not infinitely-loop combining shuffle vectors.
diff --git a/llvm/test/CodeGen/X86/shuffle-combine-crash.ll b/llvm/test/CodeGen/X86/shuffle-combine-crash.ll
index 700221f0ca44b..4ddf044f1e78b 100644
--- a/llvm/test/CodeGen/X86/shuffle-combine-crash.ll
+++ b/llvm/test/CodeGen/X86/shuffle-combine-crash.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
; Verify that DAGCombiner does not crash when checking if it is
; safe to fold the shuffles in function @sample_test according to rule
diff --git a/llvm/test/CodeGen/X86/shuffle-extract-subvector.ll b/llvm/test/CodeGen/X86/shuffle-extract-subvector.ll
index b38f83a4023c1..d9ea08f5f95ff 100644
--- a/llvm/test/CodeGen/X86/shuffle-extract-subvector.ll
+++ b/llvm/test/CodeGen/X86/shuffle-extract-subvector.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define void @f(ptr %a, ptr %b, ptr %c) {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/shuffle-of-insert.ll b/llvm/test/CodeGen/X86/shuffle-of-insert.ll
index 0f737f5e03276..f674097981581 100644
--- a/llvm/test/CodeGen/X86/shuffle-of-insert.ll
+++ b/llvm/test/CodeGen/X86/shuffle-of-insert.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefix=SSE4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefix=SSE4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
define <4 x i32> @ins_elt_0(i32 %x, <4 x i32> %v1, <4 x i32> %v2) {
; SSE2-LABEL: ins_elt_0:
diff --git a/llvm/test/CodeGen/X86/shuffle-of-shift.ll b/llvm/test/CodeGen/X86/shuffle-of-shift.ll
index e2dc74d4e4df1..ab405a6fbd471 100644
--- a/llvm/test/CodeGen/X86/shuffle-of-shift.ll
+++ b/llvm/test/CodeGen/X86/shuffle-of-shift.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2,X64,X64-SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X64,X64-AVX2
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2,X86,X86-SSE2
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X86,X86-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2,X64,X64-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X64,X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2,X86,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2,X86,X86-AVX2
;------------------------------ 32-bit shuffles -------------------------------;
diff --git a/llvm/test/CodeGen/X86/shuffle-of-splat-multiuses.ll b/llvm/test/CodeGen/X86/shuffle-of-splat-multiuses.ll
index 1766b4d1fbb6e..cf023a24e467a 100644
--- a/llvm/test/CodeGen/X86/shuffle-of-splat-multiuses.ll
+++ b/llvm/test/CodeGen/X86/shuffle-of-splat-multiuses.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2,AVX2-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX2,AVX2-FAST-ALL
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX2,AVX2-FAST-PERLANE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2,AVX2-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX2,AVX2-FAST-ALL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX2,AVX2-FAST-PERLANE
; PR32449
define <2 x double> @foo2(<2 x double> %v, ptr%p) nounwind {
diff --git a/llvm/test/CodeGen/X86/shuffle-strided-with-offset-256.ll b/llvm/test/CodeGen/X86/shuffle-strided-with-offset-256.ll
index f632654f89e04..03c42deaa600f 100644
--- a/llvm/test/CodeGen/X86/shuffle-strided-with-offset-256.ll
+++ b/llvm/test/CodeGen/X86/shuffle-strided-with-offset-256.ll
@@ -1,15 +1,15 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL
define void @shuffle_v32i8_to_v16i8_1(ptr %L, ptr %S) nounwind {
; AVX-LABEL: shuffle_v32i8_to_v16i8_1:
diff --git a/llvm/test/CodeGen/X86/sibcall-2.ll b/llvm/test/CodeGen/X86/sibcall-2.ll
index ca42fbafde14f..e109511a723bb 100644
--- a/llvm/test/CodeGen/X86/sibcall-2.ll
+++ b/llvm/test/CodeGen/X86/sibcall-2.ll
@@ -1,5 +1,5 @@
-; RUN: llc -verify-machineinstrs < %s -mtriple=i386-apple-darwin -frame-pointer=all | FileCheck %s -check-prefix=X86
-; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-apple-darwin -frame-pointer=all | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=i386-apple-darwin -frame-pointer=all | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=x86_64-apple-darwin -frame-pointer=all | FileCheck %s -check-prefix=X64
; Tail call should not use ebp / rbp after it's popped. Use esp / rsp.
diff --git a/llvm/test/CodeGen/X86/sibcall-3.ll b/llvm/test/CodeGen/X86/sibcall-3.ll
index c2cddfa214ee0..d3a30567c7033 100644
--- a/llvm/test/CodeGen/X86/sibcall-3.ll
+++ b/llvm/test/CodeGen/X86/sibcall-3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown | FileCheck %s
; PR7193
define void @t1(ptr inreg %dst, ptr inreg %src, ptr inreg %len) nounwind {
diff --git a/llvm/test/CodeGen/X86/sibcall-4.ll b/llvm/test/CodeGen/X86/sibcall-4.ll
index bab305a3209b1..e87ce5554d6eb 100644
--- a/llvm/test/CodeGen/X86/sibcall-4.ll
+++ b/llvm/test/CodeGen/X86/sibcall-4.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-pc-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux-gnu | FileCheck %s
; pr7610
define ghccc void @t(ptr %Base_Arg, ptr %Sp_Arg, ptr %Hp_Arg, i32 %R1_Arg) nounwind {
diff --git a/llvm/test/CodeGen/X86/sibcall-5.ll b/llvm/test/CodeGen/X86/sibcall-5.ll
index abcd1ec556d58..07f4c17a8b907 100644
--- a/llvm/test/CodeGen/X86/sibcall-5.ll
+++ b/llvm/test/CodeGen/X86/sibcall-5.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9 -mattr=+sse2 | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-sse3 | FileCheck %s --check-prefix=X64_BAD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9 -mattr=+sse2 | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=-sse3 | FileCheck %s --check-prefix=X64_BAD
; Sibcall optimization of expanded libcalls.
; rdar://8707777
diff --git a/llvm/test/CodeGen/X86/sibcall-6.ll b/llvm/test/CodeGen/X86/sibcall-6.ll
index c9dff6b73d2a2..39225f482c650 100644
--- a/llvm/test/CodeGen/X86/sibcall-6.ll
+++ b/llvm/test/CodeGen/X86/sibcall-6.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic | FileCheck %s
; PR15250
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32-S128"
diff --git a/llvm/test/CodeGen/X86/sibcall-byval.ll b/llvm/test/CodeGen/X86/sibcall-byval.ll
index 0e06833ad70bb..0835fb7030e8a 100644
--- a/llvm/test/CodeGen/X86/sibcall-byval.ll
+++ b/llvm/test/CodeGen/X86/sibcall-byval.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-apple-darwin9 | FileCheck %s -check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin9 | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s -check-prefix=X64
%struct.p = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/sibcall-win64.ll b/llvm/test/CodeGen/X86/sibcall-win64.ll
index 5010fde0422e4..6192d213ef251 100644
--- a/llvm/test/CodeGen/X86/sibcall-win64.ll
+++ b/llvm/test/CodeGen/X86/sibcall-win64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s
declare dso_local win64cc void @win64_callee(i32)
declare dso_local win64cc ptr @win64_indirect()
diff --git a/llvm/test/CodeGen/X86/sibcall.ll b/llvm/test/CodeGen/X86/sibcall.ll
index d1137cac7d365..0acd455e55562 100644
--- a/llvm/test/CodeGen/X86/sibcall.ll
+++ b/llvm/test/CodeGen/X86/sibcall.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s -mtriple=i686-linux -mcpu=core2 -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-linux -mcpu=core2 -mattr=+sse2 | FileCheck %s --check-prefix=X64
-; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-linux-gnux32 -mcpu=core2 -mattr=+sse2 | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=i686-linux -mcpu=core2 -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=x86_64-linux -mcpu=core2 -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=x86_64-linux-gnux32 -mcpu=core2 -mattr=+sse2 | FileCheck %s --check-prefix=X32
define dso_local void @t1(i32 %x) nounwind ssp {
; X86-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/signbit-test.ll b/llvm/test/CodeGen/X86/signbit-test.ll
index 4e134d783ee49..2199617d4035d 100644
--- a/llvm/test/CodeGen/X86/signbit-test.ll
+++ b/llvm/test/CodeGen/X86/signbit-test.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define i64 @test_clear_mask_i64_i32(i64 %x) nounwind {
; CHECK-LABEL: test_clear_mask_i64_i32:
diff --git a/llvm/test/CodeGen/X86/signed-truncation-check.ll b/llvm/test/CodeGen/X86/signed-truncation-check.ll
index fc0fbb206cbb3..de0dc012eda34 100644
--- a/llvm/test/CodeGen/X86/signed-truncation-check.ll
+++ b/llvm/test/CodeGen/X86/signed-truncation-check.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,X64
; https://bugs.llvm.org/show_bug.cgi?id=38149
diff --git a/llvm/test/CodeGen/X86/simple-zext.ll b/llvm/test/CodeGen/X86/simple-zext.ll
index 8c19e16413271..43c2fdec70b27 100644
--- a/llvm/test/CodeGen/X86/simple-zext.ll
+++ b/llvm/test/CodeGen/X86/simple-zext.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin < %s| FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin < %s| FileCheck %s
; A bug in DAGCombiner prevented it forming a zextload in this simple case
; because it counted both the chain user and the real user against the
diff --git a/llvm/test/CodeGen/X86/sincos-opt.ll b/llvm/test/CodeGen/X86/sincos-opt.ll
index 51f3e52f88a6d..a730b7d4af3f6 100644
--- a/llvm/test/CodeGen/X86/sincos-opt.ll
+++ b/llvm/test/CodeGen/X86/sincos-opt.ll
@@ -1,12 +1,12 @@
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.9.0 -mcpu=core2 | FileCheck %s --check-prefix=OSX_SINCOS
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core2 | FileCheck %s --check-prefix=OSX_NOOPT
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -mcpu=core2 | FileCheck %s --check-prefix=GNU_SINCOS
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -mcpu=core2 | FileCheck %s --check-prefix=GNU_SINCOS_FASTMATH
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 -mcpu=core2 | FileCheck %s --check-prefix=GNU_SINCOS_FASTMATH
-; RUN: llc < %s -mtriple=x86_64-fuchsia -mcpu=core2 | FileCheck %s --check-prefix=GNU_SINCOS
-; RUN: llc < %s -mtriple=x86_64-fuchsia -mcpu=core2 | FileCheck %s --check-prefix=GNU_SINCOS_FASTMATH
-; RUN: llc < %s -mtriple=x86_64-scei-ps4 -mcpu=btver2 | FileCheck %s --check-prefix=PS4_SINCOS
-; RUN: llc < %s -mtriple=x86_64-sie-ps5 -mcpu=znver2 | FileCheck %s --check-prefix=PS4_SINCOS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.9.0 -mcpu=core2 | FileCheck %s --check-prefix=OSX_SINCOS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.8.0 -mcpu=core2 | FileCheck %s --check-prefix=OSX_NOOPT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu -mcpu=core2 | FileCheck %s --check-prefix=GNU_SINCOS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu -mcpu=core2 | FileCheck %s --check-prefix=GNU_SINCOS_FASTMATH
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnux32 -mcpu=core2 | FileCheck %s --check-prefix=GNU_SINCOS_FASTMATH
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-fuchsia -mcpu=core2 | FileCheck %s --check-prefix=GNU_SINCOS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-fuchsia -mcpu=core2 | FileCheck %s --check-prefix=GNU_SINCOS_FASTMATH
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-scei-ps4 -mcpu=btver2 | FileCheck %s --check-prefix=PS4_SINCOS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-sie-ps5 -mcpu=znver2 | FileCheck %s --check-prefix=PS4_SINCOS
; Combine sin / cos into a single call unless they may write errno (as
; captured by readnone attrbiute, controlled by clang -fmath-errno
diff --git a/llvm/test/CodeGen/X86/sincos-stack-args.ll b/llvm/test/CodeGen/X86/sincos-stack-args.ll
index 42c05a3e7a9be..3e9448c1b24dc 100644
--- a/llvm/test/CodeGen/X86/sincos-stack-args.ll
+++ b/llvm/test/CodeGen/X86/sincos-stack-args.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --version 5
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
; Test for issue https://github.com/llvm/llvm-project/issues/115323
declare double @g(double, double)
diff --git a/llvm/test/CodeGen/X86/sincos.ll b/llvm/test/CodeGen/X86/sincos.ll
index 9206c254949ba..6f4ec3e633806 100644
--- a/llvm/test/CodeGen/X86/sincos.ll
+++ b/llvm/test/CodeGen/X86/sincos.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; Make sure this testcase codegens to the sin and cos instructions, not calls
-; RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 | FileCheck %s
-; RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 | FileCheck %s
declare float @sinf(float) readonly
diff --git a/llvm/test/CodeGen/X86/sink-addsub-of-const.ll b/llvm/test/CodeGen/X86/sink-addsub-of-const.ll
index cc46f04b8dabe..7288daf85161d 100644
--- a/llvm/test/CodeGen/X86/sink-addsub-of-const.ll
+++ b/llvm/test/CodeGen/X86/sink-addsub-of-const.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+slow-lea,+slow-3ops-lea,+sse,+sse2 | FileCheck %s --check-prefixes=ALL,X32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+slow-lea,+slow-3ops-lea,+sse,+sse2 | FileCheck %s --check-prefixes=ALL,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+slow-lea,+slow-3ops-lea,+sse,+sse2 | FileCheck %s --check-prefixes=ALL,X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+slow-lea,+slow-3ops-lea,+sse,+sse2 | FileCheck %s --check-prefixes=ALL,X64
; Scalar tests. Trying to avoid LEA here, so the output is actually readable..
diff --git a/llvm/test/CodeGen/X86/sink-blockfreq.ll b/llvm/test/CodeGen/X86/sink-blockfreq.ll
index c2653a86f53af..c39869c05f14f 100644
--- a/llvm/test/CodeGen/X86/sink-blockfreq.ll
+++ b/llvm/test/CodeGen/X86/sink-blockfreq.ll
@@ -1,6 +1,6 @@
-; RUN: llc -disable-preheader-prot=true -disable-machine-licm -machine-sink-bfi=true -mtriple=x86_64-apple-darwin < %s | FileCheck %s -check-prefix=MSINK_BFI
-; RUN: llc -disable-preheader-prot=true -disable-machine-licm -machine-sink-bfi=false -mtriple=x86_64-apple-darwin < %s | FileCheck %s -check-prefix=MSINK_NOBFI
-; RUN: llc -disable-preheader-prot=true -disable-machine-licm -machine-sink-bfi=true -force-pgso -mtriple=x86_64-apple-darwin < %s | FileCheck %s -check-prefix=MSINK_NOBFI
+; RUN: llc -combiner-topological-sorting -disable-preheader-prot=true -disable-machine-licm -machine-sink-bfi=true -mtriple=x86_64-apple-darwin < %s | FileCheck %s -check-prefix=MSINK_BFI
+; RUN: llc -combiner-topological-sorting -disable-preheader-prot=true -disable-machine-licm -machine-sink-bfi=false -mtriple=x86_64-apple-darwin < %s | FileCheck %s -check-prefix=MSINK_NOBFI
+; RUN: llc -combiner-topological-sorting -disable-preheader-prot=true -disable-machine-licm -machine-sink-bfi=true -force-pgso -mtriple=x86_64-apple-darwin < %s | FileCheck %s -check-prefix=MSINK_NOBFI
; Test that by changing BlockFrequencyInfo we change the order in which
; machine-sink looks for successor blocks. By not using BFI, both G and B
diff --git a/llvm/test/CodeGen/X86/sink-hoist.ll b/llvm/test/CodeGen/X86/sink-hoist.ll
index a5777ac4a27e8..43dd810997c78 100644
--- a/llvm/test/CodeGen/X86/sink-hoist.ll
+++ b/llvm/test/CodeGen/X86/sink-hoist.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-machineinstrs -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -mcpu=nehalem -post-RA-scheduler=true -schedmodel=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -asm-verbose=false -mtriple=x86_64-unknown-linux-gnu -mcpu=nehalem -post-RA-scheduler=true -schedmodel=false | FileCheck %s
; Currently, floating-point selects are lowered to CFG triangles.
; This means that one side of the select is always unconditionally
diff --git a/llvm/test/CodeGen/X86/sink-local-value.ll b/llvm/test/CodeGen/X86/sink-local-value.ll
index 4732fb48a922d..4d5f87ed6ef6b 100644
--- a/llvm/test/CodeGen/X86/sink-local-value.ll
+++ b/llvm/test/CodeGen/X86/sink-local-value.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 < %s | FileCheck %s
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i386-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/sink-out-of-loop.ll b/llvm/test/CodeGen/X86/sink-out-of-loop.ll
index 4634d34a7536c..a94f1c6392813 100644
--- a/llvm/test/CodeGen/X86/sink-out-of-loop.ll
+++ b/llvm/test/CodeGen/X86/sink-out-of-loop.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-apple-darwin < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin < %s | FileCheck %s
; A MOV32ri is inside a loop, it has two successors, one successor is inside the
; same loop, the other successor is outside the loop. We should be able to sink
diff --git a/llvm/test/CodeGen/X86/sitofp.ll b/llvm/test/CodeGen/X86/sitofp.ll
index d61545e73d06e..f2d0815b974c8 100644
--- a/llvm/test/CodeGen/X86/sitofp.ll
+++ b/llvm/test/CodeGen/X86/sitofp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s
define double @foo(i16 %a) #0 {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/sjlj-baseptr.ll b/llvm/test/CodeGen/X86/sjlj-baseptr.ll
index e414b08d3e232..460190c658c11 100644
--- a/llvm/test/CodeGen/X86/sjlj-baseptr.ll
+++ b/llvm/test/CodeGen/X86/sjlj-baseptr.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-pc-linux -mcpu=corei7 -relocation-model=static | FileCheck --check-prefix=X86 %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7 -relocation-model=static | FileCheck --check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux -mcpu=corei7 -relocation-model=static | FileCheck --check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=corei7 -relocation-model=static | FileCheck --check-prefix=X64 %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
diff --git a/llvm/test/CodeGen/X86/sjlj-eh-musttail.ll b/llvm/test/CodeGen/X86/sjlj-eh-musttail.ll
index 5461e70342d0f..45058411cac21 100644
--- a/llvm/test/CodeGen/X86/sjlj-eh-musttail.ll
+++ b/llvm/test/CodeGen/X86/sjlj-eh-musttail.ll
@@ -1,5 +1,5 @@
; FIXME: Fix machine verifier issues and remove -verify-machineinstrs=0. PR39439.
-; RUN: llc -mtriple i386-windows-gnu -exception-model sjlj -filetype asm -o - %s -verify-machineinstrs=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple i386-windows-gnu -exception-model sjlj -filetype asm -o - %s -verify-machineinstrs=0 | FileCheck %s
declare void @_Z20function_that_throwsv()
declare i32 @__gxx_personality_sj0(...)
diff --git a/llvm/test/CodeGen/X86/sjlj-eh.ll b/llvm/test/CodeGen/X86/sjlj-eh.ll
index d2dcb35a4908e..3586c00277924 100644
--- a/llvm/test/CodeGen/X86/sjlj-eh.ll
+++ b/llvm/test/CodeGen/X86/sjlj-eh.ll
@@ -1,7 +1,7 @@
; FIXME: Fix machine verifier issues and remove -verify-machineinstrs=0. PR39439.
-; RUN: llc -mtriple i386-windows-gnu -exception-model sjlj -filetype asm -o - %s -verify-machineinstrs=0 | FileCheck %s
-; RUN: llc -mtriple x86_64-windows-gnu -exception-model sjlj -filetype asm -o - %s -verify-machineinstrs=0 | FileCheck %s -check-prefix CHECK-X64
-; RUN: llc -mtriple x86_64-linux -exception-model sjlj -filetype asm -o - %s -verify-machineinstrs=0 | FileCheck %s -check-prefix CHECK-X64-LINUX
+; RUN: llc -combiner-topological-sorting -mtriple i386-windows-gnu -exception-model sjlj -filetype asm -o - %s -verify-machineinstrs=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-windows-gnu -exception-model sjlj -filetype asm -o - %s -verify-machineinstrs=0 | FileCheck %s -check-prefix CHECK-X64
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-linux -exception-model sjlj -filetype asm -o - %s -verify-machineinstrs=0 | FileCheck %s -check-prefix CHECK-X64-LINUX
declare void @_Z20function_that_throwsv()
declare i32 @__gxx_personality_sj0(...)
diff --git a/llvm/test/CodeGen/X86/sjlj-unwind-inline-asm-codegen.ll b/llvm/test/CodeGen/X86/sjlj-unwind-inline-asm-codegen.ll
index b722dc0d9d6ce..c29c5aa0d312c 100644
--- a/llvm/test/CodeGen/X86/sjlj-unwind-inline-asm-codegen.ll
+++ b/llvm/test/CodeGen/X86/sjlj-unwind-inline-asm-codegen.ll
@@ -1,5 +1,5 @@
; FIXME: Fix machine verifier issues and remove -verify-machineinstrs=0. PR39439.
-; RUN: llc --exception-model=sjlj -verify-machineinstrs=0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting --exception-model=sjlj -verify-machineinstrs=0 < %s | FileCheck %s
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/sjlj.ll b/llvm/test/CodeGen/X86/sjlj.ll
index 8fcaea8eb797d..adc6bc3c18d2b 100644
--- a/llvm/test/CodeGen/X86/sjlj.ll
+++ b/llvm/test/CodeGen/X86/sjlj.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=i386-pc-linux -mcpu=corei7 -relocation-model=static | FileCheck --check-prefix=X86 %s
-; RUN: llc < %s -mtriple=i386-pc-linux -mcpu=corei7 -relocation-model=pic | FileCheck --check-prefix=PIC86 %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7 -relocation-model=static | FileCheck --check-prefix=X64 %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mcpu=corei7 -relocation-model=pic | FileCheck --check-prefix=PIC64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux -mcpu=corei7 -relocation-model=static | FileCheck --check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux -mcpu=corei7 -relocation-model=pic | FileCheck --check-prefix=PIC86 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=corei7 -relocation-model=static | FileCheck --check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mcpu=corei7 -relocation-model=pic | FileCheck --check-prefix=PIC64 %s
@buf = internal global [5 x ptr] zeroinitializer
diff --git a/llvm/test/CodeGen/X86/slot-indexes.ll b/llvm/test/CodeGen/X86/slot-indexes.ll
index 8ca89383813a2..86a36bc031153 100644
--- a/llvm/test/CodeGen/X86/slot-indexes.ll
+++ b/llvm/test/CodeGen/X86/slot-indexes.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux -stop-after=slotindexes %s -o - | llc -passes='print<slot-indexes>' -x mir 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -stop-after=slotindexes %s -o - | llc -combiner-topological-sorting -passes='print<slot-indexes>' -x mir 2>&1 | FileCheck %s
define void @foo(){
ret void
diff --git a/llvm/test/CodeGen/X86/slow-incdec.ll b/llvm/test/CodeGen/X86/slow-incdec.ll
index 3b0be767fbb94..ac0f6743b9921 100644
--- a/llvm/test/CodeGen/X86/slow-incdec.ll
+++ b/llvm/test/CodeGen/X86/slow-incdec.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i386-unknown-linux-gnu -mattr=-slow-incdec < %s | FileCheck -check-prefix=CHECK -check-prefix=INCDEC %s
-; RUN: llc -mtriple=i386-unknown-linux-gnu -mattr=+slow-incdec < %s | FileCheck -check-prefix=CHECK -check-prefix=ADD %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-linux-gnu -mattr=-slow-incdec < %s | FileCheck -check-prefix=CHECK -check-prefix=INCDEC %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-linux-gnu -mattr=+slow-incdec < %s | FileCheck -check-prefix=CHECK -check-prefix=ADD %s
define i32 @inc(i32 %x) {
; INCDEC-LABEL: inc:
diff --git a/llvm/test/CodeGen/X86/slow-pmulld.ll b/llvm/test/CodeGen/X86/slow-pmulld.ll
index e8c05f9b562d8..93abc736c6f8c 100644
--- a/llvm/test/CodeGen/X86/slow-pmulld.ll
+++ b/llvm/test/CodeGen/X86/slow-pmulld.ll
@@ -1,23 +1,23 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont | FileCheck %s --check-prefixes=SSE-32,SLM,SLM-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=silvermont | FileCheck %s --check-prefixes=SSE-64,SLM,SLM-64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4.2,+slow-pmulld | FileCheck %s --check-prefixes=SSE-32,SLOW,SLOW-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+slow-pmulld | FileCheck %s --check-prefixes=SSE-64,SLOW,SLOW-64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE-32,SSE4,SSE4-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE-64,SSE4,SSE4-64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx2,+slow-pmulld | FileCheck %s --check-prefixes=AVX2,AVX2-SLOW,AVX2-SLOW32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+slow-pmulld | FileCheck %s --check-prefixes=AVX2,AVX2-SLOW,AVX2-SLOW64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2,AVX-32,AVX2-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2,AVX-64,AVX2-64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX2,AVX-32,AVX512-32,AVX512DQ-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX2,AVX-64,AVX512-64,AVX512DQ-64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX2,AVX-32,AVX512-32,AVX512BW-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX2,AVX-64,AVX512-64,AVX512BW-64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX2,AVX-32,AVX512-32,KNL-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX2,AVX-64,AVX512-64,KNL-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=silvermont | FileCheck %s --check-prefixes=SSE-32,SLM,SLM-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=silvermont | FileCheck %s --check-prefixes=SSE-64,SLM,SLM-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+sse4.2,+slow-pmulld | FileCheck %s --check-prefixes=SSE-32,SLOW,SLOW-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+slow-pmulld | FileCheck %s --check-prefixes=SSE-64,SLOW,SLOW-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE-32,SSE4,SSE4-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE-64,SSE4,SSE4-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+avx2,+slow-pmulld | FileCheck %s --check-prefixes=AVX2,AVX2-SLOW,AVX2-SLOW32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+slow-pmulld | FileCheck %s --check-prefixes=AVX2,AVX2-SLOW,AVX2-SLOW64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2,AVX-32,AVX2-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2,AVX-64,AVX2-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX2,AVX-32,AVX512-32,AVX512DQ-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX2,AVX-64,AVX512-64,AVX512DQ-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX2,AVX-32,AVX512-32,AVX512BW-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX2,AVX-64,AVX512-64,AVX512BW-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX2,AVX-32,AVX512-32,KNL-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX2,AVX-64,AVX512-64,KNL-64
; Make sure that the slow-pmulld feature can be used without SSE4.1.
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont -mattr=-sse4.1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=silvermont -mattr=-sse4.1
define <4 x i32> @test_mul_v4i32_v4i8(<4 x i8> %A) {
; SSE-32-LABEL: test_mul_v4i32_v4i8:
diff --git a/llvm/test/CodeGen/X86/slow-pmullq.ll b/llvm/test/CodeGen/X86/slow-pmullq.ll
index 501bdf1761366..9c67271f785d1 100644
--- a/llvm/test/CodeGen/X86/slow-pmullq.ll
+++ b/llvm/test/CodeGen/X86/slow-pmullq.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=cannonlake | FileCheck %s --check-prefix=CNL
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=cannonlake -mattr=-avx512vl | FileCheck %s --check-prefix=NOVLX
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512ifma,+avx512dq,+avx512vl,+slow-pmullq | FileCheck %s --check-prefix=GENERIC
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512ifma,+avx512dq,-avx512vl,+slow-pmullq | FileCheck %s --check-prefix=GENERIC-NOVLX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=cannonlake | FileCheck %s --check-prefix=CNL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=cannonlake -mattr=-avx512vl | FileCheck %s --check-prefix=NOVLX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512ifma,+avx512dq,+avx512vl,+slow-pmullq | FileCheck %s --check-prefix=GENERIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512ifma,+avx512dq,-avx512vl,+slow-pmullq | FileCheck %s --check-prefix=GENERIC-NOVLX
; ============================================================================
; Case 1: 52-bit Optimization (vpmadd52luq)
diff --git a/llvm/test/CodeGen/X86/slow-unaligned-mem.ll b/llvm/test/CodeGen/X86/slow-unaligned-mem.ll
index a215b60055dd5..46fe79ab16911 100644
--- a/llvm/test/CodeGen/X86/slow-unaligned-mem.ll
+++ b/llvm/test/CodeGen/X86/slow-unaligned-mem.ll
@@ -1,61 +1,61 @@
; Intel chips with slow unaligned memory accesses
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium3 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SCALAR
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium3m 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SCALAR
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium-m 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium4 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=pentium4m 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=yonah 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=prescott 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=nocona 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=core2 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=penryn 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=bonnell 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=pentium3 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SCALAR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=pentium3m 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SCALAR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=pentium-m 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=pentium4 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=pentium4m 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=yonah 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=prescott 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=nocona 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=core2 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=penryn 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=bonnell 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
; Intel chips with fast unaligned memory accesses
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=nehalem 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=westmere 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=sandybridge 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX128
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=ivybridge 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX128
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=haswell 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=broadwell 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=knl 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX512
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=skylake-avx512 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=silvermont 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=nehalem 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=westmere 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=sandybridge 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX128
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=ivybridge 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX128
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=haswell 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=broadwell 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=knl 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=skylake-avx512 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
; AMD chips with slow unaligned memory accesses
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=athlon-4 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SCALAR
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=athlon-xp 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SCALAR
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=k8 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=opteron 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=athlon64 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=athlon-fx 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=k8-sse3 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=opteron-sse3 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=athlon64-sse3 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=athlon-4 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SCALAR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=athlon-xp 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SCALAR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=k8 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=opteron 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=athlon64 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=athlon-fx 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=k8-sse3 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=opteron-sse3 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=athlon64-sse3 2>&1 | FileCheck %s --check-prefixes=SLOW,SLOW-SSE
; AMD chips with fast unaligned memory accesses
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=amdfam10 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=barcelona 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=btver1 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=btver2 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=bdver1 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=bdver2 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=bdver3 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=bdver4 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=znver1 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=znver2 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=znver3 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=znver4 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX512
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=znver5 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX512
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=znver6 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=amdfam10 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=barcelona 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=btver1 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=btver2 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=bdver1 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=bdver2 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=bdver3 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=bdver4 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=znver1 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=znver2 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=znver3 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=znver4 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=znver5 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=znver6 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-AVX512
; Other chips with slow unaligned memory accesses
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=c3-2 2>&1 | FileCheck %s --check-prefixes=SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mcpu=c3-2 2>&1 | FileCheck %s --check-prefixes=SLOW
; Verify that the slow/fast unaligned memory attribute is set correctly for each CPU model.
; Slow chips use 4-byte stores. Fast chips with SSE or later use something other than 4-byte stores.
@@ -63,8 +63,8 @@
; Also verify that SSE4.2 or SSE4a imply fast unaligned accesses.
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=sse4.2 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=sse4a 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=sse4.2 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=sse4a 2>&1 | FileCheck %s --check-prefixes=FAST,FAST-SSE
; SLOW-NOT: not a recognized processor
; FAST-NOT: not a recognized processor
diff --git a/llvm/test/CodeGen/X86/sm3-intrinsics.ll b/llvm/test/CodeGen/X86/sm3-intrinsics.ll
index bab30f6deea7e..2d9e6dbcefa39 100644
--- a/llvm/test/CodeGen/X86/sm3-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/sm3-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+sm3 | FileCheck %s
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+sm3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+sm3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+sm3 | FileCheck %s
define <4 x i32> @test_int_x86_vsm3msg1(<4 x i32> %A, <4 x i32> %B, <4 x i32> %C) {
; CHECK-LABEL: test_int_x86_vsm3msg1:
diff --git a/llvm/test/CodeGen/X86/sm4-evex-intrinsics.ll b/llvm/test/CodeGen/X86/sm4-evex-intrinsics.ll
index 8d99ad07e22e6..428dd142fb6b9 100644
--- a/llvm/test/CodeGen/X86/sm4-evex-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/sm4-evex-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-- --show-mc-encoding -mattr=+sm4,+avx10.2 | FileCheck %s
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-- --show-mc-encoding -mattr=+sm4,+avx10.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-- --show-mc-encoding -mattr=+sm4,+avx10.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-- --show-mc-encoding -mattr=+sm4,+avx10.2 | FileCheck %s
define <4 x i32> @test_int_x86_vsm4key4128(<4 x i32> %A, <4 x i32> %B) {
; CHECK-LABEL: test_int_x86_vsm4key4128:
diff --git a/llvm/test/CodeGen/X86/sm4-intrinsics.ll b/llvm/test/CodeGen/X86/sm4-intrinsics.ll
index 44e63614e73d5..4b11b2013bda1 100644
--- a/llvm/test/CodeGen/X86/sm4-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/sm4-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+sm4 | FileCheck %s
-; RUN: llc < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+sm4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+sm4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=i686-unknown-unknown --show-mc-encoding -mattr=+sm4 | FileCheck %s
define <4 x i32> @test_int_x86_vsm4key4128(<4 x i32> %A, <4 x i32> %B) {
; CHECK-LABEL: test_int_x86_vsm4key4128:
diff --git a/llvm/test/CodeGen/X86/small-byval-memcpy.ll b/llvm/test/CodeGen/X86/small-byval-memcpy.ll
index 59a7f53077b9d..7c7d524d1fee1 100644
--- a/llvm/test/CodeGen/X86/small-byval-memcpy.ll
+++ b/llvm/test/CodeGen/X86/small-byval-memcpy.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s --check-prefix=CORE2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=nehalem | FileCheck %s --check-prefix=NEHALEM
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=bdver2 | FileCheck %s --check-prefix=BDVER2
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=btver2 | FileCheck %s --check-prefix=BTVER2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=core2 | FileCheck %s --check-prefix=CORE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=nehalem | FileCheck %s --check-prefix=NEHALEM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=bdver2 | FileCheck %s --check-prefix=BDVER2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=btver2 | FileCheck %s --check-prefix=BTVER2
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture readonly, i64, i1)
diff --git a/llvm/test/CodeGen/X86/smax.ll b/llvm/test/CodeGen/X86/smax.ll
index c12a66247ca02..4a493488082aa 100644
--- a/llvm/test/CodeGen/X86/smax.ll
+++ b/llvm/test/CodeGen/X86/smax.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=X64,SSE
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=avx | FileCheck %s --check-prefixes=X64,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=avx2 | FileCheck %s --check-prefixes=X64,AVX,AVX2
-; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=X64,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=avx | FileCheck %s --check-prefixes=X64,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=avx2 | FileCheck %s --check-prefixes=X64,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
declare i8 @llvm.smax.i8(i8, i8)
declare i16 @llvm.smax.i16(i16, i16)
diff --git a/llvm/test/CodeGen/X86/smin.ll b/llvm/test/CodeGen/X86/smin.ll
index cdfb484be0b6c..ee0dfa47ca3e3 100644
--- a/llvm/test/CodeGen/X86/smin.ll
+++ b/llvm/test/CodeGen/X86/smin.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=X64,SSE
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=avx | FileCheck %s --check-prefixes=X64,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=avx2 | FileCheck %s --check-prefixes=X64,AVX,AVX2
-; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=X64,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=avx | FileCheck %s --check-prefixes=X64,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=avx2 | FileCheck %s --check-prefixes=X64,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
declare i8 @llvm.smin.i8(i8, i8)
declare i16 @llvm.smin.i16(i16, i16)
diff --git a/llvm/test/CodeGen/X86/smul_fix.ll b/llvm/test/CodeGen/X86/smul_fix.ll
index 8cb032776114b..a30c58bff9b4f 100644
--- a/llvm/test/CodeGen/X86/smul_fix.ll
+++ b/llvm/test/CodeGen/X86/smul_fix.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
declare i4 @llvm.smul.fix.i4 (i4, i4, i32)
declare i32 @llvm.smul.fix.i32 (i32, i32, i32)
diff --git a/llvm/test/CodeGen/X86/smul_fix_sat.ll b/llvm/test/CodeGen/X86/smul_fix_sat.ll
index e68b6e328b723..3e6ed53545874 100644
--- a/llvm/test/CodeGen/X86/smul_fix_sat.ll
+++ b/llvm/test/CodeGen/X86/smul_fix_sat.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
declare i4 @llvm.smul.fix.sat.i4 (i4, i4, i32)
declare i32 @llvm.smul.fix.sat.i32 (i32, i32, i32)
diff --git a/llvm/test/CodeGen/X86/smul_fix_sat_constants.ll b/llvm/test/CodeGen/X86/smul_fix_sat_constants.ll
index 7c1efa7c8b48a..006025062fd7e 100644
--- a/llvm/test/CodeGen/X86/smul_fix_sat_constants.ll
+++ b/llvm/test/CodeGen/X86/smul_fix_sat_constants.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
; Verify expansion by using constant values. We just want to cover all the paths layed out by ExpandIntRes_MULFIX.
diff --git a/llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll b/llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll
index 13596e1b18768..11469bdc5a829 100644
--- a/llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll
+++ b/llvm/test/CodeGen/X86/smulo-128-legalisation-lowering.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i686-darwin-unknown < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-darwin-unknown < %s | FileCheck %s --check-prefix=X86
define zeroext i1 @smuloi128(i128 %v1, i128 %v2, ptr %res) {
; X64-LABEL: smuloi128:
diff --git a/llvm/test/CodeGen/X86/soft-fp-legal-in-HW-reg.ll b/llvm/test/CodeGen/X86/soft-fp-legal-in-HW-reg.ll
index f2b0a6e186305..6ffbf1d137c3e 100644
--- a/llvm/test/CodeGen/X86/soft-fp-legal-in-HW-reg.ll
+++ b/llvm/test/CodeGen/X86/soft-fp-legal-in-HW-reg.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux-android -mattr=+mmx -enable-legalize-types-checking | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-android -mattr=+mmx -enable-legalize-types-checking | FileCheck %s
;
; D31946
; Check that we dont end up with the ""LLVM ERROR: Cannot select" error.
diff --git a/llvm/test/CodeGen/X86/soft-fp.ll b/llvm/test/CodeGen/X86/soft-fp.ll
index 994a3ed212a71..965f17818f03a 100644
--- a/llvm/test/CodeGen/X86/soft-fp.ll
+++ b/llvm/test/CodeGen/X86/soft-fp.ll
@@ -1,12 +1,12 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+mmx,+sse,+soft-float \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+mmx,+sse,+soft-float \
; RUN: | FileCheck %s --check-prefix=SOFT1 --check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+sse2,+soft-float \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+mmx,+sse2,+soft-float \
; RUN: | FileCheck %s --check-prefix=SOFT2 --check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+sse \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+mmx,+sse \
; RUN: | FileCheck %s --check-prefix=SSE1 --check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+mmx,+sse2 \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+mmx,+sse2 \
; RUN: | FileCheck %s --check-prefix=SSE2 --check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-gnux32 -mattr=+mmx,+sse2,+soft-float | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-gnux32 -mattr=+mmx,+sse2,+soft-float | FileCheck %s
; CHECK-NOT: xmm{{[0-9]+}}
diff --git a/llvm/test/CodeGen/X86/soft-sitofp.ll b/llvm/test/CodeGen/X86/soft-sitofp.ll
index acb4bb906e702..c89e7683914cd 100644
--- a/llvm/test/CodeGen/X86/soft-sitofp.ll
+++ b/llvm/test/CodeGen/X86/soft-sitofp.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i386-pc-linux < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-pc-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux < %s | FileCheck %s
; Function Attrs: nounwind
; CHECK-LABEL: s64_to_d:
diff --git a/llvm/test/CodeGen/X86/speculation-hardening-sls.ll b/llvm/test/CodeGen/X86/speculation-hardening-sls.ll
index a68d6f039939e..3fd3922aee815 100644
--- a/llvm/test/CodeGen/X86/speculation-hardening-sls.ll
+++ b/llvm/test/CodeGen/X86/speculation-hardening-sls.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mattr=harden-sls-ret -mtriple=x86_64-unknown-unknown < %s | FileCheck %s -check-prefixes=CHECK,RET
-; RUN: llc -mattr=harden-sls-ijmp -mtriple=x86_64-unknown-unknown < %s | FileCheck %s -check-prefixes=CHECK,IJMP
+; RUN: llc -combiner-topological-sorting -mattr=harden-sls-ret -mtriple=x86_64-unknown-unknown < %s | FileCheck %s -check-prefixes=CHECK,RET
+; RUN: llc -combiner-topological-sorting -mattr=harden-sls-ijmp -mtriple=x86_64-unknown-unknown < %s | FileCheck %s -check-prefixes=CHECK,IJMP
define dso_local i32 @double_return(i32 %a, i32 %b) local_unnamed_addr {
; CHECK-LABEL: double_return:
diff --git a/llvm/test/CodeGen/X86/speculative-execution-side-effect-suppression.ll b/llvm/test/CodeGen/X86/speculative-execution-side-effect-suppression.ll
index 70e3d6b396cfb..451f615df8f2b 100644
--- a/llvm/test/CodeGen/X86/speculative-execution-side-effect-suppression.ll
+++ b/llvm/test/CodeGen/X86/speculative-execution-side-effect-suppression.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi %s -o - | FileCheck %s
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-one-lfence-per-bb %s -o - | FileCheck %s --check-prefix=X86-ONE-LFENCE
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-omit-branch-lfences %s -o - | FileCheck %s --check-prefix=X86-OMIT-BR
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-only-lfence-non-const %s -o - | FileCheck %s --check-prefix=X86-NON-CONST
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-one-lfence-per-bb %s -o - | FileCheck %s --check-prefix=X86-ONE-LFENCE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-omit-branch-lfences %s -o - | FileCheck %s --check-prefix=X86-OMIT-BR
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -x86-seses-enable-without-lvi-cfi -x86-seses-only-lfence-non-const %s -o - | FileCheck %s --check-prefix=X86-NON-CONST
define dso_local void @_Z4buzzv() {
; CHECK-LABEL: _Z4buzzv:
diff --git a/llvm/test/CodeGen/X86/speculative-load-hardening-call-and-ret.ll b/llvm/test/CodeGen/X86/speculative-load-hardening-call-and-ret.ll
index 064812323d177..5e95f6cdbc4c8 100644
--- a/llvm/test/CodeGen/X86/speculative-load-hardening-call-and-ret.ll
+++ b/llvm/test/CodeGen/X86/speculative-load-hardening-call-and-ret.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening | FileCheck %s --check-prefix=X64-NOPIC
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening -code-model medium | FileCheck %s --check-prefix=X64-NOPIC-MCM
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening -relocation-model pic | FileCheck %s --check-prefix=X64-PIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening | FileCheck %s --check-prefix=X64-NOPIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening -code-model medium | FileCheck %s --check-prefix=X64-NOPIC-MCM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening -relocation-model pic | FileCheck %s --check-prefix=X64-PIC
;
; FIXME: Add support for 32-bit.
diff --git a/llvm/test/CodeGen/X86/speculative-load-hardening-gather.ll b/llvm/test/CodeGen/X86/speculative-load-hardening-gather.ll
index 7b3667420ec6d..137c1773f47fd 100644
--- a/llvm/test/CodeGen/X86/speculative-load-hardening-gather.ll
+++ b/llvm/test/CodeGen/X86/speculative-load-hardening-gather.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
declare <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float>, ptr, <4 x i32>, <4 x float>, i8)
diff --git a/llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll b/llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll
index 2092fc9cd6e00..e31534d4e2507 100644
--- a/llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll
+++ b/llvm/test/CodeGen/X86/speculative-load-hardening-indirect.ll
@@ -2,12 +2,12 @@
; Verify the call site info. If the call site info is not
; in the valid state, an assert should be triggered.
-; RUN: llc < %s -debug-entry-values -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening -stop-after=machineverifier
+; RUN: llc -combiner-topological-sorting < %s -debug-entry-values -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening -stop-after=machineverifier
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening -data-sections | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening -data-sections | FileCheck %s --check-prefix=X64
; FIXME: Fix machine verifier issues and remove -verify-machineinstrs=0. PR39451.
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening -relocation-model pic -data-sections -verify-machineinstrs=0 | FileCheck %s --check-prefix=X64-PIC
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening -data-sections -mattr=+retpoline | FileCheck %s --check-prefix=X64-RETPOLINE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening -relocation-model pic -data-sections -verify-machineinstrs=0 | FileCheck %s --check-prefix=X64-PIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening -data-sections -mattr=+retpoline | FileCheck %s --check-prefix=X64-RETPOLINE
;
; FIXME: Add support for 32-bit.
diff --git a/llvm/test/CodeGen/X86/speculative-load-hardening-no-spill.ll b/llvm/test/CodeGen/X86/speculative-load-hardening-no-spill.ll
index bf977885a40cb..b3c76e9fac460 100644
--- a/llvm/test/CodeGen/X86/speculative-load-hardening-no-spill.ll
+++ b/llvm/test/CodeGen/X86/speculative-load-hardening-no-spill.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -x86-speculative-load-hardening | FileCheck %s
define i32 @foo(ptr %0) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/speculative-load-hardening.ll b/llvm/test/CodeGen/X86/speculative-load-hardening.ll
index 5fd1f77e166d4..7dcf1feb96b48 100644
--- a/llvm/test/CodeGen/X86/speculative-load-hardening.ll
+++ b/llvm/test/CodeGen/X86/speculative-load-hardening.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -x86-slh-lfence | FileCheck %s --check-prefix=X64-LFENCE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -x86-slh-lfence | FileCheck %s --check-prefix=X64-LFENCE
;
; FIXME: Add support for 32-bit and other EH ABIs.
diff --git a/llvm/test/CodeGen/X86/splat-const.ll b/llvm/test/CodeGen/X86/splat-const.ll
index b9fd29658367f..4bab6c9eae8bd 100644
--- a/llvm/test/CodeGen/X86/splat-const.ll
+++ b/llvm/test/CodeGen/X86/splat-const.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=penryn | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mcpu=sandybridge | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mcpu=haswell | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mcpu=penryn | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mcpu=sandybridge | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mcpu=haswell | FileCheck %s --check-prefix=AVX2
; This checks that lowering for creation of constant vectors is sane and
; doesn't use redundant shuffles. (fixes PR22276)
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/split-eh-lpad-edges.ll b/llvm/test/CodeGen/X86/split-eh-lpad-edges.ll
index bb30c918ec2de..0d12ccc79ea96 100644
--- a/llvm/test/CodeGen/X86/split-eh-lpad-edges.ll
+++ b/llvm/test/CodeGen/X86/split-eh-lpad-edges.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; rdar://6647639
%struct.FetchPlanHeader = type { ptr, ptr, i32, ptr, ptr, ptr, ptr, ptr, ptr, %struct.__attributeDescriptionFlags }
diff --git a/llvm/test/CodeGen/X86/split-extend-vector-inreg.ll b/llvm/test/CodeGen/X86/split-extend-vector-inreg.ll
index c8e31f7088a45..cd785f7a1f004 100644
--- a/llvm/test/CodeGen/X86/split-extend-vector-inreg.ll
+++ b/llvm/test/CodeGen/X86/split-extend-vector-inreg.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
define <4 x i64> @autogen_SD88863() {
; X86-LABEL: autogen_SD88863:
diff --git a/llvm/test/CodeGen/X86/split-reg-with-hint.ll b/llvm/test/CodeGen/X86/split-reg-with-hint.ll
index 689f83ff0adc4..9343224b4cb6d 100644
--- a/llvm/test/CodeGen/X86/split-reg-with-hint.ll
+++ b/llvm/test/CodeGen/X86/split-reg-with-hint.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
; %ptr has a hint to %rdi in entry block, it also has a interference with %rdi
; in block if.then. It should be split in cold block if.then.
diff --git a/llvm/test/CodeGen/X86/split-store.ll b/llvm/test/CodeGen/X86/split-store.ll
index 416c0cbeeddbd..21ccb1d3151ed 100644
--- a/llvm/test/CodeGen/X86/split-store.ll
+++ b/llvm/test/CodeGen/X86/split-store.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -force-split-store < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -force-split-store < %s | FileCheck %s
define void @int32_float_pair(i32 %tmp1, float %tmp2, ptr %ref.tmp) {
; CHECK-LABEL: int32_float_pair:
diff --git a/llvm/test/CodeGen/X86/split-vector-bitcast.ll b/llvm/test/CodeGen/X86/split-vector-bitcast.ll
index 2039a0274496c..d2977fdbbffc8 100644
--- a/llvm/test/CodeGen/X86/split-vector-bitcast.ll
+++ b/llvm/test/CodeGen/X86/split-vector-bitcast.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=-sse2,+sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-sse2,+sse | FileCheck %s
; PR10497 + another isel issue with sse2 disabled
; (This is primarily checking that this construct doesn't crash.)
diff --git a/llvm/test/CodeGen/X86/split-vector-rem.ll b/llvm/test/CodeGen/X86/split-vector-rem.ll
index e292e128d9bfa..3d26e1e0e6cb9 100644
--- a/llvm/test/CodeGen/X86/split-vector-rem.ll
+++ b/llvm/test/CodeGen/X86/split-vector-rem.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define <8 x i32> @foo(<8 x i32> %t, <8 x i32> %u) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/sqrt-fastmath-mir.ll b/llvm/test/CodeGen/X86/sqrt-fastmath-mir.ll
index 5ac82c715dd04..86a17d4203523 100644
--- a/llvm/test/CodeGen/X86/sqrt-fastmath-mir.ll
+++ b/llvm/test/CodeGen/X86/sqrt-fastmath-mir.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2,fma -stop-after=finalize-isel 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx2,fma -stop-after=finalize-isel 2>&1 | FileCheck %s
declare float @llvm.sqrt.f32(float) #2
diff --git a/llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll b/llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll
index 416ff1d41af72..c9e0f933bdadc 100644
--- a/llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll
+++ b/llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=nehalem | FileCheck %s --check-prefixes=NHM
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=sandybridge | FileCheck %s --check-prefixes=FAST-SCALAR,SNB
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=broadwell | FileCheck %s --check-prefixes=FAST-SCALAR,BDW
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=skylake | FileCheck %s --check-prefixes=FAST-SCALAR,FAST-VECTOR
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver1 | FileCheck %s --check-prefixes=FAST-SCALAR,FAST-VECTOR
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver3 | FileCheck %s --check-prefixes=FAST-SCALAR,FAST-VECTOR
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver4 | FileCheck %s --check-prefixes=FAST-SCALAR,FAST-VECTOR
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver5 | FileCheck %s --check-prefixes=FAST-SCALAR,FAST-VECTOR
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver6 | FileCheck %s --check-prefixes=FAST-SCALAR,FAST-VECTOR
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=X86-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=nehalem | FileCheck %s --check-prefixes=NHM
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=sandybridge | FileCheck %s --check-prefixes=FAST-SCALAR,SNB
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=broadwell | FileCheck %s --check-prefixes=FAST-SCALAR,BDW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=skylake | FileCheck %s --check-prefixes=FAST-SCALAR,FAST-VECTOR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver1 | FileCheck %s --check-prefixes=FAST-SCALAR,FAST-VECTOR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver3 | FileCheck %s --check-prefixes=FAST-SCALAR,FAST-VECTOR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver4 | FileCheck %s --check-prefixes=FAST-SCALAR,FAST-VECTOR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver5 | FileCheck %s --check-prefixes=FAST-SCALAR,FAST-VECTOR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver6 | FileCheck %s --check-prefixes=FAST-SCALAR,FAST-VECTOR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=X86-64
define float @f32_no_daz(float %f) #0 {
; NHM-LABEL: f32_no_daz:
diff --git a/llvm/test/CodeGen/X86/sqrt-fastmath-tunecpu-attr.ll b/llvm/test/CodeGen/X86/sqrt-fastmath-tunecpu-attr.ll
index 85f7733e671a7..a49a5062850f1 100644
--- a/llvm/test/CodeGen/X86/sqrt-fastmath-tunecpu-attr.ll
+++ b/llvm/test/CodeGen/X86/sqrt-fastmath-tunecpu-attr.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s | FileCheck %s
define float @f32_tune_nhm(float %f) #0 {
; CHECK-LABEL: f32_tune_nhm:
diff --git a/llvm/test/CodeGen/X86/sqrt-fastmath.ll b/llvm/test/CodeGen/X86/sqrt-fastmath.ll
index 143edacb5390d..28ea141be9074 100644
--- a/llvm/test/CodeGen/X86/sqrt-fastmath.ll
+++ b/llvm/test/CodeGen/X86/sqrt-fastmath.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64--linux-gnu -mcpu=x86-64 -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64--linux-gnu -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64--linux-gnu -mcpu=x86-64 -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--linux-gnu -mcpu=x86-64 -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--linux-gnu -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--linux-gnu -mcpu=x86-64 -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=AVX512
declare double @__sqrt_finite(double)
declare float @__sqrtf_finite(float)
diff --git a/llvm/test/CodeGen/X86/sqrt-partial.ll b/llvm/test/CodeGen/X86/sqrt-partial.ll
index 9e13b9abd898a..f261063ff5c7e 100644
--- a/llvm/test/CodeGen/X86/sqrt-partial.ll
+++ b/llvm/test/CodeGen/X86/sqrt-partial.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
; PR31455 - https://bugs.llvm.org/show_bug.cgi?id=31455
; We have to assume that errno can be set, so we have to make a libcall in that case.
diff --git a/llvm/test/CodeGen/X86/srem-lkk.ll b/llvm/test/CodeGen/X86/srem-lkk.ll
index ae30ae4463a93..997cea333d531 100644
--- a/llvm/test/CodeGen/X86/srem-lkk.ll
+++ b/llvm/test/CodeGen/X86/srem-lkk.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK
define i32 @fold_srem_positive_odd(i32 %x) {
; CHECK-LABEL: fold_srem_positive_odd:
diff --git a/llvm/test/CodeGen/X86/srem-vector-lkk.ll b/llvm/test/CodeGen/X86/srem-vector-lkk.ll
index f9de4e18857c9..b163bd199ce23 100644
--- a/llvm/test/CodeGen/X86/srem-vector-lkk.ll
+++ b/llvm/test/CodeGen/X86/srem-vector-lkk.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <4 x i16> @fold_srem_vec_1(<4 x i16> %x) {
; SSE2-LABEL: fold_srem_vec_1:
diff --git a/llvm/test/CodeGen/X86/sret-implicit.ll b/llvm/test/CodeGen/X86/sret-implicit.ll
index 6cd64812f24a6..58f855c49ddf2 100644
--- a/llvm/test/CodeGen/X86/sret-implicit.ll
+++ b/llvm/test/CodeGen/X86/sret-implicit.ll
@@ -1,8 +1,8 @@
-; RUN: llc -mtriple=x86_64-apple-darwin8 < %s | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=x86_64-pc-linux < %s | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i686-pc-linux < %s | FileCheck %s --check-prefix=X86
-; RUN: llc -mtriple=x86_64-apple-darwin8 -terminal-rule < %s | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=x86_64-pc-linux -terminal-rule < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin8 < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-pc-linux < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin8 -terminal-rule < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -terminal-rule < %s | FileCheck %s --check-prefix=X64
define void @sret_void(ptr sret(i32) %p) {
store i32 0, ptr %p
diff --git a/llvm/test/CodeGen/X86/sse-align-0.ll b/llvm/test/CodeGen/X86/sse-align-0.ll
index bb9f0868cf975..57112658622f5 100644
--- a/llvm/test/CodeGen/X86/sse-align-0.ll
+++ b/llvm/test/CodeGen/X86/sse-align-0.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
define <4 x float> @foo(ptr %p, <4 x float> %x) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/sse-align-1.ll b/llvm/test/CodeGen/X86/sse-align-1.ll
index dec462f3ca72e..fe56ead601f8b 100644
--- a/llvm/test/CodeGen/X86/sse-align-1.ll
+++ b/llvm/test/CodeGen/X86/sse-align-1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define <4 x float> @foo(ptr %p) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/sse-align-10.ll b/llvm/test/CodeGen/X86/sse-align-10.ll
index eeca6f816e11e..bfd1939609e65 100644
--- a/llvm/test/CodeGen/X86/sse-align-10.ll
+++ b/llvm/test/CodeGen/X86/sse-align-10.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define <2 x i64> @bar(ptr %p) nounwind {
; CHECK-LABEL: bar:
diff --git a/llvm/test/CodeGen/X86/sse-align-11.ll b/llvm/test/CodeGen/X86/sse-align-11.ll
index e6b5f85e6f35a..dcd9f35f8014d 100644
--- a/llvm/test/CodeGen/X86/sse-align-11.ll
+++ b/llvm/test/CodeGen/X86/sse-align-11.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=yonah -mtriple=i686-apple-darwin8 | FileCheck %s --check-prefix=i686-apple-darwin8
-; RUN: llc < %s -mcpu=yonah -mtriple=i686-linux-gnu | FileCheck %s --check-prefix=i686-linux-gnu
+; RUN: llc -combiner-topological-sorting < %s -mcpu=yonah -mtriple=i686-apple-darwin8 | FileCheck %s --check-prefix=i686-apple-darwin8
+; RUN: llc -combiner-topological-sorting < %s -mcpu=yonah -mtriple=i686-linux-gnu | FileCheck %s --check-prefix=i686-linux-gnu
; PR8969 - make 32-bit linux have a 16-byte aligned stack
define <4 x float> @foo(float %a, float %b, float %c, float %d) nounwind {
diff --git a/llvm/test/CodeGen/X86/sse-align-12.ll b/llvm/test/CodeGen/X86/sse-align-12.ll
index 7b4bd3ffdf00c..ead5c2c536c58 100644
--- a/llvm/test/CodeGen/X86/sse-align-12.ll
+++ b/llvm/test/CodeGen/X86/sse-align-12.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=nehalem | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=nehalem | FileCheck %s
define <4 x float> @a(ptr %y) nounwind {
; CHECK-LABEL: a:
diff --git a/llvm/test/CodeGen/X86/sse-align-2.ll b/llvm/test/CodeGen/X86/sse-align-2.ll
index 4834ff1677df5..9c290c0be4d26 100644
--- a/llvm/test/CodeGen/X86/sse-align-2.ll
+++ b/llvm/test/CodeGen/X86/sse-align-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=penryn | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=penryn | FileCheck %s
define <4 x float> @foo(ptr %p, <4 x float> %x) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/sse-align-3.ll b/llvm/test/CodeGen/X86/sse-align-3.ll
index 94ad662748b78..9116e113310ca 100644
--- a/llvm/test/CodeGen/X86/sse-align-3.ll
+++ b/llvm/test/CodeGen/X86/sse-align-3.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
define void @foo(ptr %p, <4 x float> %x) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/sse-align-4.ll b/llvm/test/CodeGen/X86/sse-align-4.ll
index 96718130ec7ae..aaba43862e897 100644
--- a/llvm/test/CodeGen/X86/sse-align-4.ll
+++ b/llvm/test/CodeGen/X86/sse-align-4.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define void @foo(ptr %p, <4 x float> %x) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/sse-align-5.ll b/llvm/test/CodeGen/X86/sse-align-5.ll
index bfca072fa1cc5..6a014383ae7b2 100644
--- a/llvm/test/CodeGen/X86/sse-align-5.ll
+++ b/llvm/test/CodeGen/X86/sse-align-5.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define <2 x i64> @bar(ptr %p) nounwind {
; CHECK-LABEL: bar:
diff --git a/llvm/test/CodeGen/X86/sse-align-6.ll b/llvm/test/CodeGen/X86/sse-align-6.ll
index 54e476f727311..10f620733f997 100644
--- a/llvm/test/CodeGen/X86/sse-align-6.ll
+++ b/llvm/test/CodeGen/X86/sse-align-6.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define <2 x i64> @bar(ptr %p, <2 x i64> %x) nounwind {
; CHECK-LABEL: bar:
diff --git a/llvm/test/CodeGen/X86/sse-align-7.ll b/llvm/test/CodeGen/X86/sse-align-7.ll
index c04c656812013..145da27ae5ed5 100644
--- a/llvm/test/CodeGen/X86/sse-align-7.ll
+++ b/llvm/test/CodeGen/X86/sse-align-7.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
define void @bar(ptr %p, <2 x i64> %x) nounwind {
; CHECK-LABEL: bar:
diff --git a/llvm/test/CodeGen/X86/sse-align-8.ll b/llvm/test/CodeGen/X86/sse-align-8.ll
index 07f038a1f5c4f..7090de2a81274 100644
--- a/llvm/test/CodeGen/X86/sse-align-8.ll
+++ b/llvm/test/CodeGen/X86/sse-align-8.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define void @bar(ptr %p, <2 x i64> %x) nounwind {
; CHECK-LABEL: bar:
diff --git a/llvm/test/CodeGen/X86/sse-align-9.ll b/llvm/test/CodeGen/X86/sse-align-9.ll
index 70e2c5f65a93b..4e43f89e41726 100644
--- a/llvm/test/CodeGen/X86/sse-align-9.ll
+++ b/llvm/test/CodeGen/X86/sse-align-9.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define <4 x float> @foo(ptr %p) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/sse-commute.ll b/llvm/test/CodeGen/X86/sse-commute.ll
index 1800a6eea61b2..d9197baf5d034 100644
--- a/llvm/test/CodeGen/X86/sse-commute.ll
+++ b/llvm/test/CodeGen/X86/sse-commute.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
; Commute the comparison to avoid a move.
; PR7500.
diff --git a/llvm/test/CodeGen/X86/sse-cvttp2si.ll b/llvm/test/CodeGen/X86/sse-cvttp2si.ll
index 09b1d0f8b87db..92941accd175b 100644
--- a/llvm/test/CodeGen/X86/sse-cvttp2si.ll
+++ b/llvm/test/CodeGen/X86/sse-cvttp2si.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512f,avx512vl | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx512f,avx512vl | FileCheck %s --check-prefix=AVX
; PR37751 - https://bugs.llvm.org/show_bug.cgi?id=37751
; We can't combine into 'round' instructions because the behavior is different for out-of-range values.
diff --git a/llvm/test/CodeGen/X86/sse-domains.ll b/llvm/test/CodeGen/X86/sse-domains.ll
index 8a1b811b77e5d..e3909185d4031 100644
--- a/llvm/test/CodeGen/X86/sse-domains.ll
+++ b/llvm/test/CodeGen/X86/sse-domains.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=nehalem | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=nehalem | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.7"
diff --git a/llvm/test/CodeGen/X86/sse-fcopysign.ll b/llvm/test/CodeGen/X86/sse-fcopysign.ll
index 3eadcad145b65..bbfe4335a9b04 100644
--- a/llvm/test/CodeGen/X86/sse-fcopysign.ll
+++ b/llvm/test/CodeGen/X86/sse-fcopysign.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
;
; Library Functions
diff --git a/llvm/test/CodeGen/X86/sse-fsignum.ll b/llvm/test/CodeGen/X86/sse-fsignum.ll
index 06abb4edfc14e..d1f70c90a6373 100644
--- a/llvm/test/CodeGen/X86/sse-fsignum.ll
+++ b/llvm/test/CodeGen/X86/sse-fsignum.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512F
; 'signum' test cases (PR13248)
diff --git a/llvm/test/CodeGen/X86/sse-insertelt-from-mem.ll b/llvm/test/CodeGen/X86/sse-insertelt-from-mem.ll
index 1c3cfd079e9e9..1bed214221e8b 100644
--- a/llvm/test/CodeGen/X86/sse-insertelt-from-mem.ll
+++ b/llvm/test/CodeGen/X86/sse-insertelt-from-mem.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
; 0'th element insertion into an SSE register.
diff --git a/llvm/test/CodeGen/X86/sse-insertelt.ll b/llvm/test/CodeGen/X86/sse-insertelt.ll
index 72e002ed6b7db..1c02c1c023901 100644
--- a/llvm/test/CodeGen/X86/sse-insertelt.ll
+++ b/llvm/test/CodeGen/X86/sse-insertelt.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
; 0'th element insertion into an SSE register.
diff --git a/llvm/test/CodeGen/X86/sse-intrinsics-fast-isel-x86_64.ll b/llvm/test/CodeGen/X86/sse-intrinsics-fast-isel-x86_64.ll
index 812686ede3c2f..eef889b8665c2 100644
--- a/llvm/test/CodeGen/X86/sse-intrinsics-fast-isel-x86_64.ll
+++ b/llvm/test/CodeGen/X86/sse-intrinsics-fast-isel-x86_64.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefix=AVX
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse-builtins.c
diff --git a/llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
index 2e2e78a6da51e..1115163fd29da 100644
--- a/llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -show-mc-encoding < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse | FileCheck %s --check-prefixes=CHECK,X86,SSE,X86-SSE,X86-SSE1
-; RUN: llc -show-mc-encoding < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86,SSE,X86-SSE,X86-SSE2
-; RUN: llc -show-mc-encoding < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X86,AVX,X86-AVX,AVX1,X86-AVX1
-; RUN: llc -show-mc-encoding < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86,AVX,X86-AVX,AVX512,X86-AVX512
-; RUN: llc -show-mc-encoding < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse,-sse2 | FileCheck %s --check-prefixes=CHECK,X64,SSE,X64-SSE,X64-SSE1
-; RUN: llc -show-mc-encoding < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse,+sse2 | FileCheck %s --check-prefixes=CHECK,X64,SSE,X64-SSE,X64-SSE2
-; RUN: llc -show-mc-encoding < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X64,AVX,X64-AVX,AVX1,X64-AVX1
-; RUN: llc -show-mc-encoding < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64,AVX,X64-AVX,AVX512,X64-AVX512
+; RUN: llc -combiner-topological-sorting -show-mc-encoding < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse | FileCheck %s --check-prefixes=CHECK,X86,SSE,X86-SSE,X86-SSE1
+; RUN: llc -combiner-topological-sorting -show-mc-encoding < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86,SSE,X86-SSE,X86-SSE2
+; RUN: llc -combiner-topological-sorting -show-mc-encoding < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X86,AVX,X86-AVX,AVX1,X86-AVX1
+; RUN: llc -combiner-topological-sorting -show-mc-encoding < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK,X86,AVX,X86-AVX,AVX512,X86-AVX512
+; RUN: llc -combiner-topological-sorting -show-mc-encoding < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse,-sse2 | FileCheck %s --check-prefixes=CHECK,X64,SSE,X64-SSE,X64-SSE1
+; RUN: llc -combiner-topological-sorting -show-mc-encoding < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse,+sse2 | FileCheck %s --check-prefixes=CHECK,X64,SSE,X64-SSE,X64-SSE2
+; RUN: llc -combiner-topological-sorting -show-mc-encoding < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X64,AVX,X64-AVX,AVX1,X64-AVX1
+; RUN: llc -combiner-topological-sorting -show-mc-encoding < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK,X64,AVX,X64-AVX,AVX512,X64-AVX512
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse-builtins.c
diff --git a/llvm/test/CodeGen/X86/sse-intrinsics-x86-upgrade.ll b/llvm/test/CodeGen/X86/sse-intrinsics-x86-upgrade.ll
index 9564e0208434b..b48b1387ccc55 100644
--- a/llvm/test/CodeGen/X86/sse-intrinsics-x86-upgrade.ll
+++ b/llvm/test/CodeGen/X86/sse-intrinsics-x86-upgrade.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X86-SSE
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX1,X86-AVX1
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX512,X86-AVX512
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-sse2 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X64-SSE
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX1,X64-AVX1
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX512,X64-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+sse -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX1,X86-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX512,X86-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=-sse2 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX1,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX512,X64-AVX512
define <4 x float> @test_x86_sse_sqrt_ps(<4 x float> %a0) {
diff --git a/llvm/test/CodeGen/X86/sse-intrinsics-x86.ll b/llvm/test/CodeGen/X86/sse-intrinsics-x86.ll
index c6a9da7766f75..6e5a9cfbf4213 100644
--- a/llvm/test/CodeGen/X86/sse-intrinsics-x86.ll
+++ b/llvm/test/CodeGen/X86/sse-intrinsics-x86.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,SSE,X86-SSE
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,X86-AVX,AVX1
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,X86-AVX,AVX512
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-sse2 -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,SSE,X64-SSE
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,X64-AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,X64-AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+sse -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,X86-AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,X86-AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=-sse2 -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,X64-AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,X64-AVX,AVX512
define <4 x float> @test_x86_sse_cmp_ps(<4 x float> %a0, <4 x float> %a1) {
; SSE-LABEL: test_x86_sse_cmp_ps:
diff --git a/llvm/test/CodeGen/X86/sse-intrinsics-x86_64-upgrade.ll b/llvm/test/CodeGen/X86/sse-intrinsics-x86_64-upgrade.ll
index 30922ef5028b1..c990ebf0a9e48 100644
--- a/llvm/test/CodeGen/X86/sse-intrinsics-x86_64-upgrade.ll
+++ b/llvm/test/CodeGen/X86/sse-intrinsics-x86_64-upgrade.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=-sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512
define <4 x float> @test_x86_sse_cvtsi642ss(<4 x float> %a0, i64 %a1) {
; SSE-LABEL: test_x86_sse_cvtsi642ss:
diff --git a/llvm/test/CodeGen/X86/sse-intrinsics-x86_64.ll b/llvm/test/CodeGen/X86/sse-intrinsics-x86_64.ll
index 1d872de6edc08..c202d4129d01d 100644
--- a/llvm/test/CodeGen/X86/sse-intrinsics-x86_64.ll
+++ b/llvm/test/CodeGen/X86/sse-intrinsics-x86_64.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=-sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=-sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512
define i64 @test_x86_sse_cvtss2si64(<4 x float> %a0) {
; SSE-LABEL: test_x86_sse_cvtss2si64:
diff --git a/llvm/test/CodeGen/X86/sse-load-ret.ll b/llvm/test/CodeGen/X86/sse-load-ret.ll
index 0e9b24360e2f8..57119000ab3a2 100644
--- a/llvm/test/CodeGen/X86/sse-load-ret.ll
+++ b/llvm/test/CodeGen/X86/sse-load-ret.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
define double @test1(ptr %P) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/sse-minmax-finite.ll b/llvm/test/CodeGen/X86/sse-minmax-finite.ll
index e670dadb776ac..c31d27f8d1252 100644
--- a/llvm/test/CodeGen/X86/sse-minmax-finite.ll
+++ b/llvm/test/CodeGen/X86/sse-minmax-finite.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s
; Some of these patterns can be matched as SSE min or max. Some of
; them can be matched provided that the operands are swapped.
diff --git a/llvm/test/CodeGen/X86/sse-minmax-unsafe.ll b/llvm/test/CodeGen/X86/sse-minmax-unsafe.ll
index 8edb3d0f09cf1..24ee582dca514 100644
--- a/llvm/test/CodeGen/X86/sse-minmax-unsafe.ll
+++ b/llvm/test/CodeGen/X86/sse-minmax-unsafe.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.2 | FileCheck %s
; Some of these patterns can be matched as SSE min or max. Some of
; them can be matched provided that the operands are swapped.
diff --git a/llvm/test/CodeGen/X86/sse-minmax.ll b/llvm/test/CodeGen/X86/sse-minmax.ll
index ae8f1b06535fc..fcf34a027b4e3 100644
--- a/llvm/test/CodeGen/X86/sse-minmax.ll
+++ b/llvm/test/CodeGen/X86/sse-minmax.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=CHECK,SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=CHECK,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,SSE42
; Some of these patterns can be matched as SSE min or max. Some of
; them can be matched provided that the operands are swapped.
diff --git a/llvm/test/CodeGen/X86/sse-only.ll b/llvm/test/CodeGen/X86/sse-only.ll
index 3814865868d08..103915d979935 100644
--- a/llvm/test/CodeGen/X86/sse-only.ll
+++ b/llvm/test/CodeGen/X86/sse-only.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2,-mmx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2,-mmx | FileCheck %s
; Test that turning off mmx doesn't turn off sse
diff --git a/llvm/test/CodeGen/X86/sse-regcall.ll b/llvm/test/CodeGen/X86/sse-regcall.ll
index 03b9e123eea48..d7208f2bfd671 100644
--- a/llvm/test/CodeGen/X86/sse-regcall.ll
+++ b/llvm/test/CodeGen/X86/sse-regcall.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-pc-win32 -mattr=+sse | FileCheck --check-prefix=WIN32 %s
-; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse | FileCheck --check-prefix=WIN64 %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mattr=+sse | FileCheck --check-prefix=LINUXOSX %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-win32 -mattr=+sse | FileCheck --check-prefix=WIN32 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mattr=+sse | FileCheck --check-prefix=WIN64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mattr=+sse | FileCheck --check-prefix=LINUXOSX %s
; Test regcall when receiving/returning i1
define x86_regcallcc i1 @test_argReti1(i1 %a) {
diff --git a/llvm/test/CodeGen/X86/sse-regcall4.ll b/llvm/test/CodeGen/X86/sse-regcall4.ll
index 6f964f0a88ea3..8e46fd5845356 100644
--- a/llvm/test/CodeGen/X86/sse-regcall4.ll
+++ b/llvm/test/CodeGen/X86/sse-regcall4.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-pc-win32 -mattr=+sse | FileCheck --check-prefix=WIN32 %s
-; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+sse | FileCheck --check-prefix=WIN64 %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mattr=+sse | FileCheck --check-prefix=LINUXOSX %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-win32 -mattr=+sse | FileCheck --check-prefix=WIN32 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mattr=+sse | FileCheck --check-prefix=WIN64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mattr=+sse | FileCheck --check-prefix=LINUXOSX %s
; Test regcall when receiving/returning i1
define x86_regcallcc i1 @test_argReti1(i1 %a) {
diff --git a/llvm/test/CodeGen/X86/sse-scalar-fp-arith-unary.ll b/llvm/test/CodeGen/X86/sse-scalar-fp-arith-unary.ll
index 55b0e9522d9e6..b56b1ea213f72 100644
--- a/llvm/test/CodeGen/X86/sse-scalar-fp-arith-unary.ll
+++ b/llvm/test/CodeGen/X86/sse-scalar-fp-arith-unary.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX
; PR21507 - https://llvm.org/bugs/show_bug.cgi?id=21507
; Each function should be a single math op; no extra moves.
diff --git a/llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll b/llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll
index 325f735b09cd9..a4ad0a9386277 100644
--- a/llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll
+++ b/llvm/test/CodeGen/X86/sse-scalar-fp-arith.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,X86-SSE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,X86-SSE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X86-AVX,X86-AVX1
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,X86-AVX,X86-AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,X64-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,X64-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X64-AVX,X64-AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,X64-AVX,X64-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X86-AVX,X86-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,X86-AVX,X86-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X64-AVX,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,X64-AVX,X64-AVX512
; Ensure that the backend no longer emits unnecessary vector insert
; instructions immediately after SSE scalar fp instructions
diff --git a/llvm/test/CodeGen/X86/sse-unaligned-mem-feature.ll b/llvm/test/CodeGen/X86/sse-unaligned-mem-feature.ll
index 9bd101edec3fe..8915d3230a1ef 100644
--- a/llvm/test/CodeGen/X86/sse-unaligned-mem-feature.ll
+++ b/llvm/test/CodeGen/X86/sse-unaligned-mem-feature.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=yonah -mattr=sse-unaligned-mem < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=yonah -mattr=sse-unaligned-mem < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "i686-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/sse-varargs.ll b/llvm/test/CodeGen/X86/sse-varargs.ll
index 074a53a1ae715..cb753dc637532 100644
--- a/llvm/test/CodeGen/X86/sse-varargs.ll
+++ b/llvm/test/CodeGen/X86/sse-varargs.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
define i32 @t() nounwind {
; CHECK-LABEL: t:
; CHECK: # %bb.0: # %entry
diff --git a/llvm/test/CodeGen/X86/sse1-fcopysign.ll b/llvm/test/CodeGen/X86/sse1-fcopysign.ll
index 3f4c1b52a2a45..5d0dd6502bdea 100644
--- a/llvm/test/CodeGen/X86/sse1-fcopysign.ll
+++ b/llvm/test/CodeGen/X86/sse1-fcopysign.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=-sse2,+sse | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=-sse2,+sse | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=-sse2,+sse | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=-sse2,+sse | FileCheck %s --check-prefix=X64
define float @f32_pos(float %a, float %b) nounwind {
; X86-LABEL: f32_pos:
diff --git a/llvm/test/CodeGen/X86/sse1.ll b/llvm/test/CodeGen/X86/sse1.ll
index 5005752b06de4..0db8ee19ea628 100644
--- a/llvm/test/CodeGen/X86/sse1.ll
+++ b/llvm/test/CodeGen/X86/sse1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse -O3 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2,+sse -O3 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+sse -O3 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2,+sse -O3 | FileCheck %s --check-prefixes=CHECK,X64
; Tests for SSE1 and below, without SSE2+.
diff --git a/llvm/test/CodeGen/X86/sse2-intrinsics-canonical.ll b/llvm/test/CodeGen/X86/sse2-intrinsics-canonical.ll
index 9a8a98be61042..aa4f5e825469b 100644
--- a/llvm/test/CodeGen/X86/sse2-intrinsics-canonical.ll
+++ b/llvm/test/CodeGen/X86/sse2-intrinsics-canonical.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=-avx,+sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+avx2 -show-mc-encoding | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mcpu=skx -show-mc-encoding | FileCheck %s --check-prefix=SKX
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse2-builtins.c
diff --git a/llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel-x86_64.ll b/llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel-x86_64.ll
index 25d92f3ffa03a..07acf2987468b 100644
--- a/llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel-x86_64.ll
+++ b/llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel-x86_64.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse2-builtins.c
diff --git a/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll b/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
index 4d5725e2504fd..4cb297eaaa345 100644
--- a/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
+++ b/llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+sse2 -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86,SSE,X86-SSE
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86,AVX,AVX1,X86-AVX1
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86,AVX,AVX512,X86-AVX512
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+sse2 -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64,SSE,X64-SSE
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64,AVX,AVX1,X64-AVX1
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64,AVX,AVX512,X64-AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+sse2 -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86,SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86,AVX,AVX1,X86-AVX1
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86,AVX,AVX512,X86-AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+sse2 -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64,SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64,AVX,AVX1,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64,AVX,AVX512,X64-AVX512
define <2 x double> @test_x86_sse2_cmp_pd(<2 x double> %a0, <2 x double> %a1) {
; SSE-LABEL: test_x86_sse2_cmp_pd:
diff --git a/llvm/test/CodeGen/X86/sse2-intrinsics-x86_64-upgrade.ll b/llvm/test/CodeGen/X86/sse2-intrinsics-x86_64-upgrade.ll
index 9e51a99093bd1..7de35620d1ce2 100644
--- a/llvm/test/CodeGen/X86/sse2-intrinsics-x86_64-upgrade.ll
+++ b/llvm/test/CodeGen/X86/sse2-intrinsics-x86_64-upgrade.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512
define <2 x double> @test_x86_sse2_cvtsi642sd(<2 x double> %a0, i64 %a1) {
; SSE-LABEL: test_x86_sse2_cvtsi642sd:
diff --git a/llvm/test/CodeGen/X86/sse2-intrinsics-x86_64.ll b/llvm/test/CodeGen/X86/sse2-intrinsics-x86_64.ll
index 45b71c5c7857d..50471ee572802 100644
--- a/llvm/test/CodeGen/X86/sse2-intrinsics-x86_64.ll
+++ b/llvm/test/CodeGen/X86/sse2-intrinsics-x86_64.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -show-mc-encoding | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512
define i64 @test_x86_sse2_cvtsd2si64(<2 x double> %a0) {
; SSE-LABEL: test_x86_sse2_cvtsd2si64:
diff --git a/llvm/test/CodeGen/X86/sse3-avx-addsub-2.ll b/llvm/test/CodeGen/X86/sse3-avx-addsub-2.ll
index a88510591ceb8..bfa3bb5d95510 100644
--- a/llvm/test/CodeGen/X86/sse3-avx-addsub-2.ll
+++ b/llvm/test/CodeGen/X86/sse3-avx-addsub-2.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse3 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse3 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512
; Verify that we correctly generate 'addsub' instructions from
; a sequence of vector extracts + float add/sub + vector inserts.
diff --git a/llvm/test/CodeGen/X86/sse3-avx-addsub.ll b/llvm/test/CodeGen/X86/sse3-avx-addsub.ll
index 4b7338759f349..13608f028e291 100644
--- a/llvm/test/CodeGen/X86/sse3-avx-addsub.ll
+++ b/llvm/test/CodeGen/X86/sse3-avx-addsub.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse3 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+sse3 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512
; Test ADDSUB ISel patterns.
diff --git a/llvm/test/CodeGen/X86/sse3-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/sse3-intrinsics-fast-isel.ll
index d96669ce34561..b3840c4b2a0b6 100644
--- a/llvm/test/CodeGen/X86/sse3-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/sse3-intrinsics-fast-isel.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefixes=SSE,X86-SSE
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X86-AVX
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,X86-AVX
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefixes=SSE,X64-SSE
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X64-AVX
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,X64-AVX
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse3-builtins.c
diff --git a/llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll b/llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll
index 887e7670ecbeb..528283f26de87 100644
--- a/llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll
+++ b/llvm/test/CodeGen/X86/sse3-intrinsics-x86.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse3 -show-mc-encoding | FileCheck %s --check-prefixes=X86,SSE,X86-SSE
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=X86,AVX,X86-AVX
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=X86,AVX,X86-AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse3 -show-mc-encoding | FileCheck %s --check-prefixes=X64,SSE,X64-SSE
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=X64,AVX,X64-AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=X64,AVX,X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+sse3 -show-mc-encoding | FileCheck %s --check-prefixes=X86,SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=X86,AVX,X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=X86,AVX,X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+sse3 -show-mc-encoding | FileCheck %s --check-prefixes=X64,SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=X64,AVX,X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=X64,AVX,X64-AVX
define <2 x double> @test_x86_sse3_addsub_pd(<2 x double> %a0, <2 x double> %a1) {
; SSE-LABEL: test_x86_sse3_addsub_pd:
diff --git a/llvm/test/CodeGen/X86/sse3.ll b/llvm/test/CodeGen/X86/sse3.ll
index 1a4df9a175ffa..a04b84c179777 100644
--- a/llvm/test/CodeGen/X86/sse3.ll
+++ b/llvm/test/CodeGen/X86/sse3.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefix=X64
; These are tests for SSE3 codegen.
diff --git a/llvm/test/CodeGen/X86/sse41-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/sse41-intrinsics-fast-isel.ll
index c6f0ec493a36c..821a17222f35e 100644
--- a/llvm/test/CodeGen/X86/sse41-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/sse41-intrinsics-fast-isel.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,X86-SSE
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X86-AVX,AVX1
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,X86-AVX,AVX512
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,X64-SSE
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X64-AVX,AVX1
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,X64-AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X86-AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,X86-AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X64-AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,X64-AVX,AVX512
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse41-builtins.c
diff --git a/llvm/test/CodeGen/X86/sse41-intrinsics-x86-upgrade.ll b/llvm/test/CodeGen/X86/sse41-intrinsics-x86-upgrade.ll
index 137606b7cfeed..b9d6c35784179 100644
--- a/llvm/test/CodeGen/X86/sse41-intrinsics-x86-upgrade.ll
+++ b/llvm/test/CodeGen/X86/sse41-intrinsics-x86-upgrade.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X86-SSE
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX1,X86-AVX1
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX512,X86-AVX512
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X64-SSE
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX1,X64-AVX1
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX512,X64-AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX1,X86-AVX1
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX512,X86-AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX1,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX512,X64-AVX512
; This test works just like the non-upgrade one except that it only checks
; forms which require auto-upgrading.
diff --git a/llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll b/llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll
index 86f4fbb09e9d9..1caf74f9092d0 100644
--- a/llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll
+++ b/llvm/test/CodeGen/X86/sse41-intrinsics-x86.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X86-SSE
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX1,X86-AVX1
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX512,X86-AVX512
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X64-SSE
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX1,X64-AVX1
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX512,X64-AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX1,X86-AVX1
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX512,X86-AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX1,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX512,X64-AVX512
define <2 x double> @test_x86_sse41_blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {
; SSE-LABEL: test_x86_sse41_blendvpd:
diff --git a/llvm/test/CodeGen/X86/sse41-pmovxrm.ll b/llvm/test/CodeGen/X86/sse41-pmovxrm.ll
index 98356c55004fa..2dffafc00fc18 100644
--- a/llvm/test/CodeGen/X86/sse41-pmovxrm.ll
+++ b/llvm/test/CodeGen/X86/sse41-pmovxrm.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512vl,avx512bw | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512vl,avx512bw | FileCheck %s --check-prefix=AVX
define <8 x i16> @test_llvm_x86_sse41_pmovsxbw(ptr %a) {
; SSE41-LABEL: test_llvm_x86_sse41_pmovsxbw:
diff --git a/llvm/test/CodeGen/X86/sse42-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/sse42-intrinsics-fast-isel.ll
index 5175bed2c00fb..c560a7e73eab2 100644
--- a/llvm/test/CodeGen/X86/sse42-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/sse42-intrinsics-fast-isel.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,X86-SSE
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4.2,-crc32 | FileCheck %s --check-prefixes=SSE,X86-SSE
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X86-AVX,AVX1
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,X86-AVX,AVX512
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,X64-SSE
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,-crc32 | FileCheck %s --check-prefixes=SSE,X64-SSE
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X64-AVX,AVX1
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,X64-AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4.2,-crc32 | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X86-AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,X86-AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,-crc32 | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,X64-AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,X64-AVX,AVX512
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse42-builtins.c
diff --git a/llvm/test/CodeGen/X86/sse42-intrinsics-x86.ll b/llvm/test/CodeGen/X86/sse42-intrinsics-x86.ll
index 3baa177f548e3..69bf3b5137194 100644
--- a/llvm/test/CodeGen/X86/sse42-intrinsics-x86.ll
+++ b/llvm/test/CodeGen/X86/sse42-intrinsics-x86.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+sse4.2 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X86-SSE
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+sse4.2,-crc32 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X86-SSE
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,X86-AVX,X86-AVX1
-; RUN: llc < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,X86-AVX,X86-AVX512
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+sse4.2 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X64-SSE
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+sse4.2,-crc32 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X64-SSE
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,X64-AVX,X64-AVX1
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,X64-AVX,X64-AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+sse4.2 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+sse4.2,-crc32 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,X86-AVX,X86-AVX1
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,X86-AVX,X86-AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+sse4.2 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+sse4.2,-crc32 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,X64-AVX,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,X64-AVX,X64-AVX512
define i32 @test_x86_sse42_pcmpestri128(<16 x i8> %a0, <16 x i8> %a2) {
; SSE-LABEL: test_x86_sse42_pcmpestri128:
diff --git a/llvm/test/CodeGen/X86/sse4a-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/sse4a-intrinsics-fast-isel.ll
index d14c58821350e..1ce81b53d2ccb 100644
--- a/llvm/test/CodeGen/X86/sse4a-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/sse4a-intrinsics-fast-isel.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4a,+avx | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4a,+avx | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+sse4a,+avx | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4a | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+sse4a,+avx | FileCheck %s --check-prefixes=CHECK,X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/sse4a-builtins.c
diff --git a/llvm/test/CodeGen/X86/sse4a-upgrade.ll b/llvm/test/CodeGen/X86/sse4a-upgrade.ll
index 3befbbf031cf7..2a9725c3a71bb 100644
--- a/llvm/test/CodeGen/X86/sse4a-upgrade.ll
+++ b/llvm/test/CodeGen/X86/sse4a-upgrade.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4a -show-mc-encoding | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4a,+avx -show-mc-encoding | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a -show-mc-encoding | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a,+avx -show-mc-encoding | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+sse4a -show-mc-encoding | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+sse4a,+avx -show-mc-encoding | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a -show-mc-encoding | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a,+avx -show-mc-encoding | FileCheck %s --check-prefixes=X64
define void @test_movntss(ptr %p, <4 x float> %a) nounwind optsize ssp {
; X86-LABEL: test_movntss:
diff --git a/llvm/test/CodeGen/X86/sse4a.ll b/llvm/test/CodeGen/X86/sse4a.ll
index 2777b29d39902..c4b9f78374358 100644
--- a/llvm/test/CodeGen/X86/sse4a.ll
+++ b/llvm/test/CodeGen/X86/sse4a.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4a -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86-SSE
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4a,+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a,+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+sse4a -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+sse4a,+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4a,+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,X64-AVX
define <2 x i64> @test_extrqi(<2 x i64> %x) nounwind uwtable ssp {
; CHECK-LABEL: test_extrqi:
diff --git a/llvm/test/CodeGen/X86/sse_partial_update.ll b/llvm/test/CodeGen/X86/sse_partial_update.ll
index 37e0621ad7ca0..29ba639abfec4 100644
--- a/llvm/test/CodeGen/X86/sse_partial_update.ll
+++ b/llvm/test/CodeGen/X86/sse_partial_update.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+sse2 -mcpu=nehalem | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx -mattr=+sse2 -mcpu=nehalem | FileCheck %s
; rdar: 12558838
; PR14221
diff --git a/llvm/test/CodeGen/X86/sse_reload_fold.ll b/llvm/test/CodeGen/X86/sse_reload_fold.ll
index fd8db3be10639..44e23f6d65393 100644
--- a/llvm/test/CodeGen/X86/sse_reload_fold.ll
+++ b/llvm/test/CodeGen/X86/sse_reload_fold.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+64bit,+sse3 -print-failed-fuse-candidates -regalloc=basic 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+64bit,+sse3 -print-failed-fuse-candidates -regalloc=basic 2>&1 | FileCheck %s
; CHECK: fail
; CHECK-NOT: fail
diff --git a/llvm/test/CodeGen/X86/ssp-data-layout.ll b/llvm/test/CodeGen/X86/ssp-data-layout.ll
index bda2598384db8..69878dccb6741 100644
--- a/llvm/test/CodeGen/X86/ssp-data-layout.ll
+++ b/llvm/test/CodeGen/X86/ssp-data-layout.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -stack-symbol-ordering=0 -frame-pointer=all -mtriple=x86_64-pc-linux-gnu -mcpu=corei7 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -stack-symbol-ordering=0 -frame-pointer=all -mtriple=x86_64-pc-linux-gnu -mcpu=corei7 -o - | FileCheck %s
; This test is fairly fragile. The goal is to ensure that "large" stack
; objects are allocated closest to the stack protector (i.e., farthest away
; from the Stack Pointer.) In standard SSP mode this means that large (>=
@@ -11,7 +11,7 @@
; and that the groups have the correct relative stack offset. The ordering
; within a group is not relevant to this test. Unfortunately, there is not
; an elegant way to do this, so just match the offset for each object.
-; RUN: llc < %s -frame-pointer=all -mtriple=x86_64-unknown-unknown -O0 -mcpu=corei7 -o - \
+; RUN: llc -combiner-topological-sorting < %s -frame-pointer=all -mtriple=x86_64-unknown-unknown -O0 -mcpu=corei7 -o - \
; RUN: | FileCheck --check-prefix=FAST-NON-LIN %s
; FastISel was not setting the StackProtectorIndex when lowering
; Intrinsic::stackprotector and as a result the stack re-arrangement code was
diff --git a/llvm/test/CodeGen/X86/ssp-guard-spill.ll b/llvm/test/CodeGen/X86/ssp-guard-spill.ll
index 0f25b2b7f2a2c..470966d8cdfaf 100644
--- a/llvm/test/CodeGen/X86/ssp-guard-spill.ll
+++ b/llvm/test/CodeGen/X86/ssp-guard-spill.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target triple = "x86_64-apple-macosx10.4.0"
; __stack_chk_guard must be loaded for twice, once for setting up the canary,
diff --git a/llvm/test/CodeGen/X86/ssse3-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/ssse3-intrinsics-fast-isel.ll
index 1dd21c644140a..8d6debb02c7d2 100644
--- a/llvm/test/CodeGen/X86/ssse3-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/ssse3-intrinsics-fast-isel.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i386-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl | FileCheck %s --check-prefix=AVX
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/ssse3-builtins.c
diff --git a/llvm/test/CodeGen/X86/ssse3-intrinsics-x86-upgrade.ll b/llvm/test/CodeGen/X86/ssse3-intrinsics-x86-upgrade.ll
index 20d7ee573a7d4..940873ab54822 100644
--- a/llvm/test/CodeGen/X86/ssse3-intrinsics-x86-upgrade.ll
+++ b/llvm/test/CodeGen/X86/ssse3-intrinsics-x86-upgrade.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+ssse3 -show-mc-encoding | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+ssse3 -show-mc-encoding | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+ssse3 -show-mc-encoding | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+ssse3 -show-mc-encoding | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=AVX512
define <16 x i8> @test_x86_ssse3_pabs_b_128(<16 x i8> %a0) {
; SSE-LABEL: test_x86_ssse3_pabs_b_128:
diff --git a/llvm/test/CodeGen/X86/ssse3-intrinsics-x86.ll b/llvm/test/CodeGen/X86/ssse3-intrinsics-x86.ll
index afdb08015825d..ffd0a48bd33aa 100644
--- a/llvm/test/CodeGen/X86/ssse3-intrinsics-x86.ll
+++ b/llvm/test/CodeGen/X86/ssse3-intrinsics-x86.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+ssse3 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X86-SSE
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX1,X86-AVX1
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX512,X86-AVX512
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+ssse3 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X64-SSE
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX1,X64-AVX1
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX512,X64-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+ssse3 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX1,X86-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX512,X86-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+ssse3 -show-mc-encoding | FileCheck %s --check-prefixes=SSE,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX1,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=AVX,AVX512,X64-AVX512
define <4 x i32> @test_x86_ssse3_phadd_d_128(<4 x i32> %a0, <4 x i32> %a1) {
; SSE-LABEL: test_x86_ssse3_phadd_d_128:
diff --git a/llvm/test/CodeGen/X86/ssub_sat.ll b/llvm/test/CodeGen/X86/ssub_sat.ll
index 8ecc8b39ac468..f1598db42e3c1 100644
--- a/llvm/test/CodeGen/X86/ssub_sat.ll
+++ b/llvm/test/CodeGen/X86/ssub_sat.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
declare i4 @llvm.ssub.sat.i4(i4, i4)
declare i8 @llvm.ssub.sat.i8(i8, i8)
diff --git a/llvm/test/CodeGen/X86/ssub_sat_plus.ll b/llvm/test/CodeGen/X86/ssub_sat_plus.ll
index 5baf7a1dac74c..911cca69c9f89 100644
--- a/llvm/test/CodeGen/X86/ssub_sat_plus.ll
+++ b/llvm/test/CodeGen/X86/ssub_sat_plus.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
declare i4 @llvm.ssub.sat.i4(i4, i4)
declare i8 @llvm.ssub.sat.i8(i8, i8)
diff --git a/llvm/test/CodeGen/X86/ssub_sat_vec.ll b/llvm/test/CodeGen/X86/ssub_sat_vec.ll
index eb2a1f196774c..67fda2299a13a 100644
--- a/llvm/test/CodeGen/X86/ssub_sat_vec.ll
+++ b/llvm/test/CodeGen/X86/ssub_sat_vec.ll
@@ -1,13 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
declare <1 x i8> @llvm.ssub.sat.v1i8(<1 x i8>, <1 x i8>)
declare <2 x i8> @llvm.ssub.sat.v2i8(<2 x i8>, <2 x i8>)
diff --git a/llvm/test/CodeGen/X86/stack-align-memcpy.ll b/llvm/test/CodeGen/X86/stack-align-memcpy.ll
index 7eb1f7980bf62..4f986ad869740 100644
--- a/llvm/test/CodeGen/X86/stack-align-memcpy.ll
+++ b/llvm/test/CodeGen/X86/stack-align-memcpy.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -stackrealign -mtriple i386-apple-darwin -mcpu=i486 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -stackrealign -mtriple i386-apple-darwin -mcpu=i486 | FileCheck %s
%struct.foo = type { [88 x i8] }
diff --git a/llvm/test/CodeGen/X86/stack-align.ll b/llvm/test/CodeGen/X86/stack-align.ll
index 334a81787b84b..fa85232a5a385 100644
--- a/llvm/test/CodeGen/X86/stack-align.ll
+++ b/llvm/test/CodeGen/X86/stack-align.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --no_x86_scrub_mem_shuffle --version 6
-; RUN: llc < %s -relocation-model=static -mcpu=yonah | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=static -mcpu=yonah | FileCheck %s
; The double argument is at 4(esp) which is 16-byte aligned, but we
; are required to read in extra bytes of memory in order to fold the
diff --git a/llvm/test/CodeGen/X86/stack-align2.ll b/llvm/test/CodeGen/X86/stack-align2.ll
index 5d1d32225c2cb..1006cc8d6828a 100644
--- a/llvm/test/CodeGen/X86/stack-align2.ll
+++ b/llvm/test/CodeGen/X86/stack-align2.ll
@@ -1,15 +1,15 @@
-; RUN: llc < %s -mcpu=generic -mtriple=i386-linux | FileCheck %s -check-prefix=LINUX-I386
-; RUN: llc < %s -mcpu=generic -mtriple=i386-kfreebsd | FileCheck %s -check-prefix=KFREEBSD-I386
-; RUN: llc < %s -mcpu=generic -mtriple=i386-hurd | FileCheck %s -check-prefix=HURD-I386
-; RUN: llc < %s -mcpu=generic -mtriple=i386-netbsd | FileCheck %s -check-prefix=NETBSD-I386
-; RUN: llc < %s -mcpu=generic -mtriple=i686-apple-darwin8 | FileCheck %s -check-prefix=DARWIN-I386
-; RUN: llc < %s -mcpu=generic -mtriple=i386-pc-solaris2.11 | FileCheck %s -check-prefix=SOLARIS-I386
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s -check-prefix=LINUX-X86_64
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-kfreebsd | FileCheck %s -check-prefix=KFREEBSD-X86_64
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-hurd | FileCheck %s -check-prefix=HURD-X86_64
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-netbsd | FileCheck %s -check-prefix=NETBSD-X86_64
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-apple-darwin8 | FileCheck %s -check-prefix=DARWIN-X86_64
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-solaris2.11 | FileCheck %s -check-prefix=SOLARIS-X86_64
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i386-linux | FileCheck %s -check-prefix=LINUX-I386
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i386-kfreebsd | FileCheck %s -check-prefix=KFREEBSD-I386
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i386-hurd | FileCheck %s -check-prefix=HURD-I386
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i386-netbsd | FileCheck %s -check-prefix=NETBSD-I386
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-apple-darwin8 | FileCheck %s -check-prefix=DARWIN-I386
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i386-pc-solaris2.11 | FileCheck %s -check-prefix=SOLARIS-I386
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s -check-prefix=LINUX-X86_64
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-kfreebsd | FileCheck %s -check-prefix=KFREEBSD-X86_64
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-hurd | FileCheck %s -check-prefix=HURD-X86_64
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-netbsd | FileCheck %s -check-prefix=NETBSD-X86_64
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-apple-darwin8 | FileCheck %s -check-prefix=DARWIN-X86_64
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-pc-solaris2.11 | FileCheck %s -check-prefix=SOLARIS-X86_64
define i32 @test() nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll b/llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll
index b7d1b593d1ab6..9825d463d1c62 100644
--- a/llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll
+++ b/llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc -mtriple=x86_64-linux-android < %s | FileCheck -check-prefix=CHECK-X86-64 %s
-; RUN: llc -mtriple=i686-linux-android < %s | FileCheck -check-prefix=CHECK-X86-32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-android < %s | FileCheck -check-prefix=CHECK-X86-64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-android < %s | FileCheck -check-prefix=CHECK-X86-32 %s
define i32 @foo(i32 %n) local_unnamed_addr #0 {
; CHECK-X86-64-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/stack-clash-extra-huge.ll b/llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
index 4c8bb62e87dcd..4b9c8414aa455 100644
--- a/llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
+++ b/llvm/test/CodeGen/X86/stack-clash-extra-huge.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc -mtriple=x86_64-linux-android -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X64 %s
-; RUN: llc -mtriple=i686-linux-android -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X86 %s
-; RUN: llc -mtriple=x86_64-linux-gnux32 -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-android -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-android -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X86 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnux32 -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X32 %s
define i32 @foo() local_unnamed_addr #0 {
; CHECK-X64-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/stack-clash-huge.ll b/llvm/test/CodeGen/X86/stack-clash-huge.ll
index 0e8c2155c6501..a27dd7f39a786 100644
--- a/llvm/test/CodeGen/X86/stack-clash-huge.ll
+++ b/llvm/test/CodeGen/X86/stack-clash-huge.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc -mtriple=x86_64-linux-android -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X64 %s
-; RUN: llc -mtriple=i686-linux-android -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X86 %s
-; RUN: llc -mtriple=x86_64-linux-gnux32 -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-android -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-android -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X86 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnux32 -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-X32 %s
define i32 @foo() local_unnamed_addr #0 {
; CHECK-X64-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/stack-clash-large-large-align.ll b/llvm/test/CodeGen/X86/stack-clash-large-large-align.ll
index 83297cfb6280a..bb61a9ba9df2b 100644
--- a/llvm/test/CodeGen/X86/stack-clash-large-large-align.ll
+++ b/llvm/test/CodeGen/X86/stack-clash-large-large-align.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/stack-clash-large.ll b/llvm/test/CodeGen/X86/stack-clash-large.ll
index b5b9ce95a46ba..f41eb8948dfea 100644
--- a/llvm/test/CodeGen/X86/stack-clash-large.ll
+++ b/llvm/test/CodeGen/X86/stack-clash-large.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc -mtriple=x86_64-linux-android < %s | FileCheck -check-prefix=CHECK-X64 %s
-; RUN: llc -mtriple=i686-linux-android < %s | FileCheck -check-prefix=CHECK-X86 %s
-; RUN: llc -mtriple=x86_64-linux-gnux32 < %s | FileCheck -check-prefix=CHECK-X32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-android < %s | FileCheck -check-prefix=CHECK-X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-android < %s | FileCheck -check-prefix=CHECK-X86 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnux32 < %s | FileCheck -check-prefix=CHECK-X32 %s
define i32 @foo() local_unnamed_addr #0 {
; CHECK-X64-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/stack-clash-medium-natural-probes-mutliple-objects.ll b/llvm/test/CodeGen/X86/stack-clash-medium-natural-probes-mutliple-objects.ll
index 1de3431b3a0e1..ecb3c391da334 100644
--- a/llvm/test/CodeGen/X86/stack-clash-medium-natural-probes-mutliple-objects.ll
+++ b/llvm/test/CodeGen/X86/stack-clash-medium-natural-probes-mutliple-objects.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/stack-clash-medium-natural-probes.ll b/llvm/test/CodeGen/X86/stack-clash-medium-natural-probes.ll
index 9c60238a0bea8..3d2fb9eb32806 100644
--- a/llvm/test/CodeGen/X86/stack-clash-medium-natural-probes.ll
+++ b/llvm/test/CodeGen/X86/stack-clash-medium-natural-probes.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/stack-clash-medium.ll b/llvm/test/CodeGen/X86/stack-clash-medium.ll
index 406002626210d..145c372141e3a 100644
--- a/llvm/test/CodeGen/X86/stack-clash-medium.ll
+++ b/llvm/test/CodeGen/X86/stack-clash-medium.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc -mtriple=x86_64-linux-android < %s | FileCheck -check-prefix=CHECK-X86-64 %s
-; RUN: llc -mtriple=i686-linux-android < %s | FileCheck -check-prefix=CHECK-X86-32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-android < %s | FileCheck -check-prefix=CHECK-X86-64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-android < %s | FileCheck -check-prefix=CHECK-X86-32 %s
define i32 @foo() local_unnamed_addr #0 {
; CHECK-X86-64-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/stack-clash-small-alloc-medium-align.ll b/llvm/test/CodeGen/X86/stack-clash-small-alloc-medium-align.ll
index ccf7e1d56da90..1c2bc90f5ea82 100644
--- a/llvm/test/CodeGen/X86/stack-clash-small-alloc-medium-align.ll
+++ b/llvm/test/CodeGen/X86/stack-clash-small-alloc-medium-align.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/stack-clash-small-large-align.ll b/llvm/test/CodeGen/X86/stack-clash-small-large-align.ll
index 5f02e9e0e0b4e..d1551b7180f41 100644
--- a/llvm/test/CodeGen/X86/stack-clash-small-large-align.ll
+++ b/llvm/test/CodeGen/X86/stack-clash-small-large-align.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/stack-clash-small.ll b/llvm/test/CodeGen/X86/stack-clash-small.ll
index 1c726dbb69454..d1854376825b0 100644
--- a/llvm/test/CodeGen/X86/stack-clash-small.ll
+++ b/llvm/test/CodeGen/X86/stack-clash-small.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/stack-clash-unknown-call.ll b/llvm/test/CodeGen/X86/stack-clash-unknown-call.ll
index 2224f91605206..facaf41a72c31 100644
--- a/llvm/test/CodeGen/X86/stack-clash-unknown-call.ll
+++ b/llvm/test/CodeGen/X86/stack-clash-unknown-call.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/stack-coloring-wineh.ll b/llvm/test/CodeGen/X86/stack-coloring-wineh.ll
index 74fe07e88aa33..794a15c22fa37 100644
--- a/llvm/test/CodeGen/X86/stack-coloring-wineh.ll
+++ b/llvm/test/CodeGen/X86/stack-coloring-wineh.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
-; RUN: llc -mtriple=i686-windows-msvc < %s | FileCheck %s --check-prefix=I686
-; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X86_64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-windows-msvc < %s | FileCheck %s --check-prefix=I686
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X86_64
@type_info = external global ptr
diff --git a/llvm/test/CodeGen/X86/stack-folding-adx-x86_64.ll b/llvm/test/CodeGen/X86/stack-folding-adx-x86_64.ll
index 83b98e6805d01..2c08b132fbfbd 100644
--- a/llvm/test/CodeGen/X86/stack-folding-adx-x86_64.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-adx-x86_64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+adx < %s | FileCheck %s --check-prefix=CHECK
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=-adx < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+adx < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=-adx < %s | FileCheck %s --check-prefix=CHECK
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-avx512bf16.ll b/llvm/test/CodeGen/X86/stack-folding-avx512bf16.ll
index 349f70ef43654..ee51a49a7e6f3 100644
--- a/llvm/test/CodeGen/X86/stack-folding-avx512bf16.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-avx512bf16.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16,+avx512vl < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512bf16,+avx512vl < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-avx512vp2intersect.ll b/llvm/test/CodeGen/X86/stack-folding-avx512vp2intersect.ll
index e2057a293255b..f3d880f6828c7 100644
--- a/llvm/test/CodeGen/X86/stack-folding-avx512vp2intersect.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-avx512vp2intersect.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vp2intersect,+avx512vl < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vp2intersect,+avx512vl < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-bmi.ll b/llvm/test/CodeGen/X86/stack-folding-bmi.ll
index 569482f165d08..8765ffeace1cc 100644
--- a/llvm/test/CodeGen/X86/stack-folding-bmi.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-bmi.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+bmi < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+bmi < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-bmi2.ll b/llvm/test/CodeGen/X86/stack-folding-bmi2.ll
index ce2f99ca81c1d..f127a0a89784e 100644
--- a/llvm/test/CodeGen/X86/stack-folding-bmi2.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-bmi2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll b/llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
index d7c9438c92ac4..d139f4dc42388 100644
--- a/llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-fp-avx1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -verify-machineinstrs -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -verify-machineinstrs -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-fp-avx512.ll b/llvm/test/CodeGen/X86/stack-folding-fp-avx512.ll
index 0b91e3d7e2073..f13889964634f 100644
--- a/llvm/test/CodeGen/X86/stack-folding-fp-avx512.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-fp-avx512.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512dq < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16-fma.ll b/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16-fma.ll
index 1e1a8a6186368..3f89ea9274425 100644
--- a/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16-fma.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16-fma.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll b/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
index 6a83a3f048997..ed11ab5a2413c 100644
--- a/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl-fma.ll b/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl-fma.ll
index 77aa875ddb38d..3c6681a6b20e6 100644
--- a/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl-fma.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl-fma.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl.ll b/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl.ll
index cd06f2d054af2..7db24d9733eb2 100644
--- a/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512fp16 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512fp16 < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-fp-avx512vl.ll b/llvm/test/CodeGen/X86/stack-folding-fp-avx512vl.ll
index bd56e619ee70b..4ae8bda280a0d 100644
--- a/llvm/test/CodeGen/X86/stack-folding-fp-avx512vl.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-fp-avx512vl.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-fp-sse42.ll b/llvm/test/CodeGen/X86/stack-folding-fp-sse42.ll
index 9bc9a9c94bc4f..8ef9cde93a043 100644
--- a/llvm/test/CodeGen/X86/stack-folding-fp-sse42.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-fp-sse42.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -verify-machineinstrs -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -verify-machineinstrs -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-int-avx512.ll b/llvm/test/CodeGen/X86/stack-folding-int-avx512.ll
index e826306fd533c..fe42ad9dbd1e0 100644
--- a/llvm/test/CodeGen/X86/stack-folding-int-avx512.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-int-avx512.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vbmi,+avx512cd,+avx512vpopcntdq,+avx512vnni < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vbmi,+avx512cd,+avx512vpopcntdq,+avx512vnni < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-int-avx512ifma.ll b/llvm/test/CodeGen/X86/stack-folding-int-avx512ifma.ll
index a1c8c3534e0cd..da271ab6c5647 100644
--- a/llvm/test/CodeGen/X86/stack-folding-int-avx512ifma.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-int-avx512ifma.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl < %s | FileCheck %s
declare <8 x i64> @llvm.x86.avx512.vpmadd52h.uq.512(<8 x i64>, <8 x i64>, <8 x i64>)
declare <8 x i64> @llvm.x86.avx512.vpmadd52l.uq.512(<8 x i64>, <8 x i64>, <8 x i64>)
diff --git a/llvm/test/CodeGen/X86/stack-folding-int-avx512vnni.ll b/llvm/test/CodeGen/X86/stack-folding-int-avx512vnni.ll
index cc529c3fad23c..595f2e6d0a406 100644
--- a/llvm/test/CodeGen/X86/stack-folding-int-avx512vnni.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-int-avx512vnni.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vbmi,+avx512cd,+avx512vpopcntdq,+avx512vnni < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vbmi,+avx512cd,+avx512vpopcntdq,+avx512vnni < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-int-avxifma.ll b/llvm/test/CodeGen/X86/stack-folding-int-avxifma.ll
index 95d21a4d981cc..b2b637f7b3728 100644
--- a/llvm/test/CodeGen/X86/stack-folding-int-avxifma.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-int-avxifma.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avxifma < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avxifma < %s | FileCheck %s
declare <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64>, <2 x i64>, <2 x i64>)
declare <4 x i64> @llvm.x86.avx512.vpmadd52h.uq.256(<4 x i64>, <4 x i64>, <4 x i64>)
diff --git a/llvm/test/CodeGen/X86/stack-folding-int-avxvnni.ll b/llvm/test/CodeGen/X86/stack-folding-int-avxvnni.ll
index 345fa0efa42df..a17bcd1c60add 100644
--- a/llvm/test/CodeGen/X86/stack-folding-int-avxvnni.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-int-avxvnni.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avxvnni < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avxvnni < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-int-avxvnniint16.ll b/llvm/test/CodeGen/X86/stack-folding-int-avxvnniint16.ll
index 47537c8c4fb6e..239eb83c71322 100644
--- a/llvm/test/CodeGen/X86/stack-folding-int-avxvnniint16.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-int-avxvnniint16.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O3 -disable-peephole -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avxvnniint16 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O3 -disable-peephole -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+avxvnniint16 | FileCheck %s
declare <4 x i32> @llvm.x86.avx2.vpdpwsud.128(<4 x i32> %A, <8 x i16> %B, <8 x i16> %C)
declare <8 x i32> @llvm.x86.avx2.vpdpwsud.256(<8 x i32> %A, <16 x i16> %B, <16 x i16> %C)
diff --git a/llvm/test/CodeGen/X86/stack-folding-int-avxvnniint8.ll b/llvm/test/CodeGen/X86/stack-folding-int-avxvnniint8.ll
index a49d3a552f556..898cc134af2b9 100644
--- a/llvm/test/CodeGen/X86/stack-folding-int-avxvnniint8.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-int-avxvnniint8.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avxvnniint8 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avxvnniint8 < %s | FileCheck %s
declare <4 x i32> @llvm.x86.avx2.vpdpbssd.128(<4 x i32>, <16 x i8>, <16 x i8>)
declare <4 x i32> @llvm.x86.avx2.vpdpbssds.128(<4 x i32>, <16 x i8>, <16 x i8>)
diff --git a/llvm/test/CodeGen/X86/stack-folding-lwp.ll b/llvm/test/CodeGen/X86/stack-folding-lwp.ll
index 355679d233ebf..f08f4d1c5212d 100644
--- a/llvm/test/CodeGen/X86/stack-folding-lwp.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-lwp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+lwp < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+lwp < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-mmx.ll b/llvm/test/CodeGen/X86/stack-folding-mmx.ll
index 6eb99dd6c6758..5a025f76ab0f2 100644
--- a/llvm/test/CodeGen/X86/stack-folding-mmx.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-mmx.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+ssse3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+mmx,+ssse3 | FileCheck %s
define <1 x i64> @stack_fold_cvtpd2pi(<2 x double> %a0) {
; CHECK-LABEL: stack_fold_cvtpd2pi:
diff --git a/llvm/test/CodeGen/X86/stack-folding-sha.ll b/llvm/test/CodeGen/X86/stack-folding-sha.ll
index 43333a39a5c43..96391a5d1d7a6 100644
--- a/llvm/test/CodeGen/X86/stack-folding-sha.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-sha.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sha < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sha < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-tbm.ll b/llvm/test/CodeGen/X86/stack-folding-tbm.ll
index c44786658b21d..e8f6e0ae1fcb7 100644
--- a/llvm/test/CodeGen/X86/stack-folding-tbm.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-tbm.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+bmi,+tbm < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+bmi,+tbm < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-x86_64.ll b/llvm/test/CodeGen/X86/stack-folding-x86_64.ll
index c505f4ba8f77c..e049c5fb772b5 100644
--- a/llvm/test/CodeGen/X86/stack-folding-x86_64.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-x86_64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-folding-xop.ll b/llvm/test/CodeGen/X86/stack-folding-xop.ll
index b5b1581f4db7e..382728884df8c 100644
--- a/llvm/test/CodeGen/X86/stack-folding-xop.ll
+++ b/llvm/test/CodeGen/X86/stack-folding-xop.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/stack-frame-layout-remarks.ll b/llvm/test/CodeGen/X86/stack-frame-layout-remarks.ll
index cfc493af66709..4f8aae2498432 100644
--- a/llvm/test/CodeGen/X86/stack-frame-layout-remarks.ll
+++ b/llvm/test/CodeGen/X86/stack-frame-layout-remarks.ll
@@ -1,16 +1,16 @@
; Test remark output for stack-frame-layout
; ensure basic output works
-; RUN: llc -mcpu=corei7 -O1 -pass-remarks-analysis=stack-frame-layout < %s 2>&1 >/dev/null | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -O1 -pass-remarks-analysis=stack-frame-layout < %s 2>&1 >/dev/null | FileCheck %s
; check additional slots are displayed when stack is not optimized
-; RUN: llc -mcpu=corei7 -O0 -pass-remarks-analysis=stack-frame-layout < %s 2>&1 >/dev/null | FileCheck %s --check-prefix=NO_COLORING
+; RUN: llc -combiner-topological-sorting -mcpu=corei7 -O0 -pass-remarks-analysis=stack-frame-layout < %s 2>&1 >/dev/null | FileCheck %s --check-prefix=NO_COLORING
; check more complex cases
-; RUN: llc %s -pass-remarks-analysis=stack-frame-layout -o /dev/null -mtriple=i686-unknown-linux 2>&1 | FileCheck %s --check-prefix=BOTH --check-prefix=DEBUG
+; RUN: llc -combiner-topological-sorting %s -pass-remarks-analysis=stack-frame-layout -o /dev/null -mtriple=i686-unknown-linux 2>&1 | FileCheck %s --check-prefix=BOTH --check-prefix=DEBUG
; check output without debug info
-; RUN: opt %s -passes=strip -S | llc -pass-remarks-analysis=stack-frame-layout -o /dev/null -mtriple=i686-unknown-linux 2>&1 | FileCheck %s --check-prefix=BOTH --check-prefix=STRIPPED
+; RUN: opt %s -passes=strip -S | llc -combiner-topological-sorting -pass-remarks-analysis=stack-frame-layout -o /dev/null -mtriple=i686-unknown-linux 2>&1 | FileCheck %s --check-prefix=BOTH --check-prefix=STRIPPED
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/stack-guard-memloc-vararg.ll b/llvm/test/CodeGen/X86/stack-guard-memloc-vararg.ll
index d18353a89126c..62d85281ef35b 100644
--- a/llvm/test/CodeGen/X86/stack-guard-memloc-vararg.ll
+++ b/llvm/test/CodeGen/X86/stack-guard-memloc-vararg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64 -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -O0 < %s | FileCheck %s
; Check that we don't crash on this input.
; CHECK-LABEL: @foo
diff --git a/llvm/test/CodeGen/X86/stack-guard-oob.ll b/llvm/test/CodeGen/X86/stack-guard-oob.ll
index 5b7ae832315b3..f252c7bc2efa6 100644
--- a/llvm/test/CodeGen/X86/stack-guard-oob.ll
+++ b/llvm/test/CodeGen/X86/stack-guard-oob.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i686 -O0 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64 -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686 -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -O0 < %s | FileCheck %s
; CHECK-LABEL: in_bounds:
; CHECK-NOT: __stack_chk_guard
diff --git a/llvm/test/CodeGen/X86/stack-probe-red-zone.ll b/llvm/test/CodeGen/X86/stack-probe-red-zone.ll
index fff44a07ca7d0..ab2e61e01565a 100644
--- a/llvm/test/CodeGen/X86/stack-probe-red-zone.ll
+++ b/llvm/test/CodeGen/X86/stack-probe-red-zone.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux-gnu < %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu < %s -o - | FileCheck %s
; Ensure that red zone usage occurs.
define signext i8 @testStackProbesOff() {
diff --git a/llvm/test/CodeGen/X86/stack-probe-size.ll b/llvm/test/CodeGen/X86/stack-probe-size.ll
index 4d1f88d111726..4776f775bdd60 100644
--- a/llvm/test/CodeGen/X86/stack-probe-size.ll
+++ b/llvm/test/CodeGen/X86/stack-probe-size.ll
@@ -6,7 +6,7 @@
; stack probe size equals the page size (4096 bytes for all x86 targets), and
; this is unlikely to change in the future.
;
-; RUN: llc -mtriple=i686-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-windows-msvc < %s | FileCheck %s
target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32"
diff --git a/llvm/test/CodeGen/X86/stack-probes.ll b/llvm/test/CodeGen/X86/stack-probes.ll
index cbe9c9d9975ef..02b4671858ba2 100644
--- a/llvm/test/CodeGen/X86/stack-probes.ll
+++ b/llvm/test/CodeGen/X86/stack-probes.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=i386-pc-linux-gnu < %s -o - | FileCheck --check-prefix=X86-LINUX %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu < %s -o - | FileCheck --check-prefix=X64-LINUX %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -code-model=large < %s -o - | FileCheck --check-prefix=X64-LINUX-LARGE %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-linux-gnu < %s -o - | FileCheck --check-prefix=X86-LINUX %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu < %s -o - | FileCheck --check-prefix=X64-LINUX %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -code-model=large < %s -o - | FileCheck --check-prefix=X64-LINUX-LARGE %s
declare void @use(ptr)
diff --git a/llvm/test/CodeGen/X86/stack-protector-2.ll b/llvm/test/CodeGen/X86/stack-protector-2.ll
index bd69981714757..8450a69f08698 100644
--- a/llvm/test/CodeGen/X86/stack-protector-2.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -start-before=stack-protector \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -start-before=stack-protector \
; RUN: -stop-after=stack-protector -o - < %s | FileCheck %s
; Bugs 42238/43308: Test some additional situations not caught previously.
diff --git a/llvm/test/CodeGen/X86/stack-protector-3.ll b/llvm/test/CodeGen/X86/stack-protector-3.ll
index 8ca6a566f6dca..6f464be0fa70f 100644
--- a/llvm/test/CodeGen/X86/stack-protector-3.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-3.ll
@@ -9,16 +9,16 @@
; RUN: cat %t/main.ll %t/h.ll > %t/h2.ll
; RUN: cat %t/existedGV.ll %t/main.ll %t/h.ll > %t/h3.ll
; RUN: cat %t/main.ll %t/i.ll > %t/i2.ll
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -o - < %t/a2.ll | FileCheck --check-prefix=CHECK-TLS-FS-40 %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -o - < %t/b2.ll | FileCheck --check-prefix=CHECK-TLS-FS-40 %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -o - < %t/c2.ll | FileCheck --check-prefix=CHECK-GLOBAL %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -o - < %t/d2.ll | FileCheck --check-prefix=CHECK-TLS-FS-40 %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -o - < %t/e2.ll | FileCheck --check-prefix=CHECK-GS %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -o - < %t/f2.ll | FileCheck --check-prefix=CHECK-OFFSET %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -o - < %t/g2.ll | FileCheck --check-prefix=CHECK-NEGATIVE-OFFSET %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -o - < %t/h2.ll | FileCheck --check-prefix=CHECK-SYM %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -o - < %t/h3.ll | FileCheck --check-prefix=CHECK-SYMGV %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -o - < %t/i2.ll | FileCheck --check-prefix=CHECK-SYM2 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -o - < %t/a2.ll | FileCheck --check-prefix=CHECK-TLS-FS-40 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -o - < %t/b2.ll | FileCheck --check-prefix=CHECK-TLS-FS-40 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -o - < %t/c2.ll | FileCheck --check-prefix=CHECK-GLOBAL %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -o - < %t/d2.ll | FileCheck --check-prefix=CHECK-TLS-FS-40 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -o - < %t/e2.ll | FileCheck --check-prefix=CHECK-GS %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -o - < %t/f2.ll | FileCheck --check-prefix=CHECK-OFFSET %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -o - < %t/g2.ll | FileCheck --check-prefix=CHECK-NEGATIVE-OFFSET %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -o - < %t/h2.ll | FileCheck --check-prefix=CHECK-SYM %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -o - < %t/h3.ll | FileCheck --check-prefix=CHECK-SYMGV %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -o - < %t/i2.ll | FileCheck --check-prefix=CHECK-SYM2 %s
; CHECK-TLS-FS-40: movq %fs:40, %rax
; CHECK-TLS-FS-40: movq %fs:40, %rax
diff --git a/llvm/test/CodeGen/X86/stack-protector-dbginfo.ll b/llvm/test/CodeGen/X86/stack-protector-dbginfo.ll
index 27ca9fd47e085..e65b2d0c7cd45 100644
--- a/llvm/test/CodeGen/X86/stack-protector-dbginfo.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-dbginfo.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-apple-darwin < %s -o -
-; RUN: llc -mtriple=x86_64-pc-linux-gnu < %s -o - | FileCheck --check-prefix=IGNORE_INTRIN %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin < %s -o -
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu < %s -o - | FileCheck --check-prefix=IGNORE_INTRIN %s
; PR16954
;
diff --git a/llvm/test/CodeGen/X86/stack-protector-msvc-oz.ll b/llvm/test/CodeGen/X86/stack-protector-msvc-oz.ll
index 4ab23cdde74c6..03467848b9bb9 100644
--- a/llvm/test/CodeGen/X86/stack-protector-msvc-oz.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-msvc-oz.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=i386-pc-windows-msvc < %s -o - | FileCheck -check-prefix=MSVC-X86 %s
-; RUN: llc -mtriple=x86_64-pc-windows-msvc < %s -o - | FileCheck -check-prefix=MSVC-X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-windows-msvc < %s -o - | FileCheck -check-prefix=MSVC-X86 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc < %s -o - | FileCheck -check-prefix=MSVC-X64 %s
; Make sure fastisel falls back and does something secure.
-; RUN: llc -mtriple=i686-pc-windows-msvc -O0 < %s -o - | FileCheck -check-prefix=MSVC-X86-O0 %s
-; RUN: llc -mtriple=x86_64-pc-windows-msvc -O0 < %s -o - | FileCheck -check-prefix=MSVC-X64-O0 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-pc-windows-msvc -O0 < %s -o - | FileCheck -check-prefix=MSVC-X86-O0 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc -O0 < %s -o - | FileCheck -check-prefix=MSVC-X64-O0 %s
@"\01LC" = internal constant [11 x i8] c"buf == %s\0A\00" ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/stack-protector-msvc.ll b/llvm/test/CodeGen/X86/stack-protector-msvc.ll
index 3109733e0b0b7..7123a01396d30 100644
--- a/llvm/test/CodeGen/X86/stack-protector-msvc.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-msvc.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=i386-pc-windows-msvc < %s -o - | FileCheck -check-prefix=MSVC-X86 %s
-; RUN: llc -mtriple=x86_64-pc-windows-msvc < %s -o - | FileCheck -check-prefix=MSVC-X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-windows-msvc < %s -o - | FileCheck -check-prefix=MSVC-X86 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc < %s -o - | FileCheck -check-prefix=MSVC-X64 %s
; Make sure fastisel falls back and does something secure.
-; RUN: llc -mtriple=i686-pc-windows-msvc -O0 < %s -o - | FileCheck -check-prefix=MSVC-X86-O0 %s
-; RUN: llc -mtriple=x86_64-pc-windows-msvc -O0 < %s -o - | FileCheck -check-prefix=MSVC-X64-O0 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-pc-windows-msvc -O0 < %s -o - | FileCheck -check-prefix=MSVC-X86-O0 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc -O0 < %s -o - | FileCheck -check-prefix=MSVC-X64-O0 %s
@"\01LC" = internal constant [11 x i8] c"buf == %s\0A\00" ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/stack-protector-musttail.ll b/llvm/test/CodeGen/X86/stack-protector-musttail.ll
index b0849ac8daa49..7d4855240c089 100644
--- a/llvm/test/CodeGen/X86/stack-protector-musttail.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-musttail.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux-gnu -fast-isel %s -o - -start-before=stack-protector -stop-after=stack-protector | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -fast-isel %s -o - -start-before=stack-protector -stop-after=stack-protector | FileCheck %s
@var = global ptr null
diff --git a/llvm/test/CodeGen/X86/stack-protector-no-return.ll b/llvm/test/CodeGen/X86/stack-protector-no-return.ll
index cfebf0080a6d6..e2f2d0976e8fe 100644
--- a/llvm/test/CodeGen/X86/stack-protector-no-return.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-no-return.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc %s -mtriple=x86_64-unknown-linux-gnu -o - -verify-dom-info | FileCheck %s
-; RUN: llc %s -mtriple=x86_64-unknown-linux-gnu -disable-check-noreturn-call=true -o - -verify-dom-info | FileCheck --check-prefix=DISNOTET %s
+; RUN: llc -combiner-topological-sorting %s -mtriple=x86_64-unknown-linux-gnu -o - -verify-dom-info | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -mtriple=x86_64-unknown-linux-gnu -disable-check-noreturn-call=true -o - -verify-dom-info | FileCheck --check-prefix=DISNOTET %s
; Function Attrs: sspreq
define void @_Z7catchesv() #0 personality ptr null {
diff --git a/llvm/test/CodeGen/X86/stack-protector-phi.ll b/llvm/test/CodeGen/X86/stack-protector-phi.ll
index 8041869ad8783..e8d0b7b9d9eb3 100644
--- a/llvm/test/CodeGen/X86/stack-protector-phi.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-phi.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
define void @test_phi_diff_size(i1 %c) sspstrong {
; CHECK-LABEL: test_phi_diff_size:
diff --git a/llvm/test/CodeGen/X86/stack-protector-recursively.ll b/llvm/test/CodeGen/X86/stack-protector-recursively.ll
index ad7af3f302a62..bf69b868e48e6 100644
--- a/llvm/test/CodeGen/X86/stack-protector-recursively.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-recursively.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -o - < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -o - < %s | FileCheck %s
; Make sure the stack protect not infinitly check __stack_chk_fail.
define dso_local void @__stack_chk_fail() local_unnamed_addr #0 {
diff --git a/llvm/test/CodeGen/X86/stack-protector-remarks.ll b/llvm/test/CodeGen/X86/stack-protector-remarks.ll
index cbd986a64eac6..6b4403cf7ecf1 100644
--- a/llvm/test/CodeGen/X86/stack-protector-remarks.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-remarks.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -mtriple=x86_64-unknown-unknown -pass-remarks=stack-protector -o /dev/null 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -mtriple=x86_64-unknown-unknown -pass-remarks=stack-protector -o /dev/null 2>&1 | FileCheck %s
; CHECK-NOT: nossp
; CHECK: function attribute_ssp
; CHECK-SAME: a function attribute or command-line switch
@@ -27,10 +27,10 @@
; CHECK-SAME: a call to alloca or use of a variable length array
; Check that no remark is emitted when the switch is not specified.
-; RUN: llc %s -mtriple=x86_64-unknown-unknown -o /dev/null 2>&1 | FileCheck %s -check-prefix=NOREMARK -allow-empty
+; RUN: llc -combiner-topological-sorting %s -mtriple=x86_64-unknown-unknown -o /dev/null 2>&1 | FileCheck %s -check-prefix=NOREMARK -allow-empty
; NOREMARK-NOT: ssp
-; RUN: llc %s -mtriple=x86_64-unknown-unknown -o /dev/null -pass-remarks-output=%t.yaml
+; RUN: llc -combiner-topological-sorting %s -mtriple=x86_64-unknown-unknown -o /dev/null -pass-remarks-output=%t.yaml
; RUN: cat %t.yaml | FileCheck %s -check-prefix=YAML
; YAML: --- !Passed
; YAML-NEXT: Pass: stack-protector
diff --git a/llvm/test/CodeGen/X86/stack-protector-strong-macho-win32-xor.ll b/llvm/test/CodeGen/X86/stack-protector-strong-macho-win32-xor.ll
index c187eb9e972ac..19d443e655fd9 100644
--- a/llvm/test/CodeGen/X86/stack-protector-strong-macho-win32-xor.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-strong-macho-win32-xor.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-pc-windows-macho -O0 < %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-macho -O0 < %s -o - | FileCheck %s
target datalayout = "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-macho"
diff --git a/llvm/test/CodeGen/X86/stack-protector-target-openbsd.ll b/llvm/test/CodeGen/X86/stack-protector-target-openbsd.ll
index 06382c6bbbbed..7adbac970549e 100644
--- a/llvm/test/CodeGen/X86/stack-protector-target-openbsd.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-target-openbsd.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=i386--linux < %s | FileCheck -check-prefix=LINUX32 %s
-; RUN: llc -mtriple=x86_64--linux < %s | FileCheck -check-prefix=LINUX64 %s
-; RUN: llc -mtriple=i386--openbsd < %s | FileCheck -check-prefix=OPENBSD32 %s
-; RUN: llc -mtriple=x86_64--openbsd < %s | FileCheck -check-prefix=OPENBSD64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386--linux < %s | FileCheck -check-prefix=LINUX32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64--linux < %s | FileCheck -check-prefix=LINUX64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386--openbsd < %s | FileCheck -check-prefix=OPENBSD32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64--openbsd < %s | FileCheck -check-prefix=OPENBSD64 %s
define void @func() sspreq nounwind {
; LINUX32-LABEL: func:
diff --git a/llvm/test/CodeGen/X86/stack-protector-target.ll b/llvm/test/CodeGen/X86/stack-protector-target.ll
index 4ba0302cf6fc3..4bd16a591c78f 100644
--- a/llvm/test/CodeGen/X86/stack-protector-target.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-target.ll
@@ -1,12 +1,12 @@
; Test target-specific stack cookie location.
-; RUN: llc -mtriple=i386-linux < %s -o - | FileCheck --check-prefix=I386-TLS %s
-; RUN: llc -mtriple=x86_64-linux < %s -o - | FileCheck --check-prefix=X64-TLS %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux < %s -o - | FileCheck --check-prefix=I386-TLS %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s -o - | FileCheck --check-prefix=X64-TLS %s
-; RUN: llc -mtriple=i386-linux-android < %s -o - | FileCheck --check-prefix=I386-TLS %s
-; RUN: llc -mtriple=x86_64-linux-android < %s -o - | FileCheck --check-prefix=X64-TLS %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-linux-android < %s -o - | FileCheck --check-prefix=I386-TLS %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-android < %s -o - | FileCheck --check-prefix=X64-TLS %s
-; RUN: llc -mtriple=i386-kfreebsd < %s -o - | FileCheck --check-prefix=I386-TLS %s
-; RUN: llc -mtriple=x86_64-kfreebsd < %s -o - | FileCheck --check-prefix=X64-TLS %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-kfreebsd < %s -o - | FileCheck --check-prefix=I386-TLS %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-kfreebsd < %s -o - | FileCheck --check-prefix=X64-TLS %s
define void @_Z1fv() sspreq {
entry:
diff --git a/llvm/test/CodeGen/X86/stack-protector-trap-unreachable.ll b/llvm/test/CodeGen/X86/stack-protector-trap-unreachable.ll
index 093bb44050809..39f18ae708fe0 100644
--- a/llvm/test/CodeGen/X86/stack-protector-trap-unreachable.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-trap-unreachable.ll
@@ -1,25 +1,25 @@
;; Make sure we emit trap instructions after stack protector checks iff NoTrapAfterNoReturn is false.
-; RUN: llc -enable-selectiondag-sp -mtriple=x86_64 -fast-isel=false -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
+; RUN: llc -combiner-topological-sorting -enable-selectiondag-sp -mtriple=x86_64 -fast-isel=false -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
; RUN: -trap-unreachable=false -o /dev/null 2>&1 %s | FileCheck --check-prefixes=CHECK,NO_TRAP_UNREACHABLE %s
-; RUN: llc -enable-selectiondag-sp -mtriple=x86_64 -fast-isel=false -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
+; RUN: llc -combiner-topological-sorting -enable-selectiondag-sp -mtriple=x86_64 -fast-isel=false -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
; RUN: -trap-unreachable -no-trap-after-noreturn -o /dev/null 2>&1 %s | FileCheck --check-prefixes=CHECK,NO_TRAP_UNREACHABLE %s
-; RUN: llc -enable-selectiondag-sp -mtriple=x86_64 -fast-isel=false -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
+; RUN: llc -combiner-topological-sorting -enable-selectiondag-sp -mtriple=x86_64 -fast-isel=false -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
; RUN: -trap-unreachable -no-trap-after-noreturn=false -o /dev/null 2>&1 %s | FileCheck --check-prefixes=CHECK,TRAP_UNREACHABLE %s
-; RUN: llc -enable-selectiondag-sp=false -mtriple=x86_64 -fast-isel=false -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
+; RUN: llc -combiner-topological-sorting -enable-selectiondag-sp=false -mtriple=x86_64 -fast-isel=false -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
; RUN: -trap-unreachable=false -o /dev/null 2>&1 %s | FileCheck --check-prefixes=CHECK,NO_TRAP_UNREACHABLE %s
-; RUN: llc -enable-selectiondag-sp=false -mtriple=x86_64 -fast-isel=false -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
+; RUN: llc -combiner-topological-sorting -enable-selectiondag-sp=false -mtriple=x86_64 -fast-isel=false -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
; RUN: -trap-unreachable -no-trap-after-noreturn -o /dev/null 2>&1 %s | FileCheck --check-prefixes=CHECK,NO_TRAP_UNREACHABLE %s
-; RUN: llc -enable-selectiondag-sp=false -mtriple=x86_64 -fast-isel=false -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
+; RUN: llc -combiner-topological-sorting -enable-selectiondag-sp=false -mtriple=x86_64 -fast-isel=false -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
; RUN: -trap-unreachable -no-trap-after-noreturn=false -o /dev/null 2>&1 %s | FileCheck --check-prefixes=CHECK,TRAP_UNREACHABLE %s
;; Make sure FastISel doesn't break anything.
-; RUN: llc -mtriple=x86_64 -fast-isel -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -fast-isel -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
; RUN: -trap-unreachable=false --o /dev/null 2>&1 %s | FileCheck --check-prefixes=CHECK,NO_TRAP_UNREACHABLE %s
-; RUN: llc -mtriple=x86_64 -fast-isel -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -fast-isel -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
; RUN: -trap-unreachable -no-trap-after-noreturn -o /dev/null 2>&1 %s | FileCheck --check-prefixes=CHECK,NO_TRAP_UNREACHABLE %s
-; RUN: llc -mtriple=x86_64 -fast-isel -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -fast-isel -global-isel=false -verify-machineinstrs -print-after=finalize-isel \
; RUN: -trap-unreachable -no-trap-after-noreturn=false -o /dev/null 2>&1 %s | FileCheck --check-prefixes=CHECK,TRAP_UNREACHABLE %s
; CHECK-LABEL: Machine code for function test
diff --git a/llvm/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll b/llvm/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll
index 4bc91bfd57125..611fa7f18ad8f 100644
--- a/llvm/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-vreg-to-vreg-copy.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple i386-unknown-freebsd10.0 --relocation-model=pic %s -o -
+; RUN: llc -combiner-topological-sorting -mtriple i386-unknown-freebsd10.0 --relocation-model=pic %s -o -
; PR16979
diff --git a/llvm/test/CodeGen/X86/stack-protector-weight.ll b/llvm/test/CodeGen/X86/stack-protector-weight.ll
index 862b130bfa4c6..5922014ded7a7 100644
--- a/llvm/test/CodeGen/X86/stack-protector-weight.ll
+++ b/llvm/test/CodeGen/X86/stack-protector-weight.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=x86_64-apple-darwin -print-after=finalize-isel -enable-selectiondag-sp=true %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=DARWIN-SELDAG
-; RUN: llc -mtriple=x86_64-apple-darwin -print-after=finalize-isel -enable-selectiondag-sp=false %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=DARWIN-IR
-; RUN: llc -mtriple=i386-pc-windows-msvc -print-after=finalize-isel -enable-selectiondag-sp=true %s -o /dev/null 2>&1 | FileCheck %s -check-prefix=MSVC-SELDAG
-; RUN: llc -mtriple=i386-pc-windows-msvc -print-after=finalize-isel -enable-selectiondag-sp=false %s -o /dev/null 2>&1 | FileCheck %s -check-prefix=MSVC-IR
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -print-after=finalize-isel -enable-selectiondag-sp=true %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=DARWIN-SELDAG
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -print-after=finalize-isel -enable-selectiondag-sp=false %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=DARWIN-IR
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-windows-msvc -print-after=finalize-isel -enable-selectiondag-sp=true %s -o /dev/null 2>&1 | FileCheck %s -check-prefix=MSVC-SELDAG
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-windows-msvc -print-after=finalize-isel -enable-selectiondag-sp=false %s -o /dev/null 2>&1 | FileCheck %s -check-prefix=MSVC-IR
; DARWIN-SELDAG: # Machine code for function test_branch_weights:
; DARWIN-SELDAG: successors: %bb.[[SUCCESS:[0-9]+]](0x7ffff800), %bb.[[FAILURE:[0-9]+]]
diff --git a/llvm/test/CodeGen/X86/stack-protector.ll b/llvm/test/CodeGen/X86/stack-protector.ll
index 772e7761fae80..14e27763c93de 100644
--- a/llvm/test/CodeGen/X86/stack-protector.ll
+++ b/llvm/test/CodeGen/X86/stack-protector.ll
@@ -1,13 +1,13 @@
-; RUN: llc -mtriple=i386-pc-linux-gnu < %s -o - | FileCheck --check-prefix=LINUX-I386 %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu < %s -o - | FileCheck --check-prefix=LINUX-X64 %s
-; RUN: llc -code-model=kernel -mtriple=x86_64-pc-linux-gnu < %s -o - | FileCheck --check-prefix=LINUX-KERNEL-X64 %s
-; RUN: llc -code-model=kernel -mtriple=x86_64-unknown-freebsd < %s -o - | FileCheck --check-prefix=FREEBSD-KERNEL-X64 %s
-; RUN: llc -mtriple=x86_64-apple-darwin < %s -o - | FileCheck --check-prefix=DARWIN-X64 %s
-; RUN: llc -mtriple=amd64-pc-openbsd < %s -o - | FileCheck --check-prefix=OPENBSD-AMD64 %s
-; RUN: llc -mtriple=i386-pc-windows-msvc < %s -o - | FileCheck -check-prefix=MSVC-I386 %s
-; RUN: llc -mtriple=x86_64-w64-mingw32 < %s -o - | FileCheck --check-prefix=MINGW-X64 %s
-; RUN: llc -mtriple=x86_64-pc-cygwin < %s -o - | FileCheck --check-prefix=MINGW-X64 %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnu < %s -o - | FileCheck --check-prefix=IGNORE_INTRIN %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-linux-gnu < %s -o - | FileCheck --check-prefix=LINUX-I386 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu < %s -o - | FileCheck --check-prefix=LINUX-X64 %s
+; RUN: llc -combiner-topological-sorting -code-model=kernel -mtriple=x86_64-pc-linux-gnu < %s -o - | FileCheck --check-prefix=LINUX-KERNEL-X64 %s
+; RUN: llc -combiner-topological-sorting -code-model=kernel -mtriple=x86_64-unknown-freebsd < %s -o - | FileCheck --check-prefix=FREEBSD-KERNEL-X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin < %s -o - | FileCheck --check-prefix=DARWIN-X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=amd64-pc-openbsd < %s -o - | FileCheck --check-prefix=OPENBSD-AMD64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-pc-windows-msvc < %s -o - | FileCheck -check-prefix=MSVC-I386 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-w64-mingw32 < %s -o - | FileCheck --check-prefix=MINGW-X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-cygwin < %s -o - | FileCheck --check-prefix=MINGW-X64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu < %s -o - | FileCheck --check-prefix=IGNORE_INTRIN %s
%struct.foo = type { [16 x i8] }
%struct.foo.0 = type { [4 x i8] }
diff --git a/llvm/test/CodeGen/X86/stack-size-section-function-sections.ll b/llvm/test/CodeGen/X86/stack-size-section-function-sections.ll
index b9606c081a90e..f61db7d84cbdc 100644
--- a/llvm/test/CodeGen/X86/stack-size-section-function-sections.ll
+++ b/llvm/test/CodeGen/X86/stack-size-section-function-sections.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=x86_64-linux -stack-size-section -function-sections | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -stack-size-section -function-sections | \
; RUN: FileCheck %s --check-prefix=UNIQ
-; RUN: llc < %s -mtriple=x86_64-linux -stack-size-section -function-sections -unique-section-names=0 | \
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -stack-size-section -function-sections -unique-section-names=0 | \
; RUN: FileCheck %s --check-prefix=NOUNIQ
; Check we add SHF_LINK_ORDER for .stack_sizes and link it with the corresponding .text sections.
diff --git a/llvm/test/CodeGen/X86/stack-size-section.ll b/llvm/test/CodeGen/X86/stack-size-section.ll
index 866acbe140147..59fcc55a0aa43 100644
--- a/llvm/test/CodeGen/X86/stack-size-section.ll
+++ b/llvm/test/CodeGen/X86/stack-size-section.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=x86_64-linux -stack-size-section | FileCheck %s --check-prefix=CHECK --check-prefix=GROUPS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -stack-size-section | FileCheck %s --check-prefix=CHECK --check-prefix=GROUPS
; PS4 'as' does not recognize the section attribute "o". So we have a simple .stack_sizes section on PS4.
-; RUN: llc < %s -mtriple=x86_64-scei-ps4 -stack-size-section | FileCheck %s --check-prefix=CHECK --check-prefix=NOGROUPS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-scei-ps4 -stack-size-section | FileCheck %s --check-prefix=CHECK --check-prefix=NOGROUPS
; CHECK-LABEL: func1:
; CHECK-NEXT: .Lfunc_begin0:
diff --git a/llvm/test/CodeGen/X86/stack-update-frame-opcode.ll b/llvm/test/CodeGen/X86/stack-update-frame-opcode.ll
index d201e14f02f5f..f54e8bff9b929 100644
--- a/llvm/test/CodeGen/X86/stack-update-frame-opcode.ll
+++ b/llvm/test/CodeGen/X86/stack-update-frame-opcode.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=x86_64-pc-linux -mcpu=corei7 < %s | FileCheck -check-prefix=CORE_LP64 %s
-; RUN: llc -mtriple=x86_64-pc-linux -mcpu=atom < %s | FileCheck -check-prefix=ATOM_LP64 %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -mcpu=corei7 < %s | FileCheck -check-prefix=CORE_ILP32 %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnux32 -mcpu=atom < %s | FileCheck -check-prefix=ATOM_ILP32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -mcpu=corei7 < %s | FileCheck -check-prefix=CORE_LP64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -mcpu=atom < %s | FileCheck -check-prefix=ATOM_LP64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnux32 -mcpu=corei7 < %s | FileCheck -check-prefix=CORE_ILP32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnux32 -mcpu=atom < %s | FileCheck -check-prefix=ATOM_ILP32 %s
define i32 @bar(i32 %a) nounwind {
entry:
diff --git a/llvm/test/CodeGen/X86/stack-usage-file.ll b/llvm/test/CodeGen/X86/stack-usage-file.ll
index 67ee5d6ba94cb..fe6f47f37b0b2 100644
--- a/llvm/test/CodeGen/X86/stack-usage-file.ll
+++ b/llvm/test/CodeGen/X86/stack-usage-file.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64 -stack-usage-file=%t.su
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -stack-usage-file=%t.su
; RUN: FileCheck --input-file=%t.su %s
declare void @g(ptr)
diff --git a/llvm/test/CodeGen/X86/stack_guard_remat.ll b/llvm/test/CodeGen/X86/stack_guard_remat.ll
index f53fa0b4c12fd..b9de6ea203d64 100644
--- a/llvm/test/CodeGen/X86/stack_guard_remat.ll
+++ b/llvm/test/CodeGen/X86/stack_guard_remat.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -no-integrated-as | FileCheck %s
;CHECK: foo2
;CHECK: movq ___stack_chk_guard at GOTPCREL(%rip), [[R0:%[a-z0-9]+]]
diff --git a/llvm/test/CodeGen/X86/stackaddress.ll b/llvm/test/CodeGen/X86/stackaddress.ll
index 6d73b2ec82c22..5c98d092f0e89 100644
--- a/llvm/test/CodeGen/X86/stackaddress.ll
+++ b/llvm/test/CodeGen/X86/stackaddress.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -o - | FileCheck --check-prefix=x86_64 %s
-; RUN: llc < %s -mtriple=i386-linux-gnu -o - | FileCheck --check-prefix=i386 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -o - | FileCheck --check-prefix=x86_64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -o - | FileCheck --check-prefix=i386 %s
declare ptr @llvm.stackaddress.p0()
diff --git a/llvm/test/CodeGen/X86/stackguard-internal.ll b/llvm/test/CodeGen/X86/stackguard-internal.ll
index 328e04b9a718c..87e90007ae166 100644
--- a/llvm/test/CodeGen/X86/stackguard-internal.ll
+++ b/llvm/test/CodeGen/X86/stackguard-internal.ll
@@ -1,5 +1,5 @@
; Check that the backend doesn't crash.
-; RUN: llc -mtriple=x86_64-pc-freebsd %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-freebsd %s -o - | FileCheck %s
@__stack_chk_guard = internal global [8 x i64] zeroinitializer, align 16
diff --git a/llvm/test/CodeGen/X86/stackmap-args.ll b/llvm/test/CodeGen/X86/stackmap-args.ll
index 622c41c06fb96..dc45234fd9eb0 100644
--- a/llvm/test/CodeGen/X86/stackmap-args.ll
+++ b/llvm/test/CodeGen/X86/stackmap-args.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=x86_64-apple-darwin -mcpu=corei7 < %s 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -mcpu=corei7 < %s 2>&1 | FileCheck %s
; Tests error when we pass non-immediate parameters to @llvm.experiment.stackmap
define void @first_arg() {
diff --git a/llvm/test/CodeGen/X86/stackmap-dynamic-alloca.ll b/llvm/test/CodeGen/X86/stackmap-dynamic-alloca.ll
index 46ec58c50cb1e..46e2489fb4381 100644
--- a/llvm/test/CodeGen/X86/stackmap-dynamic-alloca.ll
+++ b/llvm/test/CodeGen/X86/stackmap-dynamic-alloca.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
; When a function does a dynamic stack allocation, the function's stack size is
; reported as UINT64_MAX.
diff --git a/llvm/test/CodeGen/X86/stackmap-fast-isel.ll b/llvm/test/CodeGen/X86/stackmap-fast-isel.ll
index 9a1b9c422d190..97541bb1e79d4 100644
--- a/llvm/test/CodeGen/X86/stackmap-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/stackmap-fast-isel.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 | FileCheck %s
; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
diff --git a/llvm/test/CodeGen/X86/stackmap-frame-setup.ll b/llvm/test/CodeGen/X86/stackmap-frame-setup.ll
index 7157f952a9810..838f36a746079 100644
--- a/llvm/test/CodeGen/X86/stackmap-frame-setup.ll
+++ b/llvm/test/CodeGen/X86/stackmap-frame-setup.ll
@@ -1,5 +1,5 @@
-; RUN: llc -o - -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
-; RUN: llc -o - -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
+; RUN: llc -combiner-topological-sorting -o - -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -stop-after machine-sink %s | FileCheck %s --check-prefix=ISEL
+; RUN: llc -combiner-topological-sorting -o - -verify-machineinstrs -mtriple=x86_64-apple-darwin -mcpu=corei7 -fast-isel -fast-isel-abort=1 -stop-after machine-sink %s | FileCheck %s --check-prefix=FAST-ISEL
define void @caller_meta_leaf() {
entry:
diff --git a/llvm/test/CodeGen/X86/stackmap-large-constants.ll b/llvm/test/CodeGen/X86/stackmap-large-constants.ll
index 7de430b5393a1..20153da6fb74a 100644
--- a/llvm/test/CodeGen/X86/stackmap-large-constants.ll
+++ b/llvm/test/CodeGen/X86/stackmap-large-constants.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
diff --git a/llvm/test/CodeGen/X86/stackmap-large-location-size.ll b/llvm/test/CodeGen/X86/stackmap-large-location-size.ll
index 0c8d7fcb5a19c..13ddce2d793e6 100644
--- a/llvm/test/CodeGen/X86/stackmap-large-location-size.ll
+++ b/llvm/test/CodeGen/X86/stackmap-large-location-size.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple="x86_64-pc-linux-gnu" | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple="x86_64-pc-linux-gnu" | FileCheck %s
declare void @callee()
diff --git a/llvm/test/CodeGen/X86/stackmap-liveness.ll b/llvm/test/CodeGen/X86/stackmap-liveness.ll
index 10a8f950baebe..7687e496eb5a6 100644
--- a/llvm/test/CodeGen/X86/stackmap-liveness.ll
+++ b/llvm/test/CodeGen/X86/stackmap-liveness.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -enable-patchpoint-liveness=false | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck -check-prefix=PATCH %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -enable-patchpoint-liveness=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck -check-prefix=PATCH %s
;
; Note: Print verbose stackmaps using -debug-only=stackmaps.
diff --git a/llvm/test/CodeGen/X86/stackmap-macho.ll b/llvm/test/CodeGen/X86/stackmap-macho.ll
index a6646742d2007..70e3434a3d176 100644
--- a/llvm/test/CodeGen/X86/stackmap-macho.ll
+++ b/llvm/test/CodeGen/X86/stackmap-macho.ll
@@ -1,7 +1,7 @@
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
; Used to crash with assertions when emitting object files.
-; RUN: llc -filetype=obj %s -o /dev/null
+; RUN: llc -combiner-topological-sorting -filetype=obj %s -o /dev/null
; Check stack map section is emitted before debug info.
; CHECK: .section __LLVM_STACKMAPS
diff --git a/llvm/test/CodeGen/X86/stackmap-nops.ll b/llvm/test/CodeGen/X86/stackmap-nops.ll
index e0f40d1d3ef8f..88589bbb8da70 100644
--- a/llvm/test/CodeGen/X86/stackmap-nops.ll
+++ b/llvm/test/CodeGen/X86/stackmap-nops.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=znver1 | FileCheck --check-prefix=CHECK-AMD %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=znver1 | FileCheck --check-prefix=CHECK-AMD %s
; Check that we get a fast sequence of nops on each platform.
diff --git a/llvm/test/CodeGen/X86/stackmap-shadow-optimization.ll b/llvm/test/CodeGen/X86/stackmap-shadow-optimization.ll
index 001d8d9f54341..2ed8059c9ffda 100644
--- a/llvm/test/CodeGen/X86/stackmap-shadow-optimization.ll
+++ b/llvm/test/CodeGen/X86/stackmap-shadow-optimization.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 | FileCheck %s
; Check that the X86 stackmap shadow optimization is only outputting a 3-byte
; nop here. 8-bytes are requested, but 5 are covered by the code for the call to
diff --git a/llvm/test/CodeGen/X86/stackmap.ll b/llvm/test/CodeGen/X86/stackmap.ll
index 9bf88cb8bdf81..29591e3e5ff3f 100644
--- a/llvm/test/CodeGen/X86/stackmap.ll
+++ b/llvm/test/CodeGen/X86/stackmap.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -terminal-rule=0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mcpu=corei7 -terminal-rule=0 | FileCheck %s
;
; Note: Print verbose stackmaps using -debug-only=stackmaps.
diff --git a/llvm/test/CodeGen/X86/stackpointer.ll b/llvm/test/CodeGen/X86/stackpointer.ll
index 094856b3c57db..dde2a6673f12a 100644
--- a/llvm/test/CodeGen/X86/stackpointer.ll
+++ b/llvm/test/CodeGen/X86/stackpointer.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnueabi | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnueabi | FileCheck %s
; RUN: opt < %s -O3 -S -mtriple=x86_64-linux-gnueabi | FileCheck %s --check-prefix=OPT
define i64 @get_stack() nounwind {
diff --git a/llvm/test/CodeGen/X86/statepoint-allocas.ll b/llvm/test/CodeGen/X86/statepoint-allocas.ll
index e743b3db7067d..2b2f121a60d83 100644
--- a/llvm/test/CodeGen/X86/statepoint-allocas.ll
+++ b/llvm/test/CodeGen/X86/statepoint-allocas.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -debug-entry-values < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -debug-entry-values < %s | FileCheck %s
; Check that we can lower a use of an alloca both as a deopt value (where the
; exact meaning is up to the consumer of the stackmap) and as an explicit spill
; slot used for GC.
diff --git a/llvm/test/CodeGen/X86/statepoint-call-lowering.ll b/llvm/test/CodeGen/X86/statepoint-call-lowering.ll
index 758cb8b7b63d5..d698c0e6cc992 100644
--- a/llvm/test/CodeGen/X86/statepoint-call-lowering.ll
+++ b/llvm/test/CodeGen/X86/statepoint-call-lowering.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
; This file contains a collection of basic tests to ensure we didn't
; screw up normal call lowering when there are no deopt or gc arguments.
diff --git a/llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll b/llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll
index 8d589c519eff2..3ad0bad524862 100644
--- a/llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll
+++ b/llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -max-registers-for-gc-values=256 -verify-machineinstrs -stop-after twoaddressinstruction < %s | FileCheck --check-prefix=CHECK-LV %s
-; RUN: llc -max-registers-for-gc-values=256 -verify-machineinstrs -stop-after twoaddressinstruction -early-live-intervals < %s | FileCheck --check-prefix=CHECK-LIS %s
+; RUN: llc -combiner-topological-sorting -max-registers-for-gc-values=256 -verify-machineinstrs -stop-after twoaddressinstruction < %s | FileCheck --check-prefix=CHECK-LV %s
+; RUN: llc -combiner-topological-sorting -max-registers-for-gc-values=256 -verify-machineinstrs -stop-after twoaddressinstruction -early-live-intervals < %s | FileCheck --check-prefix=CHECK-LIS %s
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128-ni:1-p2:32:8:8:32-ni:2"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/statepoint-deopt-lowering.ll b/llvm/test/CodeGen/X86/statepoint-deopt-lowering.ll
index 72f4fa37dc5e5..ea4df5aa25f5f 100644
--- a/llvm/test/CodeGen/X86/statepoint-deopt-lowering.ll
+++ b/llvm/test/CodeGen/X86/statepoint-deopt-lowering.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 < %s | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
diff --git a/llvm/test/CodeGen/X86/statepoint-duplicates-export.ll b/llvm/test/CodeGen/X86/statepoint-duplicates-export.ll
index bc112718f43cf..f82bb97dc588e 100644
--- a/llvm/test/CodeGen/X86/statepoint-duplicates-export.ll
+++ b/llvm/test/CodeGen/X86/statepoint-duplicates-export.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
; Check that we can export values of "duplicated" gc.relocates without a crash
; "duplicate" here means maps to same SDValue. We previously had an
diff --git a/llvm/test/CodeGen/X86/statepoint-far-call.ll b/llvm/test/CodeGen/X86/statepoint-far-call.ll
index 79f6cae2c973b..0db9b1c7ff208 100644
--- a/llvm/test/CodeGen/X86/statepoint-far-call.ll
+++ b/llvm/test/CodeGen/X86/statepoint-far-call.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
; Test to check that Statepoints with X64 far-immediate targets
; are lowered correctly to an indirect call via a scratch register.
diff --git a/llvm/test/CodeGen/X86/statepoint-forward.ll b/llvm/test/CodeGen/X86/statepoint-forward.ll
index a1456a4dbb652..57fc28864eae2 100644
--- a/llvm/test/CodeGen/X86/statepoint-forward.ll
+++ b/llvm/test/CodeGen/X86/statepoint-forward.ll
@@ -1,5 +1,5 @@
; RUN: opt -O3 -S < %s | FileCheck --check-prefix=CHECK-OPT %s
-; RUN: llc -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-LLC %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-LLC %s
; These tests are targetted at making sure we don't retain information
; about memory which contains potential gc references across a statepoint.
; They're carefully written to only outlaw forwarding of references.
diff --git a/llvm/test/CodeGen/X86/statepoint-gc-live.ll b/llvm/test/CodeGen/X86/statepoint-gc-live.ll
index 4e8f3c4bb27f1..58e88e540c21e 100644
--- a/llvm/test/CodeGen/X86/statepoint-gc-live.ll
+++ b/llvm/test/CodeGen/X86/statepoint-gc-live.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-win64"
diff --git a/llvm/test/CodeGen/X86/statepoint-gctransition-call-lowering.ll b/llvm/test/CodeGen/X86/statepoint-gctransition-call-lowering.ll
index 67f6de4dc8e62..6367e91d9e430 100644
--- a/llvm/test/CodeGen/X86/statepoint-gctransition-call-lowering.ll
+++ b/llvm/test/CodeGen/X86/statepoint-gctransition-call-lowering.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
; This file contains a collection of basic tests to ensure we didn't
; screw up normal call lowering when a statepoint is a GC transition.
diff --git a/llvm/test/CodeGen/X86/statepoint-invoke.ll b/llvm/test/CodeGen/X86/statepoint-invoke.ll
index 34dbc21a8a8cb..7bd25743d109f 100644
--- a/llvm/test/CodeGen/X86/statepoint-invoke.ll
+++ b/llvm/test/CodeGen/X86/statepoint-invoke.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s 2>&1 | FileCheck %s
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/statepoint-live-in-remat.ll b/llvm/test/CodeGen/X86/statepoint-live-in-remat.ll
index 68874074812e3..7c3126ad0c111 100644
--- a/llvm/test/CodeGen/X86/statepoint-live-in-remat.ll
+++ b/llvm/test/CodeGen/X86/statepoint-live-in-remat.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -code-model=large -verify-machineinstrs -O3 -restrict-statepoint-remat=true < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -code-model=large -verify-machineinstrs -O3 -restrict-statepoint-remat=true < %s | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.11.0"
diff --git a/llvm/test/CodeGen/X86/statepoint-live-in.ll b/llvm/test/CodeGen/X86/statepoint-live-in.ll
index 9cf647f8100cd..9f63ae06580e0 100644
--- a/llvm/test/CodeGen/X86/statepoint-live-in.ll
+++ b/llvm/test/CodeGen/X86/statepoint-live-in.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -O3 -restrict-statepoint-remat < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -O3 -restrict-statepoint-remat < %s | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.11.0"
diff --git a/llvm/test/CodeGen/X86/statepoint-no-extra-const.ll b/llvm/test/CodeGen/X86/statepoint-no-extra-const.ll
index d066ebbbeab69..e1ff6ebfde48d 100644
--- a/llvm/test/CodeGen/X86/statepoint-no-extra-const.ll
+++ b/llvm/test/CodeGen/X86/statepoint-no-extra-const.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s
define ptr addrspace(1) @no_extra_const(ptr addrspace(1) %obj) gc "statepoint-example" {
; CHECK-LABEL: no_extra_const:
diff --git a/llvm/test/CodeGen/X86/statepoint-no-realign-stack.ll b/llvm/test/CodeGen/X86/statepoint-no-realign-stack.ll
index b531f00b4be5b..d1bb24f7aa96a 100644
--- a/llvm/test/CodeGen/X86/statepoint-no-realign-stack.ll
+++ b/llvm/test/CodeGen/X86/statepoint-no-realign-stack.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -mcpu=skylake < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=skylake < %s | FileCheck %s
target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/statepoint-ra-no-ls.ll b/llvm/test/CodeGen/X86/statepoint-ra-no-ls.ll
index 82a2f05760309..8a92f5f449c97 100644
--- a/llvm/test/CodeGen/X86/statepoint-ra-no-ls.ll
+++ b/llvm/test/CodeGen/X86/statepoint-ra-no-ls.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -max-registers-for-gc-values=256 -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -max-registers-for-gc-values=256 -verify-machineinstrs < %s | FileCheck %s
target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-win64"
diff --git a/llvm/test/CodeGen/X86/statepoint-ra.ll b/llvm/test/CodeGen/X86/statepoint-ra.ll
index 5a4e04dd70553..24c45674a2a22 100644
--- a/llvm/test/CodeGen/X86/statepoint-ra.ll
+++ b/llvm/test/CodeGen/X86/statepoint-ra.ll
@@ -1,4 +1,4 @@
-; RUN: llc -x86-tile-ra=0 -verify-machineinstrs -O3 -use-registers-for-deopt-values -restrict-statepoint-remat=true -pass-remarks-filter=regalloc -pass-remarks-output=%t.yaml -stop-after=greedy -o - < %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -x86-tile-ra=0 -verify-machineinstrs -O3 -use-registers-for-deopt-values -restrict-statepoint-remat=true -pass-remarks-filter=regalloc -pass-remarks-output=%t.yaml -stop-after=greedy -o - < %s 2>&1 | FileCheck %s
; RUN: cat %t.yaml | FileCheck -check-prefix=YAML %s
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/statepoint-regs.ll b/llvm/test/CodeGen/X86/statepoint-regs.ll
index cbbdae1616fe8..c6595eb14def7 100644
--- a/llvm/test/CodeGen/X86/statepoint-regs.ll
+++ b/llvm/test/CodeGen/X86/statepoint-regs.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -O3 -use-registers-for-deopt-values -restrict-statepoint-remat=true < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -O3 -use-registers-for-deopt-values -restrict-statepoint-remat=true < %s | FileCheck %s
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.11.0"
diff --git a/llvm/test/CodeGen/X86/statepoint-relocate-undef.ll b/llvm/test/CodeGen/X86/statepoint-relocate-undef.ll
index 69e6976c32033..7e42e59266a10 100644
--- a/llvm/test/CodeGen/X86/statepoint-relocate-undef.ll
+++ b/llvm/test/CodeGen/X86/statepoint-relocate-undef.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/statepoint-spill-lowering.ll b/llvm/test/CodeGen/X86/statepoint-spill-lowering.ll
index 2b921b11eb48b..8dce23ff7dc81 100644
--- a/llvm/test/CodeGen/X86/statepoint-spill-lowering.ll
+++ b/llvm/test/CodeGen/X86/statepoint-spill-lowering.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
; Check that we can handle gc.relocate in a separate block in spill mode.
diff --git a/llvm/test/CodeGen/X86/statepoint-spill-slot-size-promotion.ll b/llvm/test/CodeGen/X86/statepoint-spill-slot-size-promotion.ll
index f7e053d384c99..2daec3245032c 100644
--- a/llvm/test/CodeGen/X86/statepoint-spill-slot-size-promotion.ll
+++ b/llvm/test/CodeGen/X86/statepoint-spill-slot-size-promotion.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK
;
; Test different type sizes of deop bundle operands.
;
diff --git a/llvm/test/CodeGen/X86/statepoint-split-single-block.ll b/llvm/test/CodeGen/X86/statepoint-split-single-block.ll
index da02acdf43241..4d883549edd05 100644
--- a/llvm/test/CodeGen/X86/statepoint-split-single-block.ll
+++ b/llvm/test/CodeGen/X86/statepoint-split-single-block.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -max-registers-for-gc-values=256 -use-registers-for-deopt-values=true -code-model=large -fixup-allow-gcptr-in-csr=true < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -max-registers-for-gc-values=256 -use-registers-for-deopt-values=true -code-model=large -fixup-allow-gcptr-in-csr=true < %s | FileCheck %s
; The test checks that Greedy register allocator should not split single basic block
; if it has only one non-statepoint use. Otherwise we may a redundant register usage.
diff --git a/llvm/test/CodeGen/X86/statepoint-stack-usage.ll b/llvm/test/CodeGen/X86/statepoint-stack-usage.ll
index 59c7098624ac0..2c98f25c3ca47 100644
--- a/llvm/test/CodeGen/X86/statepoint-stack-usage.ll
+++ b/llvm/test/CodeGen/X86/statepoint-stack-usage.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -stack-symbol-ordering=0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -stack-symbol-ordering=0 < %s | FileCheck %s
target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll b/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll
index 1d45c7db84f81..65bc4068eb0ba 100644
--- a/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll
+++ b/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -verify-machineinstrs -stack-symbol-ordering=0 -mtriple="x86_64-pc-linux-gnu" | FileCheck %s
-; RUN: llc < %s -verify-machineinstrs -stack-symbol-ordering=0 -mtriple="x86_64-pc-unknown-elf" | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -stack-symbol-ordering=0 -mtriple="x86_64-pc-linux-gnu" | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -stack-symbol-ordering=0 -mtriple="x86_64-pc-unknown-elf" | FileCheck %s
; This test is a basic correctness check to ensure statepoints are generating
; StackMap sections correctly. This is not intended to be a rigorous test of
diff --git a/llvm/test/CodeGen/X86/statepoint-stackmap-size.ll b/llvm/test/CodeGen/X86/statepoint-stackmap-size.ll
index 38e74e0f5d55a..0c1284a63a712 100644
--- a/llvm/test/CodeGen/X86/statepoint-stackmap-size.ll
+++ b/llvm/test/CodeGen/X86/statepoint-stackmap-size.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
; Without removal of duplicate entries, the size is 62 lines
; CHECK: .section .llvm_stackmaps,{{.*$}}
diff --git a/llvm/test/CodeGen/X86/statepoint-two-results.ll b/llvm/test/CodeGen/X86/statepoint-two-results.ll
index 4993c292dc553..3f7d09b211676 100644
--- a/llvm/test/CodeGen/X86/statepoint-two-results.ll
+++ b/llvm/test/CodeGen/X86/statepoint-two-results.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/statepoint-uniqueing.ll b/llvm/test/CodeGen/X86/statepoint-uniqueing.ll
index 2abd684f7a0a2..4065b9713d3a3 100644
--- a/llvm/test/CodeGen/X86/statepoint-uniqueing.ll
+++ b/llvm/test/CodeGen/X86/statepoint-uniqueing.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/statepoint-vector-bad-spill.ll b/llvm/test/CodeGen/X86/statepoint-vector-bad-spill.ll
index 97b047c3c55b0..4f5e26cf25d87 100644
--- a/llvm/test/CodeGen/X86/statepoint-vector-bad-spill.ll
+++ b/llvm/test/CodeGen/X86/statepoint-vector-bad-spill.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -O3 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -O3 < %s | FileCheck %s
; This is checking for a crash.
diff --git a/llvm/test/CodeGen/X86/statepoint-vector.ll b/llvm/test/CodeGen/X86/statepoint-vector.ll
index f53ac2f8f6279..edaae21f42306 100644
--- a/llvm/test/CodeGen/X86/statepoint-vector.ll
+++ b/llvm/test/CodeGen/X86/statepoint-vector.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -stack-symbol-ordering=0 -mcpu=nehalem -debug-only=stackmaps < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -stack-symbol-ordering=0 -mcpu=nehalem -debug-only=stackmaps < %s | FileCheck %s
; REQUIRES: asserts
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/statepoint-vreg-details.ll b/llvm/test/CodeGen/X86/statepoint-vreg-details.ll
index 2a0710e3249a6..4a0d70749074d 100644
--- a/llvm/test/CodeGen/X86/statepoint-vreg-details.ll
+++ b/llvm/test/CodeGen/X86/statepoint-vreg-details.ll
@@ -3,9 +3,9 @@
; the main file is easy to update with update_llc_test_checks.py
; This run is to demonstrate what MIR SSA looks like.
-; RUN: llc -max-registers-for-gc-values=4 -stop-after finalize-isel < %s | FileCheck --check-prefix=CHECK-VREG %s
+; RUN: llc -combiner-topological-sorting -max-registers-for-gc-values=4 -stop-after finalize-isel < %s | FileCheck --check-prefix=CHECK-VREG %s
; This run is to demonstrate register allocator work.
-; RUN: llc -max-registers-for-gc-values=4 -stop-after virtregrewriter < %s | FileCheck --check-prefix=CHECK-PREG %s
+; RUN: llc -combiner-topological-sorting -max-registers-for-gc-values=4 -stop-after virtregrewriter < %s | FileCheck --check-prefix=CHECK-PREG %s
target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll b/llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll
index ef542e5b1427a..a5451f9a8345b 100644
--- a/llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll
+++ b/llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc -max-registers-for-gc-values=4 -stop-after virtregrewriter < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -max-registers-for-gc-values=4 -stop-after virtregrewriter < %s | FileCheck %s
target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll b/llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
index 0594f2fbc0a35..2977c876ef0ba 100644
--- a/llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
+++ b/llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc -max-registers-for-gc-values=18 -stop-before greedy < %s | FileCheck --check-prefix=CHECK-VREG %s
-; RUN: llc -max-registers-for-gc-values=18 -stop-after virtregrewriter < %s | FileCheck --check-prefix=CHECK-PREG %s
+; RUN: llc -combiner-topological-sorting -max-registers-for-gc-values=18 -stop-before greedy < %s | FileCheck --check-prefix=CHECK-VREG %s
+; RUN: llc -combiner-topological-sorting -max-registers-for-gc-values=18 -stop-after virtregrewriter < %s | FileCheck --check-prefix=CHECK-PREG %s
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/statepoint-vreg.ll b/llvm/test/CodeGen/X86/statepoint-vreg.ll
index d9a8ab0ca8e3c..5c8dc1d98efb1 100644
--- a/llvm/test/CodeGen/X86/statepoint-vreg.ll
+++ b/llvm/test/CodeGen/X86/statepoint-vreg.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -max-registers-for-gc-values=4 -fixup-allow-gcptr-in-csr=true < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -max-registers-for-gc-values=4 -fixup-allow-gcptr-in-csr=true < %s | FileCheck %s
target datalayout = "e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/stdarg.ll b/llvm/test/CodeGen/X86/stdarg.ll
index 0acef7bfa0348..31e360ad5c6b6 100644
--- a/llvm/test/CodeGen/X86/stdarg.ll
+++ b/llvm/test/CodeGen/X86/stdarg.ll
@@ -1,4 +1,4 @@
-; RUN: llc -stack-symbol-ordering=0 < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting -stack-symbol-ordering=0 < %s -mtriple=x86_64-linux | FileCheck %s
%struct.__va_list_tag = type { i32, i32, ptr, ptr }
diff --git a/llvm/test/CodeGen/X86/stdcall-notailcall.ll b/llvm/test/CodeGen/X86/stdcall-notailcall.ll
index 3ad6e408ac06d..bd92ee9860aa9 100644
--- a/llvm/test/CodeGen/X86/stdcall-notailcall.ll
+++ b/llvm/test/CodeGen/X86/stdcall-notailcall.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i386-apple-darwin11 -O2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-apple-darwin11 -O2 < %s | FileCheck %s
%struct.I = type { ptr }
define x86_stdcallcc void @bar(ptr nocapture %this) ssp align 2 {
diff --git a/llvm/test/CodeGen/X86/stdcall.ll b/llvm/test/CodeGen/X86/stdcall.ll
index 2a139f0fc31f9..ce0a768a9e9ab 100644
--- a/llvm/test/CodeGen/X86/stdcall.ll
+++ b/llvm/test/CodeGen/X86/stdcall.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple="i386-pc-mingw32" < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple="i386-pc-mingw32" < %s | FileCheck %s
; PR5851
%0 = type { ptr }
diff --git a/llvm/test/CodeGen/X86/store-empty-member.ll b/llvm/test/CodeGen/X86/store-empty-member.ll
index 3bd91794bd84f..f3316dd47c5b3 100644
--- a/llvm/test/CodeGen/X86/store-empty-member.ll
+++ b/llvm/test/CodeGen/X86/store-empty-member.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; Don't crash on an empty struct member.
diff --git a/llvm/test/CodeGen/X86/store-fp-constant.ll b/llvm/test/CodeGen/X86/store-fp-constant.ll
index b0124dd553924..4992ae21db272 100644
--- a/llvm/test/CodeGen/X86/store-fp-constant.ll
+++ b/llvm/test/CodeGen/X86/store-fp-constant.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; CHECK-NOT: rodata
; CHECK-NOT: literal
diff --git a/llvm/test/CodeGen/X86/store-global-address.ll b/llvm/test/CodeGen/X86/store-global-address.ll
index eb2518c7f3695..17237ea72a72e 100644
--- a/llvm/test/CodeGen/X86/store-global-address.ll
+++ b/llvm/test/CodeGen/X86/store-global-address.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
@dst = global i32 0 ; <ptr> [#uses=1]
@ptr = global ptr null ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/store-zero-and-minus-one.ll b/llvm/test/CodeGen/X86/store-zero-and-minus-one.ll
index 23ab291e6c11a..7cf05f042d3ae 100644
--- a/llvm/test/CodeGen/X86/store-zero-and-minus-one.ll
+++ b/llvm/test/CodeGen/X86/store-zero-and-minus-one.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=CHECK32
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=CHECK64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=CHECK32
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=CHECK64
define void @zero_optsize(ptr %p) optsize {
; CHECK32-LABEL: zero_optsize:
diff --git a/llvm/test/CodeGen/X86/store_op_load_fold.ll b/llvm/test/CodeGen/X86/store_op_load_fold.ll
index 0309fa7bb0310..074ac866e59af 100644
--- a/llvm/test/CodeGen/X86/store_op_load_fold.ll
+++ b/llvm/test/CodeGen/X86/store_op_load_fold.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-darwin | FileCheck %s
;
; Test the add and load are folded into the store instruction.
diff --git a/llvm/test/CodeGen/X86/store_op_load_fold2.ll b/llvm/test/CodeGen/X86/store_op_load_fold2.ll
index d32058e29cbad..a38edc1d0aa7d 100644
--- a/llvm/test/CodeGen/X86/store_op_load_fold2.ll
+++ b/llvm/test/CodeGen/X86/store_op_load_fold2.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7 -x86-asm-syntax=att | FileCheck %s -check-prefix=ATT
-; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7 -x86-asm-syntax=intel | FileCheck %s -check-prefix=INTEL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -mcpu=corei7 -x86-asm-syntax=att | FileCheck %s -check-prefix=ATT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -mcpu=corei7 -x86-asm-syntax=intel | FileCheck %s -check-prefix=INTEL
target datalayout = "e-p:32:32"
%struct.Macroblock = type { i32, i32, i32, i32, i32, [8 x i32], ptr, ptr, i32, [2 x [4 x [4 x [2 x i32]]]], [16 x i8], [16 x i8], i32, i64, [4 x i32], [4 x i32], i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i16, double, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/storetrunc-fp.ll b/llvm/test/CodeGen/X86/storetrunc-fp.ll
index d1e7b1800459e..fa8f67c4c37be 100644
--- a/llvm/test/CodeGen/X86/storetrunc-fp.ll
+++ b/llvm/test/CodeGen/X86/storetrunc-fp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define void @foo(x86_fp80 %a, x86_fp80 %b, ptr %fp) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/strict-fadd-combines.ll b/llvm/test/CodeGen/X86/strict-fadd-combines.ll
index 14944fab7d00d..6cb186b343133 100644
--- a/llvm/test/CodeGen/X86/strict-fadd-combines.ll
+++ b/llvm/test/CodeGen/X86/strict-fadd-combines.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64
define float @fneg_strict_fadd_to_strict_fsub(float %x, float %y) nounwind strictfp {
; X86-LABEL: fneg_strict_fadd_to_strict_fsub:
diff --git a/llvm/test/CodeGen/X86/strict-fsub-combines.ll b/llvm/test/CodeGen/X86/strict-fsub-combines.ll
index 774ea02ccd87a..299e1ba1790db 100644
--- a/llvm/test/CodeGen/X86/strict-fsub-combines.ll
+++ b/llvm/test/CodeGen/X86/strict-fsub-combines.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64
; FIXME: Missing fsub(x,fneg(y)) -> fadd(x,y) fold
define float @fneg_strict_fsub_to_strict_fadd(float %x, float %y) nounwind strictfp {
diff --git a/llvm/test/CodeGen/X86/strictfp-inlineasm.ll b/llvm/test/CodeGen/X86/strictfp-inlineasm.ll
index 674c12a7e9bf3..a96b762e488f5 100644
--- a/llvm/test/CodeGen/X86/strictfp-inlineasm.ll
+++ b/llvm/test/CodeGen/X86/strictfp-inlineasm.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=X64
define i32 @foo() strictfp {
; X86-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/stride-nine-with-base-reg.ll b/llvm/test/CodeGen/X86/stride-nine-with-base-reg.ll
index 3e55d24f4962e..08ad59fb1082d 100644
--- a/llvm/test/CodeGen/X86/stride-nine-with-base-reg.ll
+++ b/llvm/test/CodeGen/X86/stride-nine-with-base-reg.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-- -relocation-model=static | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -relocation-model=static | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
; CHECK-NOT: lea
; P should be sunk into the loop and folded into the address mode. There
diff --git a/llvm/test/CodeGen/X86/stride-reuse.ll b/llvm/test/CodeGen/X86/stride-reuse.ll
index 79b34a4506a49..368ac070721fa 100644
--- a/llvm/test/CodeGen/X86/stride-reuse.ll
+++ b/llvm/test/CodeGen/X86/stride-reuse.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mcpu=generic -mtriple=i686-- | FileCheck %s
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
; CHECK-NOT: lea
@B = external dso_local global [1000 x float], align 32
diff --git a/llvm/test/CodeGen/X86/sttni.ll b/llvm/test/CodeGen/X86/sttni.ll
index 39cbee54737c3..81ca5338429bf 100644
--- a/llvm/test/CodeGen/X86/sttni.ll
+++ b/llvm/test/CodeGen/X86/sttni.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
declare i32 @llvm.x86.sse42.pcmpestric128(<16 x i8> %lhs, i32, <16 x i8>, i32, i8)
declare i32 @llvm.x86.sse42.pcmpestri128(<16 x i8> %lhs, i32, <16 x i8>, i32, i8)
diff --git a/llvm/test/CodeGen/X86/sub-i512.ll b/llvm/test/CodeGen/X86/sub-i512.ll
index e968e5e27e2ce..61b5aadbd644d 100644
--- a/llvm/test/CodeGen/X86/sub-i512.ll
+++ b/llvm/test/CodeGen/X86/sub-i512.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,SSE
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512,AVX512VL
define i512 @test_sub_i512_reg_reg(i512 %a0, i512 %a1) nounwind {
; SSE-LABEL: test_sub_i512_reg_reg:
diff --git a/llvm/test/CodeGen/X86/sub-of-bias.ll b/llvm/test/CodeGen/X86/sub-of-bias.ll
index f9454c4e7d23e..d3dfce233ce3d 100644
--- a/llvm/test/CodeGen/X86/sub-of-bias.ll
+++ b/llvm/test/CodeGen/X86/sub-of-bias.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X86,NOBMI-X86
-; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefixes=X86,BMI-X86
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X64,NOBMI-X64
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefixes=X64,BMI-X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X86,NOBMI-X86
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefixes=X86,BMI-X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=X64,NOBMI-X64
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi < %s | FileCheck %s --check-prefixes=X64,BMI-X64
; Fold
; ptr - (ptr & mask)
diff --git a/llvm/test/CodeGen/X86/sub-of-not.ll b/llvm/test/CodeGen/X86/sub-of-not.ll
index 2b8f6c18ff086..75c079a916b6d 100644
--- a/llvm/test/CodeGen/X86/sub-of-not.ll
+++ b/llvm/test/CodeGen/X86/sub-of-not.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse,+sse2,+slow-lea,+slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X86,X86-SLOWLEA
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse,+sse2,-slow-lea,-slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X86,X86-FASTLEA
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse,+sse2,+slow-lea,+slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse,+sse2,-slow-lea,-slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse,+sse2,+slow-lea,+slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X86,X86-SLOWLEA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse,+sse2,-slow-lea,-slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X86,X86-FASTLEA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse,+sse2,+slow-lea,+slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse,+sse2,-slow-lea,-slow-3ops-lea | FileCheck %s --check-prefixes=ALL,X64
; These two forms are equivalent:
; sub %y, (xor %x, -1)
diff --git a/llvm/test/CodeGen/X86/sub-with-overflow.ll b/llvm/test/CodeGen/X86/sub-with-overflow.ll
index d3bd3b1cdf0ac..1b36f12e7fbb9 100644
--- a/llvm/test/CodeGen/X86/sub-with-overflow.ll
+++ b/llvm/test/CodeGen/X86/sub-with-overflow.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux | FileCheck %s
@ok = internal constant [4 x i8] c"%d\0A\00"
@no = internal constant [4 x i8] c"no\0A\00"
diff --git a/llvm/test/CodeGen/X86/sub.ll b/llvm/test/CodeGen/X86/sub.ll
index 55f9ef98ca795..c6c87de76ee9d 100644
--- a/llvm/test/CodeGen/X86/sub.ll
+++ b/llvm/test/CodeGen/X86/sub.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define i32 @test1(i32 %x) {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/subreg-to-reg-0.ll b/llvm/test/CodeGen/X86/subreg-to-reg-0.ll
index 517b5a4852912..aa5928235cdc4 100644
--- a/llvm/test/CodeGen/X86/subreg-to-reg-0.ll
+++ b/llvm/test/CodeGen/X86/subreg-to-reg-0.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; Do eliminate the zero-extension instruction and rely on
; x86-64's implicit zero-extension!
diff --git a/llvm/test/CodeGen/X86/subreg-to-reg-1.ll b/llvm/test/CodeGen/X86/subreg-to-reg-1.ll
index 49bff9e075e57..9e4c396a9ac87 100644
--- a/llvm/test/CodeGen/X86/subreg-to-reg-1.ll
+++ b/llvm/test/CodeGen/X86/subreg-to-reg-1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; Don't eliminate or coalesce away the explicit zero-extension!
; This is currently using an leal because of a 3-addressification detail,
diff --git a/llvm/test/CodeGen/X86/subreg-to-reg-2.ll b/llvm/test/CodeGen/X86/subreg-to-reg-2.ll
index 2d22f5e429b98..4945a4ee848bd 100644
--- a/llvm/test/CodeGen/X86/subreg-to-reg-2.ll
+++ b/llvm/test/CodeGen/X86/subreg-to-reg-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; rdar://6707985
%XXOO = type { %"struct.XXC::XXCC", ptr, %"struct.XXC::XXOO::$_71" }
diff --git a/llvm/test/CodeGen/X86/subreg-to-reg-3.ll b/llvm/test/CodeGen/X86/subreg-to-reg-3.ll
index 2bd5ca1716af4..36eb60eba1e0d 100644
--- a/llvm/test/CodeGen/X86/subreg-to-reg-3.ll
+++ b/llvm/test/CodeGen/X86/subreg-to-reg-3.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; Don't eliminate or coalesce away the explicit zero-extension!
diff --git a/llvm/test/CodeGen/X86/subreg-to-reg-4.ll b/llvm/test/CodeGen/X86/subreg-to-reg-4.ll
index 87ad3a4792e93..67f7ac957fd56 100644
--- a/llvm/test/CodeGen/X86/subreg-to-reg-4.ll
+++ b/llvm/test/CodeGen/X86/subreg-to-reg-4.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; Utilize implicit zero-extension on x86-64 to eliminate explicit
; zero-extensions. Shrink 64-bit adds to 32-bit when the high
diff --git a/llvm/test/CodeGen/X86/subreg-to-reg-6.ll b/llvm/test/CodeGen/X86/subreg-to-reg-6.ll
index f0dc17b556613..c1b7f4a43d56c 100644
--- a/llvm/test/CodeGen/X86/subreg-to-reg-6.ll
+++ b/llvm/test/CodeGen/X86/subreg-to-reg-6.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define i64 @foo() nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/sunkaddr-ext.ll b/llvm/test/CodeGen/X86/sunkaddr-ext.ll
index 4110428098395..c9ebaa474f60a 100644
--- a/llvm/test/CodeGen/X86/sunkaddr-ext.ll
+++ b/llvm/test/CodeGen/X86/sunkaddr-ext.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Test to make sure that if math that can roll over has been used we don't
; use the potential overflow as the basis for an address calculation later by
diff --git a/llvm/test/CodeGen/X86/swap.ll b/llvm/test/CodeGen/X86/swap.ll
index 3330403abd919..8985c5947c1cf 100644
--- a/llvm/test/CodeGen/X86/swap.ll
+++ b/llvm/test/CodeGen/X86/swap.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell | FileCheck %s -check-prefix=NOAA
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell -combiner-global-alias-analysis=1 | FileCheck %s -check-prefix=AA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell | FileCheck %s -check-prefix=NOAA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=haswell -combiner-global-alias-analysis=1 | FileCheck %s -check-prefix=AA
declare void @llvm.lifetime.start.p0(i64, ptr nocapture)
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1)
diff --git a/llvm/test/CodeGen/X86/swift-async-no-fastisel.ll b/llvm/test/CodeGen/X86/swift-async-no-fastisel.ll
index b60c8183480b6..9d542661f2f96 100644
--- a/llvm/test/CodeGen/X86/swift-async-no-fastisel.ll
+++ b/llvm/test/CodeGen/X86/swift-async-no-fastisel.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s --fast-isel=true --stop-after=finalize-isel -o %t \
+; RUN: llc -combiner-topological-sorting %s --fast-isel=true --stop-after=finalize-isel -o %t \
; RUN: -experimental-debug-variable-locations=false --global-isel=false
; RUN: FileCheck %s < %t
; RUN: FileCheck %s --check-prefix=INTRINSICS < %t
diff --git a/llvm/test/CodeGen/X86/swift-async-reg-win64.ll b/llvm/test/CodeGen/X86/swift-async-reg-win64.ll
index 97e90b5f48d13..7e5b155de7dbb 100644
--- a/llvm/test/CodeGen/X86/swift-async-reg-win64.ll
+++ b/llvm/test/CodeGen/X86/swift-async-reg-win64.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple x86_64-unknown-windows-msvc %s -o - | FileCheck %s
-; RUN: llc -mtriple x86_64-unknown-windows-msvc %s -o - -fast-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-windows-msvc %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-windows-msvc %s -o - -fast-isel | FileCheck %s
define ptr @argument(ptr swiftasync %in) {
ret ptr %in
diff --git a/llvm/test/CodeGen/X86/swift-async-reg.ll b/llvm/test/CodeGen/X86/swift-async-reg.ll
index 12cde0d3ce7e2..a34eba6d92607 100644
--- a/llvm/test/CodeGen/X86/swift-async-reg.ll
+++ b/llvm/test/CodeGen/X86/swift-async-reg.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-apple-darwin %s -o - | FileCheck %s
-; RUN: llc -mtriple=x86_64-apple-darwin %s -o - -fast-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin %s -o - -fast-isel | FileCheck %s
define ptr @argument(ptr swiftasync %in) {
; CHECK-LABEL: argument:
diff --git a/llvm/test/CodeGen/X86/swift-async-win64.ll b/llvm/test/CodeGen/X86/swift-async-win64.ll
index 1546a0fee2ec5..2fb75ce4707f4 100644
--- a/llvm/test/CodeGen/X86/swift-async-win64.ll
+++ b/llvm/test/CodeGen/X86/swift-async-win64.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple x86_64-unknown-windows-msvc %s -o - | FileCheck %s -check-prefix CHECK64
-; RUN: llc -mtriple i686-windows-msvc %s -o - | FileCheck %s -check-prefix CHECK32
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-windows-msvc %s -o - | FileCheck %s -check-prefix CHECK64
+; RUN: llc -combiner-topological-sorting -mtriple i686-windows-msvc %s -o - | FileCheck %s -check-prefix CHECK32
define void @simple(ptr swiftasync %context) "frame-pointer"="all" {
ret void
diff --git a/llvm/test/CodeGen/X86/swift-async.ll b/llvm/test/CodeGen/X86/swift-async.ll
index 0017d2af85878..ecb3f8e724dea 100644
--- a/llvm/test/CodeGen/X86/swift-async.ll
+++ b/llvm/test/CodeGen/X86/swift-async.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-apple-macosx12.0 %s -o - | FileCheck %s
-; RUN: llc -mtriple=i686-apple-darwin %s -o - | FileCheck %s --check-prefix=CHECK-32
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx12.0 %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-apple-darwin %s -o - | FileCheck %s --check-prefix=CHECK-32
define void @simple(ptr swiftasync %ctx) "frame-pointer"="all" {
diff --git a/llvm/test/CodeGen/X86/swift-dynamic-async-frame.ll b/llvm/test/CodeGen/X86/swift-dynamic-async-frame.ll
index db303df54f60e..625dec1be7192 100644
--- a/llvm/test/CodeGen/X86/swift-dynamic-async-frame.ll
+++ b/llvm/test/CodeGen/X86/swift-dynamic-async-frame.ll
@@ -1,10 +1,10 @@
-; RUN: llc -mtriple x86_64-apple-macosx12.0.0 %s -o - | FileCheck %s --check-prefix=CHECK-STATIC
-; RUN: llc -mtriple x86_64-apple-macosx12.0.0 -swift-async-fp=always %s -o - | FileCheck %s --check-prefix=CHECK-STATIC
-; RUN: llc -mtriple x86_64-apple-macosx12.0.0 -swift-async-fp=auto %s -o - | FileCheck %s --check-prefix=CHECK-STATIC
-; RUN: llc -mtriple x86_64-apple-macosx11.9.0 -swift-async-fp=always %s -o - | FileCheck %s --check-prefix=CHECK-STATIC
-; RUN: llc -mtriple x86_64-apple-macosx11.9.0 %s -o - | FileCheck %s --check-prefix=CHECK-STATIC
-; RUN: llc -mtriple x86_64-apple-macosx11.9.0 -swift-async-fp=auto %s -o - | FileCheck %s --check-prefix=CHECK-DYNAMIC
-; RUN: llc -mtriple x86_64-apple-macosx11.9.0 -swift-async-fp=never %s -o - | FileCheck %s --check-prefix=CHECK-NEVER
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-macosx12.0.0 %s -o - | FileCheck %s --check-prefix=CHECK-STATIC
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-macosx12.0.0 -swift-async-fp=always %s -o - | FileCheck %s --check-prefix=CHECK-STATIC
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-macosx12.0.0 -swift-async-fp=auto %s -o - | FileCheck %s --check-prefix=CHECK-STATIC
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-macosx11.9.0 -swift-async-fp=always %s -o - | FileCheck %s --check-prefix=CHECK-STATIC
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-macosx11.9.0 %s -o - | FileCheck %s --check-prefix=CHECK-STATIC
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-macosx11.9.0 -swift-async-fp=auto %s -o - | FileCheck %s --check-prefix=CHECK-DYNAMIC
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-macosx11.9.0 -swift-async-fp=never %s -o - | FileCheck %s --check-prefix=CHECK-NEVER
; CHECK-STATIC-LABEL: foo:
; CHECK-STATIC: btsq $60, %rbp
diff --git a/llvm/test/CodeGen/X86/swift-error.ll b/llvm/test/CodeGen/X86/swift-error.ll
index 71f80baa30144..d07f6ecc11d81 100644
--- a/llvm/test/CodeGen/X86/swift-error.ll
+++ b/llvm/test/CodeGen/X86/swift-error.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-unknown-windows-msvc -filetype asm -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-windows-msvc -filetype asm -o - %s | FileCheck %s
%swift.error = type opaque
diff --git a/llvm/test/CodeGen/X86/swift-return.ll b/llvm/test/CodeGen/X86/swift-return.ll
index f9b73d4eaf92c..a416fc400ba75 100644
--- a/llvm/test/CodeGen/X86/swift-return.ll
+++ b/llvm/test/CodeGen/X86/swift-return.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
-; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown -O0 | FileCheck --check-prefix=CHECK-O0 %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown -O0 | FileCheck --check-prefix=CHECK-O0 %s
@var = dso_local global i32 0
diff --git a/llvm/test/CodeGen/X86/swiftcc.ll b/llvm/test/CodeGen/X86/swiftcc.ll
index 2e71307fe764d..8800ab012be06 100644
--- a/llvm/test/CodeGen/X86/swiftcc.ll
+++ b/llvm/test/CodeGen/X86/swiftcc.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple x86_64-- -filetype asm -o - %s | FileCheck %s
-; RUN: llc -mtriple x86_64-unknown-windows-msvc -filetype asm -o - %s | FileCheck %s --check-prefix=MSVC
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-- -filetype asm -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-windows-msvc -filetype asm -o - %s | FileCheck %s --check-prefix=MSVC
define swiftcc void @f() {
%1 = alloca i8
diff --git a/llvm/test/CodeGen/X86/swifterror.ll b/llvm/test/CodeGen/X86/swifterror.ll
index 5699c447baf41..268b1083fc009 100644
--- a/llvm/test/CodeGen/X86/swifterror.ll
+++ b/llvm/test/CodeGen/X86/swifterror.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-apple-darwin -disable-block-placement | FileCheck --check-prefix=CHECK-APPLE %s
-; RUN: llc -verify-machineinstrs -O0 < %s -mtriple=x86_64-apple-darwin -disable-block-placement | FileCheck --check-prefix=CHECK-O0 %s
-; RUN: llc -verify-machineinstrs < %s -mtriple=i386-apple-darwin -disable-block-placement | FileCheck --check-prefix=CHECK-i386 %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=x86_64-apple-darwin -disable-block-placement | FileCheck --check-prefix=CHECK-APPLE %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -O0 < %s -mtriple=x86_64-apple-darwin -disable-block-placement | FileCheck --check-prefix=CHECK-O0 %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=i386-apple-darwin -disable-block-placement | FileCheck --check-prefix=CHECK-i386 %s
declare ptr @malloc(i64)
declare void @free(ptr)
diff --git a/llvm/test/CodeGen/X86/swiftself-win64.ll b/llvm/test/CodeGen/X86/swiftself-win64.ll
index 79ca5eb65912f..46b47ea5b53ff 100644
--- a/llvm/test/CodeGen/X86/swiftself-win64.ll
+++ b/llvm/test/CodeGen/X86/swiftself-win64.ll
@@ -1,5 +1,5 @@
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-windows-msvc -o - %s | FileCheck --check-prefix=CHECK --check-prefix=OPT %s
-; RUN: llc -O0 -verify-machineinstrs -mtriple=x86_64-unknown-windows-msvc -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown-windows-msvc -o - %s | FileCheck --check-prefix=CHECK --check-prefix=OPT %s
+; RUN: llc -combiner-topological-sorting -O0 -verify-machineinstrs -mtriple=x86_64-unknown-windows-msvc -o - %s | FileCheck %s
; Parameter with swiftself should be allocated to r13.
; CHECK-LABEL: swiftself_param:
diff --git a/llvm/test/CodeGen/X86/swiftself.ll b/llvm/test/CodeGen/X86/swiftself.ll
index 95452f2ee40b3..09753dbf5f6c2 100644
--- a/llvm/test/CodeGen/X86/swiftself.ll
+++ b/llvm/test/CodeGen/X86/swiftself.ll
@@ -1,5 +1,5 @@
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -o - %s | FileCheck --check-prefix=CHECK --check-prefix=OPT %s
-; RUN: llc -O0 -verify-machineinstrs -mtriple=x86_64-unknown-unknown -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown-unknown -o - %s | FileCheck --check-prefix=CHECK --check-prefix=OPT %s
+; RUN: llc -combiner-topological-sorting -O0 -verify-machineinstrs -mtriple=x86_64-unknown-unknown -o - %s | FileCheck %s
; Parameter with swiftself should be allocated to r13.
; CHECK-LABEL: swiftself_param:
diff --git a/llvm/test/CodeGen/X86/swifttail-async-i386.ll b/llvm/test/CodeGen/X86/swifttail-async-i386.ll
index 229e29de75252..1ce960c0d7946 100644
--- a/llvm/test/CodeGen/X86/swifttail-async-i386.ll
+++ b/llvm/test/CodeGen/X86/swifttail-async-i386.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i386-apple-darwin %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-apple-darwin %s -o - | FileCheck %s
declare void @clobber()
diff --git a/llvm/test/CodeGen/X86/swifttail-async-win64.ll b/llvm/test/CodeGen/X86/swifttail-async-win64.ll
index 82efeadd2b28e..3bd121c88411a 100644
--- a/llvm/test/CodeGen/X86/swifttail-async-win64.ll
+++ b/llvm/test/CodeGen/X86/swifttail-async-win64.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-unknown-windows-msvc %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-unknown-windows-msvc %s -o - | FileCheck %s
declare swifttailcc void @callee()
diff --git a/llvm/test/CodeGen/X86/swifttail-async.ll b/llvm/test/CodeGen/X86/swifttail-async.ll
index 488a88fde9430..8a48d6ad7dbcc 100644
--- a/llvm/test/CodeGen/X86/swifttail-async.ll
+++ b/llvm/test/CodeGen/X86/swifttail-async.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin %s -o - | FileCheck %s
declare swifttailcc void @swifttail_callee()
diff --git a/llvm/test/CodeGen/X86/swifttail-realign.ll b/llvm/test/CodeGen/X86/swifttail-realign.ll
index db31416ef2e49..9f5df95e1a802 100644
--- a/llvm/test/CodeGen/X86/swifttail-realign.ll
+++ b/llvm/test/CodeGen/X86/swifttail-realign.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux-gnu %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu %s -o - | FileCheck %s
declare swifttailcc void @callee([6 x i64], i64, i64)
diff --git a/llvm/test/CodeGen/X86/swifttail-return.ll b/llvm/test/CodeGen/X86/swifttail-return.ll
index 8bea68302b8c5..e1675d06a1079 100644
--- a/llvm/test/CodeGen/X86/swifttail-return.ll
+++ b/llvm/test/CodeGen/X86/swifttail-return.ll
@@ -1,5 +1,5 @@
-; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
-; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown -O0 | FileCheck %s
define swifttailcc [4 x i64] @return_int() {
; CHECK-LABEL: return_int:
diff --git a/llvm/test/CodeGen/X86/swifttailcc-store-ret-address-aliasing-stack-slot.ll b/llvm/test/CodeGen/X86/swifttailcc-store-ret-address-aliasing-stack-slot.ll
index b901d22f66392..3d974a8190805 100644
--- a/llvm/test/CodeGen/X86/swifttailcc-store-ret-address-aliasing-stack-slot.ll
+++ b/llvm/test/CodeGen/X86/swifttailcc-store-ret-address-aliasing-stack-slot.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - | FileCheck %s
target triple = "x86_64-apple-macosx"
diff --git a/llvm/test/CodeGen/X86/switch-bit-test-unreachable-default.ll b/llvm/test/CodeGen/X86/switch-bit-test-unreachable-default.ll
index 43ca1b1d0bc48..a4f420a506a32 100644
--- a/llvm/test/CodeGen/X86/switch-bit-test-unreachable-default.ll
+++ b/llvm/test/CodeGen/X86/switch-bit-test-unreachable-default.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=x86_64-- -global-isel=0 -print-after=finalize-isel \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -global-isel=0 -print-after=finalize-isel \
; RUN: -stop-after=finalize-isel %s -o /dev/null 2>&1 | \
; RUN: FileCheck %s --check-prefix=CHECK-SDISEL
-; RUN: llc -mtriple=x86_64-- -global-isel=1 -print-after=finalize-isel \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -global-isel=1 -print-after=finalize-isel \
; RUN: -stop-after=finalize-isel %s -o /dev/null 2>&1 | \
; RUN: FileCheck %s --check-prefix=CHECK-GISEL
diff --git a/llvm/test/CodeGen/X86/switch-bt.ll b/llvm/test/CodeGen/X86/switch-bt.ll
index 2bf7c46e67e18..4bb7630092143 100644
--- a/llvm/test/CodeGen/X86/switch-bt.ll
+++ b/llvm/test/CodeGen/X86/switch-bt.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-- < %s -jump-table-density=40 -switch-peel-threshold=101 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- < %s -jump-table-density=40 -switch-peel-threshold=101 | FileCheck %s
; This switch should use bit tests, and the third bit test case is just
; testing for one possible value, so it doesn't need a bt.
diff --git a/llvm/test/CodeGen/X86/switch-crit-edge-constant.ll b/llvm/test/CodeGen/X86/switch-crit-edge-constant.ll
index b87fdf0b33f6a..2070f599659d8 100644
--- a/llvm/test/CodeGen/X86/switch-crit-edge-constant.ll
+++ b/llvm/test/CodeGen/X86/switch-crit-edge-constant.ll
@@ -1,5 +1,5 @@
; PR925
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; CHECK: {{mov.*str1}}
; CHECK-NOT: {{mov.*str1}}
diff --git a/llvm/test/CodeGen/X86/switch-default-only.ll b/llvm/test/CodeGen/X86/switch-default-only.ll
index ac40fbbe389de..221293c20d0be 100644
--- a/llvm/test/CodeGen/X86/switch-default-only.ll
+++ b/llvm/test/CodeGen/X86/switch-default-only.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 -fast-isel=false -mtriple=i686-- < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -fast-isel=false -mtriple=i686-- < %s | FileCheck %s
; No need for branching when the default and only destination follows
; immediately after the switch.
diff --git a/llvm/test/CodeGen/X86/switch-density.ll b/llvm/test/CodeGen/X86/switch-density.ll
index 8055a2b876437..610110b9b3baa 100644
--- a/llvm/test/CodeGen/X86/switch-density.ll
+++ b/llvm/test/CodeGen/X86/switch-density.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-linux-gnu %s -o - -jump-table-density=25 | FileCheck %s --check-prefix=DENSE --check-prefix=CHECK
-; RUN: llc -mtriple=x86_64-linux-gnu %s -o - -jump-table-density=10 | FileCheck %s --check-prefix=SPARSE --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu %s -o - -jump-table-density=25 | FileCheck %s --check-prefix=DENSE --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu %s -o - -jump-table-density=10 | FileCheck %s --check-prefix=SPARSE --check-prefix=CHECK
declare void @g(i32)
diff --git a/llvm/test/CodeGen/X86/switch-edge-weight.ll b/llvm/test/CodeGen/X86/switch-edge-weight.ll
index 27db6d7b70494..83cf7713fd1d2 100644
--- a/llvm/test/CodeGen/X86/switch-edge-weight.ll
+++ b/llvm/test/CodeGen/X86/switch-edge-weight.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-- -print-after=finalize-isel %s -o /dev/null 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -print-after=finalize-isel %s -o /dev/null 2>&1 | FileCheck %s
declare void @foo(i32)
diff --git a/llvm/test/CodeGen/X86/switch-jump-table.ll b/llvm/test/CodeGen/X86/switch-jump-table.ll
index 931206f3c6e8a..02115c749af2d 100644
--- a/llvm/test/CodeGen/X86/switch-jump-table.ll
+++ b/llvm/test/CodeGen/X86/switch-jump-table.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i686-pc-gnu-linux < %s | FileCheck %s
-; RUN: llc -mtriple=i686-pc-gnu-linux -print-after=finalize-isel %s -o /dev/null 2>&1 | FileCheck %s -check-prefix=CHECK-JT-PROB
+; RUN: llc -combiner-topological-sorting -mtriple=i686-pc-gnu-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-pc-gnu-linux -print-after=finalize-isel %s -o /dev/null 2>&1 | FileCheck %s -check-prefix=CHECK-JT-PROB
; An unreachable default destination is ignored and no compare and branch
diff --git a/llvm/test/CodeGen/X86/switch-lower-peel-top-case.ll b/llvm/test/CodeGen/X86/switch-lower-peel-top-case.ll
index 8e9c112d05239..c241f84a34c58 100644
--- a/llvm/test/CodeGen/X86/switch-lower-peel-top-case.ll
+++ b/llvm/test/CodeGen/X86/switch-lower-peel-top-case.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux-gnu -stop-after=finalize-isel < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu -stop-after=finalize-isel < %s | FileCheck %s
define i32 @foo(i32 %n) !prof !1 {
entry:
diff --git a/llvm/test/CodeGen/X86/switch-or.ll b/llvm/test/CodeGen/X86/switch-or.ll
index b0177e547ded8..0106cc10e5e94 100644
--- a/llvm/test/CodeGen/X86/switch-or.ll
+++ b/llvm/test/CodeGen/X86/switch-or.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-- -asm-verbose=false < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -asm-verbose=false < %s | FileCheck %s
; Check that merging switch cases that differ in one bit works.
; CHECK-LABEL: test1
diff --git a/llvm/test/CodeGen/X86/switch-order-weight.ll b/llvm/test/CodeGen/X86/switch-order-weight.ll
index 8c0c1a7d8108b..fcf3bda4c8781 100644
--- a/llvm/test/CodeGen/X86/switch-order-weight.ll
+++ b/llvm/test/CodeGen/X86/switch-order-weight.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin11 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin11 < %s | FileCheck %s
; Check that the cases which lead to unreachable are checked after "10"
diff --git a/llvm/test/CodeGen/X86/switch-phi-const.ll b/llvm/test/CodeGen/X86/switch-phi-const.ll
index dba7666a14fc7..8019bf6e11523 100644
--- a/llvm/test/CodeGen/X86/switch-phi-const.ll
+++ b/llvm/test/CodeGen/X86/switch-phi-const.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc %s -o - -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - -mtriple=x86_64-- | FileCheck %s
@g = global i32 0
@effect = global i32 0
diff --git a/llvm/test/CodeGen/X86/switch-zextload.ll b/llvm/test/CodeGen/X86/switch-zextload.ll
index f83908ce417e6..388ee06123d4b 100644
--- a/llvm/test/CodeGen/X86/switch-zextload.ll
+++ b/llvm/test/CodeGen/X86/switch-zextload.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Do zextload, instead of a load and a separate zext.
diff --git a/llvm/test/CodeGen/X86/swizzle-2.ll b/llvm/test/CodeGen/X86/swizzle-2.ll
index 91c18bebe6bc5..64125b1fa5aa7 100644
--- a/llvm/test/CodeGen/X86/swizzle-2.ll
+++ b/llvm/test/CodeGen/X86/swizzle-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=corei7 | FileCheck %s
; Test that we correctly fold a shuffle that performs a swizzle of another
; shuffle node according to the rule
diff --git a/llvm/test/CodeGen/X86/swizzle-avx2.ll b/llvm/test/CodeGen/X86/swizzle-avx2.ll
index 61d4208c79a5a..c479db3ed29ed 100644
--- a/llvm/test/CodeGen/X86/swizzle-avx2.ll
+++ b/llvm/test/CodeGen/X86/swizzle-avx2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx2 | FileCheck %s
; Test that we correctly fold a shuffle that performs a swizzle of another
; shuffle node according to the rule
diff --git a/llvm/test/CodeGen/X86/symbol-name.ll b/llvm/test/CodeGen/X86/symbol-name.ll
index dd9be14fb053e..420abb06ed50e 100644
--- a/llvm/test/CodeGen/X86/symbol-name.ll
+++ b/llvm/test/CodeGen/X86/symbol-name.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64 -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -relocation-model=pic | FileCheck %s
; CHECK: .globl "\\\""
; CHECK-NEXT: "\\\"":
diff --git a/llvm/test/CodeGen/X86/symbol-redefinition.ll b/llvm/test/CodeGen/X86/symbol-redefinition.ll
index d6e7327075de5..46a1ed76f520a 100644
--- a/llvm/test/CodeGen/X86/symbol-redefinition.ll
+++ b/llvm/test/CodeGen/X86/symbol-redefinition.ll
@@ -1,4 +1,4 @@
-; RUN: not llc -mtriple=x86_64-unknown-unknown %s -o - 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown %s -o - 2>&1 | FileCheck %s
; CHECK: <unknown>:0: error: symbol 'fn' is already defined
define void @fn() section "fn" {
diff --git a/llvm/test/CodeGen/X86/system-intrinsics-64-xsave.ll b/llvm/test/CodeGen/X86/system-intrinsics-64-xsave.ll
index 1687572fa85b5..32d23dce95b5f 100644
--- a/llvm/test/CodeGen/X86/system-intrinsics-64-xsave.ll
+++ b/llvm/test/CodeGen/X86/system-intrinsics-64-xsave.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xsave | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xsave | FileCheck %s
define void @test_xsave(ptr %ptr, i32 %hi, i32 %lo) {
; CHECK-LABEL: test_xsave
diff --git a/llvm/test/CodeGen/X86/system-intrinsics-64-xsavec.ll b/llvm/test/CodeGen/X86/system-intrinsics-64-xsavec.ll
index b5111aff5e723..d47cb8de05845 100644
--- a/llvm/test/CodeGen/X86/system-intrinsics-64-xsavec.ll
+++ b/llvm/test/CodeGen/X86/system-intrinsics-64-xsavec.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xsave,+xsavec | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xsave,+xsavec | FileCheck %s
define void @test_xsavec(ptr %ptr, i32 %hi, i32 %lo) {
; CHECK-LABEL: test_xsavec
diff --git a/llvm/test/CodeGen/X86/system-intrinsics-64-xsaveopt.ll b/llvm/test/CodeGen/X86/system-intrinsics-64-xsaveopt.ll
index 1fb1c91bef074..a1e76d31cd6ea 100644
--- a/llvm/test/CodeGen/X86/system-intrinsics-64-xsaveopt.ll
+++ b/llvm/test/CodeGen/X86/system-intrinsics-64-xsaveopt.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xsaveopt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xsaveopt | FileCheck %s
define void @test_xsaveopt(ptr %ptr, i32 %hi, i32 %lo) {
; CHECK-LABEL: test_xsaveopt
diff --git a/llvm/test/CodeGen/X86/system-intrinsics-64-xsaves.ll b/llvm/test/CodeGen/X86/system-intrinsics-64-xsaves.ll
index 4f4d72a23fa12..c6458cde52599 100644
--- a/llvm/test/CodeGen/X86/system-intrinsics-64-xsaves.ll
+++ b/llvm/test/CodeGen/X86/system-intrinsics-64-xsaves.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xsave,+xsaves | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xsave,+xsaves | FileCheck %s
define void @test_xsaves(ptr %ptr, i32 %hi, i32 %lo) {
; CHECK-LABEL: test_xsaves
diff --git a/llvm/test/CodeGen/X86/system-intrinsics-64.ll b/llvm/test/CodeGen/X86/system-intrinsics-64.ll
index c0fbcde18806e..e4fdb59b20e82 100644
--- a/llvm/test/CodeGen/X86/system-intrinsics-64.ll
+++ b/llvm/test/CodeGen/X86/system-intrinsics-64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+fxsr | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+fxsr | FileCheck %s
define void @test_fxsave(ptr %ptr) {
; CHECK-LABEL: test_fxsave
diff --git a/llvm/test/CodeGen/X86/system-intrinsics-xgetbv.ll b/llvm/test/CodeGen/X86/system-intrinsics-xgetbv.ll
index ffabd3a230907..d8f3ce56acd0b 100644
--- a/llvm/test/CodeGen/X86/system-intrinsics-xgetbv.ll
+++ b/llvm/test/CodeGen/X86/system-intrinsics-xgetbv.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+xsave | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xsave | FileCheck %s --check-prefix=CHECK64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+xsave | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xsave | FileCheck %s --check-prefix=CHECK64
define i64 @test_xgetbv(i32 %in) {
; CHECK-LABEL: test_xgetbv
diff --git a/llvm/test/CodeGen/X86/system-intrinsics-xsave.ll b/llvm/test/CodeGen/X86/system-intrinsics-xsave.ll
index e4373bf2b9f9e..ef54596c9e35f 100644
--- a/llvm/test/CodeGen/X86/system-intrinsics-xsave.ll
+++ b/llvm/test/CodeGen/X86/system-intrinsics-xsave.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+xsave | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+xsave | FileCheck %s
define void @test_xsave(ptr %ptr, i32 %hi, i32 %lo) {
; CHECK-LABEL: test_xsave
diff --git a/llvm/test/CodeGen/X86/system-intrinsics-xsavec.ll b/llvm/test/CodeGen/X86/system-intrinsics-xsavec.ll
index 0be67104cd6bb..366272dad9483 100644
--- a/llvm/test/CodeGen/X86/system-intrinsics-xsavec.ll
+++ b/llvm/test/CodeGen/X86/system-intrinsics-xsavec.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+xsave,+xsavec | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+xsave,+xsavec | FileCheck %s
define void @test_xsavec(ptr %ptr, i32 %hi, i32 %lo) {
; CHECK-LABEL: test_xsavec
diff --git a/llvm/test/CodeGen/X86/system-intrinsics-xsaveopt.ll b/llvm/test/CodeGen/X86/system-intrinsics-xsaveopt.ll
index a640c5ca25c01..13fba52894498 100644
--- a/llvm/test/CodeGen/X86/system-intrinsics-xsaveopt.ll
+++ b/llvm/test/CodeGen/X86/system-intrinsics-xsaveopt.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+xsave,+xsaveopt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+xsave,+xsaveopt | FileCheck %s
define void @test_xsaveopt(ptr %ptr, i32 %hi, i32 %lo) {
; CHECK-LABEL: test_xsaveopt
diff --git a/llvm/test/CodeGen/X86/system-intrinsics-xsaves.ll b/llvm/test/CodeGen/X86/system-intrinsics-xsaves.ll
index 23bee3482891a..4dc76ddf979bf 100644
--- a/llvm/test/CodeGen/X86/system-intrinsics-xsaves.ll
+++ b/llvm/test/CodeGen/X86/system-intrinsics-xsaves.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+xsave,+xsaves | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+xsave,+xsaves | FileCheck %s
define void @test_xsaves(ptr %ptr, i32 %hi, i32 %lo) {
; CHECK-LABEL: test_xsaves
diff --git a/llvm/test/CodeGen/X86/system-intrinsics-xsetbv.ll b/llvm/test/CodeGen/X86/system-intrinsics-xsetbv.ll
index 64ae257cb376c..0f7eea250f13a 100644
--- a/llvm/test/CodeGen/X86/system-intrinsics-xsetbv.ll
+++ b/llvm/test/CodeGen/X86/system-intrinsics-xsetbv.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK64
define void @test_xsetbv(i32 %in, i32 %high, i32 %low) {
; CHECK-LABEL: test_xsetbv
diff --git a/llvm/test/CodeGen/X86/system-intrinsics.ll b/llvm/test/CodeGen/X86/system-intrinsics.ll
index b4914a791f5a2..6efa8559cae78 100644
--- a/llvm/test/CodeGen/X86/system-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/system-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+fxsr | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+fxsr | FileCheck %s
define void @test_fxsave(ptr %ptr) {
; CHECK-LABEL: test_fxsave
diff --git a/llvm/test/CodeGen/X86/tagged-globals-jump-table.ll b/llvm/test/CodeGen/X86/tagged-globals-jump-table.ll
index a436df0c3f555..78c3403171a4d 100644
--- a/llvm/test/CodeGen/X86/tagged-globals-jump-table.ll
+++ b/llvm/test/CodeGen/X86/tagged-globals-jump-table.ll
@@ -1,5 +1,5 @@
-; RUN: llc --relocation-model=pic < %s | FileCheck %s
-; RUN: llc --relocation-model=static < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting --relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting --relocation-model=static < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/tagged-globals-pic.ll b/llvm/test/CodeGen/X86/tagged-globals-pic.ll
index 156487ee163a2..cd29277635d94 100644
--- a/llvm/test/CodeGen/X86/tagged-globals-pic.ll
+++ b/llvm/test/CodeGen/X86/tagged-globals-pic.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc --relocation-model=pic -code-model=small < %s | FileCheck %s
-; RUN: llc --relocation-model=pic -code-model=medium < %s | FileCheck %s
-; RUN: llc --relocation-model=pic -code-model=large < %s | FileCheck %s --check-prefix=LARGE
+; RUN: llc -combiner-topological-sorting --relocation-model=pic -code-model=small < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting --relocation-model=pic -code-model=medium < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting --relocation-model=pic -code-model=large < %s | FileCheck %s --check-prefix=LARGE
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/tagged-globals-static.ll b/llvm/test/CodeGen/X86/tagged-globals-static.ll
index 0eb21267b06e0..f0648e0e62932 100644
--- a/llvm/test/CodeGen/X86/tagged-globals-static.ll
+++ b/llvm/test/CodeGen/X86/tagged-globals-static.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc --relocation-model=static -code-model=small < %s | FileCheck %s
-; RUN: llc --relocation-model=static -code-model=medium < %s | FileCheck %s
-; RUN: llc --relocation-model=static -code-model=large < %s | FileCheck %s --check-prefix=LARGE
+; RUN: llc -combiner-topological-sorting --relocation-model=static -code-model=small < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting --relocation-model=static -code-model=medium < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting --relocation-model=static -code-model=large < %s | FileCheck %s --check-prefix=LARGE
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/tail-call-attrs.ll b/llvm/test/CodeGen/X86/tail-call-attrs.ll
index 90f1346de9aaa..9242878f06a3f 100644
--- a/llvm/test/CodeGen/X86/tail-call-attrs.ll
+++ b/llvm/test/CodeGen/X86/tail-call-attrs.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-darwin -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin -o - %s | FileCheck %s
; Simple case: completely identical returns, even with extensions, shouldn't be
; a barrier to tail calls.
diff --git a/llvm/test/CodeGen/X86/tail-call-casts.ll b/llvm/test/CodeGen/X86/tail-call-casts.ll
index 5224e636819b1..58f38529b8112 100644
--- a/llvm/test/CodeGen/X86/tail-call-casts.ll
+++ b/llvm/test/CodeGen/X86/tail-call-casts.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -mtriple=i686-unknown-linux-gnu -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -o - %s | FileCheck %s
declare void @g_bool(i1 zeroext)
diff --git a/llvm/test/CodeGen/X86/tail-call-got.ll b/llvm/test/CodeGen/X86/tail-call-got.ll
index 20d1a87b626a3..0879320040a53 100644
--- a/llvm/test/CodeGen/X86/tail-call-got.ll
+++ b/llvm/test/CodeGen/X86/tail-call-got.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=pic -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -mattr=+sse2 | FileCheck %s
; We used to do tail calls through the GOT for these symbols, but it was
; disabled due to PR15086.
diff --git a/llvm/test/CodeGen/X86/tail-call-legality.ll b/llvm/test/CodeGen/X86/tail-call-legality.ll
index a5ae82db11fa1..ec84e15d63fff 100644
--- a/llvm/test/CodeGen/X86/tail-call-legality.ll
+++ b/llvm/test/CodeGen/X86/tail-call-legality.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-- -o - < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -o - < %s | FileCheck %s
; This used to be classified as a tail call because of a mismatch in the
; arguments seen by Analysis.cpp and ISelLowering. As seen by ISelLowering, they
diff --git a/llvm/test/CodeGen/X86/tail-call-mutable-memarg.ll b/llvm/test/CodeGen/X86/tail-call-mutable-memarg.ll
index 5219a321bc538..998abb95c2283 100644
--- a/llvm/test/CodeGen/X86/tail-call-mutable-memarg.ll
+++ b/llvm/test/CodeGen/X86/tail-call-mutable-memarg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Make sure we check that forwarded memory arguments are not modified when tail
; calling. inalloca and copy arg elimination make argument slots mutable.
diff --git a/llvm/test/CodeGen/X86/tail-call-parameter-attrs-mismatch.ll b/llvm/test/CodeGen/X86/tail-call-parameter-attrs-mismatch.ll
index 73ce3b781f9df..1c47d5bf7aa0b 100644
--- a/llvm/test/CodeGen/X86/tail-call-parameter-attrs-mismatch.ll
+++ b/llvm/test/CodeGen/X86/tail-call-parameter-attrs-mismatch.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-unknown-linux-gnu -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -o - %s | FileCheck %s
declare void @f(i16 signext)
declare void @g(i32 signext)
diff --git a/llvm/test/CodeGen/X86/tail-call-win64.ll b/llvm/test/CodeGen/X86/tail-call-win64.ll
index e9e1292624166..bc2dd6ecf04cc 100644
--- a/llvm/test/CodeGen/X86/tail-call-win64.ll
+++ b/llvm/test/CodeGen/X86/tail-call-win64.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-windows -show-mc-encoding < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows -show-mc-encoding < %s | FileCheck %s
; The Win64 ABI wants tail jmps to use a REX_W prefix so it can distinguish
; in-function jumps from function exiting jumps.
diff --git a/llvm/test/CodeGen/X86/tail-calls-compatible-attrs.ll b/llvm/test/CodeGen/X86/tail-calls-compatible-attrs.ll
index 83c9e808505b0..4c684516b8775 100644
--- a/llvm/test/CodeGen/X86/tail-calls-compatible-attrs.ll
+++ b/llvm/test/CodeGen/X86/tail-calls-compatible-attrs.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
declare dso_local ptr @foo()
diff --git a/llvm/test/CodeGen/X86/tail-dup-addr.ll b/llvm/test/CodeGen/X86/tail-dup-addr.ll
index 9cc3f46e7699d..8daa58d3f5325 100644
--- a/llvm/test/CodeGen/X86/tail-dup-addr.ll
+++ b/llvm/test/CodeGen/X86/tail-dup-addr.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; Test that we don't drop a block that has its address taken.
diff --git a/llvm/test/CodeGen/X86/tail-dup-asm-goto.ll b/llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
index acfa5d59fcb2f..5b40c35a7e802 100644
--- a/llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
+++ b/llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc -mtriple=x86_64-linux -stop-after=early-tailduplication \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux -stop-after=early-tailduplication \
; RUN: -verify-machineinstrs < %s | FileCheck %s
; Ensure that we don't duplicate a block with an "INLINEASM_BR" instruction
diff --git a/llvm/test/CodeGen/X86/tail-dup-catchret.ll b/llvm/test/CodeGen/X86/tail-dup-catchret.ll
index 0a9a2d6272476..4136099858a46 100644
--- a/llvm/test/CodeGen/X86/tail-dup-catchret.ll
+++ b/llvm/test/CodeGen/X86/tail-dup-catchret.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i686-pc-windows-msvc18.0.0"
diff --git a/llvm/test/CodeGen/X86/tail-dup-debugloc.ll b/llvm/test/CodeGen/X86/tail-dup-debugloc.ll
index 6e689e157ab1b..0f3bde4dfe2fe 100644
--- a/llvm/test/CodeGen/X86/tail-dup-debugloc.ll
+++ b/llvm/test/CodeGen/X86/tail-dup-debugloc.ll
@@ -1,4 +1,4 @@
-; RUN: llc -stop-after=early-tailduplication < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -stop-after=early-tailduplication < %s | FileCheck %s
;
; Check that DebugLoc attached to the branch instruction of
; 'while.cond1.preheader.lr.ph' survives after tailduplication pass.
diff --git a/llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll b/llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
index 72e4fe410e269..925ee2bd41251 100644
--- a/llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
+++ b/llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; Function Attrs: nounwind uwtable
define void @tail_dup_merge_loops(i32 %a, ptr %b, ptr %c) local_unnamed_addr #0 {
diff --git a/llvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll b/llvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll
index 862f60c063804..b3e0d5ca096ce 100644
--- a/llvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll
+++ b/llvm/test/CodeGen/X86/tail-dup-multiple-latch-loop.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define ptr @large_loop_switch(ptr %p) {
; CHECK-LABEL: large_loop_switch:
; CHECK: # %bb.0: # %entry
diff --git a/llvm/test/CodeGen/X86/tail-dup-no-other-successor.ll b/llvm/test/CodeGen/X86/tail-dup-no-other-successor.ll
index 1b8bf8eea5df2..1c3fef8869406 100644
--- a/llvm/test/CodeGen/X86/tail-dup-no-other-successor.ll
+++ b/llvm/test/CodeGen/X86/tail-dup-no-other-successor.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O3 -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -o - %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/tail-dup-partial.ll b/llvm/test/CodeGen/X86/tail-dup-partial.ll
index 292d59d3450d3..f454059401ffc 100644
--- a/llvm/test/CodeGen/X86/tail-dup-partial.ll
+++ b/llvm/test/CodeGen/X86/tail-dup-partial.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -O3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -O3 | FileCheck %s
; Function Attrs: uwtable
; When tail-duplicating during placement, we work backward from blocks with
diff --git a/llvm/test/CodeGen/X86/tail-dup-repeat.ll b/llvm/test/CodeGen/X86/tail-dup-repeat.ll
index 7a9eb0c3fb85f..5f67a786dff4e 100644
--- a/llvm/test/CodeGen/X86/tail-dup-repeat.ll
+++ b/llvm/test/CodeGen/X86/tail-dup-repeat.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -debug-entry-values | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -debug-entry-values | FileCheck %s
; Function Attrs: uwtable
; When tail-duplicating during placement, we work backward from blocks with
diff --git a/llvm/test/CodeGen/X86/tail-merge-debugloc.ll b/llvm/test/CodeGen/X86/tail-merge-debugloc.ll
index 367e86341fe00..8190d8cb4aec0 100644
--- a/llvm/test/CodeGen/X86/tail-merge-debugloc.ll
+++ b/llvm/test/CodeGen/X86/tail-merge-debugloc.ll
@@ -1,4 +1,4 @@
-; RUN: llc -stop-after=branch-folder < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -stop-after=branch-folder < %s | FileCheck %s
;
; bb2 and bb3 in the IR below will be tail-merged into a single basic block.
; As br instructions in bb2 and bb3 have the same debug location, make sure that
diff --git a/llvm/test/CodeGen/X86/tail-merge-identical.ll b/llvm/test/CodeGen/X86/tail-merge-identical.ll
index 166404afb08ce..241efcd4620c7 100644
--- a/llvm/test/CodeGen/X86/tail-merge-identical.ll
+++ b/llvm/test/CodeGen/X86/tail-merge-identical.ll
@@ -1,4 +1,4 @@
-; RUN: llc -o - -verify-machineinstrs %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - -verify-machineinstrs %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/tail-merge-unreachable.ll b/llvm/test/CodeGen/X86/tail-merge-unreachable.ll
index 9afdabd4ce13c..9531f77f3459b 100644
--- a/llvm/test/CodeGen/X86/tail-merge-unreachable.ll
+++ b/llvm/test/CodeGen/X86/tail-merge-unreachable.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux-gnu %s -o - -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu %s -o - -verify-machineinstrs | FileCheck %s
define i32 @tail_merge_unreachable(i32 %i, i1 %arg) {
entry:
diff --git a/llvm/test/CodeGen/X86/tail-merge-wineh.ll b/llvm/test/CodeGen/X86/tail-merge-wineh.ll
index a208368e262ac..569b426bbfb59 100644
--- a/llvm/test/CodeGen/X86/tail-merge-wineh.ll
+++ b/llvm/test/CodeGen/X86/tail-merge-wineh.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Started from this code:
; void f() {
diff --git a/llvm/test/CodeGen/X86/tail-opts.ll b/llvm/test/CodeGen/X86/tail-opts.ll
index d9ab2f7d1f5fb..d51cc550cca9a 100644
--- a/llvm/test/CodeGen/X86/tail-opts.ll
+++ b/llvm/test/CodeGen/X86/tail-opts.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -post-RA-scheduler=true -disable-cgp-delete-phis | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -post-RA-scheduler=true -disable-cgp-delete-phis | FileCheck %s
declare dso_local void @bar(i32)
declare dso_local void @car(i32)
diff --git a/llvm/test/CodeGen/X86/tail-threshold.ll b/llvm/test/CodeGen/X86/tail-threshold.ll
index 41ea9127dfb42..aa4643620012f 100644
--- a/llvm/test/CodeGen/X86/tail-threshold.ll
+++ b/llvm/test/CodeGen/X86/tail-threshold.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-pc-linux-gnu -tail-merge-threshold 2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnu -tail-merge-threshold 2 < %s | FileCheck %s
; Test that we still do some merging if a block has more than
; tail-merge-threshold predecessors.
diff --git a/llvm/test/CodeGen/X86/tailcall-3regparm.ll b/llvm/test/CodeGen/X86/tailcall-3regparm.ll
index 8a06a1ff16149..1302f0603a8b2 100644
--- a/llvm/test/CodeGen/X86/tailcall-3regparm.ll
+++ b/llvm/test/CodeGen/X86/tailcall-3regparm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-linux-gnu -mcpu=pentium | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu -mcpu=pentium | FileCheck %s
; Tail call should not make register allocation fail (x86-32)
diff --git a/llvm/test/CodeGen/X86/tailcall-64.ll b/llvm/test/CodeGen/X86/tailcall-64.ll
index 915030ae9da12..55d0d1f9650fb 100644
--- a/llvm/test/CodeGen/X86/tailcall-64.ll
+++ b/llvm/test/CodeGen/X86/tailcall-64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-apple-macosx -mcpu=core2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx -mcpu=core2 < %s | FileCheck %s
declare i64 @testi()
diff --git a/llvm/test/CodeGen/X86/tailcall-assume.ll b/llvm/test/CodeGen/X86/tailcall-assume.ll
index 0f2171b6cf236..de71f1580328b 100644
--- a/llvm/test/CodeGen/X86/tailcall-assume.ll
+++ b/llvm/test/CodeGen/X86/tailcall-assume.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
; Intrinsic call to @llvm.assume should not prevent tail call optimization.
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/tailcall-calleesave.ll b/llvm/test/CodeGen/X86/tailcall-calleesave.ll
index ed65f7963396c..c3fb201909d7f 100644
--- a/llvm/test/CodeGen/X86/tailcall-calleesave.ll
+++ b/llvm/test/CodeGen/X86/tailcall-calleesave.ll
@@ -1,4 +1,4 @@
-; RUN: llc -tailcallopt -mcpu=core < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -tailcallopt -mcpu=core < %s | FileCheck %s
target triple = "i686-apple-darwin"
diff --git a/llvm/test/CodeGen/X86/tailcall-caller-nocsr.ll b/llvm/test/CodeGen/X86/tailcall-caller-nocsr.ll
index 0385017a1ced7..6015729068867 100644
--- a/llvm/test/CodeGen/X86/tailcall-caller-nocsr.ll
+++ b/llvm/test/CodeGen/X86/tailcall-caller-nocsr.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mattr=-sse,-avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mattr=-sse,-avx | FileCheck %s
@.str = private unnamed_addr constant [6 x i8] c"%d %d\00", align 1
diff --git a/llvm/test/CodeGen/X86/tailcall-cgp-dup.ll b/llvm/test/CodeGen/X86/tailcall-cgp-dup.ll
index ecbbaf3ab362d..bda534bec0bbc 100644
--- a/llvm/test/CodeGen/X86/tailcall-cgp-dup.ll
+++ b/llvm/test/CodeGen/X86/tailcall-cgp-dup.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' %s -mtriple=x86_64-apple-darwin -o - | FileCheck %s --check-prefix OPT
; Teach CGP to dup returns to enable tail call optimization.
diff --git a/llvm/test/CodeGen/X86/tailcall-disable.ll b/llvm/test/CodeGen/X86/tailcall-disable.ll
index 165234b0898af..6df8e9469260d 100644
--- a/llvm/test/CodeGen/X86/tailcall-disable.ll
+++ b/llvm/test/CodeGen/X86/tailcall-disable.ll
@@ -1,5 +1,5 @@
-; RUN: llc -disable-tail-calls < %s | FileCheck --check-prefix=CALL %s
-; RUN: llc < %s | FileCheck --check-prefix=JMP %s
+; RUN: llc -combiner-topological-sorting -disable-tail-calls < %s | FileCheck --check-prefix=CALL %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck --check-prefix=JMP %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/tailcall-extract.ll b/llvm/test/CodeGen/X86/tailcall-extract.ll
index 7a6c75c44ca7d..211c543883683 100644
--- a/llvm/test/CodeGen/X86/tailcall-extract.ll
+++ b/llvm/test/CodeGen/X86/tailcall-extract.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
; RUN: opt -passes='require<profile-summary>,function(codegenprepare)' -S -mtriple=x86_64-linux < %s | FileCheck %s --check-prefix OPT
diff --git a/llvm/test/CodeGen/X86/tailcall-fastisel.ll b/llvm/test/CodeGen/X86/tailcall-fastisel.ll
index c9de079d1d075..9493b6141dba5 100644
--- a/llvm/test/CodeGen/X86/tailcall-fastisel.ll
+++ b/llvm/test/CodeGen/X86/tailcall-fastisel.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -tailcallopt -fast-isel -fast-isel-abort=1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -tailcallopt -fast-isel -fast-isel-abort=1 | FileCheck %s
%0 = type { i64, i32, ptr }
diff --git a/llvm/test/CodeGen/X86/tailcall-largecode.ll b/llvm/test/CodeGen/X86/tailcall-largecode.ll
index d3aa48cfa57f0..1583ca0bd788e 100644
--- a/llvm/test/CodeGen/X86/tailcall-largecode.ll
+++ b/llvm/test/CodeGen/X86/tailcall-largecode.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -tailcallopt -code-model=large -enable-misched=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -tailcallopt -code-model=large -enable-misched=false | FileCheck %s
declare fastcc i32 @callee(i32 %arg)
define fastcc i32 @directcall(i32 %arg) {
diff --git a/llvm/test/CodeGen/X86/tailcall-lifetime-end.ll b/llvm/test/CodeGen/X86/tailcall-lifetime-end.ll
index 5c5de32caa9df..6cf576dd6d680 100644
--- a/llvm/test/CodeGen/X86/tailcall-lifetime-end.ll
+++ b/llvm/test/CodeGen/X86/tailcall-lifetime-end.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -o - %s | FileCheck %s
; A lifetime end intrinsic should not prevent a call from being tail call
; optimized.
diff --git a/llvm/test/CodeGen/X86/tailcall-mem-intrinsics.ll b/llvm/test/CodeGen/X86/tailcall-mem-intrinsics.ll
index 19dfe029a0691..e81a6e0c90c47 100644
--- a/llvm/test/CodeGen/X86/tailcall-mem-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/tailcall-mem-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
; CHECK-LABEL: tail_memcpy
; CHECK: jmp memcpy
diff --git a/llvm/test/CodeGen/X86/tailcall-mem_enoughregs.ll b/llvm/test/CodeGen/X86/tailcall-mem_enoughregs.ll
index f242053ecb152..e58de813f3187 100644
--- a/llvm/test/CodeGen/X86/tailcall-mem_enoughregs.ll
+++ b/llvm/test/CodeGen/X86/tailcall-mem_enoughregs.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefix=CHECK --check-prefix=LIN32
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK --check-prefix=LIN64
-; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck %s --check-prefix=CHECK --check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-gnu | FileCheck %s --check-prefix=CHECK --check-prefix=LIN32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefix=CHECK --check-prefix=LIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 | FileCheck %s --check-prefix=CHECK --check-prefix=WIN64
; Check that we only fold the address computation (load) into a tail call
; when we're sure there is enough volatile registers available.
diff --git a/llvm/test/CodeGen/X86/tailcall-msvc-conventions.ll b/llvm/test/CodeGen/X86/tailcall-msvc-conventions.ll
index dc5a9eb87225c..0834f5c6874b0 100644
--- a/llvm/test/CodeGen/X86/tailcall-msvc-conventions.ll
+++ b/llvm/test/CodeGen/X86/tailcall-msvc-conventions.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i686-unknown-linux-gnu -O1 < %s | FileCheck %s
-; RUN: llc -mtriple=i686-unknown-linux-gnu -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -O1 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux-gnu -O0 < %s | FileCheck %s
; The MSVC family of x86 calling conventions makes tail calls really tricky.
; Tests of all the various combinations should live here.
diff --git a/llvm/test/CodeGen/X86/tailcall-multiret.ll b/llvm/test/CodeGen/X86/tailcall-multiret.ll
index bf573703fc28d..d5d303b4c7e4e 100644
--- a/llvm/test/CodeGen/X86/tailcall-multiret.ll
+++ b/llvm/test/CodeGen/X86/tailcall-multiret.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mcpu=core2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mcpu=core2 | FileCheck %s
; See PR19530
declare double @llvm.powi.f64.i32(double %Val, i32 %power)
define <3 x double> @julia_foo17589(i32 %arg) {
diff --git a/llvm/test/CodeGen/X86/tailcall-nofpclass.ll b/llvm/test/CodeGen/X86/tailcall-nofpclass.ll
index fd085bb1244fb..086dddd9fa60f 100644
--- a/llvm/test/CodeGen/X86/tailcall-nofpclass.ll
+++ b/llvm/test/CodeGen/X86/tailcall-nofpclass.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
; Ensures that taillcall optimization can still be
; performed when nofpclass is used.
diff --git a/llvm/test/CodeGen/X86/tailcall-range.ll b/llvm/test/CodeGen/X86/tailcall-range.ll
index 6ae7405ebc4a9..cb743b97550b9 100644
--- a/llvm/test/CodeGen/X86/tailcall-range.ll
+++ b/llvm/test/CodeGen/X86/tailcall-range.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
define range(i32 0, 2) i32 @foo(ptr %this) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/tailcall-readnone.ll b/llvm/test/CodeGen/X86/tailcall-readnone.ll
index 4559937b963b1..27144bc7f5d02 100644
--- a/llvm/test/CodeGen/X86/tailcall-readnone.ll
+++ b/llvm/test/CodeGen/X86/tailcall-readnone.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -o - %s | FileCheck %s
define void @f(ptr %p) unnamed_addr {
entry:
diff --git a/llvm/test/CodeGen/X86/tailcall-returndup-void.ll b/llvm/test/CodeGen/X86/tailcall-returndup-void.ll
index 7110308c602cb..1a9e0ea3844a7 100644
--- a/llvm/test/CodeGen/X86/tailcall-returndup-void.ll
+++ b/llvm/test/CodeGen/X86/tailcall-returndup-void.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; CHECK: rBM_info
; CHECK-NOT: ret
diff --git a/llvm/test/CodeGen/X86/tailcall-ri64.ll b/llvm/test/CodeGen/X86/tailcall-ri64.ll
index 4a9b7701ae0a5..e6cc1d33be42c 100644
--- a/llvm/test/CodeGen/X86/tailcall-ri64.ll
+++ b/llvm/test/CodeGen/X86/tailcall-ri64.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=AMD64
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=AMD64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s -check-prefix=WIN64
; PR8743
; TAILJMPri64 should not receive "callee-saved" registers beyond epilogue.
diff --git a/llvm/test/CodeGen/X86/tailcall-ssp-split-debug.ll b/llvm/test/CodeGen/X86/tailcall-ssp-split-debug.ll
index 723d8a7f4c154..7013788e8173c 100644
--- a/llvm/test/CodeGen/X86/tailcall-ssp-split-debug.ll
+++ b/llvm/test/CodeGen/X86/tailcall-ssp-split-debug.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-apple-macosx %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx %s -o - | FileCheck %s
define void @foo(i1 %arg) ssp {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/tailcall-stackalign.ll b/llvm/test/CodeGen/X86/tailcall-stackalign.ll
index df31305bc0cff..86bd87d5e3049 100644
--- a/llvm/test/CodeGen/X86/tailcall-stackalign.ll
+++ b/llvm/test/CodeGen/X86/tailcall-stackalign.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-linux -tailcallopt -no-x86-call-frame-opt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux -tailcallopt -no-x86-call-frame-opt | FileCheck %s
; Linux has 8 byte alignment so the params cause stack size 20 when tailcallopt
; is enabled, ensure that a normal fastcc call has matching stack size
diff --git a/llvm/test/CodeGen/X86/tailcall-structret.ll b/llvm/test/CodeGen/X86/tailcall-structret.ll
index 72444b3595e5b..cc0f68ea09f95 100644
--- a/llvm/test/CodeGen/X86/tailcall-structret.ll
+++ b/llvm/test/CodeGen/X86/tailcall-structret.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-linux -tailcallopt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux -tailcallopt | FileCheck %s
define fastcc { ptr, ptr} @init({ ptr, ptr}, i32) {
entry:
%2 = tail call fastcc { ptr, ptr } @init({ ptr, ptr} %0, i32 %1)
diff --git a/llvm/test/CodeGen/X86/tailcall-swifttailcc.ll b/llvm/test/CodeGen/X86/tailcall-swifttailcc.ll
index 507029105df32..9749b7e8babb9 100644
--- a/llvm/test/CodeGen/X86/tailcall-swifttailcc.ll
+++ b/llvm/test/CodeGen/X86/tailcall-swifttailcc.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
declare dso_local swifttailcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4)
diff --git a/llvm/test/CodeGen/X86/tailcall-tailcc.ll b/llvm/test/CodeGen/X86/tailcall-tailcc.ll
index adb032a40d13b..444de65ef8db2 100644
--- a/llvm/test/CodeGen/X86/tailcall-tailcc.ll
+++ b/llvm/test/CodeGen/X86/tailcall-tailcc.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-windows-msvc | FileCheck %s -check-prefix=UEFI64
-; RUN: llc < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=UEFI64
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc | FileCheck %s -check-prefix=UEFI64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=UEFI64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X86
; With -tailcallopt, CodeGen guarantees a tail call optimization
; for all of these.
diff --git a/llvm/test/CodeGen/X86/tailcall.ll b/llvm/test/CodeGen/X86/tailcall.ll
index 38df5e555df7d..c49347bd7ec41 100644
--- a/llvm/test/CodeGen/X86/tailcall.ll
+++ b/llvm/test/CodeGen/X86/tailcall.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -tailcallopt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -tailcallopt | FileCheck %s
; With -tailcallopt, CodeGen guarantees a tail call optimization
; for all of these.
diff --git a/llvm/test/CodeGen/X86/tailcallbyval.ll b/llvm/test/CodeGen/X86/tailcallbyval.ll
index e90b6dde35750..d328ce7b73067 100644
--- a/llvm/test/CodeGen/X86/tailcallbyval.ll
+++ b/llvm/test/CodeGen/X86/tailcallbyval.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-linux -tailcallopt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux -tailcallopt | FileCheck %s
%struct.s = type {i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/tailcallbyval64.ll b/llvm/test/CodeGen/X86/tailcallbyval64.ll
index e44e156a7ad4d..b7442a64dd94c 100644
--- a/llvm/test/CodeGen/X86/tailcallbyval64.ll
+++ b/llvm/test/CodeGen/X86/tailcallbyval64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux -tailcallopt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux -tailcallopt | FileCheck %s
; FIXME: Win64 does not support byval.
diff --git a/llvm/test/CodeGen/X86/tailcallfp.ll b/llvm/test/CodeGen/X86/tailcallfp.ll
index d17466ef4d73a..3787a5a394bae 100644
--- a/llvm/test/CodeGen/X86/tailcallfp.ll
+++ b/llvm/test/CodeGen/X86/tailcallfp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -tailcallopt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -tailcallopt | FileCheck %s
define fastcc i32 @bar(i32 %X, ptr%FP) {
%Y = tail call fastcc i32 %FP(double 0.0, i32 %X)
ret i32 %Y
diff --git a/llvm/test/CodeGen/X86/tailcallfp2.ll b/llvm/test/CodeGen/X86/tailcallfp2.ll
index 75f5d65d0d1fd..d6467fe7a5ad7 100644
--- a/llvm/test/CodeGen/X86/tailcallfp2.ll
+++ b/llvm/test/CodeGen/X86/tailcallfp2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -tailcallopt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -tailcallopt | FileCheck %s
declare i32 @putchar(i32)
diff --git a/llvm/test/CodeGen/X86/tailcallpic.ll b/llvm/test/CodeGen/X86/tailcallpic.ll
index 6cc2e0408f58c..ca17a109b619a 100644
--- a/llvm/test/CodeGen/X86/tailcallpic.ll
+++ b/llvm/test/CodeGen/X86/tailcallpic.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -tailcallopt -mtriple=i686-pc-linux-gnu -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -tailcallopt -mtriple=i686-pc-linux-gnu -relocation-model=pic | FileCheck %s
; While many of these could be tail called, we don't do it because it forces
; early binding.
diff --git a/llvm/test/CodeGen/X86/tailcallstack64.ll b/llvm/test/CodeGen/X86/tailcallstack64.ll
index 77295ee0ff871..acd234033613c 100644
--- a/llvm/test/CodeGen/X86/tailcallstack64.ll
+++ b/llvm/test/CodeGen/X86/tailcallstack64.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -tailcallopt -mcpu=generic -mtriple=x86_64-linux -post-RA-scheduler=true | FileCheck %s
-; RUN: llc < %s -tailcallopt -mcpu=generic -mtriple=x86_64-win32 -post-RA-scheduler=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -tailcallopt -mcpu=generic -mtriple=x86_64-linux -post-RA-scheduler=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -tailcallopt -mcpu=generic -mtriple=x86_64-win32 -post-RA-scheduler=true | FileCheck %s
; FIXME: Redundant unused stack allocation could be eliminated.
; CHECK: subq ${{24|72|80}}, %rsp
diff --git a/llvm/test/CodeGen/X86/tailcc-calleesave.ll b/llvm/test/CodeGen/X86/tailcc-calleesave.ll
index 91f91133b80da..39137a03c5a9e 100644
--- a/llvm/test/CodeGen/X86/tailcc-calleesave.ll
+++ b/llvm/test/CodeGen/X86/tailcc-calleesave.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=core < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=core < %s | FileCheck %s
target triple = "i686-apple-darwin"
diff --git a/llvm/test/CodeGen/X86/tailcc-disable-tail-calls.ll b/llvm/test/CodeGen/X86/tailcc-disable-tail-calls.ll
index 3199b8c34b770..6ebf15e46df0e 100644
--- a/llvm/test/CodeGen/X86/tailcc-disable-tail-calls.ll
+++ b/llvm/test/CodeGen/X86/tailcc-disable-tail-calls.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=NO-OPTION
-; RUN: llc < %s -mtriple=x86_64-- -disable-tail-calls | FileCheck %s --check-prefix=DISABLE-TRUE
-; RUN: llc < %s -mtriple=x86_64-- -disable-tail-calls=false | FileCheck %s --check-prefix=DISABLE-FALSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=NO-OPTION
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -disable-tail-calls | FileCheck %s --check-prefix=DISABLE-TRUE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -disable-tail-calls=false | FileCheck %s --check-prefix=DISABLE-FALSE
; Check that command line option "-disable-tail-calls" overrides function
; attribute "disable-tail-calls".
diff --git a/llvm/test/CodeGen/X86/tailcc-dwarf.ll b/llvm/test/CodeGen/X86/tailcc-dwarf.ll
index 524d99d711bc4..b3f3d1819cd83 100644
--- a/llvm/test/CodeGen/X86/tailcc-dwarf.ll
+++ b/llvm/test/CodeGen/X86/tailcc-dwarf.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -O0 --frame-pointer=non-leaf %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -O0 --frame-pointer=non-leaf %s -o - | FileCheck %s
%block = type { %blockheader, [0 x ptr] }
%blockheader = type { i64 }
diff --git a/llvm/test/CodeGen/X86/tailcc-fastcc.ll b/llvm/test/CodeGen/X86/tailcc-fastcc.ll
index 13cb577754e95..59af2cedcee9e 100644
--- a/llvm/test/CodeGen/X86/tailcc-fastcc.ll
+++ b/llvm/test/CodeGen/X86/tailcc-fastcc.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -tailcallopt < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
-; RUN: llc -tailcallopt < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=UEFI64
-; RUN: llc -tailcallopt < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X86
+; RUN: llc -combiner-topological-sorting -tailcallopt < %s -mtriple=x86_64-unknown-unknown | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting -tailcallopt < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=UEFI64
+; RUN: llc -combiner-topological-sorting -tailcallopt < %s -mtriple=i686-unknown-unknown | FileCheck %s -check-prefix=X86
; llc -tailcallopt should not enable tail calls from fastcc to tailcc or vice versa
diff --git a/llvm/test/CodeGen/X86/tailcc-fastisel.ll b/llvm/test/CodeGen/X86/tailcc-fastisel.ll
index 910924ccbbe9b..393670eea6325 100644
--- a/llvm/test/CodeGen/X86/tailcc-fastisel.ll
+++ b/llvm/test/CodeGen/X86/tailcc-fastisel.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefix=DARWIN64
-; RUN: llc < %s -mtriple=x86_64-uefi -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefix=UEFI64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefix=DARWIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-uefi -fast-isel -fast-isel-abort=1 | FileCheck %s -check-prefix=UEFI64
%0 = type { i64, i32, ptr }
diff --git a/llvm/test/CodeGen/X86/tailcc-largecode.ll b/llvm/test/CodeGen/X86/tailcc-largecode.ll
index a3762ce81030f..3c7b02a0ab29d 100644
--- a/llvm/test/CodeGen/X86/tailcc-largecode.ll
+++ b/llvm/test/CodeGen/X86/tailcc-largecode.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -code-model=large -enable-misched=false | FileCheck %s --check-prefixes=CHECK,JMP
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -code-model=large -enable-misched=false -mattr=jmpabs | FileCheck %s --check-prefixes=CHECK,JMPABS
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -code-model=large -enable-misched=false -relocation-model=pic | FileCheck %s --check-prefixes=CHECK,PIC
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -code-model=large -enable-misched=false -mattr=jmpabs -relocation-model=pic | FileCheck %s --check-prefixes=CHECK,PIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -code-model=large -enable-misched=false | FileCheck %s --check-prefixes=CHECK,JMP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -code-model=large -enable-misched=false -mattr=jmpabs | FileCheck %s --check-prefixes=CHECK,JMPABS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -code-model=large -enable-misched=false -relocation-model=pic | FileCheck %s --check-prefixes=CHECK,PIC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -code-model=large -enable-misched=false -mattr=jmpabs -relocation-model=pic | FileCheck %s --check-prefixes=CHECK,PIC
declare tailcc i32 @callee(i32 %arg)
define tailcc i32 @directcall(i32 %arg) {
diff --git a/llvm/test/CodeGen/X86/tailcc-notail.ll b/llvm/test/CodeGen/X86/tailcc-notail.ll
index bc3af425482f1..f6950b842a097 100644
--- a/llvm/test/CodeGen/X86/tailcc-notail.ll
+++ b/llvm/test/CodeGen/X86/tailcc-notail.ll
@@ -1,4 +1,4 @@
-; RUN: not --crash llc -mtriple=x86_64-linux-gnu %s -o - 2>&1 | FileCheck %s
+; RUN: not --crash llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu %s -o - 2>&1 | FileCheck %s
; CHECK: LLVM ERROR: failed to perform tail call elimination on a call site marked musttail
declare tailcc [16 x i64] @callee()
diff --git a/llvm/test/CodeGen/X86/tailcc-ssp.ll b/llvm/test/CodeGen/X86/tailcc-ssp.ll
index ac5dda7d69bde..d386a19fc9bb5 100644
--- a/llvm/test/CodeGen/X86/tailcc-ssp.ll
+++ b/llvm/test/CodeGen/X86/tailcc-ssp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64-windows-msvc %s -o - -verify-machineinstrs | FileCheck %s -check-prefix=WINDOWS
-; RUN: llc -mtriple=x86_64-linux-gnu %s -o - -verify-machineinstrs | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc %s -o - -verify-machineinstrs | FileCheck %s -check-prefix=WINDOWS
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu %s -o - -verify-machineinstrs | FileCheck %s -check-prefix=LINUX
declare void @h(ptr, i64, ptr)
diff --git a/llvm/test/CodeGen/X86/tailcc-stackalign.ll b/llvm/test/CodeGen/X86/tailcc-stackalign.ll
index 6eeb15fcb613c..13c70dc8f5f47 100644
--- a/llvm/test/CodeGen/X86/tailcc-stackalign.ll
+++ b/llvm/test/CodeGen/X86/tailcc-stackalign.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-linux -no-x86-call-frame-opt | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux -no-x86-call-frame-opt | FileCheck %s
; Linux has 8 byte alignment so the params cause stack size 20,
; ensure that a normal tailcc call has matching stack size
diff --git a/llvm/test/CodeGen/X86/tailcc-structret.ll b/llvm/test/CodeGen/X86/tailcc-structret.ll
index 711f78575aca9..0a4e385882dd2 100644
--- a/llvm/test/CodeGen/X86/tailcc-structret.ll
+++ b/llvm/test/CodeGen/X86/tailcc-structret.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux | FileCheck %s
define tailcc { ptr, ptr} @init({ ptr, ptr}, i32) {
entry:
%2 = tail call tailcc { ptr, ptr } @init({ ptr, ptr} %0, i32 %1)
diff --git a/llvm/test/CodeGen/X86/tailccbyval.ll b/llvm/test/CodeGen/X86/tailccbyval.ll
index 5c8b1b6ac84d8..d8f2e17946f80 100644
--- a/llvm/test/CodeGen/X86/tailccbyval.ll
+++ b/llvm/test/CodeGen/X86/tailccbyval.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-unknown-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux | FileCheck %s
%struct.s = type {i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32,
i32, i32, i32, i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/tailccbyval64.ll b/llvm/test/CodeGen/X86/tailccbyval64.ll
index 6b440058c84b5..88ba22908da13 100644
--- a/llvm/test/CodeGen/X86/tailccbyval64.ll
+++ b/llvm/test/CodeGen/X86/tailccbyval64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux | FileCheck %s
; FIXME: Win64 does not support byval.
diff --git a/llvm/test/CodeGen/X86/tailccfp.ll b/llvm/test/CodeGen/X86/tailccfp.ll
index 1e648485bcd3c..b6534d193f4e2 100644
--- a/llvm/test/CodeGen/X86/tailccfp.ll
+++ b/llvm/test/CodeGen/X86/tailccfp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
define tailcc i32 @bar(i32 %X, ptr%FP) {
%Y = tail call tailcc i32 %FP(double 0.0, i32 %X)
ret i32 %Y
diff --git a/llvm/test/CodeGen/X86/tailccfp2.ll b/llvm/test/CodeGen/X86/tailccfp2.ll
index cc88fecf9b29c..63b001d14fa40 100644
--- a/llvm/test/CodeGen/X86/tailccfp2.ll
+++ b/llvm/test/CodeGen/X86/tailccfp2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
declare i32 @putchar(i32)
diff --git a/llvm/test/CodeGen/X86/tailccpic1.ll b/llvm/test/CodeGen/X86/tailccpic1.ll
index de8f2219bc2f3..4b621364c4f41 100644
--- a/llvm/test/CodeGen/X86/tailccpic1.ll
+++ b/llvm/test/CodeGen/X86/tailccpic1.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic | FileCheck %s
; This test uses guaranteed TCO so these will be tail calls, despite the early
; binding issues.
diff --git a/llvm/test/CodeGen/X86/tailccpic2.ll b/llvm/test/CodeGen/X86/tailccpic2.ll
index 314cd8f2fd67c..7428431cc43cc 100644
--- a/llvm/test/CodeGen/X86/tailccpic2.ll
+++ b/llvm/test/CodeGen/X86/tailccpic2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux-gnu -relocation-model=pic | FileCheck %s
define tailcc i32 @tailcallee(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
entry:
diff --git a/llvm/test/CodeGen/X86/tailccstack64.ll b/llvm/test/CodeGen/X86/tailccstack64.ll
index bcedea5e16384..8a7edcc4aecd2 100644
--- a/llvm/test/CodeGen/X86/tailccstack64.ll
+++ b/llvm/test/CodeGen/X86/tailccstack64.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux -post-RA-scheduler=true | FileCheck %s
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-win32 -post-RA-scheduler=true | FileCheck %s
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-uefi -post-RA-scheduler=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux -post-RA-scheduler=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-win32 -post-RA-scheduler=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-uefi -post-RA-scheduler=true | FileCheck %s
; FIXME: Redundant unused stack allocation could be eliminated.
; CHECK: subq ${{24|72|80}}, %rsp
diff --git a/llvm/test/CodeGen/X86/taildup-crash.ll b/llvm/test/CodeGen/X86/taildup-crash.ll
index 495644cf1fc6a..a66ba0329914b 100644
--- a/llvm/test/CodeGen/X86/taildup-crash.ll
+++ b/llvm/test/CodeGen/X86/taildup-crash.ll
@@ -1,4 +1,4 @@
-; RUN: llc -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - %s | FileCheck %s
target triple = "x86_64--"
; Make sure we do not crash in tail duplication when finding no successor of a
diff --git a/llvm/test/CodeGen/X86/taildup-heapallocsite.ll b/llvm/test/CodeGen/X86/taildup-heapallocsite.ll
index f3bef4743ef88..ee5e67f3a69a5 100644
--- a/llvm/test/CodeGen/X86/taildup-heapallocsite.ll
+++ b/llvm/test/CodeGen/X86/taildup-heapallocsite.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -tail-dup-placement-threshold=4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -tail-dup-placement-threshold=4 | FileCheck %s
; Based on test case from PR43695:
; __declspec(allocator) ptr alloc(unsigned int size);
diff --git a/llvm/test/CodeGen/X86/tailjmp_gotpcrel_relax_relocation.ll b/llvm/test/CodeGen/X86/tailjmp_gotpcrel_relax_relocation.ll
index cc8fd07a488c1..d3dd3143f195a 100644
--- a/llvm/test/CodeGen/X86/tailjmp_gotpcrel_relax_relocation.ll
+++ b/llvm/test/CodeGen/X86/tailjmp_gotpcrel_relax_relocation.ll
@@ -1,4 +1,4 @@
-; RUN: llc -filetype=obj -x86-relax-relocations=true -mtriple=x86_64-linux-gnu -o - %s | llvm-objdump - -d -r | FileCheck %s
+; RUN: llc -combiner-topological-sorting -filetype=obj -x86-relax-relocations=true -mtriple=x86_64-linux-gnu -o - %s | llvm-objdump - -d -r | FileCheck %s
; CHECK: jmpq *(%rip)
; CHECK-NEXT: R_X86_64_GOTPCRELX
diff --git a/llvm/test/CodeGen/X86/tailregccpic.ll b/llvm/test/CodeGen/X86/tailregccpic.ll
index a3a17d3b05397..71ec85100d6d4 100644
--- a/llvm/test/CodeGen/X86/tailregccpic.ll
+++ b/llvm/test/CodeGen/X86/tailregccpic.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i386-pc-unknown-linux-gnu -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-unknown-linux-gnu -relocation-model=pic | FileCheck %s
@a0 = global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/targetLoweringGeneric.ll b/llvm/test/CodeGen/X86/targetLoweringGeneric.ll
index 2edfbe0094f18..9ef9789fff469 100644
--- a/llvm/test/CodeGen/X86/targetLoweringGeneric.ll
+++ b/llvm/test/CodeGen/X86/targetLoweringGeneric.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i386-apple-darwin9 -mcpu=corei7 -fast-isel=false -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i386-apple-darwin9 -mcpu=corei7 -fast-isel=false -O0 < %s | FileCheck %s
; Gather non-machine specific tests for the transformations in
; CodeGen/SelectionDAG/TargetLowering. Currently, these
diff --git a/llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll b/llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll
index 1894f3c1e6753..d7266e238ba16 100644
--- a/llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll
+++ b/llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel-x86_64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefix=X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/tbm-builtins.c
diff --git a/llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
index d7005663ca25f..4c1be926c0295 100644
--- a/llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/tbm-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefix=X64
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/tbm-builtins.c
diff --git a/llvm/test/CodeGen/X86/tbm-intrinsics-x86_64.ll b/llvm/test/CodeGen/X86/tbm-intrinsics-x86_64.ll
index 8f23734e9d300..72c3093781aca 100644
--- a/llvm/test/CodeGen/X86/tbm-intrinsics-x86_64.ll
+++ b/llvm/test/CodeGen/X86/tbm-intrinsics-x86_64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s
define i64 @test_x86_tbm_bextri_u64(i64 %a) nounwind readnone {
; CHECK-LABEL: test_x86_tbm_bextri_u64:
diff --git a/llvm/test/CodeGen/X86/tbm-intrinsics.ll b/llvm/test/CodeGen/X86/tbm-intrinsics.ll
index 804b5c1031a00..6984b17814834 100644
--- a/llvm/test/CodeGen/X86/tbm-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/tbm-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+tbm,+cmov | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+tbm,+cmov | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+tbm | FileCheck %s --check-prefix=X64
define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind readnone {
; X86-LABEL: test_x86_tbm_bextri_u32:
diff --git a/llvm/test/CodeGen/X86/tbm_patterns.ll b/llvm/test/CodeGen/X86/tbm_patterns.ll
index e595803efdfca..25c6634a5a9d5 100644
--- a/llvm/test/CodeGen/X86/tbm_patterns.ll
+++ b/llvm/test/CodeGen/X86/tbm_patterns.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+tbm < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+tbm < %s | FileCheck %s
define i32 @test_x86_tbm_bextri_u32(i32 %a) nounwind {
; CHECK-LABEL: test_x86_tbm_bextri_u32:
diff --git a/llvm/test/CodeGen/X86/ternlog.ll b/llvm/test/CodeGen/X86/ternlog.ll
index cef044acbc5a9..5f9843173f7b5 100644
--- a/llvm/test/CodeGen/X86/ternlog.ll
+++ b/llvm/test/CodeGen/X86/ternlog.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | llc -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s
-; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | llc -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl -early-live-intervals | FileCheck %s
+; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s
+; RUN: opt < %s -passes=instcombine -mtriple=x86_64-unknown-unknown -S | llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl -early-live-intervals | FileCheck %s
;; This is just a simple test to make sure there are no regressions
;; cause by splitting/recombining ternlog intrinsics.
diff --git a/llvm/test/CodeGen/X86/test-nofold.ll b/llvm/test/CodeGen/X86/test-nofold.ll
index 8a49b9c9b25ac..bc58eeef08329 100644
--- a/llvm/test/CodeGen/X86/test-nofold.ll
+++ b/llvm/test/CodeGen/X86/test-nofold.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
; rdar://5752025
; We want:
diff --git a/llvm/test/CodeGen/X86/testb-je-fusion.ll b/llvm/test/CodeGen/X86/testb-je-fusion.ll
index d4a2525744da3..7c6a57de4c5d0 100644
--- a/llvm/test/CodeGen/X86/testb-je-fusion.ll
+++ b/llvm/test/CodeGen/X86/testb-je-fusion.ll
@@ -1,13 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-macrofusion,-branchfusion -post-RA-scheduler=0 | FileCheck %s --check-prefixes=NOFUSION,NOFUSION_NOPOSTRA
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-macrofusion,+branchfusion -post-RA-scheduler=0 | FileCheck %s --check-prefixes=FUSION,BRANCHFUSIONONLY_NOPOSTRA
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+macrofusion,-branchfusion -post-RA-scheduler=0 | FileCheck %s --check-prefixes=FUSION,MACROFUSION_NOPOSTRA
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-macrofusion,-branchfusion -post-RA-scheduler=1 | FileCheck %s --check-prefixes=NOFUSION,NOFUSION_POSTRA
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-macrofusion,+branchfusion -post-RA-scheduler=1 | FileCheck %s --check-prefixes=FUSION,BRANCHFUSION_POSTRA
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+macrofusion,-branchfusion -post-RA-scheduler=1 | FileCheck %s --check-prefixes=FUSION,BRANCHFUSION_POSTRA
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-macrofusion,-branchfusion -enable-misched=0 -misched-postra=1 -enable-post-misched | FileCheck %s --check-prefixes=NOFUSION,NOFUSION_MISCHEDPOSTRA
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-macrofusion,+branchfusion -enable-misched=0 -misched-postra=1 -enable-post-misched | FileCheck %s --check-prefixes=FUSION,BRANCHFUSION_MISCHEDPOSTRA
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+macrofusion,-branchfusion -enable-misched=0 -misched-postra=1 -enable-post-misched | FileCheck %s --check-prefixes=FUSION,BRANCHFUSION_MISCHEDPOSTRA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-macrofusion,-branchfusion -post-RA-scheduler=0 | FileCheck %s --check-prefixes=NOFUSION,NOFUSION_NOPOSTRA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-macrofusion,+branchfusion -post-RA-scheduler=0 | FileCheck %s --check-prefixes=FUSION,BRANCHFUSIONONLY_NOPOSTRA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+macrofusion,-branchfusion -post-RA-scheduler=0 | FileCheck %s --check-prefixes=FUSION,MACROFUSION_NOPOSTRA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-macrofusion,-branchfusion -post-RA-scheduler=1 | FileCheck %s --check-prefixes=NOFUSION,NOFUSION_POSTRA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-macrofusion,+branchfusion -post-RA-scheduler=1 | FileCheck %s --check-prefixes=FUSION,BRANCHFUSION_POSTRA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+macrofusion,-branchfusion -post-RA-scheduler=1 | FileCheck %s --check-prefixes=FUSION,BRANCHFUSION_POSTRA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-macrofusion,-branchfusion -enable-misched=0 -misched-postra=1 -enable-post-misched | FileCheck %s --check-prefixes=NOFUSION,NOFUSION_MISCHEDPOSTRA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-macrofusion,+branchfusion -enable-misched=0 -misched-postra=1 -enable-post-misched | FileCheck %s --check-prefixes=FUSION,BRANCHFUSION_MISCHEDPOSTRA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+macrofusion,-branchfusion -enable-misched=0 -misched-postra=1 -enable-post-misched | FileCheck %s --check-prefixes=FUSION,BRANCHFUSION_MISCHEDPOSTRA
diff --git a/llvm/test/CodeGen/X86/testl-commute.ll b/llvm/test/CodeGen/X86/testl-commute.ll
index 34cc1dba68494..39eea81638ca4 100644
--- a/llvm/test/CodeGen/X86/testl-commute.ll
+++ b/llvm/test/CodeGen/X86/testl-commute.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; rdar://5671654
; The loads should fold into the testl instructions, no matter how
; the inputs are commuted.
diff --git a/llvm/test/CodeGen/X86/text-section-prefix.ll b/llvm/test/CodeGen/X86/text-section-prefix.ll
index 43206c8e3b2a0..4755296a1dee1 100644
--- a/llvm/test/CodeGen/X86/text-section-prefix.ll
+++ b/llvm/test/CodeGen/X86/text-section-prefix.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple x86_64-linux-gnu -function-sections %s -o - | FileCheck %s --check-prefix=ELF
-; RUN: llc -mtriple x86_64-linux-gnu -unique-section-names=0 -function-sections %s -o - | FileCheck %s --check-prefix=ELF-NOUNIQ
-; RUN: llc -mtriple x86_64-windows-msvc -function-sections %s -o - | FileCheck %s --check-prefix=COFF-MSVC
-; RUN: llc -mtriple x86_64-windows-gnu -function-sections %s -o - | FileCheck %s --check-prefix=COFF-GNU
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-linux-gnu -function-sections %s -o - | FileCheck %s --check-prefix=ELF
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-linux-gnu -unique-section-names=0 -function-sections %s -o - | FileCheck %s --check-prefix=ELF-NOUNIQ
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-windows-msvc -function-sections %s -o - | FileCheck %s --check-prefix=COFF-MSVC
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-windows-gnu -function-sections %s -o - | FileCheck %s --check-prefix=COFF-GNU
define void @foo1(i1 zeroext %0) nounwind !section_prefix !0 {
;; Check hot section name
diff --git a/llvm/test/CodeGen/X86/this-return-64.ll b/llvm/test/CodeGen/X86/this-return-64.ll
index f4693674705e2..14eadebdcdab2 100644
--- a/llvm/test/CodeGen/X86/this-return-64.ll
+++ b/llvm/test/CodeGen/X86/this-return-64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 | FileCheck %s
%struct.A = type { i8 }
%struct.B = type { i32 }
diff --git a/llvm/test/CodeGen/X86/thread_pointer-error.ll b/llvm/test/CodeGen/X86/thread_pointer-error.ll
index fa588d2604b47..568f38010b3ce 100644
--- a/llvm/test/CodeGen/X86/thread_pointer-error.ll
+++ b/llvm/test/CodeGen/X86/thread_pointer-error.ll
@@ -1,12 +1,12 @@
; FIXME: Targets below should support this builtin after they document the thread pointer for X86.
; CHECK-ERROR: LLVM ERROR: Target OS doesn't support __builtin_thread_pointer() yet.
-; RUN: not --crash llc < %s -o /dev/null -mtriple=i686-pc-win32 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
-; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-pc-win32 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
-; RUN: not --crash llc < %s -o /dev/null -mtriple=i686-pc-windows-gnu 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
-; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-pc-windows-gnu 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
-; RUN: not --crash llc < %s -o /dev/null -mtriple=i686-apple-darwin 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
-; RUN: not --crash llc < %s -o /dev/null -mtriple=x86_64-pc-apple-darwin 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
+; RUN: not --crash llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-pc-win32 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
+; RUN: not --crash llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-pc-win32 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
+; RUN: not --crash llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-pc-windows-gnu 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
+; RUN: not --crash llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-pc-windows-gnu 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
+; RUN: not --crash llc -combiner-topological-sorting < %s -o /dev/null -mtriple=i686-apple-darwin 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
+; RUN: not --crash llc -combiner-topological-sorting < %s -o /dev/null -mtriple=x86_64-pc-apple-darwin 2>&1 | FileCheck %s --check-prefix=CHECK-ERROR
declare ptr @llvm.thread.pointer()
diff --git a/llvm/test/CodeGen/X86/thread_pointer.ll b/llvm/test/CodeGen/X86/thread_pointer.ll
index 8c293eff5cb93..e185e46fa6458 100644
--- a/llvm/test/CodeGen/X86/thread_pointer.ll
+++ b/llvm/test/CodeGen/X86/thread_pointer.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu | FileCheck %s --check-prefix=X86
declare ptr @llvm.thread.pointer()
diff --git a/llvm/test/CodeGen/X86/threadlocal_address.ll b/llvm/test/CodeGen/X86/threadlocal_address.ll
index 52ff413e6988f..d11946624ad2b 100644
--- a/llvm/test/CodeGen/X86/threadlocal_address.ll
+++ b/llvm/test/CodeGen/X86/threadlocal_address.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -stop-after=finalize-isel %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -stop-after=finalize-isel %s -o - | FileCheck %s
@i = thread_local global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/throws-cfi-fp.ll b/llvm/test/CodeGen/X86/throws-cfi-fp.ll
index 1ad12823ec67e..472050d3c0980 100644
--- a/llvm/test/CodeGen/X86/throws-cfi-fp.ll
+++ b/llvm/test/CodeGen/X86/throws-cfi-fp.ll
@@ -1,5 +1,5 @@
-; RUN: llc %s -o - | FileCheck %s
-; RUN: llc < %s -stop-after=prologepilog | FileCheck %s --check-prefix=PEI
+; RUN: llc -combiner-topological-sorting %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -stop-after=prologepilog | FileCheck %s --check-prefix=PEI
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/throws-cfi-no-fp.ll b/llvm/test/CodeGen/X86/throws-cfi-no-fp.ll
index 6663d91b75355..3524e06a42b69 100644
--- a/llvm/test/CodeGen/X86/throws-cfi-no-fp.ll
+++ b/llvm/test/CodeGen/X86/throws-cfi-no-fp.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/tls-addr-non-leaf-function.ll b/llvm/test/CodeGen/X86/tls-addr-non-leaf-function.ll
index 8d06b11332943..25dfac312670d 100644
--- a/llvm/test/CodeGen/X86/tls-addr-non-leaf-function.ll
+++ b/llvm/test/CodeGen/X86/tls-addr-non-leaf-function.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -relocation-model=pic -O2 -frame-pointer=all -o - | FileCheck %s
-; RUN: llc < %s -relocation-model=pic -O2 -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -O2 -frame-pointer=all -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -O2 -o - | FileCheck %s
; This test runs twice with different options regarding the frame pointer:
; first the elimination is disabled, then it is enabled. The disabled case is
diff --git a/llvm/test/CodeGen/X86/tls-android-negative.ll b/llvm/test/CodeGen/X86/tls-android-negative.ll
index 6c4ea83a0ab3f..65a6847f6a8ce 100644
--- a/llvm/test/CodeGen/X86/tls-android-negative.ll
+++ b/llvm/test/CodeGen/X86/tls-android-negative.ll
@@ -1,8 +1,8 @@
-; RUN: llc < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic | FileCheck %s
-; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck %s
-; RUN: llc < %s -mtriple=i686-linux-android -relocation-model=pic | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-android -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck %s
; Make sure that some symboles are not emitted in emulated TLS model.
diff --git a/llvm/test/CodeGen/X86/tls-android.ll b/llvm/test/CodeGen/X86/tls-android.ll
index 52174ce09f42f..d4a7d98c681fc 100644
--- a/llvm/test/CodeGen/X86/tls-android.ll
+++ b/llvm/test/CodeGen/X86/tls-android.ll
@@ -1,8 +1,8 @@
-; RUN: llc < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic | FileCheck %s
-; RUN: llc < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=i686-linux-android -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -emulated-tls -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -mtriple=i686-linux-android -relocation-model=pic | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux-android -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
; Make sure that TLS symboles are emitted in expected order.
diff --git a/llvm/test/CodeGen/X86/tls-desc.ll b/llvm/test/CodeGen/X86/tls-desc.ll
index c73986e69e791..1666a89e4e0de 100644
--- a/llvm/test/CodeGen/X86/tls-desc.ll
+++ b/llvm/test/CodeGen/X86/tls-desc.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=i686 --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnux32 --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64 --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnux32 --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 --relocation-model=pic -enable-tlsdesc | FileCheck %s --check-prefix=X64
@x = thread_local global i32 0, align 4
@y = internal thread_local global i32 1, align 4
diff --git a/llvm/test/CodeGen/X86/tls-function-argument.ll b/llvm/test/CodeGen/X86/tls-function-argument.ll
index 9b6ab529db3ea..a0fd9aa1c418f 100644
--- a/llvm/test/CodeGen/X86/tls-function-argument.ll
+++ b/llvm/test/CodeGen/X86/tls-function-argument.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=x86_64 -verify-machineinstrs -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -verify-machineinstrs -relocation-model=pic < %s | FileCheck %s
; Passing a pointer to thread-local storage to a function can be problematic
; since computing such addresses requires a function call that is introduced
diff --git a/llvm/test/CodeGen/X86/tls-local-dynamic.ll b/llvm/test/CodeGen/X86/tls-local-dynamic.ll
index 95dd434e70b58..d0a275c5756a2 100644
--- a/llvm/test/CodeGen/X86/tls-local-dynamic.ll
+++ b/llvm/test/CodeGen/X86/tls-local-dynamic.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s
@x = internal thread_local global i32 0, align 4
@y = internal thread_local global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/tls-models.ll b/llvm/test/CodeGen/X86/tls-models.ll
index 8de9de15a5f06..a4eabf2f64d6c 100644
--- a/llvm/test/CodeGen/X86/tls-models.ll
+++ b/llvm/test/CodeGen/X86/tls-models.ll
@@ -1,11 +1,11 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64_PIC %s
-; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32 %s
-; RUN: llc < %s -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32_PIC %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64_PIC %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32_PIC %s
; Darwin always uses the same model.
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=DARWIN %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -code-model=large | FileCheck -check-prefix=DARWIN %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck -check-prefix=DARWIN %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -code-model=large | FileCheck -check-prefix=DARWIN %s
@external_gd = external thread_local global i32
@internal_gd = internal thread_local global i32 42
diff --git a/llvm/test/CodeGen/X86/tls-no-plt.ll b/llvm/test/CodeGen/X86/tls-no-plt.ll
index c555d7f0e4cc7..bd5609ca4ae3a 100644
--- a/llvm/test/CodeGen/X86/tls-no-plt.ll
+++ b/llvm/test/CodeGen/X86/tls-no-plt.ll
@@ -1,10 +1,10 @@
-; RUN: llc < %s -mtriple=i386-linux-musl -relocation-model=pic -x86-relax-relocations=true | FileCheck --check-prefixes=CHECK,X86 %s
-; RUN: llc < %s -mtriple=x86_64-linux-musl -relocation-model=pic -x86-relax-relocations=true | FileCheck --check-prefixes=CHECK,X64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-musl -relocation-model=pic -x86-relax-relocations=true | FileCheck --check-prefixes=CHECK,X86 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-musl -relocation-model=pic -x86-relax-relocations=true | FileCheck --check-prefixes=CHECK,X64 %s
;; If GOTPCRELX is disabled, don't use GOT for __tls_get_addr to work around
;; a ld.bfd bug (binutils PR24784).
-; RUN: llc < %s -mtriple=i386-linux-musl -relocation-model=pic -x86-relax-relocations=false | FileCheck --check-prefixes=CHECK,X86-PLT %s
-; RUN: llc < %s -mtriple=x86_64-linux-musl -relocation-model=pic -x86-relax-relocations=false | FileCheck --check-prefixes=CHECK,X64-PLT %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-musl -relocation-model=pic -x86-relax-relocations=false | FileCheck --check-prefixes=CHECK,X86-PLT %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-musl -relocation-model=pic -x86-relax-relocations=false | FileCheck --check-prefixes=CHECK,X64-PLT %s
@gd = thread_local global i32 0
@ld = internal thread_local global i32 0
diff --git a/llvm/test/CodeGen/X86/tls-pic.ll b/llvm/test/CodeGen/X86/tls-pic.ll
index 05846e8803765..5c10f56bd9967 100644
--- a/llvm/test/CodeGen/X86/tls-pic.ll
+++ b/llvm/test/CodeGen/X86/tls-pic.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X64
@i = thread_local global i32 15
@j = internal thread_local global i32 42
diff --git a/llvm/test/CodeGen/X86/tls-pie.ll b/llvm/test/CodeGen/X86/tls-pie.ll
index d8557df48019d..05ed4c273e4fb 100644
--- a/llvm/test/CodeGen/X86/tls-pie.ll
+++ b/llvm/test/CodeGen/X86/tls-pie.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnux32 -relocation-model=pic | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux-gnux32 -relocation-model=pic | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck %s --check-prefix=X64
@i = dso_local thread_local global i32 15
@i2 = external thread_local global i32
diff --git a/llvm/test/CodeGen/X86/tls-shrink-wrapping.ll b/llvm/test/CodeGen/X86/tls-shrink-wrapping.ll
index f0d5a16ac6dc8..defd8dce41ce6 100644
--- a/llvm/test/CodeGen/X86/tls-shrink-wrapping.ll
+++ b/llvm/test/CodeGen/X86/tls-shrink-wrapping.ll
@@ -11,7 +11,7 @@
; We want to make sure that TLS variables are not accessed before
; the stack frame is set up.
-; RUN: llc < %s -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-freebsd11.0"
diff --git a/llvm/test/CodeGen/X86/tls-windows-itanium.ll b/llvm/test/CodeGen/X86/tls-windows-itanium.ll
index 8ea7787133bfd..367b63ea08ae5 100644
--- a/llvm/test/CodeGen/X86/tls-windows-itanium.ll
+++ b/llvm/test/CodeGen/X86/tls-windows-itanium.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple i686-windows-itanium -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-ASM
-; RUN: llc -mtriple i686-windows-itanium -filetype obj -o - %s | llvm-readobj -r - | FileCheck %s -check-prefix CHECK-OBJ
+; RUN: llc -combiner-topological-sorting -mtriple i686-windows-itanium -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-ASM
+; RUN: llc -combiner-topological-sorting -mtriple i686-windows-itanium -filetype obj -o - %s | llvm-readobj -r - | FileCheck %s -check-prefix CHECK-OBJ
@get_count_incremented.count = internal thread_local unnamed_addr global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/tls.ll b/llvm/test/CodeGen/X86/tls.ll
index 435555d840abc..5c750848d2bb2 100644
--- a/llvm/test/CodeGen/X86/tls.ll
+++ b/llvm/test/CodeGen/X86/tls.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-linux-gnu | FileCheck -check-prefix=X86_LINUX %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s
-; RUN: llc < %s -mtriple=i386-linux-gnu -fast-isel | FileCheck -check-prefix=X86_LINUX %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck -check-prefix=X64_LINUX %s
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck -check-prefix=X86_WIN %s
-; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s
-; RUN: llc < %s -mtriple=i686-pc-windows-gnu | FileCheck -check-prefix=MINGW32 %s
-; RUN: llc < %s -mtriple=x86_64-pc-windows-gnu | FileCheck -check-prefix=X64_WIN %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu | FileCheck -check-prefix=X86_LINUX %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64_LINUX %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -fast-isel | FileCheck -check-prefix=X86_LINUX %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -fast-isel | FileCheck -check-prefix=X64_LINUX %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck -check-prefix=X86_WIN %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 | FileCheck -check-prefix=X64_WIN %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-windows-gnu | FileCheck -check-prefix=MINGW32 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-windows-gnu | FileCheck -check-prefix=X64_WIN %s
@i1 = dso_local thread_local global i32 15
@i2 = external thread_local global i32
diff --git a/llvm/test/CodeGen/X86/tlv-1.ll b/llvm/test/CodeGen/X86/tlv-1.ll
index d599ac7783b13..d16b519cc5088 100644
--- a/llvm/test/CodeGen/X86/tlv-1.ll
+++ b/llvm/test/CodeGen/X86/tlv-1.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple x86_64-apple-darwin -mcpu=core2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-apple-darwin -mcpu=core2 | FileCheck %s
%struct.A = type { [48 x i8], i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/tlv-2.ll b/llvm/test/CodeGen/X86/tlv-2.ll
index 3bc44176e173a..82d70d5d5e17c 100644
--- a/llvm/test/CodeGen/X86/tlv-2.ll
+++ b/llvm/test/CodeGen/X86/tlv-2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple x86_64-apple-darwin -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-apple-darwin -O0 | FileCheck %s
@b = thread_local global i32 5, align 4
@a = thread_local global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/tlv-3.ll b/llvm/test/CodeGen/X86/tlv-3.ll
index 4f793051836f4..ac3f95eea1867 100644
--- a/llvm/test/CodeGen/X86/tlv-3.ll
+++ b/llvm/test/CodeGen/X86/tlv-3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-apple-darwin | FileCheck %s
; PR17964
; CHECK: __DATA,__thread_data,thread_local_regular
diff --git a/llvm/test/CodeGen/X86/token_landingpad.ll b/llvm/test/CodeGen/X86/token_landingpad.ll
index c146188c30f7d..ba54c96c98e33 100644
--- a/llvm/test/CodeGen/X86/token_landingpad.ll
+++ b/llvm/test/CodeGen/X86/token_landingpad.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64--
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
; This test verifies that SelectionDAG can handle landingPad of token type and not crash LLVM.
diff --git a/llvm/test/CodeGen/X86/trap.ll b/llvm/test/CodeGen/X86/trap.ll
index 3d9a858beda85..1dd29580290c7 100644
--- a/llvm/test/CodeGen/X86/trap.ll
+++ b/llvm/test/CodeGen/X86/trap.ll
@@ -1,8 +1,8 @@
-; RUN: llc < %s -mtriple=i686-apple-darwin8 -mcpu=yonah | FileCheck %s -check-prefixes=CHECK,DARWIN
-; RUN: llc < %s -mtriple=i686-unknown-linux -mcpu=yonah | FileCheck %s -check-prefixes=CHECK,LINUX
-; RUN: llc < %s -mtriple=x86_64-scei-ps4 | FileCheck %s -check-prefixes=CHECK,PS4
-; RUN: llc < %s -mtriple=x86_64-sie-ps5 | FileCheck %s -check-prefixes=CHECK,PS4
-; RUN: llc < %s -mtriple=x86_64-windows-msvc | FileCheck %s -check-prefixes=CHECK,WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin8 -mcpu=yonah | FileCheck %s -check-prefixes=CHECK,DARWIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux -mcpu=yonah | FileCheck %s -check-prefixes=CHECK,LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-scei-ps4 | FileCheck %s -check-prefixes=CHECK,PS4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-sie-ps5 | FileCheck %s -check-prefixes=CHECK,PS4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc | FileCheck %s -check-prefixes=CHECK,WIN64
; CHECK-LABEL: test0:
; CHECK: ud2
diff --git a/llvm/test/CodeGen/X86/tree_way_unsigned_cmp.ll b/llvm/test/CodeGen/X86/tree_way_unsigned_cmp.ll
index 5783dfd83ebf0..02516e6a42e88 100644
--- a/llvm/test/CodeGen/X86/tree_way_unsigned_cmp.ll
+++ b/llvm/test/CodeGen/X86/tree_way_unsigned_cmp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s
; PR19758
diff --git a/llvm/test/CodeGen/X86/trunc-and.ll b/llvm/test/CodeGen/X86/trunc-and.ll
index b6fd200a04761..bc42f6368f760 100644
--- a/llvm/test/CodeGen/X86/trunc-and.ll
+++ b/llvm/test/CodeGen/X86/trunc-and.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx512bw | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx512bw | FileCheck %s
; This would infinite loop by trying to truncate to i16 and then promote back to i32.
diff --git a/llvm/test/CodeGen/X86/trunc-ext-ld-st.ll b/llvm/test/CodeGen/X86/trunc-ext-ld-st.ll
index 88cdefe23983a..c54ed30d1075a 100644
--- a/llvm/test/CodeGen/X86/trunc-ext-ld-st.ll
+++ b/llvm/test/CodeGen/X86/trunc-ext-ld-st.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=CHECK --check-prefix=SSE41
; A single 16-bit load + a single 16-bit store
define void @load_2_i8(ptr %A) {
diff --git a/llvm/test/CodeGen/X86/trunc-store.ll b/llvm/test/CodeGen/X86/trunc-store.ll
index 3ce06f7caa28e..f87ae20266f18 100644
--- a/llvm/test/CodeGen/X86/trunc-store.ll
+++ b/llvm/test/CodeGen/X86/trunc-store.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s
; With optimization at O2 we actually get the legalized function optimized
; away through legalization and stack coloring, but check that we do all of
diff --git a/llvm/test/CodeGen/X86/trunc-subvector.ll b/llvm/test/CodeGen/X86/trunc-subvector.ll
index 9db2f6ba1e810..3800b7663a29e 100644
--- a/llvm/test/CodeGen/X86/trunc-subvector.ll
+++ b/llvm/test/CodeGen/X86/trunc-subvector.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
define <4 x i32> @test1(<8 x i32> %v) {
; SSE2-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/trunc-to-bool.ll b/llvm/test/CodeGen/X86/trunc-to-bool.ll
index 5a5d057597465..0616c1eca7308 100644
--- a/llvm/test/CodeGen/X86/trunc-to-bool.ll
+++ b/llvm/test/CodeGen/X86/trunc-to-bool.ll
@@ -2,7 +2,7 @@
; An integer truncation to i1 should be done with an and instruction to make
; sure only the LSBit survives. Test that this is the case both for a returned
; value and as the operand of a branch.
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s
define zeroext i1 @test1(i32 %X) nounwind {
; CHECK-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/tsxldtrk-intrinsic.ll b/llvm/test/CodeGen/X86/tsxldtrk-intrinsic.ll
index 5b780e1495793..0983fd8ece887 100644
--- a/llvm/test/CodeGen/X86/tsxldtrk-intrinsic.ll
+++ b/llvm/test/CodeGen/X86/tsxldtrk-intrinsic.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+tsxldtrk | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+tsxldtrk | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -mattr=+tsxldtrk | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+tsxldtrk | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+tsxldtrk | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 -mattr=+tsxldtrk | FileCheck %s --check-prefix=X32
define void @test_tsxldtrk() {
; X64-LABEL: test_tsxldtrk:
diff --git a/llvm/test/CodeGen/X86/tuning-shuffle-permilpd-avx512.ll b/llvm/test/CodeGen/X86/tuning-shuffle-permilpd-avx512.ll
index e2c8b6df6e744..4b3b5217dea24 100644
--- a/llvm/test/CodeGen/X86/tuning-shuffle-permilpd-avx512.ll
+++ b/llvm/test/CodeGen/X86/tuning-shuffle-permilpd-avx512.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-V4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefixes=CHECK,CHECK-AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver4 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver5 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver6 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-V4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefixes=CHECK,CHECK-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver4 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver5 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver6 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
define <8 x double> @transform_VPERMILPSZrr(<8 x double> %a) nounwind {
; CHECK-LABEL: transform_VPERMILPSZrr:
diff --git a/llvm/test/CodeGen/X86/tuning-shuffle-permilpd.ll b/llvm/test/CodeGen/X86/tuning-shuffle-permilpd.ll
index b3deb51c3237e..c0cc8df3615f7 100644
--- a/llvm/test/CodeGen/X86/tuning-shuffle-permilpd.ll
+++ b/llvm/test/CodeGen/X86/tuning-shuffle-permilpd.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown --mattr=+avx,+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown --mattr=+avx | FileCheck %s --check-prefixes=CHECK,CHECK-AVX1-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown --mattr=+avx2,+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown --mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-NO-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown --mattr=+avx,+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown --mattr=+avx | FileCheck %s --check-prefixes=CHECK,CHECK-AVX1-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown --mattr=+avx2,+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown --mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-NO-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-BYPASS-DELAY
define <4 x double> @transform_VPERMILPDYrr(<4 x double> %a) nounwind {
; CHECK-LABEL: transform_VPERMILPDYrr:
diff --git a/llvm/test/CodeGen/X86/tuning-shuffle-permilps-avx512.ll b/llvm/test/CodeGen/X86/tuning-shuffle-permilps-avx512.ll
index 53bad74552f8a..eb6d2d47c62ea 100644
--- a/llvm/test/CodeGen/X86/tuning-shuffle-permilps-avx512.ll
+++ b/llvm/test/CodeGen/X86/tuning-shuffle-permilps-avx512.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-V4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefixes=CHECK,CHECK-AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver4 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver5 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver6 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-V4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefixes=CHECK,CHECK-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver4 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver5 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver6 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
define <16 x float> @transform_VPERMILPSZrr(<16 x float> %a) nounwind {
; CHECK-LABEL: transform_VPERMILPSZrr:
diff --git a/llvm/test/CodeGen/X86/tuning-shuffle-permilps.ll b/llvm/test/CodeGen/X86/tuning-shuffle-permilps.ll
index 01f8df684e740..588007a19bb22 100644
--- a/llvm/test/CodeGen/X86/tuning-shuffle-permilps.ll
+++ b/llvm/test/CodeGen/X86/tuning-shuffle-permilps.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown --mattr=+avx,+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown --mattr=+avx | FileCheck %s --check-prefixes=CHECK,CHECK-AVX1-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown --mattr=+avx2,+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown --mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-NO-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown --mattr=+avx,+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown --mattr=+avx | FileCheck %s --check-prefixes=CHECK,CHECK-AVX1-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown --mattr=+avx2,+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown --mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-NO-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-BYPASS-DELAY
define <8 x float> @transform_VPERMILPSYrr(<8 x float> %a) nounwind {
; CHECK-LABEL: transform_VPERMILPSYrr:
diff --git a/llvm/test/CodeGen/X86/tuning-shuffle-unpckpd-avx512.ll b/llvm/test/CodeGen/X86/tuning-shuffle-unpckpd-avx512.ll
index 39a072eeeea4c..c8ea3d5179fd1 100644
--- a/llvm/test/CodeGen/X86/tuning-shuffle-unpckpd-avx512.ll
+++ b/llvm/test/CodeGen/X86/tuning-shuffle-unpckpd-avx512.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 | FileCheck %s --check-prefixes=CHECK,CHECK-SKX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-V4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefixes=CHECK,CHECK-AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver4 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver5 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver6 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 | FileCheck %s --check-prefixes=CHECK,CHECK-SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-V4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefixes=CHECK,CHECK-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver4 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver5 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver6 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
define <16 x float> @transform_VUNPCKLPDZrr(<16 x float> %a, <16 x float> %b) nounwind {
diff --git a/llvm/test/CodeGen/X86/tuning-shuffle-unpckpd.ll b/llvm/test/CodeGen/X86/tuning-shuffle-unpckpd.ll
index 6940c33c9d327..0a8e74495f3a4 100644
--- a/llvm/test/CodeGen/X86/tuning-shuffle-unpckpd.ll
+++ b/llvm/test/CodeGen/X86/tuning-shuffle-unpckpd.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2,CHECK-SKL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2,CHECK-V3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-NO-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2,CHECK-SKL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2,CHECK-V3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-NO-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-BYPASS-DELAY
define <8 x float> @transform_VUNPCKLPDYrr(<8 x float> %a, <8 x float> %b) nounwind {
; CHECK-AVX2-LABEL: transform_VUNPCKLPDYrr:
diff --git a/llvm/test/CodeGen/X86/tuning-shuffle-unpckps-avx512.ll b/llvm/test/CodeGen/X86/tuning-shuffle-unpckps-avx512.ll
index f8b9dac4c7ba8..5327abe95d204 100644
--- a/llvm/test/CodeGen/X86/tuning-shuffle-unpckps-avx512.ll
+++ b/llvm/test/CodeGen/X86/tuning-shuffle-unpckps-avx512.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 | FileCheck %s --check-prefixes=CHECK,CHECK-SKX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-V4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefixes=CHECK,CHECK-AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver4 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver5 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver6 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake-avx512 | FileCheck %s --check-prefixes=CHECK,CHECK-SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,CHECK-V4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefixes=CHECK,CHECK-AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver4 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver5 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver6 | FileCheck %s --check-prefixes=CHECK,CHECK-ZNVER4
define <16 x float> @transform_VUNPCKLPSZrr(<16 x float> %a, <16 x float> %b) nounwind {
; CHECK-LABEL: transform_VUNPCKLPSZrr:
diff --git a/llvm/test/CodeGen/X86/tuning-shuffle-unpckps.ll b/llvm/test/CodeGen/X86/tuning-shuffle-unpckps.ll
index 8fa2c3dab0471..87895aea7e542 100644
--- a/llvm/test/CodeGen/X86/tuning-shuffle-unpckps.ll
+++ b/llvm/test/CodeGen/X86/tuning-shuffle-unpckps.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2,CHECK-SKL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2,CHECK-V3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-NO-BYPASS-DELAY
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skylake | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2,CHECK-SKL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,CHECK-AVX2,CHECK-V3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-NO-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=icelake-server -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-ICX,CHECK-ICX-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=+no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-NO-BYPASS-DELAY
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=sandybridge -mattr=-no-bypass-delay-shuffle | FileCheck %s --check-prefixes=CHECK,CHECK-SNB,CHECK-SNB-BYPASS-DELAY
define <8 x float> @transform_VUNPCKLPSYrr(<8 x float> %a, <8 x float> %b) nounwind {
diff --git a/llvm/test/CodeGen/X86/twoaddr-coalesce-2.ll b/llvm/test/CodeGen/X86/twoaddr-coalesce-2.ll
index a5667be299bbb..5eabd8a9c99ae 100644
--- a/llvm/test/CodeGen/X86/twoaddr-coalesce-2.ll
+++ b/llvm/test/CodeGen/X86/twoaddr-coalesce-2.ll
@@ -1,5 +1,5 @@
; REQUIRES: asserts
-; RUN: llc < %s -mattr=+sse2 -mcpu=penryn -stats 2>&1 | \
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sse2 -mcpu=penryn -stats 2>&1 | \
; RUN: grep "twoaddressinstruction" | grep "Number of instructions aggressively commuted"
; rdar://6480363
diff --git a/llvm/test/CodeGen/X86/twoaddr-coalesce-3.ll b/llvm/test/CodeGen/X86/twoaddr-coalesce-3.ll
index 856c5891b7a4a..e2773ae0cce80 100644
--- a/llvm/test/CodeGen/X86/twoaddr-coalesce-3.ll
+++ b/llvm/test/CodeGen/X86/twoaddr-coalesce-3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -relocation-model=pic | FileCheck %s
; This test is to ensure the TwoAddrInstruction pass chooses the proper operands to
; merge and generates fewer mov insns.
diff --git a/llvm/test/CodeGen/X86/twoaddr-coalesce.ll b/llvm/test/CodeGen/X86/twoaddr-coalesce.ll
index fbedd92517da6..917e0777bd9a1 100644
--- a/llvm/test/CodeGen/X86/twoaddr-coalesce.ll
+++ b/llvm/test/CodeGen/X86/twoaddr-coalesce.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; rdar://6523745
@"\01LC" = internal constant [4 x i8] c"%d\0A\00" ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/twoaddr-lea.ll b/llvm/test/CodeGen/X86/twoaddr-lea.ll
index 3ad3e9a0e7655..89f6ea56cd0d1 100644
--- a/llvm/test/CodeGen/X86/twoaddr-lea.ll
+++ b/llvm/test/CodeGen/X86/twoaddr-lea.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-apple-darwin | FileCheck %s
;; X's live range extends beyond the shift, so the register allocator
;; cannot coalesce it with Y. Because of this, a copy needs to be
diff --git a/llvm/test/CodeGen/X86/twoaddr-sink-terminator.ll b/llvm/test/CodeGen/X86/twoaddr-sink-terminator.ll
index 209d474a07430..0a820e6845816 100644
--- a/llvm/test/CodeGen/X86/twoaddr-sink-terminator.ll
+++ b/llvm/test/CodeGen/X86/twoaddr-sink-terminator.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-coalescing
+; RUN: llc -combiner-topological-sorting < %s -verify-coalescing
; PR10998
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32"
diff --git a/llvm/test/CodeGen/X86/typeid-alias.ll b/llvm/test/CodeGen/X86/typeid-alias.ll
index 6fd71b41d1885..226daa049368d 100644
--- a/llvm/test/CodeGen/X86/typeid-alias.ll
+++ b/llvm/test/CodeGen/X86/typeid-alias.ll
@@ -1,7 +1,7 @@
; Test that we don't crash in the case where the type info object is an
; alias pointing to a non-zero offset within a global.
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/uadd_sat.ll b/llvm/test/CodeGen/X86/uadd_sat.ll
index 0a3c2ae344fd3..04fa4ad8ff062 100644
--- a/llvm/test/CodeGen/X86/uadd_sat.ll
+++ b/llvm/test/CodeGen/X86/uadd_sat.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
declare i4 @llvm.uadd.sat.i4(i4, i4)
declare i8 @llvm.uadd.sat.i8(i8, i8)
diff --git a/llvm/test/CodeGen/X86/uadd_sat_plus.ll b/llvm/test/CodeGen/X86/uadd_sat_plus.ll
index 654e3d77f52aa..b798c1b94bfa1 100644
--- a/llvm/test/CodeGen/X86/uadd_sat_plus.ll
+++ b/llvm/test/CodeGen/X86/uadd_sat_plus.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
declare i4 @llvm.uadd.sat.i4(i4, i4)
declare i8 @llvm.uadd.sat.i8(i8, i8)
diff --git a/llvm/test/CodeGen/X86/uadd_sat_vec.ll b/llvm/test/CodeGen/X86/uadd_sat_vec.ll
index d744ce6ed6af0..fd5e29192e231 100644
--- a/llvm/test/CodeGen/X86/uadd_sat_vec.ll
+++ b/llvm/test/CodeGen/X86/uadd_sat_vec.ll
@@ -1,13 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
declare <1 x i8> @llvm.uadd.sat.v1i8(<1 x i8>, <1 x i8>)
declare <2 x i8> @llvm.uadd.sat.v2i8(<2 x i8>, <2 x i8>)
diff --git a/llvm/test/CodeGen/X86/ubsan-trap-merge.ll b/llvm/test/CodeGen/X86/ubsan-trap-merge.ll
index 878260cbcaec2..55a24c6cd1440 100644
--- a/llvm/test/CodeGen/X86/ubsan-trap-merge.ll
+++ b/llvm/test/CodeGen/X86/ubsan-trap-merge.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -O3 -mtriple x86_64 -filetype asm -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -mtriple x86_64 -filetype asm -o - %s | FileCheck %s
;
; This test shows that ubsantrap can, in the absence of nomerge, be merged by
; the backend into a single ud1 instruction (thus making debugging difficult).
diff --git a/llvm/test/CodeGen/X86/ubsan-trap-nomerge.ll b/llvm/test/CodeGen/X86/ubsan-trap-nomerge.ll
index ffcbaac382d56..28a6ffb88c9d9 100644
--- a/llvm/test/CodeGen/X86/ubsan-trap-nomerge.ll
+++ b/llvm/test/CodeGen/X86/ubsan-trap-nomerge.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -O3 -mtriple x86_64 -filetype asm -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -mtriple x86_64 -filetype asm -o - %s | FileCheck %s
;
; This tests that the nomerge attribute for ubsantrap works correctly i.e.,
; they are lowered to separate ud1 instructions.
diff --git a/llvm/test/CodeGen/X86/ubsantrap.ll b/llvm/test/CodeGen/X86/ubsantrap.ll
index dbef12cba8818..1af0fdfd537d8 100644
--- a/llvm/test/CodeGen/X86/ubsantrap.ll
+++ b/llvm/test/CodeGen/X86/ubsantrap.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=x86_64-linux-gnu %s -o - | FileCheck %s
-; RUN: llc -mtriple=x86_64-scei-ps4 %s -o - | FileCheck --check-prefix=PS4 %s
-; RUN: llc -mtriple=x86_64-sie-ps5 %s -o - | FileCheck --check-prefix=PS4 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-scei-ps4 %s -o - | FileCheck --check-prefix=PS4 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-sie-ps5 %s -o - | FileCheck --check-prefix=PS4 %s
define void @test_ubsantrap() {
; CHECK-LABEL: test_ubsantrap
diff --git a/llvm/test/CodeGen/X86/udiv-const-optimization.ll b/llvm/test/CodeGen/X86/udiv-const-optimization.ll
index a4fa413bab038..00b9e2c18b37c 100644
--- a/llvm/test/CodeGen/X86/udiv-const-optimization.ll
+++ b/llvm/test/CodeGen/X86/udiv-const-optimization.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi2 | FileCheck %s --check-prefix=X64-BMI2
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+bmi2 | FileCheck %s --check-prefix=X64-BMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s --check-prefix=X86
; Test optimization of 32-bit unsigned division by constants with 33-bit magic
; constants (IsAdd=true) on 64-bit targets. The optimization uses pre-shifted
diff --git a/llvm/test/CodeGen/X86/udiv-exact.ll b/llvm/test/CodeGen/X86/udiv-exact.ll
index 208ff4dd32f85..4171a288aa10d 100644
--- a/llvm/test/CodeGen/X86/udiv-exact.ll
+++ b/llvm/test/CodeGen/X86/udiv-exact.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64
define i32 @test1(i32 %x) {
; X86-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/udivmodei5.ll b/llvm/test/CodeGen/X86/udivmodei5.ll
index 2c30357180e40..85b75751f5c0d 100644
--- a/llvm/test/CodeGen/X86/udivmodei5.ll
+++ b/llvm/test/CodeGen/X86/udivmodei5.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
; On i686, this is expanded into a loop. On x86_64, this calls __udivti3.
define i65 @udiv65(i65 %a, i65 %b) nounwind {
diff --git a/llvm/test/CodeGen/X86/uefi-fastcc.ll b/llvm/test/CodeGen/X86/uefi-fastcc.ll
index aeccb80393a61..d98ec2aeb48d4 100644
--- a/llvm/test/CodeGen/X86/uefi-fastcc.ll
+++ b/llvm/test/CodeGen/X86/uefi-fastcc.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=UEFIFAST64
-; RUN: llc < %s -mtriple=x86_64-windows-msvc | FileCheck %s -check-prefix=UEFIFAST64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=UEFIFAST64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc | FileCheck %s -check-prefix=UEFIFAST64
declare fastcc i32 @fastcallee1(i32 %a1, i32 %a2, i32 %a3, i32 %a4)
diff --git a/llvm/test/CodeGen/X86/uint64-to-float.ll b/llvm/test/CodeGen/X86/uint64-to-float.ll
index 03a8171589622..0e5595047cd6d 100644
--- a/llvm/test/CodeGen/X86/uint64-to-float.ll
+++ b/llvm/test/CodeGen/X86/uint64-to-float.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686-windows -mattr=+sse2 | FileCheck %s --check-prefix=X86-WIN
-; RUN: llc < %s -mtriple=x86_64-windows -mattr=+sse2 | FileCheck %s --check-prefix=X64-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-windows -mattr=+sse2 | FileCheck %s --check-prefix=X86-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows -mattr=+sse2 | FileCheck %s --check-prefix=X64-WIN
; Verify that we are using the efficient uitofp --> sitofp lowering illustrated
; by the compiler_rt implementation of __floatundisf.
diff --git a/llvm/test/CodeGen/X86/uint_to_fp-2.ll b/llvm/test/CodeGen/X86/uint_to_fp-2.ll
index 8c356d5432ce9..7814ae4639b1e 100644
--- a/llvm/test/CodeGen/X86/uint_to_fp-2.ll
+++ b/llvm/test/CodeGen/X86/uint_to_fp-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s
; rdar://6504833
define float @test1(i32 %x) nounwind readnone {
diff --git a/llvm/test/CodeGen/X86/uint_to_fp-3.ll b/llvm/test/CodeGen/X86/uint_to_fp-3.ll
index 93a573d5feccb..a4486b81349cb 100644
--- a/llvm/test/CodeGen/X86/uint_to_fp-3.ll
+++ b/llvm/test/CodeGen/X86/uint_to_fp-3.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X86-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
;PR29079
diff --git a/llvm/test/CodeGen/X86/uint_to_fp.ll b/llvm/test/CodeGen/X86/uint_to_fp.ll
index 8c8cbb151974d..17842e277e05f 100644
--- a/llvm/test/CodeGen/X86/uint_to_fp.ll
+++ b/llvm/test/CodeGen/X86/uint_to_fp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin8 -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-apple-darwin8 -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin8 -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin8 -mattr=+sse2 | FileCheck %s --check-prefix=X64
; rdar://6034396
define void @test(i32 %x, ptr %y) nounwind {
diff --git a/llvm/test/CodeGen/X86/uint_to_half.ll b/llvm/test/CodeGen/X86/uint_to_half.ll
index b62a07eec1ce6..94ab84e48fa9e 100644
--- a/llvm/test/CodeGen/X86/uint_to_half.ll
+++ b/llvm/test/CodeGen/X86/uint_to_half.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx,+f16c | FileCheck %s -check-prefixes=AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2,+f16c | FileCheck %s -check-prefixes=AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512vl | FileCheck %s -check-prefixes=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx,+f16c | FileCheck %s -check-prefixes=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2,+f16c | FileCheck %s -check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512vl | FileCheck %s -check-prefixes=AVX512
define <8 x half> @test_uitofp_v8i32_v8f16(<8 x i32> %a) {
; AVX1-LABEL: test_uitofp_v8i32_v8f16:
diff --git a/llvm/test/CodeGen/X86/uintr-intrinsics.ll b/llvm/test/CodeGen/X86/uintr-intrinsics.ll
index 47ec3046912f9..3d40e698653d8 100644
--- a/llvm/test/CodeGen/X86/uintr-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/uintr-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+uintr | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -mattr=+uintr | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+uintr | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 -mattr=+uintr | FileCheck %s --check-prefix=X32
define i8 @test_uintr(i64 %arg) {
; X64-LABEL: test_uintr:
diff --git a/llvm/test/CodeGen/X86/umin-sub-to-usubo-select-combine.ll b/llvm/test/CodeGen/X86/umin-sub-to-usubo-select-combine.ll
index 6739be52d47f6..7e9cbeb6b2d65 100644
--- a/llvm/test/CodeGen/X86/umin-sub-to-usubo-select-combine.ll
+++ b/llvm/test/CodeGen/X86/umin-sub-to-usubo-select-combine.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 | FileCheck %s
; GitHub issue #161036
diff --git a/llvm/test/CodeGen/X86/umin.ll b/llvm/test/CodeGen/X86/umin.ll
index 79e6eb32605d9..c1c1d65fb0eb5 100644
--- a/llvm/test/CodeGen/X86/umin.ll
+++ b/llvm/test/CodeGen/X86/umin.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=X64,SSE
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=avx | FileCheck %s --check-prefixes=X64,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=avx2 | FileCheck %s --check-prefixes=X64,AVX,AVX2
-; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefixes=X64,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=avx | FileCheck %s --check-prefixes=X64,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=avx2 | FileCheck %s --check-prefixes=X64,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
declare i8 @llvm.umin.i8(i8, i8)
declare i16 @llvm.umin.i16(i16, i16)
diff --git a/llvm/test/CodeGen/X86/umul-with-carry.ll b/llvm/test/CodeGen/X86/umul-with-carry.ll
index 787ce2fc57d73..370e2ccc83eca 100644
--- a/llvm/test/CodeGen/X86/umul-with-carry.ll
+++ b/llvm/test/CodeGen/X86/umul-with-carry.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-- | FileCheck %s
; FIXME: umul-with-overflow not supported yet.
diff --git a/llvm/test/CodeGen/X86/umul_fix_sat.ll b/llvm/test/CodeGen/X86/umul_fix_sat.ll
index 8c7078c726328..b103dbecb84f8 100644
--- a/llvm/test/CodeGen/X86/umul_fix_sat.ll
+++ b/llvm/test/CodeGen/X86/umul_fix_sat.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
declare i4 @llvm.umul.fix.sat.i4 (i4, i4, i32)
declare i32 @llvm.umul.fix.sat.i32 (i32, i32, i32)
diff --git a/llvm/test/CodeGen/X86/umulo-128-legalisation-lowering.ll b/llvm/test/CodeGen/X86/umulo-128-legalisation-lowering.ll
index 89afd1b00444b..540f5ce6c1f54 100644
--- a/llvm/test/CodeGen/X86/umulo-128-legalisation-lowering.ll
+++ b/llvm/test/CodeGen/X86/umulo-128-legalisation-lowering.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefixes=X86
define { i128, i8 } @muloti_test(i128 %l, i128 %r) unnamed_addr #0 {
; X64-LABEL: muloti_test:
diff --git a/llvm/test/CodeGen/X86/umulo-64-legalisation-lowering.ll b/llvm/test/CodeGen/X86/umulo-64-legalisation-lowering.ll
index 132683cdb0f9e..036f1f438f7e2 100644
--- a/llvm/test/CodeGen/X86/umulo-64-legalisation-lowering.ll
+++ b/llvm/test/CodeGen/X86/umulo-64-legalisation-lowering.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefixes=X86
define { i64, i8 } @mulodi_test(i64 %l, i64 %r) unnamed_addr #0 {
; X86-LABEL: mulodi_test:
diff --git a/llvm/test/CodeGen/X86/unaligned-32-byte-memops.ll b/llvm/test/CodeGen/X86/unaligned-32-byte-memops.ll
index 21dc46b52e43b..2cde78e5fd8b4 100644
--- a/llvm/test/CodeGen/X86/unaligned-32-byte-memops.ll
+++ b/llvm/test/CodeGen/X86/unaligned-32-byte-memops.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx,+slow-unaligned-mem-32 | FileCheck %s --check-prefix=AVXSLOW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx,-slow-unaligned-mem-32 | FileCheck %s --check-prefix=AVXFAST
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx,+slow-unaligned-mem-32 | FileCheck %s --check-prefix=AVXSLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx,-slow-unaligned-mem-32 | FileCheck %s --check-prefix=AVXFAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=AVX2
; Don't generate an unaligned 32-byte load on this test if that is slower than two 16-byte loads.
diff --git a/llvm/test/CodeGen/X86/unaligned-load.ll b/llvm/test/CodeGen/X86/unaligned-load.ll
index 2310cb228f063..2023e96c21087 100644
--- a/llvm/test/CodeGen/X86/unaligned-load.ll
+++ b/llvm/test/CodeGen/X86/unaligned-load.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin10.0 -mcpu=core2 -relocation-model=dynamic-no-pic | FileCheck -check-prefix=I386 %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -mcpu=core2 -relocation-model=dynamic-no-pic | FileCheck -check-prefix=CORE2 %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10.0 -mcpu=corei7 -relocation-model=dynamic-no-pic | FileCheck -check-prefix=COREI7 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10.0 -mcpu=core2 -relocation-model=dynamic-no-pic | FileCheck -check-prefix=I386 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10.0 -mcpu=core2 -relocation-model=dynamic-no-pic | FileCheck -check-prefix=CORE2 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10.0 -mcpu=corei7 -relocation-model=dynamic-no-pic | FileCheck -check-prefix=COREI7 %s
@.str1 = internal constant [31 x i8] c"DHRYSTONE PROGRAM, SOME STRING\00", align 8
@.str3 = internal constant [31 x i8] c"DHRYSTONE PROGRAM, 2'ND STRING\00", align 8
diff --git a/llvm/test/CodeGen/X86/unaligned-spill-folding.ll b/llvm/test/CodeGen/X86/unaligned-spill-folding.ll
index 0e676174e4252..9c01b7fee1608 100644
--- a/llvm/test/CodeGen/X86/unaligned-spill-folding.ll
+++ b/llvm/test/CodeGen/X86/unaligned-spill-folding.ll
@@ -1,9 +1,9 @@
; RUN: split-file %s %t
; RUN: cat %t/main.ll %t/align4.ll > %t/a2.ll
; RUN: cat %t/main.ll %t/align16.ll > %t/b2.ll
-; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -relocation-model=pic < %t/a2.ll | FileCheck %s -check-prefix=UNALIGNED
-; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -relocation-model=pic < %t/b2.ll | FileCheck %s -check-prefix=ALIGNED
-; RUN: llc -mtriple=i386-unknown-freebsd -mcpu=core2 -stackrealign -relocation-model=pic < %t/a2.ll | FileCheck %s -check-prefix=FORCEALIGNED
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-freebsd -mcpu=core2 -relocation-model=pic < %t/a2.ll | FileCheck %s -check-prefix=UNALIGNED
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-freebsd -mcpu=core2 -relocation-model=pic < %t/b2.ll | FileCheck %s -check-prefix=ALIGNED
+; RUN: llc -combiner-topological-sorting -mtriple=i386-unknown-freebsd -mcpu=core2 -stackrealign -relocation-model=pic < %t/a2.ll | FileCheck %s -check-prefix=FORCEALIGNED
;--- main.ll
@arr = internal unnamed_addr global [32 x i32] zeroinitializer, align 16
diff --git a/llvm/test/CodeGen/X86/unaligned_extract_from_vector_through_stack.ll b/llvm/test/CodeGen/X86/unaligned_extract_from_vector_through_stack.ll
index 629f44b52bc05..7d8d0504aa82b 100644
--- a/llvm/test/CodeGen/X86/unaligned_extract_from_vector_through_stack.ll
+++ b/llvm/test/CodeGen/X86/unaligned_extract_from_vector_through_stack.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define i32 @foo(i32 %arg1) #0 {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/undef-globals-bss.ll b/llvm/test/CodeGen/X86/undef-globals-bss.ll
index 85bec9eb6c70d..0e2d8c1012f85 100644
--- a/llvm/test/CodeGen/X86/undef-globals-bss.ll
+++ b/llvm/test/CodeGen/X86/undef-globals-bss.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target triple = "x86_64-apple-darwin"
; CHECK: .zerofill __DATA,__bss,_vals,8000000,2 ## @vals
diff --git a/llvm/test/CodeGen/X86/undef-label.ll b/llvm/test/CodeGen/X86/undef-label.ll
index a2d9bc571f582..41d26217268bf 100644
--- a/llvm/test/CodeGen/X86/undef-label.ll
+++ b/llvm/test/CodeGen/X86/undef-label.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
; This is a case where we would incorrectly conclude that LBB0_1 could only
; be reached via fall through and would therefore omit the label.
diff --git a/llvm/test/CodeGen/X86/undef-ops.ll b/llvm/test/CodeGen/X86/undef-ops.ll
index 2cc9212d83c45..a9574416b9dfd 100644
--- a/llvm/test/CodeGen/X86/undef-ops.ll
+++ b/llvm/test/CodeGen/X86/undef-ops.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define i32 @add_undef_rhs(i32 %x) {
; CHECK-LABEL: add_undef_rhs:
diff --git a/llvm/test/CodeGen/X86/unknown-location.ll b/llvm/test/CodeGen/X86/unknown-location.ll
index 3b90cf04b6971..30d79a10f7829 100644
--- a/llvm/test/CodeGen/X86/unknown-location.ll
+++ b/llvm/test/CodeGen/X86/unknown-location.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -asm-verbose=false -mtriple=x86_64-apple-darwin10 -use-unknown-locations=Enable | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -asm-verbose=false -mtriple=x86_64-apple-darwin10 -use-unknown-locations=Enable | FileCheck %s
; The divide instruction does not have a debug location. CodeGen should
; represent this in the debug information. This is done by setting line to 0.
diff --git a/llvm/test/CodeGen/X86/unpredictable-brcond.ll b/llvm/test/CodeGen/X86/unpredictable-brcond.ll
index bb44171d20d65..f7f4077c501bf 100644
--- a/llvm/test/CodeGen/X86/unpredictable-brcond.ll
+++ b/llvm/test/CodeGen/X86/unpredictable-brcond.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
; Make sure MIR generated for conditional branch with unpredictable metadata has unpredictable flag.
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -stop-after=finalize-isel < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -stop-after=finalize-isel < %s | FileCheck %s
define void @cond_branch_1(i1 %cond) {
; CHECK-LABEL: name: cond_branch_1
diff --git a/llvm/test/CodeGen/X86/unreachable-loop-sinking.ll b/llvm/test/CodeGen/X86/unreachable-loop-sinking.ll
index b09e2024db78a..e35a589ed83e2 100644
--- a/llvm/test/CodeGen/X86/unreachable-loop-sinking.ll
+++ b/llvm/test/CodeGen/X86/unreachable-loop-sinking.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR6777
; MachineSink shouldn't try to sink code in unreachable blocks, as it's
diff --git a/llvm/test/CodeGen/X86/unreachable-trap.ll b/llvm/test/CodeGen/X86/unreachable-trap.ll
index 486ee0f7a0e24..db97a91a8105c 100644
--- a/llvm/test/CodeGen/X86/unreachable-trap.ll
+++ b/llvm/test/CodeGen/X86/unreachable-trap.ll
@@ -1,18 +1,18 @@
-; RUN: llc -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK
-; RUN: llc -o - %s -mtriple=x86_64-windows-msvc | FileCheck %s --check-prefixes=CHECK
-; RUN: llc -o - %s -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefixes=CHECK,NO_TRAP_AFTER_NORETURN
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-windows-msvc | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefixes=CHECK,NO_TRAP_AFTER_NORETURN
; On PS4/PS5, always emit trap instructions regardless of of trap-unreachable or no-trap-after-noreturn.
-; RUN: llc -o - %s -mtriple=x86_64-scei-ps4 -trap-unreachable | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
-; RUN: llc -o - %s -mtriple=x86_64-sie-ps5 -trap-unreachable | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
-; RUN: llc -o - %s -mtriple=x86_64-scei-ps4 -trap-unreachable=false | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
-; RUN: llc -o - %s -mtriple=x86_64-sie-ps5 -trap-unreachable=false | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
-; RUN: llc -o - %s -mtriple=x86_64-scei-ps4 -trap-unreachable -no-trap-after-noreturn=false | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
-; RUN: llc -o - %s -mtriple=x86_64-sie-ps5 -trap-unreachable -no-trap-after-noreturn=false | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
-
-; RUN: llc --trap-unreachable -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
-; RUN: llc --trap-unreachable -global-isel -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
-; RUN: llc --trap-unreachable -fast-isel -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-scei-ps4 -trap-unreachable | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-sie-ps5 -trap-unreachable | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-scei-ps4 -trap-unreachable=false | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-sie-ps5 -trap-unreachable=false | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-scei-ps4 -trap-unreachable -no-trap-after-noreturn=false | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-sie-ps5 -trap-unreachable -no-trap-after-noreturn=false | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
+
+; RUN: llc -combiner-topological-sorting --trap-unreachable -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
+; RUN: llc -combiner-topological-sorting --trap-unreachable -global-isel -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
+; RUN: llc -combiner-topological-sorting --trap-unreachable -fast-isel -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK,TRAP_AFTER_NORETURN
; CHECK-LABEL: call_exit:
; CHECK: callq {{_?}}exit
diff --git a/llvm/test/CodeGen/X86/unreachable-ubsantrap.ll b/llvm/test/CodeGen/X86/unreachable-ubsantrap.ll
index d02a12b6c3af9..bf5e7c16c0a1f 100644
--- a/llvm/test/CodeGen/X86/unreachable-ubsantrap.ll
+++ b/llvm/test/CodeGen/X86/unreachable-ubsantrap.ll
@@ -1,9 +1,9 @@
-; RUN: llc -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK
-; RUN: llc -global-isel -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK
-; RUN: llc -fast-isel -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK
-; RUN: llc --trap-unreachable -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK,TRAP_UNREACHABLE
-; RUN: llc --trap-unreachable -global-isel -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK,TRAP_UNREACHABLE
-; RUN: llc --trap-unreachable -fast-isel -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK,TRAP_UNREACHABLE
+; RUN: llc -combiner-topological-sorting -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting -global-isel -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting -fast-isel -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting --trap-unreachable -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK,TRAP_UNREACHABLE
+; RUN: llc -combiner-topological-sorting --trap-unreachable -global-isel -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK,TRAP_UNREACHABLE
+; RUN: llc -combiner-topological-sorting --trap-unreachable -fast-isel -o - %s -mtriple=x86_64-linux-gnu | FileCheck %s --check-prefixes=CHECK,TRAP_UNREACHABLE
; CHECK-LABEL: ubsantrap:
; CHECK: ud1l 12(%eax), %eax
diff --git a/llvm/test/CodeGen/X86/unused_stackslots.ll b/llvm/test/CodeGen/X86/unused_stackslots.ll
index 4d390bd58ff2a..9d5f27b858244 100644
--- a/llvm/test/CodeGen/X86/unused_stackslots.ll
+++ b/llvm/test/CodeGen/X86/unused_stackslots.ll
@@ -1,5 +1,5 @@
; PR26374: Check no stack slots are allocated for vregs which have no real reference.
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/unwind-init.ll b/llvm/test/CodeGen/X86/unwind-init.ll
index d0915e244eeb6..be6fa8a7facc9 100644
--- a/llvm/test/CodeGen/X86/unwind-init.ll
+++ b/llvm/test/CodeGen/X86/unwind-init.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-linux < %s | FileCheck -check-prefix X8664 %s
-; RUN: llc -mtriple=i686-unknown-linux < %s | FileCheck -check-prefix X8632 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux < %s | FileCheck -check-prefix X8664 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-linux < %s | FileCheck -check-prefix X8632 %s
; Check that all callee-saved registers are saved and restored in functions
; that call __builtin_unwind_init(). This is its undocumented behavior in gcc,
; and it is used in compiling libgcc_eh.
diff --git a/llvm/test/CodeGen/X86/unwind-inline-asm-codegen.ll b/llvm/test/CodeGen/X86/unwind-inline-asm-codegen.ll
index be873c3ce20e1..d119e4cde4dec 100644
--- a/llvm/test/CodeGen/X86/unwind-inline-asm-codegen.ll
+++ b/llvm/test/CodeGen/X86/unwind-inline-asm-codegen.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/unwindraise.ll b/llvm/test/CodeGen/X86/unwindraise.ll
index 2a6bb6d5243e0..421b48cc9b2dd 100644
--- a/llvm/test/CodeGen/X86/unwindraise.ll
+++ b/llvm/test/CodeGen/X86/unwindraise.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -verify-machineinstrs
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs
; PR13188
;
; The _Unwind_RaiseException function can return normally and via eh.return.
diff --git a/llvm/test/CodeGen/X86/update-terminator-debugloc.ll b/llvm/test/CodeGen/X86/update-terminator-debugloc.ll
index 7c592ef318787..54e3f49ddad85 100644
--- a/llvm/test/CodeGen/X86/update-terminator-debugloc.ll
+++ b/llvm/test/CodeGen/X86/update-terminator-debugloc.ll
@@ -1,4 +1,4 @@
-; RUN: llc -stop-after=machine-sink < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -stop-after=machine-sink < %s | FileCheck %s
;
; test code:
; 1 extern int bar(int x);
diff --git a/llvm/test/CodeGen/X86/urem-i8-constant.ll b/llvm/test/CodeGen/X86/urem-i8-constant.ll
index ae218405c0ef0..c7076ff3ae785 100644
--- a/llvm/test/CodeGen/X86/urem-i8-constant.ll
+++ b/llvm/test/CodeGen/X86/urem-i8-constant.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown | FileCheck %s
; computeKnownBits determines that we don't need a mask op that is required in the general case.
diff --git a/llvm/test/CodeGen/X86/urem-lkk.ll b/llvm/test/CodeGen/X86/urem-lkk.ll
index 4ac12eae0e5b9..fa0c1b2670aa7 100644
--- a/llvm/test/CodeGen/X86/urem-lkk.ll
+++ b/llvm/test/CodeGen/X86/urem-lkk.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK
define i32 @fold_urem_positive_odd(i32 %x) {
; CHECK-LABEL: fold_urem_positive_odd:
diff --git a/llvm/test/CodeGen/X86/urem-power-of-two.ll b/llvm/test/CodeGen/X86/urem-power-of-two.ll
index 16dddfa7e819d..cac45ca4b8b25 100644
--- a/llvm/test/CodeGen/X86/urem-power-of-two.ll
+++ b/llvm/test/CodeGen/X86/urem-power-of-two.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
; The easy case: a constant power-of-2 divisor.
diff --git a/llvm/test/CodeGen/X86/urem-vector-lkk.ll b/llvm/test/CodeGen/X86/urem-vector-lkk.ll
index 3faa2a0720d4e..1145a04b665bd 100644
--- a/llvm/test/CodeGen/X86/urem-vector-lkk.ll
+++ b/llvm/test/CodeGen/X86/urem-vector-lkk.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
define <4 x i16> @fold_urem_vec_1(<4 x i16> %x) {
; SSE2-LABEL: fold_urem_vec_1:
diff --git a/llvm/test/CodeGen/X86/use-add-flags.ll b/llvm/test/CodeGen/X86/use-add-flags.ll
index a28bad20e5d78..a5ad6b71175af 100644
--- a/llvm/test/CodeGen/X86/use-add-flags.ll
+++ b/llvm/test/CodeGen/X86/use-add-flags.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=LNX
-; RUN: llc < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=LNX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 | FileCheck %s --check-prefix=WIN
; Reuse the flags value from the add instructions instead of emitting separate
; testl instructions.
diff --git a/llvm/test/CodeGen/X86/use-cr-result-of-dom-icmp-st.ll b/llvm/test/CodeGen/X86/use-cr-result-of-dom-icmp-st.ll
index 95831d506d3c0..602cc92aa034f 100644
--- a/llvm/test/CodeGen/X86/use-cr-result-of-dom-icmp-st.ll
+++ b/llvm/test/CodeGen/X86/use-cr-result-of-dom-icmp-st.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -O3 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=DEFAULT
-; RUN: llc -mtriple=x86_64-unknown-unknown -O3 -cgp-icmp-eq2icmp-st -verify-machineinstrs < %s | FileCheck %s --check-prefixes=EQ2ICMP
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -O3 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=DEFAULT
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -O3 -cgp-icmp-eq2icmp-st -verify-machineinstrs < %s | FileCheck %s --check-prefixes=EQ2ICMP
; Test cases are generated from:
; long long NAME(PARAM a, PARAM b) {
diff --git a/llvm/test/CodeGen/X86/usermsr-intrinsics.ll b/llvm/test/CodeGen/X86/usermsr-intrinsics.ll
index 42fe8d4f3f7d8..81d4ae92fa484 100644
--- a/llvm/test/CodeGen/X86/usermsr-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/usermsr-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+usermsr | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+usermsr,+egpr | FileCheck %s --check-prefixes=EGPR
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+usermsr | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown --show-mc-encoding -mattr=+usermsr,+egpr | FileCheck %s --check-prefixes=EGPR
define i64 @test_int_x86_urdmsr(i64 %A) nounwind {
; X64-LABEL: test_int_x86_urdmsr:
diff --git a/llvm/test/CodeGen/X86/usub_sat.ll b/llvm/test/CodeGen/X86/usub_sat.ll
index 6749a1f9147af..7e3b0295d06f2 100644
--- a/llvm/test/CodeGen/X86/usub_sat.ll
+++ b/llvm/test/CodeGen/X86/usub_sat.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
declare i4 @llvm.usub.sat.i4(i4, i4)
declare i8 @llvm.usub.sat.i8(i8, i8)
diff --git a/llvm/test/CodeGen/X86/usub_sat_plus.ll b/llvm/test/CodeGen/X86/usub_sat_plus.ll
index 0fb14ad5cf7b0..161e0d84ed39a 100644
--- a/llvm/test/CodeGen/X86/usub_sat_plus.ll
+++ b/llvm/test/CodeGen/X86/usub_sat_plus.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686 -mattr=cmov | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s --check-prefix=X64
declare i4 @llvm.usub.sat.i4(i4, i4)
declare i8 @llvm.usub.sat.i8(i8, i8)
diff --git a/llvm/test/CodeGen/X86/utf16-cfstrings.ll b/llvm/test/CodeGen/X86/utf16-cfstrings.ll
index c35af3296f6de..6ddbc19dad659 100644
--- a/llvm/test/CodeGen/X86/utf16-cfstrings.ll
+++ b/llvm/test/CodeGen/X86/utf16-cfstrings.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple x86_64-apple-macosx10 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-apple-macosx10 | FileCheck %s
; <rdar://problem/10655949>
%0 = type opaque
diff --git a/llvm/test/CodeGen/X86/utf8.ll b/llvm/test/CodeGen/X86/utf8.ll
index baf01a2cb764f..f5fe488008b72 100644
--- a/llvm/test/CodeGen/X86/utf8.ll
+++ b/llvm/test/CodeGen/X86/utf8.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; CHECK: iΔ
@"i\CE\94" = common global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/uwtables.ll b/llvm/test/CodeGen/X86/uwtables.ll
index 68a5ff102199c..b4694d4c1f6ab 100644
--- a/llvm/test/CodeGen/X86/uwtables.ll
+++ b/llvm/test/CodeGen/X86/uwtables.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
@_ZTIi = external constant ptr
diff --git a/llvm/test/CodeGen/X86/v2f32.ll b/llvm/test/CodeGen/X86/v2f32.ll
index f1f8b92208faf..4bccb58b67beb 100644
--- a/llvm/test/CodeGen/X86/v2f32.ll
+++ b/llvm/test/CodeGen/X86/v2f32.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn | FileCheck %s --check-prefixes=CHECK,X64
-; RUN: llc < %s -mtriple=i386-linux-gnu -mcpu=yonah | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=penryn | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -mcpu=yonah | FileCheck %s --check-prefixes=CHECK,X86
; PR7518
define void @test1(<2 x float> %Q, ptr%P2) nounwind {
diff --git a/llvm/test/CodeGen/X86/v4f32-immediate.ll b/llvm/test/CodeGen/X86/v4f32-immediate.ll
index ce886da0ce98c..342c0dda32bd0 100644
--- a/llvm/test/CodeGen/X86/v4f32-immediate.ll
+++ b/llvm/test/CodeGen/X86/v4f32-immediate.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse | FileCheck %s --check-prefix=X64
define <4 x float> @foo() {
; X86-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/v4i32load-crash.ll b/llvm/test/CodeGen/X86/v4i32load-crash.ll
index 922f473114670..2801d290b168f 100644
--- a/llvm/test/CodeGen/X86/v4i32load-crash.ll
+++ b/llvm/test/CodeGen/X86/v4i32load-crash.ll
@@ -1,5 +1,5 @@
-; RUN: llc --mtriple=i686-- --mcpu=x86-64 --mattr=ssse3 < %s
-; RUN: llc --mtriple=x86_64-- --mcpu=x86-64 --mattr=ssse3 < %s
+; RUN: llc -combiner-topological-sorting --mtriple=i686-- --mcpu=x86-64 --mattr=ssse3 < %s
+; RUN: llc -combiner-topological-sorting --mtriple=x86_64-- --mcpu=x86-64 --mattr=ssse3 < %s
;PR18045:
;Issue of selection for 'v4i32 load'.
diff --git a/llvm/test/CodeGen/X86/vaargs-prolog-insert.ll b/llvm/test/CodeGen/X86/vaargs-prolog-insert.ll
index 94799b5233847..022d3f6631a24 100644
--- a/llvm/test/CodeGen/X86/vaargs-prolog-insert.ll
+++ b/llvm/test/CodeGen/X86/vaargs-prolog-insert.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 < %s | FileCheck %s
; Check the prolog won't be sunk across the save of CSRs.
define void @reduce(i32, i32, i32, i32, i32, i32, ...) nounwind {
diff --git a/llvm/test/CodeGen/X86/vaargs-win32.ll b/llvm/test/CodeGen/X86/vaargs-win32.ll
index 38c7b73ebab49..d66db9d14f8fa 100644
--- a/llvm/test/CodeGen/X86/vaargs-win32.ll
+++ b/llvm/test/CodeGen/X86/vaargs-win32.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --no_x86_scrub_mem_shuffle
-; RUN: llc -mcpu=generic -mtriple=i686-pc-windows-msvc -mattr=+sse2 < %s | FileCheck %s --check-prefix=MSVC
-; RUN: llc -mcpu=generic -mtriple=i686-pc-mingw32 -mattr=+sse2 < %s | FileCheck %s --check-prefix=MINGW
+; RUN: llc -combiner-topological-sorting -mcpu=generic -mtriple=i686-pc-windows-msvc -mattr=+sse2 < %s | FileCheck %s --check-prefix=MSVC
+; RUN: llc -combiner-topological-sorting -mcpu=generic -mtriple=i686-pc-mingw32 -mattr=+sse2 < %s | FileCheck %s --check-prefix=MINGW
@a = external dso_local global <4 x float>, align 16
diff --git a/llvm/test/CodeGen/X86/vaargs.ll b/llvm/test/CodeGen/X86/vaargs.ll
index dc1c5d97716ba..af3fdfba298a3 100644
--- a/llvm/test/CodeGen/X86/vaargs.ll
+++ b/llvm/test/CodeGen/X86/vaargs.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -mcpu=corei7-avx %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=NO-FLAGS
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mcpu=corei7-avx %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=NO-FLAGS
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.9.0"
diff --git a/llvm/test/CodeGen/X86/vaes-intrinsics-avx-x86.ll b/llvm/test/CodeGen/X86/vaes-intrinsics-avx-x86.ll
index 06acb27218e89..f8c8efff83927 100644
--- a/llvm/test/CodeGen/X86/vaes-intrinsics-avx-x86.ll
+++ b/llvm/test/CodeGen/X86/vaes-intrinsics-avx-x86.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+vaes -show-mc-encoding | FileCheck %s --check-prefix=VAES_AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx,+vaes -show-mc-encoding | FileCheck %s --check-prefix=VAES_AVX
; {vaes, avx}
define <4 x i64> @test_x86_aesni_aesenc_256(<4 x i64> %a0, <4 x i64> %a1) {
diff --git a/llvm/test/CodeGen/X86/vaes-intrinsics-avx512-x86.ll b/llvm/test/CodeGen/X86/vaes-intrinsics-avx512-x86.ll
index b36400df16d57..0fe27e4d26417 100644
--- a/llvm/test/CodeGen/X86/vaes-intrinsics-avx512-x86.ll
+++ b/llvm/test/CodeGen/X86/vaes-intrinsics-avx512-x86.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+vaes,+avx512f -show-mc-encoding | FileCheck %s --check-prefix=VAES_AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+vaes,+avx512f -show-mc-encoding | FileCheck %s --check-prefix=VAES_AVX512
define <8 x i64> @test_x86_aesni_aesenc_512(<8 x i64> %a0, <8 x i64> %a1) {
; VAES_AVX512-LABEL: test_x86_aesni_aesenc_512:
diff --git a/llvm/test/CodeGen/X86/vaes-intrinsics-avx512vl-x86.ll b/llvm/test/CodeGen/X86/vaes-intrinsics-avx512vl-x86.ll
index 79b3b7bfba56c..ca0857d82cdd7 100644
--- a/llvm/test/CodeGen/X86/vaes-intrinsics-avx512vl-x86.ll
+++ b/llvm/test/CodeGen/X86/vaes-intrinsics-avx512vl-x86.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+vaes,+avx512f,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=VAES_AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+vaes,+avx512f,+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=VAES_AVX512VL
define <2 x i64> @test_x86_aesni_aesenc(<2 x i64> %a0, <2 x i64> %a1) {
; VAES_AVX512VL-LABEL: test_x86_aesni_aesenc:
diff --git a/llvm/test/CodeGen/X86/var-permute-256.ll b/llvm/test/CodeGen/X86/var-permute-256.ll
index 283c6a303a581..e0b2d3bc4772b 100644
--- a/llvm/test/CodeGen/X86/var-permute-256.ll
+++ b/llvm/test/CodeGen/X86/var-permute-256.ll
@@ -1,15 +1,15 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --no_x86_scrub_mem_shuffle
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop | FileCheck %s --check-prefix=XOP
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=INT256,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=INT256,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=INT256,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=INT256,AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi | FileCheck %s --check-prefixes=INT256,AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=INT256,AVX512VL,AVX512VLF
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=INT256,AVX512VL,AVX512VLF
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=INT256,AVX512VL,AVX512VLBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+avx512vbmi | FileCheck %s --check-prefixes=INT256,AVX512VL,VLVBMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop | FileCheck %s --check-prefix=XOP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=INT256,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=INT256,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=INT256,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=INT256,AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi | FileCheck %s --check-prefixes=INT256,AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=INT256,AVX512VL,AVX512VLF
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=INT256,AVX512VL,AVX512VLF
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=INT256,AVX512VL,AVX512VLBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+avx512vbmi | FileCheck %s --check-prefixes=INT256,AVX512VL,VLVBMI
define <4 x i64> @var_shuffle_v4i64(<4 x i64> %v, <4 x i64> %indices) nounwind {
; XOP-LABEL: var_shuffle_v4i64:
diff --git a/llvm/test/CodeGen/X86/vararg-callee-cleanup.ll b/llvm/test/CodeGen/X86/vararg-callee-cleanup.ll
index db450d1e34eed..bc4f6232087be 100644
--- a/llvm/test/CodeGen/X86/vararg-callee-cleanup.ll
+++ b/llvm/test/CodeGen/X86/vararg-callee-cleanup.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=i686-pc-windows -no-x86-call-frame-opt < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-pc-windows -no-x86-call-frame-opt < %s | FileCheck %s
target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32"
diff --git a/llvm/test/CodeGen/X86/vararg_no_start.ll b/llvm/test/CodeGen/X86/vararg_no_start.ll
index 15287c25fb169..da5e8d3a5e521 100644
--- a/llvm/test/CodeGen/X86/vararg_no_start.ll
+++ b/llvm/test/CodeGen/X86/vararg_no_start.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc < %s | FileCheck %s
define void @foo(ptr, ...) {
ret void
diff --git a/llvm/test/CodeGen/X86/vararg_tailcall.ll b/llvm/test/CodeGen/X86/vararg_tailcall.ll
index ab930ec2c09bf..fa9a5ad5d3f62 100644
--- a/llvm/test/CodeGen/X86/vararg_tailcall.ll
+++ b/llvm/test/CodeGen/X86/vararg_tailcall.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck %s -check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin10 | FileCheck %s -check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 | FileCheck %s -check-prefix=WIN64
@.str = private unnamed_addr constant [5 x i8] c"%ld\0A\00"
@sel = external global ptr
diff --git a/llvm/test/CodeGen/X86/varargs-softfloat.ll b/llvm/test/CodeGen/X86/varargs-softfloat.ll
index 9b9e22c30cffb..7fac691ffcdaf 100644
--- a/llvm/test/CodeGen/X86/varargs-softfloat.ll
+++ b/llvm/test/CodeGen/X86/varargs-softfloat.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
%struct.__va_list_tag = type { i32, i32, ptr, ptr }
diff --git a/llvm/test/CodeGen/X86/variable-sized-darwin-bzero.ll b/llvm/test/CodeGen/X86/variable-sized-darwin-bzero.ll
index 9529a42355647..96a009be16b15 100644
--- a/llvm/test/CodeGen/X86/variable-sized-darwin-bzero.ll
+++ b/llvm/test/CodeGen/X86/variable-sized-darwin-bzero.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin10 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin10 | FileCheck %s
define void @foo(ptr %p, i64 %n) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/variadic-node-pic.ll b/llvm/test/CodeGen/X86/variadic-node-pic.ll
index 0d4287de40334..b36a744e67436 100644
--- a/llvm/test/CodeGen/X86/variadic-node-pic.ll
+++ b/llvm/test/CodeGen/X86/variadic-node-pic.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=pic -code-model=large | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -code-model=large | FileCheck %s
; CHECK-LABEL: foo:
; CHECK: movabsq $_xscanf, %[[REG:[^ ]*]]
diff --git a/llvm/test/CodeGen/X86/vbinop-simplify-bug.ll b/llvm/test/CodeGen/X86/vbinop-simplify-bug.ll
index 3a89cd7e636ab..e779e09ef891c 100644
--- a/llvm/test/CodeGen/X86/vbinop-simplify-bug.ll
+++ b/llvm/test/CodeGen/X86/vbinop-simplify-bug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=sse2 -mcpu=corei7 -o /dev/null
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=sse2 -mcpu=corei7 -o /dev/null
; Revision 199135 introduced a wrong check in method
; DAGCombiner::SimplifyVBinOp in an attempt to refactor some code
diff --git a/llvm/test/CodeGen/X86/vec-2bit-int.ll b/llvm/test/CodeGen/X86/vec-2bit-int.ll
index 2e172fd45d33b..64814dcf498d6 100644
--- a/llvm/test/CodeGen/X86/vec-2bit-int.ll
+++ b/llvm/test/CodeGen/X86/vec-2bit-int.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define dso_local <2 x i2> @foo(<2 x i2> %v1, <2 x i2> %v2) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/vec-copysign-avx512.ll b/llvm/test/CodeGen/X86/vec-copysign-avx512.ll
index b0eac7205a592..ae4dca91e147c 100644
--- a/llvm/test/CodeGen/X86/vec-copysign-avx512.ll
+++ b/llvm/test/CodeGen/X86/vec-copysign-avx512.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx512vl | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx512vl,+avx512dq | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx512vl,+avx512dq | FileCheck %s
define <4 x float> @v4f32(<4 x float> %a, <4 x float> %b) nounwind {
; CHECK-LABEL: v4f32:
diff --git a/llvm/test/CodeGen/X86/vec-copysign.ll b/llvm/test/CodeGen/X86/vec-copysign.ll
index c6a0a0b4def7a..44a68f1bdd81b 100644
--- a/llvm/test/CodeGen/X86/vec-copysign.ll
+++ b/llvm/test/CodeGen/X86/vec-copysign.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.10.0 -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
; Assertions have been enhanced from utils/update_llc_test_checks.py to show the constant pool values.
; Use a macosx triple to make sure the format of those constant strings is exact.
diff --git a/llvm/test/CodeGen/X86/vec-libcalls.ll b/llvm/test/CodeGen/X86/vec-libcalls.ll
index b107b1c2749cc..8b326b923e4ff 100644
--- a/llvm/test/CodeGen/X86/vec-libcalls.ll
+++ b/llvm/test/CodeGen/X86/vec-libcalls.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=avx | FileCheck %s
; PR38527 - https://bugs.llvm.org/show_bug.cgi?id=38527
diff --git a/llvm/test/CodeGen/X86/vec-loadsingles-alignment.ll b/llvm/test/CodeGen/X86/vec-loadsingles-alignment.ll
index 60e9be0f26781..7a8fbb161cff5 100644
--- a/llvm/test/CodeGen/X86/vec-loadsingles-alignment.ll
+++ b/llvm/test/CodeGen/X86/vec-loadsingles-alignment.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s
@e = dso_local global [8 x i32] [i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8], align 16
@d = dso_local global [8 x i32] [i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1], align 16
diff --git a/llvm/test/CodeGen/X86/vec-strict-128-fp16.ll b/llvm/test/CodeGen/X86/vec-strict-128-fp16.ll
index 766ccdbada539..52fb63f96d810 100644
--- a/llvm/test/CodeGen/X86/vec-strict-128-fp16.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-128-fp16.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=CHECK
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=CHECK
declare <8 x half> @llvm.experimental.constrained.fadd.v8f16(<8 x half>, <8 x half>, metadata, metadata)
declare <8 x half> @llvm.experimental.constrained.fsub.v8f16(<8 x half>, <8 x half>, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-128.ll b/llvm/test/CodeGen/X86/vec-strict-128.ll
index 84c0ff61cf9b7..bbb68bae7c1a3 100644
--- a/llvm/test/CodeGen/X86/vec-strict-128.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-128.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE,SSE-X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE,SSE-X64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+fma -O3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+fma -O3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE,SSE-X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE,SSE-X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+fma -O3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+fma -O3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX
declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float>, <4 x float>, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-256-fp16.ll b/llvm/test/CodeGen/X86/vec-strict-256-fp16.ll
index a2e02508327c8..74768325c2de3 100644
--- a/llvm/test/CodeGen/X86/vec-strict-256-fp16.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-256-fp16.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s
declare <16 x half> @llvm.experimental.constrained.fadd.v16f16(<16 x half>, <16 x half>, metadata, metadata)
declare <16 x half> @llvm.experimental.constrained.fsub.v16f16(<16 x half>, <16 x half>, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-256.ll b/llvm/test/CodeGen/X86/vec-strict-256.ll
index 5945e6c1bc66e..f5b33acbea3cf 100644
--- a/llvm/test/CodeGen/X86/vec-strict-256.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-256.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+fma -O3 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+fma -O3 | FileCheck %s
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+fma -O3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+fma -O3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s
declare <4 x double> @llvm.experimental.constrained.fadd.v4f64(<4 x double>, <4 x double>, metadata, metadata)
declare <8 x float> @llvm.experimental.constrained.fadd.v8f32(<8 x float>, <8 x float>, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-512-fp16.ll b/llvm/test/CodeGen/X86/vec-strict-512-fp16.ll
index dfbc11a43d3d7..ebad5a5873cc8 100644
--- a/llvm/test/CodeGen/X86/vec-strict-512-fp16.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-512-fp16.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s
declare <32 x half> @llvm.experimental.constrained.fadd.v32f16(<32 x half>, <32 x half>, metadata, metadata)
declare <32 x half> @llvm.experimental.constrained.fsub.v32f16(<32 x half>, <32 x half>, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-512.ll b/llvm/test/CodeGen/X86/vec-strict-512.ll
index 2cafd74af4953..004be68fd1306 100644
--- a/llvm/test/CodeGen/X86/vec-strict-512.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-512.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s
declare <8 x double> @llvm.experimental.constrained.fadd.v8f64(<8 x double>, <8 x double>, metadata, metadata)
declare <16 x float> @llvm.experimental.constrained.fadd.v16f32(<16 x float>, <16 x float>, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-cmp-128-fp16.ll b/llvm/test/CodeGen/X86/vec-strict-cmp-128-fp16.ll
index b14b5b118f280..7856fe1a6a4b3 100644
--- a/llvm/test/CodeGen/X86/vec-strict-cmp-128-fp16.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-cmp-128-fp16.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=X64
define <8 x i16> @test_v8f16_oeq_q(<8 x i16> %a, <8 x i16> %b, <8 x half> %f1, <8 x half> %f2) #0 {
; X86-LABEL: test_v8f16_oeq_q:
diff --git a/llvm/test/CodeGen/X86/vec-strict-cmp-128.ll b/llvm/test/CodeGen/X86/vec-strict-cmp-128.ll
index bf37551712bc3..b322b989e21ae 100644
--- a/llvm/test/CodeGen/X86/vec-strict-cmp-128.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-cmp-128.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX512-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX512-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX512F-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX512F-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX512-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX512-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX512F-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX512F-64
define <4 x i32> @test_v4f32_oeq_q(<4 x i32> %a, <4 x i32> %b, <4 x float> %f1, <4 x float> %f2) #0 {
; SSE-32-LABEL: test_v4f32_oeq_q:
diff --git a/llvm/test/CodeGen/X86/vec-strict-cmp-256-fp16.ll b/llvm/test/CodeGen/X86/vec-strict-cmp-256-fp16.ll
index 81987dca26567..fe8bc6d89fbe3 100644
--- a/llvm/test/CodeGen/X86/vec-strict-cmp-256-fp16.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-cmp-256-fp16.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX512-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX512-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX512-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX512-64
define <16 x i16> @test_v16f16_oeq_q(<16 x i16> %a, <16 x i16> %b, <16 x half> %f1, <16 x half> %f2) #0 {
; AVX512-32-LABEL: test_v16f16_oeq_q:
diff --git a/llvm/test/CodeGen/X86/vec-strict-cmp-256.ll b/llvm/test/CodeGen/X86/vec-strict-cmp-256.ll
index aa16c7c9e50d2..2492f653ca8bc 100644
--- a/llvm/test/CodeGen/X86/vec-strict-cmp-256.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-cmp-256.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefix=AVX512-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefix=AVX512-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefix=AVX512F-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefix=AVX512F-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefix=AVX512-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefix=AVX512-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefix=AVX512F-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefix=AVX512F-64
define <8 x i32> @test_v8f32_oeq_q(<8 x i32> %a, <8 x i32> %b, <8 x float> %f1, <8 x float> %f2) #0 {
; AVX-32-LABEL: test_v8f32_oeq_q:
diff --git a/llvm/test/CodeGen/X86/vec-strict-cmp-512-fp16.ll b/llvm/test/CodeGen/X86/vec-strict-cmp-512-fp16.ll
index bfeb41e9cf94e..1ae2645d67a4a 100644
--- a/llvm/test/CodeGen/X86/vec-strict-cmp-512-fp16.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-cmp-512-fp16.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -O3 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -O3 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16 -O3 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16 -O3 | FileCheck %s --check-prefixes=X64
define <32 x i16> @test_v32f16_oeq_q(<32 x i16> %a, <32 x i16> %b, <32 x half> %f1, <32 x half> %f2) #0 {
; X86-LABEL: test_v32f16_oeq_q:
diff --git a/llvm/test/CodeGen/X86/vec-strict-cmp-512-skx.ll b/llvm/test/CodeGen/X86/vec-strict-cmp-512-skx.ll
index cf6edbc628503..beb2939e8a16d 100644
--- a/llvm/test/CodeGen/X86/vec-strict-cmp-512-skx.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-cmp-512-skx.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64 -mcpu=skx | FileCheck %s --check-prefixes=SKX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mcpu=skx | FileCheck %s --check-prefixes=SKX
;; Test no crash for AVX512 targets without prefer-vector-width=512.
diff --git a/llvm/test/CodeGen/X86/vec-strict-cmp-512.ll b/llvm/test/CodeGen/X86/vec-strict-cmp-512.ll
index 80835b76fd4a3..32df91ebeebe5 100644
--- a/llvm/test/CodeGen/X86/vec-strict-cmp-512.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-cmp-512.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=X64
define <16 x i32> @test_v16f32_oeq_q(<16 x i32> %a, <16 x i32> %b, <16 x float> %f1, <16 x float> %f2) #0 {
; X86-LABEL: test_v16f32_oeq_q:
diff --git a/llvm/test/CodeGen/X86/vec-strict-cmp-sub128.ll b/llvm/test/CodeGen/X86/vec-strict-cmp-sub128.ll
index 2eeee032c1c6e..66319aa49e758 100644
--- a/llvm/test/CodeGen/X86/vec-strict-cmp-sub128.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-cmp-sub128.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefix=SSE-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefix=SSE-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefix=AVX512-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefix=AVX512-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512f -O3 | FileCheck %s --check-prefix=AVX512F-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512f -O3 | FileCheck %s --check-prefix=AVX512F-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefix=SSE-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefix=SSE-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefix=AVX-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefix=AVX512-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512vl -O3 | FileCheck %s --check-prefix=AVX512-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -mattr=+avx512f -O3 | FileCheck %s --check-prefix=AVX512F-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -mattr=+avx512f -O3 | FileCheck %s --check-prefix=AVX512F-64
define <2 x i32> @test_v2f32_ogt_s(<2 x i32> %a, <2 x i32> %b, <2 x float> %f1, <2 x float> %f2) #0 {
; SSE-32-LABEL: test_v2f32_ogt_s:
diff --git a/llvm/test/CodeGen/X86/vec-strict-fptoint-128-fp16.ll b/llvm/test/CodeGen/X86/vec-strict-fptoint-128-fp16.ll
index 6aad9a6d82c73..1e8bb268edad3 100644
--- a/llvm/test/CodeGen/X86/vec-strict-fptoint-128-fp16.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-fptoint-128-fp16.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16 -O3 | FileCheck %s --check-prefixes=NOVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16 -O3 | FileCheck %s --check-prefixes=NOVL
declare <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f16(<2 x half>, metadata)
declare <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f16(<2 x half>, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-fptoint-128.ll b/llvm/test/CodeGen/X86/vec-strict-fptoint-128.ll
index 48a0b27a207f3..a1fa7db9f9c0c 100644
--- a/llvm/test/CodeGen/X86/vec-strict-fptoint-128.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-fptoint-128.ll
@@ -1,16 +1,16 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefix=SSE-32
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefix=SSE-64
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX,AVX-32
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX,AVX-64
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX512F,AVX512F-32
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX512F,AVX512F-64
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX512VL,AVX512VL-32
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX512VL,AVX512VL-64
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=avx512dq -O3 | FileCheck %s --check-prefixes=AVX512DQ,AVX512DQ-32
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx512dq -O3 | FileCheck %s --check-prefixes=AVX512DQ,AVX512DQ-64
-; RUN: llc < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=avx512dq,avx512vl -O3 | FileCheck %s --check-prefixes=AVX512VLDQ,AVX512VLDQ-32
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx512dq,avx512vl -O3 | FileCheck %s --check-prefixes=AVX512VLDQ,AVX512VLDQ-64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefix=SSE-32
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefix=SSE-64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX,AVX-32
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX,AVX-64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX512F,AVX512F-32
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX512F,AVX512F-64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX512VL,AVX512VL-32
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=AVX512VL,AVX512VL-64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=avx512dq -O3 | FileCheck %s --check-prefixes=AVX512DQ,AVX512DQ-32
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx512dq -O3 | FileCheck %s --check-prefixes=AVX512DQ,AVX512DQ-64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-unknown-unknown -mattr=avx512dq,avx512vl -O3 | FileCheck %s --check-prefixes=AVX512VLDQ,AVX512VLDQ-32
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=avx512dq,avx512vl -O3 | FileCheck %s --check-prefixes=AVX512VLDQ,AVX512VLDQ-64
declare <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f64(<2 x double>, metadata)
declare <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f64(<2 x double>, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-fptoint-256-fp16.ll b/llvm/test/CodeGen/X86/vec-strict-fptoint-256-fp16.ll
index a232122e9c707..63dc4e2482c0c 100644
--- a/llvm/test/CodeGen/X86/vec-strict-fptoint-256-fp16.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-fptoint-256-fp16.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16 -O3 | FileCheck %s --check-prefixes=NOVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16 -O3 | FileCheck %s --check-prefixes=NOVL
declare <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f16(<4 x half>, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll b/llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll
index 179e8ad69672b..de54f445c3ab0 100644
--- a/llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=CHECK,AVX,AVX-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=CHECK,AVX,AVX-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=CHECK,AVX512F,AVX512F-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=CHECK,AVX512F,AVX512F-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX512VL-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX512VL-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512dq -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512dq -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQ
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512dq,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512dq,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=CHECK,AVX,AVX-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=CHECK,AVX,AVX-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=CHECK,AVX512F,AVX512F-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=CHECK,AVX512F,AVX512F-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX512VL-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX512VL-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512dq -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512dq -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512dq,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512dq,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQVL
declare <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f64(<4 x double>, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-fptoint-512-fp16.ll b/llvm/test/CodeGen/X86/vec-strict-fptoint-512-fp16.ll
index 73e44c6d41969..426a218b3d855 100644
--- a/llvm/test/CodeGen/X86/vec-strict-fptoint-512-fp16.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-fptoint-512-fp16.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512fp16 -O3 | FileCheck %s --check-prefixes=CHECK
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16 -O3 | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512fp16 -O3 | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16 -O3 | FileCheck %s --check-prefixes=CHECK
declare <8 x i64> @llvm.experimental.constrained.fptosi.v8i64.v8f16(<8 x half>, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-fptoint-512.ll b/llvm/test/CodeGen/X86/vec-strict-fptoint-512.ll
index ce5db5b246775..74c47aba573c8 100644
--- a/llvm/test/CodeGen/X86/vec-strict-fptoint-512.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-fptoint-512.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX512VL-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX512VL-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512f,avx512dq -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f,avx512dq -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX512VL-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,AVX512VL,AVX512VL-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512f,avx512dq -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f,avx512dq -O3 | FileCheck %s --check-prefixes=CHECK,AVX512DQ
declare <8 x i64> @llvm.experimental.constrained.fptosi.v8i64.v8f64(<8 x double>, metadata)
declare <8 x i64> @llvm.experimental.constrained.fptoui.v8i64.v8f64(<8 x double>, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-inttofp-128-fp16.ll b/llvm/test/CodeGen/X86/vec-strict-inttofp-128-fp16.ll
index 5c7c731dec6d3..69dbd77c3023a 100644
--- a/llvm/test/CodeGen/X86/vec-strict-inttofp-128-fp16.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-inttofp-128-fp16.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,X64
declare <8 x half> @llvm.experimental.constrained.sitofp.v8f16.v8i1(<8 x i1>, metadata, metadata)
declare <8 x half> @llvm.experimental.constrained.uitofp.v8f16.v8i1(<8 x i1>, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-inttofp-128.ll b/llvm/test/CodeGen/X86/vec-strict-inttofp-128.ll
index cd4ceca6716b1..988d3e4bb3d74 100644
--- a/llvm/test/CodeGen/X86/vec-strict-inttofp-128.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-inttofp-128.ll
@@ -1,18 +1,18 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE,SSE-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE,SSE-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE41,SSE41-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE41,SSE41-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX,AVX1,AVX-32,AVX1-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX,AVX1,AVX-64,AVX1-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX,AVX512F,AVX-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX,AVX512F,AVX-64,AVX512F-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512vl -O3 | FileCheck %s --check-prefixes=AVX,AVX512VL,AVX-32,AVX512VL-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512vl -O3 | FileCheck %s --check-prefixes=AVX,AVX512VL,AVX-64,AVX512VL-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512f,avx512dq -O3 | FileCheck %s --check-prefixes=AVX,AVX512DQ,AVX512DQ-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f,avx512dq -O3 | FileCheck %s --check-prefixes=AVX,AVX512DQ,AVX512DQ-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512dq,avx512vl -O3 | FileCheck %s --check-prefixes=AVX,AVX512DQVL,AVX512DQVL-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512dq,avx512vl -O3 | FileCheck %s --check-prefixes=AVX,AVX512DQVL,AVX512DQVL-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE,SSE-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE,SSE-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE41,SSE41-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 -O3 | FileCheck %s --check-prefixes=SSE41,SSE41-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX,AVX1,AVX-32,AVX1-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX,AVX1,AVX-64,AVX1-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX,AVX512F,AVX-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX,AVX512F,AVX-64,AVX512F-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512vl -O3 | FileCheck %s --check-prefixes=AVX,AVX512VL,AVX-32,AVX512VL-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512vl -O3 | FileCheck %s --check-prefixes=AVX,AVX512VL,AVX-64,AVX512VL-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512f,avx512dq -O3 | FileCheck %s --check-prefixes=AVX,AVX512DQ,AVX512DQ-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f,avx512dq -O3 | FileCheck %s --check-prefixes=AVX,AVX512DQ,AVX512DQ-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512dq,avx512vl -O3 | FileCheck %s --check-prefixes=AVX,AVX512DQVL,AVX512DQVL-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512dq,avx512vl -O3 | FileCheck %s --check-prefixes=AVX,AVX512DQVL,AVX512DQVL-64
declare <2 x float> @llvm.experimental.constrained.sitofp.v2f32.v2i32(<2 x i32>, metadata, metadata)
declare <2 x float> @llvm.experimental.constrained.uitofp.v2f32.v2i32(<2 x i32>, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-inttofp-256-fp16.ll b/llvm/test/CodeGen/X86/vec-strict-inttofp-256-fp16.ll
index 5a2f4465c7f41..d0874d6fc9066 100644
--- a/llvm/test/CodeGen/X86/vec-strict-inttofp-256-fp16.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-inttofp-256-fp16.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16,avx512vl -O3 | FileCheck %s --check-prefixes=CHECK,X64
declare <16 x half> @llvm.experimental.constrained.sitofp.v16f16.v16i1(<16 x i1>, metadata, metadata)
declare <16 x half> @llvm.experimental.constrained.uitofp.v16f16.v16i1(<16 x i1>, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-inttofp-512-fp16.ll b/llvm/test/CodeGen/X86/vec-strict-inttofp-512-fp16.ll
index c0e759ac45691..4fe5f134bae51 100644
--- a/llvm/test/CodeGen/X86/vec-strict-inttofp-512-fp16.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-inttofp-512-fp16.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512fp16 -O3 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16 -O3 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512fp16 -O3 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512fp16 -O3 | FileCheck %s --check-prefixes=CHECK,X64
declare <32 x half> @llvm.experimental.constrained.sitofp.v32f16.v32i1(<32 x i1>, metadata, metadata)
declare <32 x half> @llvm.experimental.constrained.uitofp.v32f16.v32i1(<32 x i1>, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-inttofp-512.ll b/llvm/test/CodeGen/X86/vec-strict-inttofp-512.ll
index 59294dd17fbca..c68dc73835118 100644
--- a/llvm/test/CodeGen/X86/vec-strict-inttofp-512.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-inttofp-512.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=CHECK,NODQ-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=CHECK,NODQ-64
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx512f,avx512dq -O3 | FileCheck %s --check-prefixes=CHECK,DQ,DQ-32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f,avx512dq -O3 | FileCheck %s --check-prefixes=CHECK,DQ,DQ-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=CHECK,NODQ-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=CHECK,NODQ-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=avx512f,avx512dq -O3 | FileCheck %s --check-prefixes=CHECK,DQ,DQ-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f,avx512dq -O3 | FileCheck %s --check-prefixes=CHECK,DQ,DQ-64
declare <16 x float> @llvm.experimental.constrained.sitofp.v16f32.v16i1(<16 x i1>, metadata, metadata)
declare <16 x float> @llvm.experimental.constrained.uitofp.v16f32.v16i1(<16 x i1>, metadata, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-strict-round-128.ll b/llvm/test/CodeGen/X86/vec-strict-round-128.ll
index 1f7507cc02bc5..0025fefb60859 100644
--- a/llvm/test/CodeGen/X86/vec-strict-round-128.ll
+++ b/llvm/test/CodeGen/X86/vec-strict-round-128.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 -O3 | FileCheck %s --check-prefixes=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 -O3 | FileCheck %s --check-prefixes=SSE41
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 -O3 | FileCheck %s --check-prefixes=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 -O3 | FileCheck %s --check-prefixes=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx -O3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f -O3 | FileCheck %s --check-prefixes=AVX
declare <4 x float> @llvm.experimental.constrained.ceil.v4f32(<4 x float>, metadata)
declare <2 x double> @llvm.experimental.constrained.ceil.v2f64(<2 x double>, metadata)
diff --git a/llvm/test/CodeGen/X86/vec-trunc-store.ll b/llvm/test/CodeGen/X86/vec-trunc-store.ll
index 3648c99273772..bed21e8957459 100644
--- a/llvm/test/CodeGen/X86/vec-trunc-store.ll
+++ b/llvm/test/CodeGen/X86/vec-trunc-store.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux | FileCheck %s
define void @foo(ptr %p) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/vec3-setcc-crash.ll b/llvm/test/CodeGen/X86/vec3-setcc-crash.ll
index e80e709a93fb8..65ae41f944621 100644
--- a/llvm/test/CodeGen/X86/vec3-setcc-crash.ll
+++ b/llvm/test/CodeGen/X86/vec3-setcc-crash.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=X64
define void @vec3_setcc_crash(ptr %in, ptr %out) {
; X86-LABEL: vec3_setcc_crash:
diff --git a/llvm/test/CodeGen/X86/vec3.ll b/llvm/test/CodeGen/X86/vec3.ll
index b4069b5510681..b47d8fd0efa22 100644
--- a/llvm/test/CodeGen/X86/vec3.ll
+++ b/llvm/test/CodeGen/X86/vec3.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse | FileCheck %s
define <3 x float> @fadd(<3 x float> %v, float %d) {
; CHECK-LABEL: fadd:
diff --git a/llvm/test/CodeGen/X86/vec_align.ll b/llvm/test/CodeGen/X86/vec_align.ll
index 57cbb8747f9fd..b63c7619d89ce 100644
--- a/llvm/test/CodeGen/X86/vec_align.ll
+++ b/llvm/test/CodeGen/X86/vec_align.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=yonah -relocation-model=static | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=yonah -relocation-model=static | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/vec_align_i256.ll b/llvm/test/CodeGen/X86/vec_align_i256.ll
index 4b5df2beb6747..31ba595a5fb11 100644
--- a/llvm/test/CodeGen/X86/vec_align_i256.ll
+++ b/llvm/test/CodeGen/X86/vec_align_i256.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=corei7-avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=corei7-avx | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
target triple = "i686-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/vec_anyext.ll b/llvm/test/CodeGen/X86/vec_anyext.ll
index e229165be967a..6803342f34ba3 100644
--- a/llvm/test/CodeGen/X86/vec_anyext.ll
+++ b/llvm/test/CodeGen/X86/vec_anyext.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+avx | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,X64
; PR 9267
diff --git a/llvm/test/CodeGen/X86/vec_call.ll b/llvm/test/CodeGen/X86/vec_call.ll
index cc620d3e5f5fb..01f5df1978604 100644
--- a/llvm/test/CodeGen/X86/vec_call.ll
+++ b/llvm/test/CodeGen/X86/vec_call.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mattr=+sse2 -mtriple=i686-apple-darwin8 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sse2 -mtriple=i686-apple-darwin8 | FileCheck %s
define void @test() {
diff --git a/llvm/test/CodeGen/X86/vec_cast.ll b/llvm/test/CodeGen/X86/vec_cast.ll
index e0089354cc953..0f7454a192ae2 100644
--- a/llvm/test/CodeGen/X86/vec_cast.ll
+++ b/llvm/test/CodeGen/X86/vec_cast.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK,CHECK-LIN
-; RUN: llc < %s -mtriple=x86_64-win32 -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK,CHECK-WIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK,CHECK-LIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK,CHECK-WIN
define <8 x i32> @a(<8 x i16> %a) nounwind {
; CHECK-LIN-LABEL: a:
diff --git a/llvm/test/CodeGen/X86/vec_cast2.ll b/llvm/test/CodeGen/X86/vec_cast2.ll
index 5a6f7e2814895..84d24123a1ecf 100644
--- a/llvm/test/CodeGen/X86/vec_cast2.ll
+++ b/llvm/test/CodeGen/X86/vec_cast2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin10 -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10 -mattr=+avx | FileCheck %s
define <8 x float> @cvt_v8i8_v8f32(<8 x i8> %src) {
; CHECK-LABEL: cvt_v8i8_v8f32:
diff --git a/llvm/test/CodeGen/X86/vec_cast3.ll b/llvm/test/CodeGen/X86/vec_cast3.ll
index 43bb538186403..cd4b6aee40ab9 100644
--- a/llvm/test/CodeGen/X86/vec_cast3.ll
+++ b/llvm/test/CodeGen/X86/vec_cast3.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin10 -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin10 -mattr=+avx | FileCheck %s
define <2 x float> @cvt_v2i8_v2f32(<2 x i8> %src) {
; CHECK-LABEL: cvt_v2i8_v2f32:
diff --git a/llvm/test/CodeGen/X86/vec_cmp_sint-128.ll b/llvm/test/CodeGen/X86/vec_cmp_sint-128.ll
index ac4b25be5eb65..0fc1e45365e77 100644
--- a/llvm/test/CodeGen/X86/vec_cmp_sint-128.ll
+++ b/llvm/test/CodeGen/X86/vec_cmp_sint-128.ll
@@ -1,13 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=XOP
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=XOP
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=XOP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=XOP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
;
; Equal
diff --git a/llvm/test/CodeGen/X86/vec_cmp_uint-128.ll b/llvm/test/CodeGen/X86/vec_cmp_uint-128.ll
index 9a0756edbce32..e67fdbafd636e 100644
--- a/llvm/test/CodeGen/X86/vec_cmp_uint-128.ll
+++ b/llvm/test/CodeGen/X86/vec_cmp_uint-128.ll
@@ -1,13 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=XOP
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=XOP
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=XOP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=XOP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
;
; Equal
diff --git a/llvm/test/CodeGen/X86/vec_compare-sse4.ll b/llvm/test/CodeGen/X86/vec_compare-sse4.ll
index dde307aae26a7..f4b9e12c74d98 100644
--- a/llvm/test/CodeGen/X86/vec_compare-sse4.ll
+++ b/llvm/test/CodeGen/X86/vec_compare-sse4.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=-sse3,+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=-sse4.2,+sse4.1 | FileCheck %s --check-prefix=SSE41
-; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin9 -mattr=-sse3,+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin9 -mattr=-sse4.2,+sse4.1 | FileCheck %s --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin9 -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE42
define <2 x i64> @test1(<2 x i64> %A, <2 x i64> %B) nounwind {
; SSE2-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/vec_compare.ll b/llvm/test/CodeGen/X86/vec_compare.ll
index c1045c7b72f2c..be9f5c23ca3f2 100644
--- a/llvm/test/CodeGen/X86/vec_compare.ll
+++ b/llvm/test/CodeGen/X86/vec_compare.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=yonah -mtriple=i386-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=yonah -mtriple=i386-apple-darwin | FileCheck %s
define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) nounwind {
diff --git a/llvm/test/CodeGen/X86/vec_ctbits.ll b/llvm/test/CodeGen/X86/vec_ctbits.ll
index 370f88d644b57..4aeda515b1891 100644
--- a/llvm/test/CodeGen/X86/vec_ctbits.ll
+++ b/llvm/test/CodeGen/X86/vec_ctbits.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s
declare <2 x i64> @llvm.cttz.v2i64(<2 x i64>, i1)
declare <2 x i64> @llvm.ctlz.v2i64(<2 x i64>, i1)
diff --git a/llvm/test/CodeGen/X86/vec_ext_inreg.ll b/llvm/test/CodeGen/X86/vec_ext_inreg.ll
index 367f1acc16d42..7a273b807d1b3 100644
--- a/llvm/test/CodeGen/X86/vec_ext_inreg.ll
+++ b/llvm/test/CodeGen/X86/vec_ext_inreg.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX,AVX2
define <8 x i32> @a(<8 x i32> %a) nounwind {
; SSE-LABEL: a:
diff --git a/llvm/test/CodeGen/X86/vec_extract-avx.ll b/llvm/test/CodeGen/X86/vec_extract-avx.ll
index 4b70933334fb7..4042fc9ca7067 100644
--- a/llvm/test/CodeGen/X86/vec_extract-avx.ll
+++ b/llvm/test/CodeGen/X86/vec_extract-avx.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
; When extracting multiple consecutive elements from a larger
; vector into a smaller one, do it efficiently. We should use
diff --git a/llvm/test/CodeGen/X86/vec_extract-mmx.ll b/llvm/test/CodeGen/X86/vec_extract-mmx.ll
index cd375c0416881..53b4eca530b74 100644
--- a/llvm/test/CodeGen/X86/vec_extract-mmx.ll
+++ b/llvm/test/CodeGen/X86/vec_extract-mmx.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X64
define i32 @test0(ptr %v4) nounwind {
; X86-LABEL: test0:
diff --git a/llvm/test/CodeGen/X86/vec_extract-sse4.ll b/llvm/test/CodeGen/X86/vec_extract-sse4.ll
index 1f384861b3735..b70eb395d5cfc 100644
--- a/llvm/test/CodeGen/X86/vec_extract-sse4.ll
+++ b/llvm/test/CodeGen/X86/vec_extract-sse4.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
define void @t1(ptr %R, ptr %P1) nounwind {
; X86-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/vec_fabs.ll b/llvm/test/CodeGen/X86/vec_fabs.ll
index d0abd7d5f7512..c213583207f46 100644
--- a/llvm/test/CodeGen/X86/vec_fabs.ll
+++ b/llvm/test/CodeGen/X86/vec_fabs.ll
@@ -1,16 +1,16 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86,X86-SSE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX1OR2,X86-AVX1
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX1OR2,X86-AVX2
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512,X86-AVX512VL
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512,X86-AVX512FP16
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512,X86-AVX512VLDQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64,X64-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1OR2,X64-AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1OR2,X64-AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512,X64-AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512,X64-AVX512FP16
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512,X64-AVX512VLDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX1OR2,X86-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX1OR2,X86-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512,X86-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512,X86-AVX512FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512,X86-AVX512VLDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1OR2,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1OR2,X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512,X64-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512,X64-AVX512FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512,X64-AVX512VLDQ
;
; 128-bit Vectors
diff --git a/llvm/test/CodeGen/X86/vec_fcopysign.ll b/llvm/test/CodeGen/X86/vec_fcopysign.ll
index b506692ee5a65..f7382fe98e801 100644
--- a/llvm/test/CodeGen/X86/vec_fcopysign.ll
+++ b/llvm/test/CodeGen/X86/vec_fcopysign.ll
@@ -1,16 +1,16 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86,X86-SSE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX1OR2,X86-AVX1
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX1OR2,X86-AVX2
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512,X86-AVX512VL
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512,X86-AVX512FP16
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512,X86-AVX512VLDQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64,X64-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1OR2,X64-AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1OR2,X64-AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512,X64-AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512,X64-AVX512FP16
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512,X64-AVX512VLDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX1OR2,X86-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX1OR2,X86-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512,X86-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512,X86-AVX512FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX512,X86-AVX512VLDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1OR2,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1OR2,X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512,X64-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512,X64-AVX512FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX512,X64-AVX512VLDQ
;
; 128-bit Vectors
diff --git a/llvm/test/CodeGen/X86/vec_floor.ll b/llvm/test/CodeGen/X86/vec_floor.ll
index c5c8c052ea347..9d07cd9a3dfdb 100644
--- a/llvm/test/CodeGen/X86/vec_floor.ll
+++ b/llvm/test/CodeGen/X86/vec_floor.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512VL
define <2 x double> @floor_v2f64(<2 x double> %p) {
; SSE41-LABEL: floor_v2f64:
diff --git a/llvm/test/CodeGen/X86/vec_fneg.ll b/llvm/test/CodeGen/X86/vec_fneg.ll
index 64204a5c2123f..26cd6ad090806 100644
--- a/llvm/test/CodeGen/X86/vec_fneg.ll
+++ b/llvm/test/CodeGen/X86/vec_fneg.ll
@@ -1,16 +1,16 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86,X86-SSE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX1
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX2
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX512,X86-AVX512VL
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX512,X86-AVX512FP16
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX512,X86-AVX512VLDQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64,X64-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX512,X64-AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX512,X64-AVX512FP16
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX512,X64-AVX512VLDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86,X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X86,X86-AVX,X86-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX512,X86-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX512,X86-AVX512FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X86,X86-AVX512,X86-AVX512VLDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64,X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X64,X64-AVX,X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX512,X64-AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX512,X64-AVX512FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=X64,X64-AVX512,X64-AVX512VLDQ
;
; 128-bit Vectors
diff --git a/llvm/test/CodeGen/X86/vec_fp_to_int.ll b/llvm/test/CodeGen/X86/vec_fp_to_int.ll
index df2dc77dc1259..f9b4aa5817d1c 100644
--- a/llvm/test/CodeGen/X86/vec_fp_to_int.ll
+++ b/llvm/test/CodeGen/X86/vec_fp_to_int.ll
@@ -1,16 +1,16 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,VEX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,VEX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX,AVX512,AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512VLDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,VEX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,VEX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX,AVX512,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512VLDQ
;
; 32-bit tests to make sure we're not doing anything stupid.
-; RUN: llc < %s -mtriple=i686-unknown-unknown
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2
;
; Double to Signed Integer
diff --git a/llvm/test/CodeGen/X86/vec_fptrunc.ll b/llvm/test/CodeGen/X86/vec_fptrunc.ll
index 5b2dafaf3ac28..e512f063cc968 100644
--- a/llvm/test/CodeGen/X86/vec_fptrunc.ll
+++ b/llvm/test/CodeGen/X86/vec_fptrunc.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86-SSE
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X86-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
define void @fptrunc_frommem2(ptr %in, ptr %out) {
; X86-SSE-LABEL: fptrunc_frommem2:
diff --git a/llvm/test/CodeGen/X86/vec_i64.ll b/llvm/test/CodeGen/X86/vec_i64.ll
index 0768269978abe..f1d448f15d7a3 100644
--- a/llvm/test/CodeGen/X86/vec_i64.ll
+++ b/llvm/test/CodeGen/X86/vec_i64.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
; Used movq to load i64 into a v2i64 when the top i64 is 0.
diff --git a/llvm/test/CodeGen/X86/vec_ins_extract-1.ll b/llvm/test/CodeGen/X86/vec_ins_extract-1.ll
index cf70d5d7f1edf..f814860c61c87 100644
--- a/llvm/test/CodeGen/X86/vec_ins_extract-1.ll
+++ b/llvm/test/CodeGen/X86/vec_ins_extract-1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
; Inserts and extracts with variable indices must be lowered
; to memory accesses.
diff --git a/llvm/test/CodeGen/X86/vec_ins_extract.ll b/llvm/test/CodeGen/X86/vec_ins_extract.ll
index a04a27c2146c8..e10a7e3eab370 100644
--- a/llvm/test/CodeGen/X86/vec_ins_extract.ll
+++ b/llvm/test/CodeGen/X86/vec_ins_extract.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: opt < %s -passes='sroa,instcombine' | \
-; RUN: llc -mtriple=i686-- -mcpu=yonah | not grep sub.*esp
+; RUN: llc -combiner-topological-sorting -mtriple=i686-- -mcpu=yonah | not grep sub.*esp
; This checks that various insert/extract idiom work without going to the
; stack.
diff --git a/llvm/test/CodeGen/X86/vec_insert-2.ll b/llvm/test/CodeGen/X86/vec_insert-2.ll
index bd1608588f3f3..affb922f6f810 100644
--- a/llvm/test/CodeGen/X86/vec_insert-2.ll
+++ b/llvm/test/CodeGen/X86/vec_insert-2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X64
define <4 x float> @t1(float %s, <4 x float> %tmp) nounwind {
; X86-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/vec_insert-3.ll b/llvm/test/CodeGen/X86/vec_insert-3.ll
index 9a5e1de993018..c090c0fe67938 100644
--- a/llvm/test/CodeGen/X86/vec_insert-3.ll
+++ b/llvm/test/CodeGen/X86/vec_insert-3.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X64
define <2 x i64> @t1(i64 %s, <2 x i64> %tmp) nounwind {
; X86-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/vec_insert-4.ll b/llvm/test/CodeGen/X86/vec_insert-4.ll
index 0182391eaf84f..7dbb547e4a6db 100644
--- a/llvm/test/CodeGen/X86/vec_insert-4.ll
+++ b/llvm/test/CodeGen/X86/vec_insert-4.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin9.2.2 -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-apple-darwin9.2.2 -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin9.2.2 -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin9.2.2 -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X64
define <8 x float> @f(<8 x float> %a, i32 %b) nounwind {
; X86-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/vec_insert-5.ll b/llvm/test/CodeGen/X86/vec_insert-5.ll
index ddde9ecb7c0fd..c56d92cd62197 100644
--- a/llvm/test/CodeGen/X86/vec_insert-5.ll
+++ b/llvm/test/CodeGen/X86/vec_insert-5.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+mmx,+sse2,+ssse3 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+mmx,+sse2,+ssse3 | FileCheck %s --check-prefixes=X64,ALIGN
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+mmx,+sse2,+ssse3,sse-unaligned-mem | FileCheck %s --check-prefixes=X64,UNALIGN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+mmx,+sse2,+ssse3 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+mmx,+sse2,+ssse3 | FileCheck %s --check-prefixes=X64,ALIGN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+mmx,+sse2,+ssse3,sse-unaligned-mem | FileCheck %s --check-prefixes=X64,UNALIGN
; There are no MMX operations in @t1
diff --git a/llvm/test/CodeGen/X86/vec_insert-7.ll b/llvm/test/CodeGen/X86/vec_insert-7.ll
index 67473febf28c7..e8d9449d99dbb 100644
--- a/llvm/test/CodeGen/X86/vec_insert-7.ll
+++ b/llvm/test/CodeGen/X86/vec_insert-7.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=+mmx,+sse4.2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=+mmx,+sse4.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin9 -mattr=+mmx,+sse4.2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin9 -mattr=+mmx,+sse4.2 | FileCheck %s --check-prefix=X64
; MMX insertelement is not available; these are promoted to xmm.
; (Without SSE they are split to two ints, and the code is much better.)
diff --git a/llvm/test/CodeGen/X86/vec_insert-8.ll b/llvm/test/CodeGen/X86/vec_insert-8.ll
index aa3364b31d66f..4f27edd3e4315 100644
--- a/llvm/test/CodeGen/X86/vec_insert-8.ll
+++ b/llvm/test/CodeGen/X86/vec_insert-8.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
; tests variable insert and extract of a 4 x i32
diff --git a/llvm/test/CodeGen/X86/vec_insert-9.ll b/llvm/test/CodeGen/X86/vec_insert-9.ll
index be77dc4a0fdd8..8fd830e1c9824 100644
--- a/llvm/test/CodeGen/X86/vec_insert-9.ll
+++ b/llvm/test/CodeGen/X86/vec_insert-9.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
define <4 x i32> @var_insert2(<4 x i32> %x, i32 %val, i32 %idx) nounwind {
; X86-LABEL: var_insert2:
diff --git a/llvm/test/CodeGen/X86/vec_insert-mmx.ll b/llvm/test/CodeGen/X86/vec_insert-mmx.ll
index f95b34685211d..856b60c0c2b70 100644
--- a/llvm/test/CodeGen/X86/vec_insert-mmx.ll
+++ b/llvm/test/CodeGen/X86/vec_insert-mmx.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-darwin -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-darwin -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse4.1 | FileCheck %s --check-prefix=X64
; This is not an MMX operation; promoted to xmm.
define <1 x i64> @t0(i32 %A) nounwind {
diff --git a/llvm/test/CodeGen/X86/vec_loadsingles.ll b/llvm/test/CodeGen/X86/vec_loadsingles.ll
index 27204c66b18e0..067e68354a463 100644
--- a/llvm/test/CodeGen/X86/vec_loadsingles.ll
+++ b/llvm/test/CodeGen/X86/vec_loadsingles.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,-slow-unaligned-mem-32 | FileCheck %s --check-prefix=ALL --check-prefix=FAST32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+slow-unaligned-mem-32 | FileCheck %s --check-prefix=ALL --check-prefix=SLOW32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,-slow-unaligned-mem-32 | FileCheck %s --check-prefix=ALL --check-prefix=FAST32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+slow-unaligned-mem-32 | FileCheck %s --check-prefix=ALL --check-prefix=SLOW32
define <4 x float> @merge_2_floats(ptr nocapture %p) nounwind readonly {
; ALL-LABEL: merge_2_floats:
diff --git a/llvm/test/CodeGen/X86/vec_logical.ll b/llvm/test/CodeGen/X86/vec_logical.ll
index 6935f7c7bfbbf..771c8c0d89215 100644
--- a/llvm/test/CodeGen/X86/vec_logical.ll
+++ b/llvm/test/CodeGen/X86/vec_logical.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
define void @t(<4 x float> %A) {
; SSE-LABEL: t:
diff --git a/llvm/test/CodeGen/X86/vec_minmax_match.ll b/llvm/test/CodeGen/X86/vec_minmax_match.ll
index 56a45fa9a4ff5..9a7b86afe1d32 100644
--- a/llvm/test/CodeGen/X86/vec_minmax_match.ll
+++ b/llvm/test/CodeGen/X86/vec_minmax_match.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
; These are actually tests of ValueTracking, and so may have test coverage in InstCombine or other
; IR opt passes, but ValueTracking also affects the backend via SelectionDAGBuilder::visitSelect().
diff --git a/llvm/test/CodeGen/X86/vec_minmax_sint.ll b/llvm/test/CodeGen/X86/vec_minmax_sint.ll
index c8d988cb011ae..7b4b87fef2673 100644
--- a/llvm/test/CodeGen/X86/vec_minmax_sint.ll
+++ b/llvm/test/CodeGen/X86/vec_minmax_sint.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
;
; Signed Maximum (GT)
diff --git a/llvm/test/CodeGen/X86/vec_minmax_uint.ll b/llvm/test/CodeGen/X86/vec_minmax_uint.ll
index c9bfff4b7dfd7..eacd5704ce7f1 100644
--- a/llvm/test/CodeGen/X86/vec_minmax_uint.ll
+++ b/llvm/test/CodeGen/X86/vec_minmax_uint.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
;
; Unsigned Maximum (GT)
diff --git a/llvm/test/CodeGen/X86/vec_no-common-bits.ll b/llvm/test/CodeGen/X86/vec_no-common-bits.ll
index 192ec0336804f..015dcffedde44 100644
--- a/llvm/test/CodeGen/X86/vec_no-common-bits.ll
+++ b/llvm/test/CodeGen/X86/vec_no-common-bits.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK
; In the following patterns, lhs and rhs of the or instruction have no common bits.
; Therefore, "add" and "or" instructions are equal.
diff --git a/llvm/test/CodeGen/X86/vec_partial.ll b/llvm/test/CodeGen/X86/vec_partial.ll
index e0d74151ef48e..79281d7f84bca 100644
--- a/llvm/test/CodeGen/X86/vec_partial.ll
+++ b/llvm/test/CodeGen/X86/vec_partial.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
; PR11580
define <3 x float> @addf3(<3 x float> %x) {
diff --git a/llvm/test/CodeGen/X86/vec_reassociate.ll b/llvm/test/CodeGen/X86/vec_reassociate.ll
index 4703ca35306b3..588f8071a6609 100644
--- a/llvm/test/CodeGen/X86/vec_reassociate.ll
+++ b/llvm/test/CodeGen/X86/vec_reassociate.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
define <4 x i32> @add_4i32(<4 x i32> %a0, <4 x i32> %a1) {
; X86-LABEL: add_4i32:
diff --git a/llvm/test/CodeGen/X86/vec_return.ll b/llvm/test/CodeGen/X86/vec_return.ll
index f33b6a1c126a6..655c696697d03 100644
--- a/llvm/test/CodeGen/X86/vec_return.ll
+++ b/llvm/test/CodeGen/X86/vec_return.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s
; Without any typed operations, always use the smaller xorps.
define <2 x double> @test() {
diff --git a/llvm/test/CodeGen/X86/vec_sdiv_to_shift.ll b/llvm/test/CodeGen/X86/vec_sdiv_to_shift.ll
index 74c701720b9a1..b3c6570f58166 100644
--- a/llvm/test/CodeGen/X86/vec_sdiv_to_shift.ll
+++ b/llvm/test/CodeGen/X86/vec_sdiv_to_shift.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
define <8 x i16> @sdiv_vec8x16(<8 x i16> %var) {
; SSE-LABEL: sdiv_vec8x16:
diff --git a/llvm/test/CodeGen/X86/vec_set-2.ll b/llvm/test/CodeGen/X86/vec_set-2.ll
index 058e924aa4fc8..5cbf99d50135c 100644
--- a/llvm/test/CodeGen/X86/vec_set-2.ll
+++ b/llvm/test/CodeGen/X86/vec_set-2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X64
define <4 x float> @test1(float %a) nounwind {
; X86-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/vec_set-3.ll b/llvm/test/CodeGen/X86/vec_set-3.ll
index 14f1587a6d46e..1fadbdd6fde59 100644
--- a/llvm/test/CodeGen/X86/vec_set-3.ll
+++ b/llvm/test/CodeGen/X86/vec_set-3.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2,+sse4.1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse2,+sse4.1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2,+sse4.1 | FileCheck %s --check-prefix=X64
define <4 x float> @test(float %a) {
; X86-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/vec_set-4.ll b/llvm/test/CodeGen/X86/vec_set-4.ll
index d01a913ea8a4b..dee0d39cb99b0 100644
--- a/llvm/test/CodeGen/X86/vec_set-4.ll
+++ b/llvm/test/CodeGen/X86/vec_set-4.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
define <2 x i64> @test(i16 %a) nounwind {
; X86-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/vec_set-6.ll b/llvm/test/CodeGen/X86/vec_set-6.ll
index 25de306960812..34fb87a01f03b 100644
--- a/llvm/test/CodeGen/X86/vec_set-6.ll
+++ b/llvm/test/CodeGen/X86/vec_set-6.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2,+sse4.1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse2,+sse4.1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2,+sse4.1 | FileCheck %s --check-prefix=X64
define <4 x float> @test(float %a, float %b, float %c) nounwind {
; X86-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/vec_set-7.ll b/llvm/test/CodeGen/X86/vec_set-7.ll
index fd3f6d037092d..2ca4c87c8a7af 100644
--- a/llvm/test/CodeGen/X86/vec_set-7.ll
+++ b/llvm/test/CodeGen/X86/vec_set-7.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
define <2 x i64> @test(ptr %p) nounwind {
; X86-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/vec_set-8.ll b/llvm/test/CodeGen/X86/vec_set-8.ll
index e8cded6b21680..848bdcef2808f 100644
--- a/llvm/test/CodeGen/X86/vec_set-8.ll
+++ b/llvm/test/CodeGen/X86/vec_set-8.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
define <2 x i64> @test(i64 %i) nounwind {
; X86-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/vec_set-A.ll b/llvm/test/CodeGen/X86/vec_set-A.ll
index a288579bda34e..2cba42b33361d 100644
--- a/llvm/test/CodeGen/X86/vec_set-A.ll
+++ b/llvm/test/CodeGen/X86/vec_set-A.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
define <2 x i64> @test1() nounwind {
; X86-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/vec_set-B.ll b/llvm/test/CodeGen/X86/vec_set-B.ll
index 0f5c853220b38..fb14b77ebadbb 100644
--- a/llvm/test/CodeGen/X86/vec_set-B.ll
+++ b/llvm/test/CodeGen/X86/vec_set-B.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
; These should both generate something like this:
;_test3:
diff --git a/llvm/test/CodeGen/X86/vec_set-C.ll b/llvm/test/CodeGen/X86/vec_set-C.ll
index 877d99abbb95c..13423fd658b56 100644
--- a/llvm/test/CodeGen/X86/vec_set-C.ll
+++ b/llvm/test/CodeGen/X86/vec_set-C.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-linux-gnu -mattr=+sse2,-avx | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+sse2,-avx | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-linux-gnu -mattr=+sse2,-avx | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mattr=+sse2,-avx | FileCheck %s --check-prefix=X64
define <2 x i64> @t1(i64 %x) nounwind {
; X86-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/vec_set-D.ll b/llvm/test/CodeGen/X86/vec_set-D.ll
index 3dde040d9badd..2b3b99ea64c9d 100644
--- a/llvm/test/CodeGen/X86/vec_set-D.ll
+++ b/llvm/test/CodeGen/X86/vec_set-D.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s
define <4 x i32> @t(i32 %x, i32 %y) nounwind {
; CHECK-LABEL: t:
diff --git a/llvm/test/CodeGen/X86/vec_set-F.ll b/llvm/test/CodeGen/X86/vec_set-F.ll
index 4f94fcb6effc6..d2f6e12e8c315 100644
--- a/llvm/test/CodeGen/X86/vec_set-F.ll
+++ b/llvm/test/CodeGen/X86/vec_set-F.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -mattr=+sse2 | FileCheck %s
define <2 x i64> @t1(ptr %ptr) nounwind {
; CHECK-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/vec_set-H.ll b/llvm/test/CodeGen/X86/vec_set-H.ll
index 932e899aaa44d..1137f8c84bc22 100644
--- a/llvm/test/CodeGen/X86/vec_set-H.ll
+++ b/llvm/test/CodeGen/X86/vec_set-H.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s
define <2 x i64> @doload64(i16 signext %x) nounwind {
; CHECK-LABEL: doload64:
diff --git a/llvm/test/CodeGen/X86/vec_set.ll b/llvm/test/CodeGen/X86/vec_set.ll
index da61839299498..1189fb4ace9f1 100644
--- a/llvm/test/CodeGen/X86/vec_set.ll
+++ b/llvm/test/CodeGen/X86/vec_set.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2,-sse4.1 | FileCheck %s --check-prefix=X64
define void @test(ptr %b, i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7) nounwind {
; X86-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/vec_setcc-2.ll b/llvm/test/CodeGen/X86/vec_setcc-2.ll
index 5a71878ea4579..9b4592d839c9e 100644
--- a/llvm/test/CodeGen/X86/vec_setcc-2.ll
+++ b/llvm/test/CodeGen/X86/vec_setcc-2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -o - -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
-; RUN: llc < %s -o - -mtriple=x86_64-apple-darwin -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE41
+; RUN: llc -combiner-topological-sorting < %s -o - -mtriple=x86_64-apple-darwin -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE2
+; RUN: llc -combiner-topological-sorting < %s -o - -mtriple=x86_64-apple-darwin -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE41
; For a setult against a constant, turn it into a setule and lower via psubusw.
diff --git a/llvm/test/CodeGen/X86/vec_shift.ll b/llvm/test/CodeGen/X86/vec_shift.ll
index 4c337338f94bf..8518b573cbad1 100644
--- a/llvm/test/CodeGen/X86/vec_shift.ll
+++ b/llvm/test/CodeGen/X86/vec_shift.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X64
define <2 x i64> @t1(<2 x i64> %b1, <2 x i64> %c) nounwind {
; CHECK-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/vec_shift2.ll b/llvm/test/CodeGen/X86/vec_shift2.ll
index 3c90c1e5cce07..696f4b7ed5c19 100644
--- a/llvm/test/CodeGen/X86/vec_shift2.ll
+++ b/llvm/test/CodeGen/X86/vec_shift2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s
define <2 x i64> @t1(<2 x i64> %b1, <2 x i64> %c) nounwind {
; CHECK-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/vec_shift3.ll b/llvm/test/CodeGen/X86/vec_shift3.ll
index 740c48378b443..f1f39ef84cada 100644
--- a/llvm/test/CodeGen/X86/vec_shift3.ll
+++ b/llvm/test/CodeGen/X86/vec_shift3.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X64
define <2 x i64> @t1(<2 x i64> %x1, i32 %bits) nounwind {
; X86-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/vec_shift4.ll b/llvm/test/CodeGen/X86/vec_shift4.ll
index 25a8055ae0ddc..2a5a8ff53824c 100644
--- a/llvm/test/CodeGen/X86/vec_shift4.ll
+++ b/llvm/test/CodeGen/X86/vec_shift4.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
define <2 x i64> @shl1(<4 x i32> %r, <4 x i32> %a) nounwind readnone ssp {
; X86-LABEL: shl1:
diff --git a/llvm/test/CodeGen/X86/vec_shift6.ll b/llvm/test/CodeGen/X86/vec_shift6.ll
index 219e32c86c848..ca6ca77c7fed3 100644
--- a/llvm/test/CodeGen/X86/vec_shift6.ll
+++ b/llvm/test/CodeGen/X86/vec_shift6.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx512f | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=avx512f | FileCheck %s --check-prefixes=AVX,AVX512
; Verify that we don't scalarize a packed vector shift left of 16-bit
; signed integers if the amount is a constant build_vector.
diff --git a/llvm/test/CodeGen/X86/vec_shift7.ll b/llvm/test/CodeGen/X86/vec_shift7.ll
index 0e616fa74e45f..adeb2d407aab8 100644
--- a/llvm/test/CodeGen/X86/vec_shift7.ll
+++ b/llvm/test/CodeGen/X86/vec_shift7.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
; Verify that we don't fail when shift by zero is encountered.
diff --git a/llvm/test/CodeGen/X86/vec_shuf-insert.ll b/llvm/test/CodeGen/X86/vec_shuf-insert.ll
index 555feab327baf..19065220b2f7c 100644
--- a/llvm/test/CodeGen/X86/vec_shuf-insert.ll
+++ b/llvm/test/CodeGen/X86/vec_shuf-insert.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux -mcpu=corei7-avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux -mcpu=corei7-avx | FileCheck %s
; These tests check that an insert_subvector which replaces one of the halves
; of a concat_vectors is optimized into a single vinsertf128.
diff --git a/llvm/test/CodeGen/X86/vec_split.ll b/llvm/test/CodeGen/X86/vec_split.ll
index 559b19a867ef5..c31e0be66db96 100644
--- a/llvm/test/CodeGen/X86/vec_split.ll
+++ b/llvm/test/CodeGen/X86/vec_split.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-- -mattr=sse4.1 < %s | FileCheck %s -check-prefix=SSE4
-; RUN: llc -mtriple=x86_64-- -mattr=avx < %s | FileCheck %s -check-prefix=AVX1
-; RUN: llc -mtriple=x86_64-- -mattr=avx2 < %s | FileCheck %s -check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -mattr=sse4.1 < %s | FileCheck %s -check-prefix=SSE4
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -mattr=avx < %s | FileCheck %s -check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-- -mattr=avx2 < %s | FileCheck %s -check-prefix=AVX2
define <16 x i16> @split16(<16 x i16> %a, <16 x i16> %b, <16 x i8> %__mask) {
; SSE4-LABEL: split16:
diff --git a/llvm/test/CodeGen/X86/vec_ss_load_fold.ll b/llvm/test/CodeGen/X86/vec_ss_load_fold.ll
index e73d345d0fcd4..afd4994fa1449 100644
--- a/llvm/test/CodeGen/X86/vec_ss_load_fold.ll
+++ b/llvm/test/CodeGen/X86/vec_ss_load_fold.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -disable-peephole -mtriple=i686-apple-darwin9 -mattr=+sse,+sse2,+sse4.1 | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin9 -mattr=+sse,+sse2,+sse4.1 | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -disable-peephole -mtriple=i686-apple-darwin9 -mattr=+avx | FileCheck %s --check-prefixes=X86_AVX,X86_AVX1
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin9 -mattr=+avx | FileCheck %s --check-prefixes=X64_AVX,X64_AVX1
-; RUN: llc < %s -disable-peephole -mtriple=i686-apple-darwin9 -mattr=+avx512f | FileCheck %s --check-prefixes=X86_AVX,X86_AVX512
-; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin9 -mattr=+avx512f | FileCheck %s --check-prefixes=X64_AVX,X64_AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-apple-darwin9 -mattr=+sse,+sse2,+sse4.1 | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin9 -mattr=+sse,+sse2,+sse4.1 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-apple-darwin9 -mattr=+avx | FileCheck %s --check-prefixes=X86_AVX,X86_AVX1
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin9 -mattr=+avx | FileCheck %s --check-prefixes=X64_AVX,X64_AVX1
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=i686-apple-darwin9 -mattr=+avx512f | FileCheck %s --check-prefixes=X86_AVX,X86_AVX512
+; RUN: llc -combiner-topological-sorting < %s -disable-peephole -mtriple=x86_64-apple-darwin9 -mattr=+avx512f | FileCheck %s --check-prefixes=X64_AVX,X64_AVX512
define i16 @test1(float %f) nounwind {
; X86-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/vec_trunc_sext.ll b/llvm/test/CodeGen/X86/vec_trunc_sext.ll
index 58bd8bc9a8942..52996caff0ac6 100644
--- a/llvm/test/CodeGen/X86/vec_trunc_sext.ll
+++ b/llvm/test/CodeGen/X86/vec_trunc_sext.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse4.1 | FileCheck %s --check-prefix=NO_SSE_41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE_41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-sse4.1 | FileCheck %s --check-prefix=NO_SSE_41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE_41
; PR20472 ( http://llvm.org/bugs/show_bug.cgi?id=20472 )
; When sexting a trunc'd vector value, we can't eliminate the zext.
diff --git a/llvm/test/CodeGen/X86/vec_uint_to_fp-fastmath.ll b/llvm/test/CodeGen/X86/vec_uint_to_fp-fastmath.ll
index 2822d407b8d01..7d7f614129b12 100644
--- a/llvm/test/CodeGen/X86/vec_uint_to_fp-fastmath.ll
+++ b/llvm/test/CodeGen/X86/vec_uint_to_fp-fastmath.ll
@@ -1,9 +1,9 @@
-; RUN: llc < %s -mtriple=x86_64 | FileCheck %s --check-prefix=CST --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64 -mattr=+sse4.1 | FileCheck %s --check-prefix=CST --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64 -mattr=+avx | FileCheck %s --check-prefix=CST --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64 -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64 -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64 -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 | FileCheck %s --check-prefix=CST --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+sse4.1 | FileCheck %s --check-prefix=CST --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+avx | FileCheck %s --check-prefix=CST --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512VL
; Check that the constant used in the vectors are the right ones.
; SSE2: [[MASKCSTADDR:.LCPI[0-9_]+]]:
diff --git a/llvm/test/CodeGen/X86/vec_uint_to_fp.ll b/llvm/test/CodeGen/X86/vec_uint_to_fp.ll
index 63feb77c91586..5b82c0b0f4c6f 100644
--- a/llvm/test/CodeGen/X86/vec_uint_to_fp.ll
+++ b/llvm/test/CodeGen/X86/vec_uint_to_fp.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mtriple=x86_64-apple-macosx | FileCheck --check-prefix=CHECK --check-prefix=SSE --check-prefix=CST %s
-; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+sse4.1 | FileCheck --check-prefix=CHECK --check-prefix=SSE41 --check-prefix=CST %s
-; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+avx | FileCheck --check-prefix=CHECK --check-prefix=AVX --check-prefix=CST %s
-; RUN: llc < %s -mtriple=x86_64-apple-macosx -mattr=+avx2 | FileCheck --check-prefix=CHECK --check-prefix=AVX2 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx | FileCheck --check-prefix=CHECK --check-prefix=SSE --check-prefix=CST %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx -mattr=+sse4.1 | FileCheck --check-prefix=CHECK --check-prefix=SSE41 --check-prefix=CST %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx -mattr=+avx | FileCheck --check-prefix=CHECK --check-prefix=AVX --check-prefix=CST %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx -mattr=+avx2 | FileCheck --check-prefix=CHECK --check-prefix=AVX2 %s
; Check that the constant used in the vectors are the right ones.
; SSE: [[MASKCSTADDR:LCPI0_[0-9]+]]:
diff --git a/llvm/test/CodeGen/X86/vec_unsafe-fp-math.ll b/llvm/test/CodeGen/X86/vec_unsafe-fp-math.ll
index 3f92d2b79c85d..5f9b3295e8ce3 100644
--- a/llvm/test/CodeGen/X86/vec_unsafe-fp-math.ll
+++ b/llvm/test/CodeGen/X86/vec_unsafe-fp-math.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
; Make sure that vectors get the same benefits as scalars when using unsafe-fp-math.
diff --git a/llvm/test/CodeGen/X86/vec_zero-2.ll b/llvm/test/CodeGen/X86/vec_zero-2.ll
index bbb3ea645c187..f23a4ec8e6f53 100644
--- a/llvm/test/CodeGen/X86/vec_zero-2.ll
+++ b/llvm/test/CodeGen/X86/vec_zero-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2
define i32 @t() {
entry:
diff --git a/llvm/test/CodeGen/X86/vec_zero.ll b/llvm/test/CodeGen/X86/vec_zero.ll
index 6e798e8af53f6..d65ba93493554 100644
--- a/llvm/test/CodeGen/X86/vec_zero.ll
+++ b/llvm/test/CodeGen/X86/vec_zero.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=X64
define void @foo(ptr %P) {
; X86-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/vec_zero_cse.ll b/llvm/test/CodeGen/X86/vec_zero_cse.ll
index d4357aeb2e1de..49c5b24dc586d 100644
--- a/llvm/test/CodeGen/X86/vec_zero_cse.ll
+++ b/llvm/test/CodeGen/X86/vec_zero_cse.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -relocation-model=static -mtriple=i686-unknown -mattr=+mmx,+sse3 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -relocation-model=static -mtriple=x86_64-unknown -mattr=+mmx,+sse3 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=static -mtriple=i686-unknown -mattr=+mmx,+sse3 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=static -mtriple=x86_64-unknown -mattr=+mmx,+sse3 | FileCheck %s --check-prefix=X64
; 64-bit stores here do not use MMX.
diff --git a/llvm/test/CodeGen/X86/veclib-llvm.sincos.ll b/llvm/test/CodeGen/X86/veclib-llvm.sincos.ll
index 11bc122cb80c8..e761fea4910ad 100644
--- a/llvm/test/CodeGen/X86/veclib-llvm.sincos.ll
+++ b/llvm/test/CodeGen/X86/veclib-llvm.sincos.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter "(callq|ptrue)" --version 5
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -vector-library=AMDLIBM < %s | FileCheck %s --check-prefixes=CHECK,AMD,AMD-SSE
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v2 -vector-library=AMDLIBM < %s | FileCheck %s --check-prefixes=CHECK,AMD,AMD-AVX
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v3 -vector-library=AMDLIBM < %s | FileCheck %s --check-prefixes=CHECK,AMD,AMD-AVX2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v4 -vector-library=AMDLIBM < %s | FileCheck %s --check-prefixes=CHECK,AMD,AMD-AVX512
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -vector-library=LIBMVEC < %s | FileCheck %s --check-prefixes=CHECK,GLIBC,GLIBC-SSE
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v2 -vector-library=LIBMVEC < %s | FileCheck %s --check-prefixes=CHECK,GLIBC,GLIBC-AVX
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v3 -vector-library=LIBMVEC < %s | FileCheck %s --check-prefixes=CHECK,GLIBC,GLIBC-AVX2
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v4 -vector-library=LIBMVEC < %s | FileCheck %s --check-prefixes=CHECK,GLIBC,GLIBC-AVX512
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -vector-library=AMDLIBM < %s | FileCheck %s --check-prefixes=CHECK,AMD,AMD-SSE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v2 -vector-library=AMDLIBM < %s | FileCheck %s --check-prefixes=CHECK,AMD,AMD-AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v3 -vector-library=AMDLIBM < %s | FileCheck %s --check-prefixes=CHECK,AMD,AMD-AVX2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v4 -vector-library=AMDLIBM < %s | FileCheck %s --check-prefixes=CHECK,AMD,AMD-AVX512
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -vector-library=LIBMVEC < %s | FileCheck %s --check-prefixes=CHECK,GLIBC,GLIBC-SSE
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v2 -vector-library=LIBMVEC < %s | FileCheck %s --check-prefixes=CHECK,GLIBC,GLIBC-AVX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v3 -vector-library=LIBMVEC < %s | FileCheck %s --check-prefixes=CHECK,GLIBC,GLIBC-AVX2
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64-v4 -vector-library=LIBMVEC < %s | FileCheck %s --check-prefixes=CHECK,GLIBC,GLIBC-AVX512
define void @test_sincos_v4f32(<4 x float> %x, ptr noalias %out_sin, ptr noalias %out_cos) {
; CHECK-LABEL: test_sincos_v4f32:
diff --git a/llvm/test/CodeGen/X86/vector-bitreverse.ll b/llvm/test/CodeGen/X86/vector-bitreverse.ll
index 834dfd63432b0..51414d327312f 100644
--- a/llvm/test/CodeGen/X86/vector-bitreverse.ll
+++ b/llvm/test/CodeGen/X86/vector-bitreverse.ll
@@ -1,22 +1,22 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=ALL,SSE,SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=ALL,XOP,XOPAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=ALL,XOP,XOPAVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+gfni | FileCheck %s --check-prefixes=ALL,GFNISSE,GFNISSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3,+gfni | FileCheck %s --check-prefixes=ALL,GFNISSE,GFNISSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+gfni | FileCheck %s --check-prefixes=ALL,GFNIAVX,GFNIAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+gfni | FileCheck %s --check-prefixes=ALL,GFNIAVX,GFNIAVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+gfni | FileCheck %s --check-prefixes=ALL,GFNIAVX,GFNIAVX512,GFNIAVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+gfni | FileCheck %s --check-prefixes=ALL,GFNIAVX,GFNIAVX512,GFNIAVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=ALL,SSE,SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX,AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=ALL,XOP,XOPAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=ALL,XOP,XOPAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+gfni | FileCheck %s --check-prefixes=ALL,GFNISSE,GFNISSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3,+gfni | FileCheck %s --check-prefixes=ALL,GFNISSE,GFNISSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+gfni | FileCheck %s --check-prefixes=ALL,GFNIAVX,GFNIAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+gfni | FileCheck %s --check-prefixes=ALL,GFNIAVX,GFNIAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+gfni | FileCheck %s --check-prefixes=ALL,GFNIAVX,GFNIAVX512,GFNIAVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+gfni | FileCheck %s --check-prefixes=ALL,GFNIAVX,GFNIAVX512,GFNIAVX512BW
; Make sure we don't crash with avx512bw and xop
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx512bw
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx512bw
define i8 @test_bitreverse_i8(i8 %a) nounwind {
; SSE-LABEL: test_bitreverse_i8:
diff --git a/llvm/test/CodeGen/X86/vector-blend.ll b/llvm/test/CodeGen/X86/vector-blend.ll
index 2d2fc6b6ee0d7..7e3fae725d746 100644
--- a/llvm/test/CodeGen/X86/vector-blend.ll
+++ b/llvm/test/CodeGen/X86/vector-blend.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
; AVX128 tests:
diff --git a/llvm/test/CodeGen/X86/vector-bo-select-avx512.ll b/llvm/test/CodeGen/X86/vector-bo-select-avx512.ll
index 4e9c0d9c1d0ca..9486771f4fbb8 100644
--- a/llvm/test/CodeGen/X86/vector-bo-select-avx512.ll
+++ b/llvm/test/CodeGen/X86/vector-bo-select-avx512.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512VL
define dso_local <8 x i64> @select_sub(<8 x i64> %src, <8 x i64> %a, <8 x i64> %b, ptr %ptr) {
; AVX512-LABEL: select_sub:
diff --git a/llvm/test/CodeGen/X86/vector-compare-combines.ll b/llvm/test/CodeGen/X86/vector-compare-combines.ll
index ddc07f996fbde..6ca7099d020f5 100644
--- a/llvm/test/CodeGen/X86/vector-compare-combines.ll
+++ b/llvm/test/CodeGen/X86/vector-compare-combines.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
; Ensure we match legal min/max intrinsics and the expanded compare+select equivalents.
diff --git a/llvm/test/CodeGen/X86/vector-compare-results.ll b/llvm/test/CodeGen/X86/vector-compare-results.ll
index 40f4b1c941841..b7c3207709870 100644
--- a/llvm/test/CodeGen/X86/vector-compare-results.ll
+++ b/llvm/test/CodeGen/X86/vector-compare-results.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW
;
; 128-bit vector comparisons
diff --git a/llvm/test/CodeGen/X86/vector-compare-simplify.ll b/llvm/test/CodeGen/X86/vector-compare-simplify.ll
index ed7cbe3658bdf..28e330955cd19 100644
--- a/llvm/test/CodeGen/X86/vector-compare-simplify.ll
+++ b/llvm/test/CodeGen/X86/vector-compare-simplify.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s
; Test simplifications of vector compares that should simplify to true, false or equality.
diff --git a/llvm/test/CodeGen/X86/vector-compress-freeze.ll b/llvm/test/CodeGen/X86/vector-compress-freeze.ll
index 981557f9b56cf..38b222ecbcdf4 100644
--- a/llvm/test/CodeGen/X86/vector-compress-freeze.ll
+++ b/llvm/test/CodeGen/X86/vector-compress-freeze.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl | FileCheck %s
declare <16 x i32> @llvm.experimental.vector.compress.v16i32(<16 x i32>, <16 x i1>, <16 x i32>)
diff --git a/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-flags.ll b/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-flags.ll
index d77934adf4cd1..e18683769a46b 100644
--- a/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-flags.ll
+++ b/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-flags.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O3 -mtriple=x86_64-pc-linux -stop-after=finalize-isel < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -mtriple=x86_64-pc-linux -stop-after=finalize-isel < %s | FileCheck %s
define <1 x float> @constrained_vector_fadd_v1f32() #0 {
; CHECK-LABEL: name: constrained_vector_fadd_v1f32
diff --git a/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-fma.ll b/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-fma.ll
index ff208678c9bc7..e308129bb8ca3 100644
--- a/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-fma.ll
+++ b/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-fma.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+fma < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O3 -mtriple=x86_64-pc-linux -mattr=+fma < %s | FileCheck %s
define <1 x float> @constrained_vector_fma_v1f32() #0 {
; CHECK-LABEL: constrained_vector_fma_v1f32:
diff --git a/llvm/test/CodeGen/X86/vector-extend-inreg.ll b/llvm/test/CodeGen/X86/vector-extend-inreg.ll
index 889ab6a0818e2..89b85e9d2154b 100644
--- a/llvm/test/CodeGen/X86/vector-extend-inreg.ll
+++ b/llvm/test/CodeGen/X86/vector-extend-inreg.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X86-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64-AVX
define i64 @extract_any_extend_vector_inreg_v16i64(<16 x i64> %a0, i32 %a1) nounwind {
; X86-SSE-LABEL: extract_any_extend_vector_inreg_v16i64:
diff --git a/llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll b/llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
index 2e85a4e60a253..38ae268b43d81 100644
--- a/llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
+++ b/llvm/test/CodeGen/X86/vector-fshl-rot-sub128.ll
@@ -1,19 +1,19 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512VLBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2 | FileCheck %s --check-prefix=AVX512VBMI2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefix=AVX512VLVBMI2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512VLBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2 | FileCheck %s --check-prefix=AVX512VBMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefix=AVX512VLVBMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
; Just one 32-bit run to make sure we do reasonable things for i64 cases.
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE2
declare <2 x i32> @llvm.fshl.v2i32(<2 x i32>, <2 x i32>, <2 x i32>)
diff --git a/llvm/test/CodeGen/X86/vector-fshl-sub128.ll b/llvm/test/CodeGen/X86/vector-fshl-sub128.ll
index 8db54147b2fb7..1807cef5a6d3c 100644
--- a/llvm/test/CodeGen/X86/vector-fshl-sub128.ll
+++ b/llvm/test/CodeGen/X86/vector-fshl-sub128.ll
@@ -1,19 +1,19 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512VLBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2 | FileCheck %s --check-prefixes=AVX512VBMI2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefixes=AVX512VLVBMI2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512VLBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2 | FileCheck %s --check-prefixes=AVX512VBMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefixes=AVX512VLVBMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
; Just one 32-bit run to make sure we do reasonable things for i64 cases.
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE2
declare <2 x i32> @llvm.fshl.v2i32(<2 x i32>, <2 x i32>, <2 x i32>)
diff --git a/llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll b/llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll
index 17bbfa1208c01..9effa3ab2f316 100644
--- a/llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll
+++ b/llvm/test/CodeGen/X86/vector-fshr-rot-sub128.ll
@@ -1,19 +1,19 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512VLBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2 | FileCheck %s --check-prefix=AVX512VBMI2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefix=AVX512VLVBMI2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512VLBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2 | FileCheck %s --check-prefix=AVX512VBMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefix=AVX512VLVBMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
; Just one 32-bit run to make sure we do reasonable things for i64 cases.
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE2
declare <2 x i32> @llvm.fshr.v2i32(<2 x i32>, <2 x i32>, <2 x i32>)
diff --git a/llvm/test/CodeGen/X86/vector-fshr-sub128.ll b/llvm/test/CodeGen/X86/vector-fshr-sub128.ll
index 144e77b87f44c..43477862166c1 100644
--- a/llvm/test/CodeGen/X86/vector-fshr-sub128.ll
+++ b/llvm/test/CodeGen/X86/vector-fshr-sub128.ll
@@ -1,19 +1,19 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512VLBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2 | FileCheck %s --check-prefixes=AVX512VBMI2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefixes=AVX512VLVBMI2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512VLBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2 | FileCheck %s --check-prefixes=AVX512VBMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vbmi,+avx512vbmi2,+avx512vl | FileCheck %s --check-prefixes=AVX512VLVBMI2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
; Just one 32-bit run to make sure we do reasonable things for i64 cases.
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE2
declare <2 x i32> @llvm.fshr.v2i32(<2 x i32>, <2 x i32>, <2 x i32>)
diff --git a/llvm/test/CodeGen/X86/vector-gep.ll b/llvm/test/CodeGen/X86/vector-gep.ll
index b4cffcd171b33..866a5996c05e4 100644
--- a/llvm/test/CodeGen/X86/vector-gep.ll
+++ b/llvm/test/CodeGen/X86/vector-gep.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux -mcpu=corei7-avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -mcpu=corei7-avx | FileCheck %s
; RUN: opt -passes=instsimplify -disable-output < %s
define <4 x ptr> @AGEP0(ptr %ptr) nounwind {
diff --git a/llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll b/llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll
index 3117865184ecc..23d608a6c9cf3 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 --check-prefix=AVX2NOBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 --check-prefix=AVX2NOBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 --check-prefix=AVX512BW
;
; sdiv by 7
diff --git a/llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll b/llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll
index fa5692aa9cef1..447091a3a31e7 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2 --check-prefix=AVX2NOBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX2 --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2 --check-prefix=AVX2NOBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX2 --check-prefix=AVX512BW
;
; sdiv by 7
diff --git a/llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll b/llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
index b11756a5e3b4e..9d8ec925b77ad 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX512BW
;
; sdiv by 7
diff --git a/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll b/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
index ca57359183312..612603794c5ca 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-udiv-256.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2 --check-prefix=AVX2NOBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX2 --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2 --check-prefix=AVX2NOBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX2 --check-prefix=AVX512BW
;
; udiv by 7
diff --git a/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll b/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
index b8a131e628007..6df09b32ba4d9 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX512BW
;
; udiv by 7
diff --git a/llvm/test/CodeGen/X86/vector-idiv-v2i32.ll b/llvm/test/CodeGen/X86/vector-idiv-v2i32.ll
index 1d9977e6d6287..815c238494ba5 100644
--- a/llvm/test/CodeGen/X86/vector-idiv-v2i32.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv-v2i32.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
define void @test_udiv7_v2i32(ptr %x, ptr %y) nounwind {
; X64-LABEL: test_udiv7_v2i32:
diff --git a/llvm/test/CodeGen/X86/vector-idiv.ll b/llvm/test/CodeGen/X86/vector-idiv.ll
index 3ff3f8d275c98..9805daa48fbaf 100644
--- a/llvm/test/CodeGen/X86/vector-idiv.ll
+++ b/llvm/test/CodeGen/X86/vector-idiv.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
define <2 x i16> @test_urem_unary_v2i16() nounwind {
; SSE-LABEL: test_urem_unary_v2i16:
diff --git a/llvm/test/CodeGen/X86/vector-llrint.ll b/llvm/test/CodeGen/X86/vector-llrint.ll
index 963816c4e0e2e..aed508bd1055a 100644
--- a/llvm/test/CodeGen/X86/vector-llrint.ll
+++ b/llvm/test/CodeGen/X86/vector-llrint.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=i686-unknown -mattr=-x87 | FileCheck %s --check-prefix=X86-NOX87
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=AVX,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=avx512dq,avx512vl | FileCheck %s --check-prefixes=AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=-x87 | FileCheck %s --check-prefix=X86-NOX87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=avx512dq,avx512vl | FileCheck %s --check-prefixes=AVX512DQ
define <1 x i64> @llrint_v1i64_v1f32(<1 x float> %x) nounwind {
; X86-LABEL: llrint_v1i64_v1f32:
diff --git a/llvm/test/CodeGen/X86/vector-lrint-f16.ll b/llvm/test/CodeGen/X86/vector-lrint-f16.ll
index fa3aeb09eae6f..146a31d7dcec3 100644
--- a/llvm/test/CodeGen/X86/vector-lrint-f16.ll
+++ b/llvm/test/CodeGen/X86/vector-lrint-f16.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: sed 's/iXLen/i16/g' %s | llc -mtriple=i686-unknown -mattr=avx2,f16c | FileCheck %s --check-prefixes=X86-AVX-I16
-; RUN: sed 's/iXLen/i16/g' %s | llc -mtriple=i686-unknown -mattr=avx512fp16,avx512vl | FileCheck %s --check-prefixes=X86-FP16-I16
-; RUN: sed 's/iXLen/i16/g' %s | llc -mtriple=x86_64-unknown -mattr=avx2,f16c | FileCheck %s --check-prefixes=X64-AVX-I16
-; RUN: sed 's/iXLen/i16/g' %s | llc -mtriple=x86_64-unknown -mattr=avx512fp16,avx512vl | FileCheck %s --check-prefixes=X64-FP16-I16
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=i686-unknown -mattr=avx2,f16c | FileCheck %s --check-prefixes=X86-AVX-I32
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=i686-unknown -mattr=avx512fp16,avx512vl | FileCheck %s --check-prefixes=X86-FP16-I32
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=x86_64-unknown -mattr=avx2,f16c | FileCheck %s --check-prefixes=X64-AVX-I32
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=x86_64-unknown -mattr=avx512fp16,avx512vl | FileCheck %s --check-prefixes=X64-FP16-I32
+; RUN: sed 's/iXLen/i16/g' %s | llc -combiner-topological-sorting -mtriple=i686-unknown -mattr=avx2,f16c | FileCheck %s --check-prefixes=X86-AVX-I16
+; RUN: sed 's/iXLen/i16/g' %s | llc -combiner-topological-sorting -mtriple=i686-unknown -mattr=avx512fp16,avx512vl | FileCheck %s --check-prefixes=X86-FP16-I16
+; RUN: sed 's/iXLen/i16/g' %s | llc -combiner-topological-sorting -mtriple=x86_64-unknown -mattr=avx2,f16c | FileCheck %s --check-prefixes=X64-AVX-I16
+; RUN: sed 's/iXLen/i16/g' %s | llc -combiner-topological-sorting -mtriple=x86_64-unknown -mattr=avx512fp16,avx512vl | FileCheck %s --check-prefixes=X64-FP16-I16
+; RUN: sed 's/iXLen/i32/g' %s | llc -combiner-topological-sorting -mtriple=i686-unknown -mattr=avx2,f16c | FileCheck %s --check-prefixes=X86-AVX-I32
+; RUN: sed 's/iXLen/i32/g' %s | llc -combiner-topological-sorting -mtriple=i686-unknown -mattr=avx512fp16,avx512vl | FileCheck %s --check-prefixes=X86-FP16-I32
+; RUN: sed 's/iXLen/i32/g' %s | llc -combiner-topological-sorting -mtriple=x86_64-unknown -mattr=avx2,f16c | FileCheck %s --check-prefixes=X64-AVX-I32
+; RUN: sed 's/iXLen/i32/g' %s | llc -combiner-topological-sorting -mtriple=x86_64-unknown -mattr=avx512fp16,avx512vl | FileCheck %s --check-prefixes=X64-FP16-I32
define <1 x iXLen> @lrint_v1f16(<1 x half> %x) nounwind {
; X86-AVX-I16-LABEL: lrint_v1f16:
diff --git a/llvm/test/CodeGen/X86/vector-lrint.ll b/llvm/test/CodeGen/X86/vector-lrint.ll
index 86070fa541b84..2acfb8867b292 100644
--- a/llvm/test/CodeGen/X86/vector-lrint.ll
+++ b/llvm/test/CodeGen/X86/vector-lrint.ll
@@ -1,18 +1,18 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=i686-unknown | FileCheck %s --check-prefix=X86-I32
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=i686-unknown -mattr=-x87 | FileCheck %s --check-prefix=X86-NOX87
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=i686-unknown | FileCheck %s --check-prefix=X86-I64
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=i686-unknown -mattr=-x87 | FileCheck %s --check-prefix=X86-I64-NOX87
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefix=X86-SSE2
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=i686-unknown -mattr=avx | FileCheck %s --check-prefixes=X86-AVX,X86-AVX1
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=i686-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X86-AVX,AVX512-i32
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=i686-unknown -mattr=avx512dq,avx512vl | FileCheck %s --check-prefixes=X86-AVX,AVX512-i32
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=X64-AVX-i32,X64-AVX1-i32
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64-AVX-i32,AVX512-i32
-; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=x86_64-unknown -mattr=avx512dq,avx512vl | FileCheck %s --check-prefixes=X64-AVX-i32,AVX512-i32
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=X64-AVX-i64,X64-AVX1-i64
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64-AVX-i64,AVX512-i64
-; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=x86_64-unknown -mattr=avx512dq,avx512vl | FileCheck %s --check-prefixes=X64-AVX-i64,AVX512DQ-i64
+; RUN: sed 's/iXLen/i32/g' %s | llc -combiner-topological-sorting -mtriple=i686-unknown | FileCheck %s --check-prefix=X86-I32
+; RUN: sed 's/iXLen/i32/g' %s | llc -combiner-topological-sorting -mtriple=i686-unknown -mattr=-x87 | FileCheck %s --check-prefix=X86-NOX87
+; RUN: sed 's/iXLen/i64/g' %s | llc -combiner-topological-sorting -mtriple=i686-unknown | FileCheck %s --check-prefix=X86-I64
+; RUN: sed 's/iXLen/i64/g' %s | llc -combiner-topological-sorting -mtriple=i686-unknown -mattr=-x87 | FileCheck %s --check-prefix=X86-I64-NOX87
+; RUN: sed 's/iXLen/i32/g' %s | llc -combiner-topological-sorting -mtriple=i686-unknown -mattr=sse2 | FileCheck %s --check-prefix=X86-SSE2
+; RUN: sed 's/iXLen/i32/g' %s | llc -combiner-topological-sorting -mtriple=i686-unknown -mattr=avx | FileCheck %s --check-prefixes=X86-AVX,X86-AVX1
+; RUN: sed 's/iXLen/i32/g' %s | llc -combiner-topological-sorting -mtriple=i686-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X86-AVX,AVX512-i32
+; RUN: sed 's/iXLen/i32/g' %s | llc -combiner-topological-sorting -mtriple=i686-unknown -mattr=avx512dq,avx512vl | FileCheck %s --check-prefixes=X86-AVX,AVX512-i32
+; RUN: sed 's/iXLen/i32/g' %s | llc -combiner-topological-sorting -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=X64-AVX-i32,X64-AVX1-i32
+; RUN: sed 's/iXLen/i32/g' %s | llc -combiner-topological-sorting -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64-AVX-i32,AVX512-i32
+; RUN: sed 's/iXLen/i32/g' %s | llc -combiner-topological-sorting -mtriple=x86_64-unknown -mattr=avx512dq,avx512vl | FileCheck %s --check-prefixes=X64-AVX-i32,AVX512-i32
+; RUN: sed 's/iXLen/i64/g' %s | llc -combiner-topological-sorting -mtriple=x86_64-unknown -mattr=avx | FileCheck %s --check-prefixes=X64-AVX-i64,X64-AVX1-i64
+; RUN: sed 's/iXLen/i64/g' %s | llc -combiner-topological-sorting -mtriple=x86_64-unknown -mattr=avx512f | FileCheck %s --check-prefixes=X64-AVX-i64,AVX512-i64
+; RUN: sed 's/iXLen/i64/g' %s | llc -combiner-topological-sorting -mtriple=x86_64-unknown -mattr=avx512dq,avx512vl | FileCheck %s --check-prefixes=X64-AVX-i64,AVX512DQ-i64
define <1 x iXLen> @lrint_v1f32(<1 x float> %x) nounwind {
; X86-I32-LABEL: lrint_v1f32:
diff --git a/llvm/test/CodeGen/X86/vector-lzcnt-128.ll b/llvm/test/CodeGen/X86/vector-lzcnt-128.ll
index cfb5fac2fd7aa..1cbf37f5bfcfe 100644
--- a/llvm/test/CodeGen/X86/vector-lzcnt-128.ll
+++ b/llvm/test/CodeGen/X86/vector-lzcnt-128.ll
@@ -1,17 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefixes=SSE,SSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=NOBW,AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=NOBW,AVX,AVX1OR2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=NOBW,AVX,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefixes=AVX512VLBWDQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512cd,+avx512vl | FileCheck %s --check-prefixes=NOBW,AVX512,AVX512VLCD
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512cd | FileCheck %s --check-prefixes=NOBW,AVX512,AVX512CD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefixes=SSE,SSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=NOBW,AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=NOBW,AVX,AVX1OR2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=NOBW,AVX,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefixes=AVX512VLBWDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512cd,+avx512vl | FileCheck %s --check-prefixes=NOBW,AVX512,AVX512VLCD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512cd | FileCheck %s --check-prefixes=NOBW,AVX512,AVX512CD
;
; Just one 32-bit run to make sure we do reasonable things for i64 lzcnt.
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86-SSE
define <2 x i64> @testv2i64(<2 x i64> %in) nounwind {
; SSE2-LABEL: testv2i64:
diff --git a/llvm/test/CodeGen/X86/vector-lzcnt-256.ll b/llvm/test/CodeGen/X86/vector-lzcnt-256.ll
index db363493e2dac..5f3b0dcb467ef 100644
--- a/llvm/test/CodeGen/X86/vector-lzcnt-256.ll
+++ b/llvm/test/CodeGen/X86/vector-lzcnt-256.ll
@@ -1,13 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X64,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X64,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefixes=X64,AVX512VLBWDQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512cd,+avx512vl | FileCheck %s --check-prefixes=X64,AVX512,AVX512VLCD
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512cd | FileCheck %s --check-prefixes=X64,AVX512,AVX512CD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=X64,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=X64,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefixes=X64,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw,+avx512dq | FileCheck %s --check-prefixes=X64,AVX512VLBWDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512cd,+avx512vl | FileCheck %s --check-prefixes=X64,AVX512,AVX512VLCD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512cd | FileCheck %s --check-prefixes=X64,AVX512,AVX512CD
;
; Just one 32-bit run to make sure we do reasonable things for i64 lzcnt.
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X86-AVX
define <4 x i64> @testv4i64(<4 x i64> %in) nounwind {
; AVX1-LABEL: testv4i64:
diff --git a/llvm/test/CodeGen/X86/vector-lzcnt-512.ll b/llvm/test/CodeGen/X86/vector-lzcnt-512.ll
index d35a365508d54..234430d52cf5f 100644
--- a/llvm/test/CodeGen/X86/vector-lzcnt-512.ll
+++ b/llvm/test/CodeGen/X86/vector-lzcnt-512.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512cd,-avx512bw | FileCheck %s --check-prefix=AVX512CD
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512cd,+avx512bw | FileCheck %s --check-prefix=AVX512CDBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,-avx512cd,+avx512bw | FileCheck %s --check-prefix=AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,-avx512cd,-avx512bw | FileCheck %s --check-prefix=AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512cd,-avx512bw | FileCheck %s --check-prefix=AVX512CD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512cd,+avx512bw | FileCheck %s --check-prefix=AVX512CDBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,-avx512cd,+avx512bw | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,-avx512cd,-avx512bw | FileCheck %s --check-prefix=AVX512DQ
define <8 x i64> @testv8i64(<8 x i64> %in) nounwind {
; AVX512CD-LABEL: testv8i64:
diff --git a/llvm/test/CodeGen/X86/vector-lzcnt-sub128.ll b/llvm/test/CodeGen/X86/vector-lzcnt-sub128.ll
index a1b277efde6ff..895b3c8fafd57 100644
--- a/llvm/test/CodeGen/X86/vector-lzcnt-sub128.ll
+++ b/llvm/test/CodeGen/X86/vector-lzcnt-sub128.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1 immarg)
diff --git a/llvm/test/CodeGen/X86/vector-merge-store-fp-constants.ll b/llvm/test/CodeGen/X86/vector-merge-store-fp-constants.ll
index e902f3e995c45..f728b6f298017 100644
--- a/llvm/test/CodeGen/X86/vector-merge-store-fp-constants.ll
+++ b/llvm/test/CodeGen/X86/vector-merge-store-fp-constants.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=DEFAULTCPU
-; RUN: llc < %s -mcpu=x86-64 -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64CPU
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=DEFAULTCPU
+; RUN: llc -combiner-topological-sorting < %s -mcpu=x86-64 -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64CPU
define void @merge_8_float_zero_stores(ptr %ptr) {
; DEFAULTCPU-LABEL: merge_8_float_zero_stores:
diff --git a/llvm/test/CodeGen/X86/vector-mul-i8-decompose.ll b/llvm/test/CodeGen/X86/vector-mul-i8-decompose.ll
index 9b47d7de4b0ed..6cbb6092d056d 100644
--- a/llvm/test/CodeGen/X86/vector-mul-i8-decompose.ll
+++ b/llvm/test/CodeGen/X86/vector-mul-i8-decompose.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512
;; Tests vXi8 constant-multiply decomposition into shift/add/sub sequences.
;;
diff --git a/llvm/test/CodeGen/X86/vector-mulfix-legalize.ll b/llvm/test/CodeGen/X86/vector-mulfix-legalize.ll
index 324fe12de9400..8fedbe11e4a59 100644
--- a/llvm/test/CodeGen/X86/vector-mulfix-legalize.ll
+++ b/llvm/test/CodeGen/X86/vector-mulfix-legalize.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -O1 -mtriple=x86_64-unknown-unknown -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O1 -mtriple=x86_64-unknown-unknown -o - | FileCheck %s
; We used to assert on widening the SMULFIX/UMULFIX/SMULFIXSAT node result,
; so primiary goal with the test is to see that we support legalization for
diff --git a/llvm/test/CodeGen/X86/vector-pack-128.ll b/llvm/test/CodeGen/X86/vector-pack-128.ll
index f58f19ecd2481..4f2bbaf9104d8 100644
--- a/llvm/test/CodeGen/X86/vector-pack-128.ll
+++ b/llvm/test/CodeGen/X86/vector-pack-128.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512f | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
; trunc(concat(x,y)) -> pack
diff --git a/llvm/test/CodeGen/X86/vector-pack-256.ll b/llvm/test/CodeGen/X86/vector-pack-256.ll
index 832e50d147f6c..b6e2b49308186 100644
--- a/llvm/test/CodeGen/X86/vector-pack-256.ll
+++ b/llvm/test/CodeGen/X86/vector-pack-256.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
; trunc(concat(x,y)) -> pack
diff --git a/llvm/test/CodeGen/X86/vector-pack-512.ll b/llvm/test/CodeGen/X86/vector-pack-512.ll
index 8ea6f619f2b05..619e7429a70e2 100644
--- a/llvm/test/CodeGen/X86/vector-pack-512.ll
+++ b/llvm/test/CodeGen/X86/vector-pack-512.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
; trunc(concat(x,y)) -> pack
diff --git a/llvm/test/CodeGen/X86/vector-partial-undef.ll b/llvm/test/CodeGen/X86/vector-partial-undef.ll
index 7c12e5295257c..06cdccb6853b4 100644
--- a/llvm/test/CodeGen/X86/vector-partial-undef.ll
+++ b/llvm/test/CodeGen/X86/vector-partial-undef.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s --check-prefix=AVX
; xor undef, undef --> 0 because it's not worth fighting to make that return undef?
diff --git a/llvm/test/CodeGen/X86/vector-popcnt-128-ult-ugt.ll b/llvm/test/CodeGen/X86/vector-popcnt-128-ult-ugt.ll
index b5b9af543ed5c..6ca9fa588c586 100644
--- a/llvm/test/CodeGen/X86/vector-popcnt-128-ult-ugt.ll
+++ b/llvm/test/CodeGen/X86/vector-popcnt-128-ult-ugt.ll
@@ -1,14 +1,14 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefixes=SSE,SSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefixes=AVX,AVX512VPOPCNTDQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512VPOPCNTDQVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=BITALG_NOVLX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefix=BITALG
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefixes=SSE,SSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefixes=AVX,AVX512VPOPCNTDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512VPOPCNTDQVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=BITALG_NOVLX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefix=BITALG
define <16 x i8> @ugt_1_v16i8(<16 x i8> %0) {
diff --git a/llvm/test/CodeGen/X86/vector-popcnt-128.ll b/llvm/test/CodeGen/X86/vector-popcnt-128.ll
index c1d30b6d5a995..2428c67da245d 100644
--- a/llvm/test/CodeGen/X86/vector-popcnt-128.ll
+++ b/llvm/test/CodeGen/X86/vector-popcnt-128.ll
@@ -1,15 +1,15 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefixes=SSE,SSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop | FileCheck %s --check-prefixes=AVX,XOP
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefixes=AVX,AVX512,AVX512VPOPCNTDQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512VPOPCNTDQVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=BITALG_NOVLX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefix=BITALG
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefixes=SSE,SSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop | FileCheck %s --check-prefixes=AVX,XOP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefixes=AVX,AVX512,AVX512VPOPCNTDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512VPOPCNTDQVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=BITALG_NOVLX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefix=BITALG
define <2 x i64> @testv2i64(<2 x i64> %in) nounwind {
; SSE2-LABEL: testv2i64:
diff --git a/llvm/test/CodeGen/X86/vector-popcnt-256-ult-ugt.ll b/llvm/test/CodeGen/X86/vector-popcnt-256-ult-ugt.ll
index 487f9a5d326cf..9e3662926d073 100644
--- a/llvm/test/CodeGen/X86/vector-popcnt-256-ult-ugt.ll
+++ b/llvm/test/CodeGen/X86/vector-popcnt-256-ult-ugt.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefix=AVX512VPOPCNTDQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512vl | FileCheck %s --check-prefix=AVX512VPOPCNTDQVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=BITALG_NOVLX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefix=BITALG
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefix=AVX512VPOPCNTDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512vl | FileCheck %s --check-prefix=AVX512VPOPCNTDQVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=BITALG_NOVLX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefix=BITALG
define <32 x i8> @ugt_1_v32i8(<32 x i8> %0) {
diff --git a/llvm/test/CodeGen/X86/vector-popcnt-256.ll b/llvm/test/CodeGen/X86/vector-popcnt-256.ll
index 7fb60b987d95d..84899827a15fc 100644
--- a/llvm/test/CodeGen/X86/vector-popcnt-256.ll
+++ b/llvm/test/CodeGen/X86/vector-popcnt-256.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop | FileCheck %s --check-prefixes=ALL,XOP
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefixes=ALL,AVX512VPOPCNTDQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512VPOPCNTDQVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefixes=ALL,BITALG_NOVLX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefixes=ALL,BITALG
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop | FileCheck %s --check-prefixes=ALL,XOP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefixes=ALL,AVX512VPOPCNTDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512VPOPCNTDQVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefixes=ALL,BITALG_NOVLX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefixes=ALL,BITALG
define <4 x i64> @testv4i64(<4 x i64> %in) nounwind {
; AVX1-LABEL: testv4i64:
diff --git a/llvm/test/CodeGen/X86/vector-popcnt-512-ult-ugt.ll b/llvm/test/CodeGen/X86/vector-popcnt-512-ult-ugt.ll
index 1618a647a4062..b744fdc4ac067 100644
--- a/llvm/test/CodeGen/X86/vector-popcnt-512-ult-ugt.ll
+++ b/llvm/test/CodeGen/X86/vector-popcnt-512-ult-ugt.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefixes=AVX512VPOPCNTDQ,AVX512VPOPCNTDQ-NOBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512bw | FileCheck %s --check-prefixes=AVX512VPOPCNTDQ,AVX512VPOPCNTDQ-BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=BITALG
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefixes=AVX512VPOPCNTDQ,AVX512VPOPCNTDQ-NOBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512bw | FileCheck %s --check-prefixes=AVX512VPOPCNTDQ,AVX512VPOPCNTDQ-BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=BITALG
define <64 x i8> @ugt_1_v64i8(<64 x i8> %0) {
diff --git a/llvm/test/CodeGen/X86/vector-popcnt-512.ll b/llvm/test/CodeGen/X86/vector-popcnt-512.ll
index f470a2be8aee8..9c08662a04a01 100644
--- a/llvm/test/CodeGen/X86/vector-popcnt-512.ll
+++ b/llvm/test/CodeGen/X86/vector-popcnt-512.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefixes=AVX512VPOPCNTDQ,AVX512VPOPCNTDQ-NOBW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512bw | FileCheck %s --check-prefixes=AVX512VPOPCNTDQ,AVX512VPOPCNTDQ-BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=BITALG
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefixes=AVX512VPOPCNTDQ,AVX512VPOPCNTDQ-NOBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512bw | FileCheck %s --check-prefixes=AVX512VPOPCNTDQ,AVX512VPOPCNTDQ-BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=BITALG
define <8 x i64> @testv8i64(<8 x i64> %in) nounwind {
; AVX512F-LABEL: testv8i64:
diff --git a/llvm/test/CodeGen/X86/vector-reduce-and-scalar.ll b/llvm/test/CodeGen/X86/vector-reduce-and-scalar.ll
index 5317f7ccc588b..71c81492d6fed 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-and-scalar.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-and-scalar.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512VL
;
; vXi64
diff --git a/llvm/test/CodeGen/X86/vector-reduce-fadd.ll b/llvm/test/CodeGen/X86/vector-reduce-fadd.ll
index 606beeaff750e..a5f1e4db0c29a 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-fadd.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-fadd.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1-SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fast-hops | FileCheck %s --check-prefixes=AVX,AVX1-FAST
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fast-hops | FileCheck %s --check-prefixes=AVX,AVX1-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512
;
; vXf32 (accum)
diff --git a/llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll b/llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll
index 179790c46f33c..8bc2f947c6235 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512,AVX512FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512,AVX512FP16
;
; vXf32
diff --git a/llvm/test/CodeGen/X86/vector-reduce-fmax.ll b/llvm/test/CodeGen/X86/vector-reduce-fmax.ll
index 7048b98227620..99ee333e1a0d2 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-fmax.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-fmax.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512,AVX512VL
;
; vXf32
diff --git a/llvm/test/CodeGen/X86/vector-reduce-fmaximum.ll b/llvm/test/CodeGen/X86/vector-reduce-fmaximum.ll
index ef49ae8402c66..654be79c7ce68 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-fmaximum.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-fmaximum.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512VL
;
; vXf32
diff --git a/llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll b/llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll
index d0a178dcc08b8..692866254b7f5 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512,AVX512FP16
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512fp16,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512,AVX512FP16
;
; vXf32
diff --git a/llvm/test/CodeGen/X86/vector-reduce-fmin.ll b/llvm/test/CodeGen/X86/vector-reduce-fmin.ll
index 727af12217c67..c261c1fd13909 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-fmin.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-fmin.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=ALL,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=ALL,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=ALL,AVX512,AVX512VL
;
; vXf32
diff --git a/llvm/test/CodeGen/X86/vector-reduce-fmul.ll b/llvm/test/CodeGen/X86/vector-reduce-fmul.ll
index 17fb2ed5d13a8..514e0d810dbaf 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-fmul.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-fmul.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX512
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512
;
; vXf32 (accum)
diff --git a/llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll b/llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll
index 6cb43234d713b..3730d7c969f71 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2,X86-SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2,X64-SSE,X64-SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,X64-SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2,X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2,X64-SSE,X64-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,X64-SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512VL
;
; Truncate
diff --git a/llvm/test/CodeGen/X86/vector-rem.ll b/llvm/test/CodeGen/X86/vector-rem.ll
index 8d32d3e39ace7..56068727adb03 100644
--- a/llvm/test/CodeGen/X86/vector-rem.ll
+++ b/llvm/test/CodeGen/X86/vector-rem.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
define <4 x i32> @foo(<4 x i32> %t, <4 x i32> %u) nounwind {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/vector-shift-ashr-512.ll b/llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
index aff2228c258b5..9896663c6769c 100644
--- a/llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-ashr-512.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=ALL,AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=ALL,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512BW
;
; Variable Shifts
diff --git a/llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll b/llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
index 7c1a531628eab..6a6f21bafc05a 100644
--- a/llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
@@ -1,17 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512DQVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512DQVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512BWVL
;
; Just one 32-bit run to make sure we do reasonable things for i64 shifts.
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
;
; Variable Shifts
diff --git a/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll b/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll
index b453f925b94e8..624e4547efb88 100644
--- a/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-by-select-loop.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=XOP
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=XOP
; PR37428 - https://bugs.llvm.org/show_bug.cgi?id=37428
; This is a larger-than-usual regression test to verify that several backend
diff --git a/llvm/test/CodeGen/X86/vector-shift-lshr-512.ll b/llvm/test/CodeGen/X86/vector-shift-lshr-512.ll
index 4450d07e01cca..0f47eb83aec4f 100644
--- a/llvm/test/CodeGen/X86/vector-shift-lshr-512.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-lshr-512.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=ALL,AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=ALL,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512BW
;
; Variable Shifts
diff --git a/llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll b/llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
index e6eb4d70d22c9..9b248db4a7d2e 100644
--- a/llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
@@ -1,17 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512DQVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512DQVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512BWVL
;
; Just one 32-bit run to make sure we do reasonable things for i64 shifts.
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
;
; Variable Shifts
diff --git a/llvm/test/CodeGen/X86/vector-shift-shl-512.ll b/llvm/test/CodeGen/X86/vector-shift-shl-512.ll
index 1e5f1b8729d47..465f8443ca1a8 100644
--- a/llvm/test/CodeGen/X86/vector-shift-shl-512.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-shl-512.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=ALL,AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=ALL,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=ALL,AVX512BW
;
; Variable Shifts
diff --git a/llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll b/llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
index 6eeadc54b24ae..9b8a62f71bf1e 100644
--- a/llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
@@ -1,17 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512DQVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefixes=XOP,XOPAVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefixes=XOP,XOPAVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512DQVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512BWVL
;
; Just one 32-bit run to make sure we do reasonable things for i64 shifts.
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE
;
; Variable Shifts
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-128-unpck.ll b/llvm/test/CodeGen/X86/vector-shuffle-128-unpck.ll
index 16493c0448848..ff0324e61246e 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-128-unpck.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-128-unpck.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX2OR512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX2OR512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX2OR512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq | FileCheck %s --check-prefixes=ALL,AVX2OR512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX2OR512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX2OR512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX2OR512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX2OR512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX2OR512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq | FileCheck %s --check-prefixes=ALL,AVX2OR512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX2OR512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=ALL,AVX2OR512VL
define <2 x i64> @unpckh_unary_extracted_v4i64(<4 x i64> %x) {
; AVX1-LABEL: unpckh_unary_extracted_v4i64:
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll b/llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
index fce98cd470bcd..08b01e5fdf4ac 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-512-v8.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX512F-32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX512F-32
define <8 x double> @shuffle_v8f64_00000000(<8 x double> %a, <8 x double> %b) {
; ALL-LABEL: shuffle_v8f64_00000000:
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
index 2cc65b111ace2..9cff7c6e7a555 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-avx512f.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X86,X86-AVX512F
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,X86,X86-AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X86,X86-AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,X86,X86-AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX512BW
declare <16 x float> @llvm.x86.avx512.mask.vpermilvar.ps.512(<16 x float>, <16 x i32>, <16 x float>, i16)
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-sse4a.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-sse4a.ll
index 69d36078857ee..bc8819c6ee1bc 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining-sse4a.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-sse4a.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+ssse3,+sse4a | FileCheck %s --check-prefixes=CHECK,SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2,+sse4a | FileCheck %s --check-prefixes=CHECK,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx,+sse4a| FileCheck %s --check-prefixes=CHECK,AVX
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2,+sse4a | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+ssse3,+sse4a | FileCheck %s --check-prefixes=CHECK,SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.2,+sse4a | FileCheck %s --check-prefixes=CHECK,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx,+sse4a| FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2,+sse4a | FileCheck %s --check-prefixes=CHECK,AVX
;
; Combine tests involving SSE4A target shuffles (EXTRQI,INSERTQI)
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll b/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
index ee4a7e1413f6c..f806cdd5b3a4f 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-combining-xop.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefixes=CHECK,X64,X64-AVX2
declare <2 x double> @llvm.x86.xop.vpermil2pd(<2 x double>, <2 x double>, <2 x i64>, i8) nounwind readnone
declare <4 x double> @llvm.x86.xop.vpermil2pd.256(<4 x double>, <4 x double>, <4 x i64>, i8) nounwind readnone
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-fast-per-lane.ll b/llvm/test/CodeGen/X86/vector-shuffle-fast-per-lane.ll
index 5bf936c6e5cec..7febfbb39dd56 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-fast-per-lane.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-fast-per-lane.ll
@@ -1,17 +1,17 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=SLOW
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=FAST
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+avx512f,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=FAST
;
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=znver1 | FileCheck %s --check-prefixes=FAST
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=znver2 | FileCheck %s --check-prefixes=FAST
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=znver3 | FileCheck %s --check-prefixes=FAST
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=znver4 | FileCheck %s --check-prefixes=FAST
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=znver5 | FileCheck %s --check-prefixes=FAST
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=znver6 | FileCheck %s --check-prefixes=FAST
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=haswell | FileCheck %s --check-prefixes=FAST
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=skx | FileCheck %s --check-prefixes=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=znver1 | FileCheck %s --check-prefixes=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=znver2 | FileCheck %s --check-prefixes=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=znver3 | FileCheck %s --check-prefixes=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=znver4 | FileCheck %s --check-prefixes=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=znver5 | FileCheck %s --check-prefixes=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=znver6 | FileCheck %s --check-prefixes=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=haswell | FileCheck %s --check-prefixes=FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=skx | FileCheck %s --check-prefixes=FAST
define <32 x i8> @PR44795(<32 x i8> %a0) {
; SLOW-LABEL: PR44795:
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-masked.ll b/llvm/test/CodeGen/X86/vector-shuffle-masked.ll
index 545ffcc9fab86..0ee245d889d42 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-masked.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-masked.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefix=CHECK
define <4 x i32> @mask_shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b, <4 x i32> %passthru, i8 %mask) {
; CHECK-LABEL: mask_shuffle_v4i32_1234:
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-mmx.ll b/llvm/test/CodeGen/X86/vector-shuffle-mmx.ll
index 60800673ed2dd..b47e175e9cd7f 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-mmx.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-mmx.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-darwin -mattr=+mmx,+sse2 | FileCheck --check-prefix=X86 %s
-; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse2 | FileCheck --check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-darwin -mattr=+mmx,+sse2 | FileCheck --check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse2 | FileCheck --check-prefix=X64 %s
; If there is no explicit MMX type usage, always promote to XMM.
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-sse1.ll b/llvm/test/CodeGen/X86/vector-shuffle-sse1.ll
index 7e8fd1ceea058..2eeda97800e55 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-sse1.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-sse1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=SSE1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=SSE1
define <4 x float> @shuffle_v4f32_0001(<4 x float> %a, <4 x float> %b) {
; SSE1-LABEL: shuffle_v4f32_0001:
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-sse41.ll b/llvm/test/CodeGen/X86/vector-shuffle-sse41.ll
index b2b8340d2111f..496903feef9f8 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-sse41.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-sse41.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx | FileCheck %s --check-prefix=AVX
define <8 x i16> @blend_packusdw(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2, <4 x i32> %a3) {
; SSE-LABEL: blend_packusdw:
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-sse4a.ll b/llvm/test/CodeGen/X86/vector-shuffle-sse4a.ll
index 3592ed8a84cb2..74575305db4d9 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-sse4a.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-sse4a.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3,+sse4a | FileCheck %s --check-prefix=ALL --check-prefix=AMD10H
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3,+sse4a | FileCheck %s --check-prefix=ALL --check-prefix=BTVER1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+sse4a | FileCheck %s --check-prefix=ALL --check-prefix=BTVER2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3,+sse4a | FileCheck %s --check-prefix=ALL --check-prefix=AMD10H
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3,+sse4a | FileCheck %s --check-prefix=ALL --check-prefix=BTVER1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+sse4a | FileCheck %s --check-prefix=ALL --check-prefix=BTVER2
;
; EXTRQI
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-v1.ll b/llvm/test/CodeGen/X86/vector-shuffle-v1.ll
index 9645f7c524cb4..f429511a0c31e 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-v1.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-v1.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=AVX512VL --check-prefix=AVX512VL-FAST-ALL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=AVX512VL --check-prefix=AVX512VL-FAST-PERLANE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+avx512dq,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=VL_BW_DQ --check-prefix=VL_BW_DQ-FAST-ALL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+avx512dq,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=VL_BW_DQ --check-prefix=VL_BW_DQ-FAST-PERLANE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=AVX512VL --check-prefix=AVX512VL-FAST-ALL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=AVX512VL --check-prefix=AVX512VL-FAST-PERLANE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+avx512dq,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=VL_BW_DQ --check-prefix=VL_BW_DQ-FAST-ALL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+avx512dq,+fast-variable-perlane-shuffle | FileCheck %s --check-prefix=VL_BW_DQ --check-prefix=VL_BW_DQ-FAST-PERLANE
define <2 x i1> @shuf2i1_1_0(<2 x i1> %a) {
; AVX512F-LABEL: shuf2i1_1_0:
diff --git a/llvm/test/CodeGen/X86/vector-shuffle-variable-256.ll b/llvm/test/CodeGen/X86/vector-shuffle-variable-256.ll
index 8f78438dedf92..ea2dad376ca37 100644
--- a/llvm/test/CodeGen/X86/vector-shuffle-variable-256.ll
+++ b/llvm/test/CodeGen/X86/vector-shuffle-variable-256.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=ALL,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=ALL,AVX2
;
; Unary shuffle indices from registers
diff --git a/llvm/test/CodeGen/X86/vector-smax-range.ll b/llvm/test/CodeGen/X86/vector-smax-range.ll
index aa15fa25068af..09c57a251b53c 100644
--- a/llvm/test/CodeGen/X86/vector-smax-range.ll
+++ b/llvm/test/CodeGen/X86/vector-smax-range.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE42
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512F
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512VL
define <4 x i32> @smax_v4i32_as_umax_v4i8(<4 x i32> %a0, <4 x i32> %a1) nounwind {
; SSE2-LABEL: smax_v4i32_as_umax_v4i8:
diff --git a/llvm/test/CodeGen/X86/vector-smin-range.ll b/llvm/test/CodeGen/X86/vector-smin-range.ll
index ce68a030fc185..c9d16189cd7a0 100644
--- a/llvm/test/CodeGen/X86/vector-smin-range.ll
+++ b/llvm/test/CodeGen/X86/vector-smin-range.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE42
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512F
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512VL
define <4 x i32> @smin_v4i32_as_umin_v4i8(<4 x i32> %a0, <4 x i32> %a1) nounwind {
; SSE2-LABEL: smin_v4i32_as_umin_v4i8:
diff --git a/llvm/test/CodeGen/X86/vector-sqrt.ll b/llvm/test/CodeGen/X86/vector-sqrt.ll
index 843f099a2e2b0..c140aad261e3c 100644
--- a/llvm/test/CodeGen/X86/vector-sqrt.ll
+++ b/llvm/test/CodeGen/X86/vector-sqrt.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
; Function Attrs: nounwind readonly uwtable
define <2 x double> @sqrtd2(ptr nocapture readonly %v) local_unnamed_addr #0 {
diff --git a/llvm/test/CodeGen/X86/vector-target-demanded-elts.ll b/llvm/test/CodeGen/X86/vector-target-demanded-elts.ll
index dcfc941d9cb55..5d80f701583f6 100644
--- a/llvm/test/CodeGen/X86/vector-target-demanded-elts.ll
+++ b/llvm/test/CodeGen/X86/vector-target-demanded-elts.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s
define <4 x i32> @demanded_low_pmaddwd256_128(<16 x i16> %a0, <16 x i16> %a1) {
; CHECK-LABEL: demanded_low_pmaddwd256_128:
diff --git a/llvm/test/CodeGen/X86/vector-trunc-nowrap.ll b/llvm/test/CodeGen/X86/vector-trunc-nowrap.ll
index a47e6de2a8cef..e2b38498557ac 100644
--- a/llvm/test/CodeGen/X86/vector-trunc-nowrap.ll
+++ b/llvm/test/CodeGen/X86/vector-trunc-nowrap.ll
@@ -1,18 +1,18 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2-SSSE3,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSE2-SSSE3,SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2-SSSE3,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSE2-SSSE3,SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL
define <8 x i32> @trunc8i64_8i32_nsw(<8 x i64> %a) {
; SSE-LABEL: trunc8i64_8i32_nsw:
diff --git a/llvm/test/CodeGen/X86/vector-truncate-combine.ll b/llvm/test/CodeGen/X86/vector-truncate-combine.ll
index 909abda04e165..628820ee095aa 100644
--- a/llvm/test/CodeGen/X86/vector-truncate-combine.ll
+++ b/llvm/test/CodeGen/X86/vector-truncate-combine.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -O2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -O2 | FileCheck %s
; This test verifies the fix for PR33368.
;
diff --git a/llvm/test/CodeGen/X86/vector-tzcnt-128.ll b/llvm/test/CodeGen/X86/vector-tzcnt-128.ll
index ad73bb6886b9f..e68de5c7bcc08 100644
--- a/llvm/test/CodeGen/X86/vector-tzcnt-128.ll
+++ b/llvm/test/CodeGen/X86/vector-tzcnt-128.ll
@@ -1,19 +1,19 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefixes=SSE,SSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512CDVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,-avx512vl | FileCheck %s --check-prefixes=AVX,AVX512CD
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefix=AVX512VPOPCNTDQ
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512vl | FileCheck %s --check-prefix=AVX512VPOPCNTDQVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=BITALG_NOVLX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefix=BITALG
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse3 | FileCheck %s --check-prefixes=SSE,SSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=SSE,SSSE3
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512CDVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512cd,-avx512vl | FileCheck %s --check-prefixes=AVX,AVX512CD
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq | FileCheck %s --check-prefix=AVX512VPOPCNTDQ
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vpopcntdq,+avx512vl | FileCheck %s --check-prefix=AVX512VPOPCNTDQVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg | FileCheck %s --check-prefix=BITALG_NOVLX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bitalg,+avx512vl | FileCheck %s --check-prefix=BITALG
;
; Just one 32-bit run to make sure we do reasonable things for i64 tzcnt.
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X86-SSE
define <2 x i64> @testv2i64(<2 x i64> %in) nounwind {
; SSE2-LABEL: testv2i64:
diff --git a/llvm/test/CodeGen/X86/vector-umax-range.ll b/llvm/test/CodeGen/X86/vector-umax-range.ll
index a0ff1de55fc3d..3e5dec87a5d6f 100644
--- a/llvm/test/CodeGen/X86/vector-umax-range.ll
+++ b/llvm/test/CodeGen/X86/vector-umax-range.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE42
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512F
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512VL
define <8 x i16> @umax_v8i16_as_umax_v8i8(<8 x i16> %a0, <8 x i16> %a1) nounwind {
; SSE2-LABEL: umax_v8i16_as_umax_v8i8:
diff --git a/llvm/test/CodeGen/X86/vector-umin-range.ll b/llvm/test/CodeGen/X86/vector-umin-range.ll
index 0cf816cc35449..e09a4915771d0 100644
--- a/llvm/test/CodeGen/X86/vector-umin-range.ll
+++ b/llvm/test/CodeGen/X86/vector-umin-range.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE42
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512F
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512VL
define <8 x i16> @umin_v8i16_as_umin_v8i8(<8 x i16> %a0, <8 x i16> %a1) nounwind {
; SSE2-LABEL: umin_v8i16_as_umin_v8i8:
diff --git a/llvm/test/CodeGen/X86/vector-variable-idx.ll b/llvm/test/CodeGen/X86/vector-variable-idx.ll
index 091b553a895fe..a8a30de3f0f60 100644
--- a/llvm/test/CodeGen/X86/vector-variable-idx.ll
+++ b/llvm/test/CodeGen/X86/vector-variable-idx.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; PR2676
define float @foo(<4 x float> %p, i32 %t) {
diff --git a/llvm/test/CodeGen/X86/vector-variable-idx2.ll b/llvm/test/CodeGen/X86/vector-variable-idx2.ll
index 50b2d6b06fbd6..a139fac98d694 100644
--- a/llvm/test/CodeGen/X86/vector-variable-idx2.ll
+++ b/llvm/test/CodeGen/X86/vector-variable-idx2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mattr=+sse4.1
+; RUN: llc -combiner-topological-sorting < %s -mattr=+sse4.1
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
target triple = "x86_64-apple-darwin11.0.0"
diff --git a/llvm/test/CodeGen/X86/vector-width-store-merge.ll b/llvm/test/CodeGen/X86/vector-width-store-merge.ll
index 9363348f83443..b02105bf39fde 100644
--- a/llvm/test/CodeGen/X86/vector-width-store-merge.ll
+++ b/llvm/test/CodeGen/X86/vector-width-store-merge.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=skylake| FileCheck %s --check-prefixes=CHECK,PREFER256
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=sandybridge| FileCheck %s --check-prefixes=CHECK,LIGHT256
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver1| FileCheck %s --check-prefixes=CHECK,PREFER256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=skylake| FileCheck %s --check-prefixes=CHECK,PREFER256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mcpu=sandybridge| FileCheck %s --check-prefixes=CHECK,LIGHT256
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver1| FileCheck %s --check-prefixes=CHECK,PREFER256
; This tests whether or not we generate vectors large than preferred vector width when
; lowering memmove.
diff --git a/llvm/test/CodeGen/X86/vector-zmov.ll b/llvm/test/CodeGen/X86/vector-zmov.ll
index 9d84ff8c01ab4..c8517387c66a8 100644
--- a/llvm/test/CodeGen/X86/vector-zmov.ll
+++ b/llvm/test/CodeGen/X86/vector-zmov.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
define <4 x i32> @load_zmov_4i32_to_0zzz(ptr%ptr) {
; SSE-LABEL: load_zmov_4i32_to_0zzz:
diff --git a/llvm/test/CodeGen/X86/vector.ll b/llvm/test/CodeGen/X86/vector.ll
index 97de813fbaf37..0414ec6d6348a 100644
--- a/llvm/test/CodeGen/X86/vector.ll
+++ b/llvm/test/CodeGen/X86/vector.ll
@@ -1,6 +1,6 @@
; Test that vectors are scalarized/lowered correctly.
-; RUN: llc < %s -mtriple=i686-- -mcpu=i386
-; RUN: llc < %s -mtriple=i686-- -mcpu=yonah
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=i386
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=yonah
%d8 = type <8 x double>
%f1 = type <1 x float>
diff --git a/llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll b/llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll
index fb46f6205ab4e..1e771a92a0bf5 100644
--- a/llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll
+++ b/llvm/test/CodeGen/X86/vector_splat-const-shift-of-constmasked.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE2
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2,+avx | FileCheck %s --check-prefixes=X86-AVX,X86-AVX1
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2,+avx,+avx2 | FileCheck %s --check-prefixes=X86-AVX,X86-AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+avx | FileCheck %s --check-prefixes=X64-AVX,X64-AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+avx,+avx2 | FileCheck %s --check-prefixes=X64-AVX,X64-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2,+avx | FileCheck %s --check-prefixes=X86-AVX,X86-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2,+avx,+avx2 | FileCheck %s --check-prefixes=X86-AVX,X86-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=X64-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2,+avx | FileCheck %s --check-prefixes=X64-AVX,X64-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2,+avx,+avx2 | FileCheck %s --check-prefixes=X64-AVX,X64-AVX2
; The mask is all-ones, potentially shifted.
diff --git a/llvm/test/CodeGen/X86/vectorcall.ll b/llvm/test/CodeGen/X86/vectorcall.ll
index 9a7d002fc3178..6451d93ef3e13 100644
--- a/llvm/test/CodeGen/X86/vectorcall.ll
+++ b/llvm/test/CodeGen/X86/vectorcall.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i686-pc-win32 -mattr=+sse2 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=X86
-; RUN: llc -mtriple=x86_64-pc-win32 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-pc-win32 -mattr=+sse2 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-win32 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=X64
; Test integer arguments.
diff --git a/llvm/test/CodeGen/X86/vectorization-remarks-loopid-dbg.ll b/llvm/test/CodeGen/X86/vectorization-remarks-loopid-dbg.ll
index 31949403b4465..cdf3d4bf3d548 100644
--- a/llvm/test/CodeGen/X86/vectorization-remarks-loopid-dbg.ll
+++ b/llvm/test/CodeGen/X86/vectorization-remarks-loopid-dbg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple x86_64-pc-linux-gnu -o - | FileCheck -check-prefix=DEBUG-OUTPUT %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple x86_64-pc-linux-gnu -o - | FileCheck -check-prefix=DEBUG-OUTPUT %s
; DEBUG-OUTPUT-NOT: .loc
; DEBUG-OUTPUT-NOT: {{.*}}.debug_info
diff --git a/llvm/test/CodeGen/X86/version_directive.ll b/llvm/test/CodeGen/X86/version_directive.ll
index ac5eda71dbc68..1558834a54db6 100644
--- a/llvm/test/CodeGen/X86/version_directive.ll
+++ b/llvm/test/CodeGen/X86/version_directive.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple x86_64-apple-darwin15.0.0 -o - /dev/null | FileCheck %s
-; RUN: llc -mtriple x86_64-apple-macosx10.11.0 -o - /dev/null | FileCheck %s
-; RUN: llc -mtriple x86_64-apple-macos10.11.0 -o - /dev/null | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-darwin15.0.0 -o - /dev/null | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-macosx10.11.0 -o - /dev/null | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-macos10.11.0 -o - /dev/null | FileCheck %s
; CHECK: .macosx_version_min 10, 11
diff --git a/llvm/test/CodeGen/X86/vfcmp.ll b/llvm/test/CodeGen/X86/vfcmp.ll
index 34b6f0cc78ba5..17632e4c5e2d3 100644
--- a/llvm/test/CodeGen/X86/vfcmp.ll
+++ b/llvm/test/CodeGen/X86/vfcmp.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2
; PR2620
diff --git a/llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll b/llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll
index 549c9642ff134..9aa00e68ec698 100644
--- a/llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll
+++ b/llvm/test/CodeGen/X86/virtual-registers-cleared-in-machine-functions-liveins.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown -o - -stop-after machine-scheduler %s | FileCheck %s --check-prefix=PRE-RA
-; RUN: llc -mtriple=x86_64-unknown-unknown -o - -stop-after prologepilog %s | FileCheck %s --check-prefix=POST-RA
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -o - -stop-after machine-scheduler %s | FileCheck %s --check-prefix=PRE-RA
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -o - -stop-after prologepilog %s | FileCheck %s --check-prefix=POST-RA
; This test verifies that the virtual register references in machine function's
; liveins are cleared after register allocation.
diff --git a/llvm/test/CodeGen/X86/visibility.ll b/llvm/test/CodeGen/X86/visibility.ll
index be7b3aff76c05..49b1b85912cf9 100644
--- a/llvm/test/CodeGen/X86/visibility.ll
+++ b/llvm/test/CodeGen/X86/visibility.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu %s -o - | FileCheck %s
@zed = external hidden constant i32
diff --git a/llvm/test/CodeGen/X86/visibility2.ll b/llvm/test/CodeGen/X86/visibility2.ll
index 6a403b0b1ba57..db5ca91db62bc 100644
--- a/llvm/test/CodeGen/X86/visibility2.ll
+++ b/llvm/test/CodeGen/X86/visibility2.ll
@@ -2,7 +2,7 @@
; emitted they are not treated as definitions. Test case for r132825.
; Fixes <rdar://problem/9429892>.
;
-; RUN: llc -mtriple=x86_64-apple-darwin %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin %s -o - | FileCheck %s
@foo_private_extern_str = external hidden global ptr
diff --git a/llvm/test/CodeGen/X86/vmaskmov-offset.ll b/llvm/test/CodeGen/X86/vmaskmov-offset.ll
index 73813c0106e09..5eda73c8e425c 100644
--- a/llvm/test/CodeGen/X86/vmaskmov-offset.ll
+++ b/llvm/test/CodeGen/X86/vmaskmov-offset.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 -stop-after finalize-isel -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mcpu=core-avx2 -stop-after finalize-isel -o - %s | FileCheck %s
declare void @llvm.masked.store.v16f32.p0(<16 x float>, ptr, i32, <16 x i1>)
declare <16 x float> @llvm.masked.load.v16f32.p0(ptr, i32, <16 x i1>, <16 x float>)
diff --git a/llvm/test/CodeGen/X86/vmovq.ll b/llvm/test/CodeGen/X86/vmovq.ll
index a7ad7f3facf19..f0636f8690c92 100644
--- a/llvm/test/CodeGen/X86/vmovq.ll
+++ b/llvm/test/CodeGen/X86/vmovq.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.1 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
define <2 x i64> @PR25554(<2 x i64> %v0, <2 x i64> %v1) {
; SSE-LABEL: PR25554:
diff --git a/llvm/test/CodeGen/X86/volatile-memstores-nooverlapping-load-stores.ll b/llvm/test/CodeGen/X86/volatile-memstores-nooverlapping-load-stores.ll
index bb1a9500a4c94..ff201e2b8e5af 100644
--- a/llvm/test/CodeGen/X86/volatile-memstores-nooverlapping-load-stores.ll
+++ b/llvm/test/CodeGen/X86/volatile-memstores-nooverlapping-load-stores.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1 immarg) #1
diff --git a/llvm/test/CodeGen/X86/volatile.ll b/llvm/test/CodeGen/X86/volatile.ll
index 4a750e62c86ef..5bcd3c83d102d 100644
--- a/llvm/test/CodeGen/X86/volatile.ll
+++ b/llvm/test/CodeGen/X86/volatile.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=sse2 | FileCheck %s --check-prefixes=ALL,OPT
-; RUN: llc < %s -mtriple=i686-- -mattr=sse2 -O0 | FileCheck %s --check-prefixes=ALL,NOOPT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=sse2 | FileCheck %s --check-prefixes=ALL,OPT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=sse2 -O0 | FileCheck %s --check-prefixes=ALL,NOOPT
@x = external dso_local global double
diff --git a/llvm/test/CodeGen/X86/vortex-bug.ll b/llvm/test/CodeGen/X86/vortex-bug.ll
index c2c45c2aadf5f..22ef0f455bcde 100644
--- a/llvm/test/CodeGen/X86/vortex-bug.ll
+++ b/llvm/test/CodeGen/X86/vortex-bug.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
%struct.blktkntype = type { i32, i32 }
%struct.fieldstruc = type { [128 x i8], ptr, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/vp2intersect_multiple_pairs.ll b/llvm/test/CodeGen/X86/vp2intersect_multiple_pairs.ll
index 9f2f1d57c2dbc..cf6a9467ebe45 100644
--- a/llvm/test/CodeGen/X86/vp2intersect_multiple_pairs.ll
+++ b/llvm/test/CodeGen/X86/vp2intersect_multiple_pairs.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx512vp2intersect -verify-machineinstrs | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vp2intersect -verify-machineinstrs | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx512vp2intersect -verify-machineinstrs | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vp2intersect -verify-machineinstrs | FileCheck %s --check-prefix=X64
; Test with more than four live mask pairs
diff --git a/llvm/test/CodeGen/X86/vpshufbitqbm-intrinsics-upgrade.ll b/llvm/test/CodeGen/X86/vpshufbitqbm-intrinsics-upgrade.ll
index d06d8a95a31af..fbe74fa4f0e80 100644
--- a/llvm/test/CodeGen/X86/vpshufbitqbm-intrinsics-upgrade.ll
+++ b/llvm/test/CodeGen/X86/vpshufbitqbm-intrinsics-upgrade.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512bitalg,+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512bitalg,+avx512vl | FileCheck %s
declare i16 @llvm.x86.avx512.mask.vpshufbitqmb.128(<16 x i8> %a, <16 x i8> %b, i16 %mask)
define i16 @test_vpshufbitqmb_128(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, <16 x i8> %d) {
diff --git a/llvm/test/CodeGen/X86/vpshufbitqbm-intrinsics.ll b/llvm/test/CodeGen/X86/vpshufbitqbm-intrinsics.ll
index f83f2df0c35a7..c0f1670a76537 100644
--- a/llvm/test/CodeGen/X86/vpshufbitqbm-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/vpshufbitqbm-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx512bitalg,+avx512vl | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+avx512bitalg,+avx512vl | FileCheck %s
define i16 @test_vpshufbitqmb_128(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, <16 x i8> %d) {
; CHECK-LABEL: test_vpshufbitqmb_128:
diff --git a/llvm/test/CodeGen/X86/vpternlog.ll b/llvm/test/CodeGen/X86/vpternlog.ll
index bd7478d3a82d5..f668a0cd8486c 100644
--- a/llvm/test/CodeGen/X86/vpternlog.ll
+++ b/llvm/test/CodeGen/X86/vpternlog.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK
define <8 x i64> @foo(<8 x i64> %a, <8 x i64> %b, <8 x i64> %c) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/vsel-cmp-load.ll b/llvm/test/CodeGen/X86/vsel-cmp-load.ll
index bec0b60d95e82..763fae9745c97 100644
--- a/llvm/test/CodeGen/X86/vsel-cmp-load.ll
+++ b/llvm/test/CodeGen/X86/vsel-cmp-load.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw,avx512vl,avx512f | FileCheck %s --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw,avx512vl,avx512f | FileCheck %s --check-prefix=AVX512
; PR37427 - https://bugs.llvm.org/show_bug.cgi?id=37427
diff --git a/llvm/test/CodeGen/X86/vselect-2.ll b/llvm/test/CodeGen/X86/vselect-2.ll
index 429ae88fe6d6f..a225d15e750d7 100644
--- a/llvm/test/CodeGen/X86/vselect-2.ll
+++ b/llvm/test/CodeGen/X86/vselect-2.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX
define <4 x i32> @test1(<4 x i32> %A, <4 x i32> %B) {
; SSE2-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/vselect-avx512.ll b/llvm/test/CodeGen/X86/vselect-avx512.ll
index cd59562b2125a..f64e1180323e5 100644
--- a/llvm/test/CodeGen/X86/vselect-avx512.ll
+++ b/llvm/test/CodeGen/X86/vselect-avx512.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK
; Try to ensure that vselect folds into any previous instruction.
; Shuffle lowering can widen the select mask preventing it being used as a predicate mask move.
diff --git a/llvm/test/CodeGen/X86/vselect-constants.ll b/llvm/test/CodeGen/X86/vselect-constants.ll
index 34bda718db8f6..cf17b8f38dd91 100644
--- a/llvm/test/CodeGen/X86/vselect-constants.ll
+++ b/llvm/test/CodeGen/X86/vselect-constants.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=sse2 | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=avx | FileCheck %s --check-prefix=AVX
; First, check the generic pattern for any 2 vector constants. Then, check special cases where
; the constants are all off-by-one. Finally, check the extra special cases where the constants
diff --git a/llvm/test/CodeGen/X86/vselect-minmax.ll b/llvm/test/CodeGen/X86/vselect-minmax.ll
index cb0542ca7cea8..77148627cc76c 100644
--- a/llvm/test/CodeGen/X86/vselect-minmax.ll
+++ b/llvm/test/CodeGen/X86/vselect-minmax.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE4
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE4
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=skx | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
define <16 x i8> @test1(<16 x i8> %a, <16 x i8> %b) {
; SSE2-LABEL: test1:
diff --git a/llvm/test/CodeGen/X86/vselect-packss.ll b/llvm/test/CodeGen/X86/vselect-packss.ll
index 5b14e2782ee1c..fb88669b3fd26 100644
--- a/llvm/test/CodeGen/X86/vselect-packss.ll
+++ b/llvm/test/CodeGen/X86/vselect-packss.ll
@@ -1,12 +1,12 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512BWNOVL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512BWVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512BWNOVL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512BWVL
;
; General cases - packing of vector comparison to legal vector result types
diff --git a/llvm/test/CodeGen/X86/vselect-post-combine.ll b/llvm/test/CodeGen/X86/vselect-post-combine.ll
index ba51e1fc90c14..3e3b1702cb4d8 100644
--- a/llvm/test/CodeGen/X86/vselect-post-combine.ll
+++ b/llvm/test/CodeGen/X86/vselect-post-combine.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX2
define ptr @test_mul(ptr %addr) {
; AVX2-LABEL: test_mul:
diff --git a/llvm/test/CodeGen/X86/vselect-zero.ll b/llvm/test/CodeGen/X86/vselect-zero.ll
index b3bb01137c70d..0a3a45828d6e2 100644
--- a/llvm/test/CodeGen/X86/vselect-zero.ll
+++ b/llvm/test/CodeGen/X86/vselect-zero.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512DQBW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512DQBW
; PR28925
diff --git a/llvm/test/CodeGen/X86/vshift-1.ll b/llvm/test/CodeGen/X86/vshift-1.ll
index d481690d9f2b8..cf2260b54f493 100644
--- a/llvm/test/CodeGen/X86/vshift-1.ll
+++ b/llvm/test/CodeGen/X86/vshift-1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
; test vector shifts converted to proper SSE2 vector shifts when the shift
; amounts are the same.
diff --git a/llvm/test/CodeGen/X86/vshift-2.ll b/llvm/test/CodeGen/X86/vshift-2.ll
index d4f8b02cd0c52..ddb82500db681 100644
--- a/llvm/test/CodeGen/X86/vshift-2.ll
+++ b/llvm/test/CodeGen/X86/vshift-2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
; test vector shifts converted to proper SSE2 vector shifts when the shift
; amounts are the same.
diff --git a/llvm/test/CodeGen/X86/vshift-3.ll b/llvm/test/CodeGen/X86/vshift-3.ll
index 8d472f00b488e..585788089c30f 100644
--- a/llvm/test/CodeGen/X86/vshift-3.ll
+++ b/llvm/test/CodeGen/X86/vshift-3.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
; test vector shifts converted to proper SSE2 vector shifts when the shift
; amounts are the same.
diff --git a/llvm/test/CodeGen/X86/vshift-4.ll b/llvm/test/CodeGen/X86/vshift-4.ll
index 9af761c5dc15a..714474689ccb8 100644
--- a/llvm/test/CodeGen/X86/vshift-4.ll
+++ b/llvm/test/CodeGen/X86/vshift-4.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
; test vector shifts converted to proper SSE2 vector shifts when the shift
; amounts are the same when using a shuffle splat.
diff --git a/llvm/test/CodeGen/X86/vshift-5.ll b/llvm/test/CodeGen/X86/vshift-5.ll
index e3f695453b5b9..e0c6016bc64b3 100644
--- a/llvm/test/CodeGen/X86/vshift-5.ll
+++ b/llvm/test/CodeGen/X86/vshift-5.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
; When loading the shift amount from memory, avoid generating the splat.
diff --git a/llvm/test/CodeGen/X86/vshift-6.ll b/llvm/test/CodeGen/X86/vshift-6.ll
index 912ff750d9e91..425d09832fb69 100644
--- a/llvm/test/CodeGen/X86/vshift-6.ll
+++ b/llvm/test/CodeGen/X86/vshift-6.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
; This test makes sure that the compiler does not crash with an
; assertion failure when trying to fold a vector shift left
diff --git a/llvm/test/CodeGen/X86/vshift_scalar.ll b/llvm/test/CodeGen/X86/vshift_scalar.ll
index fe19259bfaf5c..c160b4e2f3681 100644
--- a/llvm/test/CodeGen/X86/vshift_scalar.ll
+++ b/llvm/test/CodeGen/X86/vshift_scalar.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; REQUIRES: default_triple
; Legalization test that requires scalarizing a vector.
diff --git a/llvm/test/CodeGen/X86/vshift_split.ll b/llvm/test/CodeGen/X86/vshift_split.ll
index 425da14637737..61de06a8f59f2 100644
--- a/llvm/test/CodeGen/X86/vshift_split.ll
+++ b/llvm/test/CodeGen/X86/vshift_split.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s
; Example that requires splitting and expanding a vector shift.
define <2 x i64> @update(<2 x i64> %val) nounwind readnone {
diff --git a/llvm/test/CodeGen/X86/vshift_split2.ll b/llvm/test/CodeGen/X86/vshift_split2.ll
index 8ac97afb051f4..845e66aa1f5ec 100644
--- a/llvm/test/CodeGen/X86/vshift_split2.ll
+++ b/llvm/test/CodeGen/X86/vshift_split2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mcpu=yonah | FileCheck %s
; Legalization example that requires splitting a large vector into smaller pieces.
diff --git a/llvm/test/CodeGen/X86/vshli-simplify-demanded-bits.ll b/llvm/test/CodeGen/X86/vshli-simplify-demanded-bits.ll
index 6007c4f0b0231..03d613289dc79 100644
--- a/llvm/test/CodeGen/X86/vshli-simplify-demanded-bits.ll
+++ b/llvm/test/CodeGen/X86/vshli-simplify-demanded-bits.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
; A combine forming X86ISD::VSHLI was missing a test and not using
; TargetConstant for the RHS operand.
diff --git a/llvm/test/CodeGen/X86/vsplit-and.ll b/llvm/test/CodeGen/X86/vsplit-and.ll
index 833db0efbda89..e36a143dbea97 100644
--- a/llvm/test/CodeGen/X86/vsplit-and.ll
+++ b/llvm/test/CodeGen/X86/vsplit-and.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mcpu=penryn | FileCheck %s
define void @t0(ptr %dst, <2 x i64> %src1, <2 x i64> %src2) nounwind readonly {
; CHECK-LABEL: t0:
diff --git a/llvm/test/CodeGen/X86/vzero-excess.ll b/llvm/test/CodeGen/X86/vzero-excess.ll
index 883613a1ef303..5cf97e8ad3423 100644
--- a/llvm/test/CodeGen/X86/vzero-excess.ll
+++ b/llvm/test/CodeGen/X86/vzero-excess.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
; In the following 4 tests, the existing call to VZU/VZA ensures clean state before
; the call to the unknown, so we don't need to insert a second VZU at that point.
diff --git a/llvm/test/CodeGen/X86/waitpkg-intrinsics.ll b/llvm/test/CodeGen/X86/waitpkg-intrinsics.ll
index 86cb48fe119df..ba15432b75795 100644
--- a/llvm/test/CodeGen/X86/waitpkg-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/waitpkg-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+waitpkg | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=i386-pc-linux -mattr=+waitpkg | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+waitpkg | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux -mattr=+waitpkg | FileCheck %s --check-prefix=X32
define void @test_umonitor(ptr %address) {
; X64-LABEL: test_umonitor:
diff --git a/llvm/test/CodeGen/X86/warn-stack.ll b/llvm/test/CodeGen/X86/warn-stack.ll
index 5558683c870ab..f07a9284c1932 100644
--- a/llvm/test/CodeGen/X86/warn-stack.ll
+++ b/llvm/test/CodeGen/X86/warn-stack.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-apple-macosx10.8.0 < %s 2>&1 >/dev/null | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-apple-macosx10.8.0 < %s 2>&1 >/dev/null | FileCheck %s
; Check the internal option that warns when the stack frame size exceeds the
; given amount.
; <rdar://13987214>
diff --git a/llvm/test/CodeGen/X86/wbinvd-intrinsic.ll b/llvm/test/CodeGen/X86/wbinvd-intrinsic.ll
index 0bf28deffa711..f39af271d8ebf 100644
--- a/llvm/test/CodeGen/X86/wbinvd-intrinsic.ll
+++ b/llvm/test/CodeGen/X86/wbinvd-intrinsic.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=i686
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=x86_64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=i686
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=x86_64
define void @test_wbinvd() {
; i686-LABEL: test_wbinvd:
diff --git a/llvm/test/CodeGen/X86/wbnoinvd-intrinsic.ll b/llvm/test/CodeGen/X86/wbnoinvd-intrinsic.ll
index a8c17f4509ede..d788b5c330ac5 100644
--- a/llvm/test/CodeGen/X86/wbnoinvd-intrinsic.ll
+++ b/llvm/test/CodeGen/X86/wbnoinvd-intrinsic.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+wbnoinvd | FileCheck %s -check-prefix=CHECK32
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+wbnoinvd | FileCheck %s -check-prefix=CHECK64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+wbnoinvd | FileCheck %s -check-prefix=CHECK32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+wbnoinvd | FileCheck %s -check-prefix=CHECK64
define void @wbnoinvd() nounwind {
; CHECK32-LABEL: wbnoinvd:
diff --git a/llvm/test/CodeGen/X86/weak-undef.ll b/llvm/test/CodeGen/X86/weak-undef.ll
index 56a30a80b9a7d..91e2ae8d7865a 100644
--- a/llvm/test/CodeGen/X86/weak-undef.ll
+++ b/llvm/test/CodeGen/X86/weak-undef.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -relocation-model=pic -mtriple=x86_64-pc-linux | FileCheck %s
-; RUN: llc < %s -relocation-model=pic -mtriple=i386-pc-linux | FileCheck --check-prefix=I386 %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -mtriple=x86_64-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -mtriple=i386-pc-linux | FileCheck --check-prefix=I386 %s
@foo1 = extern_weak hidden global i32, align 4
define ptr @bar1() {
diff --git a/llvm/test/CodeGen/X86/weak.ll b/llvm/test/CodeGen/X86/weak.ll
index d2698aabe3a6e..0db8ce46371fc 100644
--- a/llvm/test/CodeGen/X86/weak.ll
+++ b/llvm/test/CodeGen/X86/weak.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=i686--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686--
@a = extern_weak global i32 ; <ptr> [#uses=1]
@b = global ptr @a ; <ptr> [#uses=0]
diff --git a/llvm/test/CodeGen/X86/weak_def_can_be_hidden.ll b/llvm/test/CodeGen/X86/weak_def_can_be_hidden.ll
index 60054d98e7983..af595cbf6ab3a 100644
--- a/llvm/test/CodeGen/X86/weak_def_can_be_hidden.ll
+++ b/llvm/test/CodeGen/X86/weak_def_can_be_hidden.ll
@@ -1,8 +1,8 @@
-; RUN: llc -mtriple=x86_64-apple-darwin11 -O0 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-apple-darwin10 -O0 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-apple-darwin9 -O0 < %s | FileCheck --check-prefix=CHECK-D89 %s
-; RUN: llc -mtriple=i686-apple-darwin9 -O0 < %s | FileCheck --check-prefix=CHECK-D89 %s
-; RUN: llc -mtriple=i686-apple-darwin8 -O0 < %s | FileCheck --check-prefix=CHECK-D89 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin11 -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin10 -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin9 -O0 < %s | FileCheck --check-prefix=CHECK-D89 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-apple-darwin9 -O0 < %s | FileCheck --check-prefix=CHECK-D89 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-apple-darwin8 -O0 < %s | FileCheck --check-prefix=CHECK-D89 %s
@v1 = linkonce_odr local_unnamed_addr constant i32 32
; CHECK: .globl _v1
diff --git a/llvm/test/CodeGen/X86/wide-fma-contraction.ll b/llvm/test/CodeGen/X86/wide-fma-contraction.ll
index eba8d28751592..f95fb0c3798e8 100644
--- a/llvm/test/CodeGen/X86/wide-fma-contraction.ll
+++ b/llvm/test/CodeGen/X86/wide-fma-contraction.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mcpu=bdver2 -mattr=-fma -mtriple=i686-apple-darwin < %s | FileCheck %s
-; RUN: llc -mcpu=bdver2 -mattr=-fma,-fma4 -mtriple=i686-apple-darwin < %s | FileCheck %s --check-prefix=CHECK-NOFMA
+; RUN: llc -combiner-topological-sorting -mcpu=bdver2 -mattr=-fma -mtriple=i686-apple-darwin < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=bdver2 -mattr=-fma,-fma4 -mtriple=i686-apple-darwin < %s | FileCheck %s --check-prefix=CHECK-NOFMA
; CHECK-LABEL: fmafunc
; CHECK-NOFMA-LABEL: fmafunc
diff --git a/llvm/test/CodeGen/X86/wide-integer-cmp.ll b/llvm/test/CodeGen/X86/wide-integer-cmp.ll
index 12dccca76eb19..57c3f6777e2a3 100644
--- a/llvm/test/CodeGen/X86/wide-integer-cmp.ll
+++ b/llvm/test/CodeGen/X86/wide-integer-cmp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-linux-gnu %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-linux-gnu %s -o - | FileCheck %s
define i32 @branch_eq(i64 %a, i64 %b) {
; CHECK-LABEL: branch_eq:
diff --git a/llvm/test/CodeGen/X86/wide-integer-fold.ll b/llvm/test/CodeGen/X86/wide-integer-fold.ll
index d4da64e7b0683..38eb9c2646b47 100644
--- a/llvm/test/CodeGen/X86/wide-integer-fold.ll
+++ b/llvm/test/CodeGen/X86/wide-integer-fold.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
; CHECK: movq $-65535, %rax
; DAGCombiner should fold this to a simple constant.
diff --git a/llvm/test/CodeGen/X86/widen_arith-1.ll b/llvm/test/CodeGen/X86/widen_arith-1.ll
index e08df8f76d1a6..9a89a7231c1be 100644
--- a/llvm/test/CodeGen/X86/widen_arith-1.ll
+++ b/llvm/test/CodeGen/X86/widen_arith-1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s
define void @update(ptr %dst, ptr %src, i32 %n) nounwind {
; CHECK-LABEL: update:
diff --git a/llvm/test/CodeGen/X86/widen_arith-2.ll b/llvm/test/CodeGen/X86/widen_arith-2.ll
index 260b87cc461a9..e226c5a2e939a 100644
--- a/llvm/test/CodeGen/X86/widen_arith-2.ll
+++ b/llvm/test/CodeGen/X86/widen_arith-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s
; widen v8i8 to v16i8 (checks even power of 2 widening with add & and)
diff --git a/llvm/test/CodeGen/X86/widen_arith-3.ll b/llvm/test/CodeGen/X86/widen_arith-3.ll
index 9031588f2690d..a3cf05491ecf3 100644
--- a/llvm/test/CodeGen/X86/widen_arith-3.ll
+++ b/llvm/test/CodeGen/X86/widen_arith-3.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 -post-RA-scheduler=true | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 -post-RA-scheduler=true | FileCheck %s
; Widen a v3i16 to v8i16 to do a vector add
diff --git a/llvm/test/CodeGen/X86/widen_arith-4.ll b/llvm/test/CodeGen/X86/widen_arith-4.ll
index ea6bf66fd2923..11a476950f469 100644
--- a/llvm/test/CodeGen/X86/widen_arith-4.ll
+++ b/llvm/test/CodeGen/X86/widen_arith-4.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE41
; Widen a v5i16 to v8i16 to do a vector sub and multiple
diff --git a/llvm/test/CodeGen/X86/widen_arith-5.ll b/llvm/test/CodeGen/X86/widen_arith-5.ll
index 466249d1bf1d4..01f9964287863 100644
--- a/llvm/test/CodeGen/X86/widen_arith-5.ll
+++ b/llvm/test/CodeGen/X86/widen_arith-5.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s
; widen a v3i32 to v4i32 to do a vector multiple and a subtraction
diff --git a/llvm/test/CodeGen/X86/widen_arith-6.ll b/llvm/test/CodeGen/X86/widen_arith-6.ll
index 6fa232f4d3227..292b0f219b435 100644
--- a/llvm/test/CodeGen/X86/widen_arith-6.ll
+++ b/llvm/test/CodeGen/X86/widen_arith-6.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s
; widen a v3f32 to vfi32 to do a vector multiple and an add
diff --git a/llvm/test/CodeGen/X86/widen_bitcnt.ll b/llvm/test/CodeGen/X86/widen_bitcnt.ll
index 56001468898e4..3f1b79af5f034 100644
--- a/llvm/test/CodeGen/X86/widen_bitcnt.ll
+++ b/llvm/test/CodeGen/X86/widen_bitcnt.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512cd,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512cd,+avx512vl,+avx512vpopcntdq | FileCheck %s --check-prefixes=AVX512,AVX512VPOPCNT
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512cd,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512cd,+avx512vl,+avx512vpopcntdq | FileCheck %s --check-prefixes=AVX512,AVX512VPOPCNT
;
; CTPOP
diff --git a/llvm/test/CodeGen/X86/widen_bitops-0.ll b/llvm/test/CodeGen/X86/widen_bitops-0.ll
index 7d91502694ce4..9c89435ce906a 100644
--- a/llvm/test/CodeGen/X86/widen_bitops-0.ll
+++ b/llvm/test/CodeGen/X86/widen_bitops-0.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
;
; AND/XOR/OR i24 as v3i8
diff --git a/llvm/test/CodeGen/X86/widen_cast-1.ll b/llvm/test/CodeGen/X86/widen_cast-1.ll
index 566dde0ca13d3..e5ec8a3e85b24 100644
--- a/llvm/test/CodeGen/X86/widen_cast-1.ll
+++ b/llvm/test/CodeGen/X86/widen_cast-1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=i686-unknown-unknown -mattr=+sse4.2 < %s | FileCheck %s
-; RUN: llc -mtriple=i686-unknown-unknown -mcpu=atom < %s | FileCheck -check-prefix=ATOM %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown -mattr=+sse4.2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown -mcpu=atom < %s | FileCheck -check-prefix=ATOM %s
; Scheduler causes produce a different instruction order
diff --git a/llvm/test/CodeGen/X86/widen_cast-3.ll b/llvm/test/CodeGen/X86/widen_cast-3.ll
index badf8c3ed2ecf..2e42159cfe6d6 100644
--- a/llvm/test/CodeGen/X86/widen_cast-3.ll
+++ b/llvm/test/CodeGen/X86/widen_cast-3.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
; bitcast v12i8 to v3i32
diff --git a/llvm/test/CodeGen/X86/widen_cast-4.ll b/llvm/test/CodeGen/X86/widen_cast-4.ll
index 7468e229e3a84..69d8107f5440f 100644
--- a/llvm/test/CodeGen/X86/widen_cast-4.ll
+++ b/llvm/test/CodeGen/X86/widen_cast-4.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=WIDE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=WIDE
; FIXME: We shouldn't require both a movd and an insert in the wide version.
diff --git a/llvm/test/CodeGen/X86/widen_cast-5.ll b/llvm/test/CodeGen/X86/widen_cast-5.ll
index ed2e9d818f259..21ff0ea88743f 100644
--- a/llvm/test/CodeGen/X86/widen_cast-5.ll
+++ b/llvm/test/CodeGen/X86/widen_cast-5.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
; bitcast a i64 to v2i32
diff --git a/llvm/test/CodeGen/X86/widen_cast-6.ll b/llvm/test/CodeGen/X86/widen_cast-6.ll
index 14e62e1e5f46c..2869512aa3283 100644
--- a/llvm/test/CodeGen/X86/widen_cast-6.ll
+++ b/llvm/test/CodeGen/X86/widen_cast-6.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
; Test bit convert that requires widening in the operand.
diff --git a/llvm/test/CodeGen/X86/widen_compare-1.ll b/llvm/test/CodeGen/X86/widen_compare-1.ll
index 6daa33c200b90..662b064c08f8e 100644
--- a/llvm/test/CodeGen/X86/widen_compare-1.ll
+++ b/llvm/test/CodeGen/X86/widen_compare-1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
; compare v2i16
diff --git a/llvm/test/CodeGen/X86/widen_conv-1.ll b/llvm/test/CodeGen/X86/widen_conv-1.ll
index 2b37697d414b7..aad5a6bacf0f9 100644
--- a/llvm/test/CodeGen/X86/widen_conv-1.ll
+++ b/llvm/test/CodeGen/X86/widen_conv-1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
; truncate v2i64 to v2i32
diff --git a/llvm/test/CodeGen/X86/widen_conv-2.ll b/llvm/test/CodeGen/X86/widen_conv-2.ll
index 71f00ffa5645a..371c413526f23 100644
--- a/llvm/test/CodeGen/X86/widen_conv-2.ll
+++ b/llvm/test/CodeGen/X86/widen_conv-2.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
; sign extension v2i16 to v2i32
diff --git a/llvm/test/CodeGen/X86/widen_conv-3.ll b/llvm/test/CodeGen/X86/widen_conv-3.ll
index f9b588b8b8915..666c91dfb097c 100644
--- a/llvm/test/CodeGen/X86/widen_conv-3.ll
+++ b/llvm/test/CodeGen/X86/widen_conv-3.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE2
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86-SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64-SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86-SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64-SSE42
; sign to float v2i16 to v2f32
diff --git a/llvm/test/CodeGen/X86/widen_conv-4.ll b/llvm/test/CodeGen/X86/widen_conv-4.ll
index d4555207d5559..cdc91a769bf73 100644
--- a/llvm/test/CodeGen/X86/widen_conv-4.ll
+++ b/llvm/test/CodeGen/X86/widen_conv-4.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE2
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86-SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64-SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86-SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64-SSE42
; unsigned to float v7i16 to v7f32
diff --git a/llvm/test/CodeGen/X86/widen_conversions.ll b/llvm/test/CodeGen/X86/widen_conversions.ll
index 3f1294fae6aaa..136c42aed1da8 100644
--- a/llvm/test/CodeGen/X86/widen_conversions.ll
+++ b/llvm/test/CodeGen/X86/widen_conversions.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
define <4 x i32> @zext_v4i8_to_v4i32(ptr %ptr) {
; X86-LABEL: zext_v4i8_to_v4i32:
diff --git a/llvm/test/CodeGen/X86/widen_extract-1.ll b/llvm/test/CodeGen/X86/widen_extract-1.ll
index 3634e6718cd9e..a2f78d88266b3 100644
--- a/llvm/test/CodeGen/X86/widen_extract-1.ll
+++ b/llvm/test/CodeGen/X86/widen_extract-1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
; widen extract subvector
diff --git a/llvm/test/CodeGen/X86/widen_load-0.ll b/llvm/test/CodeGen/X86/widen_load-0.ll
index 4596d1a1ea233..c8e70768068fa 100644
--- a/llvm/test/CodeGen/X86/widen_load-0.ll
+++ b/llvm/test/CodeGen/X86/widen_load-0.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
; PR4891
diff --git a/llvm/test/CodeGen/X86/widen_load-1.ll b/llvm/test/CodeGen/X86/widen_load-1.ll
index 9fbc6a8115dc0..d1a7bec66656c 100644
--- a/llvm/test/CodeGen/X86/widen_load-1.ll
+++ b/llvm/test/CodeGen/X86/widen_load-1.ll
@@ -1,5 +1,5 @@
-; RUN: llc -stack-symbol-ordering=0 %s -o - -mattr=-avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=SSE
-; RUN: llc -stack-symbol-ordering=0 %s -o - -mattr=+avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting -stack-symbol-ordering=0 %s -o - -mattr=-avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=SSE
+; RUN: llc -combiner-topological-sorting -stack-symbol-ordering=0 %s -o - -mattr=+avx -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=AVX
; PR4891
; PR5626
diff --git a/llvm/test/CodeGen/X86/widen_load-3.ll b/llvm/test/CodeGen/X86/widen_load-3.ll
index b3738f5366d3d..27c2c3c08ab59 100644
--- a/llvm/test/CodeGen/X86/widen_load-3.ll
+++ b/llvm/test/CodeGen/X86/widen_load-3.ll
@@ -1,10 +1,10 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-linux -mattr=+sse4.2 | FileCheck %s --check-prefix=X86-SSE
-; RUN: llc < %s -mtriple=i686-linux -mattr=+avx | FileCheck %s --check-prefix=X86-AVX
-; RUN: llc < %s -mtriple=i686-linux -mattr=+avx2 | FileCheck %s --check-prefix=X86-AVX
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+sse4.2 | FileCheck %s --check-prefix=X64-SSE
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx2 | FileCheck %s --check-prefix=X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -mattr=+sse4.2 | FileCheck %s --check-prefix=X86-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -mattr=+avx | FileCheck %s --check-prefix=X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-linux -mattr=+avx2 | FileCheck %s --check-prefix=X86-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+sse4.2 | FileCheck %s --check-prefix=X64-SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s --check-prefix=X64-AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx2 | FileCheck %s --check-prefix=X64-AVX
; PR27708
diff --git a/llvm/test/CodeGen/X86/widen_mul.ll b/llvm/test/CodeGen/X86/widen_mul.ll
index 5fe36da7fd5ff..1afe7ec6f37d0 100644
--- a/llvm/test/CodeGen/X86/widen_mul.ll
+++ b/llvm/test/CodeGen/X86/widen_mul.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX
; Test multiplies of various narrow types.
diff --git a/llvm/test/CodeGen/X86/widen_shuffle-1.ll b/llvm/test/CodeGen/X86/widen_shuffle-1.ll
index 3d34205096afe..36d6021d51b24 100644
--- a/llvm/test/CodeGen/X86/widen_shuffle-1.ll
+++ b/llvm/test/CodeGen/X86/widen_shuffle-1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64
; widening shuffle v3float and then a add
define void @shuf(ptr %dst.addr, <3 x float> %src1,<3 x float> %src2) nounwind {
diff --git a/llvm/test/CodeGen/X86/widened-broadcast.ll b/llvm/test/CodeGen/X86/widened-broadcast.ll
index d25512900440e..a5243d3313531 100644
--- a/llvm/test/CodeGen/X86/widened-broadcast.ll
+++ b/llvm/test/CodeGen/X86/widened-broadcast.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE42
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512
; Widened shuffle broadcast loads
diff --git a/llvm/test/CodeGen/X86/win-alloca-expander.ll b/llvm/test/CodeGen/X86/win-alloca-expander.ll
index 9af18c95a56cd..4792ceb0425b0 100644
--- a/llvm/test/CodeGen/X86/win-alloca-expander.ll
+++ b/llvm/test/CodeGen/X86/win-alloca-expander.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s
-; RUN: llc < %s -mtriple=i686-pc-win32 -O0
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 -O0
%struct.S = type { [1024 x i8] }
%struct.T = type { [3000 x i8] }
diff --git a/llvm/test/CodeGen/X86/win-catchpad-csrs.ll b/llvm/test/CodeGen/X86/win-catchpad-csrs.ll
index 18546b838883b..7f13c2732d115 100644
--- a/llvm/test/CodeGen/X86/win-catchpad-csrs.ll
+++ b/llvm/test/CodeGen/X86/win-catchpad-csrs.ll
@@ -1,5 +1,5 @@
-; RUN: llc -verify-machineinstrs -mtriple=i686-pc-windows-msvc < %s | FileCheck --check-prefix=X86 %s
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-pc-windows-msvc < %s | FileCheck --check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i686-pc-windows-msvc < %s | FileCheck --check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-pc-windows-msvc < %s | FileCheck --check-prefix=X64 %s
%rtti.TypeDescriptor2 = type { ptr, ptr, [3 x i8] }
%eh.CatchableType = type { i32, ptr, i32, i32, i32, i32, ptr }
diff --git a/llvm/test/CodeGen/X86/win-catchpad-nested-cxx.ll b/llvm/test/CodeGen/X86/win-catchpad-nested-cxx.ll
index 0bf8370fa24fa..2677a715a11f0 100644
--- a/llvm/test/CodeGen/X86/win-catchpad-nested-cxx.ll
+++ b/llvm/test/CodeGen/X86/win-catchpad-nested-cxx.ll
@@ -1,6 +1,6 @@
-; RUN: llc -verify-machineinstrs -mtriple=i686-pc-windows-msvc < %s \
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i686-pc-windows-msvc < %s \
; RUN: | FileCheck --check-prefix=CHECK --check-prefix=X86 %s
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-pc-windows-msvc < %s \
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-pc-windows-msvc < %s \
; RUN: | FileCheck --check-prefix=CHECK --check-prefix=X64 %s
; Loosely based on IR for this C++ source code:
diff --git a/llvm/test/CodeGen/X86/win-catchpad-nested.ll b/llvm/test/CodeGen/X86/win-catchpad-nested.ll
index 696ab1a291423..a6b684ef46896 100644
--- a/llvm/test/CodeGen/X86/win-catchpad-nested.ll
+++ b/llvm/test/CodeGen/X86/win-catchpad-nested.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-windows-coreclr < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-coreclr < %s | FileCheck %s
declare void @ProcessCLRException()
diff --git a/llvm/test/CodeGen/X86/win-catchpad-varargs.ll b/llvm/test/CodeGen/X86/win-catchpad-varargs.ll
index 7b51c6faef8a6..72786e3141bd7 100644
--- a/llvm/test/CodeGen/X86/win-catchpad-varargs.ll
+++ b/llvm/test/CodeGen/X86/win-catchpad-varargs.ll
@@ -1,5 +1,5 @@
-; RUN: llc -stack-symbol-ordering=0 -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X64
-; RUN: llc -stack-symbol-ordering=0 -mtriple=i686-windows-msvc < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -stack-symbol-ordering=0 -mtriple=x86_64-windows-msvc < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -stack-symbol-ordering=0 -mtriple=i686-windows-msvc < %s | FileCheck %s --check-prefix=X86
declare void @llvm.va_start(ptr)
declare void @llvm.va_end(ptr)
diff --git a/llvm/test/CodeGen/X86/win-catchpad.ll b/llvm/test/CodeGen/X86/win-catchpad.ll
index 62ea5109f9df2..828305a7d31d4 100644
--- a/llvm/test/CodeGen/X86/win-catchpad.ll
+++ b/llvm/test/CodeGen/X86/win-catchpad.ll
@@ -1,5 +1,5 @@
-; RUN: llc -stack-symbol-ordering=0 -verify-machineinstrs -mtriple=i686-pc-windows-msvc < %s | FileCheck --check-prefix=X86 %s
-; RUN: llc -stack-symbol-ordering=0 -verify-machineinstrs -mtriple=x86_64-pc-windows-msvc < %s | FileCheck --check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting -stack-symbol-ordering=0 -verify-machineinstrs -mtriple=i686-pc-windows-msvc < %s | FileCheck --check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting -stack-symbol-ordering=0 -verify-machineinstrs -mtriple=x86_64-pc-windows-msvc < %s | FileCheck --check-prefix=X64 %s
; Loosely based on IR for this C++ source code:
; void f(int p);
diff --git a/llvm/test/CodeGen/X86/win-cleanuppad.ll b/llvm/test/CodeGen/X86/win-cleanuppad.ll
index 59dcccce37464..8c45c322ecea2 100644
--- a/llvm/test/CodeGen/X86/win-cleanuppad.ll
+++ b/llvm/test/CodeGen/X86/win-cleanuppad.ll
@@ -1,5 +1,5 @@
-; RUN: llc -verify-machineinstrs -mtriple=i686-pc-windows-msvc < %s | FileCheck --check-prefix=X86 %s
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-pc-windows-msvc < %s | FileCheck --check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i686-pc-windows-msvc < %s | FileCheck --check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-pc-windows-msvc < %s | FileCheck --check-prefix=X64 %s
%struct.Dtor = type { i8 }
diff --git a/llvm/test/CodeGen/X86/win-funclet-cfi.ll b/llvm/test/CodeGen/X86/win-funclet-cfi.ll
index 96b55772e05e4..7701b146ada4c 100644
--- a/llvm/test/CodeGen/X86/win-funclet-cfi.ll
+++ b/llvm/test/CodeGen/X86/win-funclet-cfi.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc < %s | FileCheck %s
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/win-import-call-optimization-cfguard.ll b/llvm/test/CodeGen/X86/win-import-call-optimization-cfguard.ll
index 12be910d68ee9..7269abd02eae6 100644
--- a/llvm/test/CodeGen/X86/win-import-call-optimization-cfguard.ll
+++ b/llvm/test/CodeGen/X86/win-import-call-optimization-cfguard.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s --check-prefix=CHECK
define dso_local void @normal_call(ptr noundef readonly %func_ptr) local_unnamed_addr section "nc_sect" {
entry:
diff --git a/llvm/test/CodeGen/X86/win-import-call-optimization-jumptable.ll b/llvm/test/CodeGen/X86/win-import-call-optimization-jumptable.ll
index fe22b251685e6..6000d0cb3e490 100644
--- a/llvm/test/CodeGen/X86/win-import-call-optimization-jumptable.ll
+++ b/llvm/test/CodeGen/X86/win-import-call-optimization-jumptable.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s
; CHECK-LABEL: uses_rax:
; CHECK: .Limpcall0:
diff --git a/llvm/test/CodeGen/X86/win-import-call-optimization-nocalls.ll b/llvm/test/CodeGen/X86/win-import-call-optimization-nocalls.ll
index 4ca7b85282f2e..40f52f6f5a102 100644
--- a/llvm/test/CodeGen/X86/win-import-call-optimization-nocalls.ll
+++ b/llvm/test/CodeGen/X86/win-import-call-optimization-nocalls.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s
define dso_local void @normal_call() local_unnamed_addr {
entry:
diff --git a/llvm/test/CodeGen/X86/win-import-call-optimization.ll b/llvm/test/CodeGen/X86/win-import-call-optimization.ll
index cc7e1a9f81e34..0cba1ba5a8c20 100644
--- a/llvm/test/CodeGen/X86/win-import-call-optimization.ll
+++ b/llvm/test/CodeGen/X86/win-import-call-optimization.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s --check-prefix=CHECK
-; RUN: llc --fast-isel -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s --check-prefix=CHECK
-; RUN: llc --global-isel --global-isel-abort=2 -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting --fast-isel -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting --global-isel --global-isel-abort=2 -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s --check-prefix=CHECK
define dso_local void @normal_call(ptr noundef readonly %func_ptr) local_unnamed_addr section "nc_sect" {
entry:
diff --git a/llvm/test/CodeGen/X86/win-loader-replaceable-function.ll b/llvm/test/CodeGen/X86/win-loader-replaceable-function.ll
index 69212d3d56da8..3e0cf6b3bb19c 100644
--- a/llvm/test/CodeGen/X86/win-loader-replaceable-function.ll
+++ b/llvm/test/CodeGen/X86/win-loader-replaceable-function.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s
define dso_local i32 @override_me1() "loader-replaceable" {
entry:
diff --git a/llvm/test/CodeGen/X86/win-mixed-ehpersonality.ll b/llvm/test/CodeGen/X86/win-mixed-ehpersonality.ll
index 1f01914df43e9..a81076d1f8f6c 100644
--- a/llvm/test/CodeGen/X86/win-mixed-ehpersonality.ll
+++ b/llvm/test/CodeGen/X86/win-mixed-ehpersonality.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-pc-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-windows-msvc < %s | FileCheck %s
declare void @maybe_throw()
diff --git a/llvm/test/CodeGen/X86/win-smallparams.ll b/llvm/test/CodeGen/X86/win-smallparams.ll
index ecbc7e907a024..9b08b85d23efe 100644
--- a/llvm/test/CodeGen/X86/win-smallparams.ll
+++ b/llvm/test/CodeGen/X86/win-smallparams.ll
@@ -2,10 +2,10 @@
; When we accept small parameters on Windows, make sure we do not assume they
; are zero or sign extended in memory or in registers.
-; RUN: llc < %s -mtriple=x86_64-windows-msvc | FileCheck %s --check-prefix=WIN64
-; RUN: llc < %s -mtriple=x86_64-windows-gnu | FileCheck %s --check-prefix=WIN64
-; RUN: llc < %s -mtriple=i686-windows-msvc | FileCheck %s --check-prefix=WIN32-MSVC
-; RUN: llc < %s -mtriple=i686-windows-gnu | FileCheck %s --check-prefix=WIN32-GNU
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc | FileCheck %s --check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-gnu | FileCheck %s --check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-windows-msvc | FileCheck %s --check-prefix=WIN32-MSVC
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-windows-gnu | FileCheck %s --check-prefix=WIN32-GNU
define void @call() {
; WIN64-LABEL: call:
diff --git a/llvm/test/CodeGen/X86/win32-bool.ll b/llvm/test/CodeGen/X86/win32-bool.ll
index 53607ea06c737..3fda33d95c229 100644
--- a/llvm/test/CodeGen/X86/win32-bool.ll
+++ b/llvm/test/CodeGen/X86/win32-bool.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-windows-msvc | FileCheck %s
-; RUN: llc < %s -mtriple=i686-windows-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-windows-msvc | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-windows-gnu | FileCheck %s
define x86_fastcallcc i32 @pass_fast_bool(i1 inreg zeroext %b) {
entry:
diff --git a/llvm/test/CodeGen/X86/win32-eh-available-externally.ll b/llvm/test/CodeGen/X86/win32-eh-available-externally.ll
index 08c3ce8b4b0bb..657550d6499d4 100644
--- a/llvm/test/CodeGen/X86/win32-eh-available-externally.ll
+++ b/llvm/test/CodeGen/X86/win32-eh-available-externally.ll
@@ -1,6 +1,6 @@
; RUN: opt -S -x86-winehstate < %s | FileCheck %s --check-prefix=IR
; RUN: opt -S -passes=x86-winehstate < %s | FileCheck %s --check-prefix=IR
-; RUN: llc < %s | FileCheck %s --check-prefix=ASM
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s --check-prefix=ASM
; IR-NOT: define.*__ehhandler
; IR: define available_externally void @foo(ptr %0)
diff --git a/llvm/test/CodeGen/X86/win32-eh-states.ll b/llvm/test/CodeGen/X86/win32-eh-states.ll
index e645199f84602..6c2d9993e11ea 100644
--- a/llvm/test/CodeGen/X86/win32-eh-states.ll
+++ b/llvm/test/CodeGen/X86/win32-eh-states.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i686-pc-windows-msvc < %s | FileCheck %s --check-prefix=X86
-; RUN: llc -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-pc-windows-msvc < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s --check-prefix=X64
; Based on this source:
; extern "C" void may_throw(int);
diff --git a/llvm/test/CodeGen/X86/win32-eh.ll b/llvm/test/CodeGen/X86/win32-eh.ll
index 857df9882be47..e19829b96fa42 100644
--- a/llvm/test/CodeGen/X86/win32-eh.ll
+++ b/llvm/test/CodeGen/X86/win32-eh.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=i686-pc-windows-msvc < %s | FileCheck %s
-; RUN: llc -mtriple=i686-pc-windows-msvc -filetype=obj < %s -o %t
+; RUN: llc -combiner-topological-sorting -mtriple=i686-pc-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-pc-windows-msvc -filetype=obj < %s -o %t
declare void @may_throw_or_crash()
declare i32 @_except_handler3(...)
diff --git a/llvm/test/CodeGen/X86/win32-int-runtime-libcalls.ll b/llvm/test/CodeGen/X86/win32-int-runtime-libcalls.ll
index 5ac90a0af2e57..4b04028b432a1 100644
--- a/llvm/test/CodeGen/X86/win32-int-runtime-libcalls.ll
+++ b/llvm/test/CodeGen/X86/win32-int-runtime-libcalls.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -mtriple=i686-windows-msvc < %s | FileCheck -check-prefix=CHECK32 %s
-; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck -check-prefix=CHECK64 %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-windows-msvc < %s | FileCheck -check-prefix=CHECK32 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc < %s | FileCheck -check-prefix=CHECK64 %s
define i64 @test_sdiv_i64(i64 %a, i64 %b) {
; CHECK32-LABEL: test_sdiv_i64:
diff --git a/llvm/test/CodeGen/X86/win32-pic-jumptable.ll b/llvm/test/CodeGen/X86/win32-pic-jumptable.ll
index 1b29a38a8ccd6..4988415e6e08b 100644
--- a/llvm/test/CodeGen/X86/win32-pic-jumptable.ll
+++ b/llvm/test/CodeGen/X86/win32-pic-jumptable.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic | FileCheck %s
; CHECK: calll L0$pb
; CHECK-NEXT: .cfi_adjust_cfa_offset 4
diff --git a/llvm/test/CodeGen/X86/win32-preemption.ll b/llvm/test/CodeGen/X86/win32-preemption.ll
index 24f4b34acacca..48ba7d46bdf9c 100644
--- a/llvm/test/CodeGen/X86/win32-preemption.ll
+++ b/llvm/test/CodeGen/X86/win32-preemption.ll
@@ -1,25 +1,25 @@
-; RUN: llc -mtriple x86_64-pc-win32 \
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-win32 \
; RUN: -relocation-model=static < %s | FileCheck --check-prefix=COFF_S %s
-; RUN: llc -mtriple x86_64-pc-win32 \
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-win32 \
; RUN: -relocation-model=pic < %s | FileCheck --check-prefix=COFF %s
-; RUN: llc -mtriple x86_64-pc-win32 \
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-pc-win32 \
; RUN: -relocation-model=dynamic-no-pic < %s | FileCheck --check-prefix=COFF %s
-; RUN: llc -mtriple x86_64-uefi \
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-uefi \
; RUN: -relocation-model=static < %s | FileCheck --check-prefix=COFF_S %s
-; RUN: llc -mtriple x86_64-uefi \
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-uefi \
; RUN: -relocation-model=pic < %s | FileCheck --check-prefix=COFF %s
-; RUN: llc -mtriple x86_64-uefi \
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-uefi \
; RUN: -relocation-model=dynamic-no-pic < %s | FileCheck --check-prefix=COFF %s
; 32 bits
-; RUN: llc -mtriple i386-pc-win32 \
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-win32 \
; RUN: -relocation-model=static < %s | FileCheck --check-prefix=COFF32 %s
-; RUN: llc -mtriple i386-pc-win32 \
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-win32 \
; RUN: -relocation-model=pic < %s | FileCheck --check-prefix=COFF32 %s
-; RUN: llc -mtriple i386-pc-win32 \
+; RUN: llc -combiner-topological-sorting -mtriple i386-pc-win32 \
; RUN: -relocation-model=dynamic-no-pic < %s | \
; RUN: FileCheck --check-prefix=COFF32 %s
diff --git a/llvm/test/CodeGen/X86/win32-seh-catchpad-realign.ll b/llvm/test/CodeGen/X86/win32-seh-catchpad-realign.ll
index b88ba78b3e203..1242b63069b79 100644
--- a/llvm/test/CodeGen/X86/win32-seh-catchpad-realign.ll
+++ b/llvm/test/CodeGen/X86/win32-seh-catchpad-realign.ll
@@ -1,4 +1,4 @@
-; RUN: llc -stack-symbol-ordering=0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -stack-symbol-ordering=0 < %s | FileCheck %s
; The aligned alloca means that we have to realign the stack, which forces the
; use of ESI to address local variables.
diff --git a/llvm/test/CodeGen/X86/win32-seh-catchpad.ll b/llvm/test/CodeGen/X86/win32-seh-catchpad.ll
index 0f5186641ca35..2129ef59664b8 100644
--- a/llvm/test/CodeGen/X86/win32-seh-catchpad.ll
+++ b/llvm/test/CodeGen/X86/win32-seh-catchpad.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i686-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/win32-seh-nested-finally.ll b/llvm/test/CodeGen/X86/win32-seh-nested-finally.ll
index 5095460559d5e..c09a87288921a 100644
--- a/llvm/test/CodeGen/X86/win32-seh-nested-finally.ll
+++ b/llvm/test/CodeGen/X86/win32-seh-nested-finally.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i686-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/win32-spill-xmm.ll b/llvm/test/CodeGen/X86/win32-spill-xmm.ll
index bddfdbfdea4de..5b73496f9baa8 100644
--- a/llvm/test/CodeGen/X86/win32-spill-xmm.ll
+++ b/llvm/test/CodeGen/X86/win32-spill-xmm.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mcpu=generic -mtriple=i686-pc-windows-msvc -mattr=+sse < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=generic -mtriple=i686-pc-windows-msvc -mattr=+sse < %s | FileCheck %s
; Check proper alignment of spilled vector
diff --git a/llvm/test/CodeGen/X86/win32-ssp.ll b/llvm/test/CodeGen/X86/win32-ssp.ll
index 259f0391cfe9b..bd9fc33007457 100644
--- a/llvm/test/CodeGen/X86/win32-ssp.ll
+++ b/llvm/test/CodeGen/X86/win32-ssp.ll
@@ -1,9 +1,9 @@
-; RUN: llc -mtriple=x86_64-w64-mingw32 < %s -o - | FileCheck --check-prefix=MINGW %s
-; RUN: llc -mtriple=x86_64-pc-cygwin < %s -o - | FileCheck --check-prefix=MINGW %s
-; RUN: llc -mtriple=x86_64-pc-windows-itanium < %s -o - | FileCheck --check-prefix=MSVC %s
-; RUN: llc -mtriple=x86_64-pc-windows-msvc < %s -o - | FileCheck --check-prefix=MSVC %s
-; RUN: llc -mtriple=i686-w64-mingw32 < %s -o - | FileCheck --check-prefix=MINGW %s
-; RUN: llc -mtriple=i686-pc-cygwin < %s -o - | FileCheck --check-prefix=MINGW %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-w64-mingw32 < %s -o - | FileCheck --check-prefix=MINGW %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-cygwin < %s -o - | FileCheck --check-prefix=MINGW %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-itanium < %s -o - | FileCheck --check-prefix=MSVC %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc < %s -o - | FileCheck --check-prefix=MSVC %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-w64-mingw32 < %s -o - | FileCheck --check-prefix=MINGW %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-pc-cygwin < %s -o - | FileCheck --check-prefix=MINGW %s
declare void @llvm.lifetime.start.p0(i64, ptr nocapture)
declare dso_local void @other(ptr)
diff --git a/llvm/test/CodeGen/X86/win32_sret.ll b/llvm/test/CodeGen/X86/win32_sret.ll
index 6d0e47bccfa76..037e69010f939 100644
--- a/llvm/test/CodeGen/X86/win32_sret.ll
+++ b/llvm/test/CodeGen/X86/win32_sret.ll
@@ -1,13 +1,13 @@
; We specify -mcpu explicitly to avoid instruction reordering that happens on
; some setups (e.g., Atom) from affecting the output.
-; RUN: llc < %s -mcpu=core2 -mtriple=i686-pc-win32 | FileCheck %s -check-prefix=WIN32
-; RUN: llc < %s -mcpu=core2 -mtriple=i686-pc-mingw32 | FileCheck %s -check-prefix=MINGW_X86
-; RUN: llc < %s -mcpu=core2 -mtriple=i686-pc-cygwin | FileCheck %s -check-prefix=CYGWIN
-; RUN: llc < %s -mcpu=core2 -mtriple=i386-pc-linux | FileCheck %s -check-prefix=LINUX
-; RUN: llc < %s -mcpu=core2 -O0 -mtriple=i686-pc-win32 | FileCheck %s -check-prefix=WIN32
-; RUN: llc < %s -mcpu=core2 -O0 -mtriple=i686-pc-mingw32 | FileCheck %s -check-prefix=MINGW_X86
-; RUN: llc < %s -mcpu=core2 -O0 -mtriple=i686-pc-cygwin | FileCheck %s -check-prefix=CYGWIN
-; RUN: llc < %s -mcpu=core2 -O0 -mtriple=i386-pc-linux | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core2 -mtriple=i686-pc-win32 | FileCheck %s -check-prefix=WIN32
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core2 -mtriple=i686-pc-mingw32 | FileCheck %s -check-prefix=MINGW_X86
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core2 -mtriple=i686-pc-cygwin | FileCheck %s -check-prefix=CYGWIN
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core2 -mtriple=i386-pc-linux | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core2 -O0 -mtriple=i686-pc-win32 | FileCheck %s -check-prefix=WIN32
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core2 -O0 -mtriple=i686-pc-mingw32 | FileCheck %s -check-prefix=MINGW_X86
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core2 -O0 -mtriple=i686-pc-cygwin | FileCheck %s -check-prefix=CYGWIN
+; RUN: llc -combiner-topological-sorting < %s -mcpu=core2 -O0 -mtriple=i386-pc-linux | FileCheck %s -check-prefix=LINUX
; The SysV ABI used by most Unixes and Mingw on x86 specifies that an sret pointer
; is callee-cleanup. However, in MSVC's cdecl calling convention, sret pointer
diff --git a/llvm/test/CodeGen/X86/win64-bool.ll b/llvm/test/CodeGen/X86/win64-bool.ll
index 023df126fd6f9..1bd2fb581a834 100644
--- a/llvm/test/CodeGen/X86/win64-bool.ll
+++ b/llvm/test/CodeGen/X86/win64-bool.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-windows-msvc | FileCheck %s --check-prefix=CHECK
-; RUN: llc < %s -mtriple=x86_64-windows-gnu | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc | FileCheck %s --check-prefix=CHECK
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-gnu | FileCheck %s --check-prefix=CHECK
define i32 @pass_bool(i1 zeroext %b) {
; CHECK-LABEL: pass_bool:
diff --git a/llvm/test/CodeGen/X86/win64-eh-empty-block.ll b/llvm/test/CodeGen/X86/win64-eh-empty-block.ll
index 117e3e9c11a5a..79bb6963ca300 100644
--- a/llvm/test/CodeGen/X86/win64-eh-empty-block.ll
+++ b/llvm/test/CodeGen/X86/win64-eh-empty-block.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-windows-gnu %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-gnu %s -o - | FileCheck %s
; Based on this C++ code:
; struct as {
diff --git a/llvm/test/CodeGen/X86/win64-eh-trailing-statepoint.ll b/llvm/test/CodeGen/X86/win64-eh-trailing-statepoint.ll
index fa49cb80e0980..008f568d68f1d 100644
--- a/llvm/test/CodeGen/X86/win64-eh-trailing-statepoint.ll
+++ b/llvm/test/CodeGen/X86/win64-eh-trailing-statepoint.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-windows-gnu %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-gnu %s -o - | FileCheck %s
define void @foo() gc "statepoint-example" personality ptr @__gxx_personality_seh0 {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/win64-eh-unwindv2.ll b/llvm/test/CodeGen/X86/win64-eh-unwindv2.ll
index 747f6c2e1bb3b..a50a03c35d631 100644
--- a/llvm/test/CodeGen/X86/win64-eh-unwindv2.ll
+++ b/llvm/test/CodeGen/X86/win64-eh-unwindv2.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-windows-msvc -o - %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-unknown-windows-msvc -o - %s \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-windows-msvc -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-windows-msvc -o - %s \
; RUN: -x86-wineh-unwindv2-unwind-codes-threshold=8 | FileCheck %s \
; RUN: -check-prefixes=ALLOWLESS,CHECK
diff --git a/llvm/test/CodeGen/X86/win64-funclet-preisel-intrinsics.ll b/llvm/test/CodeGen/X86/win64-funclet-preisel-intrinsics.ll
index c015a4e670d63..38d9bbc3efb22 100644
--- a/llvm/test/CodeGen/X86/win64-funclet-preisel-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/win64-funclet-preisel-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-msvc < %s | FileCheck %s
; WinEH requires funclet tokens on nounwind intrinsics if they can lower to
; regular function calls in the course of IR transformations.
diff --git a/llvm/test/CodeGen/X86/win64-funclet-savexmm.ll b/llvm/test/CodeGen/X86/win64-funclet-savexmm.ll
index ad675ab67963b..b30a166878768 100644
--- a/llvm/test/CodeGen/X86/win64-funclet-savexmm.ll
+++ b/llvm/test/CodeGen/X86/win64-funclet-savexmm.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-windows-msvc -mattr=+avx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc -mattr=+avx < %s | FileCheck %s
; void bar(int a, int b, int c, int d, int e);
; void baz(int x);
diff --git a/llvm/test/CodeGen/X86/win64-jumptable.ll b/llvm/test/CodeGen/X86/win64-jumptable.ll
index 17ef0d333a727..4867ef81dac99 100644
--- a/llvm/test/CodeGen/X86/win64-jumptable.ll
+++ b/llvm/test/CodeGen/X86/win64-jumptable.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -relocation-model=static | FileCheck %s
-; RUN: llc < %s -relocation-model=pic | FileCheck %s --check-prefix=PIC
-; RUN: llc < %s -relocation-model=pic -code-model=large | FileCheck %s --check-prefix=PIC
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=static | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic | FileCheck %s --check-prefix=PIC
+; RUN: llc -combiner-topological-sorting < %s -relocation-model=pic -code-model=large | FileCheck %s --check-prefix=PIC
; FIXME: Remove '-relocation-model=static' when it is no longer necessary to
; trigger the separate .rdata section.
diff --git a/llvm/test/CodeGen/X86/win64-long-double.ll b/llvm/test/CodeGen/X86/win64-long-double.ll
index 94559c9005023..4596b82caeb87 100644
--- a/llvm/test/CodeGen/X86/win64-long-double.ll
+++ b/llvm/test/CodeGen/X86/win64-long-double.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple x86_64-w64-mingw32 %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple x86_64-w64-mingw32 %s -o - | FileCheck %s
@glob = common dso_local local_unnamed_addr global x86_fp80 0xK00000000000000000000, align 16
diff --git a/llvm/test/CodeGen/X86/win64-nosse-csrs.ll b/llvm/test/CodeGen/X86/win64-nosse-csrs.ll
index 29d4f165392e3..129df5fc0af8f 100644
--- a/llvm/test/CodeGen/X86/win64-nosse-csrs.ll
+++ b/llvm/test/CodeGen/X86/win64-nosse-csrs.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mattr="-sse,-mmx,+soft-float" | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr="-sse,-mmx,+soft-float" | FileCheck %s
; CHECK: peach:
; CHECK: pushq %rsi
diff --git a/llvm/test/CodeGen/X86/win64-seh-epilogue-statepoint.ll b/llvm/test/CodeGen/X86/win64-seh-epilogue-statepoint.ll
index 75f156fe906e4..9f552bdeca7d2 100644
--- a/llvm/test/CodeGen/X86/win64-seh-epilogue-statepoint.ll
+++ b/llvm/test/CodeGen/X86/win64-seh-epilogue-statepoint.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-windows-gnu %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-windows-gnu %s -o - | FileCheck %s
define i32 @foobar() gc "statepoint-example" personality ptr @__gxx_personality_seh0 {
; CHECK-LABEL: foobar:
diff --git a/llvm/test/CodeGen/X86/win64-stackprobe-overflow.ll b/llvm/test/CodeGen/X86/win64-stackprobe-overflow.ll
index 732fc6543e314..1ffa675a2bc00 100644
--- a/llvm/test/CodeGen/X86/win64-stackprobe-overflow.ll
+++ b/llvm/test/CodeGen/X86/win64-stackprobe-overflow.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-windows-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-gnu | FileCheck %s
define void @foo() unnamed_addr #0 {
start:
diff --git a/llvm/test/CodeGen/X86/win64-tailcall-memory.ll b/llvm/test/CodeGen/X86/win64-tailcall-memory.ll
index 568f4fe04fea9..8cd3b09951cf1 100644
--- a/llvm/test/CodeGen/X86/win64-tailcall-memory.ll
+++ b/llvm/test/CodeGen/X86/win64-tailcall-memory.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -mtriple=x86_64-unknown-windows-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-windows-gnu < %s | FileCheck %s
; Check calling convention is correct for win64 when doing a tailcall
; for a pointer loaded from memory.
diff --git a/llvm/test/CodeGen/X86/win64_alloca_dynalloca.ll b/llvm/test/CodeGen/X86/win64_alloca_dynalloca.ll
index 241188b8cc3d5..4ec5987092636 100644
--- a/llvm/test/CodeGen/X86/win64_alloca_dynalloca.ll
+++ b/llvm/test/CodeGen/X86/win64_alloca_dynalloca.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -mcpu=generic -enable-misched=false -mtriple=x86_64-mingw32 | FileCheck %s -check-prefix=M64
-; RUN: llc < %s -mcpu=generic -enable-misched=false -mtriple=x86_64-win32 | FileCheck %s -check-prefix=W64
-; RUN: llc < %s -mcpu=generic -enable-misched=false -mtriple=x86_64-win32 -code-model=large | FileCheck %s -check-prefix=L64
-; RUN: llc < %s -mcpu=generic -enable-misched=false -mtriple=x86_64-win32-macho | FileCheck %s -check-prefix=EFI
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -enable-misched=false -mtriple=x86_64-mingw32 | FileCheck %s -check-prefix=M64
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -enable-misched=false -mtriple=x86_64-win32 | FileCheck %s -check-prefix=W64
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -enable-misched=false -mtriple=x86_64-win32 -code-model=large | FileCheck %s -check-prefix=L64
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -enable-misched=false -mtriple=x86_64-win32-macho | FileCheck %s -check-prefix=EFI
; PR8777
; PR8778
diff --git a/llvm/test/CodeGen/X86/win64_call_epi.ll b/llvm/test/CodeGen/X86/win64_call_epi.ll
index 8b5e1f2d0157f..3022c02f07a4a 100644
--- a/llvm/test/CodeGen/X86/win64_call_epi.ll
+++ b/llvm/test/CodeGen/X86/win64_call_epi.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-mingw32 | FileCheck %s -check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-mingw32 | FileCheck %s -check-prefix=WIN64
declare void @bar()
declare void @baz()
diff --git a/llvm/test/CodeGen/X86/win64_eh.ll b/llvm/test/CodeGen/X86/win64_eh.ll
index 63aa9fcaf5838..ebde861868735 100644
--- a/llvm/test/CodeGen/X86/win64_eh.ll
+++ b/llvm/test/CodeGen/X86/win64_eh.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -O0 -mattr=sse2 -mtriple=x86_64-pc-windows-itanium | FileCheck %s -check-prefix=WIN64 -check-prefix=NORM
-; RUN: llc < %s -O0 -mattr=sse2 -mtriple=x86_64-uefi | FileCheck %s -check-prefix=WIN64 -check-prefix=NORM
-; RUN: llc < %s -O0 -mattr=sse2 -mtriple=x86_64-pc-mingw32 | FileCheck %s -check-prefix=WIN64 -check-prefix=NORM
-; RUN: llc < %s -O0 -mattr=sse2 -mtriple=x86_64-pc-mingw32 -mcpu=atom | FileCheck %s -check-prefix=WIN64 -check-prefix=ATOM
+; RUN: llc -combiner-topological-sorting < %s -O0 -mattr=sse2 -mtriple=x86_64-pc-windows-itanium | FileCheck %s -check-prefix=WIN64 -check-prefix=NORM
+; RUN: llc -combiner-topological-sorting < %s -O0 -mattr=sse2 -mtriple=x86_64-uefi | FileCheck %s -check-prefix=WIN64 -check-prefix=NORM
+; RUN: llc -combiner-topological-sorting < %s -O0 -mattr=sse2 -mtriple=x86_64-pc-mingw32 | FileCheck %s -check-prefix=WIN64 -check-prefix=NORM
+; RUN: llc -combiner-topological-sorting < %s -O0 -mattr=sse2 -mtriple=x86_64-pc-mingw32 -mcpu=atom | FileCheck %s -check-prefix=WIN64 -check-prefix=ATOM
; Check function without prolog
define void @foo0() uwtable {
diff --git a/llvm/test/CodeGen/X86/win64_eh_leaf.ll b/llvm/test/CodeGen/X86/win64_eh_leaf.ll
index 8d7a301f546fc..36568884a24de 100644
--- a/llvm/test/CodeGen/X86/win64_eh_leaf.ll
+++ b/llvm/test/CodeGen/X86/win64_eh_leaf.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -O1 -mtriple=x86_64-pc-win32 | FileCheck %s -check-prefix=ASM
-; RUN: llc < %s -O1 -mtriple=x86_64-pc-win32 -filetype=obj -o %t
+; RUN: llc -combiner-topological-sorting < %s -O1 -mtriple=x86_64-pc-win32 | FileCheck %s -check-prefix=ASM
+; RUN: llc -combiner-topological-sorting < %s -O1 -mtriple=x86_64-pc-win32 -filetype=obj -o %t
; RUN: llvm-readobj --unwind %t | FileCheck %s -check-prefix=READOBJ
declare void @g(i32)
diff --git a/llvm/test/CodeGen/X86/win64_eh_leaf2.ll b/llvm/test/CodeGen/X86/win64_eh_leaf2.ll
index 584ec198f1b62..66ef234713a37 100644
--- a/llvm/test/CodeGen/X86/win64_eh_leaf2.ll
+++ b/llvm/test/CodeGen/X86/win64_eh_leaf2.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -O1 -mtriple=x86_64-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -O1 -mtriple=x86_64-pc-win32 | FileCheck %s
; Neither of these functions need .seh_ directives. We used to crash.
diff --git a/llvm/test/CodeGen/X86/win64_nonvol.ll b/llvm/test/CodeGen/X86/win64_nonvol.ll
index e1c615d75f282..bd945226132ec 100644
--- a/llvm/test/CodeGen/X86/win64_nonvol.ll
+++ b/llvm/test/CodeGen/X86/win64_nonvol.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s
; Check that, if a Win64 ABI function calls a SysV ABI function, all the
; Win64 nonvolatile registers get saved.
diff --git a/llvm/test/CodeGen/X86/win64_params.ll b/llvm/test/CodeGen/X86/win64_params.ll
index 6b42735120137..6f9def316989f 100644
--- a/llvm/test/CodeGen/X86/win64_params.ll
+++ b/llvm/test/CodeGen/X86/win64_params.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s -check-prefix=LINUX
; Verify that the 5th and 6th parameters are coming from the correct location
; on the stack.
diff --git a/llvm/test/CodeGen/X86/win64_regcall.ll b/llvm/test/CodeGen/X86/win64_regcall.ll
index 726c3c1faa656..b33a6b59cb6dd 100644
--- a/llvm/test/CodeGen/X86/win64_regcall.ll
+++ b/llvm/test/CodeGen/X86/win64_regcall.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-windows-msvc | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc | FileCheck %s
define dso_local x86_regcallcc void @ensure_align() local_unnamed_addr #0 {
entry:
diff --git a/llvm/test/CodeGen/X86/win64_sibcall.ll b/llvm/test/CodeGen/X86/win64_sibcall.ll
index 432dcb3dba24e..320e99c0c56d7 100644
--- a/llvm/test/CodeGen/X86/win64_sibcall.ll
+++ b/llvm/test/CodeGen/X86/win64_sibcall.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-pc-win32-coreclr | FileCheck %s -check-prefix=WIN_X64
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32-coreclr | FileCheck %s -check-prefix=WIN_X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s -check-prefix=LINUX
%Object = type <{ ptr }>
diff --git a/llvm/test/CodeGen/X86/win64_vararg.ll b/llvm/test/CodeGen/X86/win64_vararg.ll
index c178b4b93afff..299c81f64f756 100644
--- a/llvm/test/CodeGen/X86/win64_vararg.ll
+++ b/llvm/test/CodeGen/X86/win64_vararg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-win32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-pc-win32 | FileCheck %s
; Verify that the var arg parameters which are passed in registers are stored
; in home stack slots allocated by the caller and that AP is correctly
diff --git a/llvm/test/CodeGen/X86/win_chkstk.ll b/llvm/test/CodeGen/X86/win_chkstk.ll
index 5a2809ed39406..0f590e219bc9b 100644
--- a/llvm/test/CodeGen/X86/win_chkstk.ll
+++ b/llvm/test/CodeGen/X86/win_chkstk.ll
@@ -1,12 +1,12 @@
-; RUN: llc < %s -mtriple=i686-pc-win32 | FileCheck %s -check-prefix=WIN_X32
-; RUN: llc < %s -mtriple=x86_64-pc-win32 | FileCheck %s -check-prefix=WIN_X64
-; RUN: llc < %s -mtriple=x86_64-pc-win32 -code-model=large | FileCheck %s -check-prefix=WIN64_LARGE
-; RUN: llc < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=WIN_X64
-; RUN: llc < %s -mtriple=x86_64-uefi -code-model=large | FileCheck %s -check-prefix=WIN64_LARGE
-; RUN: llc < %s -mtriple=i686-pc-mingw32 | FileCheck %s -check-prefix=MINGW_X32
-; RUN: llc < %s -mtriple=x86_64-pc-mingw32 | FileCheck %s -check-prefix=MINGW_X64
-; RUN: llc < %s -mtriple=i386-pc-linux | FileCheck %s -check-prefix=LINUX
-; RUN: llc < %s -mtriple=x86_64-pc-win32-macho | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-win32 | FileCheck %s -check-prefix=WIN_X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 | FileCheck %s -check-prefix=WIN_X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32 -code-model=large | FileCheck %s -check-prefix=WIN64_LARGE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-uefi | FileCheck %s -check-prefix=WIN_X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-uefi -code-model=large | FileCheck %s -check-prefix=WIN64_LARGE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-mingw32 | FileCheck %s -check-prefix=MINGW_X32
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-mingw32 | FileCheck %s -check-prefix=MINGW_X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-pc-linux | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32-macho | FileCheck %s -check-prefix=LINUX
; Windows and mingw require a prologue helper routine if more than 4096 bytes area
; allocated on the stack. Windows uses __chkstk and mingw uses __alloca. __alloca
diff --git a/llvm/test/CodeGen/X86/win_coreclr_chkstk.ll b/llvm/test/CodeGen/X86/win_coreclr_chkstk.ll
index 35fc13be0f86b..a6c535ecd46e4 100644
--- a/llvm/test/CodeGen/X86/win_coreclr_chkstk.ll
+++ b/llvm/test/CodeGen/X86/win_coreclr_chkstk.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-pc-win32-coreclr -verify-machineinstrs | FileCheck %s -check-prefix=WIN_X64
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s -check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-win32-coreclr -verify-machineinstrs | FileCheck %s -check-prefix=WIN_X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s -check-prefix=LINUX
; By default, windows CoreCLR requires an inline prologue stack expansion check
; if more than 4096 bytes are allocated on the stack.
diff --git a/llvm/test/CodeGen/X86/win_cst_pool.ll b/llvm/test/CodeGen/X86/win_cst_pool.ll
index 097fe2a39abb6..51ddbbcec93a4 100644
--- a/llvm/test/CodeGen/X86/win_cst_pool.ll
+++ b/llvm/test/CodeGen/X86/win_cst_pool.ll
@@ -1,10 +1,10 @@
; Three variants of "MSVC" environments.
-; RUN: llc < %s -mattr=sse2 -mattr=avx | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-win32 -mattr=sse2 -mattr=avx | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-windows-msvc -mattr=sse2 -mattr=avx | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-windows-msvc -mattr=sse2 -mattr=avx --use-constant-int-for-fixed-length-splat -use-constant-fp-for-fixed-length-splat | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mattr=sse2 -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32 -mattr=sse2 -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc -mattr=sse2 -mattr=avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-windows-msvc -mattr=sse2 -mattr=avx --use-constant-int-for-fixed-length-splat -use-constant-fp-for-fixed-length-splat | FileCheck %s
; GNU environment.
-; RUN: llc < %s -mtriple=x86_64-win32-gnu -mattr=sse2 -mattr=avx | FileCheck -check-prefix=MINGW %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-win32-gnu -mattr=sse2 -mattr=avx | FileCheck -check-prefix=MINGW %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-win32"
diff --git a/llvm/test/CodeGen/X86/windows-itanium-alloca.ll b/llvm/test/CodeGen/X86/windows-itanium-alloca.ll
index 23cfbd2c855e4..e34c29fd6b6a2 100644
--- a/llvm/test/CodeGen/X86/windows-itanium-alloca.ll
+++ b/llvm/test/CodeGen/X86/windows-itanium-alloca.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple i686-windows-itanium -filetype asm -o - %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple i686-windows-itanium -filetype asm -o - %s | FileCheck %s
target datalayout = "e-m:w-p:32:32-i64:64-f80:32-n8:16:32-S32"
target triple = "i686--windows-itanium"
diff --git a/llvm/test/CodeGen/X86/windows-seh-EHa-CppCatchDotDotDot.ll b/llvm/test/CodeGen/X86/windows-seh-EHa-CppCatchDotDotDot.ll
index d4d4fe346755d..08c228ef1f037 100644
--- a/llvm/test/CodeGen/X86/windows-seh-EHa-CppCatchDotDotDot.ll
+++ b/llvm/test/CodeGen/X86/windows-seh-EHa-CppCatchDotDotDot.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
; CHECK-LABEL: "$cppxdata$?crash@@YAXH at Z":
; CHECK: .long "$stateUnwindMap$?crash@@YAXH at Z"
diff --git a/llvm/test/CodeGen/X86/windows-seh-EHa-CppCondiTemps.ll b/llvm/test/CodeGen/X86/windows-seh-EHa-CppCondiTemps.ll
index cc100c2965730..02ad04204b740 100644
--- a/llvm/test/CodeGen/X86/windows-seh-EHa-CppCondiTemps.ll
+++ b/llvm/test/CodeGen/X86/windows-seh-EHa-CppCondiTemps.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
; CHECK-LABEL: $ip2state$main:
; CHECK-NEXT: .long .Lfunc_begin4 at IMGREL
diff --git a/llvm/test/CodeGen/X86/windows-seh-EHa-CppDtors01.ll b/llvm/test/CodeGen/X86/windows-seh-EHa-CppDtors01.ll
index b0baaac45bdea..56b43baf2052c 100644
--- a/llvm/test/CodeGen/X86/windows-seh-EHa-CppDtors01.ll
+++ b/llvm/test/CodeGen/X86/windows-seh-EHa-CppDtors01.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
; CHECK-LABEL: "$cppxdata$?crash@@YAXH at Z":
; CHECK: .long "$stateUnwindMap$?crash@@YAXH at Z"
diff --git a/llvm/test/CodeGen/X86/windows-seh-EHa-PreserveCFG.ll b/llvm/test/CodeGen/X86/windows-seh-EHa-PreserveCFG.ll
index edd53b6eb9ad6..9b051501c71f5 100644
--- a/llvm/test/CodeGen/X86/windows-seh-EHa-PreserveCFG.ll
+++ b/llvm/test/CodeGen/X86/windows-seh-EHa-PreserveCFG.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-windows-msvc %s -o /dev/null
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc %s -o /dev/null
define dso_local void @main(ptr %addr, ptr %src, ptr %dst) personality ptr @__CxxFrameHandler3 !dbg !11 {
entry:
%tmp0 = load float, ptr %src
diff --git a/llvm/test/CodeGen/X86/windows-seh-EHa-RegisterLiveness.ll b/llvm/test/CodeGen/X86/windows-seh-EHa-RegisterLiveness.ll
index ff07f4ddf0054..b1c750efb283b 100644
--- a/llvm/test/CodeGen/X86/windows-seh-EHa-RegisterLiveness.ll
+++ b/llvm/test/CodeGen/X86/windows-seh-EHa-RegisterLiveness.ll
@@ -1,5 +1,5 @@
; XFAIL: *
-; RUN: llc --verify-machineinstrs < %s
+; RUN: llc -combiner-topological-sorting --verify-machineinstrs < %s
source_filename = "test.cpp"
target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc19.12.0"
diff --git a/llvm/test/CodeGen/X86/windows-seh-EHa-TryInFinally.ll b/llvm/test/CodeGen/X86/windows-seh-EHa-TryInFinally.ll
index d3da5f83f4756..c025b2671056b 100644
--- a/llvm/test/CodeGen/X86/windows-seh-EHa-TryInFinally.ll
+++ b/llvm/test/CodeGen/X86/windows-seh-EHa-TryInFinally.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
; CHECK-LABEL: "?fin$0 at 0@main@@"
; CHECK: .seh_handlerdata
diff --git a/llvm/test/CodeGen/X86/wineh-coreclr.ll b/llvm/test/CodeGen/X86/wineh-coreclr.ll
index a3d0fde76c458..5ad803b6c9bfe 100644
--- a/llvm/test/CodeGen/X86/wineh-coreclr.ll
+++ b/llvm/test/CodeGen/X86/wineh-coreclr.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-windows-coreclr -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-coreclr -verify-machineinstrs < %s | FileCheck %s
declare void @ProcessCLRException()
declare void @f(i32)
diff --git a/llvm/test/CodeGen/X86/wineh-exceptionpointer.ll b/llvm/test/CodeGen/X86/wineh-exceptionpointer.ll
index 7c0005ebf467e..698a940e824d5 100644
--- a/llvm/test/CodeGen/X86/wineh-exceptionpointer.ll
+++ b/llvm/test/CodeGen/X86/wineh-exceptionpointer.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-windows-coreclr < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-coreclr < %s | FileCheck %s
declare void @ProcessCLRException()
declare ptr addrspace(1) @llvm.eh.exceptionpointer.p1(token)
diff --git a/llvm/test/CodeGen/X86/wineh-no-ehpads.ll b/llvm/test/CodeGen/X86/wineh-no-ehpads.ll
index bc85031555865..dfa5452caee78 100644
--- a/llvm/test/CodeGen/X86/wineh-no-ehpads.ll
+++ b/llvm/test/CodeGen/X86/wineh-no-ehpads.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target triple = "x86_64-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/x32-cet-intrinsics.ll b/llvm/test/CodeGen/X86/x32-cet-intrinsics.ll
index d71386d6c9cbd..b25e0e775d55f 100644
--- a/llvm/test/CodeGen/X86/x32-cet-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/x32-cet-intrinsics.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+shstk | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-apple-darwin -mattr=+shstk | FileCheck %s
define void @test_incsspd(i32 %a) local_unnamed_addr {
; CHECK-LABEL: test_incsspd:
diff --git a/llvm/test/CodeGen/X86/x32-function_pointer-1.ll b/llvm/test/CodeGen/X86/x32-function_pointer-1.ll
index 4a007c6049a16..cb29853a82f1f 100644
--- a/llvm/test/CodeGen/X86/x32-function_pointer-1.ll
+++ b/llvm/test/CodeGen/X86/x32-function_pointer-1.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -fast-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 -fast-isel | FileCheck %s
; Test for x32 function pointer tail call
diff --git a/llvm/test/CodeGen/X86/x32-function_pointer-2.ll b/llvm/test/CodeGen/X86/x32-function_pointer-2.ll
index 3369fbba1f762..ab85626875266 100644
--- a/llvm/test/CodeGen/X86/x32-function_pointer-2.ll
+++ b/llvm/test/CodeGen/X86/x32-function_pointer-2.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -fast-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 -fast-isel | FileCheck %s
; Test call function pointer with function argument
;
diff --git a/llvm/test/CodeGen/X86/x32-function_pointer-3.ll b/llvm/test/CodeGen/X86/x32-function_pointer-3.ll
index 4e9176fa8753f..cac9a54321a0b 100644
--- a/llvm/test/CodeGen/X86/x32-function_pointer-3.ll
+++ b/llvm/test/CodeGen/X86/x32-function_pointer-3.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -fast-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 -fast-isel | FileCheck %s
; Test calling function pointer passed in struct
diff --git a/llvm/test/CodeGen/X86/x32-indirectbr.ll b/llvm/test/CodeGen/X86/x32-indirectbr.ll
index af9bc4c8e9a00..4e1530e9b52b8 100644
--- a/llvm/test/CodeGen/X86/x32-indirectbr.ll
+++ b/llvm/test/CodeGen/X86/x32-indirectbr.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-none-none-gnux32 -mcpu=generic | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-none-none-gnux32 -mcpu=generic -fast-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-none-none-gnux32 -mcpu=generic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-none-none-gnux32 -mcpu=generic -fast-isel | FileCheck %s
; Bug 22859
;
; x32 pointers are 32-bits wide. x86-64 indirect branches use the full 64-bit
diff --git a/llvm/test/CodeGen/X86/x32-landingpad.ll b/llvm/test/CodeGen/X86/x32-landingpad.ll
index 524a262b4ea72..10be02fe3dc60 100644
--- a/llvm/test/CodeGen/X86/x32-landingpad.ll
+++ b/llvm/test/CodeGen/X86/x32-landingpad.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=x86_64-none-none-gnux32 -mcpu=generic | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-none-none-gnux32 -mcpu=generic -fast-isel | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-none-none-gnux32 -mcpu=generic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-none-none-gnux32 -mcpu=generic -fast-isel | FileCheck %s
;
; Ensures that landingpad instructions in x32 use the right Exception Pointer
; and Exception Selector registers.
diff --git a/llvm/test/CodeGen/X86/x32-lea-1.ll b/llvm/test/CodeGen/X86/x32-lea-1.ll
index 69ebd3eb2b90d..c172399cdef65 100644
--- a/llvm/test/CodeGen/X86/x32-lea-1.ll
+++ b/llvm/test/CodeGen/X86/x32-lea-1.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 -O0 | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-linux-muslx32 -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 -O0 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-muslx32 -O0 | FileCheck %s
define void @foo(ptr %p) {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/x32-movtopush64.ll b/llvm/test/CodeGen/X86/x32-movtopush64.ll
index fe214965c81dc..65f22c59d64ef 100644
--- a/llvm/test/CodeGen/X86/x32-movtopush64.ll
+++ b/llvm/test/CodeGen/X86/x32-movtopush64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnux32 | FileCheck %s
declare void @bar(ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i32)
diff --git a/llvm/test/CodeGen/X86/x64-cet-intrinsics.ll b/llvm/test/CodeGen/X86/x64-cet-intrinsics.ll
index f73e26a309aa1..4d304451b07f7 100644
--- a/llvm/test/CodeGen/X86/x64-cet-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/x64-cet-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+shstk --show-mc-encoding | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+shstk,+egpr --show-mc-encoding | FileCheck %s -check-prefix=EGPR
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+shstk --show-mc-encoding | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -mattr=+shstk,+egpr --show-mc-encoding | FileCheck %s -check-prefix=EGPR
define void @test_incsspd(i32 %a) local_unnamed_addr {
; CHECK-LABEL: test_incsspd:
diff --git a/llvm/test/CodeGen/X86/x86-16.ll b/llvm/test/CodeGen/X86/x86-16.ll
index 8747b3ddbbb61..b7c1bb56089c5 100644
--- a/llvm/test/CodeGen/X86/x86-16.ll
+++ b/llvm/test/CodeGen/X86/x86-16.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i386-unknown-linux-code16"
diff --git a/llvm/test/CodeGen/X86/x86-32-intrcc.ll b/llvm/test/CodeGen/X86/x86-32-intrcc.ll
index a0f937e2c323b..edffcbf3579bd 100644
--- a/llvm/test/CodeGen/X86/x86-32-intrcc.ll
+++ b/llvm/test/CodeGen/X86/x86-32-intrcc.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp --version 2
-; RUN: llc -mtriple=i686-unknown-unknown < %s | FileCheck %s
-; RUN: llc -mtriple=i686-unknown-unknown -O0 < %s | FileCheck %s -check-prefix=CHECK0
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown -O0 < %s | FileCheck %s -check-prefix=CHECK0
%struct.interrupt_frame = type { i32, i32, i32, i32, i32 }
diff --git a/llvm/test/CodeGen/X86/x86-32-vector-calling-conv.ll b/llvm/test/CodeGen/X86/x86-32-vector-calling-conv.ll
index e5732d76ee8b3..44bc0785a640d 100644
--- a/llvm/test/CodeGen/X86/x86-32-vector-calling-conv.ll
+++ b/llvm/test/CodeGen/X86/x86-32-vector-calling-conv.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx512f | FileCheck %s --check-prefix=DARWIN
-; RUN: llc < %s -mtriple=i686-pc-linux -mattr=+avx512f | FileCheck %s --check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-apple-darwin -mattr=+avx512f | FileCheck %s --check-prefix=DARWIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-pc-linux -mattr=+avx512f | FileCheck %s --check-prefix=LINUX
define <4 x i32> @test_sse(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, <4 x i32> %d) nounwind {
; DARWIN-LABEL: test_sse:
diff --git a/llvm/test/CodeGen/X86/x86-64-and-mask.ll b/llvm/test/CodeGen/X86/x86-64-and-mask.ll
index c8a832a6d3a24..b99bc5d5ca389 100644
--- a/llvm/test/CodeGen/X86/x86-64-and-mask.ll
+++ b/llvm/test/CodeGen/X86/x86-64-and-mask.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/x86-64-arg.ll b/llvm/test/CodeGen/X86/x86-64-arg.ll
index f23b7f864d10b..32018cbb5b7ce 100644
--- a/llvm/test/CodeGen/X86/x86-64-arg.ll
+++ b/llvm/test/CodeGen/X86/x86-64-arg.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; The input value is already sign extended, don't re-extend it.
; This testcase corresponds to:
diff --git a/llvm/test/CodeGen/X86/x86-64-asm.ll b/llvm/test/CodeGen/X86/x86-64-asm.ll
index c9a88ade59b55..f741100596edd 100644
--- a/llvm/test/CodeGen/X86/x86-64-asm.ll
+++ b/llvm/test/CodeGen/X86/x86-64-asm.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
; PR1029
target datalayout = "e-p:64:64"
diff --git a/llvm/test/CodeGen/X86/x86-64-bittest-logic.ll b/llvm/test/CodeGen/X86/x86-64-bittest-logic.ll
index ceb08ceadd093..e4edd2bda5d22 100644
--- a/llvm/test/CodeGen/X86/x86-64-bittest-logic.ll
+++ b/llvm/test/CodeGen/X86/x86-64-bittest-logic.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux | FileCheck %s
define i64 @and1(i64 %x) {
; CHECK-LABEL: and1:
diff --git a/llvm/test/CodeGen/X86/x86-64-call.ll b/llvm/test/CodeGen/X86/x86-64-call.ll
index 300f8d1025e58..24fd8c3ac8e30 100644
--- a/llvm/test/CodeGen/X86/x86-64-call.ll
+++ b/llvm/test/CodeGen/X86/x86-64-call.ll
@@ -1,6 +1,6 @@
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-linux -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnux32 -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -mcpu=generic -mtriple=i686-pc-linux -verify-machineinstrs | FileCheck %s -check-prefix=IA32
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-pc-linux -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnux32 -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=i686-pc-linux -verify-machineinstrs | FileCheck %s -check-prefix=IA32
; trivial test for correct call suffix
diff --git a/llvm/test/CodeGen/X86/x86-64-disp.ll b/llvm/test/CodeGen/X86/x86-64-disp.ll
index 3f17bd405a25c..6444a4ccb2cce 100644
--- a/llvm/test/CodeGen/X86/x86-64-disp.ll
+++ b/llvm/test/CodeGen/X86/x86-64-disp.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; Fold an offset into an address even if it's not a 32-bit
; signed integer.
diff --git a/llvm/test/CodeGen/X86/x86-64-double-precision-shift-left.ll b/llvm/test/CodeGen/X86/x86-64-double-precision-shift-left.ll
index 9d72386f35271..ec161ed699875 100644
--- a/llvm/test/CodeGen/X86/x86-64-double-precision-shift-left.ll
+++ b/llvm/test/CodeGen/X86/x86-64-double-precision-shift-left.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver1 | FileCheck %s
; Verify that for the architectures that are known to have poor latency
; double precision shift instructions we generate alternative sequence
diff --git a/llvm/test/CodeGen/X86/x86-64-double-precision-shift-right.ll b/llvm/test/CodeGen/X86/x86-64-double-precision-shift-right.ll
index 42df39f98c21a..7bf2545f7a454 100644
--- a/llvm/test/CodeGen/X86/x86-64-double-precision-shift-right.ll
+++ b/llvm/test/CodeGen/X86/x86-64-double-precision-shift-right.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=bdver1 | FileCheck %s
; Verify that for the architectures that are known to have poor latency
; double precision shift instructions we generate alternative sequence
diff --git a/llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll b/llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
index 9f888f8a7fada..9978180794ada 100644
--- a/llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
+++ b/llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=bdver1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown -mcpu=bdver1 | FileCheck %s
; clang -Oz -c test1.cpp -emit-llvm -S -o
; Verify that we generate shld insruction when we are optimizing for size,
diff --git a/llvm/test/CodeGen/X86/x86-64-double-shifts-var.ll b/llvm/test/CodeGen/X86/x86-64-double-shifts-var.ll
index bb1a4e5fcb75b..f3c1f6ecdd69d 100644
--- a/llvm/test/CodeGen/X86/x86-64-double-shifts-var.ll
+++ b/llvm/test/CodeGen/X86/x86-64-double-shifts-var.ll
@@ -1,24 +1,24 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=k8 | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=opteron | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon64 | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon-fx | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=k8-sse3 | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=opteron-sse3 | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=athlon64-sse3 | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=amdfam10 | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver1 | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=BMI
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver1 | FileCheck %s --check-prefixes=BMI
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver2 | FileCheck %s --check-prefixes=BMI
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver3 | FileCheck %s --check-prefixes=BMI
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=bdver4 | FileCheck %s --check-prefixes=BMI2-SLOW
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver1 | FileCheck %s --check-prefixes=BMI2-SLOW
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver2 | FileCheck %s --check-prefixes=BMI2-SLOW
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver3 | FileCheck %s --check-prefixes=BMI2-FAST
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver4 | FileCheck %s --check-prefixes=BMI2-FAST
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver5 | FileCheck %s --check-prefixes=BMI2-FAST
-; RUN: llc < %s -mtriple=x86_64-- -mcpu=znver6 | FileCheck %s --check-prefixes=BMI2-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=k8 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=opteron | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=athlon64 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=athlon-fx | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=k8-sse3 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=opteron-sse3 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=athlon64-sse3 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=amdfam10 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=btver1 | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=btver2 | FileCheck %s --check-prefixes=BMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=bdver1 | FileCheck %s --check-prefixes=BMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=bdver2 | FileCheck %s --check-prefixes=BMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=bdver3 | FileCheck %s --check-prefixes=BMI
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=bdver4 | FileCheck %s --check-prefixes=BMI2-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver1 | FileCheck %s --check-prefixes=BMI2-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver2 | FileCheck %s --check-prefixes=BMI2-SLOW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver3 | FileCheck %s --check-prefixes=BMI2-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver4 | FileCheck %s --check-prefixes=BMI2-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver5 | FileCheck %s --check-prefixes=BMI2-FAST
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mcpu=znver6 | FileCheck %s --check-prefixes=BMI2-FAST
; Verify that for the X86_64 processors that are known to have poor latency
; double precision shift instructions we do not generate 'shld' or 'shrd'
diff --git a/llvm/test/CodeGen/X86/x86-64-extend-shift.ll b/llvm/test/CodeGen/X86/x86-64-extend-shift.ll
index b73da1625969c..d2eb89a64aed4 100644
--- a/llvm/test/CodeGen/X86/x86-64-extend-shift.ll
+++ b/llvm/test/CodeGen/X86/x86-64-extend-shift.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; Formerly there were two shifts.
define i64 @baz(i32 %A) nounwind {
diff --git a/llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll b/llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll
index 5ff645b57bd1e..2aacdd1fd63a7 100644
--- a/llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/x86-64-flags-intrinsics.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -mtriple x86_64-linux < %s | FileCheck %s
-; RUN: llc -verify-machineinstrs -mtriple x86_64-windows < %s | FileCheck %s --check-prefix=WIN64
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple x86_64-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple x86_64-windows < %s | FileCheck %s --check-prefix=WIN64
declare i64 @llvm.x86.flags.read.u64()
declare void @llvm.x86.flags.write.u64(i64)
diff --git a/llvm/test/CodeGen/X86/x86-64-gv-offset.ll b/llvm/test/CodeGen/X86/x86-64-gv-offset.ll
index 13df5357f732e..e7799bbc3ebe6 100644
--- a/llvm/test/CodeGen/X86/x86-64-gv-offset.ll
+++ b/llvm/test/CodeGen/X86/x86-64-gv-offset.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
%struct.x = type { float, double }
@X = global %struct.x { float 1.000000e+00, double 2.000000e+00 }, align 16 ; <ptr> [#uses=2]
diff --git a/llvm/test/CodeGen/X86/x86-64-intrcc-nosse.ll b/llvm/test/CodeGen/X86/x86-64-intrcc-nosse.ll
index 02fdbff2d8a4e..849e689c3ecfd 100644
--- a/llvm/test/CodeGen/X86/x86-64-intrcc-nosse.ll
+++ b/llvm/test/CodeGen/X86/x86-64-intrcc-nosse.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=-sse < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=-sse < %s | FileCheck %s
%struct.interrupt_frame = type { i64, i64, i64, i64, i64 }
diff --git a/llvm/test/CodeGen/X86/x86-64-intrcc-uintr.ll b/llvm/test/CodeGen/X86/x86-64-intrcc-uintr.ll
index 1fe395b84d46c..5feace8967951 100644
--- a/llvm/test/CodeGen/X86/x86-64-intrcc-uintr.ll
+++ b/llvm/test/CodeGen/X86/x86-64-intrcc-uintr.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --no_x86_scrub_sp
-; RUN: llc < %s | FileCheck %s -check-prefixes=CHECK-USER
-; RUN: llc -O0 < %s | FileCheck %s -check-prefixes=CHECK0-USER
-; RUN: llc -code-model=kernel < %s | FileCheck %s -check-prefixes=CHECK-KERNEL
-; RUN: llc -O0 -code-model=kernel < %s | FileCheck %s -check-prefixes=CHECK0-KERNEL
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s -check-prefixes=CHECK-USER
+; RUN: llc -combiner-topological-sorting -O0 < %s | FileCheck %s -check-prefixes=CHECK0-USER
+; RUN: llc -combiner-topological-sorting -code-model=kernel < %s | FileCheck %s -check-prefixes=CHECK-KERNEL
+; RUN: llc -combiner-topological-sorting -O0 -code-model=kernel < %s | FileCheck %s -check-prefixes=CHECK0-KERNEL
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/x86-64-intrcc.ll b/llvm/test/CodeGen/X86/x86-64-intrcc.ll
index 5fc606eb566ea..a8efdbe200d5f 100644
--- a/llvm/test/CodeGen/X86/x86-64-intrcc.ll
+++ b/llvm/test/CodeGen/X86/x86-64-intrcc.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-unknown-unknown -O0 < %s | FileCheck %s -check-prefix=CHECK0
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -O0 < %s | FileCheck %s -check-prefix=CHECK0
%struct.interrupt_frame = type { i64, i64, i64, i64, i64 }
diff --git a/llvm/test/CodeGen/X86/x86-64-jumps.ll b/llvm/test/CodeGen/X86/x86-64-jumps.ll
index 390de7ca3c2af..11209890b9bc8 100644
--- a/llvm/test/CodeGen/X86/x86-64-jumps.ll
+++ b/llvm/test/CodeGen/X86/x86-64-jumps.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s
+; RUN: llc -combiner-topological-sorting < %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin10.0"
diff --git a/llvm/test/CodeGen/X86/x86-64-mem.ll b/llvm/test/CodeGen/X86/x86-64-mem.ll
index 58efa8b3db258..f4eb4e7bfc20a 100644
--- a/llvm/test/CodeGen/X86/x86-64-mem.ll
+++ b/llvm/test/CodeGen/X86/x86-64-mem.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefix=DARWIN
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=static | FileCheck %s --check-prefix=LINUX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s --check-prefix=DARWIN
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -relocation-model=static | FileCheck %s --check-prefix=LINUX
@ptr = external global ptr ; <ptr> [#uses=1]
@src = external global [0 x i32] ; <ptr> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/x86-64-ms_abi-vararg.ll b/llvm/test/CodeGen/X86/x86-64-ms_abi-vararg.ll
index 9b17f67ce38e4..674b5594e1fc6 100644
--- a/llvm/test/CodeGen/X86/x86-64-ms_abi-vararg.ll
+++ b/llvm/test/CodeGen/X86/x86-64-ms_abi-vararg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnu | FileCheck %s
; Verify that the var arg parameters which are passed in registers are stored
; in home stack slots allocated by the caller and that AP is correctly
diff --git a/llvm/test/CodeGen/X86/x86-64-pic-1.ll b/llvm/test/CodeGen/X86/x86-64-pic-1.ll
index 9a7e4e986ccdb..7e89db0a04cbf 100644
--- a/llvm/test/CodeGen/X86/x86-64-pic-1.ll
+++ b/llvm/test/CodeGen/X86/x86-64-pic-1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
define void @g() {
; CHECK-LABEL: g:
diff --git a/llvm/test/CodeGen/X86/x86-64-pic-10.ll b/llvm/test/CodeGen/X86/x86-64-pic-10.ll
index c46f86ebc3d7b..3a2da5415ba90 100644
--- a/llvm/test/CodeGen/X86/x86-64-pic-10.ll
+++ b/llvm/test/CodeGen/X86/x86-64-pic-10.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
@g = weak alias i32 (), ptr @f
diff --git a/llvm/test/CodeGen/X86/x86-64-pic-11.ll b/llvm/test/CodeGen/X86/x86-64-pic-11.ll
index 7155c3f7fa277..739a078506208 100644
--- a/llvm/test/CodeGen/X86/x86-64-pic-11.ll
+++ b/llvm/test/CodeGen/X86/x86-64-pic-11.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
define i128 @f(x86_fp80 %a) nounwind {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/x86-64-pic-12.ll b/llvm/test/CodeGen/X86/x86-64-pic-12.ll
index 6b88528bd9731..8545113e491c1 100644
--- a/llvm/test/CodeGen/X86/x86-64-pic-12.ll
+++ b/llvm/test/CodeGen/X86/x86-64-pic-12.ll
@@ -1,4 +1,4 @@
-; RUN: llc -o - %s -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - %s -relocation-model=pic | FileCheck %s
; Check that we do not get GOT relocations with the x86_64-pc-windows-macho
; triple.
target triple = "x86_64-pc-windows-macho"
diff --git a/llvm/test/CodeGen/X86/x86-64-pic-2.ll b/llvm/test/CodeGen/X86/x86-64-pic-2.ll
index 76117a69f01d1..4d4ded0d96342 100644
--- a/llvm/test/CodeGen/X86/x86-64-pic-2.ll
+++ b/llvm/test/CodeGen/X86/x86-64-pic-2.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
define void @g() {
; CHECK-LABEL: g:
diff --git a/llvm/test/CodeGen/X86/x86-64-pic-3.ll b/llvm/test/CodeGen/X86/x86-64-pic-3.ll
index 1b0ddc6fe5ad4..c83903ec54273 100644
--- a/llvm/test/CodeGen/X86/x86-64-pic-3.ll
+++ b/llvm/test/CodeGen/X86/x86-64-pic-3.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
; CHECK-NOT: {{callq f at PLT}}
diff --git a/llvm/test/CodeGen/X86/x86-64-pic-4.ll b/llvm/test/CodeGen/X86/x86-64-pic-4.ll
index 108a5d26de013..bce957db07c02 100644
--- a/llvm/test/CodeGen/X86/x86-64-pic-4.ll
+++ b/llvm/test/CodeGen/X86/x86-64-pic-4.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
@a = global i32 0
diff --git a/llvm/test/CodeGen/X86/x86-64-pic-5.ll b/llvm/test/CodeGen/X86/x86-64-pic-5.ll
index df498ecebf1da..1ba5b12989907 100644
--- a/llvm/test/CodeGen/X86/x86-64-pic-5.ll
+++ b/llvm/test/CodeGen/X86/x86-64-pic-5.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
@a = hidden global i32 0
diff --git a/llvm/test/CodeGen/X86/x86-64-pic-6.ll b/llvm/test/CodeGen/X86/x86-64-pic-6.ll
index cb04493ff511a..476ec5af1dce3 100644
--- a/llvm/test/CodeGen/X86/x86-64-pic-6.ll
+++ b/llvm/test/CodeGen/X86/x86-64-pic-6.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
@a = internal global i32 0
diff --git a/llvm/test/CodeGen/X86/x86-64-pic-7.ll b/llvm/test/CodeGen/X86/x86-64-pic-7.ll
index ef3a111e951ca..d3f93d9e08373 100644
--- a/llvm/test/CodeGen/X86/x86-64-pic-7.ll
+++ b/llvm/test/CodeGen/X86/x86-64-pic-7.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
define ptr @g() nounwind {
; CHECK-LABEL: g:
diff --git a/llvm/test/CodeGen/X86/x86-64-pic-8.ll b/llvm/test/CodeGen/X86/x86-64-pic-8.ll
index e09ccea88d530..3f7fa46c75a7f 100644
--- a/llvm/test/CodeGen/X86/x86-64-pic-8.ll
+++ b/llvm/test/CodeGen/X86/x86-64-pic-8.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
define ptr @g() {
; CHECK-LABEL: g:
diff --git a/llvm/test/CodeGen/X86/x86-64-pic-9.ll b/llvm/test/CodeGen/X86/x86-64-pic-9.ll
index 9d0ddc4c86600..79d617e02d1a0 100644
--- a/llvm/test/CodeGen/X86/x86-64-pic-9.ll
+++ b/llvm/test/CodeGen/X86/x86-64-pic-9.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
define ptr @g() nounwind {
; CHECK-LABEL: g:
diff --git a/llvm/test/CodeGen/X86/x86-64-pic.ll b/llvm/test/CodeGen/X86/x86-64-pic.ll
index 53c33466515f8..559ac744c0adc 100644
--- a/llvm/test/CodeGen/X86/x86-64-pic.ll
+++ b/llvm/test/CodeGen/X86/x86-64-pic.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -relocation-model=pic | FileCheck %s
@g1 = private global i8 1
define ptr @get_g1() {
diff --git a/llvm/test/CodeGen/X86/x86-64-psub.ll b/llvm/test/CodeGen/X86/x86-64-psub.ll
index 4c11464075ec9..e2d7aa24e3511 100644
--- a/llvm/test/CodeGen/X86/x86-64-psub.ll
+++ b/llvm/test/CodeGen/X86/x86-64-psub.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-pc-linux -mattr=mmx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -mattr=mmx < %s | FileCheck %s
; MMX packed sub opcodes were wrongly marked as commutative.
; This test checks that the operands of packed sub instructions are
diff --git a/llvm/test/CodeGen/X86/x86-64-ptr-arg-simple.ll b/llvm/test/CodeGen/X86/x86-64-ptr-arg-simple.ll
index 03d02ade23d25..2d32f557cd21c 100644
--- a/llvm/test/CodeGen/X86/x86-64-ptr-arg-simple.ll
+++ b/llvm/test/CodeGen/X86/x86-64-ptr-arg-simple.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-pc-linux < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnux32 < %s | FileCheck -check-prefix=X32ABI %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnux32 < %s | FileCheck -check-prefix=X32ABI %s
; %in is kept in %esi for both ABIs. But the pointer will be passed in %edi
; for x32, not %rdi
diff --git a/llvm/test/CodeGen/X86/x86-64-ret0.ll b/llvm/test/CodeGen/X86/x86-64-ret0.ll
index d3f5f74f2789c..9b38079b414f3 100644
--- a/llvm/test/CodeGen/X86/x86-64-ret0.ll
+++ b/llvm/test/CodeGen/X86/x86-64-ret0.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s
define i32 @f() nounwind {
; CHECK-LABEL: f:
diff --git a/llvm/test/CodeGen/X86/x86-64-shortint.ll b/llvm/test/CodeGen/X86/x86-64-shortint.ll
index 75f89023509dd..afe2485ac9193 100644
--- a/llvm/test/CodeGen/X86/x86-64-shortint.ll
+++ b/llvm/test/CodeGen/X86/x86-64-shortint.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
; CHECK: movswl
diff --git a/llvm/test/CodeGen/X86/x86-64-sret-return-2.ll b/llvm/test/CodeGen/X86/x86-64-sret-return-2.ll
index 908271a2d2e43..4fa272ba9288d 100644
--- a/llvm/test/CodeGen/X86/x86-64-sret-return-2.ll
+++ b/llvm/test/CodeGen/X86/x86-64-sret-return-2.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-apple-darwin8 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-pc-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin8 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux < %s | FileCheck %s
; FIXME: x32 doesn't know how to select this. This isn't a regression, it never
; worked.
diff --git a/llvm/test/CodeGen/X86/x86-64-sret-return.ll b/llvm/test/CodeGen/X86/x86-64-sret-return.ll
index a9f79c67ba03b..efe6b07560679 100644
--- a/llvm/test/CodeGen/X86/x86-64-sret-return.ll
+++ b/llvm/test/CodeGen/X86/x86-64-sret-return.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=x86_64-apple-darwin8 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-pc-linux < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-pc-linux-gnux32 < %s | FileCheck -check-prefix=X32ABI %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin8 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux-gnux32 < %s | FileCheck -check-prefix=X32ABI %s
%struct.foo = type { [4 x i64] }
diff --git a/llvm/test/CodeGen/X86/x86-64-stack-and-frame-ptr.ll b/llvm/test/CodeGen/X86/x86-64-stack-and-frame-ptr.ll
index 26be80ea58949..ac2252bef4cbc 100644
--- a/llvm/test/CodeGen/X86/x86-64-stack-and-frame-ptr.ll
+++ b/llvm/test/CodeGen/X86/x86-64-stack-and-frame-ptr.ll
@@ -1,5 +1,5 @@
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-pc-linux < %s | FileCheck %s
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-pc-linux-gnux32 < %s | FileCheck -check-prefix=X32ABI %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-pc-linux < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-pc-linux-gnux32 < %s | FileCheck -check-prefix=X32ABI %s
; x32 uses %esp, %ebp as stack and frame pointers
diff --git a/llvm/test/CodeGen/X86/x86-64-static-relo-movl.ll b/llvm/test/CodeGen/X86/x86-64-static-relo-movl.ll
index f68dff7cb7446..b0ee05a3dabca 100644
--- a/llvm/test/CodeGen/X86/x86-64-static-relo-movl.ll
+++ b/llvm/test/CodeGen/X86/x86-64-static-relo-movl.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-win32-macho -relocation-model=static -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-win32-macho -relocation-model=static -O0 < %s | FileCheck %s
; Ensure that we don't generate a movl and not a lea for a static relocation
; when compiling for 64 bit.
diff --git a/llvm/test/CodeGen/X86/x86-64-tls-1.ll b/llvm/test/CodeGen/X86/x86-64-tls-1.ll
index b786f41cce309..a0e5be1ec2528 100644
--- a/llvm/test/CodeGen/X86/x86-64-tls-1.ll
+++ b/llvm/test/CodeGen/X86/x86-64-tls-1.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
@tm_nest_level = internal thread_local global i32 0
define i64 @z() nounwind {
; CHECK: movq $tm_nest_level at TPOFF, %r[[R0:[abcd]]]x
diff --git a/llvm/test/CodeGen/X86/x86-64-veccallcc.ll b/llvm/test/CodeGen/X86/x86-64-veccallcc.ll
index a733b8959ec28..9cadc744b1a4a 100644
--- a/llvm/test/CodeGen/X86/x86-64-veccallcc.ll
+++ b/llvm/test/CodeGen/X86/x86-64-veccallcc.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-windows-msvc < %s | FileCheck %s
; Test 1st and 2nd arguments passed in XMM0 and XMM1.
; Test 7nd argument passed by reference in stack: 56(%rsp).
diff --git a/llvm/test/CodeGen/X86/x86-64-xmm-spill-unaligned.ll b/llvm/test/CodeGen/X86/x86-64-xmm-spill-unaligned.ll
index 595afec6100b5..aaf12275ea099 100644
--- a/llvm/test/CodeGen/X86/x86-64-xmm-spill-unaligned.ll
+++ b/llvm/test/CodeGen/X86/x86-64-xmm-spill-unaligned.ll
@@ -2,7 +2,7 @@
; elements (here: XMM spills) are accessed using instructions that tolerate
; unaligned access.
;
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -mattr=+sse,+sse-unaligned-mem --frame-pointer=all < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -mattr=+sse,+sse-unaligned-mem --frame-pointer=all < %s | FileCheck %s
define dso_local preserve_allcc void @func() #0 {
; CHECK-LABEL: func:
diff --git a/llvm/test/CodeGen/X86/x86-access-to-global.ll b/llvm/test/CodeGen/X86/x86-access-to-global.ll
index 9e09a035ac519..bf6113bf56c5f 100644
--- a/llvm/test/CodeGen/X86/x86-access-to-global.ll
+++ b/llvm/test/CodeGen/X86/x86-access-to-global.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
-; RUN: llc -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -relocation-model=pic < %s | FileCheck %s
target datalayout = "e-m:e-p:32:32-p270:32:32-p271:32:32-p272:64:64-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i386-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/x86-big-ret.ll b/llvm/test/CodeGen/X86/x86-big-ret.ll
index e01e1570c7974..b48d55d857887 100644
--- a/llvm/test/CodeGen/X86/x86-big-ret.ll
+++ b/llvm/test/CodeGen/X86/x86-big-ret.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s | FileCheck %s
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i386-pc-windows-msvc"
diff --git a/llvm/test/CodeGen/X86/x86-cmov-converter.ll b/llvm/test/CodeGen/X86/x86-cmov-converter.ll
index b02da217e76b2..aff99649e874b 100644
--- a/llvm/test/CodeGen/X86/x86-cmov-converter.ll
+++ b/llvm/test/CodeGen/X86/x86-cmov-converter.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-pc-linux -x86-cmov-converter=true -verify-machineinstrs -disable-block-placement < %s | FileCheck -allow-deprecated-dag-overlap %s
-; RUN: llc -mtriple=x86_64-pc-linux -x86-cmov-converter=true -x86-cmov-converter-force-all=true -verify-machineinstrs -disable-block-placement < %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=CHECK-FORCEALL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -x86-cmov-converter=true -verify-machineinstrs -disable-block-placement < %s | FileCheck -allow-deprecated-dag-overlap %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-pc-linux -x86-cmov-converter=true -x86-cmov-converter-force-all=true -verify-machineinstrs -disable-block-placement < %s | FileCheck -allow-deprecated-dag-overlap %s -check-prefix=CHECK-FORCEALL
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; This test checks that x86-cmov-converter optimization transform CMOV
diff --git a/llvm/test/CodeGen/X86/x86-flags-intrinsics.ll b/llvm/test/CodeGen/X86/x86-flags-intrinsics.ll
index 67cf0ef6e8b8f..63e02ff272ee3 100644
--- a/llvm/test/CodeGen/X86/x86-flags-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/x86-flags-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
target triple = "i686-pc-win32"
; Check that pushf/popf intrinsics on win32 don't need a frame pointer.
diff --git a/llvm/test/CodeGen/X86/x86-fold-pshufb.ll b/llvm/test/CodeGen/X86/x86-fold-pshufb.ll
index a07593390d09f..1d6644c27b297 100644
--- a/llvm/test/CodeGen/X86/x86-fold-pshufb.ll
+++ b/llvm/test/CodeGen/X86/x86-fold-pshufb.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -relocation-model=pic -mtriple=x86_64-unknown-unknown -mattr=+ssse3 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-unknown-unknown -mattr=+ssse3 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -relocation-model=pic -mtriple=x86_64-unknown-unknown -mattr=+ssse3 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -mattr=+ssse3 < %s | FileCheck %s
; Verify that the backend correctly folds the shuffle in function 'fold_pshufb'
; into a simple load from constant pool.
diff --git a/llvm/test/CodeGen/X86/x86-fp80-ret-no-x87.ll b/llvm/test/CodeGen/X86/x86-fp80-ret-no-x87.ll
index 5c507fdc8299b..74ec3a5e7d0d6 100644
--- a/llvm/test/CodeGen/X86/x86-fp80-ret-no-x87.ll
+++ b/llvm/test/CodeGen/X86/x86-fp80-ret-no-x87.ll
@@ -1,4 +1,4 @@
-; RUN: not llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=-x87 2>&1 | FileCheck %s
+; RUN: not llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu -mattr=-x87 2>&1 | FileCheck %s
; Verify that returning an x86_fp80 value with x87 disabled on x86_64 produces
; a clear, user-friendly diagnostic instead of crashing with
diff --git a/llvm/test/CodeGen/X86/x86-framelowering-trap.ll b/llvm/test/CodeGen/X86/x86-framelowering-trap.ll
index 89f4528fb06d7..8a33fbfec948b 100644
--- a/llvm/test/CodeGen/X86/x86-framelowering-trap.ll
+++ b/llvm/test/CodeGen/X86/x86-framelowering-trap.ll
@@ -1,4 +1,4 @@
-; RUN: llc %s -o - | FileCheck %s
+; RUN: llc -combiner-topological-sorting %s -o - | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
diff --git a/llvm/test/CodeGen/X86/x86-inline-asm-validation.ll b/llvm/test/CodeGen/X86/x86-inline-asm-validation.ll
index 56bdc48b0e4c6..f8c7d7845d03c 100644
--- a/llvm/test/CodeGen/X86/x86-inline-asm-validation.ll
+++ b/llvm/test/CodeGen/X86/x86-inline-asm-validation.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple i686-gnu -filetype asm -o - %s 2>&1 | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple i686-gnu -filetype asm -o - %s 2>&1 | FileCheck %s
define void @test_L_ff() {
entry:
diff --git a/llvm/test/CodeGen/X86/x86-interleaved-check.ll b/llvm/test/CodeGen/X86/x86-interleaved-check.ll
index 45e4164df2c41..c4447ae11b9ad 100644
--- a/llvm/test/CodeGen/X86/x86-interleaved-check.ll
+++ b/llvm/test/CodeGen/X86/x86-interleaved-check.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx2 | FileCheck %s --check-prefix=AVX
-; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx512f -mattr=+avx512bw | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mattr=+avx | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mattr=+avx2 | FileCheck %s --check-prefix=AVX
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux -mattr=+avx512f -mattr=+avx512bw | FileCheck %s --check-prefix=AVX
define void @validate() {
; AVX-LABEL: validate:
diff --git a/llvm/test/CodeGen/X86/x86-interrupt_cc.ll b/llvm/test/CodeGen/X86/x86-interrupt_cc.ll
index ff40a3404d5ef..06cf9455f7083 100644
--- a/llvm/test/CodeGen/X86/x86-interrupt_cc.ll
+++ b/llvm/test/CodeGen/X86/x86-interrupt_cc.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-macosx -show-mc-encoding -mcpu=knl < %s | FileCheck %s -check-prefix=CHECK64-KNL
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-apple-macosx -show-mc-encoding -mcpu=skx < %s | FileCheck %s -check-prefix=CHECK64-SKX
-; RUN: llc -verify-machineinstrs -mtriple=i386-apple-macosx -show-mc-encoding -mcpu=knl < %s | FileCheck %s -check-prefix=CHECK32-KNL
-; RUN: llc -verify-machineinstrs -mtriple=i386-apple-macosx -show-mc-encoding -mcpu=skx < %s | FileCheck %s -check-prefix=CHECK32-SKX
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-apple-macosx -show-mc-encoding -mcpu=knl < %s | FileCheck %s -check-prefix=CHECK64-KNL
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-apple-macosx -show-mc-encoding -mcpu=skx < %s | FileCheck %s -check-prefix=CHECK64-SKX
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i386-apple-macosx -show-mc-encoding -mcpu=knl < %s | FileCheck %s -check-prefix=CHECK32-KNL
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=i386-apple-macosx -show-mc-encoding -mcpu=skx < %s | FileCheck %s -check-prefix=CHECK32-SKX
; Make sure we spill the high numbered zmm registers and K registers with the right encoding.
diff --git a/llvm/test/CodeGen/X86/x86-interrupt_cld.ll b/llvm/test/CodeGen/X86/x86-interrupt_cld.ll
index 58cfcaa2b6d89..dffee468d9ad7 100644
--- a/llvm/test/CodeGen/X86/x86-interrupt_cld.ll
+++ b/llvm/test/CodeGen/X86/x86-interrupt_cld.ll
@@ -1,4 +1,4 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Checks that interrupt handler code calls cld before calling an external
diff --git a/llvm/test/CodeGen/X86/x86-interrupt_vzeroupper.ll b/llvm/test/CodeGen/X86/x86-interrupt_vzeroupper.ll
index 3bca3916595a2..33c18f5a692f3 100644
--- a/llvm/test/CodeGen/X86/x86-interrupt_vzeroupper.ll
+++ b/llvm/test/CodeGen/X86/x86-interrupt_vzeroupper.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs -mtriple=x86_64-unknown-unknown -mattr=+avx < %s | FileCheck %s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; Checks that interrupt handler code does not call "vzeroupper" instruction
diff --git a/llvm/test/CodeGen/X86/x86-mixed-alignment-dagcombine.ll b/llvm/test/CodeGen/X86/x86-mixed-alignment-dagcombine.ll
index 017dc3c0582ec..7f70ce699d063 100644
--- a/llvm/test/CodeGen/X86/x86-mixed-alignment-dagcombine.ll
+++ b/llvm/test/CodeGen/X86/x86-mixed-alignment-dagcombine.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-apple-macosx10.9.0 -mcpu=core2 -mattr=+64bit,+sse2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-macosx10.9.0 -mcpu=core2 -mattr=+64bit,+sse2 < %s | FileCheck %s
; DAGCombine may choose to rewrite 2 loads feeding a select as a select of
; addresses feeding a load. This test ensures that when it does that it creates
diff --git a/llvm/test/CodeGen/X86/x86-no_callee_saved_registers.ll b/llvm/test/CodeGen/X86/x86-no_callee_saved_registers.ll
index 0b0344128a12e..7ca17a01b0aa7 100644
--- a/llvm/test/CodeGen/X86/x86-no_callee_saved_registers.ll
+++ b/llvm/test/CodeGen/X86/x86-no_callee_saved_registers.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown -O0 < %s | FileCheck --check-prefixes=CHECK,CHECK-O0 %s
-; RUN: llc -mtriple=x86_64-unknown-unknown -O3 < %s | FileCheck --check-prefixes=CHECK,CHECK-O3 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -O0 < %s | FileCheck --check-prefixes=CHECK,CHECK-O0 %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -O3 < %s | FileCheck --check-prefixes=CHECK,CHECK-O3 %s
declare void @external()
declare void @no_csr() "no_callee_saved_registers"
diff --git a/llvm/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll b/llvm/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll
index 77e41cbd8ce18..e0a59951270a7 100644
--- a/llvm/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll
+++ b/llvm/test/CodeGen/X86/x86-no_caller_saved_registers-preserve.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
;; In functions with 'no_caller_saved_registers' attribute, all registers should
;; be preserved except for registers used for passing/returning arguments.
diff --git a/llvm/test/CodeGen/X86/x86-no_caller_saved_registers.ll b/llvm/test/CodeGen/X86/x86-no_caller_saved_registers.ll
index b9ad39806d1ae..0284e1a69d025 100644
--- a/llvm/test/CodeGen/X86/x86-no_caller_saved_registers.ll
+++ b/llvm/test/CodeGen/X86/x86-no_caller_saved_registers.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-unknown-unknown -O0 < %s | FileCheck %s
-; RUN: llc -mtriple=i686-unknown-unknown -mattr=+sse2 < %s | FileCheck %s
-; RUN: llc -mtriple=i686-unknown-unknown -mattr=+sse2 -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-unknown -O0 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown -mattr=+sse2 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=i686-unknown-unknown -mattr=+sse2 -O0 < %s | FileCheck %s
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; In functions with 'no_caller_saved_registers' attribute, all registers should
diff --git a/llvm/test/CodeGen/X86/x86-regcall-got.ll b/llvm/test/CodeGen/X86/x86-regcall-got.ll
index d23c9c8b84121..fdfaf5587c5d7 100644
--- a/llvm/test/CodeGen/X86/x86-regcall-got.ll
+++ b/llvm/test/CodeGen/X86/x86-regcall-got.ll
@@ -1,4 +1,4 @@
-; RUN: llc -O0 -mtriple=i386-unknown-linux-gnu -relocation-model=pic < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=i386-unknown-linux-gnu -relocation-model=pic < %s | FileCheck %s
; Unbind the ebx with GOT address in regcall calling convention, or the following
; case will failed in register allocation by no register can be used.
diff --git a/llvm/test/CodeGen/X86/x86-repmov-copy-eflags.ll b/llvm/test/CodeGen/X86/x86-repmov-copy-eflags.ll
index 8fac026c70963..16aee00921dd2 100644
--- a/llvm/test/CodeGen/X86/x86-repmov-copy-eflags.ll
+++ b/llvm/test/CodeGen/X86/x86-repmov-copy-eflags.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -verify-machineinstrs < %s | FileCheck %s
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i686-pc-windows-msvc18.0.0"
diff --git a/llvm/test/CodeGen/X86/x86-sanitizer-shrink-wrapping.ll b/llvm/test/CodeGen/X86/x86-sanitizer-shrink-wrapping.ll
index 4379c408531c1..d17ab5f683d4e 100644
--- a/llvm/test/CodeGen/X86/x86-sanitizer-shrink-wrapping.ll
+++ b/llvm/test/CodeGen/X86/x86-sanitizer-shrink-wrapping.ll
@@ -1,4 +1,4 @@
-; RUN: llc -o - < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -o - < %s | FileCheck %s
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "x86_64-apple-macosx"
diff --git a/llvm/test/CodeGen/X86/x86-setcc-int-to-fp-combine.ll b/llvm/test/CodeGen/X86/x86-setcc-int-to-fp-combine.ll
index f4c13f8794c9e..7d0d554548117 100644
--- a/llvm/test/CodeGen/X86/x86-setcc-int-to-fp-combine.ll
+++ b/llvm/test/CodeGen/X86/x86-setcc-int-to-fp-combine.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
define <4 x float> @foo(<4 x float> %val, <4 x float> %test) nounwind {
; CHECK-LABEL: LCPI0_0:
diff --git a/llvm/test/CodeGen/X86/x86-shifts.ll b/llvm/test/CodeGen/X86/x86-shifts.ll
index 8d469a39a5700..e5116d521464b 100644
--- a/llvm/test/CodeGen/X86/x86-shifts.ll
+++ b/llvm/test/CodeGen/X86/x86-shifts.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,X64
; Splat patterns below
diff --git a/llvm/test/CodeGen/X86/x86-shrink-wrap-unwind.ll b/llvm/test/CodeGen/X86/x86-shrink-wrap-unwind.ll
index 02d4d88a21682..bc54955630cb8 100644
--- a/llvm/test/CodeGen/X86/x86-shrink-wrap-unwind.ll
+++ b/llvm/test/CodeGen/X86/x86-shrink-wrap-unwind.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc -mtriple=x86_64-apple-darwin10.6 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-linux < %s | FileCheck %s --check-prefix=NOCOMPACTUNWIND
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-apple-darwin10.6 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux < %s | FileCheck %s --check-prefix=NOCOMPACTUNWIND
;
; Note: This test cannot be merged with the shrink-wrapping tests
; because the booleans set on the command line take precedence on
diff --git a/llvm/test/CodeGen/X86/x86-store-gv-addr.ll b/llvm/test/CodeGen/X86/x86-store-gv-addr.ll
index d4f6c2a50ccdf..a70dd53932bd2 100644
--- a/llvm/test/CodeGen/X86/x86-store-gv-addr.ll
+++ b/llvm/test/CodeGen/X86/x86-store-gv-addr.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -relocation-model=static | FileCheck %s --check-prefix=x86_64-darwin
-; RUN: llc < %s -mtriple=x86_64-pc-linux-gnu -relocation-model=static | FileCheck %s --check-prefix=x86_64-linux
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin -relocation-model=static | FileCheck %s --check-prefix=x86_64-darwin
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-pc-linux-gnu -relocation-model=static | FileCheck %s --check-prefix=x86_64-linux
@v = external global i32, align 8
@v_addr = external global ptr, align 8
diff --git a/llvm/test/CodeGen/X86/x86-upgrade-avx-vbroadcast.ll b/llvm/test/CodeGen/X86/x86-upgrade-avx-vbroadcast.ll
index d9a97d2a128e5..ae8191c622163 100644
--- a/llvm/test/CodeGen/X86/x86-upgrade-avx-vbroadcast.ll
+++ b/llvm/test/CodeGen/X86/x86-upgrade-avx-vbroadcast.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-macosx10.9.0 -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-macosx10.9.0 -mattr=+avx | FileCheck %s
; Check that we properly upgrade the AVX vbroadcast intrinsics to IR. The
; expectation is that we should still get the original instruction back that
diff --git a/llvm/test/CodeGen/X86/x86-win64-shrink-wrapping.ll b/llvm/test/CodeGen/X86/x86-win64-shrink-wrapping.ll
index 8eccfe6664166..6e5a965c900fb 100644
--- a/llvm/test/CodeGen/X86/x86-win64-shrink-wrapping.ll
+++ b/llvm/test/CodeGen/X86/x86-win64-shrink-wrapping.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
-; RUN: llc %s -o - -enable-shrink-wrap=true | FileCheck %s --check-prefix=ENABLE
-; RUN: llc %s -o - -enable-shrink-wrap=false | FileCheck %s --check-prefix=DISABLE
+; RUN: llc -combiner-topological-sorting %s -o - -enable-shrink-wrap=true | FileCheck %s --check-prefix=ENABLE
+; RUN: llc -combiner-topological-sorting %s -o - -enable-shrink-wrap=false | FileCheck %s --check-prefix=DISABLE
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
target triple = "x86_64--windows-gnu"
diff --git a/llvm/test/CodeGen/X86/x86_64-mul-by-const.ll b/llvm/test/CodeGen/X86/x86_64-mul-by-const.ll
index df48a29156caa..3907b3fd078e3 100644
--- a/llvm/test/CodeGen/X86/x86_64-mul-by-const.ll
+++ b/llvm/test/CodeGen/X86/x86_64-mul-by-const.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
; Formerly there were two shifts. rdar://8771012.
define i32 @f9188_mul365384439_shift27(i32 %A) nounwind {
diff --git a/llvm/test/CodeGen/X86/x87.ll b/llvm/test/CodeGen/X86/x87.ll
index aa0d1c5206b63..3ea786e011f04 100644
--- a/llvm/test/CodeGen/X86/x87.ll
+++ b/llvm/test/CodeGen/X86/x87.ll
@@ -1,9 +1,9 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s -check-prefixes=X8732,X87
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-sse | FileCheck %s -check-prefixes=X8732,X87
-; RUN: llc < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s -check-prefixes=NOX8732,NOX87
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,-sse | FileCheck %s -check-prefixes=NOX8732,NOX87
-; RUN: llc < %s -mtriple=i686-- -mattr=-x87,+sse | FileCheck %s -check-prefixes=NOX8732,NOX87
-; RUN: llc < %s -mtriple=x86_64-- -mattr=-x87,-sse2 | FileCheck %s -check-prefixes=NOX87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s -check-prefixes=X8732,X87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-sse | FileCheck %s -check-prefixes=X8732,X87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-x87 | FileCheck %s -check-prefixes=NOX8732,NOX87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-x87,-sse | FileCheck %s -check-prefixes=NOX8732,NOX87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- -mattr=-x87,+sse | FileCheck %s -check-prefixes=NOX8732,NOX87
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=-x87,-sse2 | FileCheck %s -check-prefixes=NOX87
define void @test(i32 %i, i64 %l, ptr %pf, ptr %pd, ptr %pld) nounwind readnone {
; X87-LABEL: test:
diff --git a/llvm/test/CodeGen/X86/xaluo.ll b/llvm/test/CodeGen/X86/xaluo.ll
index c2a8002c949ce..4959ba8c9b55e 100644
--- a/llvm/test/CodeGen/X86/xaluo.ll
+++ b/llvm/test/CodeGen/X86/xaluo.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefixes=CHECK,SDAG,GENERIC
-; RUN: llc -mtriple=x86_64-darwin-unknown -fast-isel -fast-isel-abort=1 < %s | FileCheck %s --check-prefixes=CHECK,FAST
-; RUN: llc -mtriple=x86_64-darwin-unknown -mcpu=knl < %s | FileCheck %s --check-prefixes=CHECK,SDAG,KNL
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefixes=CHECK,SDAG,GENERIC
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-darwin-unknown -fast-isel -fast-isel-abort=1 < %s | FileCheck %s --check-prefixes=CHECK,FAST
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-darwin-unknown -mcpu=knl < %s | FileCheck %s --check-prefixes=CHECK,SDAG,KNL
;
; Get the actual value of the overflow bit.
diff --git a/llvm/test/CodeGen/X86/xaluo128.ll b/llvm/test/CodeGen/X86/xaluo128.ll
index 977df0f16bb28..88be9fde91afd 100644
--- a/llvm/test/CodeGen/X86/xaluo128.ll
+++ b/llvm/test/CodeGen/X86/xaluo128.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefix=X64
-; RUN: llc -mtriple=i686-darwin-unknown < %s | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting -mtriple=i686-darwin-unknown < %s | FileCheck %s --check-prefix=X86
define zeroext i1 @saddoi128(i128 %v1, i128 %v2, ptr %res) nounwind {
; X64-LABEL: saddoi128:
diff --git a/llvm/test/CodeGen/X86/xchg-nofold.ll b/llvm/test/CodeGen/X86/xchg-nofold.ll
index 16f07ad954abb..238df6a50df01 100644
--- a/llvm/test/CodeGen/X86/xchg-nofold.ll
+++ b/llvm/test/CodeGen/X86/xchg-nofold.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mtriple=x86_64-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-linux-gnu < %s | FileCheck %s
%"struct.std::atomic" = type { %"struct.std::atomic_bool" }
%"struct.std::atomic_bool" = type { %"struct.std::__atomic_base" }
diff --git a/llvm/test/CodeGen/X86/xmm-r64.ll b/llvm/test/CodeGen/X86/xmm-r64.ll
index 9fe5376a9d4f5..ba3d24d5303fe 100644
--- a/llvm/test/CodeGen/X86/xmm-r64.ll
+++ b/llvm/test/CodeGen/X86/xmm-r64.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64--
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64--
define <4 x i32> @test() {
%tmp1039 = call <4 x i32> @llvm.x86.sse2.psll.d( <4 x i32> zeroinitializer, <4 x i32> zeroinitializer ) ; <<4 x i32>> [#uses=1]
diff --git a/llvm/test/CodeGen/X86/xmm-vararg-noopt.ll b/llvm/test/CodeGen/X86/xmm-vararg-noopt.ll
index d11b3d5d79b73..f3c831eecef0d 100644
--- a/llvm/test/CodeGen/X86/xmm-vararg-noopt.ll
+++ b/llvm/test/CodeGen/X86/xmm-vararg-noopt.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -O0 -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -O0 -mtriple=x86_64-unknown-unknown < %s | FileCheck %s
; ModuleID = 'variadic.c'
source_filename = "variadic.c"
diff --git a/llvm/test/CodeGen/X86/xmulo.ll b/llvm/test/CodeGen/X86/xmulo.ll
index a076d0d762aa3..54476744da70e 100644
--- a/llvm/test/CodeGen/X86/xmulo.ll
+++ b/llvm/test/CodeGen/X86/xmulo.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -disable-peephole -mtriple=x86_64-linux-unknown < %s | FileCheck %s --check-prefixes=CHECK,LINUX,SDAG
-; RUN: llc -disable-peephole -mtriple=x86_64-linux-unknown -fast-isel -fast-isel-abort=1 < %s | FileCheck %s --check-prefixes=CHECK,LINUX,FAST
-; RUN: llc -disable-peephole -mtriple=x86_64-linux-unknown -mcpu=knl < %s | FileCheck %s --check-prefixes=CHECK,LINUX,SDAG
-; RUN: llc -disable-peephole -mtriple=x86_64-pc-win32 < %s | FileCheck %s --check-prefixes=CHECK,WIN64
-; RUN: llc -disable-peephole -mtriple=i386-pc-win32 < %s | FileCheck %s --check-prefix=WIN32
+; RUN: llc -combiner-topological-sorting -disable-peephole -mtriple=x86_64-linux-unknown < %s | FileCheck %s --check-prefixes=CHECK,LINUX,SDAG
+; RUN: llc -combiner-topological-sorting -disable-peephole -mtriple=x86_64-linux-unknown -fast-isel -fast-isel-abort=1 < %s | FileCheck %s --check-prefixes=CHECK,LINUX,FAST
+; RUN: llc -combiner-topological-sorting -disable-peephole -mtriple=x86_64-linux-unknown -mcpu=knl < %s | FileCheck %s --check-prefixes=CHECK,LINUX,SDAG
+; RUN: llc -combiner-topological-sorting -disable-peephole -mtriple=x86_64-pc-win32 < %s | FileCheck %s --check-prefixes=CHECK,WIN64
+; RUN: llc -combiner-topological-sorting -disable-peephole -mtriple=i386-pc-win32 < %s | FileCheck %s --check-prefix=WIN32
define {i64, i1} @t1() nounwind {
; CHECK-LABEL: t1:
diff --git a/llvm/test/CodeGen/X86/xop-ifma.ll b/llvm/test/CodeGen/X86/xop-ifma.ll
index df226933de919..3bdd938c554f3 100644
--- a/llvm/test/CodeGen/X86/xop-ifma.ll
+++ b/llvm/test/CodeGen/X86/xop-ifma.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=XOP --check-prefix=XOP-AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=XOP --check-prefix=XOP-AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefix=XOP --check-prefix=XOP-AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s --check-prefix=XOP --check-prefix=XOP-AVX2
define <8 x i16> @test_mul_v8i16_add_v8i16(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2) {
; XOP-LABEL: test_mul_v8i16_add_v8i16:
diff --git a/llvm/test/CodeGen/X86/xop-intrinsics-fast-isel.ll b/llvm/test/CodeGen/X86/xop-intrinsics-fast-isel.ll
index 821816d58e7c5..7ac329633b619 100644
--- a/llvm/test/CodeGen/X86/xop-intrinsics-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/xop-intrinsics-fast-isel.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+avx,+fma4,+xop | FileCheck %s
-; RUN: llc < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+xop | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=i686-unknown-unknown -mattr=+avx,+fma4,+xop | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -fast-isel -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+xop | FileCheck %s
; NOTE: This should use IR equivalent to what is generated by clang/test/CodeGen/xop-builtins.c
diff --git a/llvm/test/CodeGen/X86/xop-intrinsics-x86_64-upgrade.ll b/llvm/test/CodeGen/X86/xop-intrinsics-x86_64-upgrade.ll
index 1a40c22648d9c..c4857dd1ca560 100644
--- a/llvm/test/CodeGen/X86/xop-intrinsics-x86_64-upgrade.ll
+++ b/llvm/test/CodeGen/X86/xop-intrinsics-x86_64-upgrade.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+xop | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+xop | FileCheck %s
define <2 x double> @test_int_x86_xop_vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2pd:
diff --git a/llvm/test/CodeGen/X86/xop-intrinsics-x86_64.ll b/llvm/test/CodeGen/X86/xop-intrinsics-x86_64.ll
index 2ca5c037857e2..d077437d53797 100644
--- a/llvm/test/CodeGen/X86/xop-intrinsics-x86_64.ll
+++ b/llvm/test/CodeGen/X86/xop-intrinsics-x86_64.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+xop | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+fma4,+xop | FileCheck %s
define <2 x double> @test_int_x86_xop_vpermil2pd(<2 x double> %a0, <2 x double> %a1, <2 x i64> %a2) {
; CHECK-LABEL: test_int_x86_xop_vpermil2pd:
diff --git a/llvm/test/CodeGen/X86/xop-mask-comments.ll b/llvm/test/CodeGen/X86/xop-mask-comments.ll
index 92577e8ba8cd8..7b0e955d21d6e 100644
--- a/llvm/test/CodeGen/X86/xop-mask-comments.ll
+++ b/llvm/test/CodeGen/X86/xop-mask-comments.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s --check-prefixes=CHECK,X64
;
; VPPERM
diff --git a/llvm/test/CodeGen/X86/xop-pcmov.ll b/llvm/test/CodeGen/X86/xop-pcmov.ll
index 4e8abc0d4b6c4..6bb3cd185b866 100644
--- a/llvm/test/CodeGen/X86/xop-pcmov.ll
+++ b/llvm/test/CodeGen/X86/xop-pcmov.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+xop | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+xop | FileCheck %s
define <4 x double> @pcmov_4f64(<4 x double> %a, <4 x double> %b, <4 x double> %m) {
; CHECK-LABEL: pcmov_4f64:
diff --git a/llvm/test/CodeGen/X86/xor-combine-debugloc.ll b/llvm/test/CodeGen/X86/xor-combine-debugloc.ll
index ab4fba703bb4c..e15bde4960393 100644
--- a/llvm/test/CodeGen/X86/xor-combine-debugloc.ll
+++ b/llvm/test/CodeGen/X86/xor-combine-debugloc.ll
@@ -1,4 +1,4 @@
-; RUN: llc -stop-after=finalize-isel < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -stop-after=finalize-isel < %s | FileCheck %s
;
; Make sure that when the entry block of IR below is lowered, an instruction
; that implictly defines $eflags has a same debug location with the icmp
diff --git a/llvm/test/CodeGen/X86/xor-icmp.ll b/llvm/test/CodeGen/X86/xor-icmp.ll
index 16a3b6cb855a7..bc5f069db6e33 100644
--- a/llvm/test/CodeGen/X86/xor-icmp.ll
+++ b/llvm/test/CodeGen/X86/xor-icmp.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown | FileCheck %s --check-prefix=X64
; rdar://7367229
define i32 @t(i32 %a, i32 %b) nounwind ssp {
diff --git a/llvm/test/CodeGen/X86/xor-lea.ll b/llvm/test/CodeGen/X86/xor-lea.ll
index d50752e48d293..0c04ecc94dc9c 100644
--- a/llvm/test/CodeGen/X86/xor-lea.ll
+++ b/llvm/test/CodeGen/X86/xor-lea.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+bmi | FileCheck %s --check-prefixes=X64
; PR52267
; InstCombine transforms an 'add' with min-signed-value into an 'xor'.
diff --git a/llvm/test/CodeGen/X86/xor-not-combine.ll b/llvm/test/CodeGen/X86/xor-not-combine.ll
index af65ade35ce8d..9a5c3fc14e370 100644
--- a/llvm/test/CodeGen/X86/xor-not-combine.ll
+++ b/llvm/test/CodeGen/X86/xor-not-combine.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
; Test for DAG combine: fold (not (sub Y, X)) -> (add X, ~Y)
; when Y is a constant.
diff --git a/llvm/test/CodeGen/X86/xor-with-overflow.ll b/llvm/test/CodeGen/X86/xor-with-overflow.ll
index 5d22302d39add..3da9b6c505cbb 100644
--- a/llvm/test/CodeGen/X86/xor-with-overflow.ll
+++ b/llvm/test/CodeGen/X86/xor-with-overflow.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mattr=+cmov | FileCheck %s --check-prefix=X64
;
; PR48768 - 'xor' clears the overflow flag, so we don't need a separate 'test'.
diff --git a/llvm/test/CodeGen/X86/xray-attribute-instrumentation.ll b/llvm/test/CodeGen/X86/xray-attribute-instrumentation.ll
index 8b4809855f92a..1c3d94d80de36 100644
--- a/llvm/test/CodeGen/X86/xray-attribute-instrumentation.ll
+++ b/llvm/test/CodeGen/X86/xray-attribute-instrumentation.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,CHECK-LINUX
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic < %s | FileCheck %s --check-prefixes=CHECK,CHECK-LINUX
-; RUN: llc -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefixes=CHECK,CHECK-MACOS
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,CHECK-LINUX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic < %s | FileCheck %s --check-prefixes=CHECK,CHECK-LINUX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefixes=CHECK,CHECK-MACOS
define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always" {
; CHECK: .p2align 1
diff --git a/llvm/test/CodeGen/X86/xray-custom-log.ll b/llvm/test/CodeGen/X86/xray-custom-log.ll
index f4cdc23687919..15d070858546b 100644
--- a/llvm/test/CodeGen/X86/xray-custom-log.ll
+++ b/llvm/test/CodeGen/X86/xray-custom-log.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64 < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64 -relocation-model=pic < %s | FileCheck %s --check-prefix=PIC
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64 -relocation-model=pic < %s | FileCheck %s --check-prefix=PIC
define i32 @customevent() nounwind "function-instrument"="xray-always" !dbg !1 {
%eventptr = alloca i8
diff --git a/llvm/test/CodeGen/X86/xray-ignore-loop-detection.ll b/llvm/test/CodeGen/X86/xray-ignore-loop-detection.ll
index 29c9bea7509c8..c07c25a458432 100644
--- a/llvm/test/CodeGen/X86/xray-ignore-loop-detection.ll
+++ b/llvm/test/CodeGen/X86/xray-ignore-loop-detection.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-darwin-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-darwin-unknown < %s | FileCheck %s
define i32 @foo(i32 %i) nounwind noinline uwtable "xray-instruction-threshold"="10" "xray-ignore-loops" {
entry:
diff --git a/llvm/test/CodeGen/X86/xray-log-args.ll b/llvm/test/CodeGen/X86/xray-log-args.ll
index 240a6392f276c..63b3394e9c92d 100644
--- a/llvm/test/CodeGen/X86/xray-log-args.ll
+++ b/llvm/test/CodeGen/X86/xray-log-args.ll
@@ -1,7 +1,7 @@
; When logging arguments is specified, emit the entry sled accordingly.
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,CHECK-LINUX
-; RUN: llc -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefixes=CHECK,CHECK-MACOS
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,CHECK-LINUX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefixes=CHECK,CHECK-MACOS
define i32 @callee(i32 %arg) nounwind noinline uwtable "function-instrument"="xray-always" "xray-log-args"="1" {
ret i32 %arg
diff --git a/llvm/test/CodeGen/X86/xray-loop-detection.ll b/llvm/test/CodeGen/X86/xray-loop-detection.ll
index 81450da7408ef..a4a2638f4028c 100644
--- a/llvm/test/CodeGen/X86/xray-loop-detection.ll
+++ b/llvm/test/CodeGen/X86/xray-loop-detection.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-darwin-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-darwin-unknown < %s | FileCheck %s
define i32 @foo(i32 %i) nounwind noinline uwtable "xray-instruction-threshold"="10" {
entry:
diff --git a/llvm/test/CodeGen/X86/xray-partial-instrumentation-skip-entry.ll b/llvm/test/CodeGen/X86/xray-partial-instrumentation-skip-entry.ll
index 51b047c5a0e63..5115dda0e148e 100644
--- a/llvm/test/CodeGen/X86/xray-partial-instrumentation-skip-entry.ll
+++ b/llvm/test/CodeGen/X86/xray-partial-instrumentation-skip-entry.ll
@@ -1,6 +1,6 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,CHECK-LINUX
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic < %s | FileCheck %s --check-prefixes=CHECK,CHECK-LINUX
-; RUN: llc -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefixes=CHECK,CHECK-MACOS
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,CHECK-LINUX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic < %s | FileCheck %s --check-prefixes=CHECK,CHECK-LINUX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefixes=CHECK,CHECK-MACOS
define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always" "xray-skip-entry" {
; CHECK-NOT: Lxray_sled_0:
diff --git a/llvm/test/CodeGen/X86/xray-partial-instrumentation-skip-exit.ll b/llvm/test/CodeGen/X86/xray-partial-instrumentation-skip-exit.ll
index ab841d734a23e..147d181c8f374 100644
--- a/llvm/test/CodeGen/X86/xray-partial-instrumentation-skip-exit.ll
+++ b/llvm/test/CodeGen/X86/xray-partial-instrumentation-skip-exit.ll
@@ -1,7 +1,7 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
-; RUN: llc \
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting \
; RUN: -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic < %s | FileCheck %s
-; RUN: llc -mtriple=x86_64-darwin-unknown < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-darwin-unknown < %s | FileCheck %s
define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always" "xray-skip-exit" {
; CHECK: .p2align 1
diff --git a/llvm/test/CodeGen/X86/xray-section-group.ll b/llvm/test/CodeGen/X86/xray-section-group.ll
index 1f2855b089d22..e070ab2ddf996 100644
--- a/llvm/test/CodeGen/X86/xray-section-group.ll
+++ b/llvm/test/CodeGen/X86/xray-section-group.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu -function-sections < %s | FileCheck %s
-; RUN: llc -filetype=obj -o %t -mtriple=x86_64-unknown-linux-gnu -function-sections < %s
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu -function-sections < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -filetype=obj -o %t -mtriple=x86_64-unknown-linux-gnu -function-sections < %s
; RUN: llvm-objdump --disassemble-all %t | FileCheck %s --check-prefix=CHECK-OBJ
define i32 @foo() nounwind noinline uwtable "function-instrument"="xray-always" {
diff --git a/llvm/test/CodeGen/X86/xray-selective-instrumentation-miss.ll b/llvm/test/CodeGen/X86/xray-selective-instrumentation-miss.ll
index 758abb11eb050..33b57e62e72d7 100644
--- a/llvm/test/CodeGen/X86/xray-selective-instrumentation-miss.ll
+++ b/llvm/test/CodeGen/X86/xray-selective-instrumentation-miss.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -mcpu=nehalem < %s | FileCheck %s
+; RUN: llc -combiner-topological-sorting -mcpu=nehalem < %s | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/xray-selective-instrumentation.ll b/llvm/test/CodeGen/X86/xray-selective-instrumentation.ll
index 868c35363f6e9..6776a7bd5f400 100644
--- a/llvm/test/CodeGen/X86/xray-selective-instrumentation.ll
+++ b/llvm/test/CodeGen/X86/xray-selective-instrumentation.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mcpu=nehalem | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mcpu=nehalem | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
target triple = "x86_64-apple-darwin8"
diff --git a/llvm/test/CodeGen/X86/xray-tail-call-sled.ll b/llvm/test/CodeGen/X86/xray-tail-call-sled.ll
index 91b91f5360f92..11793d16e8c5c 100644
--- a/llvm/test/CodeGen/X86/xray-tail-call-sled.ll
+++ b/llvm/test/CodeGen/X86/xray-tail-call-sled.ll
@@ -1,5 +1,5 @@
-; RUN: llc -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,CHECK-LINUX
-; RUN: llc -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefixes=CHECK,CHECK-MACOS
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s --check-prefixes=CHECK,CHECK-LINUX
+; RUN: llc -combiner-topological-sorting -mtriple=x86_64-darwin-unknown < %s | FileCheck %s --check-prefixes=CHECK,CHECK-MACOS
define dso_local i32 @callee() nounwind noinline uwtable "function-instrument"="xray-always" {
; CHECK: .p2align 1
diff --git a/llvm/test/CodeGen/X86/xtest.ll b/llvm/test/CodeGen/X86/xtest.ll
index 005e41fd6505f..a098fa2d123a3 100644
--- a/llvm/test/CodeGen/X86/xtest.ll
+++ b/llvm/test/CodeGen/X86/xtest.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+rtm | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+rtm | FileCheck %s
declare i32 @llvm.x86.xtest() nounwind
diff --git a/llvm/test/CodeGen/X86/ymm-ordering.ll b/llvm/test/CodeGen/X86/ymm-ordering.ll
index 65874bd4a5ac0..c3205f3765f5d 100644
--- a/llvm/test/CodeGen/X86/ymm-ordering.ll
+++ b/llvm/test/CodeGen/X86/ymm-ordering.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux -mattr=+avx | FileCheck %s
; TODO: We If we stored ymm0 before ymm1, then we could execute 2nd load and 1st store in
; parallel.
diff --git a/llvm/test/CodeGen/X86/zero-call-used-regs-fmod.ll b/llvm/test/CodeGen/X86/zero-call-used-regs-fmod.ll
index 810b95f354652..0823555e2eb5d 100644
--- a/llvm/test/CodeGen/X86/zero-call-used-regs-fmod.ll
+++ b/llvm/test/CodeGen/X86/zero-call-used-regs-fmod.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define dso_local float @foo() local_unnamed_addr #0 {
; CHECK-LABEL: foo:
diff --git a/llvm/test/CodeGen/X86/zero-call-used-regs-i386.ll b/llvm/test/CodeGen/X86/zero-call-used-regs-i386.ll
index f56044b857b93..0db9607850c12 100644
--- a/llvm/test/CodeGen/X86/zero-call-used-regs-i386.ll
+++ b/llvm/test/CodeGen/X86/zero-call-used-regs-i386.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s --check-prefix=I386
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s --check-prefix=I386
;
; Make sure we don't zero out %eax when both %ah and %al are used.
;
diff --git a/llvm/test/CodeGen/X86/zero-call-used-regs-simd.ll b/llvm/test/CodeGen/X86/zero-call-used-regs-simd.ll
index d9253e0ca127b..bf89ea4d59702 100644
--- a/llvm/test/CodeGen/X86/zero-call-used-regs-simd.ll
+++ b/llvm/test/CodeGen/X86/zero-call-used-regs-simd.ll
@@ -1,9 +1,9 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=SSE
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx -verify-machineinstrs | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 -verify-machineinstrs | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl -verify-machineinstrs | FileCheck %s --check-prefixes=AVX512,AVX512VL
-; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl,+avx512bw -verify-machineinstrs | FileCheck %s --check-prefixes=AVX512,AVX512BW
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+sse2 -verify-machineinstrs | FileCheck %s --check-prefixes=SSE
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx -verify-machineinstrs | FileCheck %s --check-prefixes=AVX,AVX1
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx2 -verify-machineinstrs | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl -verify-machineinstrs | FileCheck %s --check-prefixes=AVX512,AVX512VL
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -mattr=+avx512f,+avx512vl,+avx512bw -verify-machineinstrs | FileCheck %s --check-prefixes=AVX512,AVX512BW
define void @zero_xmm(<4 x i32> %arg) #0 {
; SSE-LABEL: zero_xmm:
diff --git a/llvm/test/CodeGen/X86/zero-call-used-regs.ll b/llvm/test/CodeGen/X86/zero-call-used-regs.ll
index 97ad5ce9c8cbb..7ea9fb433f76e 100644
--- a/llvm/test/CodeGen/X86/zero-call-used-regs.ll
+++ b/llvm/test/CodeGen/X86/zero-call-used-regs.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s --check-prefix=I386
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X86-64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i386-unknown-linux-gnu | FileCheck %s --check-prefix=I386
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=X86-64
@result = dso_local global i32 0, align 4
diff --git a/llvm/test/CodeGen/X86/zero-initialized-in-bss.ll b/llvm/test/CodeGen/X86/zero-initialized-in-bss.ll
index 2feee54856e2c..8496d00a38a9c 100644
--- a/llvm/test/CodeGen/X86/zero-initialized-in-bss.ll
+++ b/llvm/test/CodeGen/X86/zero-initialized-in-bss.ll
@@ -1,11 +1,11 @@
-; RUN: llc < %s -mtriple=x86_64 | FileCheck %s --check-prefix=BSS
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 | FileCheck %s --check-prefix=BSS
; BSS: .bss
; BSS-NEXT: .globl a
; BSS: .section .tbss,"awT", at nobits
; BSS-NEXT: .globl b
-; RUN: llc < %s -mtriple=x86_64 -nozero-initialized-in-bss | FileCheck %s --check-prefix=DATA
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64 -nozero-initialized-in-bss | FileCheck %s --check-prefix=DATA
; DATA: .data
; DATA-NEXT: .globl a
diff --git a/llvm/test/CodeGen/X86/zero-remat.ll b/llvm/test/CodeGen/X86/zero-remat.ll
index 95a98a5fa636c..f3794f250b0b2 100644
--- a/llvm/test/CodeGen/X86/zero-remat.ll
+++ b/llvm/test/CodeGen/X86/zero-remat.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; REQUIRES: asserts
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
-; RUN: llc < %s -mtriple=x86_64-- -o /dev/null -stats -info-output-file - | grep asm-printer | grep 12
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s --check-prefix=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- -o /dev/null -stats -info-output-file - | grep asm-printer | grep 12
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s --check-prefix=X86
declare void @bar(double %x)
declare void @barf(float %x)
diff --git a/llvm/test/CodeGen/X86/zext-extract_subreg.ll b/llvm/test/CodeGen/X86/zext-extract_subreg.ll
index 877f11632b768..8c9f0d6513618 100644
--- a/llvm/test/CodeGen/X86/zext-extract_subreg.ll
+++ b/llvm/test/CodeGen/X86/zext-extract_subreg.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-apple-darwin | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-apple-darwin | FileCheck %s
define void @t() nounwind ssp {
; CHECK-LABEL: t:
diff --git a/llvm/test/CodeGen/X86/zext-fold.ll b/llvm/test/CodeGen/X86/zext-fold.ll
index ad1ce14ad8435..c82ef66ca92df 100644
--- a/llvm/test/CodeGen/X86/zext-fold.ll
+++ b/llvm/test/CodeGen/X86/zext-fold.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-linux -enable-misched=false | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-linux -enable-misched=false | FileCheck %s
;; Simple case
define i32 @test1(i8 %x) nounwind readnone {
diff --git a/llvm/test/CodeGen/X86/zext-inreg-0.ll b/llvm/test/CodeGen/X86/zext-inreg-0.ll
index 72fd6885dcdec..290220e8d5b65 100644
--- a/llvm/test/CodeGen/X86/zext-inreg-0.ll
+++ b/llvm/test/CodeGen/X86/zext-inreg-0.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mtriple=i686-- | FileCheck -check-prefix=X86 %s
-; RUN: llc < %s -mtriple=x86_64-- | FileCheck -check-prefix=X64 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck -check-prefix=X86 %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-- | FileCheck -check-prefix=X64 %s
; X86-NOT: and
diff --git a/llvm/test/CodeGen/X86/zext-inreg-1.ll b/llvm/test/CodeGen/X86/zext-inreg-1.ll
index 3a6628fa08e45..dad7e2a6be006 100644
--- a/llvm/test/CodeGen/X86/zext-inreg-1.ll
+++ b/llvm/test/CodeGen/X86/zext-inreg-1.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-- | FileCheck %s
; These tests differ from the ones in zext-inreg-0.ll in that
; on x86-64 they do require and instructions.
diff --git a/llvm/test/CodeGen/X86/zext-lshr.ll b/llvm/test/CodeGen/X86/zext-lshr.ll
index 76f874663ed53..549a3de1cd9ff 100644
--- a/llvm/test/CodeGen/X86/zext-lshr.ll
+++ b/llvm/test/CodeGen/X86/zext-lshr.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=CHECK,X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=CHECK,X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=CHECK,X64
define i32 @i32_zext_shift_i16_zext_i1(i1 %a0) nounwind {
; CHECK-LABEL: i32_zext_shift_i16_zext_i1:
diff --git a/llvm/test/CodeGen/X86/zext-sext.ll b/llvm/test/CodeGen/X86/zext-sext.ll
index 25929ecbde76f..35f97a41de78d 100644
--- a/llvm/test/CodeGen/X86/zext-sext.ll
+++ b/llvm/test/CodeGen/X86/zext-sext.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-linux-gnu -mcpu=atom | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-linux-gnu -mcpu=atom | FileCheck %s
; <rdar://problem/8006248>
; This randomly started passing after an unrelated change, if it fails again it
diff --git a/llvm/test/CodeGen/X86/zext-shl.ll b/llvm/test/CodeGen/X86/zext-shl.ll
index bc0981781df8f..409fb2c43419d 100644
--- a/llvm/test/CodeGen/X86/zext-shl.ll
+++ b/llvm/test/CodeGen/X86/zext-shl.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefixes=X86
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefixes=X64
define i32 @i32_zext_shift_i16_zext_i1(i1 %a0) nounwind {
; X86-LABEL: i32_zext_shift_i16_zext_i1:
diff --git a/llvm/test/CodeGen/X86/zext-trunc.ll b/llvm/test/CodeGen/X86/zext-trunc.ll
index d0d669a40fa35..7f68f731205ee 100644
--- a/llvm/test/CodeGen/X86/zext-trunc.ll
+++ b/llvm/test/CodeGen/X86/zext-trunc.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -early-live-intervals -verify-machineinstrs | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -early-live-intervals -verify-machineinstrs | FileCheck %s
; rdar://7570931
define i64 @foo(i64 %a, i64 %b) nounwind {
diff --git a/llvm/test/CodeGen/X86/zlib-longest-match.ll b/llvm/test/CodeGen/X86/zlib-longest-match.ll
index abd63bae67eff..3a2e7d783b9f3 100644
--- a/llvm/test/CodeGen/X86/zlib-longest-match.ll
+++ b/llvm/test/CodeGen/X86/zlib-longest-match.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -block-placement-exit-block-bias=20 -no-phi-elim-live-out-early-exit | FileCheck %s
+; RUN: llc -combiner-topological-sorting < %s -block-placement-exit-block-bias=20 -no-phi-elim-live-out-early-exit | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.9.0"
diff --git a/llvm/test/CodeGen/X86/znver3-gather.ll b/llvm/test/CodeGen/X86/znver3-gather.ll
index 5a2721ca1f2f4..881f63085d4ce 100644
--- a/llvm/test/CodeGen/X86/znver3-gather.ll
+++ b/llvm/test/CodeGen/X86/znver3-gather.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=znver3 | FileCheck %s --check-prefix=X64
+; RUN: llc -combiner-topological-sorting < %s -mtriple=x86_64-unknown-unknown -mcpu=znver3 | FileCheck %s --check-prefix=X64
define <8 x i32> @simple(ptr %base, <8 x i32> %offsets) {
; X64-LABEL: simple:
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