[llvm] [AArch64] Use `AArch64ISD::UADDLP` for manual widening adjacent arithmetic (zext/shuffle combination) (PR #189255)
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Wed Apr 1 04:48:12 PDT 2026
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``````````bash
git-clang-format --diff origin/main HEAD --extensions cpp -- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp --diff_from_common_commit
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``````````diff
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index ac80177f6..06ceb33e7 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -22340,7 +22340,7 @@ static bool isEvenOddShufflePair(SDValue Op0, SDValue Op1) {
static SDValue isEvenOddBuildVector(SDValue Op0, SDValue Op1) {
using namespace llvm::SDPatternMatch;
-
+
auto *B0 = dyn_cast<BuildVectorSDNode>(Op0);
auto *B1 = dyn_cast<BuildVectorSDNode>(Op1);
@@ -22362,7 +22362,8 @@ static SDValue isEvenOddBuildVector(SDValue Op0, SDValue Op1) {
SDValue Vec;
APInt Idx0, Idx1;
if (!sd_match(ExtVecElt0, m_ExtractElt(m_Value(Vec), m_ConstInt(Idx0))) ||
- !sd_match(ExtVecElt1, m_ExtractElt(m_Specific(Vec), m_ConstInt(Idx1))))
+ !sd_match(ExtVecElt1,
+ m_ExtractElt(m_Specific(Vec), m_ConstInt(Idx1))))
return SDValue();
if (!Src)
@@ -22370,7 +22371,7 @@ static SDValue isEvenOddBuildVector(SDValue Op0, SDValue Op1) {
if (Src != Vec)
return SDValue();
-
+
if (Idx0 != (I * 2) || Idx1 != (I * 2 + 1))
return SDValue();
}
``````````
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https://github.com/llvm/llvm-project/pull/189255
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