[llvm] 042997b - [RISCV] combine-is_fpclass.ll - add initial tests showing failure to constant fold ISD::IS_FPCLASS nodes (#189940)

[via llvm-commits]

Author: Simon Pilgrim
Date: 2026-04-01T11:43:00Z
New Revision: 042997bd15a52ef435673e9182ed5cd2453f8ab0

URL: https://github.com/llvm/llvm-project/commit/042997bd15a52ef435673e9182ed5cd2453f8ab0
DIFF: https://github.com/llvm/llvm-project/commit/042997bd15a52ef435673e9182ed5cd2453f8ab0.diff

LOG: [RISCV] combine-is_fpclass.ll - add initial tests showing failure to constant fold ISD::IS_FPCLASS nodes (#189940)

Added: 
    llvm/test/CodeGen/RISCV/combine-is_fpclass.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/RISCV/combine-is_fpclass.ll b/llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
new file mode 100644
index 0000000000000..07c22ecf130d0
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/combine-is_fpclass.ll
@@ -0,0 +1,33 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc -mtriple=riscv64 -mattr=+v,+f,+d < %s | FileCheck %s
+
+define i1 @isneginf_constant_f32() nounwind {
+; CHECK-LABEL: isneginf_constant_f32:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lui a0, 260096
+; CHECK-NEXT:    fmv.w.x fa5, a0
+; CHECK-NEXT:    fclass.s a0, fa5
+; CHECK-NEXT:    andi a0, a0, 1
+; CHECK-NEXT:    ret
+  %f = tail call i1 @llvm.is.fpclass.f32(float 1.0, i32 4)  ; 0x4 = "neginf"
+  ret i1 %f
+}
+
+define i8 @iszero_constant_v4f32() nounwind {
+; CHECK-LABEL: iszero_constant_v4f32:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    lui a0, %hi(.LCPI1_0)
+; CHECK-NEXT:    addi a0, a0, %lo(.LCPI1_0)
+; CHECK-NEXT:    vsetivli zero, 8, e32, m2, ta, ma
+; CHECK-NEXT:    vle32.v v8, (a0)
+; CHECK-NEXT:    vfclass.v v8, v8
+; CHECK-NEXT:    li a0, 24
+; CHECK-NEXT:    vand.vx v8, v8, a0
+; CHECK-NEXT:    vmsne.vi v10, v8, 0
+; CHECK-NEXT:    vsetvli zero, zero, e8, mf2, ta, ma
+; CHECK-NEXT:    vmv.x.s a0, v10
+; CHECK-NEXT:    ret
+  %f = tail call <8 x i1> @llvm.is.fpclass.v4f32(<8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float -1.0, float -2.0, float -3.0, float -4.0>, i32 96)  ; 0x60 = "zero"
+  %r = bitcast <8 x i1> %f to i8
+  ret i8 %r
+}