[llvm] [AArch64] Emit negate-ra-state CFI for pauth epilogues (PR #189924)
Amina Chabane via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 1 04:23:28 PDT 2026
https://github.com/Amichaxx updated https://github.com/llvm/llvm-project/pull/189924
>From 69f0c81d7f23d47a27cc73856f8ef4bb47efe398 Mon Sep 17 00:00:00 2001
From: Amichaxx <amina.chabane at arm.com>
Date: Tue, 31 Mar 2026 16:50:49 +0000
Subject: [PATCH 1/2] [AArch64] Emit negate-ra-state CFI for ptrauth epilogues
Ensure AArch64PointerAuth emits negate_ra_state for AUTI*
whenever DWARF unwind info is enabled.
Originally flagged by BOLT - BOLT skips such functions today with incorrect CFI placement,
but LLVM should still emit correct CFI.
---
llvm/lib/Target/AArch64/AArch64PointerAuth.cpp | 8 ++++----
.../AArch64/machine-outliner-retaddr-sign-cfi.ll | 1 +
.../machine-outliner-retaddr-sign-non-leaf.ll | 3 +++
...ine-outliner-retaddr-sign-same-scope-diff-key.ll | 3 +++
.../machine-outliner-retaddr-sign-sp-mod.mir | 1 +
.../AArch64/machine-outliner-retaddr-sign-thunk.ll | 6 ++++++
.../AArch64/pacbti-llvm-generated-funcs-2.ll | 1 -
.../sign-return-address-cfi-negate-ra-state.ll | 7 ++++---
.../CodeGen/AArch64/sign-return-address-pauth-lr.ll | 13 +++++++++++++
.../CodeGen/AArch64/sign-return-address-tailcall.ll | 5 +++++
llvm/test/CodeGen/AArch64/sign-return-address.ll | 11 +++++++++++
11 files changed, 51 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp b/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
index f6e7d6e88161a..9808c9dca4630 100644
--- a/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
+++ b/llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
@@ -138,7 +138,7 @@ void AArch64PointerAuth::authenticateLR(
MachineFunction &MF, MachineBasicBlock::iterator MBBI) const {
const AArch64FunctionInfo *MFnI = MF.getInfo<AArch64FunctionInfo>();
bool UseBKey = MFnI->shouldSignWithBKey();
- bool EmitAsyncCFI = MFnI->needsAsyncDwarfUnwindInfo(MF);
+ bool EmitCFI = MFnI->needsDwarfUnwindInfo(MF);
bool NeedsWinCFI = MF.hasWinCFI();
MachineBasicBlock &MBB = *MBBI->getParent();
@@ -182,7 +182,7 @@ void AArch64PointerAuth::authenticateLR(
} else {
if (MFnI->branchProtectionPAuthLR() && Subtarget->hasPAuthLR()) {
assert(PACSym && "No PAC instruction to refer to");
- emitPACCFI(MBB, MBBI, MachineInstr::FrameDestroy, EmitAsyncCFI);
+ emitPACCFI(MBB, MBBI, MachineInstr::FrameDestroy, EmitCFI);
BuildMI(MBB, MBBI, DL,
TII->get(UseBKey ? AArch64::AUTIBSPPCi : AArch64::AUTIASPPCi))
.addSym(PACSym)
@@ -192,13 +192,13 @@ void AArch64PointerAuth::authenticateLR(
emitPACSymOffsetIntoX16(*TII, MBB, MBBI, DL, PACSym);
BuildMI(MBB, MBBI, DL, TII->get(AArch64::PACM))
.setMIFlag(MachineInstr::FrameDestroy);
- emitPACCFI(MBB, MBBI, MachineInstr::FrameDestroy, EmitAsyncCFI);
+ emitPACCFI(MBB, MBBI, MachineInstr::FrameDestroy, EmitCFI);
}
BuildMI(MBB, MBBI, DL,
TII->get(UseBKey ? AArch64::AUTIBSP : AArch64::AUTIASP))
.setMIFlag(MachineInstr::FrameDestroy);
if (!MFnI->branchProtectionPAuthLR())
- emitPACCFI(MBB, MBBI, MachineInstr::FrameDestroy, EmitAsyncCFI);
+ emitPACCFI(MBB, MBBI, MachineInstr::FrameDestroy, EmitCFI);
}
if (NeedsWinCFI) {
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
index 4bbbe40176313..5b7df29fe54ef 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
@@ -26,6 +26,7 @@ define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" {
store i32 6, ptr %6, align 4
; CHECK-NOT: bl OUTLINED_FUNCTION_{{[0-9]+}}
; V8A: hint #31
+; V8A-NEXT: .cfi_negate_ra_state
; V8A-NEXT: ret
; V83A: retab
ret void
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
index 0a6dbed9a9eaf..b57645921bcd7 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
@@ -21,6 +21,7 @@ define i64 @a(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
; V8A-NEXT: ldr x30, [sp, #16] // 8-byte Reload
; V8A-NEXT: add sp, sp, #32
; V8A-NEXT: hint #31
+; V8A-NEXT: .cfi_negate_ra_state
; V8A-NEXT: ret
;
; V83A-LABEL: a:
@@ -72,6 +73,7 @@ define i64 @b(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
; V8A-NEXT: ldr x30, [sp, #16] // 8-byte Reload
; V8A-NEXT: add sp, sp, #32
; V8A-NEXT: hint #31
+; V8A-NEXT: .cfi_negate_ra_state
; V8A-NEXT: ret
;
; V83A-LABEL: b:
@@ -123,6 +125,7 @@ define i64 @c(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"
; V8A-NEXT: ldr x30, [sp, #16] // 8-byte Reload
; V8A-NEXT: add sp, sp, #32
; V8A-NEXT: hint #31
+; V8A-NEXT: .cfi_negate_ra_state
; V8A-NEXT: ret
;
; V83A-LABEL: c:
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
index 87771f5de4f69..b1e27df204195 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
@@ -22,6 +22,7 @@ define void @a() "sign-return-address"="all" {
; V8A-NEXT: stp w8, w9, [sp, #8]
; V8A-NEXT: add sp, sp, #32
; V8A-NEXT: hint #29
+; V8A-NEXT: .cfi_negate_ra_state
; V8A-NEXT: ret
;
; V83A-LABEL: a:
@@ -75,6 +76,7 @@ define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" {
; V8A-NEXT: stp w8, w9, [sp, #8]
; V8A-NEXT: add sp, sp, #32
; V8A-NEXT: hint #31
+; V8A-NEXT: .cfi_negate_ra_state
; V8A-NEXT: ret
;
; V83A-LABEL: b:
@@ -128,6 +130,7 @@ define void @c() "sign-return-address"="all" {
; V8A-NEXT: stp w8, w9, [sp, #8]
; V8A-NEXT: add sp, sp, #32
; V8A-NEXT: hint #29
+; V8A-NEXT: .cfi_negate_ra_state
; V8A-NEXT: ret
;
; V83A-LABEL: c:
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir
index 22e5edef2a939..d13564bce6457 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.mir
@@ -203,4 +203,5 @@ body: |
# CHECK-NEXT: $sp = frame-setup SUBXri $sp, 16, 0
# CHECK: $sp = frame-destroy ADDXri $sp, 16, 0
# CHECK-NEXT: frame-destroy AUTIASP implicit-def $lr, implicit $lr, implicit $sp
+# CHECK-NEXT: frame-destroy CFI_INSTRUCTION negate_ra_sign_state
# CHECK-NEXT: RET $lr
diff --git a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
index da68ea5bf0dbc..2e52036f71a2e 100644
--- a/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
+++ b/llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
@@ -23,6 +23,7 @@ define i32 @a() #0 {
; V8A-NEXT: add w0, w0, #8
; V8A-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; V8A-NEXT: hint #29
+; V8A-NEXT: .cfi_negate_ra_state
; V8A-NEXT: ret
;
; V83A-LABEL: a:
@@ -62,6 +63,7 @@ define i32 @b() #0 {
; V8A-NEXT: add w0, w0, #88
; V8A-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; V8A-NEXT: hint #29
+; V8A-NEXT: .cfi_negate_ra_state
; V8A-NEXT: ret
;
; V83A-LABEL: b:
@@ -102,6 +104,7 @@ define hidden i32 @c(ptr %fptr) #0 {
; V8A-NEXT: add w0, w0, #8
; V8A-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; V8A-NEXT: hint #29
+; V8A-NEXT: .cfi_negate_ra_state
; V8A-NEXT: ret
;
; V83A-LABEL: c:
@@ -143,6 +146,7 @@ define hidden i32 @d(ptr %fptr) #0 {
; V8A-NEXT: add w0, w0, #88
; V8A-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; V8A-NEXT: hint #29
+; V8A-NEXT: .cfi_negate_ra_state
; V8A-NEXT: ret
;
; V83A-LABEL: d:
@@ -176,3 +180,5 @@ attributes #0 = { "sign-return-address"="non-leaf" minsize }
; CHECK-NOT: .cfi_negate_ra_state
; CHECK-NOT: auti{{[a,b]}}sp
; CHECK-NOT: hint #{{[29,31]}}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; CHECK: {{.*}}
diff --git a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll
index 373c4969a9405..ce255f2ba5201 100644
--- a/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll
+++ b/llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll
@@ -56,7 +56,6 @@ entry:
;; CHECK: .cfi_b_key_frame
;; CHECK-NEXT: pacibsp
;; CHECK-NEXT: .cfi_negate_ra_state
-;; CHECK-NOT: .cfi_
;; CHECK: .cfi_endproc
attributes #0 = { norecurse nounwind readnone "sign-return-address"="all" "sign-return-address-key"="b_key" }
diff --git a/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll b/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll
index bf70bf30534ec..7130390bb77c2 100644
--- a/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll
+++ b/llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll
@@ -154,12 +154,14 @@ define hidden noundef i32 @baz_sync(i32 noundef %a) #0 uwtable(sync) {
; CHECK-V8A-NEXT: bl _Z3bari
; CHECK-V8A-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-V8A-NEXT: hint #29
+; CHECK-V8A-NEXT: .cfi_negate_ra_state
; CHECK-V8A-NEXT: b _Z3bari
; CHECK-V8A-NEXT: .LBB2_2: // %if.else
; CHECK-V8A-NEXT: bl _Z4quuxi
; CHECK-V8A-NEXT: add w0, w0, #1
; CHECK-V8A-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-V8A-NEXT: hint #29
+; CHECK-V8A-NEXT: .cfi_negate_ra_state
; CHECK-V8A-NEXT: ret
;
; CHECK-V83A-LABEL: baz_sync:
@@ -175,6 +177,7 @@ define hidden noundef i32 @baz_sync(i32 noundef %a) #0 uwtable(sync) {
; CHECK-V83A-NEXT: bl _Z3bari
; CHECK-V83A-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-V83A-NEXT: autiasp
+; CHECK-V83A-NEXT: .cfi_negate_ra_state
; CHECK-V83A-NEXT: b _Z3bari
; CHECK-V83A-NEXT: .LBB2_2: // %if.else
; CHECK-V83A-NEXT: bl _Z4quuxi
@@ -212,7 +215,6 @@ attributes #0 = { "sign-return-address"="all" }
; foo
; CHECK-DUMP-LABEL: FDE
; CHECK-DUMP: DW_CFA_AARCH64_negate_ra_state:
-; CHECK-DUMP-NOT: DW_CFA_AARCH64_negate_ra_state
; CHECK-DUMP-NOT: DW_CFA_remember_state
; CHECK-DUMP-NOT: DW_CFA_restore_state
@@ -242,10 +244,9 @@ attributes #0 = { "sign-return-address"="all" }
; baz_sync
; CHECK-DUMP-LABEL: FDE
; CHECK-DUMP: DW_CFA_AARCH64_negate_ra_state:
-; CHECK-DUMP-NOT: DW_CFA_AARCH64_negate_ra_state
; CHECK-DUMP-NOT: DW_CFA_remember_state
; CHECK-DUMP-NOT: DW_CFA_restore_state
; CHECK-DUMP: CFA=WSP{{$}}
; CHECK-DUMP: reg34=1
-; CHECK-DUMP-NOT: reg34=0
+; CHECK-DUMP: reg34=0
diff --git a/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll b/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
index 4f9c3c7de70a1..694a34cf9a716 100644
--- a/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
+++ b/llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
@@ -66,6 +66,7 @@ define i32 @leaf_sign_all(i32 %x) "branch-protection-pauth-lr" "sign-return-addr
; COMPAT-NEXT: adrp x16, .Ltmp0
; COMPAT-NEXT: add x16, x16, :lo12:.Ltmp0
; COMPAT-NEXT: hint #39
+; COMPAT-NEXT: .cfi_negate_ra_state_with_pc
; COMPAT-NEXT: hint #29
; COMPAT-NEXT: ret
;
@@ -106,6 +107,7 @@ define i64 @leaf_clobbers_lr(i64 %x) "branch-protection-pauth-lr" "sign-return-a
; COMPAT-NEXT: adrp x16, .Ltmp1
; COMPAT-NEXT: add x16, x16, :lo12:.Ltmp1
; COMPAT-NEXT: hint #39
+; COMPAT-NEXT: .cfi_negate_ra_state_with_pc
; COMPAT-NEXT: hint #29
; COMPAT-NEXT: ret
;
@@ -161,6 +163,7 @@ define i32 @non_leaf_sign_all(i32 %x) "branch-protection-pauth-lr" "sign-return-
; COMPAT-NEXT: adrp x16, .Ltmp2
; COMPAT-NEXT: add x16, x16, :lo12:.Ltmp2
; COMPAT-NEXT: hint #39
+; COMPAT-NEXT: .cfi_negate_ra_state_with_pc
; COMPAT-NEXT: hint #29
; COMPAT-NEXT: ret
;
@@ -210,6 +213,7 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "branch-protection-pauth-lr" "sign-re
; COMPAT-NEXT: adrp x16, .Ltmp3
; COMPAT-NEXT: add x16, x16, :lo12:.Ltmp3
; COMPAT-NEXT: hint #39
+; COMPAT-NEXT: .cfi_negate_ra_state_with_pc
; COMPAT-NEXT: hint #29
; COMPAT-NEXT: ret
;
@@ -263,6 +267,7 @@ define i32 @non_leaf_scs(i32 %x) "branch-protection-pauth-lr" "sign-return-addre
; CHECK-NEXT: adrp x16, .Ltmp4
; CHECK-NEXT: add x16, x16, :lo12:.Ltmp4
; CHECK-NEXT: hint #39
+; CHECK-NEXT: .cfi_negate_ra_state_with_pc
; CHECK-NEXT: autiasp
; CHECK-NEXT: ret
;
@@ -279,6 +284,7 @@ define i32 @non_leaf_scs(i32 %x) "branch-protection-pauth-lr" "sign-return-addre
; PAUTHLR-NEXT: bl foo
; PAUTHLR-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; PAUTHLR-NEXT: ldr x30, [x18, #-8]!
+; PAUTHLR-NEXT: .cfi_negate_ra_state_with_pc
; PAUTHLR-NEXT: autiasppc .Ltmp4
; PAUTHLR-NEXT: ret
%call = call i32 @foo(i32 %x)
@@ -325,6 +331,7 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "branch-protection-pauth-lr"
; COMPAT-NEXT: adrp x16, .Ltmp6
; COMPAT-NEXT: add x16, x16, :lo12:.Ltmp6
; COMPAT-NEXT: hint #39
+; COMPAT-NEXT: .cfi_negate_ra_state_with_pc
; COMPAT-NEXT: hint #29
; COMPAT-NEXT: b bar
;
@@ -344,6 +351,7 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "branch-protection-pauth-lr"
; V83A-NEXT: adrp x16, .Ltmp6
; V83A-NEXT: add x16, x16, :lo12:.Ltmp6
; V83A-NEXT: hint #39
+; V83A-NEXT: .cfi_negate_ra_state_with_pc
; V83A-NEXT: autiasp
; V83A-NEXT: b bar
;
@@ -359,6 +367,7 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "branch-protection-pauth-lr"
; PAUTHLR-NEXT: mov x30, x0
; PAUTHLR-NEXT: //NO_APP
; PAUTHLR-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
+; PAUTHLR-NEXT: .cfi_negate_ra_state_with_pc
; PAUTHLR-NEXT: autiasppc .Ltmp6
; PAUTHLR-NEXT: b bar
call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1
@@ -376,6 +385,7 @@ define i32 @leaf_sign_all_a_key(i32 %x) "branch-protection-pauth-lr" "sign-retur
; COMPAT-NEXT: adrp x16, .Ltmp7
; COMPAT-NEXT: add x16, x16, :lo12:.Ltmp7
; COMPAT-NEXT: hint #39
+; COMPAT-NEXT: .cfi_negate_ra_state_with_pc
; COMPAT-NEXT: hint #29
; COMPAT-NEXT: ret
;
@@ -410,6 +420,7 @@ define i32 @leaf_sign_all_b_key(i32 %x) "branch-protection-pauth-lr" "sign-retur
; COMPAT-NEXT: adrp x16, .Ltmp8
; COMPAT-NEXT: add x16, x16, :lo12:.Ltmp8
; COMPAT-NEXT: hint #39
+; COMPAT-NEXT: .cfi_negate_ra_state_with_pc
; COMPAT-NEXT: hint #31
; COMPAT-NEXT: ret
;
@@ -470,6 +481,7 @@ define i32 @leaf_sign_all_a_key_bti(i32 %x) "branch-protection-pauth-lr" "sign-r
; COMPAT-NEXT: adrp x16, .Ltmp10
; COMPAT-NEXT: add x16, x16, :lo12:.Ltmp10
; COMPAT-NEXT: hint #39
+; COMPAT-NEXT: .cfi_negate_ra_state_with_pc
; COMPAT-NEXT: hint #29
; COMPAT-NEXT: ret
;
@@ -508,6 +520,7 @@ define i32 @leaf_sign_all_b_key_bti(i32 %x) "branch-protection-pauth-lr" "sign-r
; COMPAT-NEXT: adrp x16, .Ltmp11
; COMPAT-NEXT: add x16, x16, :lo12:.Ltmp11
; COMPAT-NEXT: hint #39
+; COMPAT-NEXT: .cfi_negate_ra_state_with_pc
; COMPAT-NEXT: hint #31
; COMPAT-NEXT: ret
;
diff --git a/llvm/test/CodeGen/AArch64/sign-return-address-tailcall.ll b/llvm/test/CodeGen/AArch64/sign-return-address-tailcall.ll
index 90e48fe0ed042..d8497877568e9 100644
--- a/llvm/test/CodeGen/AArch64/sign-return-address-tailcall.ll
+++ b/llvm/test/CodeGen/AArch64/sign-return-address-tailcall.ll
@@ -11,6 +11,7 @@ define i32 @tailcall_direct() "sign-return-address"="non-leaf" {
; COMMON: ldr x30, [sp], #16
;
; COMMON-NEXT: [[AUTIASP]]
+; COMMON-NEXT: .cfi_negate_ra_state
;
; LDR-NEXT: ldr w16, [x30]
;
@@ -41,6 +42,7 @@ define i32 @tailcall_indirect(ptr %fptr) "sign-return-address"="non-leaf" {
; COMMON: ldr x30, [sp], #16
;
; COMMON-NEXT: [[AUTIASP]]
+; COMMON-NEXT: .cfi_negate_ra_state
;
; LDR-NEXT: ldr w16, [x30]
;
@@ -87,6 +89,7 @@ define i32 @tailcall_direct_noframe_sign_all() "sign-return-address"="all" {
; COMMON-NOT: ldr{{.*}}x30
;
; COMMON: [[AUTIASP]]
+; COMMON-NEXT: .cfi_negate_ra_state
;
; LDR-NEXT: ldr w16, [x30]
;
@@ -116,6 +119,7 @@ define i32 @tailcall_indirect_noframe_sign_all(ptr %fptr) "sign-return-address"=
; COMMON-NOT: ldr{{.*}}x30
;
; COMMON: [[AUTIASP]]
+; COMMON-NEXT: .cfi_negate_ra_state
;
; LDR-NEXT: ldr w16, [x30]
;
@@ -158,6 +162,7 @@ define i32 @tailcall_two_branches(i1 %0) "sign-return-address"="all" {
; COMMON: ldr x30, [sp], #16
; COMMON-NEXT: .[[ELSE]]:
; COMMON-NEXT: [[AUTIASP]]
+; COMMON-NEXT: .cfi_negate_ra_state
; LDR-NEXT: ldr w16, [x30]
;
diff --git a/llvm/test/CodeGen/AArch64/sign-return-address.ll b/llvm/test/CodeGen/AArch64/sign-return-address.ll
index 7267ce0e3afbf..1f5520b4006f4 100644
--- a/llvm/test/CodeGen/AArch64/sign-return-address.ll
+++ b/llvm/test/CodeGen/AArch64/sign-return-address.ll
@@ -41,6 +41,7 @@ define i32 @leaf_sign_all(i32 %x) "sign-return-address"="all" {
; DWARFCFI-COMPAT-NEXT: hint #25
; DWARFCFI-COMPAT-NEXT: .cfi_negate_ra_state
; DWARFCFI-COMPAT-NEXT: hint #29
+; DWARFCFI-COMPAT-NEXT: .cfi_negate_ra_state
; DWARFCFI-COMPAT-NEXT: ret
;
; DWARFCFI-V83A-LABEL: leaf_sign_all:
@@ -92,6 +93,7 @@ define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" {
; DWARFCFI-COMPAT-NEXT: //NO_APP
; DWARFCFI-COMPAT-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; DWARFCFI-COMPAT-NEXT: hint #29
+; DWARFCFI-COMPAT-NEXT: .cfi_negate_ra_state
; DWARFCFI-COMPAT-NEXT: ret
;
; DWARFCFI-V83A-LABEL: leaf_clobbers_lr:
@@ -165,6 +167,7 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" {
; DWARFCFI-COMPAT-NEXT: bl foo
; DWARFCFI-COMPAT-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; DWARFCFI-COMPAT-NEXT: hint #29
+; DWARFCFI-COMPAT-NEXT: .cfi_negate_ra_state
; DWARFCFI-COMPAT-NEXT: ret
;
; DWARFCFI-V83A-LABEL: non_leaf_sign_all:
@@ -230,6 +233,7 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
; DWARFCFI-COMPAT-NEXT: bl foo
; DWARFCFI-COMPAT-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; DWARFCFI-COMPAT-NEXT: hint #29
+; DWARFCFI-COMPAT-NEXT: .cfi_negate_ra_state
; DWARFCFI-COMPAT-NEXT: ret
;
; DWARFCFI-V83A-LABEL: non_leaf_sign_non_leaf:
@@ -299,6 +303,7 @@ define i32 @non_leaf_scs(i32 %x) "sign-return-address"="non-leaf" shadowcallstac
; DWARFCFI-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; DWARFCFI-NEXT: ldr x30, [x18, #-8]!
; DWARFCFI-NEXT: autiasp
+; DWARFCFI-NEXT: .cfi_negate_ra_state
; DWARFCFI-NEXT: ret
;
; WINCFI-LABEL: non_leaf_scs:
@@ -574,6 +579,7 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" {
; DWARFCFI-COMPAT-NEXT: //NO_APP
; DWARFCFI-COMPAT-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; DWARFCFI-COMPAT-NEXT: hint #29
+; DWARFCFI-COMPAT-NEXT: .cfi_negate_ra_state
; DWARFCFI-COMPAT-NEXT: b bar
;
; DWARFCFI-V83A-LABEL: spill_lr_and_tail_call:
@@ -588,6 +594,7 @@ define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" {
; DWARFCFI-V83A-NEXT: //NO_APP
; DWARFCFI-V83A-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; DWARFCFI-V83A-NEXT: autiasp
+; DWARFCFI-V83A-NEXT: .cfi_negate_ra_state
; DWARFCFI-V83A-NEXT: b bar
;
; WINCFI-COMPAT-LABEL: spill_lr_and_tail_call:
@@ -642,6 +649,7 @@ define i32 @leaf_sign_all_a_key(i32 %x) "sign-return-address"="all" "sign-return
; DWARFCFI-COMPAT-NEXT: hint #25
; DWARFCFI-COMPAT-NEXT: .cfi_negate_ra_state
; DWARFCFI-COMPAT-NEXT: hint #29
+; DWARFCFI-COMPAT-NEXT: .cfi_negate_ra_state
; DWARFCFI-COMPAT-NEXT: ret
;
; DWARFCFI-V83A-LABEL: leaf_sign_all_a_key:
@@ -687,6 +695,7 @@ define i32 @leaf_sign_all_b_key(i32 %x) "sign-return-address"="all" "sign-return
; DWARFCFI-COMPAT-NEXT: hint #27
; DWARFCFI-COMPAT-NEXT: .cfi_negate_ra_state
; DWARFCFI-COMPAT-NEXT: hint #31
+; DWARFCFI-COMPAT-NEXT: .cfi_negate_ra_state
; DWARFCFI-COMPAT-NEXT: ret
;
; DWARFCFI-V83A-LABEL: leaf_sign_all_b_key:
@@ -757,6 +766,7 @@ define i32 @leaf_sign_all_a_key_bti(i32 %x) "sign-return-address"="all" "sign-re
; DWARFCFI-COMPAT-NEXT: hint #25
; DWARFCFI-COMPAT-NEXT: .cfi_negate_ra_state
; DWARFCFI-COMPAT-NEXT: hint #29
+; DWARFCFI-COMPAT-NEXT: .cfi_negate_ra_state
; DWARFCFI-COMPAT-NEXT: ret
;
; DWARFCFI-V83A-LABEL: leaf_sign_all_a_key_bti:
@@ -803,6 +813,7 @@ define i32 @leaf_sign_all_b_key_bti(i32 %x) "sign-return-address"="all" "sign-re
; DWARFCFI-COMPAT-NEXT: hint #27
; DWARFCFI-COMPAT-NEXT: .cfi_negate_ra_state
; DWARFCFI-COMPAT-NEXT: hint #31
+; DWARFCFI-COMPAT-NEXT: .cfi_negate_ra_state
; DWARFCFI-COMPAT-NEXT: ret
;
; DWARFCFI-V83A-LABEL: leaf_sign_all_b_key_bti:
>From 3b790c017b67bf2dc99582aeafabde6b961e9234 Mon Sep 17 00:00:00 2001
From: Amichaxx <amina.chabane at arm.com>
Date: Wed, 1 Apr 2026 11:22:50 +0000
Subject: [PATCH 2/2] Relax pacret-synchronous-unwind.cpp warning check as no
longer guaranteed
---
bolt/test/runtime/AArch64/pacret-synchronous-unwind.cpp | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/bolt/test/runtime/AArch64/pacret-synchronous-unwind.cpp b/bolt/test/runtime/AArch64/pacret-synchronous-unwind.cpp
index 0f5e9a38da2ba..3968d49df71a8 100644
--- a/bolt/test/runtime/AArch64/pacret-synchronous-unwind.cpp
+++ b/bolt/test/runtime/AArch64/pacret-synchronous-unwind.cpp
@@ -1,5 +1,5 @@
// Test to demonstrate that functions compiled with synchronous unwind tables
-// are ignored by the PointerAuthCFIAnalyzer.
+// are analysed by the PointerAuthCFIAnalyzer and report an ignored count.
// Exception handling is needed to have _any_ unwind tables, otherwise the
// PointerAuthCFIAnalyzer does not run on these functions, so it does not ignore
// any function.
@@ -17,9 +17,6 @@
// CHECK: BOLT-INFO: PointerAuthCFIAnalyzer ran on {{[0-9]+}} functions.
// CHECK-SAME: Ignored {{[0-9]}} functions ({{[0-9.]+}}%) because of CFI
// CHECK-SAME: inconsistencies
-// CHECK-NEXT: BOLT-WARNING: PointerAuthCFIAnalyzer only supports
-// CHECK-SAME: asynchronous unwind tables. For C compilers, see
-// CHECK-SAME: -fasynchronous-unwind-tables.
#include <cstdio>
#include <stdexcept>
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