[llvm] [AMDGPU] Allow merging unordered and monotonic atomic loads in SILoadStoreOptimizer (PR #189932)

[Matt Arsenault via llvm-commits]

arsenm wrote:

> I think this optimization is not suitable for IR. Combining atomic operations at the IR level changes the number of atomic events and can violate the memory model. This is why the transformation is implemented at the MachineIR level.

That doesn't change when you perform it in machine IR. This is valid or it's not, it doesn't become legal just by doing it in MIR 



https://github.com/llvm/llvm-project/pull/189932