[llvm] [WebAssembly] Correct operands for NaN/Zero checks in min/max (PR #189712)

[via llvm-commits]

https://github.com/zGoldthorpe created https://github.com/llvm/llvm-project/pull/189712

The `pmin` and `pmax` pattern fragments match `vselect`s, meaning that the generated operands for `relaxed_min` and `relaxed_max` correspond to operands 1 and 2 of the `vselect` (rather than operands 0 and 1).

>From 3794e4fbcc14c92226f971ad5fd259481ece9ef1 Mon Sep 17 00:00:00 2001
From: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
Date: Tue, 31 Mar 2026 11:49:26 -0500
Subject: [PATCH] [WebAssembly] Correct operands for NaN/Zero checks in min/max

---
 .../Target/WebAssembly/WebAssemblyInstrSIMD.td | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
index d30c18401d6d6..ac810893999cf 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -1369,7 +1369,7 @@ multiclass PMinMaxInt<Vec vec, NI baseMinInst, NI baseMaxInst> {
 // the wasm_simd128.h intrinsics because v128_t is an integer vector.
 foreach vec = [F32x4, F64x2, F16x8] in {
   defvar pmin = !cast<NI>("PMIN_"#vec);
-  defvar pmax = !cast<NI>("PMAX_"#vec); 
+  defvar pmax = !cast<NI>("PMAX_"#vec);
   defm : PMinMaxInt<vec, pmin, pmax>;
 }
 
@@ -1842,21 +1842,21 @@ def relaxed_fmax : SDNode<"WebAssemblyISD::RELAXED_FMAX", SDTFPBinOp>;
 def relaxed_pmin :
   PatFrag<(ops node:$lhs, node:$rhs), (pmin $lhs, $rhs), [{
   return (N->getFlags().hasNoNaNs() ||
-          (CurDAG->isKnownNeverNaN(N->getOperand(0)) &&
-           CurDAG->isKnownNeverNaN(N->getOperand(1)))) &&
+          (CurDAG->isKnownNeverNaN(N->getOperand(1)) &&
+           CurDAG->isKnownNeverNaN(N->getOperand(2)))) &&
          (N->getFlags().hasNoSignedZeros() ||
-          CurDAG->isKnownNeverZeroFloat(N->getOperand(0)) ||
-          CurDAG->isKnownNeverZeroFloat(N->getOperand(1)));
+          CurDAG->isKnownNeverZeroFloat(N->getOperand(1)) ||
+          CurDAG->isKnownNeverZeroFloat(N->getOperand(2)));
 }]>;
 
 def relaxed_pmax :
   PatFrag<(ops node:$lhs, node:$rhs), (pmax $lhs, $rhs), [{
   return (N->getFlags().hasNoNaNs() ||
-          (CurDAG->isKnownNeverNaN(N->getOperand(0)) &&
-           CurDAG->isKnownNeverNaN(N->getOperand(1)))) &&
+          ((CurDAG->isKnownNeverNaN(N->getOperand(1))) &&
+           CurDAG->isKnownNeverNaN(N->getOperand(2)))) &&
          (N->getFlags().hasNoSignedZeros() ||
-          CurDAG->isKnownNeverZeroFloat(N->getOperand(0)) ||
-          CurDAG->isKnownNeverZeroFloat(N->getOperand(1)));
+          CurDAG->isKnownNeverZeroFloat(N->getOperand(1)) ||
+          CurDAG->isKnownNeverZeroFloat(N->getOperand(2)));
 }]>;
 
 let Predicates = [HasRelaxedSIMD] in {