[llvm] [WIP][BOLT][AArch64] Optimize the mov-imm-to-reg operation (PR #189304)

[Shanzhi Chen via llvm-commits]

chenshanzhi wrote:

> Hi @chenshanzhi, thanks for the PR. Have you seen #137413? It was close to completion but there were test failures.

Hi, @maksfb , I have not seen #137413 before, but after a quick glance over, I think the idea is the same. The handling codes in the `switch` statement originate from `AArch64ExpandPseudo::expandMOVImm()`. And BTW recently when I study how AArch64 logical immediate encoding/decoding works, I accidentally found some duplicates in the `switch` statement and did some cleanup in #187843, so I'm pretty familiar with this `switch` statement.

I think the link error mentioned in #137413 is because the symbol `llvm::AArch64_IMM::expandMOVImm` is defined in `libLLVMAArch64CodeGen.so`. This is why I add `AArch64CodeGen` into `CMakeLists.txt` in my PR. And I think maybe in the future, more functions in `libLLVMAArch64CodeGen.so` could be leveraged to improve the code generation in BOLT.

Actually, we have used the `createMOVImm` function in this PR in a downstream proof-of-concept feature, where we need to move arbitrary 32-bit/64-bit value into a register in a performance-critical scenario.

I think I would complete this PR and re-request review maybe later this week. And thanks for your information.

https://github.com/llvm/llvm-project/pull/189304