[llvm] Isd splat vector (PR #189529)

[Kartik Ohlan via llvm-commits]

https://github.com/Ko496-glitch created https://github.com/llvm/llvm-project/pull/189529

fix #189481

Added the switch for splat_vector
Added the IR coverage

Signed off by : ko496

>From 07a84b16be6a4711614b49947bda0c65839dbe87 Mon Sep 17 00:00:00 2001
From: kartikohlan <kartik7ohlan at gmail.com>
Date: Tue, 31 Mar 2026 00:28:05 -0400
Subject: [PATCH] Adding SelectionDag and fix the format

---
 .../lib/CodeGen/SelectionDAG/SelectionDAG.cpp |  8 +++-
 .../AArch64/AArch64SelectionDAGTest.cpp       | 47 +++++++++++++++++++
 2 files changed, 54 insertions(+), 1 deletion(-)

diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index dd810a07c9aa8..ca975c27fc330 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -6112,6 +6112,12 @@ KnownFPClass SelectionDAG::computeKnownFPClass(SDValue Op,
     }
     break;
   }
+
+  case ISD::SPLAT_VECTOR: {
+      Known = computeKnownFPClass(Op.getOperand(0), InterestedClasses, Depth + 1);
+      break;
+    }
+
   default:
     if (Opcode >= ISD::BUILTIN_OP_END || Opcode == ISD::INTRINSIC_WO_CHAIN ||
         Opcode == ISD::INTRINSIC_W_CHAIN || Opcode == ISD::INTRINSIC_VOID) {
@@ -6122,7 +6128,7 @@ KnownFPClass SelectionDAG::computeKnownFPClass(SDValue Op,
   }
 
   return Known;
-}
+ }
 
 bool SelectionDAG::isKnownNeverNaN(SDValue Op, bool SNaN,
                                    unsigned Depth) const {
diff --git a/llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp b/llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
index 12b7763274f6c..9b79647066a0a 100644
--- a/llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
+++ b/llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
@@ -1701,4 +1701,51 @@ TEST_F(AArch64SelectionDAGTest, ComputeKnownFPClass_UndefAndPoison) {
   EXPECT_FALSE(*Known.SignBit);
 }
 
+TEST_F(AArch64SelectionDAGTest, ComputeKnownFPClass_SplatVector) {
+  SDLoc Loc;
+  EVT ScalableVT = EVT::getVectorVT(Context, MVT::f32, 4, /*Scalable=*/true);
+  KnownFPClass Known;
+
+  SDValue Splat = DAG->getSplatVector(ScalableVT, Loc,
+      DAG->getConstantFP(1.0, Loc, MVT::f32));
+  ASSERT_EQ(Splat.getOpcode(), ISD::SPLAT_VECTOR);
+  Known = DAG->computeKnownFPClass(Splat, fcAllFlags);
+  EXPECT_EQ(Known.KnownFPClasses, fcPosNormal);
+  EXPECT_TRUE(Known.SignBit.has_value());
+  EXPECT_FALSE(*Known.SignBit);
+
+  Splat = DAG->getSplatVector(ScalableVT, Loc,
+      DAG->getConstantFP(-1.0, Loc, MVT::f32));
+  Known = DAG->computeKnownFPClass(Splat, fcAllFlags);
+  EXPECT_EQ(Known.KnownFPClasses, fcNegNormal);
+  EXPECT_TRUE(Known.SignBit.has_value());
+  EXPECT_TRUE(*Known.SignBit);
+
+  Splat = DAG->getSplatVector(ScalableVT, Loc,
+      DAG->getConstantFP(APFloat::getZero(APFloat::IEEEsingle()), Loc, MVT::f32));
+  Known = DAG->computeKnownFPClass(Splat, fcAllFlags);
+  EXPECT_EQ(Known.KnownFPClasses, fcPosZero);
+  EXPECT_TRUE(Known.SignBit.has_value());
+  EXPECT_FALSE(*Known.SignBit);
+
+  Splat = DAG->getSplatVector(ScalableVT, Loc,
+      DAG->getConstantFP(APFloat::getZero(APFloat::IEEEsingle(), true), Loc, MVT::f32));
+  Known = DAG->computeKnownFPClass(Splat, fcAllFlags);
+  EXPECT_EQ(Known.KnownFPClasses, fcNegZero);
+  EXPECT_TRUE(Known.SignBit.has_value());
+  EXPECT_TRUE(*Known.SignBit);
+
+  Splat = DAG->getSplatVector(ScalableVT, Loc,
+      DAG->getConstantFP(APFloat::getInf(APFloat::IEEEsingle()), Loc, MVT::f32));
+  Known = DAG->computeKnownFPClass(Splat, fcAllFlags);
+  EXPECT_EQ(Known.KnownFPClasses, fcPosInf);
+  EXPECT_TRUE(Known.SignBit.has_value());
+  EXPECT_FALSE(*Known.SignBit);
+
+  Splat = DAG->getSplatVector(ScalableVT, Loc,
+      DAG->getConstantFP(APFloat::getQNaN(APFloat::IEEEsingle()), Loc, MVT::f32));
+  Known = DAG->computeKnownFPClass(Splat, fcAllFlags);
+  EXPECT_EQ(Known.KnownFPClasses, fcQNan);
+}
+
 } // end namespace llvm