[llvm] [MachineVerifier] Disallow subregister defs in SSA form (PR #189403)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 30 08:14:15 PDT 2026
jayfoad wrote:
Draft for now because this breaks `test/CodeGen/X86/GlobalISel/add-vec.ll`.
https://github.com/llvm/llvm-project/pull/189403
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