[llvm] [AArch64][llvm] Rewrite the TLBI multiclass to be clearer (NFC) (PR #186451)

[via llvm-commits]

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@@ -856,34 +856,46 @@ def : TIndex<"nb", 0b1>;
 // TLBI (translation lookaside buffer invalidate) instruction options.
 //===----------------------------------------------------------------------===//
 
+def SysAliasRegUse : GenericEnum {
+  let FilterClass = "RegValue";
+}
+
+class RegValue<bits<2> value> {
+  bits<2> Value = value;
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Lukacma wrote:

Looking at documentation this should work. Or am I wrong ?:
```
class RegValue;

def REG_NONE     : RegValue
def REG_OPTIONAL : RegValue 
def REG_REQUIRED : RegValue
```


https://github.com/llvm/llvm-project/pull/186451