[llvm] [CodeGen][NFC] Compute MaximumLegalStoreInBits just once (PR #189355)
Alexis Engelke via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 30 04:01:23 PDT 2026
https://github.com/aengelke created https://github.com/llvm/llvm-project/pull/189355
Instead of iterating over all value types per basic block, pre-compute
the TLI-specific value once when constructing the TLI.
>From bfac1d8d70758fa53c1f753d9ee855676773c969 Mon Sep 17 00:00:00 2001
From: Alexis Engelke <engelke at in.tum.de>
Date: Mon, 30 Mar 2026 11:00:44 +0000
Subject: [PATCH] [spr] initial version
Created using spr 1.3.8-wip
---
llvm/include/llvm/CodeGen/TargetLowering.h | 8 ++++++++
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 20 +++++--------------
llvm/lib/CodeGen/TargetLoweringBase.cpp | 7 +++++++
3 files changed, 20 insertions(+), 15 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 2e66f574981ab..1f62f61269a16 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -2084,6 +2084,10 @@ class LLVM_ABI TargetLoweringBase {
/// Retuen the minimum of largest number of comparisons in BitTest.
unsigned getMinimumBitTestCmps() const;
+ unsigned getMaximumLegalStoreInBits() const {
+ return MaximumLegalStoreInBits;
+ }
+
/// If a physical register, this specifies the register that
/// llvm.savestack/llvm.restorestack should save and restore.
Register getStackPointerRegisterToSaveRestore() const {
@@ -3767,6 +3771,10 @@ class LLVM_ABI TargetLoweringBase {
/// The minimum of largest number of comparisons to use bit test for switch.
unsigned MinimumBitTestCmps;
+ /// Maximum known legal store size, which can be guaranteed for scalable
+ /// vector.
+ unsigned MaximumLegalStoreInBits;
+
/// This indicates if the target supports unaligned atomic operations.
bool SupportsUnalignedAtomics;
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 9134a940f217b..971054e7f5032 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -260,15 +260,6 @@ namespace {
ForCodeSize = DAG.shouldOptForSize();
DisableGenericCombines =
DisableCombines || (STI && STI->disableGenericCombines(OptLevel));
-
- MaximumLegalStoreInBits = 0;
- // We use the minimum store size here, since that's all we can guarantee
- // for the scalable vector types.
- for (MVT VT : MVT::all_valuetypes())
- if (EVT(VT).isSimple() && VT != MVT::Other &&
- TLI.isTypeLegal(EVT(VT)) &&
- VT.getSizeInBits().getKnownMinValue() >= MaximumLegalStoreInBits)
- MaximumLegalStoreInBits = VT.getSizeInBits().getKnownMinValue();
}
void ConsiderForPruning(SDNode *N) {
@@ -344,8 +335,6 @@ namespace {
void CommitTargetLoweringOpt(const TargetLowering::TargetLoweringOpt &TLO);
private:
- unsigned MaximumLegalStoreInBits;
-
/// Check the specified integer node value to see if it can be simplified or
/// if things it uses can be simplified by bit propagation.
/// If so, return true.
@@ -22718,7 +22707,7 @@ bool DAGCombiner::tryStoreMergeOfConstants(
unsigned IsFast = 0;
// Break early when size is too large to be legal.
- if (StoreTy.getSizeInBits() > MaximumLegalStoreInBits)
+ if (StoreTy.getSizeInBits() > TLI.getMaximumLegalStoreInBits())
break;
if (TLI.isTypeLegal(StoreTy) &&
@@ -22826,7 +22815,7 @@ bool DAGCombiner::tryStoreMergeOfExtracts(
unsigned IsFast = 0;
// Break early when size is too large to be legal.
- if (Ty.getSizeInBits() > MaximumLegalStoreInBits)
+ if (Ty.getSizeInBits() > TLI.getMaximumLegalStoreInBits())
break;
if (TLI.isTypeLegal(Ty) &&
@@ -22973,7 +22962,7 @@ bool DAGCombiner::tryStoreMergeOfLoads(SmallVectorImpl<MemOpLink> &StoreNodes,
EVT StoreTy = EVT::getVectorVT(Context, MemVT.getScalarType(), Elts);
// Break early when size is too large to be legal.
- if (StoreTy.getSizeInBits() > MaximumLegalStoreInBits)
+ if (StoreTy.getSizeInBits() > TLI.getMaximumLegalStoreInBits())
break;
unsigned IsFastSt = 0;
@@ -23193,7 +23182,8 @@ bool DAGCombiner::mergeConsecutiveStores(StoreSDNode *St) {
EVT MemVT = St->getMemoryVT();
if (MemVT.isScalableVT())
return false;
- if (!MemVT.isSimple() || MemVT.getSizeInBits() * 2 > MaximumLegalStoreInBits)
+ if (!MemVT.isSimple() ||
+ MemVT.getSizeInBits() * 2 > TLI.getMaximumLegalStoreInBits())
return false;
// This function cannot currently deal with non-byte-sized memory sizes.
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp
index b6d5a4c22e133..0cb9ebc66fdd1 100644
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -1939,6 +1939,13 @@ void TargetLoweringBase::computeRegisterProperties(
RepRegClassForVT[i] = RRC;
RepRegClassCostForVT[i] = Cost;
}
+
+ // Compute minimum known-legal store size.
+ MaximumLegalStoreInBits = 0;
+ for (MVT VT : MVT::all_valuetypes())
+ if (EVT(VT).isSimple() && VT != MVT::Other && isTypeLegal(EVT(VT)) &&
+ VT.getSizeInBits().getKnownMinValue() >= MaximumLegalStoreInBits)
+ MaximumLegalStoreInBits = VT.getSizeInBits().getKnownMinValue();
}
EVT TargetLoweringBase::getSetCCResultType(const DataLayout &DL, LLVMContext &,
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