[llvm] [AMDGPU] DPP insns cannot use SGPR for src1 on gfx11 (PR #188429)

[via llvm-commits]

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LU-JOHN wrote:

> This combinatorial explosion of modes is not good. I was expecting this to not have to be the cross product of all of the other modes

The previous use of RegClassByHwMode has this comment:
```
// We have 3 orthogonal properties to consider. Unfortunately we need
// to define the cross product of these states, minus unused
// combinations.
```


https://github.com/llvm/llvm-project/pull/188429