[llvm] [VPlan] Use predicated intrinsics for trapping divisors (PR #154076)

[Florian Hahn via llvm-commits]

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@@ -1961,6 +1961,10 @@ class TargetTransformInfo {
   /// maximum register pressure exceeds getNumberOfRegisters.
   LLVM_ABI bool shouldConsiderVectorizationRegPressure() const;
 
+  /// \returns True if the target supports lowering the @llvm.vp.udiv,
+  /// @llvm.vp.sdiv, @llvm.vp.urem and @llvm.vp.srem intrinsics.
+  LLVM_ABI bool supportsPredicatedDivRem() const;
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fhahn wrote:

Do we need a new hook for that? Can we instead just check the cost of the intrinsic and don't use if it is larger than the safe-divisor variant/invalid?

https://github.com/llvm/llvm-project/pull/154076