[llvm] [AMDGPU][AArch64][GlobalISel] Guard against use of disallowed sub-registers (PR #188781)

[Matt Arsenault via llvm-commits]

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@@ -1105,6 +1105,17 @@ static bool selectCopy(MachineInstr &I, const TargetInstrInfo &TII,
     return selectCopy(I, TII, MRI, TRI, RBI);
   }
 
+  // Remove degenerate cases that fail MachineVerifier:
+  //
+  // %0:gpr32all = COPY %1.sub_32:gpr32all
+  //
+  // In this case we can simply use gpr32all without sub_32, so remove
+  // sub-register.
+  MachineOperand &MO = I.getOperand(1);
+  if (RBI.getSizeInBits(MO.getReg(), MRI, TRI) == 32 &&
+      MO.getSubReg() == AArch64::sub_32)
+    I.getOperand(1).setSubReg(0);
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arsenm wrote:

Should not be hacking special case, this should be computable with the various register class + sub register functions 

https://github.com/llvm/llvm-project/pull/188781