[llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)

[Asher Dobrescu via llvm-commits]

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Asher8118 wrote:

`ASIMD matrix multiply accumulate` and `ASIMD multiply accumulate long` instruction groups are using the wrong Read resource, instead of using `C1URd_VBFDOT` I think it should be:

```suggestion
// ASIMD matrix multiply accumulate
def : InstRW<[C1UWr_VBFMMA, C1URd_VBFMMA, C1URd_VBFMMA], (instrs BFMMLA)>;

// ASIMD multiply accumulate long
def : InstRW<[C1UWr_VBFMAL, C1URd_VBFMAL, C1URd_VBFMAL], (instrs BFMLALB, BFMLALBIdx, BFMLALT,
```

This also checks out with the C1Ultra-late-forwarding.s test as I can see late forwarding is not enabled for those instructions.

https://github.com/llvm/llvm-project/pull/182251