[llvm] [AMDGPU][ISel] Reduce `f64` compare to integer compare of upper half (PR #188356)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 25 08:31:41 PDT 2026
================
@@ -17567,6 +17567,202 @@ SDValue SITargetLowering::performSetCCCombine(SDNode *N,
}
}
+ // Convert double-precision ordered and unordered comparisons to integral
+ // comparisons of the upper 32 bits where possible.
+ //
+ // EQ/NE:
+ // If LHS.lo32 == RHS.lo32:
+ // setcc LHS, RHS, eq/ne => setcc LHS.hi32, RHS.hi32, eq/ne
+ // If LHS.lo32 != RHS.lo32:
+ // setcc LHS, RHS, eq/ne => setcc LHS.hi32, RHS.hi32, false/true
+ // The reduction is not possible if operands may be +0 and -0.
+ // For ordered eq / unordered ne, at most one operand may be NaN.
+ // For unordered eq / ordered ne, neither operand can be NaN.
+ //
+ // LT/GE:
+ // If LHS.lo32 >= RHS.lo32 (unsigned):
+ // setcc LHS, RHS, [u]lt/ge => LHS.hi32, RHS.hi32, [u]lt/ge
+ // If LHS.lo32 < RHS.lo32 (unsigned):
+ // setcc LHS, RHS, [u]lt/ge => LHS.hi32, RHS.hi32, [u]le/gt
+ // The reduction is only supported if both operands are nonnegative.
+ // For ordered lt / unordered ge, the RHS cannot be NaN.
+ // For unordered lt / ordered ge, neither operand can be NaN.
+ //
+ // LE/GT:
+ // If LHS.lo32 > RHS.lo32 (unsigned):
+ // setcc LHS, RHS, [u]le/gt => LHS.hi32, RHS.hi32, [u]lt/ge
+ // If LHS.lo32 <= RHS.lo32 (unsigned):
+ // setcc LHS, RHS, [u]le/gt => LHS.hi32, RHS.hi32, [u]le/gt
+ // The reduction is only supported if both operands are nonnegative.
+ // For unordered le / ordered gt, the LHS cannot be NaN.
+ // For ordered le / unordered gt, neither operand can be NaN.
+ if (VT == MVT::f64) {
+ // FIXME: need computeKnownFPClass once available (issue #175571)
----------------
zGoldthorpe wrote:
While I agree in principle, `isKnownNeverNaN` doesn't seem very capable in its current state (it only seems to return `true` if operands are constants). I'll add it as a predicate, but I think it is still good to check the known bits as well (especially since I need information about the known bits in any case).
https://github.com/llvm/llvm-project/pull/188356
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