[llvm] [AMDGPU] Documentation files for GFX950 instructions (PR #184710)

[Fabian Wahlster via llvm-commits]

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fwahlster-amd wrote:

v_cvt_scalef32_sr_pk32_bf6_bf16 is listed with same operand IDs `vdst:363335, src0:1d4114, src1:14b47a, src2:14b47a` as v_cvt_scalef32_sr_pk32_bf6_f32 but their SRC0 size differs:

```
V_CVT_SCALEF32_SR_PK32_BF6_BF16:
<Operand Input="true" Output="false" IsImplicit="false" IsBinaryMicrocodeRequired="true" Order="2">
    <FieldName>SRC0</FieldName>
    <DataFormatName>FMT_NUM_PK32_BF16</DataFormatName>
    <OperandType>OPR_SRC_VGPR</OperandType>
    <OperandSize>512</OperandSize>
</Operand>
V_CVT_SCALEF32_SR_PK32_BF6_F32:
<Operand Input="true" Output="false" IsImplicit="false" IsBinaryMicrocodeRequired="true" Order="2">
    <FieldName>SRC0</FieldName>
    <DataFormatName>FMT_NUM_PK32_F32</DataFormatName>
    <OperandType>OPR_SRC_VGPR</OperandType>
    <OperandSize>1024</OperandSize>
</Operand>
```

Is it expected that both use same src0:1d4114 ID? Are those IDs not unique anymore?

https://github.com/llvm/llvm-project/pull/184710