[llvm] d21e1a3 - [LIBM][AMDLIBM] - New vector calls for cdfnorm and round scalar calls (#187232)
via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 25 03:03:05 PDT 2026
Author: Rohit Aggarwal
Date: 2026-03-25T10:03:00Z
New Revision: d21e1a379878ae23d695ac033274fc8006415202
URL: https://github.com/llvm/llvm-project/commit/d21e1a379878ae23d695ac033274fc8006415202
DIFF: https://github.com/llvm/llvm-project/commit/d21e1a379878ae23d695ac033274fc8006415202.diff
LOG: [LIBM][AMDLIBM] - New vector calls for cdfnorm and round scalar calls (#187232)
In amdlibm, new vector calls
cdfnorm
amd_vrd2_cdfnorm
amd_vrd4_cdfnorm
amd_vrd8_cdfnorm
round
amd_vrs16_roundf
amd_vrs8_roundf
amd_vrs4_roundf
amd_vrd8_round
amd_vrd4_round
amd_vrd2_round
Link to aocl repo -
[aocl-libm-ose](https://github.com/amd/aocl-libm-ose)
Added:
Modified:
llvm/include/llvm/Analysis/VecFuncs.def
llvm/include/llvm/IR/RuntimeLibcalls.td
llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/Analysis/VecFuncs.def b/llvm/include/llvm/Analysis/VecFuncs.def
index 51dc26c5d9164..dfa1b4b7f793d 100644
--- a/llvm/include/llvm/Analysis/VecFuncs.def
+++ b/llvm/include/llvm/Analysis/VecFuncs.def
@@ -1916,6 +1916,24 @@ TLI_DEFINE_VECFUNC("erfc", "amd_vrd8_erfc", FIXED(8), NOMASK, "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("erfcf", "amd_vrs4_erfcf", FIXED(4), NOMASK, "_ZGV_LLVM_N4v")
TLI_DEFINE_VECFUNC("erfcf", "amd_vrs8_erfcf", FIXED(8), NOMASK, "_ZGV_LLVM_N8v")
TLI_DEFINE_VECFUNC("erfcf", "amd_vrs16_erfcf", FIXED(16), NOMASK, "_ZGV_LLVM_N16v")
+
+TLI_DEFINE_VECFUNC("cdfnorm", "amd_vrd2_cdfnorm", FIXED(2), NOMASK, "_ZGV_LLVM_N2v")
+TLI_DEFINE_VECFUNC("cdfnorm", "amd_vrd4_cdfnorm", FIXED(4), NOMASK, "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("cdfnorm", "amd_vrd8_cdfnorm", FIXED(8), NOMASK, "_ZGV_LLVM_N8v")
+
+TLI_DEFINE_VECFUNC("roundf", "amd_vrs16_roundf", FIXED(16), NOMASK, "_ZGV_LLVM_N16v")
+TLI_DEFINE_VECFUNC("roundf", "amd_vrs8_roundf", FIXED(8), NOMASK, "_ZGV_LLVM_N8v")
+TLI_DEFINE_VECFUNC("roundf", "amd_vrs4_roundf", FIXED(4), NOMASK, "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("round", "amd_vrd8_round", FIXED(8), NOMASK, "_ZGV_LLVM_N8v")
+TLI_DEFINE_VECFUNC("round", "amd_vrd4_round", FIXED(4), NOMASK, "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("round", "amd_vrd2_round", FIXED(2), NOMASK, "_ZGV_LLVM_N2v")
+
+TLI_DEFINE_VECFUNC("llvm.round.f32", "amd_vrs16_roundf", FIXED(16), NOMASK, "_ZGV_LLVM_N16v")
+TLI_DEFINE_VECFUNC("llvm.round.f32", "amd_vrs8_roundf", FIXED(8), NOMASK, "_ZGV_LLVM_N8v")
+TLI_DEFINE_VECFUNC("llvm.round.f32", "amd_vrs4_roundf", FIXED(4), NOMASK, "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("llvm.round.f64", "amd_vrd8_round", FIXED(8), NOMASK, "_ZGV_LLVM_N8v")
+TLI_DEFINE_VECFUNC("llvm.round.f64", "amd_vrd4_round", FIXED(4), NOMASK, "_ZGV_LLVM_N4v")
+TLI_DEFINE_VECFUNC("llvm.round.f64", "amd_vrd2_round", FIXED(2), NOMASK, "_ZGV_LLVM_N2v")
#else
#error "Must choose which vector library functions are to be defined."
#endif
diff --git a/llvm/include/llvm/IR/RuntimeLibcalls.td b/llvm/include/llvm/IR/RuntimeLibcalls.td
index e4a926d3cb1d3..a0f505f1fda2f 100644
--- a/llvm/include/llvm/IR/RuntimeLibcalls.td
+++ b/llvm/include/llvm/IR/RuntimeLibcalls.td
@@ -252,6 +252,8 @@ foreach S = !listconcat(F32VectorSuffixes, F64VectorSuffixes) in {
def TAN_#S : RuntimeLibcall;
def TANH_#S : RuntimeLibcall;
def TGAMMA_#S : RuntimeLibcall;
+ def CDFNORM_#S : RuntimeLibcall;
+ def ROUND_#S : RuntimeLibcall;
}
foreach S = F64VectorSuffixes in {
@@ -4504,4 +4506,13 @@ defset list<RuntimeLibcallImpl> AMDLIBM_VECFUNCS = {
def amd_vrs8_sinf : RuntimeLibcallImpl<SIN_V8F32>;
def amd_vrs8_tanf : RuntimeLibcallImpl<TAN_V8F32>;
def amd_vrs8_tanhf : RuntimeLibcallImpl<TANH_V8F32>;
+ def amd_vrd2_cdfnorm : RuntimeLibcallImpl<CDFNORM_V2F64>;
+ def amd_vrd4_cdfnorm : RuntimeLibcallImpl<CDFNORM_V4F64>;
+ def amd_vrd8_cdfnorm : RuntimeLibcallImpl<CDFNORM_V8F64>;
+ def amd_vrs4_roundf : RuntimeLibcallImpl<ROUND_V4F32>;
+ def amd_vrs8_roundf : RuntimeLibcallImpl<ROUND_V8F32>;
+ def amd_vrs16_roundf : RuntimeLibcallImpl<ROUND_V16F32>;
+ def amd_vrd2_round : RuntimeLibcallImpl<ROUND_V2F64>;
+ def amd_vrd4_round : RuntimeLibcallImpl<ROUND_V4F64>;
+ def amd_vrd8_round : RuntimeLibcallImpl<ROUND_V8F64>;
}
diff --git a/llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll b/llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
index 62f117ef2f89f..ecbf70a72a27f 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
@@ -1,7 +1,7 @@
-; RUN: opt -vector-library=AMDLIBM -passes=inject-tli-mappings,loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -mattr=avx -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF4
-; RUN: opt -vector-library=AMDLIBM -passes=inject-tli-mappings,loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -mattr=avx -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF2
-; RUN: opt -vector-library=AMDLIBM -passes=inject-tli-mappings,loop-vectorize -force-vector-width=8 -force-vector-interleave=1 -mattr=+avx512f -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF8
-; RUN: opt -vector-library=AMDLIBM -passes=inject-tli-mappings,loop-vectorize -force-vector-width=16 -force-vector-interleave=1 -mattr=+avx512f -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF16
+; RUN: opt -vector-library=AMDLIBM -passes=inject-tli-mappings,loop-vectorize,replace-with-veclib -force-vector-width=4 -force-vector-interleave=1 -mattr=avx -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF4
+; RUN: opt -vector-library=AMDLIBM -passes=inject-tli-mappings,loop-vectorize,replace-with-veclib -force-vector-width=2 -force-vector-interleave=1 -mattr=avx -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF2
+; RUN: opt -vector-library=AMDLIBM -passes=inject-tli-mappings,loop-vectorize,replace-with-veclib -force-vector-width=8 -force-vector-interleave=1 -mattr=+avx512f -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF8
+; RUN: opt -vector-library=AMDLIBM -passes=inject-tli-mappings,loop-vectorize,replace-with-veclib -force-vector-width=16 -force-vector-interleave=1 -mattr=+avx512f -S < %s | FileCheck %s --check-prefixes=CHECK,CHECK-VF16
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@@ -1860,6 +1860,138 @@ for.body:
for.end:
ret void
}
+; ======================= cdfnorm ============================
+define void @cdfnorm_f64(ptr nocapture %varray) {
+; CHECK-LABEL: @cdfnorm_f64(
+; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_cdfnorm(<2 x double> [[TMP4:%.*]])
+; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_cdfnorm(<4 x double> [[TMP4:%.*]])
+; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_cdfnorm(<8 x double> [[TMP4:%.*]])
+; CHECK-VF16: {{.*}} = tail call double @cdfnorm(double {{.*}})
+; CHECK: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @cdfnorm(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+; ======================= round ============================
+define void @round_f64(ptr nocapture %varray) {
+; CHECK-LABEL: @round_f64(
+; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_round(<2 x double> [[TMP4:%.*]])
+; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_round(<4 x double> [[TMP4:%.*]])
+; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_round(<8 x double> [[TMP4:%.*]])
+; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.round.v16f64(<16 x double> [[TMP4:%.*]])
+; CHECK: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @round(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @round_f32(ptr nocapture %varray) {
+; CHECK-LABEL: @round_f32(
+; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.round.v2f32(<2 x float> [[TMP4:%.*]])
+; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_roundf(<4 x float> [[TMP4:%.*]])
+; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_roundf(<8 x float> [[TMP4:%.*]])
+; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_roundf(<16 x float> [[TMP4:%.*]])
+; CHECK: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call float @roundf(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @round_f64_intrinsic(ptr nocapture %varray) {
+; CHECK-LABEL: @round_f64_intrinsic(
+; CHECK-VF2: [[TMP5:%.*]] = call <2 x double> @amd_vrd2_round(<2 x double> [[TMP4:%.*]])
+; CHECK-VF4: [[TMP5:%.*]] = call <4 x double> @amd_vrd4_round(<4 x double> [[TMP4:%.*]])
+; CHECK-VF8: [[TMP5:%.*]] = call <8 x double> @amd_vrd8_round(<8 x double> [[TMP4:%.*]])
+; CHECK-VF16: [[TMP5:%.*]] = call <16 x double> @llvm.round.v16f64(<16 x double> [[TMP4:%.*]])
+; CHECK: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to double
+ %call = tail call double @llvm.round.f64(double %conv)
+ %arrayidx = getelementptr inbounds double, ptr %varray, i64 %iv
+ store double %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
+define void @round_f32_intrinsic(ptr nocapture %varray) {
+; CHECK-LABEL: @round_f32_intrinsic(
+; CHECK-VF2: [[TMP5:%.*]] = call <2 x float> @llvm.round.v2f32(<2 x float> [[TMP4:%.*]])
+; CHECK-VF4: [[TMP5:%.*]] = call <4 x float> @amd_vrs4_roundf(<4 x float> [[TMP4:%.*]])
+; CHECK-VF8: [[TMP5:%.*]] = call <8 x float> @amd_vrs8_roundf(<8 x float> [[TMP4:%.*]])
+; CHECK-VF16: [[TMP5:%.*]] = call <16 x float> @amd_vrs16_roundf(<16 x float> [[TMP4:%.*]])
+; CHECK: ret void
+;
+entry:
+ br label %for.body
+
+for.body:
+ %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.body ]
+ %tmp = trunc i64 %iv to i32
+ %conv = sitofp i32 %tmp to float
+ %call = tail call float @llvm.round.f32(float %conv)
+ %arrayidx = getelementptr inbounds float, ptr %varray, i64 %iv
+ store float %call, ptr %arrayidx, align 4
+ %iv.next = add nuw nsw i64 %iv, 1
+ %exitcond = icmp eq i64 %iv.next, 1000
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end:
+ ret void
+}
+
attributes #0 = { nounwind readnone }
declare double @exp10(double) #0
@@ -1870,4 +2002,8 @@ declare void @sincos(double, ptr, ptr)
declare void @sincosf(float, ptr, ptr)
declare double @erfc(double) #0
declare float @erfcf(float) #0
-
+declare double @cdfnorm(double) #0
+declare double @round(double) #0
+declare float @roundf(float) #0
+declare double @llvm.round.f64(double) #0
+declare float @llvm.round.f32(float) #0
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