[llvm] [AMDGPU] Adjust workgroup fence lowering for single-wave workgroups (PR #187673)

[Pierre van Houtryve via llvm-commits]

https://github.com/Pierre-vh commented:

Do we want this for all targets, or just GFX12?
If it's all targets, the test file needs more RUN lines, at least one or two for every CacheControl class.

Do we also want this to work for load/store/rmw non-relaxed atomic orderings ? To be consistent, I think we should. If so it may be easier to implement in the `SIMemOpInfo` class. It can check if it's a single-wavefront workgroup, and demote the OrderingAddrSpace if so.
Additional tests will be needed too if we do that.

AMDGPUUsage docs are missing, the Memory model section should mention how workgroup scope may be considered as equivalent to wavefront scope if the workgroup has only one wave.

https://github.com/llvm/llvm-project/pull/187673