[llvm] [NFC] Removes unused Combiner dependency on TargetPassConfig (PR #188365)
via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 24 16:49:54 PDT 2026
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-llvm-globalisel
Author: Anshul Nigham (nigham)
<details>
<summary>Changes</summary>
This enables NewPM ports since it removes multiple pass dependencies on `TargetPassConfig` which we don't want to port to the NewPM.
It looks like no derived classes of Combiner actually use this pointer, and it is also unused in the Combiner class.
---
Patch is 47.26 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/188365.diff
19 Files Affected:
- (modified) llvm/include/llvm/CodeGen/GlobalISel/Combiner.h (+1-4)
- (modified) llvm/lib/CodeGen/GlobalISel/Combiner.cpp (+2-5)
- (modified) llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp (+6-9)
- (modified) llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp (+7-7)
- (modified) llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp (+4-9)
- (modified) llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp (+7-7)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp (+6-9)
- (modified) llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp (+7-7)
- (modified) llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp (+6-9)
- (modified) llvm/lib/Target/Mips/MipsPostLegalizerCombiner.cpp (+6-9)
- (modified) llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp (+3-7)
- (modified) llvm/lib/Target/RISCV/GISel/RISCVO0PreLegalizerCombiner.cpp (+6-9)
- (modified) llvm/lib/Target/RISCV/GISel/RISCVPostLegalizerCombiner.cpp (+7-7)
- (modified) llvm/lib/Target/RISCV/GISel/RISCVPreLegalizerCombiner.cpp (+7-7)
- (modified) llvm/lib/Target/SPIRV/SPIRVPreLegalizerCombiner.cpp (+6-9)
- (modified) llvm/lib/Target/WebAssembly/GISel/WebAssemblyPostLegalizerCombiner.cpp (+7-7)
- (modified) llvm/lib/Target/WebAssembly/GISel/WebAssemblyPreLegalizerCombiner.cpp (+7-7)
- (modified) llvm/lib/Target/X86/GISel/X86PostLegalizerCombiner.cpp (+8-9)
- (modified) llvm/lib/Target/X86/GISel/X86PreLegalizerCombiner.cpp (+7-7)
``````````diff
diff --git a/llvm/include/llvm/CodeGen/GlobalISel/Combiner.h b/llvm/include/llvm/CodeGen/GlobalISel/Combiner.h
index abae1f323ba64..8b028cd5c023c 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/Combiner.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/Combiner.h
@@ -23,7 +23,6 @@
namespace llvm {
class MachineRegisterInfo;
class GISelCSEInfo;
-class TargetPassConfig;
class MachineFunction;
class MachineIRBuilder;
@@ -58,8 +57,7 @@ class Combiner : public GIMatchTableExecutor {
/// If CSEInfo is not null, then the Combiner will use CSEInfo as the observer
/// and also create a CSEMIRBuilder. Pass nullptr if CSE is not needed.
Combiner(MachineFunction &MF, const CombinerInfo &CInfo,
- const TargetPassConfig *TPC, GISelValueTracking *VT,
- GISelCSEInfo *CSEInfo = nullptr);
+ GISelValueTracking *VT, GISelCSEInfo *CSEInfo = nullptr);
~Combiner() override;
virtual bool tryCombineAll(MachineInstr &I) const = 0;
@@ -74,7 +72,6 @@ class Combiner : public GIMatchTableExecutor {
MachineRegisterInfo &MRI;
GISelValueTracking *VT;
- const TargetPassConfig *TPC;
GISelCSEInfo *CSEInfo;
};
diff --git a/llvm/lib/CodeGen/GlobalISel/Combiner.cpp b/llvm/lib/CodeGen/GlobalISel/Combiner.cpp
index 81b79f36f95fb..a4121fbb7b6c8 100644
--- a/llvm/lib/CodeGen/GlobalISel/Combiner.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/Combiner.cpp
@@ -222,17 +222,14 @@ Combiner::WorkListMaintainer::create(Level Lvl, WorkListTy &WorkList,
}
Combiner::Combiner(MachineFunction &MF, const CombinerInfo &CInfo,
- const TargetPassConfig *TPC, GISelValueTracking *VT,
- GISelCSEInfo *CSEInfo)
+ GISelValueTracking *VT, GISelCSEInfo *CSEInfo)
: Builder(CSEInfo ? std::make_unique<CSEMIRBuilder>()
: std::make_unique<MachineIRBuilder>()),
WLObserver(WorkListMaintainer::create(CInfo.ObserverLvl, WorkList,
MF.getRegInfo())),
ObserverWrapper(std::make_unique<GISelObserverWrapper>()), CInfo(CInfo),
Observer(*ObserverWrapper), B(*Builder), MF(MF), MRI(MF.getRegInfo()),
- VT(VT), TPC(TPC), CSEInfo(CSEInfo) {
- (void)this->TPC; // FIXME: Remove when used.
-
+ VT(VT), CSEInfo(CSEInfo) {
// Setup builder.
B.setMF(MF);
if (CSEInfo)
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp b/llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
index 7f568b49f2619..8bb3e64504b20 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp
@@ -48,8 +48,8 @@ class AArch64O0PreLegalizerCombinerImpl : public Combiner {
public:
AArch64O0PreLegalizerCombinerImpl(
- MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
- GISelValueTracking &VT, GISelCSEInfo *CSEInfo,
+ MachineFunction &MF, CombinerInfo &CInfo, GISelValueTracking &VT,
+ GISelCSEInfo *CSEInfo,
const AArch64O0PreLegalizerCombinerImplRuleConfig &RuleConfig,
const AArch64Subtarget &STI, const LibcallLoweringInfo &Libcalls);
@@ -70,11 +70,11 @@ class AArch64O0PreLegalizerCombinerImpl : public Combiner {
#undef GET_GICOMBINER_IMPL
AArch64O0PreLegalizerCombinerImpl::AArch64O0PreLegalizerCombinerImpl(
- MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
- GISelValueTracking &VT, GISelCSEInfo *CSEInfo,
+ MachineFunction &MF, CombinerInfo &CInfo, GISelValueTracking &VT,
+ GISelCSEInfo *CSEInfo,
const AArch64O0PreLegalizerCombinerImplRuleConfig &RuleConfig,
const AArch64Subtarget &STI, const LibcallLoweringInfo &Libcalls)
- : Combiner(MF, CInfo, TPC, &VT, CSEInfo),
+ : Combiner(MF, CInfo, &VT, CSEInfo),
Helper(Observer, B, /*IsPreLegalize*/ true, &VT), RuleConfig(RuleConfig),
STI(STI), Libcalls(Libcalls),
#define GET_GICOMBINER_CONSTRUCTOR_INITS
@@ -134,7 +134,6 @@ class AArch64O0PreLegalizerCombiner : public MachineFunctionPass {
} // end anonymous namespace
void AArch64O0PreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
- AU.addRequired<TargetPassConfig>();
AU.setPreservesCFG();
getSelectionDAGFallbackAnalysisUsage(AU);
AU.addRequired<GISelValueTrackingAnalysisLegacy>();
@@ -152,7 +151,6 @@ AArch64O0PreLegalizerCombiner::AArch64O0PreLegalizerCombiner()
bool AArch64O0PreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
if (MF.getProperties().hasFailedISel())
return false;
- auto &TPC = getAnalysis<TargetPassConfig>();
const Function &F = MF.getFunction();
GISelValueTracking *VT =
@@ -170,7 +168,7 @@ bool AArch64O0PreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
// at the cost of possibly missing optimizations. See PR#94291 for details.
CInfo.MaxIterations = 1;
- AArch64O0PreLegalizerCombinerImpl Impl(MF, CInfo, &TPC, *VT,
+ AArch64O0PreLegalizerCombinerImpl Impl(MF, CInfo, *VT,
/*CSEInfo*/ nullptr, RuleConfig, ST,
Libcalls);
return Impl.combineMachineInstrs();
@@ -180,7 +178,6 @@ char AArch64O0PreLegalizerCombiner::ID = 0;
INITIALIZE_PASS_BEGIN(AArch64O0PreLegalizerCombiner, DEBUG_TYPE,
"Combine AArch64 machine instrs before legalization",
false, false)
-INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
INITIALIZE_PASS_DEPENDENCY(GISelValueTrackingAnalysisLegacy)
INITIALIZE_PASS_DEPENDENCY(GISelCSEAnalysisWrapperPass)
INITIALIZE_PASS_DEPENDENCY(LibcallLoweringInfoWrapper)
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
index 1502a3c871571..631c09db7242e 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
@@ -596,8 +596,8 @@ class AArch64PostLegalizerCombinerImpl : public Combiner {
public:
AArch64PostLegalizerCombinerImpl(
- MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
- GISelValueTracking &VT, GISelCSEInfo *CSEInfo,
+ MachineFunction &MF, CombinerInfo &CInfo, GISelValueTracking &VT,
+ GISelCSEInfo *CSEInfo,
const AArch64PostLegalizerCombinerImplRuleConfig &RuleConfig,
const AArch64Subtarget &STI, MachineDominatorTree *MDT,
const LegalizerInfo *LI);
@@ -617,12 +617,12 @@ class AArch64PostLegalizerCombinerImpl : public Combiner {
#undef GET_GICOMBINER_IMPL
AArch64PostLegalizerCombinerImpl::AArch64PostLegalizerCombinerImpl(
- MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
- GISelValueTracking &VT, GISelCSEInfo *CSEInfo,
+ MachineFunction &MF, CombinerInfo &CInfo, GISelValueTracking &VT,
+ GISelCSEInfo *CSEInfo,
const AArch64PostLegalizerCombinerImplRuleConfig &RuleConfig,
const AArch64Subtarget &STI, MachineDominatorTree *MDT,
const LegalizerInfo *LI)
- : Combiner(MF, CInfo, TPC, &VT, CSEInfo),
+ : Combiner(MF, CInfo, &VT, CSEInfo),
Helper(Observer, B, /*IsPreLegalize*/ false, &VT, MDT, LI),
RuleConfig(RuleConfig), STI(STI),
#define GET_GICOMBINER_CONSTRUCTOR_INITS
@@ -716,8 +716,8 @@ bool AArch64PostLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
CInfo.ObserverLvl = CombinerInfo::ObserverLevel::SinglePass;
// Legalizer performs DCE, so a full DCE pass is unnecessary.
CInfo.EnableFullDCE = false;
- AArch64PostLegalizerCombinerImpl Impl(MF, CInfo, TPC, *VT, CSEInfo,
- RuleConfig, ST, MDT, LI);
+ AArch64PostLegalizerCombinerImpl Impl(MF, CInfo, *VT, CSEInfo, RuleConfig, ST,
+ MDT, LI);
bool Changed = Impl.combineMachineInstrs();
auto MIB = CSEMIRBuilder(MF);
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
index 70e917187fac0..2b34a89a1db64 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
@@ -1227,8 +1227,7 @@ class AArch64PostLegalizerLoweringImpl : public Combiner {
public:
AArch64PostLegalizerLoweringImpl(
- MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
- GISelCSEInfo *CSEInfo,
+ MachineFunction &MF, CombinerInfo &CInfo, GISelCSEInfo *CSEInfo,
const AArch64PostLegalizerLoweringImplRuleConfig &RuleConfig,
const AArch64Subtarget &STI);
@@ -1247,11 +1246,10 @@ class AArch64PostLegalizerLoweringImpl : public Combiner {
#undef GET_GICOMBINER_IMPL
AArch64PostLegalizerLoweringImpl::AArch64PostLegalizerLoweringImpl(
- MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
- GISelCSEInfo *CSEInfo,
+ MachineFunction &MF, CombinerInfo &CInfo, GISelCSEInfo *CSEInfo,
const AArch64PostLegalizerLoweringImplRuleConfig &RuleConfig,
const AArch64Subtarget &STI)
- : Combiner(MF, CInfo, TPC, /*VT*/ nullptr, CSEInfo),
+ : Combiner(MF, CInfo, /*VT*/ nullptr, CSEInfo),
Helper(Observer, B, /*IsPreLegalize*/ true), RuleConfig(RuleConfig),
STI(STI),
#define GET_GICOMBINER_CONSTRUCTOR_INITS
@@ -1279,7 +1277,6 @@ class AArch64PostLegalizerLowering : public MachineFunctionPass {
} // end anonymous namespace
void AArch64PostLegalizerLowering::getAnalysisUsage(AnalysisUsage &AU) const {
- AU.addRequired<TargetPassConfig>();
AU.setPreservesCFG();
getSelectionDAGFallbackAnalysisUsage(AU);
MachineFunctionPass::getAnalysisUsage(AU);
@@ -1295,7 +1292,6 @@ bool AArch64PostLegalizerLowering::runOnMachineFunction(MachineFunction &MF) {
if (MF.getProperties().hasFailedISel())
return false;
assert(MF.getProperties().hasLegalized() && "Expected a legalized function?");
- auto *TPC = &getAnalysis<TargetPassConfig>();
const Function &F = MF.getFunction();
const AArch64Subtarget &ST = MF.getSubtarget<AArch64Subtarget>();
@@ -1307,7 +1303,7 @@ bool AArch64PostLegalizerLowering::runOnMachineFunction(MachineFunction &MF) {
CInfo.ObserverLvl = CombinerInfo::ObserverLevel::SinglePass;
// PostLegalizerCombiner performs DCE, so a full DCE pass is unnecessary.
CInfo.EnableFullDCE = false;
- AArch64PostLegalizerLoweringImpl Impl(MF, CInfo, TPC, /*CSEInfo*/ nullptr,
+ AArch64PostLegalizerLoweringImpl Impl(MF, CInfo, /*CSEInfo*/ nullptr,
RuleConfig, ST);
return Impl.combineMachineInstrs();
}
@@ -1316,7 +1312,6 @@ char AArch64PostLegalizerLowering::ID = 0;
INITIALIZE_PASS_BEGIN(AArch64PostLegalizerLowering, DEBUG_TYPE,
"Lower AArch64 MachineInstrs after legalization", false,
false)
-INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
INITIALIZE_PASS_END(AArch64PostLegalizerLowering, DEBUG_TYPE,
"Lower AArch64 MachineInstrs after legalization", false,
false)
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp b/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
index 43e74405ac965..cc670a8d0c5af 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
@@ -733,8 +733,8 @@ class AArch64PreLegalizerCombinerImpl : public Combiner {
public:
AArch64PreLegalizerCombinerImpl(
- MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
- GISelValueTracking &VT, GISelCSEInfo *CSEInfo,
+ MachineFunction &MF, CombinerInfo &CInfo, GISelValueTracking &VT,
+ GISelCSEInfo *CSEInfo,
const AArch64PreLegalizerCombinerImplRuleConfig &RuleConfig,
const AArch64Subtarget &STI, const LibcallLoweringInfo &Libcalls,
MachineDominatorTree *MDT, const LegalizerInfo *LI);
@@ -756,12 +756,12 @@ class AArch64PreLegalizerCombinerImpl : public Combiner {
#undef GET_GICOMBINER_IMPL
AArch64PreLegalizerCombinerImpl::AArch64PreLegalizerCombinerImpl(
- MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
- GISelValueTracking &VT, GISelCSEInfo *CSEInfo,
+ MachineFunction &MF, CombinerInfo &CInfo, GISelValueTracking &VT,
+ GISelCSEInfo *CSEInfo,
const AArch64PreLegalizerCombinerImplRuleConfig &RuleConfig,
const AArch64Subtarget &STI, const LibcallLoweringInfo &Libcalls,
MachineDominatorTree *MDT, const LegalizerInfo *LI)
- : Combiner(MF, CInfo, TPC, &VT, CSEInfo),
+ : Combiner(MF, CInfo, &VT, CSEInfo),
Helper(Observer, B, /*IsPreLegalize*/ true, &VT, MDT, LI),
RuleConfig(RuleConfig), STI(STI), Libcalls(Libcalls),
#define GET_GICOMBINER_CONSTRUCTOR_INITS
@@ -877,8 +877,8 @@ bool AArch64PreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
// This is the first Combiner, so the input IR might contain dead
// instructions.
CInfo.EnableFullDCE = true;
- AArch64PreLegalizerCombinerImpl Impl(MF, CInfo, &TPC, *VT, CSEInfo,
- RuleConfig, ST, Libcalls, MDT, LI);
+ AArch64PreLegalizerCombinerImpl Impl(MF, CInfo, *VT, CSEInfo, RuleConfig, ST,
+ Libcalls, MDT, LI);
return Impl.combineMachineInstrs();
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
index 0264d88c4d0ec..3e20a486e0ce6 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
@@ -52,8 +52,8 @@ class AMDGPUPostLegalizerCombinerImpl : public Combiner {
public:
AMDGPUPostLegalizerCombinerImpl(
- MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
- GISelValueTracking &VT, GISelCSEInfo *CSEInfo,
+ MachineFunction &MF, CombinerInfo &CInfo, GISelValueTracking &VT,
+ GISelCSEInfo *CSEInfo,
const AMDGPUPostLegalizerCombinerImplRuleConfig &RuleConfig,
const GCNSubtarget &STI, MachineDominatorTree *MDT,
const LegalizerInfo *LI);
@@ -128,11 +128,11 @@ class AMDGPUPostLegalizerCombinerImpl : public Combiner {
#undef GET_GICOMBINER_IMPL
AMDGPUPostLegalizerCombinerImpl::AMDGPUPostLegalizerCombinerImpl(
- MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
- GISelValueTracking &VT, GISelCSEInfo *CSEInfo,
+ MachineFunction &MF, CombinerInfo &CInfo, GISelValueTracking &VT,
+ GISelCSEInfo *CSEInfo,
const AMDGPUPostLegalizerCombinerImplRuleConfig &RuleConfig,
const GCNSubtarget &STI, MachineDominatorTree *MDT, const LegalizerInfo *LI)
- : Combiner(MF, CInfo, TPC, &VT, CSEInfo), RuleConfig(RuleConfig), STI(STI),
+ : Combiner(MF, CInfo, &VT, CSEInfo), RuleConfig(RuleConfig), STI(STI),
TII(*STI.getInstrInfo()),
Helper(Observer, B, /*IsPreLegalize*/ false, &VT, MDT, LI, STI),
#define GET_GICOMBINER_CONSTRUCTOR_INITS
@@ -459,7 +459,6 @@ class AMDGPUPostLegalizerCombiner : public MachineFunctionPass {
} // end anonymous namespace
void AMDGPUPostLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
- AU.addRequired<TargetPassConfig>();
AU.setPreservesCFG();
getSelectionDAGFallbackAnalysisUsage(AU);
AU.addRequired<GISelValueTrackingAnalysisLegacy>();
@@ -480,7 +479,6 @@ AMDGPUPostLegalizerCombiner::AMDGPUPostLegalizerCombiner(bool IsOptNone)
bool AMDGPUPostLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
if (MF.getProperties().hasFailedISel())
return false;
- auto *TPC = &getAnalysis<TargetPassConfig>();
const Function &F = MF.getFunction();
bool EnableOpt =
MF.getTarget().getOptLevel() != CodeGenOptLevel::None && !skipFunction(F);
@@ -502,7 +500,7 @@ bool AMDGPUPostLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
CInfo.ObserverLvl = CombinerInfo::ObserverLevel::SinglePass;
// Legalizer performs DCE, so a full DCE pass is unnecessary.
CInfo.EnableFullDCE = false;
- AMDGPUPostLegalizerCombinerImpl Impl(MF, CInfo, TPC, *VT, /*CSEInfo*/ nullptr,
+ AMDGPUPostLegalizerCombinerImpl Impl(MF, CInfo, *VT, /*CSEInfo*/ nullptr,
RuleConfig, ST, MDT, LI);
return Impl.combineMachineInstrs();
}
@@ -511,7 +509,6 @@ char AMDGPUPostLegalizerCombiner::ID = 0;
INITIALIZE_PASS_BEGIN(AMDGPUPostLegalizerCombiner, DEBUG_TYPE,
"Combine AMDGPU machine instrs after legalization", false,
false)
-INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
INITIALIZE_PASS_DEPENDENCY(GISelValueTrackingAnalysisLegacy)
INITIALIZE_PASS_END(AMDGPUPostLegalizerCombiner, DEBUG_TYPE,
"Combine AMDGPU machine instrs after legalization", false,
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
index 4a70c5d6e78f6..08f78ef820654 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
@@ -49,8 +49,8 @@ class AMDGPUPreLegalizerCombinerImpl : public Combiner {
public:
AMDGPUPreLegalizerCombinerImpl(
- MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
- GISelValueTracking &VT, GISelCSEInfo *CSEInfo,
+ MachineFunction &MF, CombinerInfo &CInfo, GISelValueTracking &VT,
+ GISelCSEInfo *CSEInfo,
const AMDGPUPreLegalizerCombinerImplRuleConfig &RuleConfig,
const GCNSubtarget &STI, MachineDominatorTree *MDT,
const LegalizerInfo *LI);
@@ -88,11 +88,11 @@ class AMDGPUPreLegalizerCombinerImpl : public Combiner {
#undef GET_GICOMBINER_IMPL
AMDGPUPreLegalizerCombinerImpl::AMDGPUPreLegalizerCombinerImpl(
- MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
- GISelValueTracking &VT, GISelCSEInfo *CSEInfo,
+ MachineFunction &MF, CombinerInfo &CInfo, GISelValueTracking &VT,
+ GISelCSEInfo *CSEInfo,
const AMDGPUPreLegalizerCombinerImplRuleConfig &RuleConfig,
const GCNSubtarget &STI, MachineDominatorTree *MDT, const LegalizerInfo *LI)
- : Combiner(MF, CInfo, TPC, &VT, CSEInfo), RuleConfig(RuleConfig), STI(STI),
+ : Combiner(MF, CInfo, &VT, CSEInfo), RuleConfig(RuleConfig), STI(STI),
Helper(Observer, B, /*IsPreLegalize*/ true, &VT, MDT, LI, STI),
#define GET_GICOMBINER_CONSTRUCTOR_INITS
#include "AMDGPUGenPreLegalizeGICombiner.inc"
@@ -278,8 +278,8 @@ bool AMDGPUPreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) {
// This is the first Combiner, so the input IR might contain dead
// instructions.
CInfo.EnableFullDCE = true;
- AMDGPUPreLegalizerCombinerImpl Impl(MF, CInfo, TPC, *VT, CSEInfo, RuleConfig,
- STI, MDT, STI.getLegalizerInfo());
+ AMDGPUPreLegalizerCombinerImpl Impl(MF, CInfo, *VT, CSEInfo, RuleConfig, STI,
+ MDT, STI.getLegalizerInfo());
return Impl.combineMachineInstrs();
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
index e2e84ce2e6219..0e1d4075ed92e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
@@ -52,8 +52,8 @@ class AMDGPURegBankCombinerImpl : public Combiner {
public:
AMDGPURegBankCombinerImpl(
- MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
- GISelValueTracking &VT, GISelCSEInfo *CSEInfo,
+ MachineFunction &MF, CombinerInfo &CInfo, GISelValueTracking &VT,
+ GISelCSEInfo *CSEInfo,
const AMDGPURegBankCombinerImplRuleConfig &RuleConfig,
const GCNSubtarget &STI, MachineDominatorTree *MDT,
const LegalizerInfo *LI);
@@ -115,11 +115,11 @@ class AMDGPURegBankCombinerImpl : public Combiner {
#undef GET_GICOMBINER_IMPL
AMDGPURegBankCombinerImpl::AMDGPURegBankCombinerImpl(
- MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC,
- GISelValueTracking &VT, GISelCSEInfo *CSEInfo,
+ MachineFunction &MF, CombinerInfo &CInfo, GISelValueTracking &VT,
+ GISelCSEInfo *CSEInfo,
const AMDGPURegBankCombinerImplRuleConfig &RuleConfig,
const GCNSubtarget &STI, MachineDominatorTree *MDT, const LegalizerInfo *LI)
- : Combiner(MF, CInfo, TPC, &VT, CSEInfo), RuleConfig(RuleConfig), STI(STI),
+ : Combiner(MF, CInfo, &VT, CSEInfo)...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/188365
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