[llvm] 85e1c64 - [LV][NFC] Remove some unused attributes from tests (#188091)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 23 23:52:37 PDT 2026
Author: David Sherwood
Date: 2026-03-24T06:52:31Z
New Revision: 85e1c641eba7628070b561089af787ed5d07ed86
URL: https://github.com/llvm/llvm-project/commit/85e1c641eba7628070b561089af787ed5d07ed86
DIFF: https://github.com/llvm/llvm-project/commit/85e1c641eba7628070b561089af787ed5d07ed86.diff
LOG: [LV][NFC] Remove some unused attributes from tests (#188091)
The local_unnamed_addr and dso_local attributes add no value to any of
the tests and simply increase file size, so I've removed all instances.
Added:
Modified:
llvm/test/Transforms/LoopVectorize/2016-07-27-loop-vec.ll
llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll
llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll
llvm/test/Transforms/LoopVectorize/AArch64/prefer-fixed-if-equal-to-scalable.ll
llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
llvm/test/Transforms/LoopVectorize/AArch64/sve-invalid-costs.ll
llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
llvm/test/Transforms/LoopVectorize/ARM/prefer-tail-loop-folding.ll
llvm/test/Transforms/LoopVectorize/ARM/tail-folding-allowed.ll
llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
llvm/test/Transforms/LoopVectorize/ARM/tail-folding-reductions-allowed.ll
llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
llvm/test/Transforms/LoopVectorize/PowerPC/interleave_IC.ll
llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
llvm/test/Transforms/LoopVectorize/PowerPC/predcost.ll
llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
llvm/test/Transforms/LoopVectorize/RISCV/illegal-type.ll
llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
llvm/test/Transforms/LoopVectorize/Sparc/no-vectorize.ll
llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
llvm/test/Transforms/LoopVectorize/VE/disable_lv.ll
llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll
llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-use-after-free.ll
llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll
llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
llvm/test/Transforms/LoopVectorize/X86/uniformshift.ll
llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
llvm/test/Transforms/LoopVectorize/X86/x86-pr39099.ll
llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll
llvm/test/Transforms/LoopVectorize/diag-with-hotness-info-2.ll
llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll
llvm/test/Transforms/LoopVectorize/discriminator.ll
llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
llvm/test/Transforms/LoopVectorize/explicit_outer_detection.ll
llvm/test/Transforms/LoopVectorize/explicit_outer_nonuniform_inner.ll
llvm/test/Transforms/LoopVectorize/explicit_outer_uniform_diverg_branch.ll
llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
llvm/test/Transforms/LoopVectorize/fix-reduction-dbg.ll
llvm/test/Transforms/LoopVectorize/forked-pointers.ll
llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
llvm/test/Transforms/LoopVectorize/interleaved-accesses-1.ll
llvm/test/Transforms/LoopVectorize/interleaved-accesses-2.ll
llvm/test/Transforms/LoopVectorize/interleaved-accesses-masked-group.ll
llvm/test/Transforms/LoopVectorize/interleaved-accesses-uniform-load.ll
llvm/test/Transforms/LoopVectorize/libcall-remark.ll
llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
llvm/test/Transforms/LoopVectorize/memdep.ll
llvm/test/Transforms/LoopVectorize/memory-dep-remarks.ll
llvm/test/Transforms/LoopVectorize/middle-block-dbg.ll
llvm/test/Transforms/LoopVectorize/no_array_bounds_scalable.ll
llvm/test/Transforms/LoopVectorize/nounroll.ll
llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
llvm/test/Transforms/LoopVectorize/pr31098.ll
llvm/test/Transforms/LoopVectorize/pr33706.ll
llvm/test/Transforms/LoopVectorize/pr35773.ll
llvm/test/Transforms/LoopVectorize/pr38800.ll
llvm/test/Transforms/LoopVectorize/pr39099.ll
llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
llvm/test/Transforms/LoopVectorize/runtime-check.ll
llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll
llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll
llvm/test/Transforms/LoopVectorize/vect-phiscev-sext-trunc.ll
llvm/test/Transforms/LoopVectorize/vectorizeVFone.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopVectorize/2016-07-27-loop-vec.ll b/llvm/test/Transforms/LoopVectorize/2016-07-27-loop-vec.ll
index 5047d92c9459c..f9d73c2eb25a1 100644
--- a/llvm/test/Transforms/LoopVectorize/2016-07-27-loop-vec.ll
+++ b/llvm/test/Transforms/LoopVectorize/2016-07-27-loop-vec.ll
@@ -1,6 +1,6 @@
; RUN: opt < %s -passes=loop-vectorize -S
-define void @foo() local_unnamed_addr {
+define void @foo() {
entry:
%exitcond = icmp eq i64 3, 3
br label %for.body
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll b/llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
index 53d3e9c96e9fe..04f6e2ca60d5a 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vectorize-addressing.ll
@@ -4,7 +4,7 @@
; RUN: opt < %s -passes=loop-vectorize -mtriple=aarch64--linux-gnu -mattr=+sve -force-vector-width=2 -force-vector-interleave=1 \
; RUN: -prefer-predicate-over-epilogue=scalar-epilogue -scalable-vectorization=on -S -o - | FileCheck --check-prefix=SVE %s
-define dso_local double @test(ptr nocapture noundef readonly %data, ptr nocapture noundef readonly %offset, i32 noundef %size) local_unnamed_addr {
+define double @test(ptr nocapture noundef readonly %data, ptr nocapture noundef readonly %offset, i32 noundef %size) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[SIZE:%.*]], 0
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll b/llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
index 1ddc18142d127..287e52fbdaf97 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/nontemporal-load-store.ll
@@ -184,7 +184,7 @@ for.body: ; preds = %entry, %for.body
for.cond.cleanup: ; preds = %for.body
ret void
}
-define void @test_i64_store(ptr nocapture %ddst) local_unnamed_addr #0 {
+define void @test_i64_store(ptr nocapture %ddst) #0 {
; CHECK-LE-LABEL: define void @test_i64_store(
; CHECK-LE-LABEL: vector.body:
; CHECK-LE: store <4 x i64> {{.*}} !nontemporal !0
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll b/llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
index 567b076fa7cf7..e6be3414eb26a 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
@@ -1,8 +1,8 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
; RUN: opt -S -mtriple aarch64 -mattr=+sve -passes=loop-vectorize -enable-vplan-native-path < %s | FileCheck %s
- at A = external local_unnamed_addr global [1024 x float], align 4
- at B = external local_unnamed_addr global [512 x float], align 4
+ at A = external global [1024 x float], align 4
+ at B = external global [512 x float], align 4
; Test if the vplan-native-path successfully vectorizes a loop using scalable vectors if the target preferes scalable vectors.
define void @foo() {
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
index aa882a65d2426..c37c94b2d58af 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce-dot-product.ll
@@ -2113,8 +2113,8 @@ exit: ; preds = %for.cond.cleanup.loopexit, %ent
ret i64 %result
}
-define dso_local i32 @not_dotp_vscale1(ptr %a, ptr %b, i32 %n, i64 %cost) #0 {
-; CHECK-INTERLEAVE1-LABEL: define dso_local i32 @not_dotp_vscale1(
+define i32 @not_dotp_vscale1(ptr %a, ptr %b, i32 %n, i64 %cost) #0 {
+; CHECK-INTERLEAVE1-LABEL: define i32 @not_dotp_vscale1(
; CHECK-INTERLEAVE1-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i32 [[N:%.*]], i64 [[COST:%.*]]) #[[ATTR0]] {
; CHECK-INTERLEAVE1-NEXT: entry:
; CHECK-INTERLEAVE1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0
@@ -2155,7 +2155,7 @@ define dso_local i32 @not_dotp_vscale1(ptr %a, ptr %b, i32 %n, i64 %cost) #0 {
; CHECK-INTERLEAVE1-NEXT: br i1 [[CMP_N]], label [[EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]]
; CHECK-INTERLEAVE1: scalar.ph:
;
-; CHECK-INTERLEAVED-LABEL: define dso_local i32 @not_dotp_vscale1(
+; CHECK-INTERLEAVED-LABEL: define i32 @not_dotp_vscale1(
; CHECK-INTERLEAVED-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i32 [[N:%.*]], i64 [[COST:%.*]]) #[[ATTR0]] {
; CHECK-INTERLEAVED-NEXT: entry:
; CHECK-INTERLEAVED-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0
@@ -2207,7 +2207,7 @@ define dso_local i32 @not_dotp_vscale1(ptr %a, ptr %b, i32 %n, i64 %cost) #0 {
; CHECK-INTERLEAVED-NEXT: br i1 [[CMP_N]], label [[EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]]
; CHECK-INTERLEAVED: scalar.ph:
;
-; CHECK-MAXBW-LABEL: define dso_local i32 @not_dotp_vscale1(
+; CHECK-MAXBW-LABEL: define i32 @not_dotp_vscale1(
; CHECK-MAXBW-SAME: ptr [[A:%.*]], ptr [[B:%.*]], i32 [[N:%.*]], i64 [[COST:%.*]]) #[[ATTR0]] {
; CHECK-MAXBW-NEXT: entry:
; CHECK-MAXBW-NEXT: [[CMP:%.*]] = icmp sgt i32 [[N]], 0
@@ -2276,8 +2276,8 @@ exit: ; preds = %for.cond.cleanup.loopexit, %ent
}
-define dso_local void @not_dotp_high_register_pressure(ptr %a, ptr %b, ptr %sum, i32 %n) #1 {
-; CHECK-INTERLEAVE1-LABEL: define dso_local void @not_dotp_high_register_pressure(
+define void @not_dotp_high_register_pressure(ptr %a, ptr %b, ptr %sum, i32 %n) #1 {
+; CHECK-INTERLEAVE1-LABEL: define void @not_dotp_high_register_pressure(
; CHECK-INTERLEAVE1-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[SUM:%.*]], i32 [[N:%.*]]) #[[ATTR1]] {
; CHECK-INTERLEAVE1-NEXT: entry:
; CHECK-INTERLEAVE1-NEXT: [[CMP100:%.*]] = icmp sgt i32 [[N]], 0
@@ -2377,7 +2377,7 @@ define dso_local void @not_dotp_high_register_pressure(ptr %a, ptr %b, ptr %sum,
; CHECK-INTERLEAVE1-NEXT: br i1 [[CMP_N]], label [[FOR_COND_FOR_COND_CLEANUP_CRIT_EDGE:%.*]], label [[SCALAR_PH]]
; CHECK-INTERLEAVE1: scalar.ph:
;
-; CHECK-INTERLEAVED-LABEL: define dso_local void @not_dotp_high_register_pressure(
+; CHECK-INTERLEAVED-LABEL: define void @not_dotp_high_register_pressure(
; CHECK-INTERLEAVED-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[SUM:%.*]], i32 [[N:%.*]]) #[[ATTR1]] {
; CHECK-INTERLEAVED-NEXT: entry:
; CHECK-INTERLEAVED-NEXT: [[CMP100:%.*]] = icmp sgt i32 [[N]], 0
@@ -2477,7 +2477,7 @@ define dso_local void @not_dotp_high_register_pressure(ptr %a, ptr %b, ptr %sum,
; CHECK-INTERLEAVED-NEXT: br i1 [[CMP_N]], label [[FOR_COND_FOR_COND_CLEANUP_CRIT_EDGE:%.*]], label [[SCALAR_PH]]
; CHECK-INTERLEAVED: scalar.ph:
;
-; CHECK-MAXBW-LABEL: define dso_local void @not_dotp_high_register_pressure(
+; CHECK-MAXBW-LABEL: define void @not_dotp_high_register_pressure(
; CHECK-MAXBW-SAME: ptr [[A:%.*]], ptr [[B:%.*]], ptr [[SUM:%.*]], i32 [[N:%.*]]) #[[ATTR1]] {
; CHECK-MAXBW-NEXT: entry:
; CHECK-MAXBW-NEXT: [[CMP100:%.*]] = icmp sgt i32 [[N]], 0
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll b/llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll
index ab1486da794f7..11f7a7e5f02d0 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/pr33053.ll
@@ -2,10 +2,10 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-gnu"
- at b = common local_unnamed_addr global i32 0, align 4
- at a = common local_unnamed_addr global ptr null, align 8
+ at b = common global i32 0, align 4
+ at a = common global ptr null, align 8
-define i32 @fn1() local_unnamed_addr #0 {
+define i32 @fn1() #0 {
; We expect the backend to expand all reductions.
; CHECK: @llvm.vector.reduce
entry:
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll b/llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll
index 33ce300d68592..1c04cc0a00307 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll
@@ -7,11 +7,11 @@ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
%struct.anon = type { i8 }
- at c = local_unnamed_addr global [6 x i8] zeroinitializer, align 1
+ at c = global [6 x i8] zeroinitializer, align 1
@b = internal global %struct.anon zeroinitializer, align 1
; Function Attrs: noreturn nounwind
-define void @_Z1dv() local_unnamed_addr #0 {
+define void @_Z1dv() #0 {
; CHECK-LABEL: @_Z1dv(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CALL:%.*]] = tail call ptr @"_ZN3$_01aEv"(ptr nonnull @b)
@@ -81,4 +81,4 @@ for.body: ; preds = %for.body, %for.body
br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
}
-declare ptr @"_ZN3$_01aEv"(ptr) local_unnamed_addr #1
+declare ptr @"_ZN3$_01aEv"(ptr) #1
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/prefer-fixed-if-equal-to-scalable.ll b/llvm/test/Transforms/LoopVectorize/AArch64/prefer-fixed-if-equal-to-scalable.ll
index 64f1b28d68287..944d6b127d01d 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/prefer-fixed-if-equal-to-scalable.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/prefer-fixed-if-equal-to-scalable.ll
@@ -8,8 +8,8 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "aarch64-unknown-linux-gnu"
- at a = dso_local local_unnamed_addr global [32000 x float] zeroinitializer, align 64
- at b = dso_local local_unnamed_addr global [32000 x float] zeroinitializer, align 64
+ at a = global [32000 x float] zeroinitializer, align 64
+ at b = global [32000 x float] zeroinitializer, align 64
define void @test() #0 {
; CHECK-GENERIC-LABEL: define void @test(
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll b/llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
index d4fb3d70c538d..19090d9525d69 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/reg-usage.ll
@@ -69,7 +69,7 @@ exit:
ret void
}
-define dso_local void @dotp_high_register_pressure(ptr %a, ptr %b, ptr %sum, i32 %n) #1 {
+define void @dotp_high_register_pressure(ptr %a, ptr %b, ptr %sum, i32 %n) #1 {
; CHECK-LABEL: LV: Checking a loop in 'dotp_high_register_pressure' from <stdin>
; CHECK: LV(REG): VF = 16
; CHECK-NEXT: LV(REG): Found max usage: 2 item
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
index cf1dd467647fe..b099ea1b8d7cc 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-illegal-type.ll
@@ -4,7 +4,7 @@
target triple = "aarch64-linux-gnu"
; CHECK-REMARKS: Scalable vectorization is not supported for all element types found in this loop
-define dso_local void @loop_sve_i128(ptr nocapture %ptr, i64 %N) {
+define void @loop_sve_i128(ptr nocapture %ptr, i64 %N) {
; CHECK-LABEL: @loop_sve_i128
; CHECK: vector.body
; CHECK: %[[LOAD1:.*]] = load i128, ptr {{.*}}
@@ -31,7 +31,7 @@ for.end:
}
; CHECK-REMARKS: Scalable vectorization is not supported for all element types found in this loop
-define dso_local void @loop_sve_f128(ptr nocapture %ptr, i64 %N) {
+define void @loop_sve_f128(ptr nocapture %ptr, i64 %N) {
; CHECK-LABEL: @loop_sve_f128
; CHECK: vector.body
; CHECK: %[[LOAD1:.*]] = load fp128, ptr
@@ -58,7 +58,7 @@ for.end:
}
; CHECK-REMARKS: Scalable vectorization is not supported for all element types found in this loop
-define dso_local void @loop_invariant_sve_i128(ptr nocapture %ptr, i128 %val, i64 %N) {
+define void @loop_invariant_sve_i128(ptr nocapture %ptr, i128 %val, i64 %N) {
; CHECK-LABEL: @loop_invariant_sve_i128
; CHECK: vector.body
; CHECK: %[[GEP1:.*]] = getelementptr inbounds i128, ptr %ptr
@@ -80,7 +80,7 @@ for.end:
ret void
}
-define dso_local void @loop_fixed_width_i128(ptr nocapture %ptr, i64 %N) {
+define void @loop_fixed_width_i128(ptr nocapture %ptr, i64 %N) {
; CHECK-LABEL: @loop_fixed_width_i128
; CHECK: load <4 x i128>, ptr
; CHECK: add nsw <4 x i128> {{.*}}, splat (i128 42)
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
index 41e14358418ac..d288bb9ea0e72 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
@@ -176,7 +176,7 @@ for.end: ; preds = %for.body
; }
- at CD_i16 = dso_local local_unnamed_addr global [1024 x i16] zeroinitializer, align 2
+ at CD_i16 = global [1024 x i16] zeroinitializer, align 2
define void @test_array_load2_store2_i16(i32 noundef %C, i32 noundef %D) #1 {
; CHECK-LABEL: @test_array_load2_store2_i16(
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
index cad372424fe05..f352fa12e1093 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-masked-accesses.ll
@@ -21,9 +21,9 @@ target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
; }
; }
;}
-define dso_local void @masked_strided1(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr #0 {
-; SCALAR_TAIL_FOLDING-LABEL: define dso_local void @masked_strided1
-; SCALAR_TAIL_FOLDING-SAME: (ptr noalias readonly captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+define void @masked_strided1(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) #0 {
+; SCALAR_TAIL_FOLDING-LABEL: define void @masked_strided1
+; SCALAR_TAIL_FOLDING-SAME: (ptr noalias readonly captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD:%.*]]) #[[ATTR0:[0-9]+]] {
; SCALAR_TAIL_FOLDING-NEXT: entry:
; SCALAR_TAIL_FOLDING-NEXT: [[CONV:%.*]] = zext i8 [[GUARD]] to i32
; SCALAR_TAIL_FOLDING-NEXT: [[TMP0:%.*]] = call i32 @llvm.vscale.i32()
@@ -68,8 +68,8 @@ define dso_local void @masked_strided1(ptr noalias nocapture readonly %p, ptr no
; SCALAR_TAIL_FOLDING-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
; SCALAR_TAIL_FOLDING: scalar.ph:
;
-; PREDICATED_TAIL_FOLDING-LABEL: define dso_local void @masked_strided1
-; PREDICATED_TAIL_FOLDING-SAME: (ptr noalias readonly captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+; PREDICATED_TAIL_FOLDING-LABEL: define void @masked_strided1
+; PREDICATED_TAIL_FOLDING-SAME: (ptr noalias readonly captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD:%.*]]) #[[ATTR0:[0-9]+]] {
; PREDICATED_TAIL_FOLDING-NEXT: entry:
; PREDICATED_TAIL_FOLDING-NEXT: br label [[VECTOR_PH:%.*]]
; PREDICATED_TAIL_FOLDING: vector.ph:
@@ -161,9 +161,9 @@ for.end:
; q[2*ix+1] = 2;
; }
;}
-define dso_local void @masked_strided2(ptr noalias nocapture readnone %p, ptr noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr #0 {
-; SCALAR_TAIL_FOLDING-LABEL: define dso_local void @masked_strided2
-; SCALAR_TAIL_FOLDING-SAME: (ptr noalias readnone captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD:%.*]]) local_unnamed_addr #[[ATTR0]] {
+define void @masked_strided2(ptr noalias nocapture readnone %p, ptr noalias nocapture %q, i8 zeroext %guard) #0 {
+; SCALAR_TAIL_FOLDING-LABEL: define void @masked_strided2
+; SCALAR_TAIL_FOLDING-SAME: (ptr noalias readnone captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD:%.*]]) #[[ATTR0]] {
; SCALAR_TAIL_FOLDING-NEXT: entry:
; SCALAR_TAIL_FOLDING-NEXT: [[CONV:%.*]] = zext i8 [[GUARD]] to i32
; SCALAR_TAIL_FOLDING-NEXT: [[TMP0:%.*]] = call i32 @llvm.vscale.i32()
@@ -201,8 +201,8 @@ define dso_local void @masked_strided2(ptr noalias nocapture readnone %p, ptr no
; SCALAR_TAIL_FOLDING-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
; SCALAR_TAIL_FOLDING: scalar.ph:
;
-; PREDICATED_TAIL_FOLDING-LABEL: define dso_local void @masked_strided2
-; PREDICATED_TAIL_FOLDING-SAME: (ptr noalias readnone captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; PREDICATED_TAIL_FOLDING-LABEL: define void @masked_strided2
+; PREDICATED_TAIL_FOLDING-SAME: (ptr noalias readnone captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD:%.*]]) #[[ATTR0]] {
; PREDICATED_TAIL_FOLDING-NEXT: entry:
; PREDICATED_TAIL_FOLDING-NEXT: br label [[VECTOR_PH:%.*]]
; PREDICATED_TAIL_FOLDING: vector.ph:
@@ -282,9 +282,9 @@ for.end:
; }
; }
;}
-define dso_local void @masked_strided3(ptr noalias nocapture readnone %p, ptr noalias nocapture %q, i8 zeroext %guard1, i8 zeroext %guard2) local_unnamed_addr #0 {
-; SCALAR_TAIL_FOLDING-LABEL: define dso_local void @masked_strided3
-; SCALAR_TAIL_FOLDING-SAME: (ptr noalias readnone captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD1:%.*]], i8 zeroext [[GUARD2:%.*]]) local_unnamed_addr #[[ATTR0]] {
+define void @masked_strided3(ptr noalias nocapture readnone %p, ptr noalias nocapture %q, i8 zeroext %guard1, i8 zeroext %guard2) #0 {
+; SCALAR_TAIL_FOLDING-LABEL: define void @masked_strided3
+; SCALAR_TAIL_FOLDING-SAME: (ptr noalias readnone captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD1:%.*]], i8 zeroext [[GUARD2:%.*]]) #[[ATTR0]] {
; SCALAR_TAIL_FOLDING-NEXT: entry:
; SCALAR_TAIL_FOLDING-NEXT: [[CONV:%.*]] = zext i8 [[GUARD1]] to i32
; SCALAR_TAIL_FOLDING-NEXT: [[CONV3:%.*]] = zext i8 [[GUARD2]] to i32
@@ -326,8 +326,8 @@ define dso_local void @masked_strided3(ptr noalias nocapture readnone %p, ptr no
; SCALAR_TAIL_FOLDING-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
; SCALAR_TAIL_FOLDING: scalar.ph:
;
-; PREDICATED_TAIL_FOLDING-LABEL: define dso_local void @masked_strided3
-; PREDICATED_TAIL_FOLDING-SAME: (ptr noalias readnone captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD1:%.*]], i8 zeroext [[GUARD2:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; PREDICATED_TAIL_FOLDING-LABEL: define void @masked_strided3
+; PREDICATED_TAIL_FOLDING-SAME: (ptr noalias readnone captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD1:%.*]], i8 zeroext [[GUARD2:%.*]]) #[[ATTR0]] {
; PREDICATED_TAIL_FOLDING-NEXT: entry:
; PREDICATED_TAIL_FOLDING-NEXT: br label [[VECTOR_PH:%.*]]
; PREDICATED_TAIL_FOLDING: vector.ph:
@@ -425,9 +425,9 @@ for.end:
; }
; }
;}
-define dso_local void @masked_strided_factor4(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr #0 {
-; SCALAR_TAIL_FOLDING-LABEL: define dso_local void @masked_strided_factor4
-; SCALAR_TAIL_FOLDING-SAME: (ptr noalias readonly captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD:%.*]]) local_unnamed_addr #[[ATTR0]] {
+define void @masked_strided_factor4(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) #0 {
+; SCALAR_TAIL_FOLDING-LABEL: define void @masked_strided_factor4
+; SCALAR_TAIL_FOLDING-SAME: (ptr noalias readonly captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD:%.*]]) #[[ATTR0]] {
; SCALAR_TAIL_FOLDING-NEXT: entry:
; SCALAR_TAIL_FOLDING-NEXT: [[CONV:%.*]] = zext i8 [[GUARD]] to i32
; SCALAR_TAIL_FOLDING-NEXT: [[TMP0:%.*]] = call i32 @llvm.vscale.i32()
@@ -476,8 +476,8 @@ define dso_local void @masked_strided_factor4(ptr noalias nocapture readonly %p,
; SCALAR_TAIL_FOLDING-NEXT: br i1 [[CMP_N]], label [[FOR_END:%.*]], label [[SCALAR_PH]]
; SCALAR_TAIL_FOLDING: scalar.ph:
;
-; PREDICATED_TAIL_FOLDING-LABEL: define dso_local void @masked_strided_factor4
-; PREDICATED_TAIL_FOLDING-SAME: (ptr noalias readonly captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; PREDICATED_TAIL_FOLDING-LABEL: define void @masked_strided_factor4
+; PREDICATED_TAIL_FOLDING-SAME: (ptr noalias readonly captures(none) [[P:%.*]], ptr noalias captures(none) [[Q:%.*]], i8 zeroext [[GUARD:%.*]]) #[[ATTR0]] {
; PREDICATED_TAIL_FOLDING-NEXT: entry:
; PREDICATED_TAIL_FOLDING-NEXT: br label [[VECTOR_PH:%.*]]
; PREDICATED_TAIL_FOLDING: vector.ph:
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve-invalid-costs.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve-invalid-costs.ll
index 487d9788a13fc..cb049c7f1a91a 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve-invalid-costs.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve-invalid-costs.ll
@@ -3,7 +3,7 @@
; RUN: -prefer-predicate-over-epilogue=scalar-epilogue -S -disable-output 2>&1 | FileCheck %s
target triple = "aarch64-linux-gnu"
-define dso_local void @loop_sve_i1(ptr nocapture %ptr, i64 %N) {
+define void @loop_sve_i1(ptr nocapture %ptr, i64 %N) {
; CHECK-LABEL: LV: Checking a loop in 'loop_sve_i1'
; CHECK: LV: Found an estimated cost of Invalid for VF vscale x 4 For instruction: %0 = load i1, ptr %arrayidx, align 16
; CHECK: LV: Found an estimated cost of Invalid for VF vscale x 4 For instruction: store i1 %add, ptr %arrayidx, align 16
diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll b/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
index 98b0f46cfc683..71e9b6ac30df3 100644
--- a/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
+++ b/llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
@@ -472,8 +472,8 @@ for.exit:
}
;; Test that we can handle more than one GEP index.
- at idx_array = dso_local local_unnamed_addr global [1048576 x i32] zeroinitializer, align 4
- at data_array = dso_local local_unnamed_addr global [1048576 x i32] zeroinitializer, align 4
+ at idx_array = global [1048576 x i32] zeroinitializer, align 4
+ at data_array = global [1048576 x i32] zeroinitializer, align 4
define void @histogram_array_3op_gep(i64 noundef %N) #0 {
; CHECK-LABEL: define void @histogram_array_3op_gep(
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll b/llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
index 23609b1041ae2..3a717ea8332aa 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/mve-known-trip-count.ll
@@ -236,7 +236,7 @@ for.body: ; preds = %entry, %for.body
; CHECK-LABEL: predicated_test
; CHECK: LV: Selecting VF: 1
; CHECK: LV: Selecting VF: 1
-define dso_local i32 @predicated_test(i32 noundef %0, ptr %glob) #0 {
+define i32 @predicated_test(i32 noundef %0, ptr %glob) #0 {
%2 = alloca [101 x i32], align 4
%3 = alloca [21 x i32], align 4
call void @llvm.lifetime.start.p0(ptr nonnull %2)
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/prefer-tail-loop-folding.ll b/llvm/test/Transforms/LoopVectorize/ARM/prefer-tail-loop-folding.ll
index 52eb558dda06a..806303c91396e 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/prefer-tail-loop-folding.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/prefer-tail-loop-folding.ll
@@ -308,7 +308,7 @@ for.body:
br i1 %cmp, label %for.body, label %for.cond.cleanup, !llvm.loop !5
}
-define dso_local void @half(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C) #0 {
+define void @half(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C) #0 {
; CHECK-LABEL: half(
; PREFER-FOLDING: vector.body:
; PREFER-FOLDING: call <8 x half> @llvm.masked.load.v8f16.p0
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-allowed.ll b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-allowed.ll
index 82ac429720483..307fac8835327 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-allowed.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-allowed.ll
@@ -5,7 +5,7 @@ target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
; Test that ARMTTIImpl::preferPredicateOverEpilogue triggers tail-folding.
-define dso_local void @f1(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C, i32 %N) {
+define void @f1(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C, i32 %N) {
; CHECK-LABEL: f1(
; CHECK: entry:
; CHECK: @llvm.get.active.lane.mask
@@ -37,7 +37,7 @@ for.body: ; preds = %for.body.preheader,
br i1 %exitcond.not, label %for.cond.cleanup.loopexit, label %for.body
}
-define dso_local void @f32_reduction(ptr nocapture readonly %Input, i32 %N, ptr nocapture %Output) {
+define void @f32_reduction(ptr nocapture readonly %Input, i32 %N, ptr nocapture %Output) {
; CHECK-LABEL: f32_reduction(
; CHECK: vector.body:
; CHECK: @llvm.masked.load
@@ -72,7 +72,7 @@ while.end: ; preds = %while.end.loopexit,
ret void
}
-define dso_local void @f16_reduction(ptr nocapture readonly %Input, i32 %N, ptr nocapture %Output) {
+define void @f16_reduction(ptr nocapture readonly %Input, i32 %N, ptr nocapture %Output) {
; CHECK-LABEL: f16_reduction(
; CHECK: vector.body:
; CHECK: @llvm.masked.load
@@ -107,7 +107,7 @@ while.end: ; preds = %while.end.loopexit,
ret void
}
-define dso_local void @mixed_f32_i32_reduction(ptr nocapture readonly %fInput, ptr nocapture readonly %iInput, i32 %N, ptr nocapture %fOutput, ptr nocapture %iOutput) {
+define void @mixed_f32_i32_reduction(ptr nocapture readonly %fInput, ptr nocapture readonly %iInput, i32 %N, ptr nocapture %fOutput, ptr nocapture %iOutput) {
; CHECK-LABEL: mixed_f32_i32_reduction(
; CHECK: vector.body:
; CHECK: @llvm.masked.load
@@ -153,7 +153,7 @@ while.end:
ret void
}
-define dso_local i32 @i32_mul_reduction(ptr noalias nocapture readonly %B, i32 %N) {
+define i32 @i32_mul_reduction(ptr noalias nocapture readonly %B, i32 %N) {
; CHECK-LABEL: i32_mul_reduction(
; CHECK: vector.body:
; CHECK: @llvm.masked.load
@@ -184,7 +184,7 @@ for.body:
br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
}
-define dso_local i32 @i32_or_reduction(ptr noalias nocapture readonly %B, i32 %N) {
+define i32 @i32_or_reduction(ptr noalias nocapture readonly %B, i32 %N) {
; CHECK-LABEL: i32_or_reduction(
; CHECK: vector.body:
; CHECK: @llvm.masked.load
@@ -215,7 +215,7 @@ for.body: ; preds = %for.body.preheader,
br i1 %exitcond, label %for.cond.cleanup.loopexit, label %for.body
}
-define dso_local i32 @i32_and_reduction(ptr noalias nocapture readonly %A, i32 %N, i32 %S) {
+define i32 @i32_and_reduction(ptr noalias nocapture readonly %A, i32 %N, i32 %S) {
; CHECK-LABEL: i32_and_reduction(
; CHECK: vector.body:
; CHECK: @llvm.masked.load
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
index 27946efc6af04..0ddc6ac470ca8 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-counting-down.ll
@@ -13,7 +13,7 @@ target triple = "thumbv8.1m.main-arm-unknown-eabihf"
; *c++ = *a++ + *b++;
; }
;
-define dso_local void @sgt_loopguard(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) local_unnamed_addr #0 {
+define void @sgt_loopguard(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) #0 {
; COMMON-LABEL: @sgt_loopguard(
; COMMON: vector.body:
@@ -54,7 +54,7 @@ while.end:
; No loop-guard: we need one for this to be valid.
;
-define dso_local void @sgt_no_loopguard(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) local_unnamed_addr #0 {
+define void @sgt_no_loopguard(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) #0 {
; COMMON-LABEL: @sgt_no_loopguard(
; COMMON: vector.body:
; CHECK-TF: masked.load
@@ -86,7 +86,7 @@ while.end:
ret void
}
-define dso_local void @sgt_extra_use_cmp(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) local_unnamed_addr #0 {
+define void @sgt_extra_use_cmp(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) #0 {
; COMMON-LABEL: @sgt_extra_use_cmp(
; COMMON: vector.body:
; CHECK-TF: masked.load
@@ -120,7 +120,7 @@ while.end:
ret void
}
-define dso_local void @sgt_const_tripcount(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) local_unnamed_addr #0 {
+define void @sgt_const_tripcount(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) #0 {
; COMMON-LABEL: @sgt_const_tripcount(
; COMMON: vector.body:
; CHECK-TF: masked.load
@@ -156,7 +156,7 @@ while.end:
ret void
}
-define dso_local void @sgt_no_guard_0_startval(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) local_unnamed_addr #0 {
+define void @sgt_no_guard_0_startval(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) #0 {
; COMMON-LABEL: @sgt_no_guard_0_startval(
; COMMON-NOT: vector.body:
entry:
@@ -185,7 +185,7 @@ while.end:
ret void
}
-define dso_local void @sgt_step_minus_two(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) local_unnamed_addr #0 {
+define void @sgt_step_minus_two(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) #0 {
; COMMON-LABEL: @sgt_step_minus_two(
; COMMON: vector.body:
; CHECK-TF: masked.load
@@ -221,7 +221,7 @@ while.end:
ret void
}
-define dso_local void @sgt_step_not_constant(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N, i32 %S) local_unnamed_addr #0 {
+define void @sgt_step_not_constant(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N, i32 %S) #0 {
; COMMON-LABEL: @sgt_step_not_constant(
; COMMON-NOT: vector.body:
entry:
@@ -254,7 +254,7 @@ while.end:
ret void
}
-define dso_local void @icmp_eq(ptr noalias nocapture readonly %A, ptr noalias nocapture readonly %B, ptr noalias nocapture %C, i32 %N) #0 {
+define void @icmp_eq(ptr noalias nocapture readonly %A, ptr noalias nocapture readonly %B, ptr noalias nocapture %C, i32 %N) #0 {
; COMMON-LABEL: @icmp_eq
; COMMON: vector.body:
entry:
@@ -295,7 +295,7 @@ while.end:
; c[i] = a[i] + b[i];
; }
;
-define dso_local void @sgt_for_loop(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) local_unnamed_addr #0 {
+define void @sgt_for_loop(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) #0 {
; COMMON-LABEL: @sgt_for_loop(
; COMMON: vector.body:
; CHECK-PREFER: masked.load
@@ -334,7 +334,7 @@ for.end:
ret void
}
-define dso_local void @sgt_for_loop_i64(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) local_unnamed_addr #0 {
+define void @sgt_for_loop_i64(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) #0 {
; COMMON-LABEL: @sgt_for_loop_i64(
; COMMON: vector.body:
;
@@ -389,7 +389,7 @@ for.body:
; transform this because the inner loop because isGuarded returns
; false for the inner-loop.
;
-define dso_local void @sgt_nested_loop(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) local_unnamed_addr #0 {
+define void @sgt_nested_loop(ptr noalias nocapture readonly %a, ptr noalias nocapture readonly %b, ptr noalias nocapture %c, i32 %N) #0 {
; COMMON-LABEL: @sgt_nested_loop(
; DEFAULT-NOT: vector.body:
; CHECK-TF-NOT: masked.load
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
index 1ae71c8695401..f205e21762317 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-loop-hint.ll
@@ -9,7 +9,7 @@ target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
; ARMHWLoops: Trip count does not fit into 32bits
; preferPredicateOverEpilogue: hardware-loop is not profitable.
;
-define dso_local void @tail_folding(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C) {
+define void @tail_folding(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C) {
; CHECK-LABEL: tail_folding(
; CHECK: vector.body:
; CHECK-NOT: call <4 x i32> @llvm.masked.load.v4i32.p0(
@@ -40,7 +40,7 @@ for.body:
; The same test case but now with predicate.enable = true should get
; tail-folded.
;
-define dso_local void @predicate_loop_hint(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C) {
+define void @predicate_loop_hint(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C) {
; CHECK-LABEL: predicate_loop_hint(
; CHECK: vector.body:
; CHECK: %index = phi i64 [ 0, %vector.ph ], [ %index.next, %vector.body ]
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
index 42a9bcc62a114..3d15b95ca27a0 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
@@ -479,7 +479,7 @@ for.body:
; which aren't supported by the lowoverhead loop pass, causing the tail-predication
; to be reverted which is expensive and what we would like to avoid.
;
-define dso_local void @select_not_allowed(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C, i32 %N, ptr noalias nocapture readonly %Cond) {
+define void @select_not_allowed(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C, i32 %N, ptr noalias nocapture readonly %Cond) {
; CHECK-LABEL: @select_not_allowed(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[N:%.*]], 0
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
index 80fea2e5896ab..9ff3527d1c119 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-prefer-flag.ll
@@ -11,7 +11,7 @@ target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
; get tail-folded, except with -prefer-predicate-over-epilog which then
; overrules this.
;
-define dso_local void @flag_overrules_hint(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C) local_unnamed_addr #0 {
+define void @flag_overrules_hint(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C) #0 {
; CHECK-LABEL: flag_overrules_hint(
; CHECK: vector.body:
; CHECK-NOT: @llvm.masked.load.v8i32.p0(
@@ -49,7 +49,7 @@ for.body:
br i1 %exitcond, label %for.cond.cleanup, label %for.body, !llvm.loop !10
}
-define dso_local void @interleave4(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C, i32 %N) local_unnamed_addr #0 {
+define void @interleave4(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C, i32 %N) #0 {
; PREDFLAG-LABEL: interleave4(
; PREDFLAG: %[[ADD2:.*]] = add i32 %index, 4
; PREDFLAG: %[[ADD3:.*]] = add i32 %index, 8
diff --git a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-reductions-allowed.ll b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-reductions-allowed.ll
index 0313cd7b8a710..9fa16ee89978c 100644
--- a/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-reductions-allowed.ll
+++ b/llvm/test/Transforms/LoopVectorize/ARM/tail-folding-reductions-allowed.ll
@@ -12,7 +12,7 @@ target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
; Check that this reduction is allowed, except when reductions are disable on
; the command line.
;
-define dso_local i32 @i32_add_reduction(ptr noalias nocapture readonly %B, i32 %N) local_unnamed_addr #0 {
+define i32 @i32_add_reduction(ptr noalias nocapture readonly %B, i32 %N) #0 {
; COMMON-LABEL: i32_add_reduction(
; COMMON: entry:
; CHECK: @llvm.get.active.lane.mask
diff --git a/llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll b/llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
index 26bab4dfeaf4d..480a69c465d25 100644
--- a/llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
+++ b/llvm/test/Transforms/LoopVectorize/Hexagon/minimum-vf.ll
@@ -9,7 +9,7 @@ target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i
%s.0 = type { ptr, i32, i32, i32, i32 }
- at g0 = external dso_local local_unnamed_addr global ptr, align 4
+ at g0 = external global ptr, align 4
declare void @llvm.lifetime.start.p0(ptr nocapture) #0
declare void @llvm.lifetime.end.p0(ptr nocapture) #0
diff --git a/llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll b/llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
index 5cfdd635e6883..1de6e128d22f6 100644
--- a/llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
+++ b/llvm/test/Transforms/LoopVectorize/LoongArch/loongarch-interleaved.ll
@@ -6,7 +6,7 @@
; CHECK: %{{.*}} = add {{.*}}, 8
; Function Attrs: nofree norecurse nosync nounwind writeonly
-define dso_local void @foo(i32 signext %n, ptr nocapture %A) local_unnamed_addr #0 {
+define void @foo(i32 signext %n, ptr nocapture %A) #0 {
entry:
%cmp5 = icmp sgt i32 %n, 0
br i1 %cmp5, label %for.body.preheader, label %for.cond.cleanup
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/interleave_IC.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/interleave_IC.ll
index c12b3b122ba74..c1acb98b425d8 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/interleave_IC.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/interleave_IC.ll
@@ -20,7 +20,7 @@
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-unknown-linux-gnu"
-define dso_local void @test(ptr %arg, ptr %arg1) align 2 {
+define void @test(ptr %arg, ptr %arg1) align 2 {
bb:
%tpm15 = load ptr, ptr %arg, align 8
%tpm19 = load ptr, ptr %arg1, align 8
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
index 5ccbd199e8fe2..6feb43c56fb1f 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization-profitability.ll
@@ -18,7 +18,7 @@ target triple = "powerpc64le-unknown-linux-gnu"
; CHECK-NOT: vec.epilog.middle.block
; CHECK: ret void
-define dso_local void @f1(ptr noalias %aa, ptr noalias %bb, ptr noalias %cc, i32 signext %N) #0 {
+define void @f1(ptr noalias %aa, ptr noalias %bb, ptr noalias %cc, i32 signext %N) #0 {
entry:
%cmp1 = icmp sgt i32 %N, 0
br i1 %cmp1, label %for.body.preheader, label %for.end
@@ -56,7 +56,7 @@ for.end: ; preds = %for.end.loopexit, %
; CHECK-NOT: vec.epilog.middle.block
; CHECK: ret void
-define dso_local void @f2(ptr noalias %aa, ptr noalias %bb, ptr noalias %cc, i32 signext %N) #1 {
+define void @f2(ptr noalias %aa, ptr noalias %bb, ptr noalias %cc, i32 signext %N) #1 {
entry:
%cmp1 = icmp sgt i32 %N, 0
br i1 %cmp1, label %for.body.preheader, label %for.end
@@ -113,7 +113,7 @@ for.end: ; preds = %for.end.loopexit, %
; CHECK: vec.epilog.middle.block
; CHECK: ret void
-define dso_local void @f3(ptr noalias %aa, ptr noalias %bb, ptr noalias %cc, i32 signext %N) {
+define void @f3(ptr noalias %aa, ptr noalias %bb, ptr noalias %cc, i32 signext %N) {
entry:
%cmp1 = icmp sgt i32 %N, 0
br i1 %cmp1, label %for.body.preheader, label %for.end
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/predcost.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/predcost.ll
index be2dfd4739e44..7794f56d2de85 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/predcost.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/predcost.ll
@@ -3,7 +3,7 @@
target datalayout = "e-m:e-Fn32-i64:64-n32:64-S128-v256:256:256-v512:512:512"
target triple = "powerpc64le-unknown-linux-gnu"
-define dso_local void @_tc(ptr nocapture noundef %aaa, i64 noundef %bbb) local_unnamed_addr {
+define void @_tc(ptr nocapture noundef %aaa, i64 noundef %bbb) {
; CHECK-NOT: extractelement <16 x i1>
entry:
br label %for.body
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
index db1f2c71e0f77..c804e301b08fd 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/vectorize-bswap.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -passes=loop-vectorize -mtriple=powerpc64le-unknown-unknown \
; RUN: -force-target-max-vector-interleave=1 -mcpu=pwr9 < %s | FileCheck %s
-define dso_local void @test(ptr %Arr, i32 signext %Len) {
+define void @test(ptr %Arr, i32 signext %Len) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 0, [[LEN:%.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
index 9923f898c44fc..a0e3ed5acbb0c 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
@@ -3,7 +3,7 @@
; RUN: -vectorizer-maximize-bandwidth -passes='default<O2>,inject-tli-mappings,loop-vectorize' \
; RUN: -mtriple=powerpc64le-unknown-linux -S -mcpu=pwr9 2>&1 | FileCheck %s
-define dso_local double @test(ptr %Arr) {
+define double @test(ptr %Arr) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll b/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
index a87dace6f7402..bb719aa77d6de 100644
--- a/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
+++ b/llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -vectorizer-maximize-bandwidth -mtriple=powerpc64le-- -S \
; RUN: -passes=loop-simplify,loop-rotate,loop-vectorize,instcombine,simplifycfg -simplifycfg-require-and-preserve-domtree=1 -force-vector-interleave=1 < %s | FileCheck %s
-define dso_local double @test(ptr %Arr) {
+define double @test(ptr %Arr) {
; CHECK-LABEL: @test(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/illegal-type.ll b/llvm/test/Transforms/LoopVectorize/RISCV/illegal-type.ll
index 875770cd047ed..a69e1bf9ef8b7 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/illegal-type.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/illegal-type.ll
@@ -3,7 +3,7 @@
target triple = "riscv64-linux-gnu"
;
-define dso_local void @loop_i128(ptr nocapture %ptr, i64 %N) {
+define void @loop_i128(ptr nocapture %ptr, i64 %N) {
; CHECK-LABEL: @loop_i128(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
@@ -36,7 +36,7 @@ for.end:
ret void
}
-define dso_local void @loop_f128(ptr nocapture %ptr, i64 %N) {
+define void @loop_f128(ptr nocapture %ptr, i64 %N) {
; CHECK-LABEL: @loop_f128(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
@@ -69,7 +69,7 @@ for.end:
ret void
}
-define dso_local void @loop_invariant_i128(ptr nocapture %ptr, i128 %val, i64 %N) {
+define void @loop_invariant_i128(ptr nocapture %ptr, i128 %val, i64 %N) {
; CHECK-LABEL: @loop_invariant_i128(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
@@ -160,7 +160,7 @@ end:
ret void
}
-define dso_local void @loop_fixed_width_i128(ptr nocapture %ptr, i64 %N) {
+define void @loop_fixed_width_i128(ptr nocapture %ptr, i64 %N) {
; CHECK-LABEL: @loop_fixed_width_i128(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll b/llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
index 9584076ecb709..d4144e0dc9579 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/masked_gather_scatter.ll
@@ -13,7 +13,7 @@
; }
;}
-define void @foo4(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture readonly %trigger) local_unnamed_addr #0 {
+define void @foo4(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture readonly %trigger) #0 {
; RV32-LABEL: @foo4(
; RV32-NEXT: entry:
; RV32-NEXT: br label [[VECTOR_MEMCHECK:%.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll b/llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
index 1a9999d5c7481..faaaa67094d62 100644
--- a/llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
+++ b/llvm/test/Transforms/LoopVectorize/RISCV/riscv-interleaved.ll
@@ -9,7 +9,7 @@
; CHECK: %{{.*}} = add {{.*}}, 16
; Function Attrs: nofree norecurse nosync nounwind writeonly
-define dso_local void @foo(i32 signext %n, ptr nocapture %A) local_unnamed_addr #0 {
+define void @foo(i32 signext %n, ptr nocapture %A) #0 {
entry:
%cmp5 = icmp sgt i32 %n, 0
br i1 %cmp5, label %for.body.preheader, label %for.cond.cleanup
diff --git a/llvm/test/Transforms/LoopVectorize/Sparc/no-vectorize.ll b/llvm/test/Transforms/LoopVectorize/Sparc/no-vectorize.ll
index 7c1d0f5e43c92..c4ceb53200cce 100644
--- a/llvm/test/Transforms/LoopVectorize/Sparc/no-vectorize.ll
+++ b/llvm/test/Transforms/LoopVectorize/Sparc/no-vectorize.ll
@@ -6,7 +6,7 @@
;; Make sure that nothing gets vectorized, even those with explicit hints.
;; The code is based on the C++ reproducer at https://github.com/sparclinux/issues/issues/69#issuecomment-3822053617
- at glob = dso_local local_unnamed_addr global i16 0, align 2
+ at glob = global i16 0, align 2
define fastcc void @novectorize(ptr %__args1, i16 %__args3) {
; SPARC-LABEL: define fastcc void @novectorize(
diff --git a/llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll b/llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
index b4eebcc050e29..dbab14e5e96fd 100644
--- a/llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
+++ b/llvm/test/Transforms/LoopVectorize/SystemZ/mem-interleaving-costs-03.ll
@@ -40,4 +40,4 @@ for.cond: ; preds = %for.cond, %func_1.e
declare void @llvm.lifetime.start.p0(ptr nocapture)
declare void @llvm.lifetime.end.p0(ptr nocapture)
-declare dso_local i64 @safe_sub_func_int64_t_s_s(i64, i64)
+declare i64 @safe_sub_func_int64_t_s_s(i64, i64)
diff --git a/llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll b/llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
index c665c0754b241..b05c0448d2721 100644
--- a/llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
+++ b/llvm/test/Transforms/LoopVectorize/SystemZ/predicated-first-order-recurrence.ll
@@ -7,8 +7,8 @@
; scalar iteration overhead for a low trip count loop. Make sure we pick
; the correct insertion point when fixing first order recurrences.
- at A = external dso_local global [5 x i32], align 4
- at B = external dso_local global [5 x i32], align 4
+ at A = external global [5 x i32], align 4
+ at B = external global [5 x i32], align 4
define void @func_21() {
; CHECK-LABEL: @func_21(
diff --git a/llvm/test/Transforms/LoopVectorize/VE/disable_lv.ll b/llvm/test/Transforms/LoopVectorize/VE/disable_lv.ll
index 5dbc7722fe0a6..bf260e7744727 100644
--- a/llvm/test/Transforms/LoopVectorize/VE/disable_lv.ll
+++ b/llvm/test/Transforms/LoopVectorize/VE/disable_lv.ll
@@ -8,7 +8,7 @@
; VE-NOT: llvm.loop.isvectorized
; AVX: llvm.loop.isvectorized
-define dso_local void @foo(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, i32 signext %n) local_unnamed_addr {
+define void @foo(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, i32 signext %n) {
entry:
%cmp = icmp sgt i32 %n, 0
br i1 %cmp, label %omp.inner.for.body.preheader, label %simd.if.end
diff --git a/llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll b/llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
index 4716f272694d6..ab767533f6e0d 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
@@ -4,8 +4,8 @@
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i386-unknown-linux-gnu"
- at src = common local_unnamed_addr global [120 x half] zeroinitializer, align 4
- at dst = common local_unnamed_addr global [120 x half] zeroinitializer, align 4
+ at src = common global [120 x half] zeroinitializer, align 4
+ at dst = common global [120 x half] zeroinitializer, align 4
; Function Attrs: norecurse nounwind
define void @stride8(half %k, i32 %width_) {
diff --git a/llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll b/llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
index e667711889961..4c2871b1aa106 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll
@@ -19,9 +19,9 @@ target triple = "x86_64-pc-linux-gnu"
; Drop poison-generating flags from 'sub' and 'getelementptr' feeding a masked load.
; Test for PR52111.
-define void @drop_scalar_nuw_nsw(ptr noalias nocapture readonly %input, ptr %output) local_unnamed_addr #0 {
+define void @drop_scalar_nuw_nsw(ptr noalias nocapture readonly %input, ptr %output) #0 {
; CHECK-LABEL: define void @drop_scalar_nuw_nsw(
-; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK: [[VECTOR_PH]]:
@@ -61,9 +61,9 @@ loop.exit:
}
; Variant with getelementptr nusw.
-define void @drop_scalar_gep_nusw(ptr noalias nocapture readonly %input, ptr %output) local_unnamed_addr #0 {
+define void @drop_scalar_gep_nusw(ptr noalias nocapture readonly %input, ptr %output) #0 {
; CHECK-LABEL: define void @drop_scalar_gep_nusw(
-; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK: [[VECTOR_PH]]:
@@ -103,9 +103,9 @@ loop.exit:
}
; Variant with getelementptr nuw.
-define void @drop_scalar_gep_nuw(ptr noalias nocapture readonly %input, ptr %output) local_unnamed_addr #0 {
+define void @drop_scalar_gep_nuw(ptr noalias nocapture readonly %input, ptr %output) #0 {
; CHECK-LABEL: define void @drop_scalar_gep_nuw(
-; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK: [[VECTOR_PH]]:
@@ -146,9 +146,9 @@ loop.exit:
; Drop poison-generating flags from 'sub' and 'getelementptr' feeding a masked load.
; In this case, 'sub' and 'getelementptr' are not guarded by the predicate.
-define void @drop_nonpred_scalar_nuw_nsw(ptr noalias nocapture readonly %input, ptr %output) local_unnamed_addr #0 {
+define void @drop_nonpred_scalar_nuw_nsw(ptr noalias nocapture readonly %input, ptr %output) #0 {
; CHECK-LABEL: define void @drop_nonpred_scalar_nuw_nsw(
-; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK: [[VECTOR_PH]]:
@@ -188,9 +188,9 @@ loop.exit:
}
; Preserve poison-generating flags from vector 'sub', 'mul' and 'getelementptr' feeding a masked gather.
-define void @preserve_vector_nuw_nsw(ptr noalias nocapture readonly %input, ptr %output) local_unnamed_addr #0 {
+define void @preserve_vector_nuw_nsw(ptr noalias nocapture readonly %input, ptr %output) #0 {
; CHECK-LABEL: define void @preserve_vector_nuw_nsw(
-; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK: [[VECTOR_PH]]:
@@ -231,9 +231,9 @@ loop.exit:
}
; Drop poison-generating flags from vector 'sub' and 'gep' feeding a masked load.
-define void @drop_vector_nuw_nsw(ptr noalias nocapture readonly %input, ptr %output, ptr noalias %ptrs) local_unnamed_addr #0 {
+define void @drop_vector_nuw_nsw(ptr noalias nocapture readonly %input, ptr %output, ptr noalias %ptrs) #0 {
; CHECK-LABEL: define void @drop_vector_nuw_nsw(
-; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]], ptr noalias [[PTRS:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]], ptr noalias [[PTRS:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK: [[VECTOR_PH]]:
@@ -279,9 +279,9 @@ loop.exit:
; Same as @drop_vector_nuw_nsw, except built with avx1; in this case,
; we make scalar clones of the 'sub' operation. These clones also need
; cleared flags.
-define void @drop_nonvector_nuw_nsw_avx1(ptr noalias nocapture readonly %input, ptr %output, ptr noalias %ptrs) local_unnamed_addr #1 {
+define void @drop_nonvector_nuw_nsw_avx1(ptr noalias nocapture readonly %input, ptr %output, ptr noalias %ptrs) #1 {
; CHECK-LABEL: define void @drop_nonvector_nuw_nsw_avx1(
-; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]], ptr noalias [[PTRS:%.*]]) local_unnamed_addr #[[ATTR1:[0-9]+]] {
+; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]], ptr noalias [[PTRS:%.*]]) #[[ATTR1:[0-9]+]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK: [[VECTOR_PH]]:
@@ -335,9 +335,9 @@ loop.exit:
; Preserve poison-generating flags from 'sub', which is not contributing to any address computation
; of any masked load/store/gather/scatter.
-define void @preserve_nuw_nsw_no_addr(ptr %output) local_unnamed_addr #0 {
+define void @preserve_nuw_nsw_no_addr(ptr %output) #0 {
; CHECK-LABEL: define void @preserve_nuw_nsw_no_addr(
-; CHECK-SAME: ptr [[OUTPUT:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; CHECK-SAME: ptr [[OUTPUT:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK: [[VECTOR_PH]]:
@@ -372,9 +372,9 @@ loop.exit:
}
; Drop poison-generating flags from 'sdiv' and 'getelementptr' feeding a masked load.
-define void @drop_scalar_exact(ptr noalias nocapture readonly %input, ptr %output) local_unnamed_addr #0 {
+define void @drop_scalar_exact(ptr noalias nocapture readonly %input, ptr %output) #0 {
; CHECK-LABEL: define void @drop_scalar_exact(
-; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK: [[VECTOR_PH]]:
@@ -467,9 +467,9 @@ exit:
}
; Preserve poison-generating flags from 'sdiv' and 'getelementptr' feeding a masked gather.
-define void @preserve_vector_exact_no_addr(ptr noalias nocapture readonly %input, ptr %output) local_unnamed_addr #0 {
+define void @preserve_vector_exact_no_addr(ptr noalias nocapture readonly %input, ptr %output) #0 {
; CHECK-LABEL: define void @preserve_vector_exact_no_addr(
-; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK: [[VECTOR_PH]]:
@@ -513,9 +513,9 @@ loop.exit:
; Preserve poison-generating flags from 'sdiv', which is not contributing to any address computation
; of any masked load/store/gather/scatter.
-define void @preserve_exact_no_addr(ptr %output) local_unnamed_addr #0 {
+define void @preserve_exact_no_addr(ptr %output) #0 {
; CHECK-LABEL: define void @preserve_exact_no_addr(
-; CHECK-SAME: ptr [[OUTPUT:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; CHECK-SAME: ptr [[OUTPUT:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
; CHECK: [[VECTOR_PH]]:
@@ -551,9 +551,9 @@ loop.exit:
; Make sure we don't vectorize a loop with a phi feeding a poison value to
; a masked load/gather.
-define void @dont_vectorize_poison_phi(ptr noalias nocapture readonly %input, ptr %output) local_unnamed_addr #0 {
+define void @dont_vectorize_poison_phi(ptr noalias nocapture readonly %input, ptr %output) #0 {
; CHECK-LABEL: define void @dont_vectorize_poison_phi(
-; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; CHECK-SAME: ptr noalias readonly captures(none) [[INPUT:%.*]], ptr [[OUTPUT:%.*]]) #[[ATTR0]] {
; CHECK-NEXT: [[ENTRY:.*]]:
; CHECK-NEXT: br label %[[LOOP_HEADER:.*]]
; CHECK: [[LOOP_HEADER]]:
diff --git a/llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll b/llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
index b7f8be1802de1..57706ecc6c801 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/int128_no_gather.ll
@@ -15,7 +15,7 @@ target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: noinline nounwind uwtable
declare i32 @y3inner() #0
-define i32 @main() local_unnamed_addr #0 {
+define i32 @main() #0 {
entry:
br label %do.body
diff --git a/llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll b/llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll
index 93d4e4c6d1673..bc08a17555ef9 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/interleave_short_tc.ll
@@ -14,11 +14,11 @@
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
- at a = dso_local global [5 x i32] zeroinitializer, align 16
- at b = dso_local global [5 x i32] zeroinitializer, align 16
+ at a = global [5 x i32] zeroinitializer, align 16
+ at b = global [5 x i32] zeroinitializer, align 16
; Function Attrs: nofree norecurse nounwind uwtable
-define dso_local void @_Z3fooi(i32 %M) local_unnamed_addr {
+define void @_Z3fooi(i32 %M) {
; CHECK-LABEL: @_Z3fooi(
; CHECK: [[VECTOR_BODY:vector\.body]]:
; CHECK: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH:%.*]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
diff --git a/llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-use-after-free.ll b/llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-use-after-free.ll
index d5239d5a4e33d..2c869604a589b 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-use-after-free.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/interleaved-accesses-use-after-free.ll
@@ -48,7 +48,7 @@ target triple = "x86_64-redhat-linux-gnu"
; store ptr null, ptr %phi5, align 8
; store ptr %load7, ptr %getelementptr, align 8
; store ptr %load12, ptr %getelementptr11, align 8
-define void @test(ptr %arg, ptr %arg1) local_unnamed_addr #0 {
+define void @test(ptr %arg, ptr %arg1) #0 {
bb:
br label %bb2
@@ -87,10 +87,10 @@ bb4: ; preds = %bb4, %bb2
}
; Function Attrs: memory(readwrite, inaccessiblemem: none)
-declare void @foo() local_unnamed_addr #0
+declare void @foo() #0
; Function Attrs: memory(argmem: readwrite)
-declare void @pluto() local_unnamed_addr #1
+declare void @pluto() #1
attributes #0 = { memory(readwrite, inaccessiblemem: none) }
attributes #1 = { memory(argmem: readwrite) }
diff --git a/llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll b/llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
index 54520569219b8..e2b713e868fa7 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
@@ -17,9 +17,9 @@ target triple = "x86_64-pc_linux"
; }
;}
-define void @foo1(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture readonly %trigger) local_unnamed_addr #0 {
+define void @foo1(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture readonly %trigger) #0 {
; AVX1-LABEL: define void @foo1(
-; AVX1-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+; AVX1-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0:[0-9]+]] {
; AVX1-NEXT: [[ENTRY:.*:]]
; AVX1-NEXT: [[B3:%.*]] = ptrtoaddr ptr [[B]] to i64
; AVX1-NEXT: [[TRIGGER2:%.*]] = ptrtoaddr ptr [[TRIGGER]] to i64
@@ -52,7 +52,7 @@ define void @foo1(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture rea
; AVX1: [[SCALAR_PH]]:
;
; AVX2-LABEL: define void @foo1(
-; AVX2-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+; AVX2-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0:[0-9]+]] {
; AVX2-NEXT: [[ITER_CHECK:.*:]]
; AVX2-NEXT: [[B3:%.*]] = ptrtoaddr ptr [[B]] to i64
; AVX2-NEXT: [[TRIGGER2:%.*]] = ptrtoaddr ptr [[TRIGGER]] to i64
@@ -131,7 +131,7 @@ define void @foo1(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture rea
; AVX2: [[VEC_EPILOG_SCALAR_PH]]:
;
; AVX512-LABEL: define void @foo1(
-; AVX512-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+; AVX512-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0:[0-9]+]] {
; AVX512-NEXT: [[ITER_CHECK:.*:]]
; AVX512-NEXT: [[B3:%.*]] = ptrtoaddr ptr [[B]] to i64
; AVX512-NEXT: [[TRIGGER2:%.*]] = ptrtoaddr ptr [[TRIGGER]] to i64
@@ -238,9 +238,9 @@ for.end: ; preds = %for.inc
; The same as @foo1 but all the pointers are address space 1 pointers.
-define void @foo1_addrspace1(ptr addrspace(1) nocapture %A, ptr addrspace(1) nocapture readonly %B, ptr addrspace(1) nocapture readonly %trigger) local_unnamed_addr #0 {
+define void @foo1_addrspace1(ptr addrspace(1) nocapture %A, ptr addrspace(1) nocapture readonly %B, ptr addrspace(1) nocapture readonly %trigger) #0 {
; AVX1-LABEL: define void @foo1_addrspace1(
-; AVX1-SAME: ptr addrspace(1) captures(none) [[A:%.*]], ptr addrspace(1) readonly captures(none) [[B:%.*]], ptr addrspace(1) readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX1-SAME: ptr addrspace(1) captures(none) [[A:%.*]], ptr addrspace(1) readonly captures(none) [[B:%.*]], ptr addrspace(1) readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0]] {
; AVX1-NEXT: [[ENTRY:.*:]]
; AVX1-NEXT: [[B3:%.*]] = ptrtoaddr ptr addrspace(1) [[B]] to i64
; AVX1-NEXT: [[TRIGGER2:%.*]] = ptrtoaddr ptr addrspace(1) [[TRIGGER]] to i64
@@ -273,7 +273,7 @@ define void @foo1_addrspace1(ptr addrspace(1) nocapture %A, ptr addrspace(1) noc
; AVX1: [[SCALAR_PH]]:
;
; AVX2-LABEL: define void @foo1_addrspace1(
-; AVX2-SAME: ptr addrspace(1) captures(none) [[A:%.*]], ptr addrspace(1) readonly captures(none) [[B:%.*]], ptr addrspace(1) readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX2-SAME: ptr addrspace(1) captures(none) [[A:%.*]], ptr addrspace(1) readonly captures(none) [[B:%.*]], ptr addrspace(1) readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0]] {
; AVX2-NEXT: [[ITER_CHECK:.*:]]
; AVX2-NEXT: [[B3:%.*]] = ptrtoaddr ptr addrspace(1) [[B]] to i64
; AVX2-NEXT: [[TRIGGER2:%.*]] = ptrtoaddr ptr addrspace(1) [[TRIGGER]] to i64
@@ -352,7 +352,7 @@ define void @foo1_addrspace1(ptr addrspace(1) nocapture %A, ptr addrspace(1) noc
; AVX2: [[VEC_EPILOG_SCALAR_PH]]:
;
; AVX512-LABEL: define void @foo1_addrspace1(
-; AVX512-SAME: ptr addrspace(1) captures(none) [[A:%.*]], ptr addrspace(1) readonly captures(none) [[B:%.*]], ptr addrspace(1) readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX512-SAME: ptr addrspace(1) captures(none) [[A:%.*]], ptr addrspace(1) readonly captures(none) [[B:%.*]], ptr addrspace(1) readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0]] {
; AVX512-NEXT: [[ITER_CHECK:.*:]]
; AVX512-NEXT: [[B3:%.*]] = ptrtoaddr ptr addrspace(1) [[B]] to i64
; AVX512-NEXT: [[TRIGGER2:%.*]] = ptrtoaddr ptr addrspace(1) [[TRIGGER]] to i64
@@ -468,9 +468,9 @@ for.end: ; preds = %for.inc
; }
;}
-define void @foo2(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture readonly %trigger) local_unnamed_addr #0 {
+define void @foo2(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture readonly %trigger) #0 {
; AVX1-LABEL: define void @foo2(
-; AVX1-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX1-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0]] {
; AVX1-NEXT: [[ENTRY:.*:]]
; AVX1-NEXT: [[B3:%.*]] = ptrtoaddr ptr [[B]] to i64
; AVX1-NEXT: [[TRIGGER2:%.*]] = ptrtoaddr ptr [[TRIGGER]] to i64
@@ -504,7 +504,7 @@ define void @foo2(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture rea
; AVX1: [[SCALAR_PH]]:
;
; AVX2-LABEL: define void @foo2(
-; AVX2-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX2-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0]] {
; AVX2-NEXT: [[ITER_CHECK:.*:]]
; AVX2-NEXT: [[B3:%.*]] = ptrtoaddr ptr [[B]] to i64
; AVX2-NEXT: [[TRIGGER2:%.*]] = ptrtoaddr ptr [[TRIGGER]] to i64
@@ -588,7 +588,7 @@ define void @foo2(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture rea
; AVX2: [[VEC_EPILOG_SCALAR_PH]]:
;
; AVX512-LABEL: define void @foo2(
-; AVX512-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX512-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0]] {
; AVX512-NEXT: [[ITER_CHECK:.*:]]
; AVX512-NEXT: [[B3:%.*]] = ptrtoaddr ptr [[B]] to i64
; AVX512-NEXT: [[TRIGGER2:%.*]] = ptrtoaddr ptr [[TRIGGER]] to i64
@@ -710,9 +710,9 @@ for.end: ; preds = %for.inc
; }
;}
-define void @foo3(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture readonly %trigger) local_unnamed_addr #0 {
+define void @foo3(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture readonly %trigger) #0 {
; AVX1-LABEL: define void @foo3(
-; AVX1-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX1-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0]] {
; AVX1-NEXT: [[ENTRY:.*:]]
; AVX1-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
; AVX1: [[VECTOR_MEMCHECK]]:
@@ -775,7 +775,7 @@ define void @foo3(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture rea
; AVX1: [[SCALAR_PH]]:
;
; AVX2-LABEL: define void @foo3(
-; AVX2-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX2-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0]] {
; AVX2-NEXT: [[ENTRY:.*:]]
; AVX2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
; AVX2: [[VECTOR_MEMCHECK]]:
@@ -838,7 +838,7 @@ define void @foo3(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture rea
; AVX2: [[SCALAR_PH]]:
;
; AVX512-LABEL: define void @foo3(
-; AVX512-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX512-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0]] {
; AVX512-NEXT: [[ITER_CHECK:.*:]]
; AVX512-NEXT: br i1 false, label %[[VEC_EPILOG_SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
; AVX512: [[VECTOR_MEMCHECK]]:
@@ -962,9 +962,9 @@ for.end: ; preds = %for.inc
; }
;}
-define void @foo4(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture readonly %trigger) local_unnamed_addr #0 {
+define void @foo4(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture readonly %trigger) #0 {
; AVX-LABEL: define void @foo4(
-; AVX-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+; AVX-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0:[0-9]+]] {
; AVX-NEXT: [[ENTRY:.*]]:
; AVX-NEXT: br label %[[FOR_BODY:.*]]
; AVX: [[FOR_BODY]]:
@@ -990,7 +990,7 @@ define void @foo4(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture rea
; AVX-NEXT: ret void
;
; AVX512-LABEL: define void @foo4(
-; AVX512-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX512-SAME: ptr captures(none) [[A:%.*]], ptr readonly captures(none) [[B:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0]] {
; AVX512-NEXT: [[ENTRY:.*:]]
; AVX512-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
; AVX512: [[VECTOR_MEMCHECK]]:
@@ -1070,9 +1070,9 @@ for.end: ; preds = %for.inc
; }
;}
-define void @foo6(ptr nocapture readonly %in, ptr nocapture %out, i32 %size, ptr nocapture readonly %trigger) local_unnamed_addr #0 {
+define void @foo6(ptr nocapture readonly %in, ptr nocapture %out, i32 %size, ptr nocapture readonly %trigger) #0 {
; AVX1-LABEL: define void @foo6(
-; AVX1-SAME: ptr readonly captures(none) [[IN:%.*]], ptr captures(none) [[OUT:%.*]], i32 [[SIZE:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX1-SAME: ptr readonly captures(none) [[IN:%.*]], ptr captures(none) [[OUT:%.*]], i32 [[SIZE:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0]] {
; AVX1-NEXT: [[ENTRY:.*]]:
; AVX1-NEXT: br label %[[FOR_BODY:.*]]
; AVX1: [[FOR_BODY]]:
@@ -1096,7 +1096,7 @@ define void @foo6(ptr nocapture readonly %in, ptr nocapture %out, i32 %size, ptr
; AVX1-NEXT: ret void
;
; AVX2-LABEL: define void @foo6(
-; AVX2-SAME: ptr readonly captures(none) [[IN:%.*]], ptr captures(none) [[OUT:%.*]], i32 [[SIZE:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX2-SAME: ptr readonly captures(none) [[IN:%.*]], ptr captures(none) [[OUT:%.*]], i32 [[SIZE:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0]] {
; AVX2-NEXT: [[ENTRY:.*:]]
; AVX2-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
; AVX2: [[VECTOR_MEMCHECK]]:
@@ -1175,7 +1175,7 @@ define void @foo6(ptr nocapture readonly %in, ptr nocapture %out, i32 %size, ptr
; AVX2: [[SCALAR_PH]]:
;
; AVX512-LABEL: define void @foo6(
-; AVX512-SAME: ptr readonly captures(none) [[IN:%.*]], ptr captures(none) [[OUT:%.*]], i32 [[SIZE:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX512-SAME: ptr readonly captures(none) [[IN:%.*]], ptr captures(none) [[OUT:%.*]], i32 [[SIZE:%.*]], ptr readonly captures(none) [[TRIGGER:%.*]]) #[[ATTR0]] {
; AVX512-NEXT: [[ENTRY:.*:]]
; AVX512-NEXT: br label %[[VECTOR_MEMCHECK:.*]]
; AVX512: [[VECTOR_MEMCHECK]]:
@@ -1288,9 +1288,9 @@ for.end: ; preds = %for.inc
; out[i] = (double) 0.5;
; }
-define void @foo7(ptr noalias nocapture %out, ptr noalias nocapture readonly %in, ptr noalias nocapture readonly %trigger, i32 %size) local_unnamed_addr #0 {
+define void @foo7(ptr noalias nocapture %out, ptr noalias nocapture readonly %in, ptr noalias nocapture readonly %trigger, i32 %size) #0 {
; AVX1-LABEL: define void @foo7(
-; AVX1-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], ptr noalias readonly captures(none) [[TRIGGER:%.*]], i32 [[SIZE:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX1-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], ptr noalias readonly captures(none) [[TRIGGER:%.*]], i32 [[SIZE:%.*]]) #[[ATTR0]] {
; AVX1-NEXT: [[ENTRY:.*:]]
; AVX1-NEXT: [[CMP5:%.*]] = icmp eq i32 [[SIZE]], 0
; AVX1-NEXT: br i1 [[CMP5]], [[FOR_END:label %.*]], label %[[ITER_CHECK:.*]]
@@ -1382,7 +1382,7 @@ define void @foo7(ptr noalias nocapture %out, ptr noalias nocapture readonly %in
; AVX1: [[VEC_EPILOG_SCALAR_PH]]:
;
; AVX2-LABEL: define void @foo7(
-; AVX2-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], ptr noalias readonly captures(none) [[TRIGGER:%.*]], i32 [[SIZE:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX2-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], ptr noalias readonly captures(none) [[TRIGGER:%.*]], i32 [[SIZE:%.*]]) #[[ATTR0]] {
; AVX2-NEXT: [[ENTRY:.*:]]
; AVX2-NEXT: [[CMP5:%.*]] = icmp eq i32 [[SIZE]], 0
; AVX2-NEXT: br i1 [[CMP5]], [[FOR_END:label %.*]], label %[[ITER_CHECK:.*]]
@@ -1474,7 +1474,7 @@ define void @foo7(ptr noalias nocapture %out, ptr noalias nocapture readonly %in
; AVX2: [[VEC_EPILOG_SCALAR_PH]]:
;
; AVX512-LABEL: define void @foo7(
-; AVX512-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], ptr noalias readonly captures(none) [[TRIGGER:%.*]], i32 [[SIZE:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX512-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], ptr noalias readonly captures(none) [[TRIGGER:%.*]], i32 [[SIZE:%.*]]) #[[ATTR0]] {
; AVX512-NEXT: [[ENTRY:.*:]]
; AVX512-NEXT: [[CMP5:%.*]] = icmp eq i32 [[SIZE]], 0
; AVX512-NEXT: br i1 [[CMP5]], [[FOR_END:label %.*]], label %[[ITER_CHECK:.*]]
@@ -1609,9 +1609,9 @@ for.end: ; preds = %for.inc, %entry
; out[i] = (double) 0.5;
;}
-define void @foo8(ptr noalias nocapture %out, ptr noalias nocapture readonly %in, ptr noalias nocapture readonly %trigger, i32 %size) local_unnamed_addr #0 {
+define void @foo8(ptr noalias nocapture %out, ptr noalias nocapture readonly %in, ptr noalias nocapture readonly %trigger, i32 %size) #0 {
; AVX1-LABEL: define void @foo8(
-; AVX1-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], ptr noalias readonly captures(none) [[TRIGGER:%.*]], i32 [[SIZE:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX1-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], ptr noalias readonly captures(none) [[TRIGGER:%.*]], i32 [[SIZE:%.*]]) #[[ATTR0]] {
; AVX1-NEXT: [[ENTRY:.*:]]
; AVX1-NEXT: [[CMP5:%.*]] = icmp eq i32 [[SIZE]], 0
; AVX1-NEXT: br i1 [[CMP5]], [[FOR_END:label %.*]], label %[[ITER_CHECK:.*]]
@@ -1703,7 +1703,7 @@ define void @foo8(ptr noalias nocapture %out, ptr noalias nocapture readonly %in
; AVX1: [[VEC_EPILOG_SCALAR_PH]]:
;
; AVX2-LABEL: define void @foo8(
-; AVX2-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], ptr noalias readonly captures(none) [[TRIGGER:%.*]], i32 [[SIZE:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX2-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], ptr noalias readonly captures(none) [[TRIGGER:%.*]], i32 [[SIZE:%.*]]) #[[ATTR0]] {
; AVX2-NEXT: [[ENTRY:.*:]]
; AVX2-NEXT: [[CMP5:%.*]] = icmp eq i32 [[SIZE]], 0
; AVX2-NEXT: br i1 [[CMP5]], [[FOR_END:label %.*]], label %[[ITER_CHECK:.*]]
@@ -1795,7 +1795,7 @@ define void @foo8(ptr noalias nocapture %out, ptr noalias nocapture readonly %in
; AVX2: [[VEC_EPILOG_SCALAR_PH]]:
;
; AVX512-LABEL: define void @foo8(
-; AVX512-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], ptr noalias readonly captures(none) [[TRIGGER:%.*]], i32 [[SIZE:%.*]]) local_unnamed_addr #[[ATTR0]] {
+; AVX512-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], ptr noalias readonly captures(none) [[TRIGGER:%.*]], i32 [[SIZE:%.*]]) #[[ATTR0]] {
; AVX512-NEXT: [[ENTRY:.*:]]
; AVX512-NEXT: [[CMP5:%.*]] = icmp eq i32 [[SIZE]], 0
; AVX512-NEXT: br i1 [[CMP5]], [[FOR_END:label %.*]], label %[[ITER_CHECK:.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/X86/pr35432.ll b/llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
index 9217c905945ac..fd89ad5838f11 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
@@ -6,7 +6,7 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
- at a = common local_unnamed_addr global [192 x [192 x i32]] zeroinitializer, align 16
+ at a = common global [192 x [192 x i32]] zeroinitializer, align 16
define i32 @main(ptr %ptr) {
; CHECK-LABEL: @main(
@@ -178,9 +178,9 @@ for.end12: ; preds = %for.cond.for.end12_
; Function Attrs: argmemonly nounwind
declare void @llvm.lifetime.start.p0(ptr nocapture) #1
-declare i32 @goo(...) local_unnamed_addr #2
+declare i32 @goo(...) #2
-declare i32 @foo(...) local_unnamed_addr #2
+declare i32 @foo(...) #2
; Function Attrs: argmemonly nounwind
declare void @llvm.lifetime.end.p0(ptr nocapture) #1
diff --git a/llvm/test/Transforms/LoopVectorize/X86/pr54634.ll b/llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
index 95b623ef4b667..73d2d0587f6ec 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/pr54634.ll
@@ -4,11 +4,11 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:10:11:12:13"
target triple = "x86_64-unknown-linux-gnu"
- at jlplt_ijl_alloc_array_1d_10294_got = external dso_local local_unnamed_addr global ptr
+ at jlplt_ijl_alloc_array_1d_10294_got = external global ptr
-define ptr addrspace(10) @japi1_vect_42283(ptr nocapture readonly %0, i32 %1) local_unnamed_addr #0 {
+define ptr addrspace(10) @japi1_vect_42283(ptr nocapture readonly %0, i32 %1) #0 {
; CHECK-LABEL: define ptr addrspace(10) @japi1_vect_42283(
-; CHECK-SAME: ptr readonly captures(none) [[TMP0:%.*]], i32 [[TMP1:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+; CHECK-SAME: ptr readonly captures(none) [[TMP0:%.*]], i32 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[ITER_CHECK:.*]]:
; CHECK-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i64
; CHECK-NEXT: [[TMP3:%.*]] = load atomic ptr, ptr @jlplt_ijl_alloc_array_1d_10294_got unordered, align 8
diff --git a/llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll b/llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll
index 530ff175c81ca..5cc1479da176c 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/reg-usage-debug.ll
@@ -28,7 +28,7 @@ target triple = "x86_64-unknown-linux-gnu"
; CHECK-NEXT: LV(REG): Found invariant usage: 1 item
; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 1 registers
-define i32 @test_g(ptr nocapture readonly %a, i32 %n) local_unnamed_addr !dbg !6 {
+define i32 @test_g(ptr nocapture readonly %a, i32 %n) !dbg !6 {
entry:
tail call void @llvm.dbg.value(metadata ptr %a, i64 0, metadata !12, metadata !16), !dbg !17
tail call void @llvm.dbg.value(metadata i32 %n, i64 0, metadata !13, metadata !16), !dbg !18
@@ -70,7 +70,7 @@ for.end: ; preds = %for.end.loopexit, %
; CHECK-NEXT: LV(REG): Found invariant usage: 1 item
; CHECK-NEXT: LV(REG): RegisterClass: Generic::ScalarRC, 1 registers
-define i32 @test(ptr nocapture readonly %a, i32 %n) local_unnamed_addr {
+define i32 @test(ptr nocapture readonly %a, i32 %n) {
entry:
%cmp6 = icmp eq i32 %n, 0
br i1 %cmp6, label %for.end, label %for.body.preheader
diff --git a/llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll b/llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
index 7811693444dd7..91383d32d77bd 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
@@ -9,9 +9,9 @@ target triple = "x86_64-unknown-linux-gnu"
; even if it contains scalarized load (gather on AVX2)
; Function Attrs: norecurse nounwind readonly uwtable
-define i32 @matrix_row_col(ptr nocapture readonly %data, i32 %i, i32 %j) local_unnamed_addr #0 {
+define i32 @matrix_row_col(ptr nocapture readonly %data, i32 %i, i32 %j) #0 {
; CHECK-LABEL: define i32 @matrix_row_col(
-; CHECK-SAME: ptr readonly captures(none) [[DATA:%.*]], i32 [[I:%.*]], i32 [[J:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+; CHECK-SAME: ptr readonly captures(none) [[DATA:%.*]], i32 [[I:%.*]], i32 [[J:%.*]]) #[[ATTR0:[0-9]+]] {
; CHECK-NEXT: [[ITER_CHECK:.*]]:
; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[IDXPROM5:%.*]] = sext i32 [[J]] to i64
@@ -240,7 +240,7 @@ define i32 @matrix_row_col(ptr nocapture readonly %data, i32 %i, i32 %j) local_u
; CHECK-NEXT: br i1 [[EXITCOND]], label %[[FOR_COND_CLEANUP]], label %[[FOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
;
; MAX-BW-LABEL: define i32 @matrix_row_col(
-; MAX-BW-SAME: ptr readonly captures(none) [[DATA:%.*]], i32 [[I:%.*]], i32 [[J:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
+; MAX-BW-SAME: ptr readonly captures(none) [[DATA:%.*]], i32 [[I:%.*]], i32 [[J:%.*]]) #[[ATTR0:[0-9]+]] {
; MAX-BW-NEXT: [[ITER_CHECK:.*]]:
; MAX-BW-NEXT: [[IDXPROM:%.*]] = sext i32 [[I]] to i64
; MAX-BW-NEXT: [[IDXPROM5:%.*]] = sext i32 [[J]] to i64
diff --git a/llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll b/llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
index c7550ca016e76..9f2193fca424d 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/tail_folding_and_assume_safety.ll
@@ -21,8 +21,8 @@ target triple = "x86_64-pc-linux-gnu"
;CHECK: call void @llvm.masked.store
; Function Attrs: nofree norecurse nounwind uwtable
-define dso_local void @fold_tail(ptr noalias nocapture %p, ptr noalias nocapture readonly %q1, ptr noalias nocapture readonly %q2,
-i32 %guard) local_unnamed_addr #0 {
+define void @fold_tail(ptr noalias nocapture %p, ptr noalias nocapture readonly %q1, ptr noalias nocapture readonly %q2,
+i32 %guard) #0 {
entry:
%0 = sext i32 %guard to i64
br label %for.body
@@ -67,7 +67,7 @@ for.inc:
;CHECK: call void @llvm.masked.store
; Function Attrs: norecurse nounwind uwtable
-define void @assume_safety(ptr nocapture, ptr nocapture readonly, ptr nocapture readonly, i32) local_unnamed_addr #0 {
+define void @assume_safety(ptr nocapture, ptr nocapture readonly, ptr nocapture readonly, i32) #0 {
%5 = sext i32 %3 to i64
br label %7
@@ -113,8 +113,8 @@ define void @assume_safety(ptr nocapture, ptr nocapture readonly, ptr nocapture
;CHECK: call void @llvm.masked.store
; Function Attrs: nofree norecurse nounwind uwtable
-define dso_local void @fold_tail_and_assume_safety(ptr noalias nocapture %p, ptr noalias nocapture readonly %q1, ptr noalias nocapture readonly %q2,
-i32 %guard) local_unnamed_addr #0 {
+define void @fold_tail_and_assume_safety(ptr noalias nocapture %p, ptr noalias nocapture readonly %q1, ptr noalias nocapture readonly %q2,
+i32 %guard) #0 {
entry:
%0 = sext i32 %guard to i64
br label %for.body
diff --git a/llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll b/llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
index a3d9039073779..ec92fb3e7e50d 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/tail_loop_folding.ll
@@ -5,7 +5,7 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
-define dso_local void @tail_folding_enabled(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C) local_unnamed_addr #0 {
+define void @tail_folding_enabled(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C) #0 {
; CHECK-LABEL: @tail_folding_enabled(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
@@ -54,7 +54,7 @@ for.body:
; Marking function as optsize turns tail folding on, as if explicit tail folding
; flag was enabled.
-define dso_local void @tail_folding_disabled(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C) local_unnamed_addr #0 {
+define void @tail_folding_disabled(ptr noalias nocapture %A, ptr noalias nocapture readonly %B, ptr noalias nocapture readonly %C) #0 {
; CHECK-LABEL: @tail_folding_disabled(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/X86/uniformshift.ll b/llvm/test/Transforms/LoopVectorize/X86/uniformshift.ll
index 02c0b676374f4..61eaa3524fa56 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/uniformshift.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/uniformshift.ll
@@ -5,7 +5,7 @@
; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction: %shift = ashr i32 %val, %k
; CHECK: Cost of 2 for VF 2: WIDEN ir<%shift> = ashr ir<%val>, ir<%k>
; CHECK: Cost of 2 for VF 4: WIDEN ir<%shift> = ashr ir<%val>, ir<%k>
-define void @foo(ptr nocapture %p, i32 %k) local_unnamed_addr {
+define void @foo(ptr nocapture %p, i32 %k) {
entry:
br label %body
diff --git a/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll b/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
index b5d42a8f71430..56b9ac753ce24 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
@@ -29,7 +29,7 @@ target triple = "i386-unknown-linux-gnu"
; }
; }
-define dso_local void @masked_strided1(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr {
+define void @masked_strided1(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) {
; DISABLED_MASKED_STRIDED-LABEL: @masked_strided1(
; DISABLED_MASKED_STRIDED-NEXT: entry:
; DISABLED_MASKED_STRIDED-NEXT: [[CONV:%.*]] = zext i8 [[GUARD:%.*]] to i32
@@ -202,7 +202,7 @@ for.end:
; be vectorized with masked wide-loads with the mask properly shuffled and
; And-ed with the gaps mask.
;
-define dso_local void @masked_strided1_optsize(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr optsize {
+define void @masked_strided1_optsize(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) optsize {
; DISABLED_MASKED_STRIDED-LABEL: @masked_strided1_optsize(
; DISABLED_MASKED_STRIDED-NEXT: entry:
; DISABLED_MASKED_STRIDED-NEXT: [[CONV:%.*]] = zext i8 [[GUARD:%.*]] to i32
@@ -381,7 +381,7 @@ for.end:
; }
; }
;
-define dso_local void @masked_strided1_optsize_unknown_tc(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard, i32 %n) local_unnamed_addr optsize {
+define void @masked_strided1_optsize_unknown_tc(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard, i32 %n) optsize {
; DISABLED_MASKED_STRIDED-LABEL: @masked_strided1_optsize_unknown_tc(
; DISABLED_MASKED_STRIDED-NEXT: entry:
; DISABLED_MASKED_STRIDED-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[N:%.*]], 0
@@ -585,7 +585,7 @@ for.end:
; }
; }
;
-define dso_local void @masked_strided3_optsize_unknown_tc(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard, i32 %n) local_unnamed_addr optsize {
+define void @masked_strided3_optsize_unknown_tc(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard, i32 %n) optsize {
; DISABLED_MASKED_STRIDED-LABEL: @masked_strided3_optsize_unknown_tc(
; DISABLED_MASKED_STRIDED-NEXT: entry:
; DISABLED_MASKED_STRIDED-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[N:%.*]], 0
@@ -860,7 +860,7 @@ for.end:
; }
; }
;
-define dso_local void @unconditional_strided1_optsize(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr optsize {
+define void @unconditional_strided1_optsize(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) optsize {
; DISABLED_MASKED_STRIDED-LABEL: @unconditional_strided1_optsize(
; DISABLED_MASKED_STRIDED-NEXT: entry:
; DISABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]]
@@ -965,7 +965,7 @@ for.end:
; q[ix] = t;
; }
;
-define dso_local void @unconditional_strided1_optsize_unknown_tc(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i32 %n) local_unnamed_addr optsize {
+define void @unconditional_strided1_optsize_unknown_tc(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i32 %n) optsize {
; DISABLED_MASKED_STRIDED-LABEL: @unconditional_strided1_optsize_unknown_tc(
; DISABLED_MASKED_STRIDED-NEXT: entry:
; DISABLED_MASKED_STRIDED-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[N:%.*]], 0
@@ -1152,7 +1152,7 @@ for.end:
; }
;}
;
-define dso_local void @masked_strided2(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr {
+define void @masked_strided2(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) {
; DISABLED_MASKED_STRIDED-LABEL: @masked_strided2(
; DISABLED_MASKED_STRIDED-NEXT: entry:
; DISABLED_MASKED_STRIDED-NEXT: [[CONV:%.*]] = zext i8 [[GUARD:%.*]] to i32
@@ -1557,7 +1557,7 @@ for.end:
; }
;}
;
-define dso_local void @masked_strided2_reverse(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr {
+define void @masked_strided2_reverse(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) {
; DISABLED_MASKED_STRIDED-LABEL: @masked_strided2_reverse(
; DISABLED_MASKED_STRIDED-NEXT: entry:
; DISABLED_MASKED_STRIDED-NEXT: [[CONV:%.*]] = zext i8 [[GUARD:%.*]] to i32
@@ -2268,7 +2268,7 @@ for.end:
; }
;}
;
-define dso_local void @masked_strided2_unknown_tc(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i32 %guard, i32 %n) local_unnamed_addr optsize {
+define void @masked_strided2_unknown_tc(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i32 %guard, i32 %n) optsize {
; DISABLED_MASKED_STRIDED-LABEL: @masked_strided2_unknown_tc(
; DISABLED_MASKED_STRIDED-NEXT: entry:
; DISABLED_MASKED_STRIDED-NEXT: [[CMP22:%.*]] = icmp sgt i32 [[N:%.*]], 0
@@ -2706,7 +2706,7 @@ for.end:
; }
;}
;
-define dso_local void @unconditional_masked_strided2_unknown_tc(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i32 %n) local_unnamed_addr optsize {
+define void @unconditional_masked_strided2_unknown_tc(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i32 %n) optsize {
; DISABLED_MASKED_STRIDED-LABEL: @unconditional_masked_strided2_unknown_tc(
; DISABLED_MASKED_STRIDED-NEXT: entry:
; DISABLED_MASKED_STRIDED-NEXT: [[CMP20:%.*]] = icmp sgt i32 [[N:%.*]], 0
diff --git a/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll b/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
index 3b8d2c623d13c..66a1bd31ac7d3 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-store-accesses-with-gaps.ll
@@ -18,7 +18,7 @@ target triple = "x86_64-unknown-linux-gnu"
; (relates to the testcase in PR50566)
; Function Attrs: nofree norecurse nosync nounwind uwtable
-define dso_local void @test1(ptr noalias nocapture %points, ptr noalias nocapture readonly %x, ptr noalias nocapture readonly %y) local_unnamed_addr {
+define void @test1(ptr noalias nocapture %points, ptr noalias nocapture readonly %x, ptr noalias nocapture readonly %y) {
; DISABLED_MASKED_STRIDED-LABEL: @test1(
; DISABLED_MASKED_STRIDED-NEXT: entry:
; DISABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]]
@@ -122,7 +122,7 @@ for.end:
; }
; Function Attrs: nofree norecurse nosync nounwind uwtable
-define dso_local void @test2(ptr noalias nocapture %points, i32 %numPoints, ptr noalias nocapture readonly %x, ptr noalias nocapture readonly %y) local_unnamed_addr {
+define void @test2(ptr noalias nocapture %points, i32 %numPoints, ptr noalias nocapture readonly %x, ptr noalias nocapture readonly %y) {
; DISABLED_MASKED_STRIDED-LABEL: @test2(
; DISABLED_MASKED_STRIDED-NEXT: entry:
; DISABLED_MASKED_STRIDED-NEXT: [[CMP15:%.*]] = icmp sgt i32 [[NUMPOINTS:%.*]], 0
@@ -304,7 +304,7 @@ for.end:
; points[i*3] = x[i];
; }
; Function Attrs: nofree norecurse nosync nounwind uwtable
-define dso_local void @test(ptr noalias nocapture %points, ptr noalias nocapture readonly %x, ptr noalias nocapture readnone %y) local_unnamed_addr {
+define void @test(ptr noalias nocapture %points, ptr noalias nocapture readonly %x, ptr noalias nocapture readnone %y) {
; DISABLED_MASKED_STRIDED-LABEL: @test(
; DISABLED_MASKED_STRIDED-NEXT: entry:
; DISABLED_MASKED_STRIDED-NEXT: br label [[VECTOR_BODY:%.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/X86/x86-pr39099.ll b/llvm/test/Transforms/LoopVectorize/X86/x86-pr39099.ll
index 5e4ba0b6d33d9..e63d511d612ee 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/x86-pr39099.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/x86-pr39099.ll
@@ -31,7 +31,7 @@ target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
;CHECK-NEXT: br i1 %[[M]], label %pred.store.if, label %pred.store.continue
;CHECK-NOT: %{{.+}} = load <16 x i8>, ptr %{{.*}}, align 1
-define dso_local void @masked_strided(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr {
+define void @masked_strided(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) {
entry:
%conv = zext i8 %guard to i32
br label %for.body
diff --git a/llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll b/llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll
index 0656de476f482..e45fe4880321b 100644
--- a/llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll
+++ b/llvm/test/Transforms/LoopVectorize/diag-missing-instr-debug-loc.ll
@@ -20,11 +20,11 @@
source_filename = "/tmp/s.c"
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
- at out = external local_unnamed_addr global [0 x i32], align 4
- at map = external local_unnamed_addr global [0 x i32], align 4
+ at out = external global [0 x i32], align 4
+ at map = external global [0 x i32], align 4
; Function Attrs: norecurse nounwind ssp uwtable
-define void @f(i32 %a, i32 %n) local_unnamed_addr #0 !dbg !6 {
+define void @f(i32 %a, i32 %n) #0 !dbg !6 {
entry:
%cmp7 = icmp sgt i32 %n, 0, !dbg !8
br i1 %cmp7, label %for.body.preheader, label %for.cond.cleanup, !dbg !9
diff --git a/llvm/test/Transforms/LoopVectorize/diag-with-hotness-info-2.ll b/llvm/test/Transforms/LoopVectorize/diag-with-hotness-info-2.ll
index 5e51624f28eba..703c13739e79c 100644
--- a/llvm/test/Transforms/LoopVectorize/diag-with-hotness-info-2.ll
+++ b/llvm/test/Transforms/LoopVectorize/diag-with-hotness-info-2.ll
@@ -33,7 +33,7 @@ source_filename = "/tmp/s.c"
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
; Function Attrs: norecurse nounwind ssp uwtable
-define void @cold(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture %C, ptr nocapture readonly %D, ptr nocapture readonly %E, i32 %N) local_unnamed_addr #0 !dbg !7 !prof !56 {
+define void @cold(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture %C, ptr nocapture readonly %D, ptr nocapture readonly %E, i32 %N) #0 !dbg !7 !prof !56 {
entry:
%cmp28 = icmp sgt i32 %N, 0, !dbg !9
br i1 %cmp28, label %ph, label %for.cond.cleanup, !dbg !10, !prof !58
@@ -67,7 +67,7 @@ for.cond.cleanup:
}
; Function Attrs: norecurse nounwind ssp uwtable
-define void @hot(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture %C, ptr nocapture readonly %D, ptr nocapture readonly %E, i32 %N) local_unnamed_addr #0 !dbg !26 !prof !57 {
+define void @hot(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture %C, ptr nocapture readonly %D, ptr nocapture readonly %E, i32 %N) #0 !dbg !26 !prof !57 {
entry:
%cmp28 = icmp sgt i32 %N, 0, !dbg !27
br i1 %cmp28, label %ph, label %for.cond.cleanup, !dbg !28, !prof !58
@@ -101,7 +101,7 @@ for.cond.cleanup:
}
; Function Attrs: norecurse nounwind ssp uwtable
-define void @unknown(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture %C, ptr nocapture readonly %D, ptr nocapture readonly %E, i32 %N) local_unnamed_addr #0 !dbg !41 {
+define void @unknown(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture %C, ptr nocapture readonly %D, ptr nocapture readonly %E, i32 %N) #0 !dbg !41 {
entry:
%cmp28 = icmp sgt i32 %N, 0, !dbg !42
br i1 %cmp28, label %ph, label %for.cond.cleanup, !dbg !43
diff --git a/llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll b/llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll
index 77ec95a3d8ef9..f26c7aaf69379 100644
--- a/llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll
+++ b/llvm/test/Transforms/LoopVectorize/diag-with-hotness-info.ll
@@ -47,7 +47,7 @@ source_filename = "/tmp/s.c"
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
; Function Attrs: norecurse nounwind ssp uwtable
-define void @cold(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture %C, ptr nocapture readonly %D, ptr nocapture readonly %E, i32 %N) local_unnamed_addr #0 !dbg !7 !prof !56 {
+define void @cold(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture %C, ptr nocapture readonly %D, ptr nocapture readonly %E, i32 %N) #0 !dbg !7 !prof !56 {
entry:
%cmp28 = icmp sgt i32 %N, 0, !dbg !9
br i1 %cmp28, label %ph, label %for.cond.cleanup, !dbg !10, !prof !58
@@ -81,7 +81,7 @@ for.cond.cleanup:
}
; Function Attrs: norecurse nounwind ssp uwtable
-define void @hot(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture %C, ptr nocapture readonly %D, ptr nocapture readonly %E, i32 %N) local_unnamed_addr #0 !dbg !26 !prof !57 {
+define void @hot(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture %C, ptr nocapture readonly %D, ptr nocapture readonly %E, i32 %N) #0 !dbg !26 !prof !57 {
entry:
%cmp28 = icmp sgt i32 %N, 0, !dbg !27
br i1 %cmp28, label %ph, label %for.cond.cleanup, !dbg !28, !prof !58
@@ -115,7 +115,7 @@ for.cond.cleanup:
}
; Function Attrs: norecurse nounwind ssp uwtable
-define void @unknown(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture %C, ptr nocapture readonly %D, ptr nocapture readonly %E, i32 %N) local_unnamed_addr #0 !dbg !41 {
+define void @unknown(ptr nocapture %A, ptr nocapture readonly %B, ptr nocapture %C, ptr nocapture readonly %D, ptr nocapture readonly %E, i32 %N) #0 !dbg !41 {
entry:
%cmp28 = icmp sgt i32 %N, 0, !dbg !42
br i1 %cmp28, label %for.body, label %for.cond.cleanup, !dbg !43
diff --git a/llvm/test/Transforms/LoopVectorize/discriminator.ll b/llvm/test/Transforms/LoopVectorize/discriminator.ll
index fe71b6bd9e765..dfff0dfc9c221 100644
--- a/llvm/test/Transforms/LoopVectorize/discriminator.ll
+++ b/llvm/test/Transforms/LoopVectorize/discriminator.ll
@@ -15,11 +15,11 @@
; 6 a[i] += b[i];
; 7 }
- at a = local_unnamed_addr global ptr null, align 8
- at b = local_unnamed_addr global ptr null, align 8
+ at a = global ptr null, align 8
+ at b = global ptr null, align 8
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
-define void @_Z3foov() local_unnamed_addr #0 !dbg !6 {
+define void @_Z3foov() #0 !dbg !6 {
%1 = load ptr, ptr @b, align 8, !dbg !8, !tbaa !9
%2 = load ptr, ptr @a, align 8, !dbg !13, !tbaa !9
br label %3, !dbg !14
diff --git a/llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll b/llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
index c23d28cdd0f3a..dae19559295ca 100644
--- a/llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
+++ b/llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
@@ -6,7 +6,7 @@ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16
; Make sure the loop is vectorized and unrolled under -Os without folding its
; tail based on its trip-count being provably divisible by chosen VFxIC.
-define dso_local void @constTC(ptr noalias nocapture %A) optsize {
+define void @constTC(ptr noalias nocapture %A) optsize {
; CHECK-LABEL: @constTC(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll b/llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
index 156c2bdca7b0e..f089e2d5611b6 100644
--- a/llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
+++ b/llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-divisible-TC.ll
@@ -6,7 +6,7 @@ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16
; Make sure the loop is vectorized under -Os without folding its tail based on
; its trip-count's lower bits known to be zero.
-define dso_local void @alignTC(ptr noalias nocapture %A, i32 %n) optsize {
+define void @alignTC(ptr noalias nocapture %A, i32 %n) optsize {
; CHECK-LABEL: @alignTC(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[ALIGNEDTC:%.*]] = and i32 [[N:%.*]], -8
@@ -58,7 +58,7 @@ exit:
; Make sure the loop is vectorized under -Os without folding its tail based on
; its trip-count's lower bits assumed to be zero.
-define dso_local void @assumeAlignedTC(ptr noalias nocapture %A, i32 %p, i32 %q) optsize {
+define void @assumeAlignedTC(ptr noalias nocapture %A, i32 %p, i32 %q) optsize {
; CHECK-LABEL: @assumeAlignedTC(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[AND1:%.*]] = and i32 [[P:%.*]], 3
@@ -133,7 +133,7 @@ exit:
; Make sure the loop's tail is folded when vectorized under -Os based on its trip-count's
; not being provably divisible by chosen VF.
-define dso_local void @cannotProveAlignedTC(ptr noalias nocapture %A, i32 %p, i32 %q) optsize {
+define void @cannotProveAlignedTC(ptr noalias nocapture %A, i32 %p, i32 %q) optsize {
; CHECK-LABEL: @cannotProveAlignedTC(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[AND1:%.*]] = and i32 [[P:%.*]], 3
diff --git a/llvm/test/Transforms/LoopVectorize/explicit_outer_detection.ll b/llvm/test/Transforms/LoopVectorize/explicit_outer_detection.ll
index 35bd58ccbe00e..f780dd3fa7cf8 100644
--- a/llvm/test/Transforms/LoopVectorize/explicit_outer_detection.ll
+++ b/llvm/test/Transforms/LoopVectorize/explicit_outer_detection.ll
@@ -27,7 +27,7 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-define void @vector_width(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) local_unnamed_addr {
+define void @vector_width(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) {
entry:
%cmp32 = icmp sgt i32 %N, 0
br i1 %cmp32, label %outer.ph, label %for.end15
@@ -75,7 +75,7 @@ for.end15: ; preds = %outer.inc, %entry
; CHECK: LV: We can vectorize this outer loop!
; CHECK: LV: Using VF 1 to build VPlans.
-define void @case2(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) local_unnamed_addr {
+define void @case2(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) {
entry:
%cmp32 = icmp sgt i32 %N, 0
br i1 %cmp32, label %outer.ph, label %for.end15
@@ -125,7 +125,7 @@ for.end15: ; preds = %outer.inc, %entry
; CHECK: LV: Loop hints: force=?
; CHECK: LV: Found a loop: inner.body
-define void @case3(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) local_unnamed_addr {
+define void @case3(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) {
entry:
%cmp32 = icmp sgt i32 %N, 0
br i1 %cmp32, label %outer.ph, label %for.end15
@@ -175,7 +175,7 @@ for.end15: ; preds = %outer.inc, %entry
; CHECK: LV: Loop hints: force=?
; CHECK: LV: Found a loop: inner.body
-define void @case4(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) local_unnamed_addr {
+define void @case4(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) {
entry:
%cmp32 = icmp sgt i32 %N, 0
br i1 %cmp32, label %outer.ph, label %for.end15
diff --git a/llvm/test/Transforms/LoopVectorize/explicit_outer_nonuniform_inner.ll b/llvm/test/Transforms/LoopVectorize/explicit_outer_nonuniform_inner.ll
index 3fddc2fc3f108..e3fb756d056b5 100644
--- a/llvm/test/Transforms/LoopVectorize/explicit_outer_nonuniform_inner.ll
+++ b/llvm/test/Transforms/LoopVectorize/explicit_outer_nonuniform_inner.ll
@@ -25,7 +25,7 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-define void @iv_start(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) local_unnamed_addr {
+define void @iv_start(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) {
entry:
%cmp33 = icmp sgt i32 %N, 0
br i1 %cmp33, label %outer.ph, label %for.end15
@@ -73,7 +73,7 @@ for.end15: ; preds = %outer.inc, %entry
; CHECK: LV: Not vectorizing: Outer loop contains divergent loops.
; CHECK: LV: Not vectorizing: Unsupported outer loop.
-define void @loop_ub(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) local_unnamed_addr {
+define void @loop_ub(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) {
entry:
%cmp32 = icmp sgt i32 %N, 0
br i1 %cmp32, label %outer.ph, label %for.end15
@@ -119,7 +119,7 @@ for.end15: ; preds = %outer.inc, %entry
; CHECK: LV: Not vectorizing: Outer loop contains divergent loops.
; CHECK: LV: Not vectorizing: Unsupported outer loop.
-define void @iv_step(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) local_unnamed_addr {
+define void @iv_step(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) {
entry:
%cmp33 = icmp sgt i32 %N, 0
br i1 %cmp33, label %outer.ph, label %for.end15
diff --git a/llvm/test/Transforms/LoopVectorize/explicit_outer_uniform_diverg_branch.ll b/llvm/test/Transforms/LoopVectorize/explicit_outer_uniform_diverg_branch.ll
index 2131beb2932c9..932a6e4ba88d1 100644
--- a/llvm/test/Transforms/LoopVectorize/explicit_outer_uniform_diverg_branch.ll
+++ b/llvm/test/Transforms/LoopVectorize/explicit_outer_uniform_diverg_branch.ll
@@ -25,7 +25,7 @@
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
-define void @uniform_branch(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) local_unnamed_addr {
+define void @uniform_branch(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) {
entry:
%cmp39 = icmp sgt i32 %N, 0
br i1 %cmp39, label %outer.ph, label %for.end19
@@ -77,7 +77,7 @@ for.end19: ; preds = %outer.inc, %entry
; CHECK: Unsupported conditional branch.
; CHECK: LV: Not vectorizing: Unsupported outer loop.
-define void @divergent_branch(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) local_unnamed_addr {
+define void @divergent_branch(ptr nocapture %a, ptr nocapture readonly %b, i32 %N, i32 %M) {
entry:
%cmp39 = icmp sgt i32 %N, 0
br i1 %cmp39, label %outer.ph, label %for.end19
diff --git a/llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll b/llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
index b0350cd884af1..913683938c6b4 100644
--- a/llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
+++ b/llvm/test/Transforms/LoopVectorize/first-order-recurrence-complex.ll
@@ -2,12 +2,12 @@
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -enable-interleaved-mem-accesses -S %s | FileCheck %s
- at p = external local_unnamed_addr global [257 x i32], align 16
- at q = external local_unnamed_addr global [257 x i32], align 16
+ at p = external global [257 x i32], align 16
+ at q = external global [257 x i32], align 16
; Test case for PR43398.
-define void @can_sink_after_store(i32 %x, ptr %ptr, i64 %tc) local_unnamed_addr #0 {
+define void @can_sink_after_store(i32 %x, ptr %ptr, i64 %tc) #0 {
; CHECK-LABEL: @can_sink_after_store(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[PREHEADER:%.*]]
@@ -82,7 +82,7 @@ exit:
; We can sink potential trapping instructions, as this will only delay the trap
; and not introduce traps on additional paths.
-define void @sink_sdiv(i32 %x, ptr %ptr, i64 %tc) local_unnamed_addr #0 {
+define void @sink_sdiv(i32 %x, ptr %ptr, i64 %tc) #0 {
; CHECK-LABEL: @sink_sdiv(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[PREHEADER:%.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll b/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
index 6b4727a1379f8..715d325d7513e 100644
--- a/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
+++ b/llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
@@ -2319,7 +2319,7 @@ for.end:
; sinking, instructions with side effects (e.g. loads) conditioned by those
; branches will become users of the condition bit after vectorization and would
; need to be sunk if the loop is vectorized.
-define void @do_not_sink_branch(i32 %x, ptr %in, ptr %out, i32 %tc) local_unnamed_addr #0 {
+define void @do_not_sink_branch(i32 %x, ptr %in, ptr %out, i32 %tc) #0 {
; UNROLL-NO-IC-LABEL: @do_not_sink_branch(
; UNROLL-NO-IC-NEXT: entry:
; UNROLL-NO-IC-NEXT: [[CMP530:%.*]] = icmp slt i32 0, [[TC:%.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/fix-reduction-dbg.ll b/llvm/test/Transforms/LoopVectorize/fix-reduction-dbg.ll
index 3fd1b573a1ed4..7d10f25b13ea5 100644
--- a/llvm/test/Transforms/LoopVectorize/fix-reduction-dbg.ll
+++ b/llvm/test/Transforms/LoopVectorize/fix-reduction-dbg.ll
@@ -28,7 +28,7 @@
; return ret;
; }
-define dso_local i32 @"foo"(i32 %count, ptr nocapture readonly %bar) local_unnamed_addr !dbg !8 {
+define i32 @"foo"(i32 %count, ptr nocapture readonly %bar) !dbg !8 {
entry:
%cmp8 = icmp sgt i32 %count, 0, !dbg !10
br i1 %cmp8, label %for.body.preheader, label %for.cond.cleanup, !dbg !10
diff --git a/llvm/test/Transforms/LoopVectorize/forked-pointers.ll b/llvm/test/Transforms/LoopVectorize/forked-pointers.ll
index 78199f9e8e3c4..60a35c8813e0d 100644
--- a/llvm/test/Transforms/LoopVectorize/forked-pointers.ll
+++ b/llvm/test/Transforms/LoopVectorize/forked-pointers.ll
@@ -14,7 +14,7 @@ target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
;; }
;; }
-define dso_local void @forked_ptrs_
diff erent_base_same_offset(ptr nocapture readonly %Base1, ptr nocapture readonly %Base2, ptr nocapture %Dest, ptr nocapture readonly %Preds) {
+define void @forked_ptrs_
diff erent_base_same_offset(ptr nocapture readonly %Base1, ptr nocapture readonly %Base2, ptr nocapture %Dest, ptr nocapture readonly %Preds) {
; CHECK-LABEL: @forked_ptrs_
diff erent_base_same_offset(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[VECTOR_MEMCHECK:%.*]]
@@ -123,7 +123,7 @@ for.body:
;; }
;; }
-define dso_local void @forked_ptrs_same_base_
diff erent_offset(ptr nocapture readonly %Base, ptr nocapture %Dest, ptr nocapture readonly %Preds) {
+define void @forked_ptrs_same_base_
diff erent_offset(ptr nocapture readonly %Base, ptr nocapture %Dest, ptr nocapture readonly %Preds) {
; CHECK-LABEL: @forked_ptrs_same_base_
diff erent_offset(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll b/llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
index 4569ea32cfdf8..37625888b81ef 100644
--- a/llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
+++ b/llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
@@ -2,7 +2,7 @@
; RUN: opt -passes=loop-vectorize -force-vector-width=1 -force-vector-interleave=2 -S %s | FileCheck --check-prefix=VF1 %s
; RUN: opt -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S %s | FileCheck --check-prefix=VF2 %s
- at f = external dso_local global i32, align 4
+ at f = external global i32, align 4
define void @int_iv_based_on_pointer_iv(ptr %A) {
; VF1-LABEL: define void @int_iv_based_on_pointer_iv(
diff --git a/llvm/test/Transforms/LoopVectorize/interleaved-accesses-1.ll b/llvm/test/Transforms/LoopVectorize/interleaved-accesses-1.ll
index d42a15a60f042..4c4ffe4dac6f9 100644
--- a/llvm/test/Transforms/LoopVectorize/interleaved-accesses-1.ll
+++ b/llvm/test/Transforms/LoopVectorize/interleaved-accesses-1.ll
@@ -42,7 +42,7 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
%class.Complex = type { float, float }
-define void @_Z4testP7ComplexS0_mm(ptr noalias nocapture %out, ptr noalias nocapture readonly %in, i64 %out_start, i64 %size) local_unnamed_addr {
+define void @_Z4testP7ComplexS0_mm(ptr noalias nocapture %out, ptr noalias nocapture readonly %in, i64 %out_start, i64 %size) {
entry:
%cmp9 = icmp eq i64 %size, 0
br i1 %cmp9, label %for.cond.cleanup, label %for.body.preheader
diff --git a/llvm/test/Transforms/LoopVectorize/interleaved-accesses-2.ll b/llvm/test/Transforms/LoopVectorize/interleaved-accesses-2.ll
index 738a8be782108..04d07cfdecd1b 100644
--- a/llvm/test/Transforms/LoopVectorize/interleaved-accesses-2.ll
+++ b/llvm/test/Transforms/LoopVectorize/interleaved-accesses-2.ll
@@ -22,9 +22,9 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
; }
; }
-define void @_Z4testPfS_m(ptr noalias nocapture %out, ptr noalias nocapture readonly %in, i64 %size) local_unnamed_addr {
+define void @_Z4testPfS_m(ptr noalias nocapture %out, ptr noalias nocapture readonly %in, i64 %size) {
; CHECK-LABEL: define void @_Z4testPfS_m(
-; CHECK-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], i64 [[SIZE:%.*]]) local_unnamed_addr {
+; CHECK-SAME: ptr noalias captures(none) [[OUT:%.*]], ptr noalias readonly captures(none) [[IN:%.*]], i64 [[SIZE:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[CMP7:%.*]] = icmp eq i64 [[SIZE]], 0
; CHECK-NEXT: br i1 [[CMP7]], label %[[FOR_COND_CLEANUP:.*]], label %[[FOR_BODY_PREHEADER:.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/interleaved-accesses-masked-group.ll b/llvm/test/Transforms/LoopVectorize/interleaved-accesses-masked-group.ll
index cd4d2d0055ede..668c349ebd8b1 100644
--- a/llvm/test/Transforms/LoopVectorize/interleaved-accesses-masked-group.ll
+++ b/llvm/test/Transforms/LoopVectorize/interleaved-accesses-masked-group.ll
@@ -113,7 +113,7 @@ source_filename = "test.c"
target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
target triple = "i386-unknown-linux-gnu"
-define dso_local void @masked_strided1(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr #0 {
+define void @masked_strided1(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) #0 {
entry:
%conv = zext i8 %guard to i32
br label %for.body
@@ -149,7 +149,7 @@ for.end:
}
-define dso_local void @masked_strided2(ptr noalias nocapture readnone %p, ptr noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr #0 {
+define void @masked_strided2(ptr noalias nocapture readnone %p, ptr noalias nocapture %q, i8 zeroext %guard) #0 {
entry:
%conv = zext i8 %guard to i32
br label %for.body
@@ -178,7 +178,7 @@ for.end:
}
-define dso_local void @masked_strided3(ptr noalias nocapture readnone %p, ptr noalias nocapture %q, i8 zeroext %guard1, i8 zeroext %guard2) local_unnamed_addr #0 {
+define void @masked_strided3(ptr noalias nocapture readnone %p, ptr noalias nocapture %q, i8 zeroext %guard1, i8 zeroext %guard2) #0 {
entry:
%conv = zext i8 %guard1 to i32
%conv3 = zext i8 %guard2 to i32
diff --git a/llvm/test/Transforms/LoopVectorize/interleaved-accesses-uniform-load.ll b/llvm/test/Transforms/LoopVectorize/interleaved-accesses-uniform-load.ll
index dbab03720781d..8995df580dc72 100644
--- a/llvm/test/Transforms/LoopVectorize/interleaved-accesses-uniform-load.ll
+++ b/llvm/test/Transforms/LoopVectorize/interleaved-accesses-uniform-load.ll
@@ -30,8 +30,8 @@
%0 zeroinitializer, %0 zeroinitializer, %0 zeroinitializer,
%0 zeroinitializer], align 8
-define dso_local void @test_dead_load(i32 %arg) {
-; CHECK-LABEL: define dso_local void @test_dead_load(
+define void @test_dead_load(i32 %arg) {
+; CHECK-LABEL: define void @test_dead_load(
; CHECK-SAME: i32 [[ARG:%.*]]) {
; CHECK-NEXT: [[BB1:.*:]]
; CHECK-NEXT: br label %[[VECTOR_PH:.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/libcall-remark.ll b/llvm/test/Transforms/LoopVectorize/libcall-remark.ll
index 660dc6f19ee1a..37d177eec541c 100644
--- a/llvm/test/Transforms/LoopVectorize/libcall-remark.ll
+++ b/llvm/test/Transforms/LoopVectorize/libcall-remark.ll
@@ -5,7 +5,7 @@
target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-apple-macosx10.14.0"
- at data = external local_unnamed_addr global [32768 x float], align 16
+ at data = external global [32768 x float], align 16
; CHECK: loop not vectorized: library call cannot be vectorized
diff --git a/llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll b/llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
index 30ee4803de607..319e1a3bae10f 100644
--- a/llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
+++ b/llvm/test/Transforms/LoopVectorize/memdep-fold-tail.ll
@@ -19,7 +19,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
; }
;}
- at a = common local_unnamed_addr global [18 x i8] zeroinitializer, align 16
+ at a = common global [18 x i8] zeroinitializer, align 16
define void @maxvf3() {
; CHECK-LABEL: @maxvf3(
diff --git a/llvm/test/Transforms/LoopVectorize/memdep.ll b/llvm/test/Transforms/LoopVectorize/memdep.ll
index 3cd56d5a9e39a..04e211edceb75 100644
--- a/llvm/test/Transforms/LoopVectorize/memdep.ll
+++ b/llvm/test/Transforms/LoopVectorize/memdep.ll
@@ -247,10 +247,10 @@ for.end:
; WRONGVF-LABEL: @pr34283
; WRONGVF-NOT: <8 x i64>
- at a = common local_unnamed_addr global [64 x i32] zeroinitializer, align 16
+ at a = common global [64 x i32] zeroinitializer, align 16
; Function Attrs: norecurse nounwind uwtable
-define void @pr34283() local_unnamed_addr {
+define void @pr34283() {
entry:
br label %for.body
diff --git a/llvm/test/Transforms/LoopVectorize/memory-dep-remarks.ll b/llvm/test/Transforms/LoopVectorize/memory-dep-remarks.ll
index bf077f4f52823..e27a67999d4aa 100644
--- a/llvm/test/Transforms/LoopVectorize/memory-dep-remarks.ll
+++ b/llvm/test/Transforms/LoopVectorize/memory-dep-remarks.ll
@@ -83,7 +83,7 @@ exit:
; }
; CHECK-NOT: remark: source.c:{{0-9]+}}:{{[0-9]+}}:
-define dso_local void @test_forward(i64 %n, ptr nocapture %A, ptr nocapture %B) !dbg !70 {
+define void @test_forward(i64 %n, ptr nocapture %A, ptr nocapture %B) !dbg !70 {
entry:
%cmp11 = icmp sgt i64 %n, 1
br i1 %cmp11, label %loop, label %exit, !dbg !81
@@ -118,7 +118,7 @@ loop:
; CHECK-NOT: remark: source.c:{{0-9]+}}:{{[0-9]+}}:
-define dso_local void @test_backwardVectorizable(i64 %n, ptr nocapture %A) !dbg !93 {
+define void @test_backwardVectorizable(i64 %n, ptr nocapture %A) !dbg !93 {
entry:
%cmp8 = icmp sgt i64 %n, 4
br i1 %cmp8, label %loop, label %exit
diff --git a/llvm/test/Transforms/LoopVectorize/middle-block-dbg.ll b/llvm/test/Transforms/LoopVectorize/middle-block-dbg.ll
index 1675a595072fd..779dd3e590327 100644
--- a/llvm/test/Transforms/LoopVectorize/middle-block-dbg.ll
+++ b/llvm/test/Transforms/LoopVectorize/middle-block-dbg.ll
@@ -27,10 +27,10 @@
target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
-@"?x@@3HA" = external dso_local local_unnamed_addr global i32, align 4
-@"?y@@3HA" = external dso_local local_unnamed_addr global i32, align 4
+@"?x@@3HA" = external global i32, align 4
+@"?y@@3HA" = external global i32, align 4
-define dso_local void @"?a@@YAXXZ"() local_unnamed_addr #0 !dbg !8 {
+define void @"?a@@YAXXZ"() #0 !dbg !8 {
entry:
%0 = load i32, ptr @"?x@@3HA", align 4, !dbg !23, !tbaa !24
%1 = zext i32 %0 to i64, !dbg !28
diff --git a/llvm/test/Transforms/LoopVectorize/no_array_bounds_scalable.ll b/llvm/test/Transforms/LoopVectorize/no_array_bounds_scalable.ll
index 03918a103b214..637deebd83708 100644
--- a/llvm/test/Transforms/LoopVectorize/no_array_bounds_scalable.ll
+++ b/llvm/test/Transforms/LoopVectorize/no_array_bounds_scalable.ll
@@ -9,7 +9,7 @@
; }
; CHECK: warning: <unknown>:0:0: loop not interleaved: the optimizer was unable to perform the requested transformation; the transformation might be disabled or specified as part of an unsupported transformation ordering
-define dso_local void @foo(ptr nocapture %A, ptr nocapture readonly %B, i32 %N) {
+define void @foo(ptr nocapture %A, ptr nocapture readonly %B, i32 %N) {
entry:
%cmp7 = icmp sgt i32 %N, 0
br i1 %cmp7, label %for.body.preheader, label %for.end
@@ -36,7 +36,7 @@ for.end: ; preds = %for.body, %entry
}
; CHECK: warning: <unknown>:0:0: loop not vectorized: the optimizer was unable to perform the requested transformation; the transformation might be disabled or specified as part of an unsupported transformation ordering
-define dso_local void @foo2(ptr nocapture %A, ptr nocapture readonly %B, i32 %N) {
+define void @foo2(ptr nocapture %A, ptr nocapture readonly %B, i32 %N) {
entry:
%cmp7 = icmp sgt i32 %N, 0
br i1 %cmp7, label %for.body.preheader, label %for.end
diff --git a/llvm/test/Transforms/LoopVectorize/nounroll.ll b/llvm/test/Transforms/LoopVectorize/nounroll.ll
index f6349404536b7..a7ef4bf5069eb 100644
--- a/llvm/test/Transforms/LoopVectorize/nounroll.ll
+++ b/llvm/test/Transforms/LoopVectorize/nounroll.ll
@@ -5,7 +5,7 @@ target datalayout = "e-m:e-i64:64-n32:64-S128-v256:256:256-v512:512:512"
; CHECK: LV: Checking a loop in 'f1'
; CHECK: LV: Loop hints: force=? width=0 interleave=1
-define dso_local void @f1(i32 signext %n, ptr %A) {
+define void @f1(i32 signext %n, ptr %A) {
entry:
%cmp1 = icmp sgt i32 %n, 0
br i1 %cmp1, label %for.body.preheader, label %for.end
@@ -32,7 +32,7 @@ for.end: ; preds = %for.end.loopexit, %
; CHECK: LV: Checking a loop in 'f2'
; CHECK: LV: Loop hints: force=? width=0 interleave=4
-define dso_local void @f2(i32 signext %n, ptr %A) {
+define void @f2(i32 signext %n, ptr %A) {
entry:
%cmp1 = icmp sgt i32 %n, 0
br i1 %cmp1, label %for.body.preheader, label %for.end
@@ -59,7 +59,7 @@ for.end: ; preds = %for.end.loopexit, %
; CHECK: LV: Checking a loop in 'f3'
; CHECK: LV: Loop hints: force=? width=0 interleave=1
-define dso_local void @f3(i32 signext %n, ptr %A) {
+define void @f3(i32 signext %n, ptr %A) {
entry:
%cmp1 = icmp sgt i32 %n, 0
br i1 %cmp1, label %for.body.preheader, label %for.end
diff --git a/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll b/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
index b20a3b0063834..547e5019d4bc1 100644
--- a/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
+++ b/llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
@@ -12,8 +12,8 @@
target datalayout = "e-m:e-i64:64-n32:64-v128:128:128"
-define dso_local void @f1(ptr noalias %aa, ptr noalias %bb, ptr noalias %cc, i32 signext %N) {
-; CHECK-LABEL: define dso_local void @f1(
+define void @f1(ptr noalias %aa, ptr noalias %bb, ptr noalias %cc, i32 signext %N) {
+; CHECK-LABEL: define void @f1(
; CHECK-SAME: ptr noalias [[AA:%.*]], ptr noalias [[BB:%.*]], ptr noalias [[CC:%.*]], i32 signext [[N:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[N]], 0
@@ -87,7 +87,7 @@ define dso_local void @f1(ptr noalias %aa, ptr noalias %bb, ptr noalias %cc, i32
; CHECK: [[FOR_END]]:
; CHECK-NEXT: ret void
;
-; CHECK-PROFITABLE-BY-DEFAULT-LABEL: define dso_local void @f1(
+; CHECK-PROFITABLE-BY-DEFAULT-LABEL: define void @f1(
; CHECK-PROFITABLE-BY-DEFAULT-SAME: ptr noalias [[AA:%.*]], ptr noalias [[BB:%.*]], ptr noalias [[CC:%.*]], i32 signext [[N:%.*]]) {
; CHECK-PROFITABLE-BY-DEFAULT-NEXT: [[ENTRY:.*:]]
; CHECK-PROFITABLE-BY-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[N]], 0
@@ -140,8 +140,8 @@ for.end: ; preds = %for.end.loopexit, %
ret void
}
-define dso_local signext i32 @f2(ptr noalias %A, ptr noalias %B, i32 signext %n) {
-; CHECK-LABEL: define dso_local signext i32 @f2(
+define signext i32 @f2(ptr noalias %A, ptr noalias %B, i32 signext %n) {
+; CHECK-LABEL: define signext i32 @f2(
; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i32 signext [[N:%.*]]) {
; CHECK-NEXT: [[ENTRY:.*:]]
; CHECK-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[N]], 1
@@ -238,7 +238,7 @@ define dso_local signext i32 @f2(ptr noalias %A, ptr noalias %B, i32 signext %n)
; CHECK: [[FOR_END]]:
; CHECK-NEXT: ret i32 0
;
-; CHECK-PROFITABLE-BY-DEFAULT-LABEL: define dso_local signext i32 @f2(
+; CHECK-PROFITABLE-BY-DEFAULT-LABEL: define signext i32 @f2(
; CHECK-PROFITABLE-BY-DEFAULT-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], i32 signext [[N:%.*]]) {
; CHECK-PROFITABLE-BY-DEFAULT-NEXT: [[ENTRY:.*:]]
; CHECK-PROFITABLE-BY-DEFAULT-NEXT: [[CMP1:%.*]] = icmp sgt i32 [[N]], 1
diff --git a/llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll b/llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
index 0db76c72550bc..7653d98988975 100644
--- a/llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
+++ b/llvm/test/Transforms/LoopVectorize/outer_loop_scalable.ll
@@ -9,8 +9,8 @@
; CHECK: remark: <unknown>:0:0: vectorized outer loop (vectorization width: vscale x 4, interleaved count: 1)
; NO_SCALABLE_VECS: remark: <unknown>:0:0: loop not vectorized: the scalable user-specified vectorization width for outer-loop vectorization cannot be used because the target does not support scalable vectors.
- at A = external local_unnamed_addr global [1024 x float], align 4
- at B = external local_unnamed_addr global [512 x float], align 4
+ at A = external global [1024 x float], align 4
+ at B = external global [512 x float], align 4
define void @foo() {
; CHECK-LABEL: define void @foo() {
diff --git a/llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll b/llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
index e119ee281ecad..fec940866bd87 100644
--- a/llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
+++ b/llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
@@ -29,10 +29,10 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
; }
;
- at a = common local_unnamed_addr global [250 x i32] zeroinitializer, align 16
+ at a = common global [250 x i32] zeroinitializer, align 16
; Function Attrs: norecurse nounwind uwtable
-define void @doit1(i32 %n, i32 %step) local_unnamed_addr {
+define void @doit1(i32 %n, i32 %step) {
; CHECK-LABEL: @doit1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[N:%.*]], 0
@@ -153,7 +153,7 @@ for.end:
; Function Attrs: norecurse nounwind uwtable
-define void @doit2(i32 %n, i32 %step) local_unnamed_addr {
+define void @doit2(i32 %n, i32 %step) {
; CHECK-LABEL: @doit2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP7:%.*]] = icmp sgt i32 [[N:%.*]], 0
@@ -271,7 +271,7 @@ for.end:
; Function Attrs: norecurse nounwind uwtable
-define void @doit3(i32 %n, i32 %step) local_unnamed_addr {
+define void @doit3(i32 %n, i32 %step) {
; CHECK-LABEL: @doit3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[N:%.*]], 0
@@ -347,7 +347,7 @@ for.end:
; Function Attrs: norecurse nounwind uwtable
-define void @doit4(i32 %n, i8 signext %cstep) local_unnamed_addr {
+define void @doit4(i32 %n, i8 signext %cstep) {
; CHECK-LABEL: @doit4(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CONV:%.*]] = sext i8 [[CSTEP:%.*]] to i32
diff --git a/llvm/test/Transforms/LoopVectorize/pr31098.ll b/llvm/test/Transforms/LoopVectorize/pr31098.ll
index e983f53d87b04..f183e30a04d29 100644
--- a/llvm/test/Transforms/LoopVectorize/pr31098.ll
+++ b/llvm/test/Transforms/LoopVectorize/pr31098.ll
@@ -60,7 +60,7 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
%class.Complex = type { float, float }
-define void @Test(ptr nocapture %out, i64 %size) local_unnamed_addr {
+define void @Test(ptr nocapture %out, i64 %size) {
entry:
%div = lshr i64 %size, 1
%cmp47 = icmp eq i64 %div, 0
diff --git a/llvm/test/Transforms/LoopVectorize/pr33706.ll b/llvm/test/Transforms/LoopVectorize/pr33706.ll
index e45546d3825af..b10b5de2103e2 100644
--- a/llvm/test/Transforms/LoopVectorize/pr33706.ll
+++ b/llvm/test/Transforms/LoopVectorize/pr33706.ll
@@ -1,13 +1,13 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --prefix-filecheck-ir-name VAR_ --version 2
; RUN: opt -S -passes=loop-vectorize -force-vector-interleave=1 -force-vector-width=2 < %s | FileCheck %s
- at global = local_unnamed_addr global i32 0, align 4
- at global.1 = local_unnamed_addr global i32 0, align 4
- at global.2 = local_unnamed_addr global float 0x3EF0000000000000, align 4
+ at global = global i32 0, align 4
+ at global.1 = global i32 0, align 4
+ at global.2 = global float 0x3EF0000000000000, align 4
-define void @PR33706(ptr nocapture readonly %arg, ptr nocapture %arg1, i32 %arg2) local_unnamed_addr {
+define void @PR33706(ptr nocapture readonly %arg, ptr nocapture %arg1, i32 %arg2) {
; CHECK-LABEL: define void @PR33706
-; CHECK-SAME: (ptr readonly captures(none) [[ARG:%.*]], ptr captures(none) [[ARG1:%.*]], i32 [[ARG2:%.*]]) local_unnamed_addr {
+; CHECK-SAME: (ptr readonly captures(none) [[ARG:%.*]], ptr captures(none) [[ARG1:%.*]], i32 [[ARG2:%.*]]) {
; CHECK-NEXT: bb:
; CHECK-NEXT: [[TMP:%.*]] = load i32, ptr @global.1, align 4
; CHECK-NEXT: [[VAR_TMP3:%.*]] = getelementptr inbounds float, ptr [[ARG]], i64 190
diff --git a/llvm/test/Transforms/LoopVectorize/pr35773.ll b/llvm/test/Transforms/LoopVectorize/pr35773.ll
index d5528e70b5d48..6b8830d916e5b 100644
--- a/llvm/test/Transforms/LoopVectorize/pr35773.ll
+++ b/llvm/test/Transforms/LoopVectorize/pr35773.ll
@@ -1,7 +1,7 @@
; RUN: opt -S -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 < %s 2>&1 | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
- at b = common local_unnamed_addr global i8 0, align 1
+ at b = common global i8 0, align 1
define void @doit1(ptr %ptr) {
; CHECK-LABEL: @doit1(
diff --git a/llvm/test/Transforms/LoopVectorize/pr38800.ll b/llvm/test/Transforms/LoopVectorize/pr38800.ll
index 0b3f01ba53acb..4482069d13b77 100644
--- a/llvm/test/Transforms/LoopVectorize/pr38800.ll
+++ b/llvm/test/Transforms/LoopVectorize/pr38800.ll
@@ -15,7 +15,7 @@
; *ptr += val;
;}
-define void @foo(ptr nocapture %ptr, float %val) local_unnamed_addr {
+define void @foo(ptr nocapture %ptr, float %val) {
entry:
%ptr.promoted = load float, ptr %ptr, align 4
br label %for.body
diff --git a/llvm/test/Transforms/LoopVectorize/pr39099.ll b/llvm/test/Transforms/LoopVectorize/pr39099.ll
index ff1e46e35607f..ddc8db69e977a 100644
--- a/llvm/test/Transforms/LoopVectorize/pr39099.ll
+++ b/llvm/test/Transforms/LoopVectorize/pr39099.ll
@@ -10,7 +10,7 @@ target datalayout = "e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128"
; CHECK: LV: Analyzing interleaved accesses...
; CHECK-NOT: LV: Creating an interleave group
-define dso_local void @masked_strided(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) local_unnamed_addr {
+define void @masked_strided(ptr noalias nocapture readonly %p, ptr noalias nocapture %q, i8 zeroext %guard) {
entry:
%conv = zext i8 %guard to i32
br label %for.body
diff --git a/llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll b/llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
index ab2965abc2a0d..fbc3a1ef5a76e 100644
--- a/llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
+++ b/llvm/test/Transforms/LoopVectorize/pr51614-fold-tail-by-masking.ll
@@ -3,12 +3,12 @@
target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
- at A = external dso_local local_unnamed_addr global [40 x [4 x i16]], align 1
+ at A = external global [40 x [4 x i16]], align 1
; Make sure interleave group of loads with gap is considered masked with fold-tail,
; and forbidden with reverse access.
-define dso_local i16 @reverse_interleave_load_fold_mask() optsize {
+define i16 @reverse_interleave_load_fold_mask() optsize {
; CHECK-LABEL: @reverse_interleave_load_fold_mask(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/runtime-check.ll b/llvm/test/Transforms/LoopVectorize/runtime-check.ll
index 755208e1a4d67..ea5f431603c6f 100644
--- a/llvm/test/Transforms/LoopVectorize/runtime-check.ll
+++ b/llvm/test/Transforms/LoopVectorize/runtime-check.ll
@@ -410,7 +410,7 @@ exit:
ret void
}
-define dso_local void @forced_optsize(ptr noalias nocapture readonly %x_p, ptr noalias nocapture readonly %y_p, ptr noalias nocapture %z_p) minsize optsize {
+define void @forced_optsize(ptr noalias nocapture readonly %x_p, ptr noalias nocapture readonly %y_p, ptr noalias nocapture %z_p) minsize optsize {
; CHECK-LABEL: @forced_optsize(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[VECTOR_PH:%.*]]
diff --git a/llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll b/llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll
index 70c0483ee9f4b..ba0c405b95151 100644
--- a/llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll
+++ b/llvm/test/Transforms/LoopVectorize/tail-folding-counting-down.ll
@@ -9,7 +9,7 @@
target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
-define dso_local void @foo(ptr noalias nocapture readonly %A, ptr noalias nocapture readonly %B, ptr noalias nocapture %C, i32 %N) {
+define void @foo(ptr noalias nocapture readonly %A, ptr noalias nocapture readonly %B, ptr noalias nocapture %C, i32 %N) {
entry:
%cmp6 = icmp eq i32 %N, 0
br i1 %cmp6, label %while.end, label %while.body.preheader
diff --git a/llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll b/llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll
index faadce6b29059..985d195bdfc3e 100644
--- a/llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll
+++ b/llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll
@@ -14,7 +14,7 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
; CHECK-DAG: ![[MD3]] = distinct !{![[MD3]], !"LVerDomain"}
; Function Attrs: norecurse nounwind uwtable
-define void @test(ptr nocapture readonly %a, ptr nocapture %b) local_unnamed_addr #0 {
+define void @test(ptr nocapture readonly %a, ptr nocapture %b) #0 {
entry:
br label %for.body
diff --git a/llvm/test/Transforms/LoopVectorize/vect-phiscev-sext-trunc.ll b/llvm/test/Transforms/LoopVectorize/vect-phiscev-sext-trunc.ll
index 76a8bba86984c..b94239f37c997 100644
--- a/llvm/test/Transforms/LoopVectorize/vect-phiscev-sext-trunc.ll
+++ b/llvm/test/Transforms/LoopVectorize/vect-phiscev-sext-trunc.ll
@@ -51,7 +51,7 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
; VF1-NOT: %{{.*}} = shl i32
; VF1: middle.block:
- at a = common local_unnamed_addr global [250 x i32] zeroinitializer, align 16
+ at a = common global [250 x i32] zeroinitializer, align 16
define void @doit1(i32 %n, i32 %step) {
entry:
diff --git a/llvm/test/Transforms/LoopVectorize/vectorizeVFone.ll b/llvm/test/Transforms/LoopVectorize/vectorizeVFone.ll
index dcc144e1234af..ae8d9d56405b7 100644
--- a/llvm/test/Transforms/LoopVectorize/vectorizeVFone.ll
+++ b/llvm/test/Transforms/LoopVectorize/vectorizeVFone.ll
@@ -23,6 +23,6 @@ for.end:
ret void
}
-declare double @atan(double) local_unnamed_addr
+declare double @atan(double)
declare <2 x double> @vector_atan(<2 x double>) #0
attributes #0 = { nounwind readnone "vector-function-abi-variant"="_ZGV_LLVM_N2v_atan(vector_atan)" }
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