[llvm] [MachineScheduler] Improve handling of phys regs in GenericScheduler() (NFC). (PR #187572)

[Min-Yih Hsu via llvm-commits]

================
@@ -3870,9 +3870,38 @@ int llvm::biasPhysReg(const SUnit *SU, bool isTop) {
       return isTop ? -1 : 1;
   }
 
+  if (BiasPRegsExtra && !isTop && MI->getNumOperands()) {
----------------
mshockwave wrote:

could we use `MI::getNumExplicitDefs` here so that you don't have to check `isDef` and `isReg` below?
Another question: in the scenario where there are multiple defs, are you intend to bias as long as _any_ of the defs is a physical register?

https://github.com/llvm/llvm-project/pull/187572