[llvm] 7cc4692 - [ARM] Add a phase ordering test for multiple reductions. NFC
David Green via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 20 08:16:10 PDT 2026
Author: David Green
Date: 2026-03-20T15:15:58Z
New Revision: 7cc46928d9d3311f12c1a5d8ce4be75475a1a65f
URL: https://github.com/llvm/llvm-project/commit/7cc46928d9d3311f12c1a5d8ce4be75475a1a65f
DIFF: https://github.com/llvm/llvm-project/commit/7cc46928d9d3311f12c1a5d8ce4be75475a1a65f.diff
LOG: [ARM] Add a phase ordering test for multiple reductions. NFC
Added:
llvm/test/Transforms/PhaseOrdering/ARM/arm_var_q31.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/PhaseOrdering/ARM/arm_var_q31.ll b/llvm/test/Transforms/PhaseOrdering/ARM/arm_var_q31.ll
new file mode 100644
index 0000000000000..b7b57176a7a2f
--- /dev/null
+++ b/llvm/test/Transforms/PhaseOrdering/ARM/arm_var_q31.ll
@@ -0,0 +1,395 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -passes="default<O3>" -S | FileCheck %s
+
+; Test that we can take a paired, unrolled i64 mul + sum and generate efficient
+; MVE reductions. It currently uses gathers which is still profitable, it could
+; be using ld4 if that was enabled or rerolling the loop.
+
+target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
+target triple = "thumbv8.1m.main-unknown-none-eabihf"
+
+define void @arm_var_q31(ptr noundef %pSrc, i32 noundef %blockSize, ptr noundef %pResult) #0 {
+; CHECK-LABEL: @arm_var_q31(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult i32 [[BLOCKSIZE:%.*]], 2
+; CHECK-NEXT: br i1 [[CMP]], label [[CLEANUP:%.*]], label [[IF_END:%.*]]
+; CHECK: if.end:
+; CHECK-NEXT: [[SHR:%.*]] = lshr i32 [[BLOCKSIZE]], 2
+; CHECK-NEXT: [[CMP1_NOT39:%.*]] = icmp eq i32 [[SHR]], 0
+; CHECK-NEXT: br i1 [[CMP1_NOT39]], label [[WHILE_END:%.*]], label [[WHILE_BODY_PREHEADER:%.*]]
+; CHECK: while.body.preheader:
+; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[BLOCKSIZE]], 16
+; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[WHILE_BODY_PREHEADER67:%.*]], label [[VECTOR_PH:%.*]]
+; CHECK: vector.ph:
+; CHECK-NEXT: [[N_VEC:%.*]] = and i32 [[SHR]], 1073741820
+; CHECK-NEXT: [[TMP0:%.*]] = shl i32 [[N_VEC]], 4
+; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PSRC:%.*]], i32 [[TMP0]]
+; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[SHR]], 3
+; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
+; CHECK: vector.body:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[TMP25:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT: [[POINTER_PHI:%.*]] = phi ptr [ [[PSRC]], [[VECTOR_PH]] ], [ [[PTR_IND:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VEC_PHI53:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[TMP33:%.*]], [[VECTOR_BODY]] ]
+; CHECK-NEXT: [[VECTOR_GEP:%.*]] = getelementptr i8, ptr [[POINTER_PHI]], <4 x i32> <i32 0, i32 16, i32 32, i32 48>
+; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw i8, <4 x ptr> [[VECTOR_GEP]], i32 4
+; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = tail call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> align 4 [[VECTOR_GEP]], <4 x i1> splat (i1 true), <4 x i32> poison), !tbaa [[TBAA4:![0-9]+]]
+; CHECK-NEXT: [[TMP4:%.*]] = ashr <4 x i32> [[WIDE_MASKED_GATHER]], splat (i32 8)
+; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw i8, <4 x ptr> [[VECTOR_GEP]], i32 8
+; CHECK-NEXT: [[WIDE_MASKED_GATHER54:%.*]] = tail call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> align 4 [[TMP3]], <4 x i1> splat (i1 true), <4 x i32> poison), !tbaa [[TBAA4]]
+; CHECK-NEXT: [[TMP6:%.*]] = ashr <4 x i32> [[WIDE_MASKED_GATHER54]], splat (i32 8)
+; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i8, <4 x ptr> [[VECTOR_GEP]], i32 12
+; CHECK-NEXT: [[WIDE_MASKED_GATHER55:%.*]] = tail call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> align 4 [[TMP5]], <4 x i1> splat (i1 true), <4 x i32> poison), !tbaa [[TBAA4]]
+; CHECK-NEXT: [[TMP8:%.*]] = ashr <4 x i32> [[WIDE_MASKED_GATHER55]], splat (i32 8)
+; CHECK-NEXT: [[WIDE_MASKED_GATHER56:%.*]] = tail call <4 x i32> @llvm.masked.gather.v4i32.v4p0(<4 x ptr> align 4 [[TMP7]], <4 x i1> splat (i1 true), <4 x i32> poison), !tbaa [[TBAA4]]
+; CHECK-NEXT: [[TMP9:%.*]] = ashr <4 x i32> [[WIDE_MASKED_GATHER56]], splat (i32 8)
+; CHECK-NEXT: [[TMP10:%.*]] = sext <4 x i32> [[TMP4]] to <4 x i64>
+; CHECK-NEXT: [[TMP11:%.*]] = mul nsw <4 x i64> [[TMP10]], [[TMP10]]
+; CHECK-NEXT: [[TMP12:%.*]] = tail call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> [[TMP11]])
+; CHECK-NEXT: [[TMP13:%.*]] = add i64 [[VEC_PHI]], [[TMP12]]
+; CHECK-NEXT: [[TMP14:%.*]] = sext <4 x i32> [[TMP6]] to <4 x i64>
+; CHECK-NEXT: [[TMP15:%.*]] = mul nsw <4 x i64> [[TMP14]], [[TMP14]]
+; CHECK-NEXT: [[TMP16:%.*]] = tail call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> [[TMP15]])
+; CHECK-NEXT: [[TMP17:%.*]] = add i64 [[TMP13]], [[TMP16]]
+; CHECK-NEXT: [[TMP18:%.*]] = sext <4 x i32> [[TMP8]] to <4 x i64>
+; CHECK-NEXT: [[TMP19:%.*]] = mul nsw <4 x i64> [[TMP18]], [[TMP18]]
+; CHECK-NEXT: [[TMP20:%.*]] = tail call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> [[TMP19]])
+; CHECK-NEXT: [[TMP21:%.*]] = add i64 [[TMP17]], [[TMP20]]
+; CHECK-NEXT: [[TMP22:%.*]] = sext <4 x i32> [[TMP9]] to <4 x i64>
+; CHECK-NEXT: [[TMP23:%.*]] = mul nsw <4 x i64> [[TMP22]], [[TMP22]]
+; CHECK-NEXT: [[TMP24:%.*]] = tail call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> [[TMP23]])
+; CHECK-NEXT: [[TMP25]] = add i64 [[TMP21]], [[TMP24]]
+; CHECK-NEXT: [[TMP26:%.*]] = tail call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> [[TMP10]])
+; CHECK-NEXT: [[TMP27:%.*]] = add i64 [[VEC_PHI53]], [[TMP26]]
+; CHECK-NEXT: [[TMP28:%.*]] = tail call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> [[TMP14]])
+; CHECK-NEXT: [[TMP29:%.*]] = add i64 [[TMP27]], [[TMP28]]
+; CHECK-NEXT: [[TMP30:%.*]] = tail call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> [[TMP18]])
+; CHECK-NEXT: [[TMP31:%.*]] = add i64 [[TMP29]], [[TMP30]]
+; CHECK-NEXT: [[TMP32:%.*]] = tail call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> [[TMP22]])
+; CHECK-NEXT: [[TMP33]] = add i64 [[TMP31]], [[TMP32]]
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 4
+; CHECK-NEXT: [[PTR_IND]] = getelementptr i8, ptr [[POINTER_PHI]], i32 64
+; CHECK-NEXT: [[TMP34:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[TMP34]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
+; CHECK: middle.block:
+; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[SHR]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[CMP_N]], label [[WHILE_END_LOOPEXIT:%.*]], label [[WHILE_BODY_PREHEADER67]]
+; CHECK: while.body.preheader67:
+; CHECK-NEXT: [[SUMOFSQUARES_043_PH:%.*]] = phi i64 [ 0, [[WHILE_BODY_PREHEADER]] ], [ [[TMP25]], [[MIDDLE_BLOCK]] ]
+; CHECK-NEXT: [[PSRC_ADDR_042_PH:%.*]] = phi ptr [ [[PSRC]], [[WHILE_BODY_PREHEADER]] ], [ [[TMP1]], [[MIDDLE_BLOCK]] ]
+; CHECK-NEXT: [[BLKCNT_041_PH:%.*]] = phi i32 [ [[SHR]], [[WHILE_BODY_PREHEADER]] ], [ [[TMP2]], [[MIDDLE_BLOCK]] ]
+; CHECK-NEXT: [[SUM_040_PH:%.*]] = phi i64 [ 0, [[WHILE_BODY_PREHEADER]] ], [ [[TMP33]], [[MIDDLE_BLOCK]] ]
+; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
+; CHECK: while.body:
+; CHECK-NEXT: [[SUMOFSQUARES_043:%.*]] = phi i64 [ [[ADD27:%.*]], [[WHILE_BODY]] ], [ [[SUMOFSQUARES_043_PH]], [[WHILE_BODY_PREHEADER67]] ]
+; CHECK-NEXT: [[PSRC_ADDR_042:%.*]] = phi ptr [ [[INCDEC_PTR22:%.*]], [[WHILE_BODY]] ], [ [[PSRC_ADDR_042_PH]], [[WHILE_BODY_PREHEADER67]] ]
+; CHECK-NEXT: [[BLKCNT_041:%.*]] = phi i32 [ [[DEC:%.*]], [[WHILE_BODY]] ], [ [[BLKCNT_041_PH]], [[WHILE_BODY_PREHEADER67]] ]
+; CHECK-NEXT: [[SUM_040:%.*]] = phi i64 [ [[ADD29:%.*]], [[WHILE_BODY]] ], [ [[SUM_040_PH]], [[WHILE_BODY_PREHEADER67]] ]
+; CHECK-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds nuw i8, ptr [[PSRC_ADDR_042]], i32 4
+; CHECK-NEXT: [[TMP35:%.*]] = load i32, ptr [[PSRC_ADDR_042]], align 4, !tbaa [[TBAA4]]
+; CHECK-NEXT: [[SHR2:%.*]] = ashr i32 [[TMP35]], 8
+; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[SHR2]] to i64
+; CHECK-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV]]
+; CHECK-NEXT: [[ADD:%.*]] = add nsw i64 [[MUL]], [[SUMOFSQUARES_043]]
+; CHECK-NEXT: [[ADD5:%.*]] = add nsw i64 [[SUM_040]], [[CONV]]
+; CHECK-NEXT: [[INCDEC_PTR6:%.*]] = getelementptr inbounds nuw i8, ptr [[PSRC_ADDR_042]], i32 8
+; CHECK-NEXT: [[TMP36:%.*]] = load i32, ptr [[INCDEC_PTR]], align 4, !tbaa [[TBAA4]]
+; CHECK-NEXT: [[SHR7:%.*]] = ashr i32 [[TMP36]], 8
+; CHECK-NEXT: [[CONV8:%.*]] = sext i32 [[SHR7]] to i64
+; CHECK-NEXT: [[MUL10:%.*]] = mul nsw i64 [[CONV8]], [[CONV8]]
+; CHECK-NEXT: [[ADD11:%.*]] = add nsw i64 [[ADD]], [[MUL10]]
+; CHECK-NEXT: [[ADD13:%.*]] = add nsw i64 [[ADD5]], [[CONV8]]
+; CHECK-NEXT: [[INCDEC_PTR14:%.*]] = getelementptr inbounds nuw i8, ptr [[PSRC_ADDR_042]], i32 12
+; CHECK-NEXT: [[TMP37:%.*]] = load i32, ptr [[INCDEC_PTR6]], align 4, !tbaa [[TBAA4]]
+; CHECK-NEXT: [[SHR15:%.*]] = ashr i32 [[TMP37]], 8
+; CHECK-NEXT: [[CONV16:%.*]] = sext i32 [[SHR15]] to i64
+; CHECK-NEXT: [[MUL18:%.*]] = mul nsw i64 [[CONV16]], [[CONV16]]
+; CHECK-NEXT: [[ADD19:%.*]] = add nsw i64 [[ADD11]], [[MUL18]]
+; CHECK-NEXT: [[ADD21:%.*]] = add nsw i64 [[ADD13]], [[CONV16]]
+; CHECK-NEXT: [[INCDEC_PTR22]] = getelementptr inbounds nuw i8, ptr [[PSRC_ADDR_042]], i32 16
+; CHECK-NEXT: [[TMP38:%.*]] = load i32, ptr [[INCDEC_PTR14]], align 4, !tbaa [[TBAA4]]
+; CHECK-NEXT: [[SHR23:%.*]] = ashr i32 [[TMP38]], 8
+; CHECK-NEXT: [[CONV24:%.*]] = sext i32 [[SHR23]] to i64
+; CHECK-NEXT: [[MUL26:%.*]] = mul nsw i64 [[CONV24]], [[CONV24]]
+; CHECK-NEXT: [[ADD27]] = add nsw i64 [[ADD19]], [[MUL26]]
+; CHECK-NEXT: [[ADD29]] = add nsw i64 [[ADD21]], [[CONV24]]
+; CHECK-NEXT: [[DEC]] = add nsw i32 [[BLKCNT_041]], -1
+; CHECK-NEXT: [[CMP1_NOT:%.*]] = icmp eq i32 [[DEC]], 0
+; CHECK-NEXT: br i1 [[CMP1_NOT]], label [[WHILE_END_LOOPEXIT]], label [[WHILE_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
+; CHECK: while.end.loopexit:
+; CHECK-NEXT: [[ADD27_LCSSA:%.*]] = phi i64 [ [[TMP25]], [[MIDDLE_BLOCK]] ], [ [[ADD27]], [[WHILE_BODY]] ]
+; CHECK-NEXT: [[ADD29_LCSSA:%.*]] = phi i64 [ [[TMP33]], [[MIDDLE_BLOCK]] ], [ [[ADD29]], [[WHILE_BODY]] ]
+; CHECK-NEXT: [[TMP39:%.*]] = shl i32 [[SHR]], 4
+; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[PSRC]], i32 [[TMP39]]
+; CHECK-NEXT: br label [[WHILE_END]]
+; CHECK: while.end:
+; CHECK-NEXT: [[SUM_0_LCSSA:%.*]] = phi i64 [ 0, [[IF_END]] ], [ [[ADD29_LCSSA]], [[WHILE_END_LOOPEXIT]] ]
+; CHECK-NEXT: [[PSRC_ADDR_0_LCSSA:%.*]] = phi ptr [ [[PSRC]], [[IF_END]] ], [ [[SCEVGEP]], [[WHILE_END_LOOPEXIT]] ]
+; CHECK-NEXT: [[SUMOFSQUARES_0_LCSSA:%.*]] = phi i64 [ 0, [[IF_END]] ], [ [[ADD27_LCSSA]], [[WHILE_END_LOOPEXIT]] ]
+; CHECK-NEXT: [[REM:%.*]] = and i32 [[BLOCKSIZE]], 3
+; CHECK-NEXT: [[CMP31_NOT46:%.*]] = icmp eq i32 [[REM]], 0
+; CHECK-NEXT: br i1 [[CMP31_NOT46]], label [[WHILE_END43:%.*]], label [[VECTOR_BODY61:%.*]]
+; CHECK: vector.body61:
+; CHECK-NEXT: [[ACTIVE_LANE_MASK:%.*]] = tail call <4 x i1> @llvm.get.active.lane.mask.v4i1.i32(i32 0, i32 [[REM]])
+; CHECK-NEXT: [[WIDE_MASKED_LOAD:%.*]] = tail call <4 x i32> @llvm.masked.load.v4i32.p0(ptr align 4 [[PSRC_ADDR_0_LCSSA]], <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i32> poison), !tbaa [[TBAA4]]
+; CHECK-NEXT: [[TMP40:%.*]] = ashr <4 x i32> [[WIDE_MASKED_LOAD]], splat (i32 8)
+; CHECK-NEXT: [[TMP41:%.*]] = sext <4 x i32> [[TMP40]] to <4 x i64>
+; CHECK-NEXT: [[TMP42:%.*]] = mul nsw <4 x i64> [[TMP41]], [[TMP41]]
+; CHECK-NEXT: [[TMP43:%.*]] = select <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i64> [[TMP42]], <4 x i64> zeroinitializer
+; CHECK-NEXT: [[TMP44:%.*]] = tail call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> [[TMP43]])
+; CHECK-NEXT: [[TMP45:%.*]] = add i64 [[SUMOFSQUARES_0_LCSSA]], [[TMP44]]
+; CHECK-NEXT: [[TMP46:%.*]] = select <4 x i1> [[ACTIVE_LANE_MASK]], <4 x i64> [[TMP41]], <4 x i64> zeroinitializer
+; CHECK-NEXT: [[TMP47:%.*]] = tail call i64 @llvm.vector.reduce.add.v4i64(<4 x i64> [[TMP46]])
+; CHECK-NEXT: [[TMP48:%.*]] = add i64 [[SUM_0_LCSSA]], [[TMP47]]
+; CHECK-NEXT: br label [[WHILE_END43]]
+; CHECK: while.end43:
+; CHECK-NEXT: [[SUM_1_LCSSA:%.*]] = phi i64 [ [[SUM_0_LCSSA]], [[WHILE_END]] ], [ [[TMP48]], [[VECTOR_BODY61]] ]
+; CHECK-NEXT: [[SUMOFSQUARES_1_LCSSA:%.*]] = phi i64 [ [[SUMOFSQUARES_0_LCSSA]], [[WHILE_END]] ], [ [[TMP45]], [[VECTOR_BODY61]] ]
+; CHECK-NEXT: [[SUB:%.*]] = add i32 [[BLOCKSIZE]], -1
+; CHECK-NEXT: [[CONV44:%.*]] = zext i32 [[SUB]] to i64
+; CHECK-NEXT: [[DIV:%.*]] = sdiv i64 [[SUMOFSQUARES_1_LCSSA]], [[CONV44]]
+; CHECK-NEXT: [[MUL45:%.*]] = mul nsw i64 [[SUM_1_LCSSA]], [[SUM_1_LCSSA]]
+; CHECK-NEXT: [[MUL47:%.*]] = mul i32 [[SUB]], [[BLOCKSIZE]]
+; CHECK-NEXT: [[CONV48:%.*]] = zext i32 [[MUL47]] to i64
+; CHECK-NEXT: [[DIV49:%.*]] = udiv i64 [[MUL45]], [[CONV48]]
+; CHECK-NEXT: [[SUB50:%.*]] = sub nsw i64 [[DIV]], [[DIV49]]
+; CHECK-NEXT: [[SHR51:%.*]] = lshr i64 [[SUB50]], 15
+; CHECK-NEXT: [[CONV52:%.*]] = trunc i64 [[SHR51]] to i32
+; CHECK-NEXT: br label [[CLEANUP]]
+; CHECK: cleanup:
+; CHECK-NEXT: [[STOREMERGE:%.*]] = phi i32 [ [[CONV52]], [[WHILE_END43]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT: store i32 [[STOREMERGE]], ptr [[PRESULT:%.*]], align 4, !tbaa [[TBAA4]]
+; CHECK-NEXT: ret void
+;
+entry:
+ %pSrc.addr = alloca ptr, align 4
+ %blockSize.addr = alloca i32, align 4
+ %pResult.addr = alloca ptr, align 4
+ %blkCnt = alloca i32, align 4
+ %sum = alloca i64, align 8
+ %meanOfSquares = alloca i64, align 8
+ %squareOfMean = alloca i64, align 8
+ %sumOfSquares = alloca i64, align 8
+ %in = alloca i32, align 4
+ %cleanup.dest.slot = alloca i32, align 4
+ store ptr %pSrc, ptr %pSrc.addr, align 4, !tbaa !8
+ store i32 %blockSize, ptr %blockSize.addr, align 4, !tbaa !4
+ store ptr %pResult, ptr %pResult.addr, align 4, !tbaa !8
+ call void @llvm.lifetime.start.p0(ptr %blkCnt) #2
+ call void @llvm.lifetime.start.p0(ptr %sum) #2
+ store i64 0, ptr %sum, align 8, !tbaa !11
+ call void @llvm.lifetime.start.p0(ptr %meanOfSquares) #2
+ call void @llvm.lifetime.start.p0(ptr %squareOfMean) #2
+ call void @llvm.lifetime.start.p0(ptr %sumOfSquares) #2
+ store i64 0, ptr %sumOfSquares, align 8, !tbaa !11
+ call void @llvm.lifetime.start.p0(ptr %in) #2
+ %0 = load i32, ptr %blockSize.addr, align 4, !tbaa !4
+ %cmp = icmp ule i32 %0, 1
+ br i1 %cmp, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ %1 = load ptr, ptr %pResult.addr, align 4, !tbaa !8
+ store i32 0, ptr %1, align 4, !tbaa !4
+ store i32 1, ptr %cleanup.dest.slot, align 4
+ br label %cleanup
+
+if.end: ; preds = %entry
+ %2 = load i32, ptr %blockSize.addr, align 4, !tbaa !4
+ %shr = lshr i32 %2, 2
+ store i32 %shr, ptr %blkCnt, align 4, !tbaa !4
+ br label %while.cond
+
+while.cond: ; preds = %while.body, %if.end
+ %3 = load i32, ptr %blkCnt, align 4, !tbaa !4
+ %cmp1 = icmp ugt i32 %3, 0
+ br i1 %cmp1, label %while.body, label %while.end
+
+while.body: ; preds = %while.cond
+ %4 = load ptr, ptr %pSrc.addr, align 4, !tbaa !8
+ %incdec.ptr = getelementptr inbounds nuw i32, ptr %4, i32 1
+ store ptr %incdec.ptr, ptr %pSrc.addr, align 4, !tbaa !8
+ %5 = load i32, ptr %4, align 4, !tbaa !4
+ %shr2 = ashr i32 %5, 8
+ store i32 %shr2, ptr %in, align 4, !tbaa !4
+ %6 = load i32, ptr %in, align 4, !tbaa !4
+ %conv = sext i32 %6 to i64
+ %7 = load i32, ptr %in, align 4, !tbaa !4
+ %conv3 = sext i32 %7 to i64
+ %mul = mul nsw i64 %conv, %conv3
+ %8 = load i64, ptr %sumOfSquares, align 8, !tbaa !11
+ %add = add nsw i64 %8, %mul
+ store i64 %add, ptr %sumOfSquares, align 8, !tbaa !11
+ %9 = load i32, ptr %in, align 4, !tbaa !4
+ %conv4 = sext i32 %9 to i64
+ %10 = load i64, ptr %sum, align 8, !tbaa !11
+ %add5 = add nsw i64 %10, %conv4
+ store i64 %add5, ptr %sum, align 8, !tbaa !11
+ %11 = load ptr, ptr %pSrc.addr, align 4, !tbaa !8
+ %incdec.ptr6 = getelementptr inbounds nuw i32, ptr %11, i32 1
+ store ptr %incdec.ptr6, ptr %pSrc.addr, align 4, !tbaa !8
+ %12 = load i32, ptr %11, align 4, !tbaa !4
+ %shr7 = ashr i32 %12, 8
+ store i32 %shr7, ptr %in, align 4, !tbaa !4
+ %13 = load i32, ptr %in, align 4, !tbaa !4
+ %conv8 = sext i32 %13 to i64
+ %14 = load i32, ptr %in, align 4, !tbaa !4
+ %conv9 = sext i32 %14 to i64
+ %mul10 = mul nsw i64 %conv8, %conv9
+ %15 = load i64, ptr %sumOfSquares, align 8, !tbaa !11
+ %add11 = add nsw i64 %15, %mul10
+ store i64 %add11, ptr %sumOfSquares, align 8, !tbaa !11
+ %16 = load i32, ptr %in, align 4, !tbaa !4
+ %conv12 = sext i32 %16 to i64
+ %17 = load i64, ptr %sum, align 8, !tbaa !11
+ %add13 = add nsw i64 %17, %conv12
+ store i64 %add13, ptr %sum, align 8, !tbaa !11
+ %18 = load ptr, ptr %pSrc.addr, align 4, !tbaa !8
+ %incdec.ptr14 = getelementptr inbounds nuw i32, ptr %18, i32 1
+ store ptr %incdec.ptr14, ptr %pSrc.addr, align 4, !tbaa !8
+ %19 = load i32, ptr %18, align 4, !tbaa !4
+ %shr15 = ashr i32 %19, 8
+ store i32 %shr15, ptr %in, align 4, !tbaa !4
+ %20 = load i32, ptr %in, align 4, !tbaa !4
+ %conv16 = sext i32 %20 to i64
+ %21 = load i32, ptr %in, align 4, !tbaa !4
+ %conv17 = sext i32 %21 to i64
+ %mul18 = mul nsw i64 %conv16, %conv17
+ %22 = load i64, ptr %sumOfSquares, align 8, !tbaa !11
+ %add19 = add nsw i64 %22, %mul18
+ store i64 %add19, ptr %sumOfSquares, align 8, !tbaa !11
+ %23 = load i32, ptr %in, align 4, !tbaa !4
+ %conv20 = sext i32 %23 to i64
+ %24 = load i64, ptr %sum, align 8, !tbaa !11
+ %add21 = add nsw i64 %24, %conv20
+ store i64 %add21, ptr %sum, align 8, !tbaa !11
+ %25 = load ptr, ptr %pSrc.addr, align 4, !tbaa !8
+ %incdec.ptr22 = getelementptr inbounds nuw i32, ptr %25, i32 1
+ store ptr %incdec.ptr22, ptr %pSrc.addr, align 4, !tbaa !8
+ %26 = load i32, ptr %25, align 4, !tbaa !4
+ %shr23 = ashr i32 %26, 8
+ store i32 %shr23, ptr %in, align 4, !tbaa !4
+ %27 = load i32, ptr %in, align 4, !tbaa !4
+ %conv24 = sext i32 %27 to i64
+ %28 = load i32, ptr %in, align 4, !tbaa !4
+ %conv25 = sext i32 %28 to i64
+ %mul26 = mul nsw i64 %conv24, %conv25
+ %29 = load i64, ptr %sumOfSquares, align 8, !tbaa !11
+ %add27 = add nsw i64 %29, %mul26
+ store i64 %add27, ptr %sumOfSquares, align 8, !tbaa !11
+ %30 = load i32, ptr %in, align 4, !tbaa !4
+ %conv28 = sext i32 %30 to i64
+ %31 = load i64, ptr %sum, align 8, !tbaa !11
+ %add29 = add nsw i64 %31, %conv28
+ store i64 %add29, ptr %sum, align 8, !tbaa !11
+ %32 = load i32, ptr %blkCnt, align 4, !tbaa !4
+ %dec = add i32 %32, -1
+ store i32 %dec, ptr %blkCnt, align 4, !tbaa !4
+ br label %while.cond, !llvm.loop !13
+
+while.end: ; preds = %while.cond
+ %33 = load i32, ptr %blockSize.addr, align 4, !tbaa !4
+ %rem = urem i32 %33, 4
+ store i32 %rem, ptr %blkCnt, align 4, !tbaa !4
+ br label %while.cond30
+
+while.cond30: ; preds = %while.body33, %while.end
+ %34 = load i32, ptr %blkCnt, align 4, !tbaa !4
+ %cmp31 = icmp ugt i32 %34, 0
+ br i1 %cmp31, label %while.body33, label %while.end43
+
+while.body33: ; preds = %while.cond30
+ %35 = load ptr, ptr %pSrc.addr, align 4, !tbaa !8
+ %incdec.ptr34 = getelementptr inbounds nuw i32, ptr %35, i32 1
+ store ptr %incdec.ptr34, ptr %pSrc.addr, align 4, !tbaa !8
+ %36 = load i32, ptr %35, align 4, !tbaa !4
+ %shr35 = ashr i32 %36, 8
+ store i32 %shr35, ptr %in, align 4, !tbaa !4
+ %37 = load i32, ptr %in, align 4, !tbaa !4
+ %conv36 = sext i32 %37 to i64
+ %38 = load i32, ptr %in, align 4, !tbaa !4
+ %conv37 = sext i32 %38 to i64
+ %mul38 = mul nsw i64 %conv36, %conv37
+ %39 = load i64, ptr %sumOfSquares, align 8, !tbaa !11
+ %add39 = add nsw i64 %39, %mul38
+ store i64 %add39, ptr %sumOfSquares, align 8, !tbaa !11
+ %40 = load i32, ptr %in, align 4, !tbaa !4
+ %conv40 = sext i32 %40 to i64
+ %41 = load i64, ptr %sum, align 8, !tbaa !11
+ %add41 = add nsw i64 %41, %conv40
+ store i64 %add41, ptr %sum, align 8, !tbaa !11
+ %42 = load i32, ptr %blkCnt, align 4, !tbaa !4
+ %dec42 = add i32 %42, -1
+ store i32 %dec42, ptr %blkCnt, align 4, !tbaa !4
+ br label %while.cond30, !llvm.loop !15
+
+while.end43: ; preds = %while.cond30
+ %43 = load i64, ptr %sumOfSquares, align 8, !tbaa !11
+ %44 = load i32, ptr %blockSize.addr, align 4, !tbaa !4
+ %sub = sub i32 %44, 1
+ %conv44 = zext i32 %sub to i64
+ %div = sdiv i64 %43, %conv44
+ store i64 %div, ptr %meanOfSquares, align 8, !tbaa !11
+ %45 = load i64, ptr %sum, align 8, !tbaa !11
+ %46 = load i64, ptr %sum, align 8, !tbaa !11
+ %mul45 = mul nsw i64 %45, %46
+ %47 = load i32, ptr %blockSize.addr, align 4, !tbaa !4
+ %48 = load i32, ptr %blockSize.addr, align 4, !tbaa !4
+ %sub46 = sub i32 %48, 1
+ %mul47 = mul i32 %47, %sub46
+ %conv48 = zext i32 %mul47 to i64
+ %div49 = sdiv i64 %mul45, %conv48
+ store i64 %div49, ptr %squareOfMean, align 8, !tbaa !11
+ %49 = load i64, ptr %meanOfSquares, align 8, !tbaa !11
+ %50 = load i64, ptr %squareOfMean, align 8, !tbaa !11
+ %sub50 = sub nsw i64 %49, %50
+ %shr51 = ashr i64 %sub50, 15
+ %conv52 = trunc i64 %shr51 to i32
+ %51 = load ptr, ptr %pResult.addr, align 4, !tbaa !8
+ store i32 %conv52, ptr %51, align 4, !tbaa !4
+ store i32 0, ptr %cleanup.dest.slot, align 4
+ br label %cleanup
+
+cleanup: ; preds = %while.end43, %if.then
+ call void @llvm.lifetime.end.p0(ptr %in) #2
+ call void @llvm.lifetime.end.p0(ptr %sumOfSquares) #2
+ call void @llvm.lifetime.end.p0(ptr %squareOfMean) #2
+ call void @llvm.lifetime.end.p0(ptr %meanOfSquares) #2
+ call void @llvm.lifetime.end.p0(ptr %sum) #2
+ call void @llvm.lifetime.end.p0(ptr %blkCnt) #2
+ %cleanup.dest = load i32, ptr %cleanup.dest.slot, align 4
+ switch i32 %cleanup.dest, label %unreachable [
+ i32 0, label %cleanup.cont
+ i32 1, label %cleanup.cont
+ ]
+
+cleanup.cont: ; preds = %cleanup, %cleanup
+ ret void
+
+unreachable: ; preds = %cleanup
+ unreachable
+}
+
+attributes #0 = { nounwind "no-signed-zeros-fp-math"="true" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="cortex-m55" "target-features"="+armv8.1-m.main,+dsp,+fp-armv8d16,+fp-armv8d16sp,+fp16,+fp64,+fullfp16,+hwdiv,+lob,+mve,+mve.fp,+ras,+thumb-mode,+vfp2,+vfp2sp,+vfp3d16,+vfp3d16sp,+vfp4d16,+vfp4d16sp,-aes,-bf16,-cdecp0,-cdecp1,-cdecp2,-cdecp3,-cdecp4,-cdecp5,-cdecp6,-cdecp7,-crc,-crypto,-d32,-dotprod,-fp-armv8,-fp-armv8sp,-fp16fml,-hwdiv-arm,-i8mm,-neon,-pacbti,-sb,-sha2,-vfp3,-vfp3sp,-vfp4,-vfp4sp" }
+attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
+attributes #2 = { nounwind }
+
+!llvm.module.flags = !{!0, !1, !2}
+!llvm.ident = !{!3}
+!llvm.errno.tbaa = !{!4}
+
+!0 = !{i32 1, !"min_enum_size", i32 4}
+!1 = !{i32 4, !"arm-eabi-fp-denormal", i32 1}
+!2 = !{i32 8, !"arm-eabi-fp-number-model", i32 1}
+!3 = !{!"clang version 23.0.0git"}
+!4 = !{!5, !5, i64 0}
+!5 = !{!"int", !6, i64 0}
+!6 = !{!"omnipotent char", !7, i64 0}
+!7 = !{!"Simple C/C++ TBAA"}
+!8 = !{!9, !9, i64 0}
+!9 = !{!"p1 int", !10, i64 0}
+!10 = !{!"any pointer", !6, i64 0}
+!11 = !{!12, !12, i64 0}
+!12 = !{!"long long", !6, i64 0}
+!13 = distinct !{!13, !14}
+!14 = !{!"llvm.loop.mustprogress"}
+!15 = distinct !{!15, !14}
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