[llvm] b6accfa - [LV] Regen induction-ptrcasts test with UTC (NFC) (#187678)
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Fri Mar 20 04:58:23 PDT 2026
Author: Ramkumar Ramachandra
Date: 2026-03-20T11:58:19Z
New Revision: b6accfa0b46f692eb62a8ecb88f0bf63e585f26d
URL: https://github.com/llvm/llvm-project/commit/b6accfa0b46f692eb62a8ecb88f0bf63e585f26d
DIFF: https://github.com/llvm/llvm-project/commit/b6accfa0b46f692eb62a8ecb88f0bf63e585f26d.diff
LOG: [LV] Regen induction-ptrcasts test with UTC (NFC) (#187678)
Added:
Modified:
llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll b/llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
index a2e60c46ebf59..4569ea32cfdf8 100644
--- a/llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
+++ b/llvm/test/Transforms/LoopVectorize/induction-ptrcasts.ll
@@ -1,35 +1,73 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --filter-out-after "^scalar.ph" --version 6
; RUN: opt -passes=loop-vectorize -force-vector-width=1 -force-vector-interleave=2 -S %s | FileCheck --check-prefix=VF1 %s
; RUN: opt -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S %s | FileCheck --check-prefix=VF2 %s
@f = external dso_local global i32, align 4
define void @int_iv_based_on_pointer_iv(ptr %A) {
-; VF1-LABEL: @int_iv_based_on_pointer_iv(
-; VF1: vector.body:
-; VF1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
+; VF1-LABEL: define void @int_iv_based_on_pointer_iv(
+; VF1-SAME: ptr [[A:%.*]]) {
+; VF1-NEXT: [[ENTRY:.*:]]
+; VF1-NEXT: [[SMIN:%.*]] = call i64 @llvm.smin.i64(i64 add (i64 ptrtoint (ptr @f to i64), i64 -4), i64 0)
+; VF1-NEXT: [[TMP0:%.*]] = sub i64 add (i64 ptrtoint (ptr @f to i64), i64 -1), [[SMIN]]
+; VF1-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 2
+; VF1-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1
+; VF1-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 2
+; VF1-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; VF1: [[VECTOR_PH]]:
+; VF1-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP2]], 2
+; VF1-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]]
+; VF1-NEXT: [[TMP3:%.*]] = mul i64 [[N_VEC]], 4
+; VF1-NEXT: [[TMP4:%.*]] = mul i64 [[N_VEC]], 4
+; VF1-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr null, i64 [[TMP4]]
+; VF1-NEXT: br label %[[VECTOR_BODY:.*]]
+; VF1: [[VECTOR_BODY]]:
+; VF1-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; VF1-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 4
; VF1-NEXT: [[INDUCTION3:%.*]] = add i64 [[OFFSET_IDX]], 4
-; VF1-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, ptr [[A:%.*]], i64 [[OFFSET_IDX]]
+; VF1-NEXT: [[TMP7:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[OFFSET_IDX]]
; VF1-NEXT: [[TMP8:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[INDUCTION3]]
; VF1-NEXT: store i8 0, ptr [[TMP7]], align 1
; VF1-NEXT: store i8 0, ptr [[TMP8]], align 1
; VF1-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; VF1-NEXT: [[TMP13:%.*]] = icmp eq i64 [[INDEX_NEXT]],
-; VF1-NEXT: br i1 [[TMP13]], label %middle.block, label %vector.body
+; VF1-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
+; VF1-NEXT: br i1 [[TMP9]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; VF1: [[MIDDLE_BLOCK]]:
+; VF1-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]]
+; VF1-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH]]
+; VF1: [[SCALAR_PH]]:
;
-; VF2-LABEL: @int_iv_based_on_pointer_iv(
-; VF2: vector.body:
-; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
+; VF2-LABEL: define void @int_iv_based_on_pointer_iv(
+; VF2-SAME: ptr [[A:%.*]]) {
+; VF2-NEXT: [[ENTRY:.*:]]
+; VF2-NEXT: [[SMIN:%.*]] = call i64 @llvm.smin.i64(i64 add (i64 ptrtoint (ptr @f to i64), i64 -4), i64 0)
+; VF2-NEXT: [[TMP0:%.*]] = sub i64 add (i64 ptrtoint (ptr @f to i64), i64 -1), [[SMIN]]
+; VF2-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 2
+; VF2-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1
+; VF2-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 2
+; VF2-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
+; VF2: [[VECTOR_PH]]:
+; VF2-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP2]], 2
+; VF2-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]]
+; VF2-NEXT: [[TMP3:%.*]] = mul i64 [[N_VEC]], 4
+; VF2-NEXT: [[TMP6:%.*]] = mul i64 [[N_VEC]], 4
+; VF2-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr null, i64 [[TMP6]]
+; VF2-NEXT: br label %[[VECTOR_BODY:.*]]
+; VF2: [[VECTOR_BODY]]:
+; VF2-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
; VF2-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 4
; VF2-NEXT: [[TMP4:%.*]] = add i64 [[OFFSET_IDX]], 4
-; VF2-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A:%.*]], i64 [[OFFSET_IDX]]
+; VF2-NEXT: [[TMP9:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[OFFSET_IDX]]
; VF2-NEXT: [[TMP10:%.*]] = getelementptr inbounds i8, ptr [[A]], i64 [[TMP4]]
; VF2-NEXT: store i8 0, ptr [[TMP9]], align 1
; VF2-NEXT: store i8 0, ptr [[TMP10]], align 1
; VF2-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; VF2-NEXT: [[TMP14:%.*]] = icmp eq i64 [[INDEX_NEXT]],
-; VF2-NEXT: br i1 [[TMP14]], label %middle.block, label %vector.body
+; VF2-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
+; VF2-NEXT: br i1 [[TMP11]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
+; VF2: [[MIDDLE_BLOCK]]:
+; VF2-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]]
+; VF2-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH]]
+; VF2: [[SCALAR_PH]]:
;
entry:
br label %loop
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