[llvm] [AMDGPU] Add basic verification for source modifiers in VOP3/VOP3P instructions (PR #186733)

[Lleu Yang via llvm-commits]

megakite wrote:

@arsenm @jayfoad After putting immediate check inside `switch (OpInfo.OperandType)` cases:
```cpp
    case AMDGPU::OPERAND_INPUT_MODS:
      if (!MI.getOperand(i).isImm()) {
        ErrInfo = "Expected immediate, but got non-immediate";
        return false;
      }
      break;
```
I got the following error message when running tests on llvm/test/CodeGen/AMDGPU/convergent.mir:
<details>

<summary>Error message</summary>

```
# .---command stderr------------
# | 
# | # Machine code for function test_V_DOT2C_F32_BF16_dpp_vi: IsSSA, NoPHIs, TracksLiveness
# | 
# | bb.0:
# |   successors: %bb.2(0x40000000), %bb.1(0x40000000); %bb.2(50.00%), %bb.1(50.00%)
# | 
# |   %0:vgpr_32 = IMPLICIT_DEF
# |   %1:sreg_32 = IMPLICIT_DEF
# |   %2:vgpr_32 = V_DOT2C_F32_BF16_dpp_vi 8, %0:vgpr_32, %0:vgpr_32, %0:vgpr_32, %0:vgpr_32(tied-def 0), 0, 0, 0, 0, implicit $exec, implicit $mode
# |   %3:sreg_32 = SI_IF %1:sreg_32, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
# |   S_BRANCH %bb.1
# | 
# | bb.1:
# | ; predecessors: %bb.0
# |   successors: %bb.2(0x80000000); %bb.2(100.00%)
# | 
# |   %4:vgpr_32 = COPY %2:vgpr_32
# | 
# | bb.2:
# | ; predecessors: %bb.0, %bb.1
# | 
# |   SI_END_CF %3:sreg_32, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
# |   S_ENDPGM 0
# | 
# | # End machine code for function test_V_DOT2C_F32_BF16_dpp_vi.
# | 
# | *** Bad machine code: Expected immediate, but got non-immediate ***
# | - function:    test_V_DOT2C_F32_BF16_dpp_vi
# | - basic block: %bb.0  (0x5a2b4f9809d8)
# | - instruction: %2:vgpr_32 = V_DOT2C_F32_BF16_dpp_vi 8, %0:vgpr_32, %0:vgpr_32, %0:vgpr_32, %0:vgpr_32(tied-def 0), 0, 0, 0, 0, implicit $exec, implicit $mode
# | LLVM ERROR: Found 1 machine code errors.
```

</details>

Is this the expected behavior? I've also checked other tests for DPP instructions inside convergent.mir, and they all would fail with the same error message above.

https://github.com/llvm/llvm-project/blob/19ced5ad8248b271b56bb7a1fe6e89471716009f/llvm/test/CodeGen/AMDGPU/convergent.mir#L500-L683

https://github.com/llvm/llvm-project/pull/186733