[llvm] [AMDGPU] Rename AMDGPUMachineFunction to AMDGPUMachineFunctionInfo. NFC. (PR #187276)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 18 06:53:08 PDT 2026
https://github.com/jayfoad created https://github.com/llvm/llvm-project/pull/187276
This is derived from MachineFunctionInfo not MachineFunction.
>From d297ffb45549ec913e329ca0e68adbc97ae0e3e8 Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad at amd.com>
Date: Wed, 18 Mar 2026 13:37:17 +0000
Subject: [PATCH] [AMDGPU] Rename AMDGPUMachineFunction to
AMDGPUMachineFunctionInfo. NFC.
This is derived from MachineFunctionInfo not MachineFunction.
---
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 5 +--
llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 4 +--
llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 2 +-
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 9 +++---
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 4 +--
.../lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 2 +-
.../AMDGPU/AMDGPULowerModuleLDSPass.cpp | 4 +--
llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 4 +--
...tion.cpp => AMDGPUMachineFunctionInfo.cpp} | 26 ++++++++-------
...Function.h => AMDGPUMachineFunctionInfo.h} | 32 ++++++-------------
llvm/lib/Target/AMDGPU/CMakeLists.txt | 2 +-
llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 2 +-
llvm/lib/Target/AMDGPU/R600ISelLowering.h | 2 +-
.../Target/AMDGPU/R600MachineFunctionInfo.cpp | 2 +-
.../Target/AMDGPU/R600MachineFunctionInfo.h | 4 +--
llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 6 ++--
llvm/lib/Target/AMDGPU/SIISelLowering.h | 2 +-
.../Target/AMDGPU/SIMachineFunctionInfo.cpp | 12 +++----
.../lib/Target/AMDGPU/SIMachineFunctionInfo.h | 4 +--
.../secondary/llvm/lib/Target/AMDGPU/BUILD.gn | 2 +-
20 files changed, 61 insertions(+), 69 deletions(-)
rename llvm/lib/Target/AMDGPU/{AMDGPUMachineFunction.cpp => AMDGPUMachineFunctionInfo.cpp} (90%)
rename llvm/lib/Target/AMDGPU/{AMDGPUMachineFunction.h => AMDGPUMachineFunctionInfo.h} (86%)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index ebd26350263ff..8bb45cd1ae618 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -561,7 +561,7 @@ SmallString<128> AMDGPUAsmPrinter::getMCExprStr(const MCExpr *Value) {
void AMDGPUAsmPrinter::emitCommonFunctionComments(
const MCExpr *NumVGPR, const MCExpr *NumAGPR, const MCExpr *TotalNumVGPR,
const MCExpr *NumSGPR, const MCExpr *ScratchSize, uint64_t CodeSize,
- const AMDGPUMachineFunction *MFI) {
+ const AMDGPUMachineFunctionInfo *MFI) {
OutStreamer->emitRawComment(" codeLenInByte = " + Twine(CodeSize), false);
OutStreamer->emitRawComment(" TotalNumSgprs: " + getMCExprStr(NumSGPR),
false);
@@ -681,7 +681,8 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
&getAnalysis<AMDGPUResourceUsageAnalysisWrapperPass>().getResourceInfo();
CurrentProgramInfo.reset(MF);
- const AMDGPUMachineFunction *MFI = MF.getInfo<AMDGPUMachineFunction>();
+ const AMDGPUMachineFunctionInfo *MFI =
+ MF.getInfo<AMDGPUMachineFunctionInfo>();
MCContext &Ctx = MF.getContext();
// The starting address of all shader programs must be 256 bytes aligned.
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
index 9e854fa554672..f0ab2c06713a6 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h
@@ -20,7 +20,7 @@
namespace llvm {
-class AMDGPUMachineFunction;
+class AMDGPUMachineFunctionInfo;
class AMDGPUResourceUsageAnalysis;
class AMDGPUTargetStreamer;
class MCCodeEmitter;
@@ -73,7 +73,7 @@ class AMDGPUAsmPrinter final : public AsmPrinter {
const MCExpr *TotalNumVGPR,
const MCExpr *NumSGPR,
const MCExpr *ScratchSize, uint64_t CodeSize,
- const AMDGPUMachineFunction *MFI);
+ const AMDGPUMachineFunctionInfo *MFI);
void emitResourceUsageRemarks(const MachineFunction &MF,
const SIProgramInfo &CurrentProgramInfo,
bool isModuleEntryFunction, bool hasMAIInsts);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
index 47d12af3e1bdb..9ae28a6528dc5 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
@@ -901,7 +901,7 @@ bool AMDGPUCallLowering::passSpecialInputs(MachineIRBuilder &MIRBuilder,
LI->getImplicitArgPtr(InputReg, MRI, MIRBuilder);
} else if (InputID == AMDGPUFunctionArgInfo::LDS_KERNEL_ID) {
std::optional<uint32_t> Id =
- AMDGPUMachineFunction::getLDSKernelIdMetadata(MF.getFunction());
+ AMDGPUMachineFunctionInfo::getLDSKernelIdMetadata(MF.getFunction());
if (Id) {
MIRBuilder.buildConstant(InputReg, *Id);
} else {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
index 752ac6df358be..c6622274bdf62 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
@@ -15,7 +15,7 @@
#include "AMDGPUISelLowering.h"
#include "AMDGPU.h"
#include "AMDGPUInstrInfo.h"
-#include "AMDGPUMachineFunction.h"
+#include "AMDGPUMachineFunctionInfo.h"
#include "AMDGPUMemoryUtils.h"
#include "AMDGPUSelectionDAGInfo.h"
#include "SIMachineFunctionInfo.h"
@@ -1518,7 +1518,7 @@ void AMDGPUTargetLowering::ReplaceNodeResults(SDNode *N,
}
}
-SDValue AMDGPUTargetLowering::LowerGlobalAddress(AMDGPUMachineFunction* MFI,
+SDValue AMDGPUTargetLowering::LowerGlobalAddress(AMDGPUMachineFunctionInfo *MFI,
SDValue Op,
SelectionDAG &DAG) const {
@@ -1529,7 +1529,7 @@ SDValue AMDGPUTargetLowering::LowerGlobalAddress(AMDGPUMachineFunction* MFI,
if (!MFI->isModuleEntryFunction()) {
auto IsNamedBarrier = AMDGPU::isNamedBarrier(*cast<GlobalVariable>(GV));
if (std::optional<uint32_t> Address =
- AMDGPUMachineFunction::getLDSAbsoluteAddress(*GV)) {
+ AMDGPUMachineFunctionInfo::getLDSAbsoluteAddress(*GV)) {
if (IsNamedBarrier) {
unsigned BarCnt = cast<GlobalVariable>(GV)->getGlobalSize(DL) / 16;
MFI->recordNumNamedBarriers(Address.value(), BarCnt);
@@ -5894,7 +5894,8 @@ uint32_t AMDGPUTargetLowering::getImplicitParameterOffset(
uint32_t AMDGPUTargetLowering::getImplicitParameterOffset(
const MachineFunction &MF, const ImplicitParameter Param) const {
- const AMDGPUMachineFunction *MFI = MF.getInfo<AMDGPUMachineFunction>();
+ const AMDGPUMachineFunctionInfo *MFI =
+ MF.getInfo<AMDGPUMachineFunctionInfo>();
return getImplicitParameterOffset(MFI->getExplicitKernArgSize(), Param);
}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
index 6401e4bdb7ea2..433c293192642 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
@@ -20,7 +20,7 @@
namespace llvm {
-class AMDGPUMachineFunction;
+class AMDGPUMachineFunctionInfo;
class AMDGPUSubtarget;
struct ArgDescriptor;
@@ -145,7 +145,7 @@ class AMDGPUTargetLowering : public TargetLowering {
static EVT getEquivalentMemType(LLVMContext &Context, EVT VT);
- virtual SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
+ virtual SDValue LowerGlobalAddress(AMDGPUMachineFunctionInfo *MFI, SDValue Op,
SelectionDAG &DAG) const;
/// Return 64-bit value Op as two 32-bit integers.
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index 4d00c44bf4f5e..b3d80a8d12e6b 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -6300,7 +6300,7 @@ bool AMDGPULegalizerInfo::getLDSKernelId(Register DstReg,
MachineIRBuilder &B) const {
Function &F = B.getMF().getFunction();
std::optional<uint32_t> KnownSize =
- AMDGPUMachineFunction::getLDSKernelIdMetadata(F);
+ AMDGPUMachineFunctionInfo::getLDSKernelIdMetadata(F);
if (KnownSize.has_value())
B.buildConstant(DstReg, *KnownSize);
return false;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp b/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
index 502f77d1dba63..a30cb8ca0240a 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
@@ -1023,7 +1023,7 @@ class AMDGPULowerModuleLDS {
continue;
// All three of these are optional. The first variable is allocated at
- // zero. They are allocated by AMDGPUMachineFunction as one block.
+ // zero. They are allocated by AMDGPUMachineFunctionInfo as one block.
// Layout:
//{
// module.lds
@@ -1277,7 +1277,7 @@ class AMDGPULowerModuleLDS {
}
// Replace uses of ith variable with a constantexpr to the corresponding
- // field of the instance that will be allocated by AMDGPUMachineFunction
+ // field of the instance that will be allocated by AMDGPUMachineFunctionInfo
for (size_t I = 0; I < NumberVars; I++) {
GlobalVariable *GV = LDSVarsToTransform[I];
Constant *GEP = Replacement.LDSVarsToConstantGEP.at(GV);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
index a4956c4ac2b2e..9fb7bba4b22cc 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
@@ -15,7 +15,7 @@
#include "AMDGPUMCInstLower.h"
#include "AMDGPU.h"
#include "AMDGPUAsmPrinter.h"
-#include "AMDGPUMachineFunction.h"
+#include "AMDGPUMachineFunctionInfo.h"
#include "MCTargetDesc/AMDGPUInstPrinter.h"
#include "MCTargetDesc/AMDGPUMCExpr.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
@@ -276,7 +276,7 @@ const MCExpr *AMDGPUAsmPrinter::lowerConstant(const Constant *CV,
// Intercept LDS variables with known addresses
if (const GlobalVariable *GV = dyn_cast<const GlobalVariable>(CV)) {
if (std::optional<uint32_t> Address =
- AMDGPUMachineFunction::getLDSAbsoluteAddress(*GV)) {
+ AMDGPUMachineFunctionInfo::getLDSAbsoluteAddress(*GV)) {
auto *IntTy = Type::getInt32Ty(CV->getContext());
return AsmPrinter::lowerConstant(ConstantInt::get(IntTy, *Address),
BaseCV, Offset);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
similarity index 90%
rename from llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
rename to llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
index 1730757c3d573..3e8a75a7eb840 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
@@ -6,7 +6,7 @@
//
//===----------------------------------------------------------------------===//
-#include "AMDGPUMachineFunction.h"
+#include "AMDGPUMachineFunctionInfo.h"
#include "AMDGPU.h"
#include "AMDGPUMemoryUtils.h"
#include "AMDGPUSubtarget.h"
@@ -39,8 +39,8 @@ static bool hasLDSKernelArgument(const Function &F) {
return false;
}
-AMDGPUMachineFunction::AMDGPUMachineFunction(const Function &F,
- const AMDGPUSubtarget &ST)
+AMDGPUMachineFunctionInfo::AMDGPUMachineFunctionInfo(const Function &F,
+ const AMDGPUSubtarget &ST)
: IsEntryFunction(AMDGPU::isEntryFunctionCC(F.getCallingConv())),
IsModuleEntryFunction(
AMDGPU::isModuleEntryFunctionCC(F.getCallingConv())),
@@ -85,9 +85,9 @@ AMDGPUMachineFunction::AMDGPUMachineFunction(const Function &F,
UsesDynamicLDS = true;
}
-unsigned AMDGPUMachineFunction::allocateLDSGlobal(const DataLayout &DL,
- const GlobalVariable &GV,
- Align Trailing) {
+unsigned AMDGPUMachineFunctionInfo::allocateLDSGlobal(const DataLayout &DL,
+ const GlobalVariable &GV,
+ Align Trailing) {
auto Entry = LocalMemoryObjects.insert(std::pair(&GV, 0));
if (!Entry.second)
return Entry.first->second;
@@ -166,7 +166,7 @@ unsigned AMDGPUMachineFunction::allocateLDSGlobal(const DataLayout &DL,
}
std::optional<uint32_t>
-AMDGPUMachineFunction::getLDSKernelIdMetadata(const Function &F) {
+AMDGPUMachineFunctionInfo::getLDSKernelIdMetadata(const Function &F) {
// TODO: Would be more consistent with the abs symbols to use a range
MDNode *MD = F.getMetadata("llvm.amdgcn.lds.kernel.id");
if (MD && MD->getNumOperands() == 1) {
@@ -182,7 +182,7 @@ AMDGPUMachineFunction::getLDSKernelIdMetadata(const Function &F) {
}
std::optional<uint32_t>
-AMDGPUMachineFunction::getLDSAbsoluteAddress(const GlobalValue &GV) {
+AMDGPUMachineFunctionInfo::getLDSAbsoluteAddress(const GlobalValue &GV) {
if (GV.getAddressSpace() != AMDGPUAS::LOCAL_ADDRESS)
return {};
@@ -200,8 +200,8 @@ AMDGPUMachineFunction::getLDSAbsoluteAddress(const GlobalValue &GV) {
return {};
}
-void AMDGPUMachineFunction::setDynLDSAlign(const Function &F,
- const GlobalVariable &GV) {
+void AMDGPUMachineFunctionInfo::setDynLDSAlign(const Function &F,
+ const GlobalVariable &GV) {
const Module *M = F.getParent();
const DataLayout &DL = M->getDataLayout();
assert(GV.getGlobalSize(DL) == 0);
@@ -228,8 +228,10 @@ void AMDGPUMachineFunction::setDynLDSAlign(const Function &F,
}
}
-void AMDGPUMachineFunction::setUsesDynamicLDS(bool DynLDS) {
+void AMDGPUMachineFunctionInfo::setUsesDynamicLDS(bool DynLDS) {
UsesDynamicLDS = DynLDS;
}
-bool AMDGPUMachineFunction::isDynamicLDSUsed() const { return UsesDynamicLDS; }
+bool AMDGPUMachineFunctionInfo::isDynamicLDSUsed() const {
+ return UsesDynamicLDS;
+}
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.h
similarity index 86%
rename from llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h
rename to llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.h
index 5e5ad3dbd713a..36db6c2dd0d12 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.h
@@ -21,14 +21,14 @@ namespace llvm {
class AMDGPUSubtarget;
-class AMDGPUMachineFunction : public MachineFunctionInfo {
+class AMDGPUMachineFunctionInfo : public MachineFunctionInfo {
/// A map to keep track of local memory objects and their offsets within the
/// local memory space.
SmallDenseMap<const GlobalValue *, unsigned, 4> LocalMemoryObjects;
protected:
uint64_t ExplicitKernArgSize = 0; // Cache for this.
- Align MaxKernArgAlign; // Cache for this.
+ Align MaxKernArgAlign; // Cache for this.
/// Number of bytes in the LDS that are being used.
uint32_t LDSSize = 0;
@@ -70,21 +70,15 @@ class AMDGPUMachineFunction : public MachineFunctionInfo {
bool HasInitWholeWave = false;
public:
- AMDGPUMachineFunction(const Function &F, const AMDGPUSubtarget &ST);
+ AMDGPUMachineFunctionInfo(const Function &F, const AMDGPUSubtarget &ST);
- uint64_t getExplicitKernArgSize() const {
- return ExplicitKernArgSize;
- }
+ uint64_t getExplicitKernArgSize() const { return ExplicitKernArgSize; }
Align getMaxKernArgAlign() const { return MaxKernArgAlign; }
- uint32_t getLDSSize() const {
- return LDSSize;
- }
+ uint32_t getLDSSize() const { return LDSSize; }
- uint32_t getGDSSize() const {
- return GDSSize;
- }
+ uint32_t getGDSSize() const { return GDSSize; }
void recordNumNamedBarriers(uint32_t GVAddr, unsigned BarCnt) {
NumNamedBarriers =
@@ -92,9 +86,7 @@ class AMDGPUMachineFunction : public MachineFunctionInfo {
}
uint32_t getNumNamedBarriers() const { return NumNamedBarriers; }
- bool isEntryFunction() const {
- return IsEntryFunction;
- }
+ bool isEntryFunction() const { return IsEntryFunction; }
bool isModuleEntryFunction() const { return IsModuleEntryFunction; }
@@ -103,13 +95,9 @@ class AMDGPUMachineFunction : public MachineFunctionInfo {
// The stack is empty upon entry to this function.
bool isBottomOfStack() const { return isEntryFunction(); }
- bool isMemoryBound() const {
- return MemoryBound;
- }
+ bool isMemoryBound() const { return MemoryBound; }
- bool needsWaveLimiter() const {
- return WaveLimiter;
- }
+ bool needsWaveLimiter() const { return WaveLimiter; }
bool hasInitWholeWave() const { return HasInitWholeWave; }
void setInitWholeWave() { HasInitWholeWave = true; }
@@ -133,5 +121,5 @@ class AMDGPUMachineFunction : public MachineFunctionInfo {
bool isDynamicLDSUsed() const;
};
-}
+} // namespace llvm
#endif
diff --git a/llvm/lib/Target/AMDGPU/CMakeLists.txt b/llvm/lib/Target/AMDGPU/CMakeLists.txt
index ae684a58cfd26..65603ea3d7ccf 100644
--- a/llvm/lib/Target/AMDGPU/CMakeLists.txt
+++ b/llvm/lib/Target/AMDGPU/CMakeLists.txt
@@ -81,7 +81,7 @@ add_llvm_target(AMDGPUCodeGen
AMDGPUPrepareAGPRAlloc.cpp
AMDGPULowerExecSync.cpp
AMDGPUSwLowerLDS.cpp
- AMDGPUMachineFunction.cpp
+ AMDGPUMachineFunctionInfo.cpp
AMDGPUMachineModuleInfo.cpp
AMDGPUMacroFusion.cpp
AMDGPUMCInstLower.cpp
diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
index 550d05b389de7..4ebe154166b3f 100644
--- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
@@ -672,7 +672,7 @@ SDValue R600TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,
return vectorToVerticalVector(DAG, Insert);
}
-SDValue R600TargetLowering::LowerGlobalAddress(AMDGPUMachineFunction *MFI,
+SDValue R600TargetLowering::LowerGlobalAddress(AMDGPUMachineFunctionInfo *MFI,
SDValue Op,
SelectionDAG &DAG) const {
GlobalAddressSDNode *GSD = cast<GlobalAddressSDNode>(Op);
diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.h b/llvm/lib/Target/AMDGPU/R600ISelLowering.h
index 661efb8684813..9559cf883dd10 100644
--- a/llvm/lib/Target/AMDGPU/R600ISelLowering.h
+++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.h
@@ -81,7 +81,7 @@ class R600TargetLowering final : public AMDGPUTargetLowering {
SDValue lowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
- SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
+ SDValue LowerGlobalAddress(AMDGPUMachineFunctionInfo *MFI, SDValue Op,
SelectionDAG &DAG) const override;
SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
diff --git a/llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.cpp
index 4254cd3c2008a..452c5bf2f8cef 100644
--- a/llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.cpp
@@ -14,4 +14,4 @@ using namespace llvm;
R600MachineFunctionInfo::R600MachineFunctionInfo(const Function &F,
const R600Subtarget *STI)
- : AMDGPUMachineFunction(F, *STI) {}
+ : AMDGPUMachineFunctionInfo(F, *STI) {}
diff --git a/llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.h b/llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.h
index a8abf56f52baf..09eeb5d522a01 100644
--- a/llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.h
+++ b/llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.h
@@ -12,13 +12,13 @@
#ifndef LLVM_LIB_TARGET_AMDGPU_R600MACHINEFUNCTIONINFO_H
#define LLVM_LIB_TARGET_AMDGPU_R600MACHINEFUNCTIONINFO_H
-#include "AMDGPUMachineFunction.h"
+#include "AMDGPUMachineFunctionInfo.h"
namespace llvm {
class R600Subtarget;
-class R600MachineFunctionInfo final : public AMDGPUMachineFunction {
+class R600MachineFunctionInfo final : public AMDGPUMachineFunctionInfo {
public:
R600MachineFunctionInfo(const Function &F, const R600Subtarget *STI);
unsigned CFStackSize;
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 2b1bd578ab456..a2de39862b62d 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -2384,7 +2384,7 @@ SDValue SITargetLowering::getLDSKernelId(SelectionDAG &DAG,
Function &F = DAG.getMachineFunction().getFunction();
std::optional<uint32_t> KnownSize =
- AMDGPUMachineFunction::getLDSKernelIdMetadata(F);
+ AMDGPUMachineFunctionInfo::getLDSKernelIdMetadata(F);
if (KnownSize.has_value())
return DAG.getConstant(*KnownSize, SL, MVT::i32);
return SDValue();
@@ -3931,7 +3931,7 @@ void SITargetLowering::passSpecialInputs(
InputReg = getImplicitArgPtr(DAG, DL);
} else if (InputID == AMDGPUFunctionArgInfo::LDS_KERNEL_ID) {
std::optional<uint32_t> Id =
- AMDGPUMachineFunction::getLDSKernelIdMetadata(F);
+ AMDGPUMachineFunctionInfo::getLDSKernelIdMetadata(F);
if (Id.has_value()) {
InputReg = DAG.getConstant(*Id, DL, ArgVT);
} else {
@@ -9457,7 +9457,7 @@ buildPCRelGlobalAddress(SelectionDAG &DAG, const GlobalValue *GV,
return DAG.getNode(AMDGPUISD::PC_ADD_REL_OFFSET, DL, PtrVT, PtrLo, PtrHi);
}
-SDValue SITargetLowering::LowerGlobalAddress(AMDGPUMachineFunction *MFI,
+SDValue SITargetLowering::LowerGlobalAddress(AMDGPUMachineFunctionInfo *MFI,
SDValue Op,
SelectionDAG &DAG) const {
GlobalAddressSDNode *GSD = cast<GlobalAddressSDNode>(Op);
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h
index fc6f70968a92d..e37bd938dc35d 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h
@@ -77,7 +77,7 @@ class SITargetLowering final : public AMDGPUTargetLowering {
EVT VT,
AMDGPUFunctionArgInfo::PreloadedValue) const;
- SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
+ SDValue LowerGlobalAddress(AMDGPUMachineFunctionInfo *MFI, SDValue Op,
SelectionDAG &DAG) const override;
SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
index 32efae69b20c8..2aec8aaf9b613 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
@@ -49,12 +49,12 @@ bool SIMachineFunctionInfo::MFMAVGPRForm = false;
SIMachineFunctionInfo::SIMachineFunctionInfo(const Function &F,
const GCNSubtarget *STI)
- : AMDGPUMachineFunction(F, *STI), Mode(F, *STI), GWSResourcePSV(getTM(STI)),
- UserSGPRInfo(F, *STI), WorkGroupIDX(false), WorkGroupIDY(false),
- WorkGroupIDZ(false), WorkGroupInfo(false), LDSKernelId(false),
- PrivateSegmentWaveByteOffset(false), WorkItemIDX(false),
- WorkItemIDY(false), WorkItemIDZ(false), ImplicitArgPtr(false),
- GITPtrHigh(0xffffffff), HighBitsOf32BitAddress(0),
+ : AMDGPUMachineFunctionInfo(F, *STI), Mode(F, *STI),
+ GWSResourcePSV(getTM(STI)), UserSGPRInfo(F, *STI), WorkGroupIDX(false),
+ WorkGroupIDY(false), WorkGroupIDZ(false), WorkGroupInfo(false),
+ LDSKernelId(false), PrivateSegmentWaveByteOffset(false),
+ WorkItemIDX(false), WorkItemIDY(false), WorkItemIDZ(false),
+ ImplicitArgPtr(false), GITPtrHigh(0xffffffff), HighBitsOf32BitAddress(0),
IsWholeWaveFunction(F.getCallingConv() ==
CallingConv::AMDGPU_Gfx_WholeWave) {
const GCNSubtarget &ST = *STI;
diff --git a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
index 617862db8f506..50e92424e570f 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
@@ -14,7 +14,7 @@
#define LLVM_LIB_TARGET_AMDGPU_SIMACHINEFUNCTIONINFO_H
#include "AMDGPUArgumentUsageInfo.h"
-#include "AMDGPUMachineFunction.h"
+#include "AMDGPUMachineFunctionInfo.h"
#include "AMDGPUTargetMachine.h"
#include "GCNSubtarget.h"
#include "MCTargetDesc/AMDGPUMCTargetDesc.h"
@@ -411,7 +411,7 @@ struct VGPRBlock2IndexFunctor {
/// This class keeps track of the SPI_SP_INPUT_ADDR config register, which
/// tells the hardware which interpolation parameters to load.
-class SIMachineFunctionInfo final : public AMDGPUMachineFunction,
+class SIMachineFunctionInfo final : public AMDGPUMachineFunctionInfo,
private MachineRegisterInfo::Delegate {
friend class GCNTargetMachine;
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
index 00c98383a5440..c57842b4a1768 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
@@ -172,7 +172,7 @@ static_library("LLVMAMDGPUCodeGen") {
"AMDGPUMCInstLower.cpp",
"AMDGPUMCResourceInfo.cpp",
"AMDGPUMIRFormatter.cpp",
- "AMDGPUMachineFunction.cpp",
+ "AMDGPUMachineFunctionInfo.cpp",
"AMDGPUMachineModuleInfo.cpp",
"AMDGPUMacroFusion.cpp",
"AMDGPUMarkLastScratchLoad.cpp",
More information about the llvm-commits
mailing list