[llvm] [AArch64] Use SVE/NEON FMLAL top/bottom instructions (PR #186798)

Paul Walker via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 17 03:53:18 PDT 2026


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@@ -1824,6 +1824,13 @@ defm FMLALlane  : SIMDThreeSameVectorFMLIndex<0, 0b0000, "fmlal", int_aarch64_ne
 defm FMLSLlane  : SIMDThreeSameVectorFMLIndex<0, 0b0100, "fmlsl", int_aarch64_neon_fmlsl>;
 defm FMLAL2lane : SIMDThreeSameVectorFMLIndex<1, 0b1000, "fmlal2", int_aarch64_neon_fmlal2>;
 defm FMLSL2lane : SIMDThreeSameVectorFMLIndex<1, 0b1100, "fmlsl2", int_aarch64_neon_fmlsl2>;
+
+def : Pat<(v2f32 (partial_reduce_fmla v2f32:$acc, v4f16:$LHS, v4f16:$RHS)),
+          (FMLAL2v4f16 (FMLALv4f16 v2f32:$acc, V64:$LHS, V64:$RHS),
+              V64:$LHS, V64:$RHS)>;
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paulwalker-arm wrote:

This should be able to use a single `FMLALv8f16` instructions because it only operates on the bottom half of the input vectors?

https://github.com/llvm/llvm-project/pull/186798


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