[llvm] [X86][test] Auto-generate test checks for some cfi tests. (PR #177248)
Mikhail Gudim via llvm-commits
llvm-commits at lists.llvm.org
Sat Jan 31 03:01:05 PST 2026
https://github.com/mgudim updated https://github.com/llvm/llvm-project/pull/177248
>From ca02ff105f983bc2f519dae4d11e2aad00c913f9 Mon Sep 17 00:00:00 2001
From: Mikhail Gudim <mgudim at qti.qualcomm.com>
Date: Wed, 21 Jan 2026 13:28:41 -0800
Subject: [PATCH 1/7] [X86][test] Auto-generate test checks for some cfi tests.
---
.../CodeGen/X86/cfi-basic-block-sections-1.ll | 1 +
.../CodeGen/X86/cfi-epilogue-with-return.mir | 59 +++++++++++--
.../X86/cfi-epilogue-without-return.mir | 69 ++++++++++++---
...ic-block-sections-callee-save-registers.ll | 1 +
.../cfi-inserter-callee-save-register-2.mir | 88 ++++++++++++++++---
.../X86/cfi-inserter-callee-save-register.mir | 28 +++++-
.../X86/cfi-inserter-cfg-with-merge.mir | 1 +
.../CodeGen/X86/cfi-inserter-check-order.ll | 1 +
.../X86/cfi-inserter-noreturnblock.mir | 1 +
.../cfi-inserter-verify-inconsistent-csr.mir | 1 +
.../cfi-inserter-verify-inconsistent-loc.mir | 1 +
...fi-inserter-verify-inconsistent-offset.mir | 1 +
...-inserter-verify-inconsistent-register.mir | 1 +
llvm/test/CodeGen/X86/cfi-xmm.ll | 16 ++++
llvm/test/CodeGen/X86/cfi.ll | 1 +
15 files changed, 234 insertions(+), 36 deletions(-)
diff --git a/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll b/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll
index 1b7cf85f16579..1cc862a40b9fe 100644
--- a/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll
+++ b/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
; RUN: llc -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=asm --frame-pointer=all -o - | FileCheck --check-prefix=SECTIONS_CFI %s
; RUN: llc -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=asm --frame-pointer=none -o - | FileCheck --check-prefix=SECTIONS_NOFP_CFI %s
; RUN: llc -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=obj --frame-pointer=all -o - | llvm-dwarfdump --eh-frame - | FileCheck --check-prefix=EH_FRAME %s
diff --git a/llvm/test/CodeGen/X86/cfi-epilogue-with-return.mir b/llvm/test/CodeGen/X86/cfi-epilogue-with-return.mir
index 4f80f4f87dd0d..43b394721b5c9 100644
--- a/llvm/test/CodeGen/X86/cfi-epilogue-with-return.mir
+++ b/llvm/test/CodeGen/X86/cfi-epilogue-with-return.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -o - %s -mtriple=x86_64-- -run-pass=prologepilog 2>&1 | FileCheck %s
--- |
define i64 @_Z3foob(i1 zeroext %cond) #0 {
@@ -8,11 +9,6 @@
---
# If the epilogue bb.1 is a return block, no .cfi_restore is
# needed in it.
-# CHECK: bb.1:
-# CHECK-NOT: CFI_INSTRUCTION restore
-# CHECK: RET 0
-# CHECK: bb.2:
-# CHECK: RET 0
name: _Z3foob
alignment: 16
tracksRegLiveness: true
@@ -27,13 +23,60 @@ frameInfo:
- point: '%bb.1'
machineFunctionInfo: {}
body: |
+ ; CHECK-LABEL: name: _Z3foob
+ ; CHECK: bb.0:
+ ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
+ ; CHECK-NEXT: liveins: $edi, $rbx, $r12, $r13, $r14, $r15
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: TEST8rr renamable $dil, renamable $dil, implicit-def $eflags, implicit killed $edi
+ ; CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
+ ; CHECK-NEXT: JMP_1 %bb.1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: liveins: $r15, $r14, $r13, $r12, $rbx
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $rbp, -16
+ ; CHECK-NEXT: $rbp = frame-setup MOV64rr $rsp
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $rbp
+ ; CHECK-NEXT: frame-setup PUSH64r killed $r15, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: frame-setup PUSH64r killed $r14, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: frame-setup PUSH64r killed $r13, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: frame-setup PUSH64r killed $r12, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $rbx, -56
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $r12, -48
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $r13, -40
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $r14, -32
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $r15, -24
+ ; CHECK-NEXT: renamable $rbx = IMPLICIT_DEF
+ ; CHECK-NEXT: renamable $r14 = IMPLICIT_DEF
+ ; CHECK-NEXT: renamable $r15 = IMPLICIT_DEF
+ ; CHECK-NEXT: renamable $r12 = IMPLICIT_DEF
+ ; CHECK-NEXT: renamable $r13 = IMPLICIT_DEF
+ ; CHECK-NEXT: dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def $rax
+ ; CHECK-NEXT: $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $r12 = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $r13 = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $r15 = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa $rsp, 8
+ ; CHECK-NEXT: RET 0, killed $rax
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: liveins: $rbx, $r12, $r13, $r14, $r15
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def $rax
+ ; CHECK-NEXT: RET 0, killed $rax
bb.0:
liveins: $edi
-
+
TEST8rr renamable $dil, renamable $dil, implicit-def $eflags, implicit killed $edi
JCC_1 %bb.2, 4, implicit killed $eflags
JMP_1 %bb.1
-
+
bb.1:
renamable $rbx = IMPLICIT_DEF
renamable $r14 = IMPLICIT_DEF
@@ -42,7 +85,7 @@ body: |
renamable $r13 = IMPLICIT_DEF
dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def $rax
RET 0, killed $rax
-
+
bb.2:
dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def $rax
RET 0, killed $rax
diff --git a/llvm/test/CodeGen/X86/cfi-epilogue-without-return.mir b/llvm/test/CodeGen/X86/cfi-epilogue-without-return.mir
index 38c081c94ab91..243d800200c29 100644
--- a/llvm/test/CodeGen/X86/cfi-epilogue-without-return.mir
+++ b/llvm/test/CodeGen/X86/cfi-epilogue-without-return.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -o - %s -mtriple=x86_64-- -run-pass=prologepilog 2>&1 | FileCheck %s
--- |
declare dso_local void @_Z3goov()
@@ -10,16 +11,6 @@
# If the epilogue bb.1.if.then is not a return block, .cfi_restore is
# needed in it, otherwise bb.2.return will see different outgoing CFI
# information from its predecessors.
-# CHECK: bb.1:
-# CHECK: CFI_INSTRUCTION restore $rbx
-# CHECK-NEXT: CFI_INSTRUCTION restore $r12
-# CHECK-NEXT: CFI_INSTRUCTION restore $r13
-# CHECK-NEXT: CFI_INSTRUCTION restore $r14
-# CHECK-NEXT: CFI_INSTRUCTION restore $r15
-# CHECK-NEXT: CFI_INSTRUCTION restore $rbp
-# CHECK-NOT: RET 0
-# CHECK: bb.2:
-# CHECK: RET 0
name: _Z3foob
alignment: 16
tracksRegLiveness: true
@@ -34,20 +25,72 @@ frameInfo:
- point: '%bb.1'
machineFunctionInfo: {}
body: |
+ ; CHECK-LABEL: name: _Z3foob
+ ; CHECK: bb.0:
+ ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
+ ; CHECK-NEXT: liveins: $edi, $rbx, $r12, $r13, $r14, $r15
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: TEST8rr renamable $dil, renamable $dil, implicit-def $eflags, implicit killed $edi
+ ; CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
+ ; CHECK-NEXT: JMP_1 %bb.1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: successors: %bb.2(0x80000000)
+ ; CHECK-NEXT: liveins: $r15, $r14, $r13, $r12, $rbx
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $rbp, -16
+ ; CHECK-NEXT: $rbp = frame-setup MOV64rr $rsp
+ ; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_register $rbp
+ ; CHECK-NEXT: frame-setup PUSH64r killed $r15, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: frame-setup PUSH64r killed $r14, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: frame-setup PUSH64r killed $r13, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: frame-setup PUSH64r killed $r12, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $rbx, -56
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $r12, -48
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $r13, -40
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $r14, -32
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $r15, -24
+ ; CHECK-NEXT: renamable $rbx = IMPLICIT_DEF
+ ; CHECK-NEXT: renamable $r14 = IMPLICIT_DEF
+ ; CHECK-NEXT: renamable $r15 = IMPLICIT_DEF
+ ; CHECK-NEXT: renamable $r12 = IMPLICIT_DEF
+ ; CHECK-NEXT: renamable $r13 = IMPLICIT_DEF
+ ; CHECK-NEXT: $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $r12 = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $r13 = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $r15 = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION def_cfa $rsp, 8
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $rbx
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $r12
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $r13
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $r14
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $r15
+ ; CHECK-NEXT: frame-destroy CFI_INSTRUCTION restore $rbp
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: liveins: $rbx, $r12, $r13, $r14, $r15
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def $rax
+ ; CHECK-NEXT: RET 0, killed $rax
bb.0:
liveins: $edi
-
+
TEST8rr renamable $dil, renamable $dil, implicit-def $eflags, implicit killed $edi
JCC_1 %bb.2, 4, implicit killed $eflags
JMP_1 %bb.1
-
+
bb.1:
renamable $rbx = IMPLICIT_DEF
renamable $r14 = IMPLICIT_DEF
renamable $r15 = IMPLICIT_DEF
renamable $r12 = IMPLICIT_DEF
renamable $r13 = IMPLICIT_DEF
-
+
bb.2:
dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def $rax
RET 0, killed $rax
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll b/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll
index 5fda94694ff43..d30711c234689 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll
+++ b/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
;; This test checks if CFI instructions for all callee saved registers are emitted
;; correctly with basic block sections.
; RUN: llc %s -mtriple=x86_64 -filetype=asm --basic-block-sections=all --frame-pointer=all -o - | FileCheck --check-prefix=SECTIONS_CFI %s
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir b/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir
index e85126d649be4..193b0343fdbe1 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI inserter inserts .cfi_offset/.cfi_register/.cfi_rel_offset
@@ -8,11 +9,6 @@
}
...
---
-# CHECK: bb.3:
-# CHECK: CFI_INSTRUCTION offset $rbp, -16
-# CHECK-NEXT: CFI_INSTRUCTION offset $r12, -24
-# CHECK-NEXT: CFI_INSTRUCTION register $r13, $rcx
-# CHECK-NEXT: CFI_INSTRUCTION offset $r14, -40
name: foo
alignment: 16
tracksRegLiveness: true
@@ -33,10 +29,78 @@ fixedStack:
- { id: 4, type: spill-slot, offset: -24, size: 8, alignment: 8 }
machineFunctionInfo: {}
body: |
+ ; CHECK-LABEL: name: foo
+ ; CHECK: bb.0:
+ ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
+ ; CHECK-NEXT: liveins: $edi, $r12, $r13, $r14
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: CFI_INSTRUCTION def_cfa_offset 16
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $rbp, -16
+ ; CHECK-NEXT: $rbp = frame-setup MOV64rr $rsp
+ ; CHECK-NEXT: CFI_INSTRUCTION def_cfa_register $rbp
+ ; CHECK-NEXT: frame-setup PUSH64r killed $r12, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $rcx = frame-setup COPY $r13
+ ; CHECK-NEXT: frame-setup PUSH64r killed $r14, implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $r12, -24
+ ; CHECK-NEXT: CFI_INSTRUCTION register $r13, $rcx
+ ; CHECK-NEXT: CFI_INSTRUCTION rel_offset $r14, -24
+ ; CHECK-NEXT: TEST8rr renamable $dil, renamable $dil, implicit-def $eflags, implicit killed $edi
+ ; CHECK-NEXT: JCC_1 %bb.2, 4, implicit killed $eflags
+ ; CHECK-NEXT: JMP_1 %bb.1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: successors: %bb.3(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r12 = IMPLICIT_DEF
+ ; CHECK-NEXT: renamable $r13 = IMPLICIT_DEF
+ ; CHECK-NEXT: renamable $r14 = IMPLICIT_DEF
+ ; CHECK-NEXT: JMP_1 %bb.3
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: liveins: $rcx
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def $rax
+ ; CHECK-NEXT: $r12 = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $r13 = frame-destroy COPY $rcx
+ ; CHECK-NEXT: $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $rbp
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $r12
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $r13
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $r14
+ ; CHECK-NEXT: CFI_INSTRUCTION def_cfa $rsp, 8
+ ; CHECK-NEXT: RET 0, killed $rax
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.3:
+ ; CHECK-NEXT: successors: %bb.4(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: CFI_INSTRUCTION def_cfa $rbp, 16
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $r12, -24
+ ; CHECK-NEXT: CFI_INSTRUCTION register $r13, $rcx
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $r14, -40
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $rbp, -16
+ ; CHECK-NEXT: renamable $rdi = IMPLICIT_DEF
+ ; CHECK-NEXT: renamable $rsi = IMPLICIT_DEF
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.4:
+ ; CHECK-NEXT: liveins: $rcx
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def $rax
+ ; CHECK-NEXT: $r12 = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $r13 = frame-destroy COPY $rcx
+ ; CHECK-NEXT: $r14 = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $rbp
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $r12
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $r13
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $r14
+ ; CHECK-NEXT: CFI_INSTRUCTION def_cfa $rsp, 8
+ ; CHECK-NEXT: RET 0, killed $rax
bb.0:
successors: %bb.2(0x40000000), %bb.1(0x40000000)
liveins: $edi, $r12, $r13, $r14
-
+
frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
CFI_INSTRUCTION def_cfa_offset 16
CFI_INSTRUCTION offset $rbp, -16
@@ -51,15 +115,15 @@ body: |
TEST8rr renamable $dil, renamable $dil, implicit-def $eflags, implicit killed $edi
JCC_1 %bb.2, 4, implicit killed $eflags
JMP_1 %bb.1
-
+
bb.1:
successors: %bb.3(0x80000000)
-
+
renamable $r12 = IMPLICIT_DEF
renamable $r13 = IMPLICIT_DEF
renamable $r14 = IMPLICIT_DEF
JMP_1 %bb.3
-
+
bb.2:
liveins: $rcx
dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def $rax
@@ -73,13 +137,13 @@ body: |
CFI_INSTRUCTION restore $r14
CFI_INSTRUCTION def_cfa $rsp, 8
RET 0, killed $rax
-
+
bb.3:
successors: %bb.4(0x80000000)
-
+
renamable $rdi = IMPLICIT_DEF
renamable $rsi = IMPLICIT_DEF
-
+
bb.4:
liveins: $rcx
dead $eax = MOV32r0 implicit-def dead $eflags, implicit-def $rax
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register.mir b/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register.mir
index b17c9a67abb18..abcb0743aa21b 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI inserter inserts .cfi_restore properly for
@@ -8,11 +9,32 @@
}
...
---
-# CHECK: bb.3:
-# CHECK: CFI_INSTRUCTION restore $rbx
-# CHECK-NEXT: CFI_INSTRUCTION restore $rbp
name: foo
body: |
+ ; CHECK-LABEL: name: foo
+ ; CHECK: bb.0:
+ ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: TEST8rr renamable $dil, renamable $dil, implicit-def $eflags, implicit killed $edi
+ ; CHECK-NEXT: JCC_1 %bb.2, 5, implicit killed $eflags
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.1:
+ ; CHECK-NEXT: successors: %bb.3(0x80000000)
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: JMP_1 %bb.3
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.2:
+ ; CHECK-NEXT: CFI_INSTRUCTION def_cfa_offset 16
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $rbp, -16
+ ; CHECK-NEXT: CFI_INSTRUCTION def_cfa_register $rbp
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $rbx, -24
+ ; CHECK-NEXT: CFI_INSTRUCTION def_cfa $rsp, 8
+ ; CHECK-NEXT: RET 0, $rax
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: bb.3:
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $rbx
+ ; CHECK-NEXT: CFI_INSTRUCTION restore $rbp
+ ; CHECK-NEXT: RET 0, $rax
bb.0:
TEST8rr renamable $dil, renamable $dil, implicit-def $eflags, implicit killed $edi
JCC_1 %bb.2, 5, implicit killed $eflags
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir b/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir
index ffd1b21370aa3..250063b6c0dc2 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs -run-pass=cfi-instr-inserter
--- |
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-check-order.ll b/llvm/test/CodeGen/X86/cfi-inserter-check-order.ll
index d2f47c2d66b5f..e350d994a3677 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-check-order.ll
+++ b/llvm/test/CodeGen/X86/cfi-inserter-check-order.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=x86_64-- -O2 -enable-machine-outliner -debug-pass=Structure < %s -o /dev/null 2>&1 | FileCheck %s
; REQUIRES: asserts
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir b/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir
index a1b3a68c85fc3..e8642b564e39b 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-csr.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-csr.mir
index 63957ae5229fa..e4a47e009f754 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-csr.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-csr.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI verifier finds inconsistent csr saved set between bb.end and
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir
index 8211f8940d27a..444c14ef6a369 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: not --crash llc -o - %s -mtriple=x86_64-- \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CSR being saved in multiple locations can be caught by
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
index fd726b882b561..4d1ea3f5d1028 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI verifier finds inconsistent offset between bb.end and one of
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
index 30344edc259ce..3e7f0b790058f 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
@@ -1,3 +1,4 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI verifier finds inconsistent register between bb.end and one of
diff --git a/llvm/test/CodeGen/X86/cfi-xmm.ll b/llvm/test/CodeGen/X86/cfi-xmm.ll
index 76c59ffdf9422..5cf4fb07acffe 100644
--- a/llvm/test/CodeGen/X86/cfi-xmm.ll
+++ b/llvm/test/CodeGen/X86/cfi-xmm.ll
@@ -1,7 +1,23 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple x86_64-w64-windows-gnu -filetype=asm -exception-model=dwarf -o - %s | FileCheck %s
; RUN: llc < %s -mtriple x86_64-w64-windows-gnu -exception-model=dwarf -stop-after=prologepilog | FileCheck %s --check-prefix=PEI
define void @_Z1fv() {
+ ; PEI-LABEL: name: _Z1fv
+ ; PEI: bb.0.entry:
+ ; PEI-NEXT: liveins: $xmm15, $xmm10
+ ; PEI-NEXT: {{ $}}
+ ; PEI-NEXT: $rsp = frame-setup SUB64ri32 $rsp, 40, implicit-def dead $eflags
+ ; PEI-NEXT: frame-setup MOVAPSmr $rsp, 1, $noreg, 16, $noreg, killed $xmm15 :: (store (s128) into %fixed-stack.1)
+ ; PEI-NEXT: frame-setup MOVAPSmr $rsp, 1, $noreg, 0, $noreg, killed $xmm10 :: (store (s128) into %fixed-stack.0)
+ ; PEI-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 48
+ ; PEI-NEXT: CFI_INSTRUCTION offset $xmm10, -48
+ ; PEI-NEXT: CFI_INSTRUCTION offset $xmm15, -32
+ ; PEI-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $xmm10, 12 /* clobber */, implicit-def dead early-clobber $xmm15, 12 /* clobber */, implicit-def dead early-clobber $df, 12 /* clobber */, implicit-def early-clobber $fpsw, 12 /* clobber */, implicit-def dead early-clobber $eflags
+ ; PEI-NEXT: $xmm10 = MOVAPSrm $rsp, 1, $noreg, 0, $noreg :: (load (s128) from %fixed-stack.0)
+ ; PEI-NEXT: $xmm15 = MOVAPSrm $rsp, 1, $noreg, 16, $noreg :: (load (s128) from %fixed-stack.1)
+ ; PEI-NEXT: $rsp = frame-destroy ADD64ri32 $rsp, 40, implicit-def dead $eflags
+ ; PEI-NEXT: RET 0
entry:
tail call void asm sideeffect "", "~{xmm10},~{xmm15},~{dirflag},~{fpsr},~{flags}"()
ret void
diff --git a/llvm/test/CodeGen/X86/cfi.ll b/llvm/test/CodeGen/X86/cfi.ll
index 5a09577636260..9e9ea4a23c84b 100644
--- a/llvm/test/CodeGen/X86/cfi.ll
+++ b/llvm/test/CodeGen/X86/cfi.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck --check-prefix=STATIC %s
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic | FileCheck --check-prefix=PIC %s
>From d9c5f7df10a2b71e2f7e939236ba6b9b177acf55 Mon Sep 17 00:00:00 2001
From: Mikhail Gudim <mgudim at qti.qualcomm.com>
Date: Thu, 22 Jan 2026 10:36:36 -0800
Subject: [PATCH 2/7] Fixed CI failures.
---
.../cfi-inserter-callee-save-register-2.mir | 2 +-
llvm/test/CodeGen/X86/cfi-xmm-asm.ll | 22 +++++++++++++++
llvm/test/CodeGen/X86/cfi-xmm.ll | 28 -------------------
3 files changed, 23 insertions(+), 29 deletions(-)
create mode 100644 llvm/test/CodeGen/X86/cfi-xmm-asm.ll
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir b/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir
index 193b0343fdbe1..a08a3166a1285 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-callee-save-register-2.mir
@@ -76,10 +76,10 @@ body: |
; CHECK-NEXT: successors: %bb.4(0x80000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: CFI_INSTRUCTION def_cfa $rbp, 16
+ ; CHECK-NEXT: CFI_INSTRUCTION offset $rbp, -16
; CHECK-NEXT: CFI_INSTRUCTION offset $r12, -24
; CHECK-NEXT: CFI_INSTRUCTION register $r13, $rcx
; CHECK-NEXT: CFI_INSTRUCTION offset $r14, -40
- ; CHECK-NEXT: CFI_INSTRUCTION offset $rbp, -16
; CHECK-NEXT: renamable $rdi = IMPLICIT_DEF
; CHECK-NEXT: renamable $rsi = IMPLICIT_DEF
; CHECK-NEXT: {{ $}}
diff --git a/llvm/test/CodeGen/X86/cfi-xmm-asm.ll b/llvm/test/CodeGen/X86/cfi-xmm-asm.ll
new file mode 100644
index 0000000000000..530c522a318bc
--- /dev/null
+++ b/llvm/test/CodeGen/X86/cfi-xmm-asm.ll
@@ -0,0 +1,22 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple x86_64-w64-windows-gnu -filetype=asm -exception-model=dwarf -o - %s | FileCheck %s
+
+define void @_Z1fv() {
+; CHECK-LABEL: _Z1fv:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: subq $40, %rsp
+; CHECK-NEXT: movaps %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; CHECK-NEXT: movaps %xmm10, (%rsp) # 16-byte Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 48
+; CHECK-NEXT: .cfi_offset %xmm10, -48
+; CHECK-NEXT: .cfi_offset %xmm15, -32
+; CHECK-NEXT: #APP
+; CHECK-NEXT: #NO_APP
+; CHECK-NEXT: movaps (%rsp), %xmm10 # 16-byte Reload
+; CHECK-NEXT: movaps {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; CHECK-NEXT: addq $40, %rsp
+; CHECK-NEXT: retq
+entry:
+ tail call void asm sideeffect "", "~{xmm10},~{xmm15},~{dirflag},~{fpsr},~{flags}"()
+ ret void
+}
diff --git a/llvm/test/CodeGen/X86/cfi-xmm.ll b/llvm/test/CodeGen/X86/cfi-xmm.ll
index 5cf4fb07acffe..fa972d04f5cef 100644
--- a/llvm/test/CodeGen/X86/cfi-xmm.ll
+++ b/llvm/test/CodeGen/X86/cfi-xmm.ll
@@ -1,5 +1,4 @@
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
-; RUN: llc -mtriple x86_64-w64-windows-gnu -filetype=asm -exception-model=dwarf -o - %s | FileCheck %s
; RUN: llc < %s -mtriple x86_64-w64-windows-gnu -exception-model=dwarf -stop-after=prologepilog | FileCheck %s --check-prefix=PEI
define void @_Z1fv() {
@@ -22,30 +21,3 @@ entry:
tail call void asm sideeffect "", "~{xmm10},~{xmm15},~{dirflag},~{fpsr},~{flags}"()
ret void
}
-
-; CHECK-LABEL: _Z1fv:
-; CHECK: .cfi_startproc
-; CHECK: subq $40, %rsp
-; CHECK: movaps %xmm15, 16(%rsp)
-; CHECK: movaps %xmm10, (%rsp)
-; CHECK: .cfi_def_cfa_offset 48
-; CHECK: .cfi_offset %xmm10, -48
-; CHECK: .cfi_offset %xmm15, -32
-; CHECK: movaps (%rsp), %xmm10
-; CHECK: movaps 16(%rsp), %xmm15
-; CHECK: addq $40, %rsp
-; CHECK: retq
-; CHECK: .cfi_endproc
-
-; PEI-LABEL: name: _Z1fv
-; PEI: $rsp = frame-setup SUB64ri32 $rsp, 40, implicit-def dead $eflags
-; PEI-NEXT: frame-setup MOVAPSmr $rsp, 1, $noreg, 16, $noreg, killed $xmm15 :: (store (s128) into %fixed-stack.1)
-; PEI-NEXT: frame-setup MOVAPSmr $rsp, 1, $noreg, 0, $noreg, killed $xmm10 :: (store (s128) into %fixed-stack.0)
-; PEI-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 48
-; PEI-NEXT: {{^ +}}CFI_INSTRUCTION offset $xmm10, -48
-; PEI-NEXT: {{^ +}}CFI_INSTRUCTION offset $xmm15, -32
-; PEI-NEXT: INLINEASM {{.*}}
-; PEI-NEXT: $xmm10 = MOVAPSrm $rsp, 1, $noreg, 0, $noreg :: (load (s128) from %fixed-stack.0)
-; PEI-NEXT: $xmm15 = MOVAPSrm $rsp, 1, $noreg, 16, $noreg :: (load (s128) from %fixed-stack.1)
-; PEI-NEXT: $rsp = frame-destroy ADD64ri32 $rsp, 40, implicit-def dead $eflags
-; PEI-NEXT: RET 0
>From d02d5875994b6af527731144ce174c618a667d1a Mon Sep 17 00:00:00 2001
From: Mikhail Gudim <mgudim at qti.qualcomm.com>
Date: Fri, 23 Jan 2026 10:16:43 -0800
Subject: [PATCH 3/7] removed banners from tests where checks can not be
auto-generated. split cfi-basic-block-sections test so that one part can be
auto-generated.
---
.../CodeGen/X86/cfi-basic-block-sections-1.ll | 86 ++++++-------------
.../X86/cfi-basic-block-sections-eh-frame.ll | 40 +++++++++
.../X86/cfi-inserter-cfg-with-merge.mir | 1 -
.../CodeGen/X86/cfi-inserter-check-order.ll | 1 -
4 files changed, 68 insertions(+), 60 deletions(-)
create mode 100644 llvm/test/CodeGen/X86/cfi-basic-block-sections-eh-frame.ll
diff --git a/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll b/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll
index 1cc862a40b9fe..a63de08341a6d 100644
--- a/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll
+++ b/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll
@@ -1,7 +1,6 @@
-; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=asm --frame-pointer=all -o - | FileCheck --check-prefix=SECTIONS_CFI %s
; RUN: llc -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=asm --frame-pointer=none -o - | FileCheck --check-prefix=SECTIONS_NOFP_CFI %s
-; RUN: llc -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=obj --frame-pointer=all -o - | llvm-dwarfdump --eh-frame - | FileCheck --check-prefix=EH_FRAME %s
;; void f1();
;; void f3(bool b) {
@@ -10,64 +9,35 @@
;; }
-; SECTIONS_CFI: _Z2f3b:
-; SECTIONS_CFI: .cfi_startproc
-; SECTIONS_CFI: .cfi_def_cfa_offset 16
-; SECTIONS_CFI: .cfi_offset %rbp, -16
-; SECTIONS_CFI: .cfi_def_cfa_register %rbp
-; SECTIONS_CFI: .cfi_endproc
-
-; SECTIONS_CFI: _Z2f3b.__part.1:
-; SECTIONS_CFI-NEXT: .cfi_startproc
-; SECTIONS_CFI-NEXT: .cfi_def_cfa %rbp, 16
-; SECTIONS_CFI-NEXT: .cfi_offset %rbp, -16
-; SECTIONS_CFI: .cfi_endproc
-
-; SECTIONS_CFI: _Z2f3b.__part.2:
-; SECTIONS_CFI-NEXT: .cfi_startproc
-; SECTIONS_CFI-NEXT: .cfi_def_cfa %rbp, 16
-; SECTIONS_CFI-NEXT: .cfi_offset %rbp, -16
-; SECTIONS_CFI: .cfi_def_cfa
-; SECTIONS_CFI: .cfi_endproc
-
-
-; SECTIONS_NOFP_CFI: _Z2f3b:
-; SECTIONS_NOFP_CFI: .cfi_startproc
-; SECTIONS_NOFP_CFI: .cfi_def_cfa_offset 16
-; SECTIONS_NOFP_CFI: .cfi_endproc
-
-; SECTIONS_NOFP_CFI: _Z2f3b.__part.1:
-; SECTIONS_NOFP_CFI-NEXT: .cfi_startproc
-; SECTIONS_NOFP_CFI-NEXT: .cfi_def_cfa %rsp, 16
-; SECTIONS_NOFP_CFI: .cfi_endproc
-
-; SECTIONS_NOFP_CFI: _Z2f3b.__part.2:
-; SECTIONS_NOFP_CFI-NEXT: .cfi_startproc
-; SECTIONS_NOFP_CFI-NEXT: .cfi_def_cfa %rsp, 16
-; SECTIONS_NOFP_CFI: .cfi_endproc
-
-
-;; There must be 1 CIE and 3 FDEs.
-
-; EH_FRAME: CIE
-; EH_FRAME: DW_CFA_def_cfa
-; EH_FRAME: DW_CFA_offset
-
-; EH_FRAME: FDE cie=
-; EH_FRAME: DW_CFA_def_cfa_offset
-; EH_FRAME: DW_CFA_offset
-; EH_FRAME: DW_CFA_def_cfa_register
-
-; EH_FRAME: FDE cie=
-; EH_FRAME: DW_CFA_def_cfa
-; EH_FRAME: DW_CFA_offset
-
-; EH_FRAME: FDE cie=
-; EH_FRAME: DW_CFA_def_cfa
-; EH_FRAME: DW_CFA_offset
-
; Function Attrs: noinline optnone uwtable
define dso_local void @_Z2f3b(i1 zeroext %b) {
+; SECTIONS_CFI-LABEL: _Z2f3b:
+; SECTIONS_CFI: # %bb.0: # %entry
+; SECTIONS_CFI-NEXT: pushq %rbp
+; SECTIONS_CFI-NEXT: .cfi_def_cfa_offset 16
+; SECTIONS_CFI-NEXT: .cfi_offset %rbp, -16
+; SECTIONS_CFI-NEXT: movq %rsp, %rbp
+; SECTIONS_CFI-NEXT: .cfi_def_cfa_register %rbp
+; SECTIONS_CFI-NEXT: subq $16, %rsp
+; SECTIONS_CFI-NEXT: movb %dil, %al
+; SECTIONS_CFI-NEXT: andb $1, %al
+; SECTIONS_CFI-NEXT: movb %al, -1(%rbp)
+; SECTIONS_CFI-NEXT: testb $1, -1(%rbp)
+; SECTIONS_CFI-NEXT: je _Z2f3b.__part.2
+; SECTIONS_CFI-NEXT: jmp _Z2f3b.__part.1
+; SECTIONS_CFI-NEXT: .LBB_END0_0:
+;
+; SECTIONS_NOFP_CFI-LABEL: _Z2f3b:
+; SECTIONS_NOFP_CFI: # %bb.0: # %entry
+; SECTIONS_NOFP_CFI-NEXT: pushq %rax
+; SECTIONS_NOFP_CFI-NEXT: .cfi_def_cfa_offset 16
+; SECTIONS_NOFP_CFI-NEXT: movb %dil, %al
+; SECTIONS_NOFP_CFI-NEXT: andb $1, %al
+; SECTIONS_NOFP_CFI-NEXT: movb %al, {{[0-9]+}}(%rsp)
+; SECTIONS_NOFP_CFI-NEXT: testb $1, {{[0-9]+}}(%rsp)
+; SECTIONS_NOFP_CFI-NEXT: je _Z2f3b.__part.2
+; SECTIONS_NOFP_CFI-NEXT: jmp _Z2f3b.__part.1
+; SECTIONS_NOFP_CFI-NEXT: .LBB_END0_0:
entry:
%b.addr = alloca i8, align 1
%frombool = zext i1 %b to i8
diff --git a/llvm/test/CodeGen/X86/cfi-basic-block-sections-eh-frame.ll b/llvm/test/CodeGen/X86/cfi-basic-block-sections-eh-frame.ll
new file mode 100644
index 0000000000000..d79cb25af02fb
--- /dev/null
+++ b/llvm/test/CodeGen/X86/cfi-basic-block-sections-eh-frame.ll
@@ -0,0 +1,40 @@
+; RUN: llc -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=obj --frame-pointer=all -o - | llvm-dwarfdump --eh-frame - | FileCheck --check-prefix=EH_FRAME %s
+
+; Function Attrs: noinline optnone uwtable
+define dso_local void @_Z2f3b(i1 zeroext %b) {
+;; There must be 1 CIE and 3 FDEs.
+
+; EH_FRAME: CIE
+; EH_FRAME: DW_CFA_def_cfa
+; EH_FRAME: DW_CFA_offset
+
+; EH_FRAME: FDE cie=
+; EH_FRAME: DW_CFA_def_cfa_offset
+; EH_FRAME: DW_CFA_offset
+; EH_FRAME: DW_CFA_def_cfa_register
+
+; EH_FRAME: FDE cie=
+; EH_FRAME: DW_CFA_def_cfa
+; EH_FRAME: DW_CFA_offset
+
+; EH_FRAME: FDE cie=
+; EH_FRAME: DW_CFA_def_cfa
+; EH_FRAME: DW_CFA_offset
+
+entry:
+ %b.addr = alloca i8, align 1
+ %frombool = zext i1 %b to i8
+ store i8 %frombool, ptr %b.addr, align 1
+ %0 = load i8, ptr %b.addr, align 1
+ %tobool = trunc i8 %0 to i1
+ br i1 %tobool, label %if.then, label %if.end
+
+if.then: ; preds = %entry
+ call void @_Z2f1v()
+ br label %if.end
+
+if.end: ; preds = %if.then, %entry
+ ret void
+}
+
+declare dso_local void @_Z2f1v()
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir b/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir
index 250063b6c0dc2..ffd1b21370aa3 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-cfg-with-merge.mir
@@ -1,4 +1,3 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs -run-pass=cfi-instr-inserter
--- |
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-check-order.ll b/llvm/test/CodeGen/X86/cfi-inserter-check-order.ll
index e350d994a3677..d2f47c2d66b5f 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-check-order.ll
+++ b/llvm/test/CodeGen/X86/cfi-inserter-check-order.ll
@@ -1,4 +1,3 @@
-; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
; RUN: llc -mtriple=x86_64-- -O2 -enable-machine-outliner -debug-pass=Structure < %s -o /dev/null 2>&1 | FileCheck %s
; REQUIRES: asserts
>From 45a803c39c24f8815d0e071241c28459f29bfa77 Mon Sep 17 00:00:00 2001
From: Mikhail Gudim <mgudim at qti.qualcomm.com>
Date: Fri, 23 Jan 2026 11:14:08 -0800
Subject: [PATCH 4/7] removed more banners
---
...ic-block-sections-callee-save-registers.ll | 50 +++++++++----------
.../X86/cfi-inserter-noreturnblock.mir | 1 -
.../cfi-inserter-verify-inconsistent-csr.mir | 1 -
.../cfi-inserter-verify-inconsistent-loc.mir | 1 -
...fi-inserter-verify-inconsistent-offset.mir | 1 -
...-inserter-verify-inconsistent-register.mir | 1 -
llvm/test/CodeGen/X86/cfi.ll | 1 -
7 files changed, 23 insertions(+), 33 deletions(-)
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll b/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll
index d30711c234689..05ef977144844 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll
+++ b/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll
@@ -1,33 +1,7 @@
-; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
;; This test checks if CFI instructions for all callee saved registers are emitted
;; correctly with basic block sections.
; RUN: llc %s -mtriple=x86_64 -filetype=asm --basic-block-sections=all --frame-pointer=all -o - | FileCheck --check-prefix=SECTIONS_CFI %s
-
-; SECTIONS_CFI: _Z3foob:
-; SECTIONS_CFI: .cfi_offset %rbp, -16
-; SECTIONS_CFI: .cfi_offset [[RA:%r.+]], -56
-; SECTIONS_CFI-NEXT: .cfi_offset [[RB:%r.+]], -48
-; SECTIONS_CFI-NEXT: .cfi_offset [[RC:%r.+]], -40
-; SECTIONS_CFI-NEXT: .cfi_offset [[RD:%r.+]], -32
-; SECTIONS_CFI-NEXT: .cfi_offset [[RE:%r.+]], -24
-
-; SECTIONS_CFI: _Z3foob.__part.1:
-; SECTIONS_CFI: .cfi_offset %rbp, -16
-; SECTIONS_CFI: .cfi_offset [[RA]], -56
-; SECTIONS_CFI-NEXT: .cfi_offset [[RB]], -48
-; SECTIONS_CFI-NEXT: .cfi_offset [[RC]], -40
-; SECTIONS_CFI-NEXT: .cfi_offset [[RD]], -32
-; SECTIONS_CFI-NEXT: .cfi_offset [[RE]], -24
-
-; SECTIONS_CFI: _Z3foob.__part.2:
-; SECTIONS_CFI: .cfi_offset %rbp, -16
-; SECTIONS_CFI: .cfi_offset [[RA]], -56
-; SECTIONS_CFI-NEXT: .cfi_offset [[RB]], -48
-; SECTIONS_CFI-NEXT: .cfi_offset [[RC]], -40
-; SECTIONS_CFI-NEXT: .cfi_offset [[RD]], -32
-; SECTIONS_CFI-NEXT: .cfi_offset [[RE]], -24
-
-
;; void foo(bool b) {
;; if (b) // adds a basic block
;; // clobber all callee-save registers to force them to be callee-saved and to
@@ -36,6 +10,28 @@
;; }
define dso_local void @_Z3foob(i1 zeroext %b) {
+; SECTIONS_CFI-LABEL: _Z3foob:
+; SECTIONS_CFI: # %bb.0: # %entry
+; SECTIONS_CFI-NEXT: pushq %rbp
+; SECTIONS_CFI-NEXT: .cfi_def_cfa_offset 16
+; SECTIONS_CFI-NEXT: .cfi_offset %rbp, -16
+; SECTIONS_CFI-NEXT: movq %rsp, %rbp
+; SECTIONS_CFI-NEXT: .cfi_def_cfa_register %rbp
+; SECTIONS_CFI-NEXT: pushq %r15
+; SECTIONS_CFI-NEXT: pushq %r14
+; SECTIONS_CFI-NEXT: pushq %r13
+; SECTIONS_CFI-NEXT: pushq %r12
+; SECTIONS_CFI-NEXT: pushq %rbx
+; SECTIONS_CFI-NEXT: .cfi_offset %rbx, -56
+; SECTIONS_CFI-NEXT: .cfi_offset %r12, -48
+; SECTIONS_CFI-NEXT: .cfi_offset %r13, -40
+; SECTIONS_CFI-NEXT: .cfi_offset %r14, -32
+; SECTIONS_CFI-NEXT: .cfi_offset %r15, -24
+; SECTIONS_CFI-NEXT: movb %dil, -41(%rbp)
+; SECTIONS_CFI-NEXT: testl %edi, %edi
+; SECTIONS_CFI-NEXT: je _Z3foob.__part.2
+; SECTIONS_CFI-NEXT: jmp _Z3foob.__part.1
+; SECTIONS_CFI-NEXT: .LBB_END0_0:
entry:
%b.addr = alloca i8, align 1
%frombool = zext i1 %b to i8
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir b/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir
index e8642b564e39b..a1b3a68c85fc3 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-noreturnblock.mir
@@ -1,4 +1,3 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-csr.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-csr.mir
index e4a47e009f754..63957ae5229fa 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-csr.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-csr.mir
@@ -1,4 +1,3 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI verifier finds inconsistent csr saved set between bb.end and
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir
index 444c14ef6a369..8211f8940d27a 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-loc.mir
@@ -1,4 +1,3 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: not --crash llc -o - %s -mtriple=x86_64-- \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CSR being saved in multiple locations can be caught by
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
index 4d1ea3f5d1028..fd726b882b561 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-offset.mir
@@ -1,4 +1,3 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI verifier finds inconsistent offset between bb.end and one of
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
index 3e7f0b790058f..30344edc259ce 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
+++ b/llvm/test/CodeGen/X86/cfi-inserter-verify-inconsistent-register.mir
@@ -1,4 +1,3 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: not --crash llc -o - %s -mtriple=x86_64-- -verify-cfiinstrs \
# RUN: -run-pass=cfi-instr-inserter 2>&1 | FileCheck %s
# Test that CFI verifier finds inconsistent register between bb.end and one of
diff --git a/llvm/test/CodeGen/X86/cfi.ll b/llvm/test/CodeGen/X86/cfi.ll
index 9e9ea4a23c84b..5a09577636260 100644
--- a/llvm/test/CodeGen/X86/cfi.ll
+++ b/llvm/test/CodeGen/X86/cfi.ll
@@ -1,4 +1,3 @@
-; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck --check-prefix=STATIC %s
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -relocation-model=pic | FileCheck --check-prefix=PIC %s
>From 86babc22d6f4b56ca3be4fde3fb5ae452636cca4 Mon Sep 17 00:00:00 2001
From: Mikhail Gudim <mgudim at qti.qualcomm.com>
Date: Fri, 30 Jan 2026 16:08:05 -0800
Subject: [PATCH 5/7] undo changes to
cfi-inserter-basic-block-sections-callee-save-registers.ll
---
...ic-block-sections-callee-save-registers.ll | 49 ++++++++++---------
1 file changed, 26 insertions(+), 23 deletions(-)
diff --git a/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll b/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll
index 05ef977144844..5fda94694ff43 100644
--- a/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll
+++ b/llvm/test/CodeGen/X86/cfi-inserter-basic-block-sections-callee-save-registers.ll
@@ -1,7 +1,32 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
;; This test checks if CFI instructions for all callee saved registers are emitted
;; correctly with basic block sections.
; RUN: llc %s -mtriple=x86_64 -filetype=asm --basic-block-sections=all --frame-pointer=all -o - | FileCheck --check-prefix=SECTIONS_CFI %s
+
+; SECTIONS_CFI: _Z3foob:
+; SECTIONS_CFI: .cfi_offset %rbp, -16
+; SECTIONS_CFI: .cfi_offset [[RA:%r.+]], -56
+; SECTIONS_CFI-NEXT: .cfi_offset [[RB:%r.+]], -48
+; SECTIONS_CFI-NEXT: .cfi_offset [[RC:%r.+]], -40
+; SECTIONS_CFI-NEXT: .cfi_offset [[RD:%r.+]], -32
+; SECTIONS_CFI-NEXT: .cfi_offset [[RE:%r.+]], -24
+
+; SECTIONS_CFI: _Z3foob.__part.1:
+; SECTIONS_CFI: .cfi_offset %rbp, -16
+; SECTIONS_CFI: .cfi_offset [[RA]], -56
+; SECTIONS_CFI-NEXT: .cfi_offset [[RB]], -48
+; SECTIONS_CFI-NEXT: .cfi_offset [[RC]], -40
+; SECTIONS_CFI-NEXT: .cfi_offset [[RD]], -32
+; SECTIONS_CFI-NEXT: .cfi_offset [[RE]], -24
+
+; SECTIONS_CFI: _Z3foob.__part.2:
+; SECTIONS_CFI: .cfi_offset %rbp, -16
+; SECTIONS_CFI: .cfi_offset [[RA]], -56
+; SECTIONS_CFI-NEXT: .cfi_offset [[RB]], -48
+; SECTIONS_CFI-NEXT: .cfi_offset [[RC]], -40
+; SECTIONS_CFI-NEXT: .cfi_offset [[RD]], -32
+; SECTIONS_CFI-NEXT: .cfi_offset [[RE]], -24
+
+
;; void foo(bool b) {
;; if (b) // adds a basic block
;; // clobber all callee-save registers to force them to be callee-saved and to
@@ -10,28 +35,6 @@
;; }
define dso_local void @_Z3foob(i1 zeroext %b) {
-; SECTIONS_CFI-LABEL: _Z3foob:
-; SECTIONS_CFI: # %bb.0: # %entry
-; SECTIONS_CFI-NEXT: pushq %rbp
-; SECTIONS_CFI-NEXT: .cfi_def_cfa_offset 16
-; SECTIONS_CFI-NEXT: .cfi_offset %rbp, -16
-; SECTIONS_CFI-NEXT: movq %rsp, %rbp
-; SECTIONS_CFI-NEXT: .cfi_def_cfa_register %rbp
-; SECTIONS_CFI-NEXT: pushq %r15
-; SECTIONS_CFI-NEXT: pushq %r14
-; SECTIONS_CFI-NEXT: pushq %r13
-; SECTIONS_CFI-NEXT: pushq %r12
-; SECTIONS_CFI-NEXT: pushq %rbx
-; SECTIONS_CFI-NEXT: .cfi_offset %rbx, -56
-; SECTIONS_CFI-NEXT: .cfi_offset %r12, -48
-; SECTIONS_CFI-NEXT: .cfi_offset %r13, -40
-; SECTIONS_CFI-NEXT: .cfi_offset %r14, -32
-; SECTIONS_CFI-NEXT: .cfi_offset %r15, -24
-; SECTIONS_CFI-NEXT: movb %dil, -41(%rbp)
-; SECTIONS_CFI-NEXT: testl %edi, %edi
-; SECTIONS_CFI-NEXT: je _Z3foob.__part.2
-; SECTIONS_CFI-NEXT: jmp _Z3foob.__part.1
-; SECTIONS_CFI-NEXT: .LBB_END0_0:
entry:
%b.addr = alloca i8, align 1
%frombool = zext i1 %b to i8
>From eb457eeb2d67d531bc8527e95720e8389fb0a7e2 Mon Sep 17 00:00:00 2001
From: Mikhail Gudim <mgudim at qti.qualcomm.com>
Date: Fri, 30 Jan 2026 16:10:38 -0800
Subject: [PATCH 6/7] undo changes to cfi-basic-block-sections-1.ll
---
.../CodeGen/X86/cfi-basic-block-sections-1.ll | 85 +++++++++++++------
1 file changed, 57 insertions(+), 28 deletions(-)
diff --git a/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll b/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll
index a63de08341a6d..1b7cf85f16579 100644
--- a/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll
+++ b/llvm/test/CodeGen/X86/cfi-basic-block-sections-1.ll
@@ -1,6 +1,6 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=asm --frame-pointer=all -o - | FileCheck --check-prefix=SECTIONS_CFI %s
; RUN: llc -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=asm --frame-pointer=none -o - | FileCheck --check-prefix=SECTIONS_NOFP_CFI %s
+; RUN: llc -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=obj --frame-pointer=all -o - | llvm-dwarfdump --eh-frame - | FileCheck --check-prefix=EH_FRAME %s
;; void f1();
;; void f3(bool b) {
@@ -9,35 +9,64 @@
;; }
+; SECTIONS_CFI: _Z2f3b:
+; SECTIONS_CFI: .cfi_startproc
+; SECTIONS_CFI: .cfi_def_cfa_offset 16
+; SECTIONS_CFI: .cfi_offset %rbp, -16
+; SECTIONS_CFI: .cfi_def_cfa_register %rbp
+; SECTIONS_CFI: .cfi_endproc
+
+; SECTIONS_CFI: _Z2f3b.__part.1:
+; SECTIONS_CFI-NEXT: .cfi_startproc
+; SECTIONS_CFI-NEXT: .cfi_def_cfa %rbp, 16
+; SECTIONS_CFI-NEXT: .cfi_offset %rbp, -16
+; SECTIONS_CFI: .cfi_endproc
+
+; SECTIONS_CFI: _Z2f3b.__part.2:
+; SECTIONS_CFI-NEXT: .cfi_startproc
+; SECTIONS_CFI-NEXT: .cfi_def_cfa %rbp, 16
+; SECTIONS_CFI-NEXT: .cfi_offset %rbp, -16
+; SECTIONS_CFI: .cfi_def_cfa
+; SECTIONS_CFI: .cfi_endproc
+
+
+; SECTIONS_NOFP_CFI: _Z2f3b:
+; SECTIONS_NOFP_CFI: .cfi_startproc
+; SECTIONS_NOFP_CFI: .cfi_def_cfa_offset 16
+; SECTIONS_NOFP_CFI: .cfi_endproc
+
+; SECTIONS_NOFP_CFI: _Z2f3b.__part.1:
+; SECTIONS_NOFP_CFI-NEXT: .cfi_startproc
+; SECTIONS_NOFP_CFI-NEXT: .cfi_def_cfa %rsp, 16
+; SECTIONS_NOFP_CFI: .cfi_endproc
+
+; SECTIONS_NOFP_CFI: _Z2f3b.__part.2:
+; SECTIONS_NOFP_CFI-NEXT: .cfi_startproc
+; SECTIONS_NOFP_CFI-NEXT: .cfi_def_cfa %rsp, 16
+; SECTIONS_NOFP_CFI: .cfi_endproc
+
+
+;; There must be 1 CIE and 3 FDEs.
+
+; EH_FRAME: CIE
+; EH_FRAME: DW_CFA_def_cfa
+; EH_FRAME: DW_CFA_offset
+
+; EH_FRAME: FDE cie=
+; EH_FRAME: DW_CFA_def_cfa_offset
+; EH_FRAME: DW_CFA_offset
+; EH_FRAME: DW_CFA_def_cfa_register
+
+; EH_FRAME: FDE cie=
+; EH_FRAME: DW_CFA_def_cfa
+; EH_FRAME: DW_CFA_offset
+
+; EH_FRAME: FDE cie=
+; EH_FRAME: DW_CFA_def_cfa
+; EH_FRAME: DW_CFA_offset
+
; Function Attrs: noinline optnone uwtable
define dso_local void @_Z2f3b(i1 zeroext %b) {
-; SECTIONS_CFI-LABEL: _Z2f3b:
-; SECTIONS_CFI: # %bb.0: # %entry
-; SECTIONS_CFI-NEXT: pushq %rbp
-; SECTIONS_CFI-NEXT: .cfi_def_cfa_offset 16
-; SECTIONS_CFI-NEXT: .cfi_offset %rbp, -16
-; SECTIONS_CFI-NEXT: movq %rsp, %rbp
-; SECTIONS_CFI-NEXT: .cfi_def_cfa_register %rbp
-; SECTIONS_CFI-NEXT: subq $16, %rsp
-; SECTIONS_CFI-NEXT: movb %dil, %al
-; SECTIONS_CFI-NEXT: andb $1, %al
-; SECTIONS_CFI-NEXT: movb %al, -1(%rbp)
-; SECTIONS_CFI-NEXT: testb $1, -1(%rbp)
-; SECTIONS_CFI-NEXT: je _Z2f3b.__part.2
-; SECTIONS_CFI-NEXT: jmp _Z2f3b.__part.1
-; SECTIONS_CFI-NEXT: .LBB_END0_0:
-;
-; SECTIONS_NOFP_CFI-LABEL: _Z2f3b:
-; SECTIONS_NOFP_CFI: # %bb.0: # %entry
-; SECTIONS_NOFP_CFI-NEXT: pushq %rax
-; SECTIONS_NOFP_CFI-NEXT: .cfi_def_cfa_offset 16
-; SECTIONS_NOFP_CFI-NEXT: movb %dil, %al
-; SECTIONS_NOFP_CFI-NEXT: andb $1, %al
-; SECTIONS_NOFP_CFI-NEXT: movb %al, {{[0-9]+}}(%rsp)
-; SECTIONS_NOFP_CFI-NEXT: testb $1, {{[0-9]+}}(%rsp)
-; SECTIONS_NOFP_CFI-NEXT: je _Z2f3b.__part.2
-; SECTIONS_NOFP_CFI-NEXT: jmp _Z2f3b.__part.1
-; SECTIONS_NOFP_CFI-NEXT: .LBB_END0_0:
entry:
%b.addr = alloca i8, align 1
%frombool = zext i1 %b to i8
>From 4aa426c9c2daea298c22af21b16f66fd7fd9db02 Mon Sep 17 00:00:00 2001
From: Mikhail Gudim <mgudim at qti.qualcomm.com>
Date: Fri, 30 Jan 2026 16:12:45 -0800
Subject: [PATCH 7/7] remove file related to basic-block-sections
---
.../X86/cfi-basic-block-sections-eh-frame.ll | 40 -------------------
1 file changed, 40 deletions(-)
delete mode 100644 llvm/test/CodeGen/X86/cfi-basic-block-sections-eh-frame.ll
diff --git a/llvm/test/CodeGen/X86/cfi-basic-block-sections-eh-frame.ll b/llvm/test/CodeGen/X86/cfi-basic-block-sections-eh-frame.ll
deleted file mode 100644
index d79cb25af02fb..0000000000000
--- a/llvm/test/CodeGen/X86/cfi-basic-block-sections-eh-frame.ll
+++ /dev/null
@@ -1,40 +0,0 @@
-; RUN: llc -O0 %s --basic-block-sections=all -mtriple=x86_64 -filetype=obj --frame-pointer=all -o - | llvm-dwarfdump --eh-frame - | FileCheck --check-prefix=EH_FRAME %s
-
-; Function Attrs: noinline optnone uwtable
-define dso_local void @_Z2f3b(i1 zeroext %b) {
-;; There must be 1 CIE and 3 FDEs.
-
-; EH_FRAME: CIE
-; EH_FRAME: DW_CFA_def_cfa
-; EH_FRAME: DW_CFA_offset
-
-; EH_FRAME: FDE cie=
-; EH_FRAME: DW_CFA_def_cfa_offset
-; EH_FRAME: DW_CFA_offset
-; EH_FRAME: DW_CFA_def_cfa_register
-
-; EH_FRAME: FDE cie=
-; EH_FRAME: DW_CFA_def_cfa
-; EH_FRAME: DW_CFA_offset
-
-; EH_FRAME: FDE cie=
-; EH_FRAME: DW_CFA_def_cfa
-; EH_FRAME: DW_CFA_offset
-
-entry:
- %b.addr = alloca i8, align 1
- %frombool = zext i1 %b to i8
- store i8 %frombool, ptr %b.addr, align 1
- %0 = load i8, ptr %b.addr, align 1
- %tobool = trunc i8 %0 to i1
- br i1 %tobool, label %if.then, label %if.end
-
-if.then: ; preds = %entry
- call void @_Z2f1v()
- br label %if.end
-
-if.end: ; preds = %if.then, %entry
- ret void
-}
-
-declare dso_local void @_Z2f1v()
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