[llvm] [AMDGPU] Allow allocation of lo128 registers from all banks (PR #172614)

[Matt Arsenault via llvm-commits]

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@@ -3662,6 +3662,33 @@ bool isPackedFP32Inst(unsigned Opc) {
   }
 }
 
+bool isLo128VGPR32(MCPhysReg R) {
+  return R >= AMDGPU::VGPR0 && R <= AMDGPU::VGPR127;
+}
+
+bool isHi128VGPR32(MCPhysReg R) {
+  return ((R >= AMDGPU::VGPR128 && R <= AMDGPU::VGPR255) ||
+          (R >= AMDGPU::VGPR384 && R <= AMDGPU::VGPR511) ||
+          (R >= AMDGPU::VGPR640 && R <= AMDGPU::VGPR767) ||
+          (R >= AMDGPU::VGPR896 && R <= AMDGPU::VGPR1023));
+}
+
+bool isLo128VGPR16(MCPhysReg R) {
+  return (R >= AMDGPU::VGPR0_LO16 && R <= AMDGPU::VGPR127_LO16) ||
+         (R >= AMDGPU::VGPR0_HI16 && R <= AMDGPU::VGPR127_HI16);
+}
+
+bool isHi128VGPR16(MCPhysReg R) {
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arsenm wrote:

Can you do a class contains check instead? 

https://github.com/llvm/llvm-project/pull/172614