[llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)

[Ryan Cowan via llvm-commits]

================
@@ -2746,38 +2703,32 @@ bool AArch64InstructionSelector::select(MachineInstr &I) {
         return RBI.constrainGenericRegister(DefReg, FPRRC, MRI);
       }
       }
+    }
 
-      assert((DefSize == 32 || DefSize == 64) && "Unexpected const def size");
-      // Either emit a FMOV, or emit a copy to emit a normal mov.
-      const Register DefGPRReg = MRI.createVirtualRegister(
-          DefSize == 32 ? &AArch64::GPR32RegClass : &AArch64::GPR64RegClass);
-      MachineOperand &RegOp = I.getOperand(0);
-      RegOp.setReg(DefGPRReg);
-      MIB.setInsertPt(MIB.getMBB(), std::next(I.getIterator()));
-      MIB.buildCopy({DefReg}, {DefGPRReg});
-
-      if (!RBI.constrainGenericRegister(DefReg, FPRRC, MRI)) {
-        LLVM_DEBUG(dbgs() << "Failed to constrain G_FCONSTANT def operand\n");
+    if (DefTy.isPointer()) {
+      if (DefSize != 64)
         return false;
-      }
 
-      MachineOperand &ImmOp = I.getOperand(1);
-      // FIXME: Is going through int64_t always correct?
-      ImmOp.ChangeToImmediate(
-          ImmOp.getFPImm()->getValueAPF().bitcastToAPInt().getZExtValue());
-    } else if (I.getOperand(1).isCImm()) {
-      uint64_t Val = I.getOperand(1).getCImm()->getZExtValue();
-      I.getOperand(1).ChangeToImmediate(Val);
-    } else if (I.getOperand(1).isImm()) {
-      uint64_t Val = I.getOperand(1).getImm();
-      I.getOperand(1).ChangeToImmediate(Val);
+      uint64_t Val = 0;
+      if (I.getOperand(1).isCImm())
+        Val = I.getOperand(1).getCImm()->getZExtValue();
+      else if (I.getOperand(1).isImm())
+        Val = I.getOperand(1).getImm();
+      else
+        return false;
+
+      Register TmpReg = MRI.createVirtualRegister(&AArch64::GPR64RegClass);
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HolyMolyCowMan wrote:

I was stuck on the fact that tablegen couldn't handle the pointers and didn't think to try changing the types. I've had a go at this now, thanks for the suggestion.

https://github.com/llvm/llvm-project/pull/178692