[llvm] [SPIR-V] Add SPV_INTEL_unstructured_loop_controls extension (PR #178799)

[Juan Manuel Martinez Caamaño via llvm-commits]

================
@@ -2878,6 +2880,38 @@ SPIRVEmitIntrinsics::simplifyZeroLengthArrayGepInst(GetElementPtrInst *GEP) {
   return nullptr;
 }
 
+void SPIRVEmitIntrinsics::emitUnstructuredLoopControls(Function &F,
+                                                       IRBuilder<> &B) {
+  const SPIRVSubtarget *ST = TM->getSubtargetImpl(F);
+  // Shaders use SPIRVStructurizer which emits OpLoopMerge via spv_loop_merge.
+  if (ST->isShader())
+    return;
+  if (!ST->canUseExtension(
+          SPIRV::Extension::SPV_INTEL_unstructured_loop_controls))
+    return;
+
+  for (BasicBlock &BB : F) {
+    Instruction *Term = BB.getTerminator();
+    MDNode *LoopMD = Term->getMetadata(LLVMContext::MD_loop);
+    if (!LoopMD)
+      continue;
+
+    SmallVector<unsigned, 1> Ops =
+        getSpirvLoopControlOperandsFromLoopMetadata(LoopMD);
+    unsigned LC = Ops[0];
+    if (LC == SPIRV::LoopControl::None)
+      continue;
+
+    // Emit intrinsic: loop control mask + optional parameters.
+    B.SetInsertPoint(Term);
+    SmallVector<Value *, 4> IntrArgs;
+    IntrArgs.push_back(ConstantInt::get(B.getInt32Ty(), LC));
+    for (unsigned I = 1; I < Ops.size(); ++I)
+      IntrArgs.push_back(ConstantInt::get(B.getInt32Ty(), Ops[I]));
+    B.CreateIntrinsic(Intrinsic::spv_loop_control_intel, {}, IntrArgs);
----------------
jmmartinez wrote:

There is one variant where the types are not passed (the second arg).
```suggestion
    B.CreateIntrinsic(Intrinsic::spv_loop_control_intel, IntrArgs);
```

https://github.com/llvm/llvm-project/pull/178799