[llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)

[Matt Arsenault via llvm-commits]

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@@ -5,16 +5,16 @@ define i64 @i64_test(i64 %i) nounwind readnone {
 ; CHECK-LABEL: i64_test:
 ; CHECK:       SelectionDAG has 26 nodes:
 ; CHECK-NEXT:    t0: ch,glue = EntryToken
-; CHECK-NEXT:    t2: i32,ch = CopyFromReg # D:1 t0, Register:i32 %8
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arsenm wrote:

Maybe it's worth avoiding speculatively creating the TargetConstant for the intrinsic ID.

Also I really hate this test 

https://github.com/llvm/llvm-project/pull/178198