[llvm] [X86] checkSignTestSetCCCombine - remove early return in CMP(X,0) case (PR #178710)

[Abhiram Jampani via llvm-commits]

https://github.com/Abhiramjampani updated https://github.com/llvm/llvm-project/pull/178710

>From f5ebb7436c5d599bb06a1d1fe1820ca9595817af Mon Sep 17 00:00:00 2001
From: Abhiramjampani <lcs2022059 at iiitl.ac.in>
Date: Thu, 29 Jan 2026 23:17:06 +0530
Subject: [PATCH] [X86] checkSignTestSetCCCombine - extend CMP(X,0) to handle
 SHL/SIGN_EXTEND_INREG

---
 llvm/lib/Target/X86/X86ISelLowering.cpp | 11 +++++++----
 1 file changed, 7 insertions(+), 4 deletions(-)

diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 144d6451b981f..9cc68642843e4 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -48975,12 +48975,15 @@ static SDValue checkSignTestSetCCCombine(SDValue Cmp, X86::CondCode &CC,
     if (!isNullConstant(Cmp.getOperand(1)))
       return SDValue();
     Src = Cmp.getOperand(0);
-    // Peek through a SRA node as we just need the signbit.
     // TODO: Remove one use limit once sdiv-fix regressions are fixed.
-    // TODO: Use SimplifyDemandedBits instead of just SRA?
-    if (Src.getOpcode() != ISD::SRA || !Src.hasOneUse())
+    if (!Src.hasOneUse())
+      return SDValue();
+    // Peek through a SRA node as we just need the signbit.
+    // TODO: Use SimplifyMultipleUseDemandedBits instead of just SRA?
+    if (Src.getOpcode() == ISD::SRA)
+      Src = Src.getOperand(0);
+    else if (Src.getOpcode() != ISD::SHL && Src.getOpcode() != ISD::SIGN_EXTEND_INREG)
       return SDValue();
-    Src = Src.getOperand(0);
   } else if (Cmp.getOpcode() == X86ISD::OR) {
     // OR(X,Y) -> see if only one operand contributes to the signbit.
     // TODO: XOR(X,Y) -> see if only one operand contributes to the signbit.