[llvm] [AMDGPU] Ensure v_mfma_scale_f32_{16x16x128|32x32x64}_f8f6f4 instructions are convergent (PR #178627)

Frederik Harwath via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 29 03:09:00 PST 2026


================
@@ -996,6 +996,7 @@ class MAIInst<string OpName, VOPProfile P, SDPatternOperator node, bit Scaled =
   Instruction Opcode = !cast<Instruction>(NAME);
   bit is_dgemm = 0;
   bit is_gfx940_xdl = 0;
+  let isConvergent = 1;
----------------
frederik-h wrote:

Is is better to add this here or to keep it in the multiclass below and add it to the corresponding multiclass for the scaled instructions?

https://github.com/llvm/llvm-project/pull/178627


More information about the llvm-commits mailing list