[llvm] [True16] Make loads into s16 legal in GlobalISel (PR #176963)

via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 28 09:13:51 PST 2026


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@@ -462,8 +462,14 @@ static bool isLoadStoreSizeLegal(const GCNSubtarget &ST,
     MemSize = std::max(MemSize, Align);
 #endif
 
-  // Only 1-byte and 2-byte to 32-bit extloads are valid.
-  if (MemSize != RegSize && RegSize != 32)
+  // Only 8-bit and 16-bit to 32-bit extloads are valid.
+  if (!ST.useRealTrue16Insts() && MemSize != RegSize && RegSize != 32)
+    return false;
+
+  // 8-bit to 16-bit extloads are valid using True16 instructions.
+  // 8-bit and 16-bit to 32-bit extloads are valid for non-True16 D16 memory
+  // ops, which could be re-implemented as True16
+  if (ST.useRealTrue16Insts() && MemSize != RegSize && RegSize > 32)
     return false;
----------------
saxlungs wrote:

Just to check my understanding, for this change to be equivalent that must mean that if `ST.useRealTrue16Insts()` is false, then it's not possible for `RegSize` to be less than 32, right? Because right now the condition `RegSize != 32` would still cause a return of false if `RegSize` was 16 for example

https://github.com/llvm/llvm-project/pull/176963


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