[llvm] [MachineScheduler] Add option to skip large regions with high pressure (PR #178422)
Nathan Corbyn via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 28 08:36:22 PST 2026
https://github.com/cofibrant updated https://github.com/llvm/llvm-project/pull/178422
>From 662f7d4de4d20c43555b7ed6994a31c05ef27482 Mon Sep 17 00:00:00 2001
From: Nathan Corbyn <n_corbyn at apple.com>
Date: Wed, 28 Jan 2026 13:42:34 +0000
Subject: [PATCH 1/3] [MachineScheduler] Add option to skip large regions with
high pressure
---
llvm/include/llvm/CodeGen/MachineScheduler.h | 5 +++++
llvm/lib/CodeGen/MachineScheduler.cpp | 22 ++++++++++++++++++++
2 files changed, 27 insertions(+)
diff --git a/llvm/include/llvm/CodeGen/MachineScheduler.h b/llvm/include/llvm/CodeGen/MachineScheduler.h
index 33036030679e5..2d60c2faf18aa 100644
--- a/llvm/include/llvm/CodeGen/MachineScheduler.h
+++ b/llvm/include/llvm/CodeGen/MachineScheduler.h
@@ -218,6 +218,11 @@ struct MachineSchedPolicy {
// Compute DFSResult for use in scheduling heuristics.
bool ComputeDFSResult = false;
+ // Skip scheduling for large regions with critical register pressure.
+ // When a region has more instructions than this threshold and register
+ // pressure exceeds limits, scheduling is skipped. 0 disables this feature.
+ unsigned LargeRegionSkipThreshold = 0;
+
MachineSchedPolicy() = default;
};
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index 05df5ea59d7a3..cb363c8a7c0ee 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -268,6 +268,12 @@ static cl::opt<unsigned>
cl::desc("The threshold for fast cluster"),
cl::init(1000));
+static cl::opt<unsigned> LargeRegionSkipThreshold(
+ "misched-large-region-skip-threshold", cl::Hidden,
+ cl::desc("Skip scheduling regions with instruction count exceeding this "
+ "threshold when register pressure is critical. 0 disables."),
+ cl::init(0));
+
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
static cl::opt<bool> MISchedDumpScheduleTrace(
"misched-dump-schedule-trace", cl::Hidden, cl::init(false),
@@ -1694,6 +1700,18 @@ void ScheduleDAGMILive::schedule() {
LLVM_DEBUG(SchedImpl->dumpPolicy());
buildDAGWithRegPressure();
+ // Skip scheduling for large regions with critical register pressure that
+ // exceed the large region skip threshold.
+ unsigned SkipThreshold = SchedImpl->getPolicy().LargeRegionSkipThreshold;
+ if (SkipThreshold && NumRegionInstrs > SkipThreshold &&
+ !RegionCriticalPSets.empty()) {
+ LLVM_DEBUG(dbgs() << "Skipping scheduling for region with "
+ << NumRegionInstrs << " instructions and "
+ << RegionCriticalPSets.size()
+ << " critical pressure sets\n");
+ return;
+ }
+
postProcessDAG();
SmallVector<SUnit*, 8> TopRoots, BotRoots;
@@ -3716,6 +3734,10 @@ void GenericScheduler::initPolicy(MachineBasicBlock::iterator Begin,
RegionPolicy.OnlyTopDown = false;
}
+ // Apply command-line override for large region skip threshold.
+ if (LargeRegionSkipThreshold.getNumOccurrences())
+ RegionPolicy.LargeRegionSkipThreshold = LargeRegionSkipThreshold;
+
BotIdx = NumRegionInstrs - 1;
this->NumRegionInstrs = NumRegionInstrs;
}
>From c22fc768f8c099e7eaf99b68105b2e574400e48a Mon Sep 17 00:00:00 2001
From: Nathan Corbyn <n_corbyn at apple.com>
Date: Wed, 28 Jan 2026 14:07:59 +0000
Subject: [PATCH 2/3] Add MIR test
---
.../AArch64/misched-large-region-skip.mir | 130 ++++++++++++++++++
1 file changed, 130 insertions(+)
create mode 100644 llvm/test/CodeGen/AArch64/misched-large-region-skip.mir
diff --git a/llvm/test/CodeGen/AArch64/misched-large-region-skip.mir b/llvm/test/CodeGen/AArch64/misched-large-region-skip.mir
new file mode 100644
index 0000000000000..891cab5acf426
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/misched-large-region-skip.mir
@@ -0,0 +1,130 @@
+# RUN: llc -mtriple=arm64-apple-ios -run-pass=machine-scheduler \
+# RUN: -misched-large-region-skip-threshold=10 \
+# RUN: -debug-only=machine-scheduler -o /dev/null %s 2>&1 \
+# RUN: | FileCheck %s
+
+# REQUIRES: asserts
+
+# Test that large regions with critical register pressure are skipped when
+# -misched-large-region-skip-threshold is set.
+
+# High pressure function should be skipped.
+# CHECK: Skipping scheduling for region
+
+# Low pressure function should NOT be skipped.
+# CHECK-NOT: Skipping scheduling for region
+
+---
+name: high_pressure
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x0
+ %0:gpr64sp = COPY $x0
+ %1:gpr64 = LDRXui %0, 0
+ %2:gpr64 = LDRXui %0, 1
+ %3:gpr64 = LDRXui %0, 2
+ %4:gpr64 = LDRXui %0, 3
+ %5:gpr64 = LDRXui %0, 4
+ %6:gpr64 = LDRXui %0, 5
+ %7:gpr64 = LDRXui %0, 6
+ %8:gpr64 = LDRXui %0, 7
+ %9:gpr64 = LDRXui %0, 8
+ %10:gpr64 = LDRXui %0, 9
+ %11:gpr64 = LDRXui %0, 10
+ %12:gpr64 = LDRXui %0, 11
+ %13:gpr64 = LDRXui %0, 12
+ %14:gpr64 = LDRXui %0, 13
+ %15:gpr64 = LDRXui %0, 14
+ %16:gpr64 = LDRXui %0, 15
+ %17:gpr64 = LDRXui %0, 16
+ %18:gpr64 = LDRXui %0, 17
+ %19:gpr64 = LDRXui %0, 18
+ %20:gpr64 = LDRXui %0, 19
+ %21:gpr64 = LDRXui %0, 20
+ %22:gpr64 = LDRXui %0, 21
+ %23:gpr64 = LDRXui %0, 22
+ %24:gpr64 = LDRXui %0, 23
+ %25:gpr64 = LDRXui %0, 24
+ %26:gpr64 = LDRXui %0, 25
+ %27:gpr64 = LDRXui %0, 26
+ %28:gpr64 = LDRXui %0, 27
+ %29:gpr64 = LDRXui %0, 28
+ %30:gpr64 = LDRXui %0, 29
+ %31:gpr64 = LDRXui %0, 30
+ %32:gpr64 = LDRXui %0, 31
+ %33:gpr64 = LDRXui %0, 32
+ %34:gpr64 = LDRXui %0, 33
+ %35:gpr64 = LDRXui %0, 34
+ %100:gpr64 = ADDXrr %1, %2
+ %101:gpr64 = ADDXrr %100, %3
+ %102:gpr64 = ADDXrr %101, %4
+ %103:gpr64 = ADDXrr %102, %5
+ %104:gpr64 = ADDXrr %103, %6
+ %105:gpr64 = ADDXrr %104, %7
+ %106:gpr64 = ADDXrr %105, %8
+ %107:gpr64 = ADDXrr %106, %9
+ %108:gpr64 = ADDXrr %107, %10
+ %109:gpr64 = ADDXrr %108, %11
+ %110:gpr64 = ADDXrr %109, %12
+ %111:gpr64 = ADDXrr %110, %13
+ %112:gpr64 = ADDXrr %111, %14
+ %113:gpr64 = ADDXrr %112, %15
+ %114:gpr64 = ADDXrr %113, %16
+ %115:gpr64 = ADDXrr %114, %17
+ %116:gpr64 = ADDXrr %115, %18
+ %117:gpr64 = ADDXrr %116, %19
+ %118:gpr64 = ADDXrr %117, %20
+ %119:gpr64 = ADDXrr %118, %21
+ %120:gpr64 = ADDXrr %119, %22
+ %121:gpr64 = ADDXrr %120, %23
+ %122:gpr64 = ADDXrr %121, %24
+ %123:gpr64 = ADDXrr %122, %25
+ %124:gpr64 = ADDXrr %123, %26
+ %125:gpr64 = ADDXrr %124, %27
+ %126:gpr64 = ADDXrr %125, %28
+ %127:gpr64 = ADDXrr %126, %29
+ %128:gpr64 = ADDXrr %127, %30
+ %129:gpr64 = ADDXrr %128, %31
+ %130:gpr64 = ADDXrr %129, %32
+ %131:gpr64 = ADDXrr %130, %33
+ %132:gpr64 = ADDXrr %131, %34
+ %133:gpr64 = ADDXrr %132, %35
+ $x0 = COPY %133
+ RET_ReallyLR implicit $x0
+...
+---
+name: low_pressure
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $x0, $x1
+ %0:gpr64sp = COPY $x0
+ %1:gpr64 = COPY $x1
+ %2:gpr64 = LDRXui %0, 0
+ %3:gpr64 = ADDXrr %1, %2
+ %4:gpr64 = LDRXui %0, 1
+ %5:gpr64 = ADDXrr %3, %4
+ %6:gpr64 = LDRXui %0, 2
+ %7:gpr64 = ADDXrr %5, %6
+ %8:gpr64 = LDRXui %0, 3
+ %9:gpr64 = ADDXrr %7, %8
+ %10:gpr64 = LDRXui %0, 4
+ %11:gpr64 = ADDXrr %9, %10
+ %12:gpr64 = LDRXui %0, 5
+ %13:gpr64 = ADDXrr %11, %12
+ %14:gpr64 = LDRXui %0, 6
+ %15:gpr64 = ADDXrr %13, %14
+ %16:gpr64 = LDRXui %0, 7
+ %17:gpr64 = ADDXrr %15, %16
+ %18:gpr64 = LDRXui %0, 8
+ %19:gpr64 = ADDXrr %17, %18
+ %20:gpr64 = LDRXui %0, 9
+ %21:gpr64 = ADDXrr %19, %20
+ %22:gpr64 = LDRXui %0, 10
+ %23:gpr64 = ADDXrr %21, %22
+ %24:gpr64 = LDRXui %0, 11
+ %25:gpr64 = ADDXrr %23, %24
+ $x0 = COPY %25
+ RET_ReallyLR implicit $x0
+...
>From a29e82e6e41df14e8ed96bf9315e54847a20eb62 Mon Sep 17 00:00:00 2001
From: Nathan Corbyn <n_corbyn at apple.com>
Date: Wed, 28 Jan 2026 16:36:05 +0000
Subject: [PATCH 3/3] Add threshold for number of critical pressure sets
---
llvm/include/llvm/CodeGen/MachineScheduler.h | 10 +++--
llvm/lib/CodeGen/MachineScheduler.cpp | 37 +++++++++++++------
.../AArch64/misched-large-region-skip.mir | 8 ++--
3 files changed, 36 insertions(+), 19 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineScheduler.h b/llvm/include/llvm/CodeGen/MachineScheduler.h
index 2d60c2faf18aa..90d943a949c84 100644
--- a/llvm/include/llvm/CodeGen/MachineScheduler.h
+++ b/llvm/include/llvm/CodeGen/MachineScheduler.h
@@ -218,10 +218,12 @@ struct MachineSchedPolicy {
// Compute DFSResult for use in scheduling heuristics.
bool ComputeDFSResult = false;
- // Skip scheduling for large regions with critical register pressure.
- // When a region has more instructions than this threshold and register
- // pressure exceeds limits, scheduling is skipped. 0 disables this feature.
- unsigned LargeRegionSkipThreshold = 0;
+ // All the scheduler to skip large regions with high register pressure.
+ // When a region has more instructions than `SkipRegionNumInstrsThreshold `
+ // and more critical pressure sets than `SkipRegionRegisterPressureThreshold `
+ // scheduling is skipped. 0 for either threshold disables this feature.
+ unsigned SkipRegionNumInstrsThreshold = 0;
+ unsigned SkipRegionRegisterPressureThreshold = 0;
MachineSchedPolicy() = default;
};
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index cb363c8a7c0ee..d247bc8e01190 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -268,10 +268,18 @@ static cl::opt<unsigned>
cl::desc("The threshold for fast cluster"),
cl::init(1000));
-static cl::opt<unsigned> LargeRegionSkipThreshold(
- "misched-large-region-skip-threshold", cl::Hidden,
- cl::desc("Skip scheduling regions with instruction count exceeding this "
- "threshold when register pressure is critical. 0 disables."),
+static cl::opt<unsigned> SkipRegionNumInstrsThreshold(
+ "misched-skip-region-num-instrs-threshold", cl::Hidden,
+ cl::desc("The minimum number of instructions in a region before it is "
+ "considered as a candidate to skip in case of excessive register "
+ "pressures. 0 disables."),
+ cl::init(0));
+
+static cl::opt<unsigned> SkipRegionRegisterPressureThreshold(
+ "misched-skip-region-reg-pressure-threshold", cl::Hidden,
+ cl::desc("The minimum number of critical register pressure sets in a "
+ "region before it is considered as a candidate to skip in case of "
+ "excessive register pressures. 0 disables."),
cl::init(0));
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
@@ -1700,11 +1708,14 @@ void ScheduleDAGMILive::schedule() {
LLVM_DEBUG(SchedImpl->dumpPolicy());
buildDAGWithRegPressure();
- // Skip scheduling for large regions with critical register pressure that
- // exceed the large region skip threshold.
- unsigned SkipThreshold = SchedImpl->getPolicy().LargeRegionSkipThreshold;
- if (SkipThreshold && NumRegionInstrs > SkipThreshold &&
- !RegionCriticalPSets.empty()) {
+ // Skip scheduling for large regions with exceesive critical register
+ // pressures sets, according to thresholds.
+ const unsigned InstrsThreshold =
+ SchedImpl->getPolicy().SkipRegionNumInstrsThreshold;
+ const unsigned RPThreshold =
+ SchedImpl->getPolicy().SkipRegionRegisterPressureThreshold;
+ if (InstrsThreshold && RPThreshold && NumRegionInstrs >= InstrsThreshold &&
+ RegionCriticalPSets.size() >= RPThreshold) {
LLVM_DEBUG(dbgs() << "Skipping scheduling for region with "
<< NumRegionInstrs << " instructions and "
<< RegionCriticalPSets.size()
@@ -3734,9 +3745,11 @@ void GenericScheduler::initPolicy(MachineBasicBlock::iterator Begin,
RegionPolicy.OnlyTopDown = false;
}
- // Apply command-line override for large region skip threshold.
- if (LargeRegionSkipThreshold.getNumOccurrences())
- RegionPolicy.LargeRegionSkipThreshold = LargeRegionSkipThreshold;
+ if (SkipRegionNumInstrsThreshold.getNumOccurrences())
+ RegionPolicy.SkipRegionNumInstrsThreshold = SkipRegionNumInstrsThreshold;
+ if (SkipRegionRegisterPressureThreshold.getNumOccurrences())
+ RegionPolicy.SkipRegionRegisterPressureThreshold =
+ SkipRegionRegisterPressureThreshold;
BotIdx = NumRegionInstrs - 1;
this->NumRegionInstrs = NumRegionInstrs;
diff --git a/llvm/test/CodeGen/AArch64/misched-large-region-skip.mir b/llvm/test/CodeGen/AArch64/misched-large-region-skip.mir
index 891cab5acf426..74b7ebb7a6d7b 100644
--- a/llvm/test/CodeGen/AArch64/misched-large-region-skip.mir
+++ b/llvm/test/CodeGen/AArch64/misched-large-region-skip.mir
@@ -1,17 +1,19 @@
# RUN: llc -mtriple=arm64-apple-ios -run-pass=machine-scheduler \
-# RUN: -misched-large-region-skip-threshold=10 \
+# RUN: -misched-skip-region-num-instrs-threshold=10 \
+# RUN: -misched-skip-region-reg-pressure-threshold=1 \
# RUN: -debug-only=machine-scheduler -o /dev/null %s 2>&1 \
# RUN: | FileCheck %s
# REQUIRES: asserts
# Test that large regions with critical register pressure are skipped when
-# -misched-large-region-skip-threshold is set.
+# -misched-skip-region-num-instrs-threshold and
+# -misched-skip-region-reg-pressure-threshold are set.
# High pressure function should be skipped.
# CHECK: Skipping scheduling for region
-# Low pressure function should NOT be skipped.
+# Low pressure function should not be skipped.
# CHECK-NOT: Skipping scheduling for region
---
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