[llvm] [AMDGPU] Fix DEALLOC_VGPRS in the presence of spills to scratch (PR #178461)

Jay Foad via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 28 08:33:17 PST 2026


https://github.com/jayfoad created https://github.com/llvm/llvm-project/pull/178461

None

>From 8c2938951b8b7fcc52b428956f2bbeb0c0b8e55a Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad at amd.com>
Date: Wed, 28 Jan 2026 16:31:29 +0000
Subject: [PATCH] [AMDGPU] Fix DEALLOC_VGPRS in the presence of spills to
 scratch

---
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp          | 4 ----
 llvm/test/CodeGen/AMDGPU/release-vgprs-spill.ll | 4 +---
 2 files changed, 1 insertion(+), 7 deletions(-)

diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index 3f6ac8056b59f..0473fbdf68dda 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -4481,10 +4481,6 @@ bool SIInstrInfo::mayAccessScratch(const MachineInstr &MI) const {
   if ((!isFLAT(MI) || isFLATGlobal(MI)) && !isBUF(MI))
     return false;
 
-  // If scratch is not initialized, we can never access it.
-  if (MI.getMF()->getFunction().hasFnAttribute("amdgpu-no-flat-scratch-init"))
-    return false;
-
   // SCRATCH instructions always access scratch.
   if (isFLATScratch(MI))
     return true;
diff --git a/llvm/test/CodeGen/AMDGPU/release-vgprs-spill.ll b/llvm/test/CodeGen/AMDGPU/release-vgprs-spill.ll
index 2d204e8ef5718..3d41dddef1a62 100644
--- a/llvm/test/CodeGen/AMDGPU/release-vgprs-spill.ll
+++ b/llvm/test/CodeGen/AMDGPU/release-vgprs-spill.ll
@@ -3,7 +3,7 @@
 
 ; This function uses scratch_store to spill some values to the stack. While
 ; these stores are potentially outstanding it should not send the DEALLOC_VGPRS
-; message. FIXME.
+; message.
 
 define amdgpu_kernel void @f(ptr %ptr, i32 %arg) "amdgpu-flat-work-group-size"="64,64" {
 ; CHECK-LABEL: f:
@@ -32,8 +32,6 @@ define amdgpu_kernel void @f(ptr %ptr, i32 %arg) "amdgpu-flat-work-group-size"="
 ; CHECK-NEXT:    s_waitcnt vmcnt(0)
 ; CHECK-NEXT:    global_store_b32 v[0:1], v2, off
 ; CHECK-NEXT:  .LBB0_2: ; %false
-; CHECK-NEXT:    s_nop 0
-; CHECK-NEXT:    s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
 ; CHECK-NEXT:    s_endpgm
   %tid = call i32 @llvm.amdgcn.workitem.id.x()
   %gep = getelementptr i32, ptr %ptr, i32 %tid



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