[llvm] [AMDGPU] Fix VGPR to SGPR copy for inline asm with SGPR constraint (PR #176330)

[Vigneshwar Jayakumar via llvm-commits]

VigneshwarJ wrote:

> > It would probably be more reliable to handle this by forcibly inserting readfirstlane on inline asm SGPR inputs and let it be cleaned up later, like how return-in-sgpr is handled
> 
> With this approach there should be 0 changes to SIFixSGPRCopies

Hey Matt, are you suggesting implementing  a method to lower inline-asm in SISelLowering.cpp , I was trying that approach, it created some hickups, I will continue to refine that and push. 
Also one more question, Do you want me to try adding a waterfall approach for divergent cases as well? That seemed complicated to add.

https://github.com/llvm/llvm-project/pull/176330